--- gcc/config/vax.h	2018/04/24 17:51:34	1.1
+++ gcc/config/vax.h	2018/04/24 17:54:21	1.1.1.2
@@ -93,7 +93,7 @@ extern int target_flags;
 /* This is not true on the vax.  */
 #define WORDS_BIG_ENDIAN 0
 
-/* Number of bits in an addressible storage unit */
+/* Number of bits in an addressable storage unit */
 #define BITS_PER_UNIT 8
 
 /* Width in bits of a "word", which is the contents of a machine register.
@@ -130,9 +130,12 @@ extern int target_flags;
 /* No structure field wants to be aligned rounder than this.  */
 #define BIGGEST_FIELD_ALIGNMENT (TARGET_VAXC_ALIGNMENT ? 8 : 32)
 
-/* Define this if move instructions will actually fail to work
+/* Set this nonzero if move instructions will actually fail to work
    when given unaligned data.  */
-/* #define STRICT_ALIGNMENT */
+#define STRICT_ALIGNMENT 0
+
+/* Let's keep the stack somewhat aligned.  */
+#define STACK_BOUNDARY 32
 
 /* Standard register usage.  */
 
@@ -283,6 +286,16 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_
 		 || (VALUE) == CONST0_RTX (SFmode))	\
    : 0)
 
+/* Optional extra constraints for this machine.
+
+   For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent
+   address.  */
+
+#define EXTRA_CONSTRAINT(OP, C) \
+  ((C) == 'Q'								\
+   ? GET_CODE (OP) == MEM && ! mode_dependent_address_p (XEXP (OP, 0))	\
+   : 0)
+
 /* Given an rtx X being reloaded into a reg required to be
    in class CLASS, return the class of reg to actually use.
    In general this is just CLASS; but on some machines
@@ -867,7 +880,7 @@ gen_rtx (PLUS, Pmode, frame, gen_rtx (CO
 
 /* Check a `double' value for validity for a particular machine mode.  */
 
-/* note that it is very hard to accidently create a number that fits in a
+/* note that it is very hard to accidentally create a number that fits in a
    double but not in a float, since their ranges are almost the same */
 #define CHECK_FLOAT_VALUE(mode, d) \
   if ((mode) == SFmode) \