Annotation of gcc/config/we32k.c, revision 1.1.1.1

1.1       root        1: /* Subroutines for insn-output.c for AT&T we32000 Family.
                      2:    Contributed by John Wehle ([email protected])
                      3:    Copyright (C) 1991-1992 Free Software Foundation, Inc.
                      4: 
                      5: This file is part of GNU CC.
                      6: 
                      7: GNU CC is free software; you can redistribute it and/or modify
                      8: it under the terms of the GNU General Public License as published by
                      9: the Free Software Foundation; either version 1, or (at your option)
                     10: any later version.
                     11: 
                     12: GNU CC is distributed in the hope that it will be useful,
                     13: but WITHOUT ANY WARRANTY; without even the implied warranty of
                     14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                     15: GNU General Public License for more details.
                     16: 
                     17: You should have received a copy of the GNU General Public License
                     18: along with GNU CC; see the file COPYING.  If not, write to
                     19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.  */
                     20: 
                     21: 
                     22: #include <stdio.h>
                     23: #include "config.h"
                     24: #include "rtl.h"
                     25: #include "real.h"
                     26: 
                     27: 
                     28: void output_move_double(operands)
                     29: rtx *operands;
                     30:   {
                     31:   rtx lsw_operands[2];
                     32:   rtx lsw_sreg = NULL;
                     33:   rtx msw_dreg = NULL;
                     34: 
                     35:   if (GET_CODE (operands[0]) == REG) {
                     36:     lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1);
                     37:     msw_dreg = operands[0];
                     38:     }
                     39:   else
                     40:     if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
                     41:       lsw_operands[0] = adj_offsettable_operand(operands[0], 4);
                     42:     else
                     43:       abort();
                     44: 
                     45:   if (GET_CODE (operands[1]) == REG) {
                     46:     lsw_operands[1] = gen_rtx(REG, SImode, REGNO (operands[1]) + 1);
                     47:     lsw_sreg = lsw_operands[1];
                     48:     }
                     49:   else
                     50:     if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1])) {
                     51:       lsw_operands[1] = adj_offsettable_operand(operands[1], 4);
                     52:       lsw_sreg = operands[1];
                     53:       for ( ; ; ) {
                     54:         if (REG_P (lsw_sreg))
                     55:           break;
                     56:         if (CONSTANT_ADDRESS_P (lsw_sreg)) {
                     57:           lsw_sreg = NULL;
                     58:           break;
                     59:           }
                     60:         if (GET_CODE (lsw_sreg) == MEM) {
                     61:           lsw_sreg = XEXP (lsw_sreg, 0);
                     62:           continue;
                     63:           }
                     64:         if (GET_CODE (lsw_sreg) == PLUS)
                     65:           if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 1))) {
                     66:             lsw_sreg = XEXP (lsw_sreg, 0);
                     67:             continue;
                     68:             }
                     69:           else
                     70:             if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 0))) {
                     71:               lsw_sreg = XEXP (lsw_sreg, 1);
                     72:               continue;
                     73:               }
                     74:         abort();
                     75:         }
                     76:       }
                     77:     else
                     78:       if (GET_CODE (operands[1]) == CONST_DOUBLE)
                     79:         {
                     80:         lsw_operands[1] = gen_rtx(CONST_INT, SImode,
                     81:                                   CONST_DOUBLE_HIGH(operands[1]));
                     82:         operands[1] = gen_rtx(CONST_INT, SImode,
                     83:                               CONST_DOUBLE_LOW(operands[1]));
                     84:         }
                     85:       else
                     86:         if (GET_CODE (operands[1]) == CONST_INT)
                     87:           {
                     88:           lsw_operands[1] = operands[1];
                     89:           operands[1] = const0_rtx;
                     90:           }
                     91:         else
                     92:           abort();
                     93: 
                     94:   if ( !msw_dreg || !lsw_sreg || REGNO (msw_dreg) != REGNO (lsw_sreg)) {
                     95:     output_asm_insn("movw %1, %0", operands);
                     96:     output_asm_insn("movw %1, %0", lsw_operands);
                     97:     }
                     98:   else {
                     99:     output_asm_insn("movw %1, %0", lsw_operands);
                    100:     output_asm_insn("movw %1, %0", operands);
                    101:     }
                    102:   }
                    103: 
                    104: void output_push_double(operands)
                    105: rtx *operands;
                    106:   {
                    107:   rtx lsw_operands[1];
                    108: 
                    109:   if (GET_CODE (operands[0]) == REG)
                    110:     lsw_operands[0] = gen_rtx(REG, SImode, REGNO (operands[0]) + 1);
                    111:   else
                    112:     if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
                    113:       lsw_operands[0] = adj_offsettable_operand(operands[0], 4);
                    114:     else
                    115:       if (GET_CODE (operands[0]) == CONST_DOUBLE)
                    116:         {
                    117:         lsw_operands[0] = gen_rtx(CONST_INT, SImode,
                    118:                                   CONST_DOUBLE_HIGH(operands[0]));
                    119:         operands[0] = gen_rtx(CONST_INT, SImode,
                    120:                               CONST_DOUBLE_LOW(operands[0]));
                    121:         }
                    122:       else
                    123:         if (GET_CODE (operands[0]) == CONST_INT)
                    124:           {
                    125:           lsw_operands[0] = operands[0];
                    126:           operands[0] = const0_rtx;
                    127:           }
                    128:         else
                    129:           abort();
                    130: 
                    131:   output_asm_insn("pushw %0", operands);
                    132:   output_asm_insn("pushw %0", lsw_operands);
                    133:   }

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