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1.1 root 1: /* Subroutines for insn-output.c for AT&T we32000 Family.
2: Contributed by John Wehle ([email protected])
3: Copyright (C) 1991-1992 Free Software Foundation, Inc.
4:
5: This file is part of GNU CC.
6:
7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
12: GNU CC is distributed in the hope that it will be useful,
13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
1.1.1.3 ! root 19: the Free Software Foundation, 59 Temple Place - Suite 330,
! 20: Boston, MA 02111-1307, USA. */
1.1 root 21:
22:
23: #include <stdio.h>
24: #include "config.h"
25: #include "rtl.h"
26: #include "real.h"
27:
28:
1.1.1.2 root 29: void
30: output_move_double (operands)
31: rtx *operands;
32: {
1.1 root 33: rtx lsw_operands[2];
34: rtx lsw_sreg = NULL;
35: rtx msw_dreg = NULL;
36:
1.1.1.2 root 37: if (GET_CODE (operands[0]) == REG)
38: {
39: lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
40: msw_dreg = operands[0];
1.1 root 41: }
1.1.1.2 root 42: else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
43: lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
1.1 root 44: else
1.1.1.2 root 45: abort ();
46:
47: if (GET_CODE (operands[1]) == REG)
48: {
49: lsw_operands[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1);
50: lsw_sreg = lsw_operands[1];
1.1 root 51: }
1.1.1.2 root 52: else if (GET_CODE (operands[1]) == MEM && offsettable_memref_p (operands[1]))
53: {
54: lsw_operands[1] = adj_offsettable_operand (operands[1], 4);
1.1 root 55: lsw_sreg = operands[1];
1.1.1.2 root 56: for ( ; ; )
57: {
58: if (REG_P (lsw_sreg))
59: break;
60: if (CONSTANT_ADDRESS_P (lsw_sreg))
61: {
62: lsw_sreg = NULL;
63: break;
64: }
65: if (GET_CODE (lsw_sreg) == MEM)
66: {
67: lsw_sreg = XEXP (lsw_sreg, 0);
68: continue;
69: }
70: if (GET_CODE (lsw_sreg) == PLUS)
71: {
72: if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 1)))
73: {
74: lsw_sreg = XEXP (lsw_sreg, 0);
75: continue;
76: }
77: else if (CONSTANT_ADDRESS_P (XEXP (lsw_sreg, 0)))
78: {
79: lsw_sreg = XEXP (lsw_sreg, 1);
80: continue;
81: }
82: }
83: abort ();
84: }
85: }
86: else if (GET_CODE (operands[1]) == CONST_DOUBLE)
87: {
88: lsw_operands[1] = gen_rtx (CONST_INT, SImode,
89: CONST_DOUBLE_HIGH (operands[1]));
90: operands[1] = gen_rtx (CONST_INT, SImode,
91: CONST_DOUBLE_LOW (operands[1]));
92: }
93: else if (GET_CODE (operands[1]) == CONST_INT)
94: {
95: lsw_operands[1] = operands[1];
96: operands[1] = const0_rtx;
97: }
98: else
99: abort ();
100:
101: if (!msw_dreg || !lsw_sreg || REGNO (msw_dreg) != REGNO (lsw_sreg))
102: {
103: output_asm_insn ("movw %1, %0", operands);
104: output_asm_insn ("movw %1, %0", lsw_operands);
105: }
106: else
107: {
108: output_asm_insn ("movw %1, %0", lsw_operands);
109: output_asm_insn ("movw %1, %0", operands);
110: }
111: }
112:
113: void
114: output_push_double (operands)
115: rtx *operands;
116: {
1.1 root 117: rtx lsw_operands[1];
118:
119: if (GET_CODE (operands[0]) == REG)
1.1.1.2 root 120: lsw_operands[0] = gen_rtx (REG, SImode, REGNO (operands[0]) + 1);
121: else if (GET_CODE (operands[0]) == MEM && offsettable_memref_p (operands[0]))
122: lsw_operands[0] = adj_offsettable_operand (operands[0], 4);
123: else if (GET_CODE (operands[0]) == CONST_DOUBLE)
124: {
125: lsw_operands[0] = gen_rtx (CONST_INT, SImode,
126: CONST_DOUBLE_HIGH (operands[0]));
127: operands[0] = gen_rtx (CONST_INT, SImode,
128: CONST_DOUBLE_LOW (operands[0]));
129: }
130: else if (GET_CODE (operands[0]) == CONST_INT)
131: {
132: lsw_operands[0] = operands[0];
133: operands[0] = const0_rtx;
134: }
1.1 root 135: else
1.1.1.2 root 136: abort ();
137:
138: output_asm_insn ("pushw %0", operands);
139: output_asm_insn ("pushw %0", lsw_operands);
140: }
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