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1.1 root 1: /* Common subexpression elimination for GNU compiler.
2: Copyright (C) 1987, 1988, 1989, 1992 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: #include "config.h"
22: #include "rtl.h"
23: #include "regs.h"
24: #include "hard-reg-set.h"
25: #include "flags.h"
26: #include "real.h"
27: #include "insn-config.h"
28: #include "recog.h"
29:
30: #include <stdio.h>
31: #include <setjmp.h>
32:
33: /* The basic idea of common subexpression elimination is to go
34: through the code, keeping a record of expressions that would
35: have the same value at the current scan point, and replacing
36: expressions encountered with the cheapest equivalent expression.
37:
38: It is too complicated to keep track of the different possibilities
39: when control paths merge; so, at each label, we forget all that is
40: known and start fresh. This can be described as processing each
41: basic block separately. Note, however, that these are not quite
42: the same as the basic blocks found by a later pass and used for
43: data flow analysis and register packing. We do not need to start fresh
44: after a conditional jump instruction if there is no label there.
45:
46: We use two data structures to record the equivalent expressions:
47: a hash table for most expressions, and several vectors together
48: with "quantity numbers" to record equivalent (pseudo) registers.
49:
50: The use of the special data structure for registers is desirable
51: because it is faster. It is possible because registers references
52: contain a fairly small number, the register number, taken from
53: a contiguously allocated series, and two register references are
54: identical if they have the same number. General expressions
55: do not have any such thing, so the only way to retrieve the
56: information recorded on an expression other than a register
57: is to keep it in a hash table.
58:
59: Registers and "quantity numbers":
60:
61: At the start of each basic block, all of the (hardware and pseudo)
62: registers used in the function are given distinct quantity
63: numbers to indicate their contents. During scan, when the code
64: copies one register into another, we copy the quantity number.
65: When a register is loaded in any other way, we allocate a new
66: quantity number to describe the value generated by this operation.
67: `reg_qty' records what quantity a register is currently thought
68: of as containing.
69:
70: All real quantity numbers are greater than or equal to `max_reg'.
71: If register N has not been assigned a quantity, reg_qty[N] will equal N.
72:
73: Quantity numbers below `max_reg' do not exist and none of the `qty_...'
74: variables should be referenced with an index below `max_reg'.
75:
76: We also maintain a bidirectional chain of registers for each
77: quantity number. `qty_first_reg', `qty_last_reg',
78: `reg_next_eqv' and `reg_prev_eqv' hold these chains.
79:
80: The first register in a chain is the one whose lifespan is least local.
81: Among equals, it is the one that was seen first.
82: We replace any equivalent register with that one.
83:
84: If two registers have the same quantity number, it must be true that
85: REG expressions with `qty_mode' must be in the hash table for both
86: registers and must be in the same class.
87:
88: The converse is not true. Since hard registers may be referenced in
89: any mode, two REG expressions might be equivalent in the hash table
90: but not have the same quantity number if the quantity number of one
91: of the registers is not the same mode as those expressions.
92:
93: Constants and quantity numbers
94:
95: When a quantity has a known constant value, that value is stored
96: in the appropriate element of qty_const. This is in addition to
97: putting the constant in the hash table as is usual for non-regs.
98:
1.1.1.2 root 99: Whether a reg or a constant is preferred is determined by the configuration
1.1 root 100: macro CONST_COSTS and will often depend on the constant value. In any
101: event, expressions containing constants can be simplified, by fold_rtx.
102:
103: When a quantity has a known nearly constant value (such as an address
104: of a stack slot), that value is stored in the appropriate element
105: of qty_const.
106:
107: Integer constants don't have a machine mode. However, cse
108: determines the intended machine mode from the destination
109: of the instruction that moves the constant. The machine mode
110: is recorded in the hash table along with the actual RTL
111: constant expression so that different modes are kept separate.
112:
113: Other expressions:
114:
115: To record known equivalences among expressions in general
116: we use a hash table called `table'. It has a fixed number of buckets
117: that contain chains of `struct table_elt' elements for expressions.
118: These chains connect the elements whose expressions have the same
119: hash codes.
120:
121: Other chains through the same elements connect the elements which
122: currently have equivalent values.
123:
124: Register references in an expression are canonicalized before hashing
125: the expression. This is done using `reg_qty' and `qty_first_reg'.
126: The hash code of a register reference is computed using the quantity
127: number, not the register number.
128:
129: When the value of an expression changes, it is necessary to remove from the
130: hash table not just that expression but all expressions whose values
131: could be different as a result.
132:
133: 1. If the value changing is in memory, except in special cases
134: ANYTHING referring to memory could be changed. That is because
135: nobody knows where a pointer does not point.
136: The function `invalidate_memory' removes what is necessary.
137:
138: The special cases are when the address is constant or is
139: a constant plus a fixed register such as the frame pointer
140: or a static chain pointer. When such addresses are stored in,
141: we can tell exactly which other such addresses must be invalidated
142: due to overlap. `invalidate' does this.
143: All expressions that refer to non-constant
144: memory addresses are also invalidated. `invalidate_memory' does this.
145:
146: 2. If the value changing is a register, all expressions
147: containing references to that register, and only those,
148: must be removed.
149:
150: Because searching the entire hash table for expressions that contain
151: a register is very slow, we try to figure out when it isn't necessary.
152: Precisely, this is necessary only when expressions have been
153: entered in the hash table using this register, and then the value has
154: changed, and then another expression wants to be added to refer to
155: the register's new value. This sequence of circumstances is rare
156: within any one basic block.
157:
158: The vectors `reg_tick' and `reg_in_table' are used to detect this case.
159: reg_tick[i] is incremented whenever a value is stored in register i.
160: reg_in_table[i] holds -1 if no references to register i have been
161: entered in the table; otherwise, it contains the value reg_tick[i] had
162: when the references were entered. If we want to enter a reference
163: and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
164: Until we want to enter a new entry, the mere fact that the two vectors
165: don't match makes the entries be ignored if anyone tries to match them.
166:
167: Registers themselves are entered in the hash table as well as in
168: the equivalent-register chains. However, the vectors `reg_tick'
169: and `reg_in_table' do not apply to expressions which are simple
170: register references. These expressions are removed from the table
171: immediately when they become invalid, and this can be done even if
172: we do not immediately search for all the expressions that refer to
173: the register.
174:
175: A CLOBBER rtx in an instruction invalidates its operand for further
176: reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
177: invalidates everything that resides in memory.
178:
179: Related expressions:
180:
181: Constant expressions that differ only by an additive integer
182: are called related. When a constant expression is put in
183: the table, the related expression with no constant term
184: is also entered. These are made to point at each other
185: so that it is possible to find out if there exists any
186: register equivalent to an expression related to a given expression. */
187:
188: /* One plus largest register number used in this function. */
189:
190: static int max_reg;
191:
192: /* Length of vectors indexed by quantity number.
193: We know in advance we will not need a quantity number this big. */
194:
195: static int max_qty;
196:
197: /* Next quantity number to be allocated.
198: This is 1 + the largest number needed so far. */
199:
200: static int next_qty;
201:
202: /* Indexed by quantity number, gives the first (or last) (pseudo) register
203: in the chain of registers that currently contain this quantity. */
204:
205: static int *qty_first_reg;
206: static int *qty_last_reg;
207:
208: /* Index by quantity number, gives the mode of the quantity. */
209:
210: static enum machine_mode *qty_mode;
211:
212: /* Indexed by quantity number, gives the rtx of the constant value of the
213: quantity, or zero if it does not have a known value.
214: A sum of the frame pointer (or arg pointer) plus a constant
215: can also be entered here. */
216:
217: static rtx *qty_const;
218:
219: /* Indexed by qty number, gives the insn that stored the constant value
220: recorded in `qty_const'. */
221:
222: static rtx *qty_const_insn;
223:
224: /* The next three variables are used to track when a comparison between a
225: quantity and some constant or register has been passed. In that case, we
226: know the results of the comparison in case we see it again. These variables
227: record a comparison that is known to be true. */
228:
229: /* Indexed by qty number, gives the rtx code of a comparison with a known
230: result involving this quantity. If none, it is UNKNOWN. */
231: static enum rtx_code *qty_comparison_code;
232:
233: /* Indexed by qty number, gives the constant being compared against in a
234: comparison of known result. If no such comparison, it is undefined.
235: If the comparison is not with a constant, it is zero. */
236:
237: static rtx *qty_comparison_const;
238:
239: /* Indexed by qty number, gives the quantity being compared against in a
240: comparison of known result. If no such comparison, if it undefined.
241: If the comparison is not with a register, it is -1. */
242:
243: static int *qty_comparison_qty;
244:
245: #ifdef HAVE_cc0
246: /* For machines that have a CC0, we do not record its value in the hash
247: table since its use is guaranteed to be the insn immediately following
248: its definition and any other insn is presumed to invalidate it.
249:
250: Instead, we store below the value last assigned to CC0. If it should
251: happen to be a constant, it is stored in preference to the actual
252: assigned value. In case it is a constant, we store the mode in which
253: the constant should be interpreted. */
254:
255: static rtx prev_insn_cc0;
256: static enum machine_mode prev_insn_cc0_mode;
257: #endif
258:
259: /* Previous actual insn. 0 if at first insn of basic block. */
260:
261: static rtx prev_insn;
262:
263: /* Insn being scanned. */
264:
265: static rtx this_insn;
266:
267: /* Index by (pseudo) register number, gives the quantity number
268: of the register's current contents. */
269:
270: static int *reg_qty;
271:
272: /* Index by (pseudo) register number, gives the number of the next (or
273: previous) (pseudo) register in the chain of registers sharing the same
274: value.
275:
276: Or -1 if this register is at the end of the chain.
277:
278: If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
279:
280: static int *reg_next_eqv;
281: static int *reg_prev_eqv;
282:
283: /* Index by (pseudo) register number, gives the number of times
284: that register has been altered in the current basic block. */
285:
286: static int *reg_tick;
287:
288: /* Index by (pseudo) register number, gives the reg_tick value at which
289: rtx's containing this register are valid in the hash table.
290: If this does not equal the current reg_tick value, such expressions
291: existing in the hash table are invalid.
292: If this is -1, no expressions containing this register have been
293: entered in the table. */
294:
295: static int *reg_in_table;
296:
297: /* A HARD_REG_SET containing all the hard registers for which there is
298: currently a REG expression in the hash table. Note the difference
299: from the above variables, which indicate if the REG is mentioned in some
300: expression in the table. */
301:
302: static HARD_REG_SET hard_regs_in_table;
303:
304: /* A HARD_REG_SET containing all the hard registers that are invalidated
305: by a CALL_INSN. */
306:
307: static HARD_REG_SET regs_invalidated_by_call;
308:
309: /* Two vectors of ints:
310: one containing max_reg -1's; the other max_reg + 500 (an approximation
311: for max_qty) elements where element i contains i.
312: These are used to initialize various other vectors fast. */
313:
314: static int *all_minus_one;
315: static int *consec_ints;
316:
317: /* CUID of insn that starts the basic block currently being cse-processed. */
318:
319: static int cse_basic_block_start;
320:
321: /* CUID of insn that ends the basic block currently being cse-processed. */
322:
323: static int cse_basic_block_end;
324:
325: /* Vector mapping INSN_UIDs to cuids.
1.1.1.2 root 326: The cuids are like uids but increase monotonically always.
1.1 root 327: We use them to see whether a reg is used outside a given basic block. */
328:
329: static short *uid_cuid;
330:
331: /* Get the cuid of an insn. */
332:
333: #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
334:
335: /* Nonzero if cse has altered conditional jump insns
336: in such a way that jump optimization should be redone. */
337:
338: static int cse_jumps_altered;
339:
340: /* canon_hash stores 1 in do_not_record
341: if it notices a reference to CC0, PC, or some other volatile
342: subexpression. */
343:
344: static int do_not_record;
345:
346: /* canon_hash stores 1 in hash_arg_in_memory
347: if it notices a reference to memory within the expression being hashed. */
348:
349: static int hash_arg_in_memory;
350:
351: /* canon_hash stores 1 in hash_arg_in_struct
352: if it notices a reference to memory that's part of a structure. */
353:
354: static int hash_arg_in_struct;
355:
356: /* The hash table contains buckets which are chains of `struct table_elt's,
357: each recording one expression's information.
358: That expression is in the `exp' field.
359:
360: Those elements with the same hash code are chained in both directions
361: through the `next_same_hash' and `prev_same_hash' fields.
362:
363: Each set of expressions with equivalent values
364: are on a two-way chain through the `next_same_value'
365: and `prev_same_value' fields, and all point with
366: the `first_same_value' field at the first element in
367: that chain. The chain is in order of increasing cost.
368: Each element's cost value is in its `cost' field.
369:
370: The `in_memory' field is nonzero for elements that
371: involve any reference to memory. These elements are removed
372: whenever a write is done to an unidentified location in memory.
373: To be safe, we assume that a memory address is unidentified unless
374: the address is either a symbol constant or a constant plus
375: the frame pointer or argument pointer.
376:
377: The `in_struct' field is nonzero for elements that
378: involve any reference to memory inside a structure or array.
379:
380: The `related_value' field is used to connect related expressions
381: (that differ by adding an integer).
382: The related expressions are chained in a circular fashion.
383: `related_value' is zero for expressions for which this
384: chain is not useful.
385:
386: The `cost' field stores the cost of this element's expression.
387:
388: The `is_const' flag is set if the element is a constant (including
389: a fixed address).
390:
391: The `flag' field is used as a temporary during some search routines.
392:
393: The `mode' field is usually the same as GET_MODE (`exp'), but
394: if `exp' is a CONST_INT and has no machine mode then the `mode'
395: field is the mode it was being used as. Each constant is
396: recorded separately for each mode it is used with. */
397:
398:
399: struct table_elt
400: {
401: rtx exp;
402: struct table_elt *next_same_hash;
403: struct table_elt *prev_same_hash;
404: struct table_elt *next_same_value;
405: struct table_elt *prev_same_value;
406: struct table_elt *first_same_value;
407: struct table_elt *related_value;
408: int cost;
409: enum machine_mode mode;
410: char in_memory;
411: char in_struct;
412: char is_const;
413: char flag;
414: };
415:
416: #define HASHBITS 16
417:
418: /* We don't want a lot of buckets, because we rarely have very many
419: things stored in the hash table, and a lot of buckets slows
420: down a lot of loops that happen frequently. */
421: #define NBUCKETS 31
422:
423: /* Compute hash code of X in mode M. Special-case case where X is a pseudo
424: register (hard registers may require `do_not_record' to be set). */
425:
426: #define HASH(X, M) \
427: (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
428: ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
429: : canon_hash (X, M) % NBUCKETS)
430:
431: /* Determine whether register number N is considered a fixed register for CSE.
432: It is desirable to replace other regs with fixed regs, to reduce need for
433: non-fixed hard regs.
434: A reg wins if it is either the frame pointer or designated as fixed,
435: but not if it is an overlapping register. */
436: #ifdef OVERLAPPING_REGNO_P
437: #define FIXED_REGNO_P(N) \
438: (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \
439: && ! OVERLAPPING_REGNO_P ((N)))
440: #else
441: #define FIXED_REGNO_P(N) \
442: ((N) == FRAME_POINTER_REGNUM || fixed_regs[N])
443: #endif
444:
445: /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
446: hard registers are the cheapest with a cost of 0. Next come pseudos
447: with a cost of one and other hard registers with a cost of 2. Aside
448: from these special cases, call `rtx_cost'. */
449:
450: #define COST(X) \
451: (GET_CODE (X) == REG \
452: ? (REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
453: : (FIXED_REGNO_P (REGNO (X)) \
454: && REGNO_REG_CLASS (REGNO (X)) != NO_REGS) ? 0 \
455: : 2) \
1.1.1.3 ! root 456: : rtx_cost (X, SET) * 2)
1.1 root 457:
458: /* Determine if the quantity number for register X represents a valid index
459: into the `qty_...' variables. */
460:
461: #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
462:
463: static struct table_elt *table[NBUCKETS];
464:
465: /* Chain of `struct table_elt's made so far for this function
466: but currently removed from the table. */
467:
468: static struct table_elt *free_element_chain;
469:
470: /* Number of `struct table_elt' structures made so far for this function. */
471:
472: static int n_elements_made;
473:
474: /* Maximum value `n_elements_made' has had so far in this compilation
475: for functions previously processed. */
476:
477: static int max_elements_made;
478:
479: /* Surviving equivalence class when two equivalence classes are merged
480: by recording the effects of a jump in the last insn. Zero if the
481: last insn was not a conditional jump. */
482:
483: static struct table_elt *last_jump_equiv_class;
484:
485: /* Set to the cost of a constant pool reference if one was found for a
486: symbolic constant. If this was found, it means we should try to
487: convert constants into constant pool entries if they don't fit in
488: the insn. */
489:
490: static int constant_pool_entries_cost;
491:
492: /* Bits describing what kind of values in memory must be invalidated
493: for a particular instruction. If all three bits are zero,
494: no memory refs need to be invalidated. Each bit is more powerful
495: than the preceding ones, and if a bit is set then the preceding
496: bits are also set.
497:
498: Here is how the bits are set:
499: Pushing onto the stack invalidates only the stack pointer,
500: writing at a fixed address invalidates only variable addresses,
501: writing in a structure element at variable address
502: invalidates all but scalar variables,
503: and writing in anything else at variable address invalidates everything. */
504:
505: struct write_data
506: {
507: int sp : 1; /* Invalidate stack pointer. */
508: int var : 1; /* Invalidate variable addresses. */
509: int nonscalar : 1; /* Invalidate all but scalar variables. */
510: int all : 1; /* Invalidate all memory refs. */
511: };
512:
513: /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
514: virtual regs here because the simplify_*_operation routines are called
515: by integrate.c, which is called before virtual register instantiation. */
516:
517: #define FIXED_BASE_PLUS_P(X) \
518: ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \
519: || (X) == virtual_stack_vars_rtx \
520: || (X) == virtual_incoming_args_rtx \
521: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
522: && (XEXP (X, 0) == frame_pointer_rtx \
523: || XEXP (X, 0) == arg_pointer_rtx \
524: || XEXP (X, 0) == virtual_stack_vars_rtx \
525: || XEXP (X, 0) == virtual_incoming_args_rtx)))
526:
1.1.1.3 ! root 527: /* Similar, but also allows reference to the stack pointer.
! 528:
! 529: This used to include FIXED_BASE_PLUS_P, however, we can't assume that
! 530: arg_pointer_rtx by itself is nonzero, because on at least one machine,
! 531: the i960, the arg pointer is zero when it is unused. */
1.1 root 532:
533: #define NONZERO_BASE_PLUS_P(X) \
1.1.1.3 ! root 534: ((X) == frame_pointer_rtx \
! 535: || (X) == virtual_stack_vars_rtx \
! 536: || (X) == virtual_incoming_args_rtx \
! 537: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
! 538: && (XEXP (X, 0) == frame_pointer_rtx \
! 539: || XEXP (X, 0) == arg_pointer_rtx \
! 540: || XEXP (X, 0) == virtual_stack_vars_rtx \
! 541: || XEXP (X, 0) == virtual_incoming_args_rtx)) \
1.1 root 542: || (X) == stack_pointer_rtx \
543: || (X) == virtual_stack_dynamic_rtx \
544: || (X) == virtual_outgoing_args_rtx \
545: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
546: && (XEXP (X, 0) == stack_pointer_rtx \
547: || XEXP (X, 0) == virtual_stack_dynamic_rtx \
548: || XEXP (X, 0) == virtual_outgoing_args_rtx)))
549:
550: static struct table_elt *lookup ();
551: static void free_element ();
552:
553: static int insert_regs ();
554: static void rehash_using_reg ();
555: static void remove_invalid_refs ();
556: static int exp_equiv_p ();
557: int refers_to_p ();
558: int refers_to_mem_p ();
559: static void invalidate_from_clobbers ();
560: static int safe_hash ();
561: static int canon_hash ();
562: static rtx fold_rtx ();
563: static rtx equiv_constant ();
564: static void record_jump_cond ();
565: static void note_mem_written ();
566: static int cse_rtx_addr_varies_p ();
567: static enum rtx_code find_comparison_args ();
568: static void cse_insn ();
569: static void cse_set_around_loop ();
570:
571: /* Return an estimate of the cost of computing rtx X.
572: One use is in cse, to decide which expression to keep in the hash table.
573: Another is in rtl generation, to pick the cheapest way to multiply.
574: Other uses like the latter are expected in the future. */
575:
576: /* Return the right cost to give to an operation
577: to make the cost of the corresponding register-to-register instruction
578: N times that of a fast register-to-register instruction. */
579:
580: #define COSTS_N_INSNS(N) ((N) * 4 - 2)
581:
582: int
1.1.1.3 ! root 583: rtx_cost (x, outer_code)
1.1 root 584: rtx x;
1.1.1.3 ! root 585: enum rtx_code outer_code;
1.1 root 586: {
587: register int i, j;
588: register enum rtx_code code;
589: register char *fmt;
590: register int total;
591:
592: if (x == 0)
593: return 0;
594:
595: /* Compute the default costs of certain things.
596: Note that RTX_COSTS can override the defaults. */
597:
598: code = GET_CODE (x);
599: switch (code)
600: {
601: case MULT:
602: /* Count multiplication by 2**n as a shift,
603: because if we are considering it, we would output it as a shift. */
604: if (GET_CODE (XEXP (x, 1)) == CONST_INT
605: && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
606: total = 2;
607: else
608: total = COSTS_N_INSNS (5);
609: break;
610: case DIV:
611: case UDIV:
612: case MOD:
613: case UMOD:
614: total = COSTS_N_INSNS (7);
615: break;
616: case USE:
617: /* Used in loop.c and combine.c as a marker. */
618: total = 0;
619: break;
1.1.1.2 root 620: case ASM_OPERANDS:
621: /* We don't want these to be used in substitutions because
622: we have no way of validating the resulting insn. So assign
623: anything containing an ASM_OPERANDS a very high cost. */
624: total = 1000;
625: break;
1.1 root 626: default:
627: total = 2;
628: }
629:
630: switch (code)
631: {
632: case REG:
633: return 1;
634: case SUBREG:
1.1.1.3 ! root 635: /* If we can't tie these modes, make this expensive. The larger
! 636: the mode, the more expensive it is. */
! 637: if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
! 638: return COSTS_N_INSNS (2
! 639: + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
1.1 root 640: return 2;
641: #ifdef RTX_COSTS
1.1.1.3 ! root 642: RTX_COSTS (x, code, outer_code);
1.1 root 643: #endif
1.1.1.3 ! root 644: CONST_COSTS (x, code, outer_code);
1.1 root 645: }
646:
647: /* Sum the costs of the sub-rtx's, plus cost of this operation,
648: which is already in total. */
649:
650: fmt = GET_RTX_FORMAT (code);
651: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
652: if (fmt[i] == 'e')
1.1.1.3 ! root 653: total += rtx_cost (XEXP (x, i), code);
1.1 root 654: else if (fmt[i] == 'E')
655: for (j = 0; j < XVECLEN (x, i); j++)
1.1.1.3 ! root 656: total += rtx_cost (XVECEXP (x, i, j), code);
1.1 root 657:
658: return total;
659: }
660:
661: /* Clear the hash table and initialize each register with its own quantity,
662: for a new basic block. */
663:
664: static void
665: new_basic_block ()
666: {
667: register int i;
668:
669: next_qty = max_reg;
670:
671: bzero (reg_tick, max_reg * sizeof (int));
672:
673: bcopy (all_minus_one, reg_in_table, max_reg * sizeof (int));
674: bcopy (consec_ints, reg_qty, max_reg * sizeof (int));
675: CLEAR_HARD_REG_SET (hard_regs_in_table);
676:
677: /* The per-quantity values used to be initialized here, but it is
678: much faster to initialize each as it is made in `make_new_qty'. */
679:
680: for (i = 0; i < NBUCKETS; i++)
681: {
682: register struct table_elt *this, *next;
683: for (this = table[i]; this; this = next)
684: {
685: next = this->next_same_hash;
686: free_element (this);
687: }
688: }
689:
690: bzero (table, sizeof table);
691:
692: prev_insn = 0;
693:
694: #ifdef HAVE_cc0
695: prev_insn_cc0 = 0;
696: #endif
697: }
698:
699: /* Say that register REG contains a quantity not in any register before
700: and initialize that quantity. */
701:
702: static void
703: make_new_qty (reg)
704: register int reg;
705: {
706: register int q;
707:
708: if (next_qty >= max_qty)
709: abort ();
710:
711: q = reg_qty[reg] = next_qty++;
712: qty_first_reg[q] = reg;
713: qty_last_reg[q] = reg;
714: qty_const[q] = qty_const_insn[q] = 0;
715: qty_comparison_code[q] = UNKNOWN;
716:
717: reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
718: }
719:
720: /* Make reg NEW equivalent to reg OLD.
721: OLD is not changing; NEW is. */
722:
723: static void
724: make_regs_eqv (new, old)
725: register int new, old;
726: {
727: register int lastr, firstr;
728: register int q = reg_qty[old];
729:
730: /* Nothing should become eqv until it has a "non-invalid" qty number. */
731: if (! REGNO_QTY_VALID_P (old))
732: abort ();
733:
734: reg_qty[new] = q;
735: firstr = qty_first_reg[q];
736: lastr = qty_last_reg[q];
737:
738: /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
739: hard regs. Among pseudos, if NEW will live longer than any other reg
740: of the same qty, and that is beyond the current basic block,
741: make it the new canonical replacement for this qty. */
742: if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
743: /* Certain fixed registers might be of the class NO_REGS. This means
744: that not only can they not be allocated by the compiler, but
1.1.1.3 ! root 745: they cannot be used in substitutions or canonicalizations
1.1 root 746: either. */
747: && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
748: && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
749: || (new >= FIRST_PSEUDO_REGISTER
750: && (firstr < FIRST_PSEUDO_REGISTER
751: || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end
752: || (uid_cuid[regno_first_uid[new]]
753: < cse_basic_block_start))
754: && (uid_cuid[regno_last_uid[new]]
755: > uid_cuid[regno_last_uid[firstr]]))))))
756: {
757: reg_prev_eqv[firstr] = new;
758: reg_next_eqv[new] = firstr;
759: reg_prev_eqv[new] = -1;
760: qty_first_reg[q] = new;
761: }
762: else
763: {
764: /* If NEW is a hard reg (known to be non-fixed), insert at end.
765: Otherwise, insert before any non-fixed hard regs that are at the
766: end. Registers of class NO_REGS cannot be used as an
767: equivalent for anything. */
768: while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
769: && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
770: && new >= FIRST_PSEUDO_REGISTER)
771: lastr = reg_prev_eqv[lastr];
772: reg_next_eqv[new] = reg_next_eqv[lastr];
773: if (reg_next_eqv[lastr] >= 0)
774: reg_prev_eqv[reg_next_eqv[lastr]] = new;
775: else
776: qty_last_reg[q] = new;
777: reg_next_eqv[lastr] = new;
778: reg_prev_eqv[new] = lastr;
779: }
780: }
781:
782: /* Remove REG from its equivalence class. */
783:
784: static void
785: delete_reg_equiv (reg)
786: register int reg;
787: {
788: register int n = reg_next_eqv[reg];
789: register int p = reg_prev_eqv[reg];
790: register int q = reg_qty[reg];
791:
792: /* If invalid, do nothing. N and P above are undefined in that case. */
793: if (q == reg)
794: return;
795:
796: if (n != -1)
797: reg_prev_eqv[n] = p;
798: else
799: qty_last_reg[q] = p;
800: if (p != -1)
801: reg_next_eqv[p] = n;
802: else
803: qty_first_reg[q] = n;
804:
805: reg_qty[reg] = reg;
806: }
807:
808: /* Remove any invalid expressions from the hash table
809: that refer to any of the registers contained in expression X.
810:
811: Make sure that newly inserted references to those registers
812: as subexpressions will be considered valid.
813:
814: mention_regs is not called when a register itself
815: is being stored in the table.
816:
817: Return 1 if we have done something that may have changed the hash code
818: of X. */
819:
820: static int
821: mention_regs (x)
822: rtx x;
823: {
824: register enum rtx_code code;
825: register int i, j;
826: register char *fmt;
827: register int changed = 0;
828:
829: if (x == 0)
1.1.1.3 ! root 830: return 0;
1.1 root 831:
832: code = GET_CODE (x);
833: if (code == REG)
834: {
835: register int regno = REGNO (x);
836: register int endregno
837: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
838: : HARD_REGNO_NREGS (regno, GET_MODE (x)));
839: int i;
840:
841: for (i = regno; i < endregno; i++)
842: {
843: if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
844: remove_invalid_refs (i);
845:
846: reg_in_table[i] = reg_tick[i];
847: }
848:
849: return 0;
850: }
851:
852: /* If X is a comparison or a COMPARE and either operand is a register
853: that does not have a quantity, give it one. This is so that a later
854: call to record_jump_equiv won't cause X to be assigned a different
855: hash code and not found in the table after that call.
856:
857: It is not necessary to do this here, since rehash_using_reg can
858: fix up the table later, but doing this here eliminates the need to
859: call that expensive function in the most common case where the only
860: use of the register is in the comparison. */
861:
862: if (code == COMPARE || GET_RTX_CLASS (code) == '<')
863: {
864: if (GET_CODE (XEXP (x, 0)) == REG
865: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
866: if (insert_regs (XEXP (x, 0), 0, 0))
867: {
868: rehash_using_reg (XEXP (x, 0));
869: changed = 1;
870: }
871:
872: if (GET_CODE (XEXP (x, 1)) == REG
873: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
874: if (insert_regs (XEXP (x, 1), 0, 0))
875: {
876: rehash_using_reg (XEXP (x, 1));
877: changed = 1;
878: }
879: }
880:
881: fmt = GET_RTX_FORMAT (code);
882: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
883: if (fmt[i] == 'e')
884: changed |= mention_regs (XEXP (x, i));
885: else if (fmt[i] == 'E')
886: for (j = 0; j < XVECLEN (x, i); j++)
887: changed |= mention_regs (XVECEXP (x, i, j));
888:
889: return changed;
890: }
891:
892: /* Update the register quantities for inserting X into the hash table
893: with a value equivalent to CLASSP.
894: (If the class does not contain a REG, it is irrelevant.)
895: If MODIFIED is nonzero, X is a destination; it is being modified.
896: Note that delete_reg_equiv should be called on a register
897: before insert_regs is done on that register with MODIFIED != 0.
898:
899: Nonzero value means that elements of reg_qty have changed
900: so X's hash code may be different. */
901:
902: static int
903: insert_regs (x, classp, modified)
904: rtx x;
905: struct table_elt *classp;
906: int modified;
907: {
908: if (GET_CODE (x) == REG)
909: {
910: register int regno = REGNO (x);
911:
912: if (modified
913: || ! (REGNO_QTY_VALID_P (regno)
914: && qty_mode[reg_qty[regno]] == GET_MODE (x)))
915: {
916: if (classp)
917: for (classp = classp->first_same_value;
918: classp != 0;
919: classp = classp->next_same_value)
920: if (GET_CODE (classp->exp) == REG
921: && GET_MODE (classp->exp) == GET_MODE (x))
922: {
923: make_regs_eqv (regno, REGNO (classp->exp));
924: return 1;
925: }
926:
927: make_new_qty (regno);
928: qty_mode[reg_qty[regno]] = GET_MODE (x);
929: return 1;
930: }
931: }
932: else
933: return mention_regs (x);
934: }
935:
936: /* Look in or update the hash table. */
937:
938: /* Put the element ELT on the list of free elements. */
939:
940: static void
941: free_element (elt)
942: struct table_elt *elt;
943: {
944: elt->next_same_hash = free_element_chain;
945: free_element_chain = elt;
946: }
947:
948: /* Return an element that is free for use. */
949:
950: static struct table_elt *
951: get_element ()
952: {
953: struct table_elt *elt = free_element_chain;
954: if (elt)
955: {
956: free_element_chain = elt->next_same_hash;
957: return elt;
958: }
959: n_elements_made++;
960: return (struct table_elt *) oballoc (sizeof (struct table_elt));
961: }
962:
963: /* Remove table element ELT from use in the table.
964: HASH is its hash code, made using the HASH macro.
965: It's an argument because often that is known in advance
966: and we save much time not recomputing it. */
967:
968: static void
969: remove_from_table (elt, hash)
970: register struct table_elt *elt;
971: int hash;
972: {
973: if (elt == 0)
974: return;
975:
976: /* Mark this element as removed. See cse_insn. */
977: elt->first_same_value = 0;
978:
979: /* Remove the table element from its equivalence class. */
980:
981: {
982: register struct table_elt *prev = elt->prev_same_value;
983: register struct table_elt *next = elt->next_same_value;
984:
985: if (next) next->prev_same_value = prev;
986:
987: if (prev)
988: prev->next_same_value = next;
989: else
990: {
991: register struct table_elt *newfirst = next;
992: while (next)
993: {
994: next->first_same_value = newfirst;
995: next = next->next_same_value;
996: }
997: }
998: }
999:
1000: /* Remove the table element from its hash bucket. */
1001:
1002: {
1003: register struct table_elt *prev = elt->prev_same_hash;
1004: register struct table_elt *next = elt->next_same_hash;
1005:
1006: if (next) next->prev_same_hash = prev;
1007:
1008: if (prev)
1009: prev->next_same_hash = next;
1010: else if (table[hash] == elt)
1011: table[hash] = next;
1012: else
1013: {
1014: /* This entry is not in the proper hash bucket. This can happen
1015: when two classes were merged by `merge_equiv_classes'. Search
1016: for the hash bucket that it heads. This happens only very
1017: rarely, so the cost is acceptable. */
1018: for (hash = 0; hash < NBUCKETS; hash++)
1019: if (table[hash] == elt)
1020: table[hash] = next;
1021: }
1022: }
1023:
1024: /* Remove the table element from its related-value circular chain. */
1025:
1026: if (elt->related_value != 0 && elt->related_value != elt)
1027: {
1028: register struct table_elt *p = elt->related_value;
1029: while (p->related_value != elt)
1030: p = p->related_value;
1031: p->related_value = elt->related_value;
1032: if (p->related_value == p)
1033: p->related_value = 0;
1034: }
1035:
1036: free_element (elt);
1037: }
1038:
1039: /* Look up X in the hash table and return its table element,
1040: or 0 if X is not in the table.
1041:
1042: MODE is the machine-mode of X, or if X is an integer constant
1043: with VOIDmode then MODE is the mode with which X will be used.
1044:
1045: Here we are satisfied to find an expression whose tree structure
1046: looks like X. */
1047:
1048: static struct table_elt *
1049: lookup (x, hash, mode)
1050: rtx x;
1051: int hash;
1052: enum machine_mode mode;
1053: {
1054: register struct table_elt *p;
1055:
1056: for (p = table[hash]; p; p = p->next_same_hash)
1057: if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1058: || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1059: return p;
1060:
1061: return 0;
1062: }
1063:
1064: /* Like `lookup' but don't care whether the table element uses invalid regs.
1065: Also ignore discrepancies in the machine mode of a register. */
1066:
1067: static struct table_elt *
1068: lookup_for_remove (x, hash, mode)
1069: rtx x;
1070: int hash;
1071: enum machine_mode mode;
1072: {
1073: register struct table_elt *p;
1074:
1075: if (GET_CODE (x) == REG)
1076: {
1077: int regno = REGNO (x);
1078: /* Don't check the machine mode when comparing registers;
1079: invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1080: for (p = table[hash]; p; p = p->next_same_hash)
1081: if (GET_CODE (p->exp) == REG
1082: && REGNO (p->exp) == regno)
1083: return p;
1084: }
1085: else
1086: {
1087: for (p = table[hash]; p; p = p->next_same_hash)
1088: if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1089: return p;
1090: }
1091:
1092: return 0;
1093: }
1094:
1095: /* Look for an expression equivalent to X and with code CODE.
1096: If one is found, return that expression. */
1097:
1098: static rtx
1099: lookup_as_function (x, code)
1100: rtx x;
1101: enum rtx_code code;
1102: {
1103: register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1104: GET_MODE (x));
1105: if (p == 0)
1106: return 0;
1107:
1108: for (p = p->first_same_value; p; p = p->next_same_value)
1109: {
1110: if (GET_CODE (p->exp) == code
1111: /* Make sure this is a valid entry in the table. */
1112: && exp_equiv_p (p->exp, p->exp, 1, 0))
1113: return p->exp;
1114: }
1115:
1116: return 0;
1117: }
1118:
1119: /* Insert X in the hash table, assuming HASH is its hash code
1120: and CLASSP is an element of the class it should go in
1121: (or 0 if a new class should be made).
1122: It is inserted at the proper position to keep the class in
1123: the order cheapest first.
1124:
1125: MODE is the machine-mode of X, or if X is an integer constant
1126: with VOIDmode then MODE is the mode with which X will be used.
1127:
1128: For elements of equal cheapness, the most recent one
1129: goes in front, except that the first element in the list
1130: remains first unless a cheaper element is added. The order of
1131: pseudo-registers does not matter, as canon_reg will be called to
1.1.1.3 ! root 1132: find the cheapest when a register is retrieved from the table.
1.1 root 1133:
1134: The in_memory field in the hash table element is set to 0.
1135: The caller must set it nonzero if appropriate.
1136:
1137: You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1138: and if insert_regs returns a nonzero value
1139: you must then recompute its hash code before calling here.
1140:
1141: If necessary, update table showing constant values of quantities. */
1142:
1143: #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1144:
1145: static struct table_elt *
1146: insert (x, classp, hash, mode)
1147: register rtx x;
1148: register struct table_elt *classp;
1149: int hash;
1150: enum machine_mode mode;
1151: {
1152: register struct table_elt *elt;
1153:
1154: /* If X is a register and we haven't made a quantity for it,
1155: something is wrong. */
1156: if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1157: abort ();
1158:
1159: /* If X is a hard register, show it is being put in the table. */
1160: if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1161: {
1162: int regno = REGNO (x);
1163: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1164: int i;
1165:
1166: for (i = regno; i < endregno; i++)
1167: SET_HARD_REG_BIT (hard_regs_in_table, i);
1168: }
1169:
1170:
1171: /* Put an element for X into the right hash bucket. */
1172:
1173: elt = get_element ();
1174: elt->exp = x;
1175: elt->cost = COST (x);
1176: elt->next_same_value = 0;
1177: elt->prev_same_value = 0;
1178: elt->next_same_hash = table[hash];
1179: elt->prev_same_hash = 0;
1180: elt->related_value = 0;
1181: elt->in_memory = 0;
1182: elt->mode = mode;
1183: elt->is_const = (CONSTANT_P (x)
1184: /* GNU C++ takes advantage of this for `this'
1185: (and other const values). */
1186: || (RTX_UNCHANGING_P (x)
1187: && GET_CODE (x) == REG
1188: && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1189: || FIXED_BASE_PLUS_P (x));
1190:
1191: if (table[hash])
1192: table[hash]->prev_same_hash = elt;
1193: table[hash] = elt;
1194:
1195: /* Put it into the proper value-class. */
1196: if (classp)
1197: {
1198: classp = classp->first_same_value;
1199: if (CHEAPER (elt, classp))
1200: /* Insert at the head of the class */
1201: {
1202: register struct table_elt *p;
1203: elt->next_same_value = classp;
1204: classp->prev_same_value = elt;
1205: elt->first_same_value = elt;
1206:
1207: for (p = classp; p; p = p->next_same_value)
1208: p->first_same_value = elt;
1209: }
1210: else
1211: {
1212: /* Insert not at head of the class. */
1213: /* Put it after the last element cheaper than X. */
1214: register struct table_elt *p, *next;
1215: for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1216: p = next);
1217: /* Put it after P and before NEXT. */
1218: elt->next_same_value = next;
1219: if (next)
1220: next->prev_same_value = elt;
1221: elt->prev_same_value = p;
1222: p->next_same_value = elt;
1223: elt->first_same_value = classp;
1224: }
1225: }
1226: else
1227: elt->first_same_value = elt;
1228:
1229: /* If this is a constant being set equivalent to a register or a register
1230: being set equivalent to a constant, note the constant equivalence.
1231:
1232: If this is a constant, it cannot be equivalent to a different constant,
1233: and a constant is the only thing that can be cheaper than a register. So
1234: we know the register is the head of the class (before the constant was
1235: inserted).
1236:
1237: If this is a register that is not already known equivalent to a
1238: constant, we must check the entire class.
1239:
1240: If this is a register that is already known equivalent to an insn,
1241: update `qty_const_insn' to show that `this_insn' is the latest
1242: insn making that quantity equivalent to the constant. */
1243:
1244: if (elt->is_const && classp && GET_CODE (classp->exp) == REG)
1245: {
1246: qty_const[reg_qty[REGNO (classp->exp)]]
1247: = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1248: qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1249: }
1250:
1251: else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]])
1252: {
1253: register struct table_elt *p;
1254:
1255: for (p = classp; p != 0; p = p->next_same_value)
1256: {
1257: if (p->is_const)
1258: {
1259: qty_const[reg_qty[REGNO (x)]]
1260: = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1261: qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1262: break;
1263: }
1264: }
1265: }
1266:
1267: else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1268: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1269: qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1270:
1271: /* If this is a constant with symbolic value,
1272: and it has a term with an explicit integer value,
1273: link it up with related expressions. */
1274: if (GET_CODE (x) == CONST)
1275: {
1276: rtx subexp = get_related_value (x);
1277: int subhash;
1278: struct table_elt *subelt, *subelt_prev;
1279:
1280: if (subexp != 0)
1281: {
1282: /* Get the integer-free subexpression in the hash table. */
1283: subhash = safe_hash (subexp, mode) % NBUCKETS;
1284: subelt = lookup (subexp, subhash, mode);
1285: if (subelt == 0)
1286: subelt = insert (subexp, 0, subhash, mode);
1287: /* Initialize SUBELT's circular chain if it has none. */
1288: if (subelt->related_value == 0)
1289: subelt->related_value = subelt;
1290: /* Find the element in the circular chain that precedes SUBELT. */
1291: subelt_prev = subelt;
1292: while (subelt_prev->related_value != subelt)
1293: subelt_prev = subelt_prev->related_value;
1294: /* Put new ELT into SUBELT's circular chain just before SUBELT.
1295: This way the element that follows SUBELT is the oldest one. */
1296: elt->related_value = subelt_prev->related_value;
1297: subelt_prev->related_value = elt;
1298: }
1299: }
1300:
1301: return elt;
1302: }
1303:
1304: /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1305: CLASS2 into CLASS1. This is done when we have reached an insn which makes
1306: the two classes equivalent.
1307:
1308: CLASS1 will be the surviving class; CLASS2 should not be used after this
1309: call.
1310:
1311: Any invalid entries in CLASS2 will not be copied. */
1312:
1313: static void
1314: merge_equiv_classes (class1, class2)
1315: struct table_elt *class1, *class2;
1316: {
1317: struct table_elt *elt, *next, *new;
1318:
1319: /* Ensure we start with the head of the classes. */
1320: class1 = class1->first_same_value;
1321: class2 = class2->first_same_value;
1322:
1323: /* If they were already equal, forget it. */
1324: if (class1 == class2)
1325: return;
1326:
1327: for (elt = class2; elt; elt = next)
1328: {
1329: int hash;
1330: rtx exp = elt->exp;
1331: enum machine_mode mode = elt->mode;
1332:
1333: next = elt->next_same_value;
1334:
1335: /* Remove old entry, make a new one in CLASS1's class.
1336: Don't do this for invalid entries as we cannot find their
1337: hash code (it also isn't necessary). */
1338: if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1339: {
1340: hash_arg_in_memory = 0;
1341: hash_arg_in_struct = 0;
1342: hash = HASH (exp, mode);
1343:
1344: if (GET_CODE (exp) == REG)
1345: delete_reg_equiv (REGNO (exp));
1346:
1347: remove_from_table (elt, hash);
1348:
1349: if (insert_regs (exp, class1, 0))
1350: hash = HASH (exp, mode);
1351: new = insert (exp, class1, hash, mode);
1352: new->in_memory = hash_arg_in_memory;
1353: new->in_struct = hash_arg_in_struct;
1354: }
1355: }
1356: }
1357:
1358: /* Remove from the hash table, or mark as invalid,
1359: all expressions whose values could be altered by storing in X.
1360: X is a register, a subreg, or a memory reference with nonvarying address
1361: (because, when a memory reference with a varying address is stored in,
1362: all memory references are removed by invalidate_memory
1363: so specific invalidation is superfluous).
1364:
1365: A nonvarying address may be just a register or just
1366: a symbol reference, or it may be either of those plus
1367: a numeric offset. */
1368:
1369: static void
1370: invalidate (x)
1371: rtx x;
1372: {
1373: register int i;
1374: register struct table_elt *p;
1375: register rtx base;
1376: register int start, end;
1377:
1378: /* If X is a register, dependencies on its contents
1379: are recorded through the qty number mechanism.
1380: Just change the qty number of the register,
1381: mark it as invalid for expressions that refer to it,
1382: and remove it itself. */
1383:
1384: if (GET_CODE (x) == REG)
1385: {
1386: register int regno = REGNO (x);
1387: register int hash = HASH (x, GET_MODE (x));
1388:
1389: /* Remove REGNO from any quantity list it might be on and indicate
1390: that it's value might have changed. If it is a pseudo, remove its
1391: entry from the hash table.
1392:
1393: For a hard register, we do the first two actions above for any
1394: additional hard registers corresponding to X. Then, if any of these
1395: registers are in the table, we must remove any REG entries that
1396: overlap these registers. */
1397:
1398: delete_reg_equiv (regno);
1399: reg_tick[regno]++;
1400:
1401: if (regno >= FIRST_PSEUDO_REGISTER)
1402: remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash);
1403: else
1404: {
1405: int in_table = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1406: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1407: int tregno, tendregno;
1408: register struct table_elt *p, *next;
1409:
1410: CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1411:
1412: for (i = regno + 1; i < endregno; i++)
1413: {
1414: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1415: CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1416: delete_reg_equiv (i);
1417: reg_tick[i]++;
1418: }
1419:
1420: if (in_table)
1421: for (hash = 0; hash < NBUCKETS; hash++)
1422: for (p = table[hash]; p; p = next)
1423: {
1424: next = p->next_same_hash;
1425:
1426: if (GET_CODE (p->exp) != REG
1427: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1428: continue;
1429:
1430: tregno = REGNO (p->exp);
1431: tendregno
1432: = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1433: if (tendregno > regno && tregno < endregno)
1434: remove_from_table (p, hash);
1435: }
1436: }
1437:
1438: return;
1439: }
1440:
1441: if (GET_CODE (x) == SUBREG)
1442: {
1443: if (GET_CODE (SUBREG_REG (x)) != REG)
1444: abort ();
1445: invalidate (SUBREG_REG (x));
1446: return;
1447: }
1448:
1449: /* X is not a register; it must be a memory reference with
1450: a nonvarying address. Remove all hash table elements
1451: that refer to overlapping pieces of memory. */
1452:
1453: if (GET_CODE (x) != MEM)
1454: abort ();
1455: base = XEXP (x, 0);
1456: start = 0;
1457:
1458: /* Registers with nonvarying addresses usually have constant equivalents;
1459: but the frame pointer register is also possible. */
1460: if (GET_CODE (base) == REG
1461: && REGNO_QTY_VALID_P (REGNO (base))
1462: && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
1463: && qty_const[reg_qty[REGNO (base)]] != 0)
1464: base = qty_const[reg_qty[REGNO (base)]];
1465: else if (GET_CODE (base) == PLUS
1466: && GET_CODE (XEXP (base, 1)) == CONST_INT
1467: && GET_CODE (XEXP (base, 0)) == REG
1468: && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
1469: && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
1470: == GET_MODE (XEXP (base, 0)))
1471: && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
1472: {
1473: start = INTVAL (XEXP (base, 1));
1474: base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
1475: }
1476:
1477: if (GET_CODE (base) == CONST)
1478: base = XEXP (base, 0);
1479: if (GET_CODE (base) == PLUS
1480: && GET_CODE (XEXP (base, 1)) == CONST_INT)
1481: {
1482: start += INTVAL (XEXP (base, 1));
1483: base = XEXP (base, 0);
1484: }
1485:
1486: end = start + GET_MODE_SIZE (GET_MODE (x));
1487: for (i = 0; i < NBUCKETS; i++)
1488: {
1489: register struct table_elt *next;
1490: for (p = table[i]; p; p = next)
1491: {
1492: next = p->next_same_hash;
1493: if (refers_to_mem_p (p->exp, base, start, end))
1494: remove_from_table (p, i);
1495: }
1496: }
1497: }
1498:
1499: /* Remove all expressions that refer to register REGNO,
1500: since they are already invalid, and we are about to
1501: mark that register valid again and don't want the old
1502: expressions to reappear as valid. */
1503:
1504: static void
1505: remove_invalid_refs (regno)
1506: int regno;
1507: {
1508: register int i;
1509: register struct table_elt *p, *next;
1510:
1511: for (i = 0; i < NBUCKETS; i++)
1512: for (p = table[i]; p; p = next)
1513: {
1514: next = p->next_same_hash;
1515: if (GET_CODE (p->exp) != REG
1516: && refers_to_regno_p (regno, regno + 1, p->exp, 0))
1517: remove_from_table (p, i);
1518: }
1519: }
1520:
1521: /* Recompute the hash codes of any valid entries in the hash table that
1522: reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1523:
1524: This is called when we make a jump equivalence. */
1525:
1526: static void
1527: rehash_using_reg (x)
1528: rtx x;
1529: {
1530: int i;
1531: struct table_elt *p, *next;
1532: int hash;
1533:
1534: if (GET_CODE (x) == SUBREG)
1535: x = SUBREG_REG (x);
1536:
1537: /* If X is not a register or if the register is known not to be in any
1538: valid entries in the table, we have no work to do. */
1539:
1540: if (GET_CODE (x) != REG
1541: || reg_in_table[REGNO (x)] < 0
1542: || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1543: return;
1544:
1545: /* Scan all hash chains looking for valid entries that mention X.
1546: If we find one and it is in the wrong hash chain, move it. We can skip
1547: objects that are registers, since they are handled specially. */
1548:
1549: for (i = 0; i < NBUCKETS; i++)
1550: for (p = table[i]; p; p = next)
1551: {
1552: next = p->next_same_hash;
1553: if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1.1.1.2 root 1554: && exp_equiv_p (p->exp, p->exp, 1, 0)
1.1 root 1555: && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1556: {
1557: if (p->next_same_hash)
1558: p->next_same_hash->prev_same_hash = p->prev_same_hash;
1559:
1560: if (p->prev_same_hash)
1561: p->prev_same_hash->next_same_hash = p->next_same_hash;
1562: else
1563: table[i] = p->next_same_hash;
1564:
1565: p->next_same_hash = table[hash];
1566: p->prev_same_hash = 0;
1567: if (table[hash])
1568: table[hash]->prev_same_hash = p;
1569: table[hash] = p;
1570: }
1571: }
1572: }
1573:
1574: /* Remove from the hash table all expressions that reference memory,
1575: or some of them as specified by *WRITES. */
1576:
1577: static void
1578: invalidate_memory (writes)
1579: struct write_data *writes;
1580: {
1581: register int i;
1582: register struct table_elt *p, *next;
1583: int all = writes->all;
1584: int nonscalar = writes->nonscalar;
1585:
1586: for (i = 0; i < NBUCKETS; i++)
1587: for (p = table[i]; p; p = next)
1588: {
1589: next = p->next_same_hash;
1590: if (p->in_memory
1591: && (all
1592: || (nonscalar && p->in_struct)
1593: || cse_rtx_addr_varies_p (p->exp)))
1594: remove_from_table (p, i);
1595: }
1596: }
1597:
1598: /* Remove from the hash table any expression that is a call-clobbered
1599: register. Also update their TICK values. */
1600:
1601: static void
1602: invalidate_for_call ()
1603: {
1604: int regno, endregno;
1605: int i;
1606: int hash;
1607: struct table_elt *p, *next;
1608: int in_table = 0;
1609:
1610: /* Go through all the hard registers. For each that is clobbered in
1611: a CALL_INSN, remove the register from quantity chains and update
1612: reg_tick if defined. Also see if any of these registers is currently
1613: in the table. */
1614:
1615: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1616: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1617: {
1618: delete_reg_equiv (regno);
1619: if (reg_tick[regno] >= 0)
1620: reg_tick[regno]++;
1621:
1622: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1623: }
1624:
1625: /* In the case where we have no call-clobbered hard registers in the
1626: table, we are done. Otherwise, scan the table and remove any
1627: entry that overlaps a call-clobbered register. */
1628:
1629: if (in_table)
1630: for (hash = 0; hash < NBUCKETS; hash++)
1631: for (p = table[hash]; p; p = next)
1632: {
1633: next = p->next_same_hash;
1634:
1635: if (GET_CODE (p->exp) != REG
1636: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1637: continue;
1638:
1639: regno = REGNO (p->exp);
1640: endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1641:
1642: for (i = regno; i < endregno; i++)
1643: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1644: {
1645: remove_from_table (p, hash);
1646: break;
1647: }
1648: }
1649: }
1650:
1651: /* Given an expression X of type CONST,
1652: and ELT which is its table entry (or 0 if it
1653: is not in the hash table),
1654: return an alternate expression for X as a register plus integer.
1655: If none can be found, return 0. */
1656:
1657: static rtx
1658: use_related_value (x, elt)
1659: rtx x;
1660: struct table_elt *elt;
1661: {
1662: register struct table_elt *relt = 0;
1663: register struct table_elt *p, *q;
1664: int offset;
1665:
1666: /* First, is there anything related known?
1667: If we have a table element, we can tell from that.
1668: Otherwise, must look it up. */
1669:
1670: if (elt != 0 && elt->related_value != 0)
1671: relt = elt;
1672: else if (elt == 0 && GET_CODE (x) == CONST)
1673: {
1674: rtx subexp = get_related_value (x);
1675: if (subexp != 0)
1676: relt = lookup (subexp,
1677: safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1678: GET_MODE (subexp));
1679: }
1680:
1681: if (relt == 0)
1682: return 0;
1683:
1684: /* Search all related table entries for one that has an
1685: equivalent register. */
1686:
1687: p = relt;
1688: while (1)
1689: {
1690: /* This loop is strange in that it is executed in two different cases.
1691: The first is when X is already in the table. Then it is searching
1692: the RELATED_VALUE list of X's class (RELT). The second case is when
1693: X is not in the table. Then RELT points to a class for the related
1694: value.
1695:
1696: Ensure that, whatever case we are in, that we ignore classes that have
1697: the same value as X. */
1698:
1699: if (rtx_equal_p (x, p->exp))
1700: q = 0;
1701: else
1702: for (q = p->first_same_value; q; q = q->next_same_value)
1703: if (GET_CODE (q->exp) == REG)
1704: break;
1705:
1706: if (q)
1707: break;
1708:
1709: p = p->related_value;
1710:
1711: /* We went all the way around, so there is nothing to be found.
1712: Alternatively, perhaps RELT was in the table for some other reason
1713: and it has no related values recorded. */
1714: if (p == relt || p == 0)
1715: break;
1716: }
1717:
1718: if (q == 0)
1719: return 0;
1720:
1721: offset = (get_integer_term (x) - get_integer_term (p->exp));
1722: /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1723: return plus_constant (q->exp, offset);
1724: }
1725:
1726: /* Hash an rtx. We are careful to make sure the value is never negative.
1727: Equivalent registers hash identically.
1728: MODE is used in hashing for CONST_INTs only;
1729: otherwise the mode of X is used.
1730:
1731: Store 1 in do_not_record if any subexpression is volatile.
1732:
1733: Store 1 in hash_arg_in_memory if X contains a MEM rtx
1734: which does not have the RTX_UNCHANGING_P bit set.
1735: In this case, also store 1 in hash_arg_in_struct
1736: if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1737:
1738: Note that cse_insn knows that the hash code of a MEM expression
1739: is just (int) MEM plus the hash code of the address. */
1740:
1741: static int
1742: canon_hash (x, mode)
1743: rtx x;
1744: enum machine_mode mode;
1745: {
1746: register int i, j;
1747: register int hash = 0;
1748: register enum rtx_code code;
1749: register char *fmt;
1750:
1751: /* repeat is used to turn tail-recursion into iteration. */
1752: repeat:
1753: if (x == 0)
1754: return hash;
1755:
1756: code = GET_CODE (x);
1757: switch (code)
1758: {
1759: case REG:
1760: {
1761: register int regno = REGNO (x);
1762:
1763: /* On some machines, we can't record any non-fixed hard register,
1764: because extending its life will cause reload problems. We
1765: consider ap, fp, and sp to be fixed for this purpose.
1766: On all machines, we can't record any global registers. */
1767:
1768: if (regno < FIRST_PSEUDO_REGISTER
1769: && (global_regs[regno]
1770: #ifdef SMALL_REGISTER_CLASSES
1771: || (! fixed_regs[regno]
1772: && regno != FRAME_POINTER_REGNUM
1773: && regno != ARG_POINTER_REGNUM
1774: && regno != STACK_POINTER_REGNUM)
1775: #endif
1776: ))
1777: {
1778: do_not_record = 1;
1779: return 0;
1780: }
1781: return hash + ((int) REG << 7) + reg_qty[regno];
1782: }
1783:
1784: case CONST_INT:
1785: hash += ((int) mode + ((int) CONST_INT << 7)
1786: + INTVAL (x) + (INTVAL (x) >> HASHBITS));
1787: return ((1 << HASHBITS) - 1) & hash;
1788:
1789: case CONST_DOUBLE:
1790: /* This is like the general case, except that it only counts
1791: the integers representing the constant. */
1792: hash += (int) code + (int) GET_MODE (x);
1793: {
1794: int i;
1795: for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1796: {
1797: int tem = XINT (x, i);
1798: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1799: }
1800: }
1801: return hash;
1802:
1803: /* Assume there is only one rtx object for any given label. */
1804: case LABEL_REF:
1805: /* Use `and' to ensure a positive number. */
1806: return (hash + ((int) LABEL_REF << 7)
1807: + ((int) XEXP (x, 0) & ((1 << HASHBITS) - 1)));
1808:
1809: case SYMBOL_REF:
1810: return (hash + ((int) SYMBOL_REF << 7)
1811: + ((int) XEXP (x, 0) & ((1 << HASHBITS) - 1)));
1812:
1813: case MEM:
1814: if (MEM_VOLATILE_P (x))
1815: {
1816: do_not_record = 1;
1817: return 0;
1818: }
1819: if (! RTX_UNCHANGING_P (x))
1820: {
1821: hash_arg_in_memory = 1;
1822: if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1823: }
1824: /* Now that we have already found this special case,
1825: might as well speed it up as much as possible. */
1826: hash += (int) MEM;
1827: x = XEXP (x, 0);
1828: goto repeat;
1829:
1830: case PRE_DEC:
1831: case PRE_INC:
1832: case POST_DEC:
1833: case POST_INC:
1834: case PC:
1835: case CC0:
1836: case CALL:
1837: case UNSPEC_VOLATILE:
1838: do_not_record = 1;
1839: return 0;
1840:
1841: case ASM_OPERANDS:
1842: if (MEM_VOLATILE_P (x))
1843: {
1844: do_not_record = 1;
1845: return 0;
1846: }
1847: }
1848:
1849: i = GET_RTX_LENGTH (code) - 1;
1850: hash += (int) code + (int) GET_MODE (x);
1851: fmt = GET_RTX_FORMAT (code);
1852: for (; i >= 0; i--)
1853: {
1854: if (fmt[i] == 'e')
1855: {
1856: rtx tem = XEXP (x, i);
1857: rtx tem1;
1858:
1859: /* If the operand is a REG that is equivalent to a constant, hash
1860: as if we were hashing the constant, since we will be comparing
1861: that way. */
1862: if (tem != 0 && GET_CODE (tem) == REG
1863: && REGNO_QTY_VALID_P (REGNO (tem))
1864: && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem)
1865: && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0
1866: && CONSTANT_P (tem1))
1867: tem = tem1;
1868:
1869: /* If we are about to do the last recursive call
1870: needed at this level, change it into iteration.
1871: This function is called enough to be worth it. */
1872: if (i == 0)
1873: {
1874: x = tem;
1875: goto repeat;
1876: }
1877: hash += canon_hash (tem, 0);
1878: }
1879: else if (fmt[i] == 'E')
1880: for (j = 0; j < XVECLEN (x, i); j++)
1881: hash += canon_hash (XVECEXP (x, i, j), 0);
1882: else if (fmt[i] == 's')
1883: {
1884: register char *p = XSTR (x, i);
1885: if (p)
1886: while (*p)
1887: {
1888: register int tem = *p++;
1889: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1890: }
1891: }
1892: else if (fmt[i] == 'i')
1893: {
1894: register int tem = XINT (x, i);
1895: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1896: }
1897: else
1898: abort ();
1899: }
1900: return hash;
1901: }
1902:
1903: /* Like canon_hash but with no side effects. */
1904:
1905: static int
1906: safe_hash (x, mode)
1907: rtx x;
1908: enum machine_mode mode;
1909: {
1910: int save_do_not_record = do_not_record;
1911: int save_hash_arg_in_memory = hash_arg_in_memory;
1912: int save_hash_arg_in_struct = hash_arg_in_struct;
1913: int hash = canon_hash (x, mode);
1914: hash_arg_in_memory = save_hash_arg_in_memory;
1915: hash_arg_in_struct = save_hash_arg_in_struct;
1916: do_not_record = save_do_not_record;
1917: return hash;
1918: }
1919:
1920: /* Return 1 iff X and Y would canonicalize into the same thing,
1921: without actually constructing the canonicalization of either one.
1922: If VALIDATE is nonzero,
1923: we assume X is an expression being processed from the rtl
1924: and Y was found in the hash table. We check register refs
1925: in Y for being marked as valid.
1926:
1927: If EQUAL_VALUES is nonzero, we allow a register to match a constant value
1928: that is known to be in the register. Ordinarily, we don't allow them
1929: to match, because letting them match would cause unpredictable results
1930: in all the places that search a hash table chain for an equivalent
1931: for a given value. A possible equivalent that has different structure
1932: has its hash code computed from different data. Whether the hash code
1933: is the same as that of the the given value is pure luck. */
1934:
1935: static int
1936: exp_equiv_p (x, y, validate, equal_values)
1937: rtx x, y;
1938: int validate;
1939: int equal_values;
1940: {
1941: register int i;
1942: register enum rtx_code code;
1943: register char *fmt;
1944:
1945: /* Note: it is incorrect to assume an expression is equivalent to itself
1946: if VALIDATE is nonzero. */
1947: if (x == y && !validate)
1948: return 1;
1949: if (x == 0 || y == 0)
1950: return x == y;
1951:
1952: code = GET_CODE (x);
1953: if (code != GET_CODE (y))
1954: {
1955: if (!equal_values)
1956: return 0;
1957:
1958: /* If X is a constant and Y is a register or vice versa, they may be
1959: equivalent. We only have to validate if Y is a register. */
1960: if (CONSTANT_P (x) && GET_CODE (y) == REG
1961: && REGNO_QTY_VALID_P (REGNO (y))
1962: && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
1963: && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
1964: && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
1965: return 1;
1966:
1967: if (CONSTANT_P (y) && code == REG
1968: && REGNO_QTY_VALID_P (REGNO (x))
1969: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
1970: && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
1971: return 1;
1972:
1973: return 0;
1974: }
1975:
1976: /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
1977: if (GET_MODE (x) != GET_MODE (y))
1978: return 0;
1979:
1980: switch (code)
1981: {
1982: case PC:
1983: case CC0:
1984: return x == y;
1985:
1986: case CONST_INT:
1987: return XINT (x, 0) == XINT (y, 0);
1988:
1989: case LABEL_REF:
1990: case SYMBOL_REF:
1991: return XEXP (x, 0) == XEXP (y, 0);
1992:
1993: case REG:
1994: {
1995: int regno = REGNO (y);
1996: int endregno
1997: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1998: : HARD_REGNO_NREGS (regno, GET_MODE (y)));
1999: int i;
2000:
2001: /* If the quantities are not the same, the expressions are not
2002: equivalent. If there are and we are not to validate, they
2003: are equivalent. Otherwise, ensure all regs are up-to-date. */
2004:
2005: if (reg_qty[REGNO (x)] != reg_qty[regno])
2006: return 0;
2007:
2008: if (! validate)
2009: return 1;
2010:
2011: for (i = regno; i < endregno; i++)
2012: if (reg_in_table[i] != reg_tick[i])
2013: return 0;
2014:
2015: return 1;
2016: }
2017:
2018: /* For commutative operations, check both orders. */
2019: case PLUS:
2020: case MULT:
2021: case AND:
2022: case IOR:
2023: case XOR:
2024: case NE:
2025: case EQ:
2026: return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2027: && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2028: validate, equal_values))
2029: || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2030: validate, equal_values)
2031: && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2032: validate, equal_values)));
2033: }
2034:
2035: /* Compare the elements. If any pair of corresponding elements
2036: fail to match, return 0 for the whole things. */
2037:
2038: fmt = GET_RTX_FORMAT (code);
2039: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2040: {
2041: if (fmt[i] == 'e')
2042: {
2043: if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2044: return 0;
2045: }
2046: else if (fmt[i] == 'E')
2047: {
2048: int j;
2049: if (XVECLEN (x, i) != XVECLEN (y, i))
2050: return 0;
2051: for (j = 0; j < XVECLEN (x, i); j++)
2052: if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2053: validate, equal_values))
2054: return 0;
2055: }
2056: else if (fmt[i] == 's')
2057: {
2058: if (strcmp (XSTR (x, i), XSTR (y, i)))
2059: return 0;
2060: }
2061: else if (fmt[i] == 'i')
2062: {
2063: if (XINT (x, i) != XINT (y, i))
2064: return 0;
2065: }
2066: else if (fmt[i] != '0')
2067: abort ();
2068: }
2069: return 1;
2070: }
2071:
2072: /* Return 1 iff any subexpression of X matches Y.
2073: Here we do not require that X or Y be valid (for registers referred to)
2074: for being in the hash table. */
2075:
2076: int
2077: refers_to_p (x, y)
2078: rtx x, y;
2079: {
2080: register int i;
2081: register enum rtx_code code;
2082: register char *fmt;
2083:
2084: repeat:
2085: if (x == y)
2086: return 1;
2087: if (x == 0 || y == 0)
2088: return 0;
2089:
2090: code = GET_CODE (x);
2091: /* If X as a whole has the same code as Y, they may match.
2092: If so, return 1. */
2093: if (code == GET_CODE (y))
2094: {
2095: if (exp_equiv_p (x, y, 0, 1))
2096: return 1;
2097: }
2098:
2099: /* X does not match, so try its subexpressions. */
2100:
2101: fmt = GET_RTX_FORMAT (code);
2102: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2103: if (fmt[i] == 'e')
2104: {
2105: if (i == 0)
2106: {
2107: x = XEXP (x, 0);
2108: goto repeat;
2109: }
2110: else
2111: if (refers_to_p (XEXP (x, i), y))
2112: return 1;
2113: }
2114: else if (fmt[i] == 'E')
2115: {
2116: int j;
2117: for (j = 0; j < XVECLEN (x, i); j++)
2118: if (refers_to_p (XVECEXP (x, i, j), y))
2119: return 1;
2120: }
2121:
2122: return 0;
2123: }
2124:
2125: /* Return 1 iff any subexpression of X refers to memory
2126: at an address of BASE plus some offset
2127: such that any of the bytes' offsets fall between START (inclusive)
2128: and END (exclusive).
2129:
2130: The value is undefined if X is a varying address.
2131: This function is not used in such cases.
2132:
2133: When used in the cse pass, `qty_const' is nonzero, and it is used
2134: to treat an address that is a register with a known constant value
2135: as if it were that constant value.
2136: In the loop pass, `qty_const' is zero, so this is not done. */
2137:
2138: int
2139: refers_to_mem_p (x, base, start, end)
2140: rtx x, base;
2141: int start, end;
2142: {
2143: register int i;
2144: register enum rtx_code code;
2145: register char *fmt;
2146:
2147: if (GET_CODE (base) == CONST_INT)
2148: {
2149: start += INTVAL (base);
2150: end += INTVAL (base);
2151: base = const0_rtx;
2152: }
2153:
2154: repeat:
2155: if (x == 0)
2156: return 0;
2157:
2158: code = GET_CODE (x);
2159: if (code == MEM)
2160: {
2161: register rtx addr = XEXP (x, 0); /* Get the address. */
2162: int myend;
2163:
2164: i = 0;
2165: if (GET_CODE (addr) == REG
2166: /* qty_const is 0 when outside the cse pass;
2167: at such times, this info is not available. */
2168: && qty_const != 0
2169: && REGNO_QTY_VALID_P (REGNO (addr))
2170: && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
2171: && qty_const[reg_qty[REGNO (addr)]] != 0)
2172: addr = qty_const[reg_qty[REGNO (addr)]];
2173: else if (GET_CODE (addr) == PLUS
2174: && GET_CODE (XEXP (addr, 1)) == CONST_INT
2175: && GET_CODE (XEXP (addr, 0)) == REG
2176: && qty_const != 0
2177: && REGNO_QTY_VALID_P (REGNO (XEXP (addr, 0)))
2178: && (GET_MODE (XEXP (addr, 0))
2179: == qty_mode[reg_qty[REGNO (XEXP (addr, 0))]])
2180: && qty_const[reg_qty[REGNO (XEXP (addr, 0))]])
2181: {
2182: i = INTVAL (XEXP (addr, 1));
2183: addr = qty_const[reg_qty[REGNO (XEXP (addr, 0))]];
2184: }
2185:
2186: check_addr:
2187: if (GET_CODE (addr) == CONST)
2188: addr = XEXP (addr, 0);
2189:
2190: /* If ADDR is BASE, or BASE plus an integer, put
2191: the integer in I. */
2192: if (GET_CODE (addr) == PLUS
2193: && XEXP (addr, 0) == base
2194: && GET_CODE (XEXP (addr, 1)) == CONST_INT)
2195: i += INTVAL (XEXP (addr, 1));
2196: else if (GET_CODE (addr) == LO_SUM)
2197: {
2198: if (GET_CODE (base) != LO_SUM)
2199: return 1;
2200: /* The REG component of the LO_SUM is known by the
2201: const value in the XEXP part. */
2202: addr = XEXP (addr, 1);
2203: base = XEXP (base, 1);
2204: i = 0;
2205: if (GET_CODE (base) == CONST)
2206: base = XEXP (base, 0);
2207: if (GET_CODE (base) == PLUS
2208: && GET_CODE (XEXP (base, 1)) == CONST_INT)
2209: {
2210: int tem = INTVAL (XEXP (base, 1));
2211: start += tem;
2212: end += tem;
2213: base = XEXP (base, 0);
2214: }
2215: goto check_addr;
2216: }
2217: else if (GET_CODE (base) == LO_SUM)
2218: {
2219: base = XEXP (base, 1);
2220: if (GET_CODE (base) == CONST)
2221: base = XEXP (base, 0);
2222: if (GET_CODE (base) == PLUS
2223: && GET_CODE (XEXP (base, 1)) == CONST_INT)
2224: {
2225: int tem = INTVAL (XEXP (base, 1));
2226: start += tem;
2227: end += tem;
2228: base = XEXP (base, 0);
2229: }
2230: goto check_addr;
2231: }
2232: else if (GET_CODE (addr) == CONST_INT && base == const0_rtx)
2233: i = INTVAL (addr);
2234: else if (addr != base)
2235: return 0;
2236:
2237: myend = i + GET_MODE_SIZE (GET_MODE (x));
2238: return myend > start && i < end;
2239: }
2240:
2241: /* X does not match, so try its subexpressions. */
2242:
2243: fmt = GET_RTX_FORMAT (code);
2244: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2245: if (fmt[i] == 'e')
2246: {
2247: if (i == 0)
2248: {
2249: x = XEXP (x, 0);
2250: goto repeat;
2251: }
2252: else
2253: if (refers_to_mem_p (XEXP (x, i), base, start, end))
2254: return 1;
2255: }
2256: else if (fmt[i] == 'E')
2257: {
2258: int j;
2259: for (j = 0; j < XVECLEN (x, i); j++)
2260: if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end))
2261: return 1;
2262: }
2263:
2264: return 0;
2265: }
2266:
2267: /* Nonzero if X refers to memory at a varying address;
2268: except that a register which has at the moment a known constant value
2269: isn't considered variable. */
2270:
2271: static int
2272: cse_rtx_addr_varies_p (x)
2273: rtx x;
2274: {
2275: /* We need not check for X and the equivalence class being of the same
2276: mode because if X is equivalent to a constant in some mode, it
2277: doesn't vary in any mode. */
2278:
2279: if (GET_CODE (x) == MEM
2280: && GET_CODE (XEXP (x, 0)) == REG
2281: && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2282: && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]]
2283: && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0)
2284: return 0;
2285:
2286: if (GET_CODE (x) == MEM
2287: && GET_CODE (XEXP (x, 0)) == PLUS
2288: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2289: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2290: && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2291: && (GET_MODE (XEXP (XEXP (x, 0), 0))
2292: == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2293: && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2294: return 0;
2295:
2296: return rtx_addr_varies_p (x);
2297: }
2298:
2299: /* Canonicalize an expression:
2300: replace each register reference inside it
2301: with the "oldest" equivalent register.
2302:
2303: If INSN is non-zero and we are replacing a pseudo with a hard register
2304: or vice versa, verify that INSN remains valid after we make our
2305: substitution. */
2306:
2307: static rtx
2308: canon_reg (x, insn)
2309: rtx x;
2310: rtx insn;
2311: {
2312: register int i;
2313: register enum rtx_code code;
2314: register char *fmt;
2315:
2316: if (x == 0)
2317: return x;
2318:
2319: code = GET_CODE (x);
2320: switch (code)
2321: {
2322: case PC:
2323: case CC0:
2324: case CONST:
2325: case CONST_INT:
2326: case CONST_DOUBLE:
2327: case SYMBOL_REF:
2328: case LABEL_REF:
2329: case ADDR_VEC:
2330: case ADDR_DIFF_VEC:
2331: return x;
2332:
2333: case REG:
2334: {
2335: register int first;
2336:
2337: /* Never replace a hard reg, because hard regs can appear
2338: in more than one machine mode, and we must preserve the mode
2339: of each occurrence. Also, some hard regs appear in
2340: MEMs that are shared and mustn't be altered. Don't try to
2341: replace any reg that maps to a reg of class NO_REGS. */
2342: if (REGNO (x) < FIRST_PSEUDO_REGISTER
2343: || ! REGNO_QTY_VALID_P (REGNO (x)))
2344: return x;
2345:
2346: first = qty_first_reg[reg_qty[REGNO (x)]];
2347: return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2348: : REGNO_REG_CLASS (first) == NO_REGS ? x
2349: : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first));
2350: }
2351: }
2352:
2353: fmt = GET_RTX_FORMAT (code);
2354: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2355: {
2356: register int j;
2357:
2358: if (fmt[i] == 'e')
2359: {
2360: rtx new = canon_reg (XEXP (x, i), insn);
2361:
2362: /* If replacing pseudo with hard reg or vice versa, ensure the
1.1.1.3 ! root 2363: insn remains valid. Likewise if the insn has MATCH_DUPs. */
1.1 root 2364: if (new && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
1.1.1.3 ! root 2365: && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
! 2366: != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
! 2367: || (insn != 0 && insn_n_dups[recog_memoized (insn)] > 0)))
1.1 root 2368: validate_change (insn, &XEXP (x, i), new, 0);
2369: else
2370: XEXP (x, i) = new;
2371: }
2372: else if (fmt[i] == 'E')
2373: for (j = 0; j < XVECLEN (x, i); j++)
2374: XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2375: }
2376:
2377: return x;
2378: }
2379:
2380: /* LOC is a location with INSN that is an operand address (the contents of
2381: a MEM). Find the best equivalent address to use that is valid for this
2382: insn.
2383:
2384: On most CISC machines, complicated address modes are costly, and rtx_cost
2385: is a good approximation for that cost. However, most RISC machines have
2386: only a few (usually only one) memory reference formats. If an address is
2387: valid at all, it is often just as cheap as any other address. Hence, for
2388: RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2389: costs of various addresses. For two addresses of equal cost, choose the one
2390: with the highest `rtx_cost' value as that has the potential of eliminating
2391: the most insns. For equal costs, we choose the first in the equivalence
2392: class. Note that we ignore the fact that pseudo registers are cheaper
2393: than hard registers here because we would also prefer the pseudo registers.
2394: */
2395:
2396: void
2397: find_best_addr (insn, loc)
2398: rtx insn;
2399: rtx *loc;
2400: {
2401: struct table_elt *elt, *p;
2402: rtx addr = *loc;
2403: int our_cost;
2404: int found_better = 1;
2405: int save_do_not_record = do_not_record;
2406: int save_hash_arg_in_memory = hash_arg_in_memory;
2407: int save_hash_arg_in_struct = hash_arg_in_struct;
2408: int hash_code;
2409: int addr_volatile;
2410: int regno;
2411:
2412: /* Do not try to replace constant addresses or addresses of local and
2413: argument slots. These MEM expressions are made only once and inserted
2414: in many instructions, as well as being used to control symbol table
2415: output. It is not safe to clobber them.
2416:
2417: There are some uncommon cases where the address is already in a register
2418: for some reason, but we cannot take advantage of that because we have
2419: no easy way to unshare the MEM. In addition, looking up all stack
2420: addresses is costly. */
2421: if ((GET_CODE (addr) == PLUS
2422: && GET_CODE (XEXP (addr, 0)) == REG
2423: && GET_CODE (XEXP (addr, 1)) == CONST_INT
2424: && (regno = REGNO (XEXP (addr, 0)),
2425: regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM))
2426: || (GET_CODE (addr) == REG
2427: && (regno = REGNO (addr),
2428: regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM))
2429: || CONSTANT_ADDRESS_P (addr))
2430: return;
2431:
2432: /* If this address is not simply a register, try to fold it. This will
2433: sometimes simplify the expression. Many simplifications
2434: will not be valid, but some, usually applying the associative rule, will
2435: be valid and produce better code. */
2436: if (GET_CODE (addr) != REG
2437: && validate_change (insn, loc, fold_rtx (addr, insn), 0))
2438: addr = *loc;
2439:
2440: /* If this address is not in the hash table, we can't do any better.
2441: Also, ignore if volatile. */
2442: do_not_record = 0;
2443: hash_code = HASH (addr, Pmode);
2444: addr_volatile = do_not_record;
2445: do_not_record = save_do_not_record;
2446: hash_arg_in_memory = save_hash_arg_in_memory;
2447: hash_arg_in_struct = save_hash_arg_in_struct;
2448:
2449: if (addr_volatile)
2450: return;
2451:
2452: elt = lookup (addr, hash_code, Pmode);
2453:
2454: if (elt == 0)
2455: return;
2456:
2457: #ifndef ADDRESS_COST
2458: our_cost = elt->cost;
2459:
2460: /* Find the lowest cost below ours that works. */
2461: for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2462: if (elt->cost < our_cost
2463: && (GET_CODE (elt->exp) == REG || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2464: && validate_change (insn, loc, canon_reg (copy_rtx (elt->exp), 0), 0))
2465: return;
2466:
2467: #else
2468:
2469: /* We need to find the best (under the criteria documented above) entry in
2470: the class that is valid. We use the `flag' field to indicate choices
2471: that were invalid and iterate until we can't find a better one that
2472: hasn't already been tried. */
2473:
2474: for (p = elt->first_same_value; p; p = p->next_same_value)
2475: p->flag = 0;
2476:
2477: while (found_better)
2478: {
2479: int best_addr_cost = ADDRESS_COST (*loc);
2480: int best_rtx_cost = (elt->cost + 1) >> 1;
2481: struct table_elt *best_elt = elt;
2482:
2483: found_better = 0;
2484: for (p = elt->first_same_value; p; p = p->next_same_value)
2485: if (! p->flag
2486: && (GET_CODE (p->exp) == REG || exp_equiv_p (p->exp, p->exp, 1, 0))
2487: && (ADDRESS_COST (p->exp) < best_addr_cost
2488: || (ADDRESS_COST (p->exp) == best_addr_cost
2489: && (p->cost + 1) >> 1 > best_rtx_cost)))
2490: {
2491: found_better = 1;
2492: best_addr_cost = ADDRESS_COST (p->exp);
2493: best_rtx_cost = (p->cost + 1) >> 1;
2494: best_elt = p;
2495: }
2496:
2497: if (found_better)
2498: {
2499: if (validate_change (insn, loc,
2500: canon_reg (copy_rtx (best_elt->exp), 0), 0))
2501: return;
2502: else
2503: best_elt->flag = 1;
2504: }
2505: }
2506: #endif
2507: }
2508:
2509: /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2510: operation (EQ, NE, GT, etc.), follow it back through the hash table and
2511: what values are being compared.
2512:
2513: *PARG1 and *PARG2 are updated to contain the rtx representing the values
2514: actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2515: was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2516: compared to produce cc0.
2517:
2518: The return value is the comparison operator and is either the code of
2519: A or the code corresponding to the inverse of the comparison. */
2520:
2521: static enum rtx_code
2522: find_comparison_args (code, parg1, parg2)
2523: enum rtx_code code;
2524: rtx *parg1, *parg2;
2525: {
2526: rtx arg1, arg2;
2527:
2528: arg1 = *parg1, arg2 = *parg2;
2529:
2530: /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2531:
2532: while (arg2 == const0_rtx)
2533: {
2534: /* Set non-zero when we find something of interest. */
2535: rtx x = 0;
2536: int reverse_code = 0;
2537: struct table_elt *p = 0;
2538:
2539: /* If arg1 is a COMPARE, extract the comparison arguments from it.
2540: On machines with CC0, this is the only case that can occur, since
2541: fold_rtx will return the COMPARE or item being compared with zero
2542: when given CC0. */
2543:
2544: if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2545: x = arg1;
2546:
2547: /* If ARG1 is a comparison operator and CODE is testing for
2548: STORE_FLAG_VALUE, get the inner arguments. */
2549:
2550: else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2551: {
2552: if (code == NE || (code == LT && STORE_FLAG_VALUE == -1))
2553: x = arg1;
2554: else if (code == EQ || (code == GE && STORE_FLAG_VALUE == -1))
2555: x = arg1, reverse_code = 1;
2556: }
2557:
2558: /* ??? We could also check for
2559:
2560: (ne (and (eq (...) (const_int 1))) (const_int 0))
2561:
2562: and related forms, but let's wait until we see them occurring. */
2563:
2564: if (x == 0)
2565: /* Look up ARG1 in the hash table and see if it has an equivalence
2566: that lets us see what is being compared. */
2567: p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2568: GET_MODE (arg1));
2569: if (p) p = p->first_same_value;
2570:
2571: for (; p; p = p->next_same_value)
2572: {
2573: enum machine_mode inner_mode = GET_MODE (p->exp);
2574:
2575: /* If the entry isn't valid, skip it. */
2576: if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2577: continue;
2578:
2579: if (GET_CODE (p->exp) == COMPARE
2580: /* Another possibility is that this machine has a compare insn
2581: that includes the comparison code. In that case, ARG1 would
2582: be equivalent to a comparison operation that would set ARG1 to
2583: either STORE_FLAG_VALUE or zero. If this is an NE operation,
2584: ORIG_CODE is the actual comparison being done; if it is an EQ,
2585: we must reverse ORIG_CODE. On machine with a negative value
2586: for STORE_FLAG_VALUE, also look at LT and GE operations. */
2587: || ((code == NE
2588: || (code == LT
2589: && inner_mode != VOIDmode
2590: && GET_MODE_BITSIZE (inner_mode) <= HOST_BITS_PER_INT
2591: && (STORE_FLAG_VALUE
2592: & (1 << (GET_MODE_BITSIZE (inner_mode) - 1)))))
2593: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2594: {
2595: x = p->exp;
2596: break;
2597: }
2598: else if ((code == EQ
2599: || (code == GE
2600: && inner_mode != VOIDmode
2601: && GET_MODE_BITSIZE (inner_mode) <= HOST_BITS_PER_INT
2602: && (STORE_FLAG_VALUE
2603: & (1 << (GET_MODE_BITSIZE (inner_mode) - 1)))))
2604: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2605: {
2606: reverse_code = 1;
2607: x = p->exp;
2608: break;
2609: }
2610:
2611: /* If this is fp + constant, the equivalent is a better operand since
2612: it may let us predict the value of the comparison. */
2613: else if (NONZERO_BASE_PLUS_P (p->exp))
2614: {
2615: arg1 = p->exp;
2616: continue;
2617: }
2618: }
2619:
2620: /* If we didn't find a useful equivalence for ARG1, we are done.
2621: Otherwise, set up for the next iteration. */
2622: if (x == 0)
2623: break;
2624:
2625: arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2626: if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2627: code = GET_CODE (x);
2628:
2629: if (reverse_code)
2630: code = reverse_condition (code);
2631: }
2632:
2633: /* Return our results. */
2634: *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2635:
2636: return code;
2637: }
2638:
2639: /* Try to simplify a unary operation CODE whose output mode is to be
2640: MODE with input operand OP whose mode was originally OP_MODE.
2641: Return zero if no simplification can be made. */
2642:
2643: rtx
2644: simplify_unary_operation (code, mode, op, op_mode)
2645: enum rtx_code code;
2646: enum machine_mode mode;
2647: rtx op;
2648: enum machine_mode op_mode;
2649: {
2650: register int width = GET_MODE_BITSIZE (mode);
2651:
2652: /* The order of these tests is critical so that, for example, we don't
2653: check the wrong mode (input vs. output) for a conversion operation,
2654: such as FIX. At some point, this should be simplified. */
2655:
2656: #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2657: if (code == FLOAT && GET_CODE (op) == CONST_INT)
2658: {
2659: REAL_VALUE_TYPE d;
2660:
2661: #ifdef REAL_ARITHMETIC
2662: REAL_VALUE_FROM_INT (d, INTVAL (op), INTVAL (op) < 0 ? ~0 : 0);
2663: #else
2664: d = (double) INTVAL (op);
2665: #endif
2666: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2667: }
2668: else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_INT)
2669: {
2670: REAL_VALUE_TYPE d;
2671:
2672: #ifdef REAL_ARITHMETIC
2673: REAL_VALUE_FROM_INT (d, INTVAL (op), 0);
2674: #else
2675: d = (double) (unsigned int) INTVAL (op);
2676: #endif
2677: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2678: }
2679:
2680: else if (code == FLOAT && GET_CODE (op) == CONST_DOUBLE
2681: && GET_MODE (op) == VOIDmode)
2682: {
2683: REAL_VALUE_TYPE d;
2684:
2685: #ifdef REAL_ARITHMETIC
2686: REAL_VALUE_FROM_INT (d, CONST_DOUBLE_LOW (op), CONST_DOUBLE_HIGH (op));
2687: #else
2688: if (CONST_DOUBLE_HIGH (op) < 0)
2689: {
2690: d = (double) (~ CONST_DOUBLE_HIGH (op));
2691: d *= ((double) (1 << (HOST_BITS_PER_INT / 2))
2692: * (double) (1 << (HOST_BITS_PER_INT / 2)));
2693: d += (double) (unsigned) (~ CONST_DOUBLE_LOW (op));
2694: d = (- d - 1.0);
2695: }
2696: else
2697: {
2698: d = (double) CONST_DOUBLE_HIGH (op);
2699: d *= ((double) (1 << (HOST_BITS_PER_INT / 2))
2700: * (double) (1 << (HOST_BITS_PER_INT / 2)));
2701: d += (double) (unsigned) CONST_DOUBLE_LOW (op);
2702: }
2703: #endif /* REAL_ARITHMETIC */
2704: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2705: }
2706: else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_DOUBLE
2707: && GET_MODE (op) == VOIDmode)
2708: {
2709: REAL_VALUE_TYPE d;
2710:
2711: #ifdef REAL_ARITHMETIC
2712: REAL_VALUE_FROM_UNSIGNED_INT (d, CONST_DOUBLE_LOW (op),
2713: CONST_DOUBLE_HIGH (op));
2714: #else
2715: d = (double) CONST_DOUBLE_HIGH (op);
2716: d *= ((double) (1 << (HOST_BITS_PER_INT / 2))
2717: * (double) (1 << (HOST_BITS_PER_INT / 2)));
2718: d += (double) (unsigned) CONST_DOUBLE_LOW (op);
2719: #endif /* REAL_ARITHMETIC */
2720: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2721: }
2722: #endif
2723:
2724: else if (GET_CODE (op) == CONST_INT
2725: && width <= HOST_BITS_PER_INT && width > 0)
2726: {
2727: register int arg0 = INTVAL (op);
2728: register int val;
2729:
2730: switch (code)
2731: {
2732: case NOT:
2733: val = ~ arg0;
2734: break;
2735:
2736: case NEG:
2737: val = - arg0;
2738: break;
2739:
2740: case ABS:
2741: val = (arg0 >= 0 ? arg0 : - arg0);
2742: break;
2743:
2744: case FFS:
2745: /* Don't use ffs here. Instead, get low order bit and then its
2746: number. If arg0 is zero, this will return 0, as desired. */
2747: arg0 &= GET_MODE_MASK (mode);
2748: val = exact_log2 (arg0 & (- arg0)) + 1;
2749: break;
2750:
2751: case TRUNCATE:
2752: val = arg0;
2753: break;
2754:
2755: case ZERO_EXTEND:
2756: if (op_mode == VOIDmode)
2757: op_mode = mode;
2758: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_INT)
2759: val = arg0;
2760: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_INT)
2761: val = arg0 & ~((-1) << GET_MODE_BITSIZE (op_mode));
2762: else
2763: return 0;
2764: break;
2765:
2766: case SIGN_EXTEND:
2767: if (op_mode == VOIDmode)
2768: op_mode = mode;
2769: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_INT)
2770: val = arg0;
2771: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_INT)
2772: {
2773: val = arg0 & ~((-1) << GET_MODE_BITSIZE (op_mode));
2774: if (val & (1 << (GET_MODE_BITSIZE (op_mode) - 1)))
2775: val -= 1 << GET_MODE_BITSIZE (op_mode);
2776: }
2777: else
2778: return 0;
2779: break;
2780:
1.1.1.2 root 2781: case SQRT:
2782: return 0;
2783:
1.1 root 2784: default:
2785: abort ();
2786: }
2787:
2788: /* Clear the bits that don't belong in our mode,
2789: unless they and our sign bit are all one.
2790: So we get either a reasonable negative value or a reasonable
2791: unsigned value for this mode. */
2792: if (width < HOST_BITS_PER_INT
2793: && ((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
2794: val &= (1 << width) - 1;
2795:
2796: return gen_rtx (CONST_INT, VOIDmode, val);
2797: }
2798:
2799: /* We can do some operations on integer CONST_DOUBLEs. Also allow
2800: for a DImode operation on a CONST_INT. */
2801: else if (GET_MODE (op) == VOIDmode
2802: && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
2803: {
2804: int l1, h1, lv, hv;
2805:
2806: if (GET_CODE (op) == CONST_DOUBLE)
2807: l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
2808: else
2809: l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
2810:
2811: switch (code)
2812: {
2813: case NOT:
2814: lv = ~ l1;
2815: hv = ~ h1;
2816: break;
2817:
2818: case NEG:
2819: neg_double (l1, h1, &lv, &hv);
2820: break;
2821:
2822: case ABS:
2823: if (h1 < 0)
2824: neg_double (l1, h1, &lv, &hv);
2825: else
2826: lv = l1, hv = h1;
2827: break;
2828:
2829: case FFS:
2830: hv = 0;
2831: if (l1 == 0)
2832: lv = HOST_BITS_PER_INT + exact_log2 (h1 & (-h1)) + 1;
2833: else
2834: lv = exact_log2 (l1 & (-l1)) + 1;
2835: break;
2836:
2837: case TRUNCATE:
2838: if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_INT)
2839: return gen_rtx (CONST_INT, VOIDmode, l1 & GET_MODE_MASK (mode));
2840: else
2841: return 0;
2842: break;
2843:
1.1.1.2 root 2844: case SQRT:
2845: return 0;
2846:
1.1 root 2847: default:
2848: return 0;
2849: }
2850:
2851: return immed_double_const (lv, hv, mode);
2852: }
2853:
2854: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2855: else if (GET_CODE (op) == CONST_DOUBLE
2856: && GET_MODE_CLASS (mode) == MODE_FLOAT)
2857: {
2858: REAL_VALUE_TYPE d;
2859: jmp_buf handler;
2860: rtx x;
2861:
2862: if (setjmp (handler))
2863: /* There used to be a warning here, but that is inadvisable.
2864: People may want to cause traps, and the natural way
2865: to do it should not get a warning. */
2866: return 0;
2867:
2868: set_float_handler (handler);
2869:
2870: REAL_VALUE_FROM_CONST_DOUBLE (d, op);
2871:
2872: switch (code)
2873: {
2874: case NEG:
2875: d = REAL_VALUE_NEGATE (d);
2876: break;
2877:
2878: case ABS:
1.1.1.3 ! root 2879: if (REAL_VALUE_NEGATIVE (d))
1.1 root 2880: d = REAL_VALUE_NEGATE (d);
2881: break;
2882:
2883: case FLOAT_TRUNCATE:
2884: d = (double) REAL_VALUE_TRUNCATE (mode, d);
2885: break;
2886:
2887: case FLOAT_EXTEND:
2888: /* All this does is change the mode. */
2889: break;
2890:
2891: case FIX:
2892: d = (double) REAL_VALUE_FIX_TRUNCATE (d);
2893: break;
2894:
2895: case UNSIGNED_FIX:
2896: d = (double) REAL_VALUE_UNSIGNED_FIX_TRUNCATE (d);
2897: break;
2898:
1.1.1.2 root 2899: case SQRT:
2900: return 0;
2901:
1.1 root 2902: default:
2903: abort ();
2904: }
2905:
2906: x = immed_real_const_1 (d, mode);
2907: set_float_handler (0);
2908: return x;
2909: }
2910: else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE_CLASS (mode) == MODE_INT
2911: && width <= HOST_BITS_PER_INT && width > 0)
2912: {
2913: REAL_VALUE_TYPE d;
2914: jmp_buf handler;
2915: rtx x;
2916: int val;
2917:
2918: if (setjmp (handler))
2919: return 0;
2920:
2921: set_float_handler (handler);
2922:
2923: REAL_VALUE_FROM_CONST_DOUBLE (d, op);
2924:
2925: switch (code)
2926: {
2927: case FIX:
2928: val = REAL_VALUE_FIX (d);
2929: break;
2930:
2931: case UNSIGNED_FIX:
2932: val = REAL_VALUE_UNSIGNED_FIX (d);
2933: break;
2934:
2935: default:
2936: abort ();
2937: }
2938:
2939: set_float_handler (0);
2940:
2941: /* Clear the bits that don't belong in our mode,
2942: unless they and our sign bit are all one.
2943: So we get either a reasonable negative value or a reasonable
2944: unsigned value for this mode. */
2945: if (width < HOST_BITS_PER_INT
2946: && ((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
2947: val &= (1 << width) - 1;
2948:
2949: return gen_rtx (CONST_INT, VOIDmode, val);
2950: }
2951: #endif
1.1.1.3 ! root 2952: /* This was formerly used only for non-IEEE float.
! 2953: [email protected] says it is safe for IEEE also. */
! 2954: else
1.1 root 2955: {
2956: /* There are some simplifications we can do even if the operands
1.1.1.3 ! root 2957: aren't constant. */
1.1 root 2958: switch (code)
2959: {
2960: case NEG:
2961: case NOT:
2962: /* (not (not X)) == X, similarly for NEG. */
2963: if (GET_CODE (op) == code)
2964: return XEXP (op, 0);
2965: break;
2966:
2967: case SIGN_EXTEND:
2968: /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
2969: becomes just the MINUS if its mode is MODE. This allows
2970: folding switch statements on machines using casesi (such as
2971: the Vax). */
2972: if (GET_CODE (op) == TRUNCATE
2973: && GET_MODE (XEXP (op, 0)) == mode
2974: && GET_CODE (XEXP (op, 0)) == MINUS
2975: && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
2976: && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
2977: return XEXP (op, 0);
2978: break;
2979: }
2980:
2981: return 0;
2982: }
2983: }
2984:
2985: /* Simplify a binary operation CODE with result mode MODE, operating on OP0
2986: and OP1. Return 0 if no simplification is possible.
2987:
2988: Don't use this for relational operations such as EQ or LT.
2989: Use simplify_relational_operation instead. */
2990:
2991: rtx
2992: simplify_binary_operation (code, mode, op0, op1)
2993: enum rtx_code code;
2994: enum machine_mode mode;
2995: rtx op0, op1;
2996: {
2997: register int arg0, arg1, arg0s, arg1s;
2998: int val;
2999: int width = GET_MODE_BITSIZE (mode);
3000:
3001: /* Relational operations don't work here. We must know the mode
3002: of the operands in order to do the comparison correctly.
3003: Assuming a full word can give incorrect results.
3004: Consider comparing 128 with -128 in QImode. */
3005:
3006: if (GET_RTX_CLASS (code) == '<')
3007: abort ();
3008:
3009: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3010: if (GET_MODE_CLASS (mode) == MODE_FLOAT
3011: && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3012: && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3013: {
3014: REAL_VALUE_TYPE f0, f1, value;
3015: jmp_buf handler;
3016:
3017: if (setjmp (handler))
3018: return 0;
3019:
3020: set_float_handler (handler);
3021:
3022: REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3023: REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
3024: f0 = REAL_VALUE_TRUNCATE (mode, f0);
3025: f1 = REAL_VALUE_TRUNCATE (mode, f1);
3026:
3027: #ifdef REAL_ARITHMETIC
3028: REAL_ARITHMETIC (value, code, f0, f1);
3029: #else
3030: switch (code)
3031: {
3032: case PLUS:
3033: value = f0 + f1;
3034: break;
3035: case MINUS:
3036: value = f0 - f1;
3037: break;
3038: case MULT:
3039: value = f0 * f1;
3040: break;
3041: case DIV:
3042: #ifndef REAL_INFINITY
3043: if (f1 == 0)
3044: abort ();
3045: #endif
3046: value = f0 / f1;
3047: break;
3048: case SMIN:
3049: value = MIN (f0, f1);
3050: break;
3051: case SMAX:
3052: value = MAX (f0, f1);
3053: break;
3054: default:
3055: abort ();
3056: }
3057: #endif
3058:
3059: set_float_handler (0);
3060: value = REAL_VALUE_TRUNCATE (mode, value);
3061: return immed_real_const_1 (value, mode);
3062: }
3063:
3064: /* We can fold some multi-word operations. */
3065: else if (GET_MODE_CLASS (mode) == MODE_INT
3066: && GET_CODE (op0) == CONST_DOUBLE
3067: && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
3068: {
3069: int l1, l2, h1, h2, lv, hv;
3070:
3071: l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
3072:
3073: if (GET_CODE (op1) == CONST_DOUBLE)
3074: l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3075: else
3076: l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3077:
3078: switch (code)
3079: {
3080: case MINUS:
3081: /* A - B == A + (-B). */
3082: neg_double (l2, h2, &lv, &hv);
3083: l2 = lv, h2 = hv;
3084:
3085: /* .. fall through ... */
3086:
3087: case PLUS:
3088: add_double (l1, h1, l2, h2, &lv, &hv);
3089: break;
3090:
3091: case MULT:
3092: mul_double (l1, h1, l2, h2, &lv, &hv);
3093: break;
3094:
3095: case DIV: case MOD: case UDIV: case UMOD:
3096: /* We'd need to include tree.h to do this and it doesn't seem worth
3097: it. */
3098: return 0;
3099:
3100: case AND:
3101: lv = l1 & l2, hv = h1 & h2;
3102: break;
3103:
3104: case IOR:
3105: lv = l1 | l2, hv = h1 | h2;
3106: break;
3107:
3108: case XOR:
3109: lv = l1 ^ l2, hv = h1 ^ h2;
3110: break;
3111:
3112: case SMIN:
3113: if (h1 < h2 || (h1 == h2 && (unsigned) l1 < (unsigned) l2))
3114: lv = l1, hv = h1;
3115: else
3116: lv = l2, hv = h2;
3117: break;
3118:
3119: case SMAX:
3120: if (h1 > h2 || (h1 == h2 && (unsigned) l1 > (unsigned) l2))
3121: lv = l1, hv = h1;
3122: else
3123: lv = l2, hv = h2;
3124: break;
3125:
3126: case UMIN:
3127: if ((unsigned) h1 < (unsigned) h2
3128: || (h1 == h2 && (unsigned) l1 < (unsigned) l2))
3129: lv = l1, hv = h1;
3130: else
3131: lv = l2, hv = h2;
3132: break;
3133:
3134: case UMAX:
3135: if ((unsigned) h1 > (unsigned) h2
3136: || (h1 == h2 && (unsigned) l1 > (unsigned) l2))
3137: lv = l1, hv = h1;
3138: else
3139: lv = l2, hv = h2;
3140: break;
3141:
3142: case LSHIFTRT: case ASHIFTRT:
3143: case ASHIFT: case LSHIFT:
3144: case ROTATE: case ROTATERT:
3145: #ifdef SHIFT_COUNT_TRUNCATED
3146: l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
3147: #endif
3148:
3149: if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3150: return 0;
3151:
3152: if (code == LSHIFTRT || code == ASHIFTRT)
3153: rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3154: code == ASHIFTRT);
3155: else if (code == ASHIFT || code == LSHIFT)
3156: lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3157: code == ASHIFT);
3158: else if (code == ROTATE)
3159: lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3160: else /* code == ROTATERT */
3161: rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3162: break;
3163:
3164: default:
3165: return 0;
3166: }
3167:
3168: return immed_double_const (lv, hv, mode);
3169: }
3170: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
3171:
3172: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3173: || width > HOST_BITS_PER_INT || width == 0)
3174: {
3175: /* Even if we can't compute a constant result,
3176: there are some cases worth simplifying. */
3177:
3178: switch (code)
3179: {
3180: case PLUS:
3181: /* In IEEE floating point, x+0 is not the same as x. Similarly
3182: for the other optimizations below. */
3183: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
3184: && GET_MODE_CLASS (mode) != MODE_INT)
3185: break;
3186:
3187: if (op1 == CONST0_RTX (mode))
3188: return op0;
3189:
3190: /* Strip off any surrounding CONSTs. They don't matter in any of
3191: the cases below. */
3192: if (GET_CODE (op0) == CONST)
3193: op0 = XEXP (op0, 0);
3194: if (GET_CODE (op1) == CONST)
3195: op1 = XEXP (op1, 0);
3196:
3197: /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3198: if (GET_CODE (op0) == NEG)
3199: {
3200: rtx tem = simplify_binary_operation (MINUS, mode,
3201: op1, XEXP (op0, 0));
3202: return tem ? tem : gen_rtx (MINUS, mode, op1, XEXP (op0, 0));
3203: }
3204: else if (GET_CODE (op1) == NEG)
3205: {
3206: rtx tem = simplify_binary_operation (MINUS, mode,
3207: op0, XEXP (op1, 0));
3208: return tem ? tem : gen_rtx (MINUS, mode, op0, XEXP (op1, 0));
3209: }
3210:
3211: /* Don't use the associative law for floating point.
3212: The inaccuracy makes it nonassociative,
3213: and subtle programs can break if operations are associated. */
3214: if (GET_MODE_CLASS (mode) != MODE_INT)
3215: break;
3216:
3217: /* (a - b) + b -> a, similarly a + (b - a) -> a */
3218: if (GET_CODE (op0) == MINUS
3219: && rtx_equal_p (XEXP (op0, 1), op1) && ! side_effects_p (op1))
3220: return XEXP (op0, 0);
3221:
3222: if (GET_CODE (op1) == MINUS
3223: && rtx_equal_p (XEXP (op1, 1), op0) && ! side_effects_p (op0))
3224: return XEXP (op1, 0);
3225:
3226: /* (c1 - a) + c2 becomes (c1 + c2) - a. */
3227: if (GET_CODE (op1) == CONST_INT && GET_CODE (op0) == MINUS
3228: && GET_CODE (XEXP (op0, 0)) == CONST_INT)
3229: {
3230: rtx tem = simplify_binary_operation (PLUS, mode, op1,
3231: XEXP (op0, 0));
3232:
3233: return tem ? gen_rtx (MINUS, mode, tem, XEXP (op0, 1)) : 0;
3234: }
3235:
3236: /* Handle both-operands-constant cases. */
3237: if (CONSTANT_P (op0) && CONSTANT_P (op1)
3238: && GET_CODE (op0) != CONST_DOUBLE
3239: && GET_CODE (op1) != CONST_DOUBLE
3240: && GET_MODE_CLASS (mode) == MODE_INT)
3241: {
3242: if (GET_CODE (op1) == CONST_INT)
3243: return plus_constant (op0, INTVAL (op1));
3244: else if (GET_CODE (op0) == CONST_INT)
3245: return plus_constant (op1, INTVAL (op0));
3246: else
3247: return gen_rtx (CONST, mode,
3248: gen_rtx (PLUS, mode,
3249: GET_CODE (op0) == CONST
3250: ? XEXP (op0, 0) : op0,
3251: GET_CODE (op1) == CONST
3252: ? XEXP (op1, 0) : op1));
3253: }
3254: else if (GET_CODE (op1) == CONST_INT
3255: && GET_CODE (op0) == PLUS
3256: && (CONSTANT_P (XEXP (op0, 0))
3257: || CONSTANT_P (XEXP (op0, 1))))
3258: /* constant + (variable + constant)
3259: can result if an index register is made constant.
3260: We simplify this by adding the constants.
3261: If we did not, it would become an invalid address. */
3262: return plus_constant (op0, INTVAL (op1));
3263: break;
3264:
3265: case COMPARE:
3266: #ifdef HAVE_cc0
3267: /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3268: using cc0, in which case we want to leave it as a COMPARE
3269: so we can distinguish it from a register-register-copy.
3270:
3271: In IEEE floating point, x-0 is not the same as x. */
3272:
3273: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3274: || GET_MODE_CLASS (mode) == MODE_INT)
3275: && op1 == CONST0_RTX (mode))
3276: return op0;
3277: #else
3278: /* Do nothing here. */
3279: #endif
3280: break;
3281:
3282: case MINUS:
1.1.1.3 ! root 3283: /* None of these optimizations can be done for IEEE
! 3284: floating point. */
! 3285: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
! 3286: && GET_MODE_CLASS (mode) != MODE_INT)
! 3287: break;
! 3288:
! 3289: /* We can't assume x-x is 0 even with non-IEEE floating point. */
1.1 root 3290: if (rtx_equal_p (op0, op1)
3291: && ! side_effects_p (op0)
3292: && GET_MODE_CLASS (mode) != MODE_FLOAT)
3293: return const0_rtx;
3294:
3295: /* Change subtraction from zero into negation. */
3296: if (op0 == CONST0_RTX (mode))
3297: return gen_rtx (NEG, mode, op1);
3298:
3299: /* Subtracting 0 has no effect. */
3300: if (op1 == CONST0_RTX (mode))
3301: return op0;
3302:
3303: /* Strip off any surrounding CONSTs. They don't matter in any of
3304: the cases below. */
3305: if (GET_CODE (op0) == CONST)
3306: op0 = XEXP (op0, 0);
3307: if (GET_CODE (op1) == CONST)
3308: op1 = XEXP (op1, 0);
3309:
3310: /* (a - (-b)) -> (a + b). */
3311: if (GET_CODE (op1) == NEG)
3312: {
3313: rtx tem = simplify_binary_operation (PLUS, mode,
3314: op0, XEXP (op1, 0));
3315: return tem ? tem : gen_rtx (PLUS, mode, op0, XEXP (op1, 0));
3316: }
3317:
3318: /* Don't use the associative law for floating point.
3319: The inaccuracy makes it nonassociative,
3320: and subtle programs can break if operations are associated. */
3321: if (GET_MODE_CLASS (mode) != MODE_INT)
3322: break;
3323:
3324: /* (a + b) - a -> b, and (b - (a + b)) -> -a */
3325: if (GET_CODE (op0) == PLUS
3326: && rtx_equal_p (XEXP (op0, 0), op1)
3327: && ! side_effects_p (op1))
3328: return XEXP (op0, 1);
3329: else if (GET_CODE (op0) == PLUS
3330: && rtx_equal_p (XEXP (op0, 1), op1)
3331: && ! side_effects_p (op1))
3332: return XEXP (op0, 0);
3333:
3334: if (GET_CODE (op1) == PLUS
3335: && rtx_equal_p (XEXP (op1, 0), op0)
3336: && ! side_effects_p (op0))
3337: {
3338: rtx tem = simplify_unary_operation (NEG, mode, XEXP (op1, 1),
3339: mode);
3340:
3341: return tem ? tem : gen_rtx (NEG, mode, XEXP (op1, 1));
3342: }
3343: else if (GET_CODE (op1) == PLUS
3344: && rtx_equal_p (XEXP (op1, 1), op0)
3345: && ! side_effects_p (op0))
3346: {
3347: rtx tem = simplify_unary_operation (NEG, mode, XEXP (op1, 0),
3348: mode);
3349:
3350: return tem ? tem : gen_rtx (NEG, mode, XEXP (op1, 0));
3351: }
3352:
3353: /* a - (a - b) -> b */
3354: if (GET_CODE (op1) == MINUS && rtx_equal_p (op0, XEXP (op1, 0))
3355: && ! side_effects_p (op0))
3356: return XEXP (op1, 1);
3357:
3358: /* (a +/- b) - (a +/- c) can be simplified. Do variants of
3359: this involving commutativity. The most common case is
3360: (a + C1) - (a + C2), but it's not hard to do all the cases. */
3361: if ((GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS)
3362: && (GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS))
3363: {
3364: rtx lhs0 = XEXP (op0, 0), lhs1 = XEXP (op0, 1);
3365: rtx rhs0 = XEXP (op1, 0), rhs1 = XEXP (op1, 1);
3366: int lhs_neg = GET_CODE (op0) == MINUS;
3367: int rhs_neg = GET_CODE (op1) == MINUS;
3368: rtx lhs = 0, rhs = 0;
3369:
3370: /* Set LHS and RHS to the two different terms. */
3371: if (rtx_equal_p (lhs0, rhs0) && ! side_effects_p (lhs0))
3372: lhs = lhs1, rhs = rhs1;
3373: else if (! rhs_neg && rtx_equal_p (lhs0, rhs1)
3374: && ! side_effects_p (lhs0))
3375: lhs = lhs1, rhs = rhs0;
3376: else if (! lhs_neg && rtx_equal_p (lhs1, rhs0)
3377: && ! side_effects_p (lhs1))
3378: lhs = lhs0, rhs = rhs1;
3379: else if (! lhs_neg && ! rhs_neg && rtx_equal_p (lhs1, rhs1)
3380: && ! side_effects_p (lhs1))
3381: lhs = lhs0, rhs = rhs0;
3382:
3383: /* The RHS is the operand of a MINUS, so its negation
3384: status should be complemented. */
3385: rhs_neg = ! rhs_neg;
3386:
3387: /* If we found two values equal, form the sum or difference
3388: of the remaining two terms. */
3389: if (lhs)
3390: {
3391: rtx tem = simplify_binary_operation (lhs_neg == rhs_neg
3392: ? PLUS : MINUS,
3393: mode,
3394: lhs_neg ? rhs : lhs,
3395: lhs_neg ? lhs : rhs);
3396: if (tem == 0)
3397: tem = gen_rtx (lhs_neg == rhs_neg
3398: ? PLUS : MINUS,
3399: mode, lhs_neg ? rhs : lhs,
3400: lhs_neg ? lhs : rhs);
3401:
3402: /* If both sides negated, negate result. */
3403: if (lhs_neg && rhs_neg)
3404: {
3405: rtx tem1
3406: = simplify_unary_operation (NEG, mode, tem, mode);
3407: if (tem1 == 0)
3408: tem1 = gen_rtx (NEG, mode, tem);
3409: tem = tem1;
3410: }
3411:
3412: return tem;
3413: }
3414:
3415: return 0;
3416: }
3417:
3418: /* c1 - (a + c2) becomes (c1 - c2) - a. */
3419: if (GET_CODE (op0) == CONST_INT && GET_CODE (op1) == PLUS
3420: && GET_CODE (XEXP (op1, 1)) == CONST_INT)
3421: {
3422: rtx tem = simplify_binary_operation (MINUS, mode, op0,
3423: XEXP (op1, 1));
3424:
3425: return tem ? gen_rtx (MINUS, mode, tem, XEXP (op1, 0)) : 0;
3426: }
3427:
3428: /* c1 - (c2 - a) becomes (c1 - c2) + a. */
3429: if (GET_CODE (op0) == CONST_INT && GET_CODE (op1) == MINUS
3430: && GET_CODE (XEXP (op1, 0)) == CONST_INT)
3431: {
3432: rtx tem = simplify_binary_operation (MINUS, mode, op0,
3433: XEXP (op1, 0));
3434:
3435: return (tem && GET_CODE (tem) == CONST_INT
3436: ? plus_constant (XEXP (op1, 1), INTVAL (tem))
3437: : 0);
3438: }
3439:
3440: /* Don't let a relocatable value get a negative coeff. */
3441: if (GET_CODE (op1) == CONST_INT)
3442: return plus_constant (op0, - INTVAL (op1));
3443: break;
3444:
3445: case MULT:
3446: if (op1 == constm1_rtx)
3447: {
3448: rtx tem = simplify_unary_operation (NEG, mode, op0, mode);
3449:
3450: return tem ? tem : gen_rtx (NEG, mode, op0);
3451: }
3452:
3453: /* In IEEE floating point, x*0 is not always 0. */
3454: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3455: || GET_MODE_CLASS (mode) == MODE_INT)
3456: && op1 == CONST0_RTX (mode)
3457: && ! side_effects_p (op0))
3458: return op1;
3459:
3460: /* In IEEE floating point, x*1 is not equivalent to x for nans.
3461: However, ANSI says we can drop signals,
3462: so we can do this anyway. */
3463: if (op1 == CONST1_RTX (mode))
3464: return op0;
3465:
3466: /* Convert multiply by constant power of two into shift. */
3467: if (GET_CODE (op1) == CONST_INT
3468: && (val = exact_log2 (INTVAL (op1))) >= 0)
3469: return gen_rtx (ASHIFT, mode, op0,
3470: gen_rtx (CONST_INT, VOIDmode, val));
3471:
3472: if (GET_CODE (op1) == CONST_DOUBLE
3473: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3474: {
3475: REAL_VALUE_TYPE d;
3476: REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3477:
3478: /* x*2 is x+x and x*(-1) is -x */
3479: if (REAL_VALUES_EQUAL (d, dconst2)
3480: && GET_MODE (op0) == mode)
3481: return gen_rtx (PLUS, mode, op0, copy_rtx (op0));
3482:
3483: else if (REAL_VALUES_EQUAL (d, dconstm1)
3484: && GET_MODE (op0) == mode)
3485: return gen_rtx (NEG, mode, op0);
3486: }
3487: break;
3488:
3489: case IOR:
3490: if (op1 == const0_rtx)
3491: return op0;
3492: if (GET_CODE (op1) == CONST_INT
3493: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3494: return op1;
3495: if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3496: return op0;
3497: /* A | (~A) -> -1 */
3498: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3499: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3500: && ! side_effects_p (op0))
3501: return constm1_rtx;
3502: break;
3503:
3504: case XOR:
3505: if (op1 == const0_rtx)
3506: return op0;
3507: if (GET_CODE (op1) == CONST_INT
3508: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3509: return gen_rtx (NOT, mode, op0);
3510: if (op0 == op1 && ! side_effects_p (op0))
3511: return const0_rtx;
3512: break;
3513:
3514: case AND:
3515: if (op1 == const0_rtx && ! side_effects_p (op0))
3516: return const0_rtx;
3517: if (GET_CODE (op1) == CONST_INT
3518: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3519: return op0;
3520: if (op0 == op1 && ! side_effects_p (op0))
3521: return op0;
3522: /* A & (~A) -> 0 */
3523: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3524: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
3525: && ! side_effects_p (op0))
3526: return const0_rtx;
3527: break;
3528:
3529: case UDIV:
3530: /* Convert divide by power of two into shift (divide by 1 handled
3531: below). */
3532: if (GET_CODE (op1) == CONST_INT
3533: && (arg1 = exact_log2 (INTVAL (op1))) > 0)
3534: return gen_rtx (LSHIFTRT, mode, op0,
3535: gen_rtx (CONST_INT, VOIDmode, arg1));
3536:
3537: /* ... fall through ... */
3538:
3539: case DIV:
3540: if (op1 == CONST1_RTX (mode))
3541: return op0;
3542: else if (op0 == CONST0_RTX (mode)
3543: && ! side_effects_p (op1))
3544: return op0;
3545: #if 0 /* Turned off till an expert says this is a safe thing to do. */
3546: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3547: /* Change division by a constant into multiplication. */
3548: else if (GET_CODE (op1) == CONST_DOUBLE
3549: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3550: && op1 != CONST0_RTX (mode))
3551: {
3552: REAL_VALUE_TYPE d;
3553: REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3554: if (REAL_VALUES_EQUAL (d, dconst0))
3555: abort();
3556: #if defined (REAL_ARITHMETIC)
3557: REAL_ARITHMETIC (d, RDIV_EXPR, dconst1, d);
3558: return gen_rtx (MULT, mode, op0,
3559: CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3560: #else
3561: return gen_rtx (MULT, mode, op0,
3562: CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3563: }
3564: #endif
3565: #endif
3566: #endif
3567: break;
3568:
3569: case UMOD:
3570: /* Handle modulus by power of two (mod with 1 handled below). */
3571: if (GET_CODE (op1) == CONST_INT
3572: && exact_log2 (INTVAL (op1)) > 0)
3573: return gen_rtx (AND, mode, op0,
3574: gen_rtx (CONST_INT, VOIDmode, INTVAL (op1) - 1));
3575:
3576: /* ... fall through ... */
3577:
3578: case MOD:
3579: if ((op0 == const0_rtx || op1 == const1_rtx)
3580: && ! side_effects_p (op0) && ! side_effects_p (op1))
3581: return const0_rtx;
3582: break;
3583:
3584: case ROTATERT:
3585: case ROTATE:
3586: /* Rotating ~0 always results in ~0. */
3587: if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_INT
3588: && INTVAL (op0) == GET_MODE_MASK (mode)
3589: && ! side_effects_p (op1))
3590: return op0;
3591:
3592: /* ... fall through ... */
3593:
3594: case LSHIFT:
3595: case ASHIFT:
3596: case ASHIFTRT:
3597: case LSHIFTRT:
3598: if (op1 == const0_rtx)
3599: return op0;
3600: if (op0 == const0_rtx && ! side_effects_p (op1))
3601: return op0;
3602: break;
3603:
3604: case SMIN:
3605: if (width <= HOST_BITS_PER_INT && GET_CODE (op1) == CONST_INT
3606: && INTVAL (op1) == 1 << (width -1)
3607: && ! side_effects_p (op0))
3608: return op1;
3609: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3610: return op0;
3611: break;
3612:
3613: case SMAX:
3614: if (width <= HOST_BITS_PER_INT && GET_CODE (op1) == CONST_INT
3615: && INTVAL (op1) == GET_MODE_MASK (mode) >> 1
3616: && ! side_effects_p (op0))
3617: return op1;
3618: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3619: return op0;
3620: break;
3621:
3622: case UMIN:
3623: if (op1 == const0_rtx && ! side_effects_p (op0))
3624: return op1;
3625: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3626: return op0;
3627: break;
3628:
3629: case UMAX:
3630: if (op1 == constm1_rtx && ! side_effects_p (op0))
3631: return op1;
3632: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3633: return op0;
3634: break;
3635:
3636: default:
3637: abort ();
3638: }
3639:
3640: return 0;
3641: }
3642:
3643: /* Get the integer argument values in two forms:
3644: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3645:
3646: arg0 = INTVAL (op0);
3647: arg1 = INTVAL (op1);
3648:
3649: if (width < HOST_BITS_PER_INT)
3650: {
3651: arg0 &= (1 << width) - 1;
3652: arg1 &= (1 << width) - 1;
3653:
3654: arg0s = arg0;
3655: if (arg0s & (1 << (width - 1)))
3656: arg0s |= ((-1) << width);
3657:
3658: arg1s = arg1;
3659: if (arg1s & (1 << (width - 1)))
3660: arg1s |= ((-1) << width);
3661: }
3662: else
3663: {
3664: arg0s = arg0;
3665: arg1s = arg1;
3666: }
3667:
3668: /* Compute the value of the arithmetic. */
3669:
3670: switch (code)
3671: {
3672: case PLUS:
1.1.1.2 root 3673: val = arg0s + arg1s;
1.1 root 3674: break;
3675:
3676: case MINUS:
1.1.1.2 root 3677: val = arg0s - arg1s;
1.1 root 3678: break;
3679:
3680: case MULT:
3681: val = arg0s * arg1s;
3682: break;
3683:
3684: case DIV:
3685: if (arg1s == 0)
3686: return 0;
3687: val = arg0s / arg1s;
3688: break;
3689:
3690: case MOD:
3691: if (arg1s == 0)
3692: return 0;
3693: val = arg0s % arg1s;
3694: break;
3695:
3696: case UDIV:
3697: if (arg1 == 0)
3698: return 0;
3699: val = (unsigned) arg0 / arg1;
3700: break;
3701:
3702: case UMOD:
3703: if (arg1 == 0)
3704: return 0;
3705: val = (unsigned) arg0 % arg1;
3706: break;
3707:
3708: case AND:
3709: val = arg0 & arg1;
3710: break;
3711:
3712: case IOR:
3713: val = arg0 | arg1;
3714: break;
3715:
3716: case XOR:
3717: val = arg0 ^ arg1;
3718: break;
3719:
3720: case LSHIFTRT:
3721: /* If shift count is undefined, don't fold it; let the machine do
3722: what it wants. But truncate it if the machine will do that. */
3723: if (arg1 < 0)
3724: return 0;
3725:
3726: #ifdef SHIFT_COUNT_TRUNCATED
3727: arg1 &= (BITS_PER_WORD - 1);
3728: #endif
3729:
3730: if (arg1 >= width)
3731: return 0;
3732:
3733: val = ((unsigned) arg0) >> arg1;
3734: break;
3735:
3736: case ASHIFT:
3737: case LSHIFT:
3738: if (arg1 < 0)
3739: return 0;
3740:
3741: #ifdef SHIFT_COUNT_TRUNCATED
3742: arg1 &= (BITS_PER_WORD - 1);
3743: #endif
3744:
3745: if (arg1 >= width)
3746: return 0;
3747:
3748: val = ((unsigned) arg0) << arg1;
3749: break;
3750:
3751: case ASHIFTRT:
3752: if (arg1 < 0)
3753: return 0;
3754:
3755: #ifdef SHIFT_COUNT_TRUNCATED
3756: arg1 &= (BITS_PER_WORD - 1);
3757: #endif
3758:
3759: if (arg1 >= width)
3760: return 0;
3761:
3762: val = arg0s >> arg1;
3763: break;
3764:
3765: case ROTATERT:
3766: if (arg1 < 0)
3767: return 0;
3768:
3769: arg1 %= width;
3770: val = ((((unsigned) arg0) << (width - arg1))
3771: | (((unsigned) arg0) >> arg1));
3772: break;
3773:
3774: case ROTATE:
3775: if (arg1 < 0)
3776: return 0;
3777:
3778: arg1 %= width;
3779: val = ((((unsigned) arg0) << arg1)
3780: | (((unsigned) arg0) >> (width - arg1)));
3781: break;
3782:
3783: case COMPARE:
3784: /* Do nothing here. */
3785: return 0;
3786:
1.1.1.3 ! root 3787: case SMIN:
! 3788: val = arg0s <= arg1s ? arg0s : arg1s;
! 3789: break;
! 3790:
! 3791: case UMIN:
! 3792: val = (unsigned int)arg0 <= (unsigned int)arg1 ? arg0 : arg1;
! 3793: break;
! 3794:
! 3795: case SMAX:
! 3796: val = arg0s > arg1s ? arg0s : arg1s;
! 3797: break;
! 3798:
! 3799: case UMAX:
! 3800: val = (unsigned int)arg0 > (unsigned int)arg1 ? arg0 : arg1;
! 3801: break;
! 3802:
1.1 root 3803: default:
3804: abort ();
3805: }
3806:
3807: /* Clear the bits that don't belong in our mode, unless they and our sign
3808: bit are all one. So we get either a reasonable negative value or a
3809: reasonable unsigned value for this mode. */
3810: if (width < HOST_BITS_PER_INT
3811: && ((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
3812: val &= (1 << width) - 1;
3813:
3814: return gen_rtx (CONST_INT, VOIDmode, val);
3815: }
3816:
3817: /* Like simplify_binary_operation except used for relational operators.
3818: MODE is the mode of the operands, not that of the result. */
3819:
3820: rtx
3821: simplify_relational_operation (code, mode, op0, op1)
3822: enum rtx_code code;
3823: enum machine_mode mode;
3824: rtx op0, op1;
3825: {
3826: register int arg0, arg1, arg0s, arg1s;
3827: int val;
3828: int width = GET_MODE_BITSIZE (mode);
3829:
3830: /* If op0 is a compare, extract the comparison arguments from it. */
3831: if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
3832: op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
3833:
3834: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
3835: || width > HOST_BITS_PER_INT || width == 0)
3836: {
3837: /* Even if we can't compute a constant result,
3838: there are some cases worth simplifying. */
3839:
3840: /* For non-IEEE floating-point, if the two operands are equal, we know
3841: the result. */
3842: if (rtx_equal_p (op0, op1)
3843: && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3844: || GET_MODE_CLASS (GET_MODE (op0)) != MODE_FLOAT))
3845: return (code == EQ || code == GE || code == LE || code == LEU
3846: || code == GEU) ? const_true_rtx : const0_rtx;
3847: else if (GET_CODE (op0) == CONST_DOUBLE
3848: && GET_CODE (op1) == CONST_DOUBLE
3849: && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
3850: {
3851: REAL_VALUE_TYPE d0, d1;
3852: int value;
3853: jmp_buf handler;
3854: int op0lt, op1lt, equal;
3855:
3856: if (setjmp (handler))
3857: return 0;
3858:
3859: set_float_handler (handler);
3860: REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
3861: REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
3862: equal = REAL_VALUES_EQUAL (d0, d1);
3863: op0lt = REAL_VALUES_LESS (d0, d1);
3864: op1lt = REAL_VALUES_LESS (d1, d0);
3865: set_float_handler (0);
3866:
3867: switch (code)
3868: {
3869: case EQ:
3870: return equal ? const_true_rtx : const0_rtx;
3871: case NE:
3872: return !equal ? const_true_rtx : const0_rtx;
3873: case LE:
3874: return equal || op0lt ? const_true_rtx : const0_rtx;
3875: case LT:
3876: return op0lt ? const_true_rtx : const0_rtx;
3877: case GE:
3878: return equal || op1lt ? const_true_rtx : const0_rtx;
3879: case GT:
3880: return op1lt ? const_true_rtx : const0_rtx;
3881: }
3882: }
3883:
3884: switch (code)
3885: {
3886: case EQ:
3887: {
3888: #if 0
3889: /* We can't make this assumption due to #pragma weak */
3890: if (CONSTANT_P (op0) && op1 == const0_rtx)
3891: return const0_rtx;
3892: #endif
1.1.1.3 ! root 3893: if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx
! 3894: /* On some machines, the ap reg can be 0 sometimes. */
! 3895: && op0 != arg_pointer_rtx)
1.1 root 3896: return const0_rtx;
3897: break;
3898: }
3899:
3900: case NE:
3901: #if 0
3902: /* We can't make this assumption due to #pragma weak */
3903: if (CONSTANT_P (op0) && op1 == const0_rtx)
3904: return const_true_rtx;
3905: #endif
1.1.1.3 ! root 3906: if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx
! 3907: /* On some machines, the ap reg can be 0 sometimes. */
! 3908: && op0 != arg_pointer_rtx)
1.1 root 3909: return const_true_rtx;
3910: break;
3911:
3912: case GEU:
3913: /* Unsigned values are never negative, but we must be sure we are
3914: actually comparing a value, not a CC operand. */
3915: if (op1 == const0_rtx
3916: && GET_MODE_CLASS (mode) == MODE_INT)
3917: return const_true_rtx;
3918: break;
3919:
3920: case LTU:
3921: if (op1 == const0_rtx
3922: && GET_MODE_CLASS (mode) == MODE_INT)
3923: return const0_rtx;
3924: break;
3925:
3926: case LEU:
3927: /* Unsigned values are never greater than the largest
3928: unsigned value. */
3929: if (GET_CODE (op1) == CONST_INT
3930: && INTVAL (op1) == GET_MODE_MASK (mode)
3931: && GET_MODE_CLASS (mode) == MODE_INT)
3932: return const_true_rtx;
3933: break;
3934:
3935: case GTU:
3936: if (GET_CODE (op1) == CONST_INT
3937: && INTVAL (op1) == GET_MODE_MASK (mode)
3938: && GET_MODE_CLASS (mode) == MODE_INT)
3939: return const0_rtx;
3940: break;
3941: }
3942:
3943: return 0;
3944: }
3945:
3946: /* Get the integer argument values in two forms:
3947: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3948:
3949: arg0 = INTVAL (op0);
3950: arg1 = INTVAL (op1);
3951:
3952: if (width < HOST_BITS_PER_INT)
3953: {
3954: arg0 &= (1 << width) - 1;
3955: arg1 &= (1 << width) - 1;
3956:
3957: arg0s = arg0;
3958: if (arg0s & (1 << (width - 1)))
3959: arg0s |= ((-1) << width);
3960:
3961: arg1s = arg1;
3962: if (arg1s & (1 << (width - 1)))
3963: arg1s |= ((-1) << width);
3964: }
3965: else
3966: {
3967: arg0s = arg0;
3968: arg1s = arg1;
3969: }
3970:
3971: /* Compute the value of the arithmetic. */
3972:
3973: switch (code)
3974: {
3975: case NE:
3976: val = arg0 != arg1 ? STORE_FLAG_VALUE : 0;
3977: break;
3978:
3979: case EQ:
3980: val = arg0 == arg1 ? STORE_FLAG_VALUE : 0;
3981: break;
3982:
3983: case LE:
3984: val = arg0s <= arg1s ? STORE_FLAG_VALUE : 0;
3985: break;
3986:
3987: case LT:
3988: val = arg0s < arg1s ? STORE_FLAG_VALUE : 0;
3989: break;
3990:
3991: case GE:
3992: val = arg0s >= arg1s ? STORE_FLAG_VALUE : 0;
3993: break;
3994:
3995: case GT:
3996: val = arg0s > arg1s ? STORE_FLAG_VALUE : 0;
3997: break;
3998:
3999: case LEU:
4000: val = ((unsigned) arg0) <= ((unsigned) arg1) ? STORE_FLAG_VALUE : 0;
4001: break;
4002:
4003: case LTU:
4004: val = ((unsigned) arg0) < ((unsigned) arg1) ? STORE_FLAG_VALUE : 0;
4005: break;
4006:
4007: case GEU:
4008: val = ((unsigned) arg0) >= ((unsigned) arg1) ? STORE_FLAG_VALUE : 0;
4009: break;
4010:
4011: case GTU:
4012: val = ((unsigned) arg0) > ((unsigned) arg1) ? STORE_FLAG_VALUE : 0;
4013: break;
4014:
4015: default:
4016: abort ();
4017: }
4018:
4019: /* Clear the bits that don't belong in our mode, unless they and our sign
4020: bit are all one. So we get either a reasonable negative value or a
4021: reasonable unsigned value for this mode. */
4022: if (width < HOST_BITS_PER_INT
4023: && ((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
4024: val &= (1 << width) - 1;
4025:
4026: return gen_rtx (CONST_INT, VOIDmode, val);
4027: }
4028:
4029: /* Simplify CODE, an operation with result mode MODE and three operands,
4030: OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4031: a constant. Return 0 if no simplifications is possible. */
4032:
4033: rtx
4034: simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4035: enum rtx_code code;
4036: enum machine_mode mode, op0_mode;
4037: rtx op0, op1, op2;
4038: {
4039: int width = GET_MODE_BITSIZE (mode);
4040:
4041: /* VOIDmode means "infinite" precision. */
4042: if (width == 0)
4043: width = HOST_BITS_PER_INT;
4044:
4045: switch (code)
4046: {
4047: case SIGN_EXTRACT:
4048: case ZERO_EXTRACT:
4049: if (GET_CODE (op0) == CONST_INT
4050: && GET_CODE (op1) == CONST_INT
4051: && GET_CODE (op2) == CONST_INT
4052: && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
4053: && width <= HOST_BITS_PER_INT)
4054: {
4055: /* Extracting a bit-field from a constant */
4056: int val = INTVAL (op0);
4057:
4058: #if BITS_BIG_ENDIAN
4059: val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1));
4060: #else
4061: val >>= INTVAL (op2);
4062: #endif
4063: if (HOST_BITS_PER_INT != INTVAL (op1))
4064: {
4065: /* First zero-extend. */
4066: val &= (1 << INTVAL (op1)) - 1;
4067: /* If desired, propagate sign bit. */
4068: if (code == SIGN_EXTRACT && (val & (1 << (INTVAL (op1) - 1))))
1.1.1.3 ! root 4069: val |= ~ ((1 << INTVAL (op1)) - 1);
1.1 root 4070: }
4071:
4072: /* Clear the bits that don't belong in our mode,
4073: unless they and our sign bit are all one.
4074: So we get either a reasonable negative value or a reasonable
4075: unsigned value for this mode. */
4076: if (width < HOST_BITS_PER_INT
4077: && ((val & ((-1) << (width - 1))) != ((-1) << (width - 1))))
4078: val &= (1 << width) - 1;
4079:
4080: return gen_rtx (CONST_INT, VOIDmode, val);
4081: }
4082: break;
4083:
4084: case IF_THEN_ELSE:
4085: if (GET_CODE (op0) == CONST_INT)
4086: return op0 != const0_rtx ? op1 : op2;
4087: break;
4088:
4089: default:
4090: abort ();
4091: }
4092:
4093: return 0;
4094: }
4095:
4096: /* If X is a nontrivial arithmetic operation on an argument
4097: for which a constant value can be determined, return
4098: the result of operating on that value, as a constant.
4099: Otherwise, return X, possibly with one or more operands
4100: modified by recursive calls to this function.
4101:
4102: If X is a register whose contents are known, we do NOT
4103: return those contents. This is because an instruction that
4104: uses a register is usually faster than one that uses a constant.
4105:
4106: INSN is the insn that we may be modifying. If it is 0, make a copy
4107: of X before modifying it. */
4108:
4109: static rtx
4110: fold_rtx (x, insn)
4111: rtx x;
4112: rtx insn;
4113: {
4114: register enum rtx_code code;
4115: register enum machine_mode mode;
4116: register char *fmt;
4117: register int i, val;
4118: rtx new = 0;
4119: int copied = 0;
4120: int must_swap = 0;
4121:
4122: /* Folded equivalents of first two operands of X. */
4123: rtx folded_arg0;
4124: rtx folded_arg1;
4125:
4126: /* Constant equivalents of first three operands of X;
4127: 0 when no such equivalent is known. */
4128: rtx const_arg0;
4129: rtx const_arg1;
4130: rtx const_arg2;
4131:
4132: /* The mode of the first operand of X. We need this for sign and zero
4133: extends. */
4134: enum machine_mode mode_arg0;
4135:
4136: if (x == 0)
4137: return x;
4138:
4139: mode = GET_MODE (x);
4140: code = GET_CODE (x);
4141: switch (code)
4142: {
4143: case CONST:
4144: case CONST_INT:
4145: case CONST_DOUBLE:
4146: case SYMBOL_REF:
4147: case LABEL_REF:
4148: case REG:
4149: /* No use simplifying an EXPR_LIST
4150: since they are used only for lists of args
4151: in a function call's REG_EQUAL note. */
4152: case EXPR_LIST:
4153: return x;
4154:
4155: #ifdef HAVE_cc0
4156: case CC0:
4157: return prev_insn_cc0;
4158: #endif
4159:
4160: case PC:
4161: /* If the next insn is a CODE_LABEL followed by a jump table,
4162: PC's value is a LABEL_REF pointing to that label. That
4163: lets us fold switch statements on the Vax. */
4164: if (insn && GET_CODE (insn) == JUMP_INSN)
4165: {
4166: rtx next = next_nonnote_insn (insn);
4167:
4168: if (next && GET_CODE (next) == CODE_LABEL
4169: && NEXT_INSN (next) != 0
4170: && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4171: && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4172: || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4173: return gen_rtx (LABEL_REF, Pmode, next);
4174: }
4175: break;
4176:
4177: case SUBREG:
4178: /* If this is a single word of a multi-word value, see if we previously
4179: assigned a value to that word. */
4180: if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4181: && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD
4182: && (new = lookup_as_function (x, CONST_INT)) != 0)
4183: return new;
4184:
1.1.1.3 ! root 4185: /* If this is a paradoxical SUBREG, we can't do anything with
! 4186: it because we have no idea what value the extra bits would have. */
! 4187: if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
! 4188: return x;
! 4189:
1.1 root 4190: /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4191: We might be able to if the SUBREG is extracting a single word in an
4192: integral mode or extracting the low part. */
4193:
4194: folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4195: const_arg0 = equiv_constant (folded_arg0);
4196: if (const_arg0)
4197: folded_arg0 = const_arg0;
4198:
4199: if (folded_arg0 != SUBREG_REG (x))
4200: {
4201: new = 0;
4202:
4203: if (GET_MODE_CLASS (mode) == MODE_INT
4204: && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4205: && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4206: new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4207: GET_MODE (SUBREG_REG (x)));
4208: if (new == 0 && subreg_lowpart_p (x))
4209: new = gen_lowpart_if_possible (mode, folded_arg0);
4210: if (new)
4211: return new;
4212: }
1.1.1.3 ! root 4213:
! 4214: /* If this is a narrowing SUBREG and our operand is a REG, see if
! 4215: we can find an equivalence for REG that is a arithmetic operation
! 4216: in a wider mode where both operands are paradoxical SUBREGs
! 4217: from objects of our result mode. In that case, we couldn't report
! 4218: an equivalent value for that operation, since we don't know what the
! 4219: extra bits will be. But we can find an equivalence for this SUBREG
! 4220: by folding that operation is the narrow mode. This allows us to
! 4221: fold arithmetic in narrow modes when the machine only supports
! 4222: word-sized arithmetic. */
! 4223:
! 4224: if (GET_CODE (folded_arg0) == REG
! 4225: && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)))
! 4226: {
! 4227: struct table_elt *elt;
! 4228:
! 4229: /* We can use HASH here since we know that canon_hash won't be
! 4230: called. */
! 4231: elt = lookup (folded_arg0,
! 4232: HASH (folded_arg0, GET_MODE (folded_arg0)),
! 4233: GET_MODE (folded_arg0));
! 4234:
! 4235: if (elt)
! 4236: elt = elt->first_same_value;
! 4237:
! 4238: for (; elt; elt = elt->next_same_value)
! 4239: {
! 4240: /* Just check for unary and binary operations. */
! 4241: if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
! 4242: && GET_CODE (elt->exp) != SIGN_EXTEND
! 4243: && GET_CODE (elt->exp) != ZERO_EXTEND
! 4244: && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
! 4245: && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
! 4246: {
! 4247: rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
! 4248:
! 4249: if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
! 4250: op0 = fold_rtx (op0, 0);
! 4251:
! 4252: op0 = equiv_constant (op0);
! 4253: if (op0)
! 4254: new = simplify_unary_operation (GET_CODE (elt->exp), mode,
! 4255: op0, mode);
! 4256: }
! 4257: else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
! 4258: || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
! 4259: && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
! 4260: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
! 4261: == mode))
! 4262: || CONSTANT_P (XEXP (elt->exp, 0)))
! 4263: && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
! 4264: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
! 4265: == mode))
! 4266: || CONSTANT_P (XEXP (elt->exp, 1))))
! 4267: {
! 4268: rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
! 4269: rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
! 4270:
! 4271: if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
! 4272: op0 = fold_rtx (op0, 0);
! 4273:
! 4274: if (op0)
! 4275: op0 = equiv_constant (op0);
! 4276:
! 4277: if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
! 4278: op1 = fold_rtx (op1, 0);
! 4279:
! 4280: if (op1)
! 4281: op1 = equiv_constant (op1);
! 4282:
! 4283: if (op0 && op1)
! 4284: new = simplify_binary_operation (GET_CODE (elt->exp), mode,
! 4285: op0, op1);
! 4286: }
! 4287:
! 4288: if (new)
! 4289: return new;
! 4290: }
! 4291: }
! 4292:
1.1 root 4293: return x;
4294:
4295: case NOT:
4296: case NEG:
4297: /* If we have (NOT Y), see if Y is known to be (NOT Z).
4298: If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4299: new = lookup_as_function (XEXP (x, 0), code);
4300: if (new)
4301: return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
4302: break;
4303:
4304: case MEM:
4305: /* If we are not actually processing an insn, don't try to find the
4306: best address. Not only don't we care, but we could modify the
4307: MEM in an invalid way since we have no insn to validate against. */
4308: if (insn != 0)
4309: find_best_addr (insn, &XEXP (x, 0));
4310:
4311: {
4312: /* Even if we don't fold in the insn itself,
4313: we can safely do so here, in hopes of getting a constant. */
4314: rtx addr = fold_rtx (XEXP (x, 0), 0);
4315: rtx base = 0;
4316: int offset = 0;
4317:
4318: if (GET_CODE (addr) == REG
4319: && REGNO_QTY_VALID_P (REGNO (addr))
4320: && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
4321: && qty_const[reg_qty[REGNO (addr)]] != 0)
4322: addr = qty_const[reg_qty[REGNO (addr)]];
4323:
4324: /* If address is constant, split it into a base and integer offset. */
4325: if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
4326: base = addr;
4327: else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
4328: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
4329: {
4330: base = XEXP (XEXP (addr, 0), 0);
4331: offset = INTVAL (XEXP (XEXP (addr, 0), 1));
4332: }
4333: else if (GET_CODE (addr) == LO_SUM
4334: && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
4335: base = XEXP (addr, 1);
4336:
4337: /* If this is a constant pool reference, we can fold it into its
4338: constant to allow better value tracking. */
4339: if (base && GET_CODE (base) == SYMBOL_REF
4340: && CONSTANT_POOL_ADDRESS_P (base))
4341: {
4342: rtx constant = get_pool_constant (base);
4343: enum machine_mode const_mode = get_pool_mode (base);
4344: rtx new;
4345:
4346: if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
4347: constant_pool_entries_cost = COST (constant);
4348:
4349: /* If we are loading the full constant, we have an equivalence. */
4350: if (offset == 0 && mode == const_mode)
4351: return constant;
4352:
4353: /* If this actually isn't a constant (wierd!), we can't do
4354: anything. Otherwise, handle the two most common cases:
4355: extracting a word from a multi-word constant, and extracting
4356: the low-order bits. Other cases don't seem common enough to
4357: worry about. */
4358: if (! CONSTANT_P (constant))
4359: return x;
4360:
4361: if (GET_MODE_CLASS (mode) == MODE_INT
4362: && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4363: && offset % UNITS_PER_WORD == 0
4364: && (new = operand_subword (constant,
4365: offset / UNITS_PER_WORD,
4366: 0, const_mode)) != 0)
4367: return new;
4368:
4369: if (((BYTES_BIG_ENDIAN
4370: && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
4371: || (! BYTES_BIG_ENDIAN && offset == 0))
4372: && (new = gen_lowpart_if_possible (mode, constant)) != 0)
4373: return new;
4374: }
4375:
4376: /* If this is a reference to a label at a known position in a jump
4377: table, we also know its value. */
4378: if (base && GET_CODE (base) == LABEL_REF)
4379: {
4380: rtx label = XEXP (base, 0);
4381: rtx table_insn = NEXT_INSN (label);
4382:
4383: if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4384: && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
4385: {
4386: rtx table = PATTERN (table_insn);
4387:
4388: if (offset >= 0
4389: && (offset / GET_MODE_SIZE (GET_MODE (table))
4390: < XVECLEN (table, 0)))
4391: return XVECEXP (table, 0,
4392: offset / GET_MODE_SIZE (GET_MODE (table)));
4393: }
4394: if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4395: && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
4396: {
4397: rtx table = PATTERN (table_insn);
4398:
4399: if (offset >= 0
4400: && (offset / GET_MODE_SIZE (GET_MODE (table))
4401: < XVECLEN (table, 1)))
4402: {
4403: offset /= GET_MODE_SIZE (GET_MODE (table));
4404: new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset),
4405: XEXP (table, 0));
4406:
4407: if (GET_MODE (table) != Pmode)
4408: new = gen_rtx (TRUNCATE, GET_MODE (table), new);
4409:
4410: return new;
4411: }
4412: }
4413: }
4414:
4415: return x;
4416: }
4417: }
4418:
4419: const_arg0 = 0;
4420: const_arg1 = 0;
4421: const_arg2 = 0;
4422: mode_arg0 = VOIDmode;
4423:
4424: /* Try folding our operands.
4425: Then see which ones have constant values known. */
4426:
4427: fmt = GET_RTX_FORMAT (code);
4428: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4429: if (fmt[i] == 'e')
4430: {
4431: rtx arg = XEXP (x, i);
4432: rtx folded_arg = arg, const_arg = 0;
4433: enum machine_mode mode_arg = GET_MODE (arg);
4434: rtx cheap_arg, expensive_arg;
4435: rtx replacements[2];
4436: int j;
4437:
4438: /* Most arguments are cheap, so handle them specially. */
4439: switch (GET_CODE (arg))
4440: {
4441: case REG:
4442: /* This is the same as calling equiv_constant; it is duplicated
4443: here for speed. */
4444: if (REGNO_QTY_VALID_P (REGNO (arg))
4445: && qty_const[reg_qty[REGNO (arg)]] != 0
4446: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
4447: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
4448: const_arg
4449: = gen_lowpart_if_possible (GET_MODE (arg),
4450: qty_const[reg_qty[REGNO (arg)]]);
4451: break;
4452:
4453: case CONST:
4454: case CONST_INT:
4455: case SYMBOL_REF:
4456: case LABEL_REF:
4457: case CONST_DOUBLE:
4458: const_arg = arg;
4459: break;
4460:
4461: #ifdef HAVE_cc0
4462: case CC0:
4463: folded_arg = prev_insn_cc0;
4464: mode_arg = prev_insn_cc0_mode;
4465: const_arg = equiv_constant (folded_arg);
4466: break;
4467: #endif
4468:
4469: default:
4470: folded_arg = fold_rtx (arg, insn);
4471: const_arg = equiv_constant (folded_arg);
4472: }
4473:
4474: /* For the first three operands, see if the operand
4475: is constant or equivalent to a constant. */
4476: switch (i)
4477: {
4478: case 0:
4479: folded_arg0 = folded_arg;
4480: const_arg0 = const_arg;
4481: mode_arg0 = mode_arg;
4482: break;
4483: case 1:
4484: folded_arg1 = folded_arg;
4485: const_arg1 = const_arg;
4486: break;
4487: case 2:
4488: const_arg2 = const_arg;
4489: break;
4490: }
4491:
4492: /* Pick the least expensive of the folded argument and an
4493: equivalent constant argument. */
4494: if (const_arg == 0 || const_arg == folded_arg
4495: || COST (const_arg) > COST (folded_arg))
4496: cheap_arg = folded_arg, expensive_arg = const_arg;
4497: else
4498: cheap_arg = const_arg, expensive_arg = folded_arg;
4499:
4500: /* Try to replace the operand with the cheapest of the two
4501: possibilities. If it doesn't work and this is either of the first
4502: two operands of a commutative operation, try swapping them.
4503: If THAT fails, try the more expensive, provided it is cheaper
4504: than what is already there. */
4505:
4506: if (cheap_arg == XEXP (x, i))
4507: continue;
4508:
4509: if (insn == 0 && ! copied)
4510: {
4511: x = copy_rtx (x);
4512: copied = 1;
4513: }
4514:
4515: replacements[0] = cheap_arg, replacements[1] = expensive_arg;
4516: for (j = 0;
4517: j < 2 && replacements[j]
4518: && COST (replacements[j]) < COST (XEXP (x, i));
4519: j++)
4520: {
4521: if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
4522: break;
4523:
4524: if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
4525: {
4526: validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
4527: validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
4528:
4529: if (apply_change_group ())
4530: {
4531: /* Swap them back to be invalid so that this loop can
4532: continue and flag them to be swapped back later. */
4533: rtx tem;
4534:
4535: tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
4536: XEXP (x, 1) = tem;
4537: must_swap = 1;
4538: break;
4539: }
4540: }
4541: }
4542: }
4543:
4544: else if (fmt[i] == 'E')
4545: /* Don't try to fold inside of a vector of expressions.
4546: Doing nothing is harmless. */
4547: ;
4548:
4549: /* If a commutative operation, place a constant integer as the second
4550: operand unless the first operand is also a constant integer. Otherwise,
4551: place any constant second unless the first operand is also a constant. */
4552:
4553: if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
4554: {
4555: if (must_swap || (const_arg0
4556: && (const_arg1 == 0
4557: || (GET_CODE (const_arg0) == CONST_INT
4558: && GET_CODE (const_arg1) != CONST_INT))))
4559: {
4560: register rtx tem = XEXP (x, 0);
4561:
4562: if (insn == 0 && ! copied)
4563: {
4564: x = copy_rtx (x);
4565: copied = 1;
4566: }
4567:
4568: validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
4569: validate_change (insn, &XEXP (x, 1), tem, 1);
4570: if (apply_change_group ())
4571: {
4572: tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
4573: tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
4574: }
4575: }
4576: }
4577:
4578: /* If X is an arithmetic operation, see if we can simplify it. */
4579:
4580: switch (GET_RTX_CLASS (code))
4581: {
4582: case '1':
1.1.1.3 ! root 4583: /* We can't simplify extension ops unless we know the original mode. */
! 4584: if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
! 4585: && mode_arg0 == VOIDmode)
! 4586: break;
1.1 root 4587: new = simplify_unary_operation (code, mode,
4588: const_arg0 ? const_arg0 : folded_arg0,
4589: mode_arg0);
4590: break;
4591:
4592: case '<':
4593: /* See what items are actually being compared and set FOLDED_ARG[01]
4594: to those values and CODE to the actual comparison code. If any are
4595: constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
4596: do anything if both operands are already known to be constant. */
4597:
4598: if (const_arg0 == 0 || const_arg1 == 0)
4599: {
4600: struct table_elt *p0, *p1;
4601:
4602: code = find_comparison_args (code, &folded_arg0, &folded_arg1);
4603: const_arg0 = equiv_constant (folded_arg0);
4604: const_arg1 = equiv_constant (folded_arg1);
4605:
4606: /* Get a mode from the values actually being compared, or from the
4607: old value of MODE_ARG0 if both are constants. If the resulting
4608: mode is VOIDmode or a MODE_CC mode, we don't know what kinds
4609: of things are being compared, so we can't do anything with this
4610: comparison. */
4611:
4612: if (GET_MODE (folded_arg0) != VOIDmode
4613: && GET_MODE_CLASS (GET_MODE (folded_arg0)) != MODE_CC)
4614: mode_arg0 = GET_MODE (folded_arg0);
4615:
4616: else if (GET_MODE (folded_arg1) != VOIDmode
4617: && GET_MODE_CLASS (GET_MODE (folded_arg1)) != MODE_CC)
4618: mode_arg0 = GET_MODE (folded_arg1);
4619:
4620: if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
4621: break;
4622:
4623: /* If we do not now have two constants being compared, see if we
4624: can nevertheless deduce some things about the comparison. */
4625: if (const_arg0 == 0 || const_arg1 == 0)
4626: {
4627: /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
4628: constant? These aren't zero, but we don't know their sign. */
4629: if (const_arg1 == const0_rtx
4630: && (NONZERO_BASE_PLUS_P (folded_arg0)
4631: #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
4632: come out as 0. */
4633: || GET_CODE (folded_arg0) == SYMBOL_REF
4634: #endif
4635: || GET_CODE (folded_arg0) == LABEL_REF
4636: || GET_CODE (folded_arg0) == CONST))
4637: {
4638: if (code == EQ)
4639: return const0_rtx;
4640: else if (code == NE)
4641: return const_true_rtx;
4642: }
4643:
4644: /* See if the two operands are the same. We don't do this
4645: for IEEE floating-point since we can't assume x == x
4646: since x might be a NaN. */
4647:
4648: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
4649: || GET_MODE_CLASS (mode_arg0) != MODE_FLOAT)
4650: && (folded_arg0 == folded_arg1
4651: || (GET_CODE (folded_arg0) == REG
4652: && GET_CODE (folded_arg1) == REG
4653: && (reg_qty[REGNO (folded_arg0)]
4654: == reg_qty[REGNO (folded_arg1)]))
4655: || ((p0 = lookup (folded_arg0,
4656: (safe_hash (folded_arg0, mode_arg0)
4657: % NBUCKETS), mode_arg0))
4658: && (p1 = lookup (folded_arg1,
4659: (safe_hash (folded_arg1, mode_arg0)
4660: % NBUCKETS), mode_arg0))
4661: && p0->first_same_value == p1->first_same_value)))
4662: return ((code == EQ || code == LE || code == GE
4663: || code == LEU || code == GEU)
4664: ? const_true_rtx : const0_rtx);
4665:
4666: /* If FOLDED_ARG0 is a register, see if the comparison we are
4667: doing now is either the same as we did before or the reverse
4668: (we only check the reverse if not floating-point). */
4669: else if (GET_CODE (folded_arg0) == REG)
4670: {
4671: int qty = reg_qty[REGNO (folded_arg0)];
4672:
4673: if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
4674: && (comparison_dominates_p (qty_comparison_code[qty], code)
4675: || (comparison_dominates_p (qty_comparison_code[qty],
4676: reverse_condition (code))
4677: && GET_MODE_CLASS (mode_arg0) == MODE_INT))
4678: && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
4679: || (const_arg1
4680: && rtx_equal_p (qty_comparison_const[qty],
4681: const_arg1))
4682: || (GET_CODE (folded_arg1) == REG
4683: && (reg_qty[REGNO (folded_arg1)]
4684: == qty_comparison_qty[qty]))))
4685: return (comparison_dominates_p (qty_comparison_code[qty],
4686: code)
4687: ? const_true_rtx : const0_rtx);
4688: }
4689: }
4690: }
4691:
4692: /* If we are comparing against zero, see if the first operand is
4693: equivalent to an IOR with a constant. If so, we may be able to
4694: determine the result of this comparison. */
4695:
4696: if (const_arg1 == const0_rtx)
4697: {
4698: rtx y = lookup_as_function (folded_arg0, IOR);
4699: rtx inner_const;
4700:
4701: if (y != 0
4702: && (inner_const = equiv_constant (XEXP (y, 1))) != 0
4703: && GET_CODE (inner_const) == CONST_INT
4704: && INTVAL (inner_const) != 0)
4705: {
4706: int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
4707: int has_sign = (HOST_BITS_PER_INT >= sign_bitnum
4708: && (INTVAL (inner_const) & (1 << sign_bitnum)));
4709:
4710: switch (code)
4711: {
4712: case EQ:
4713: return const0_rtx;
4714: case NE:
4715: return const_true_rtx;
4716: case LT: case LE:
4717: if (has_sign)
4718: return const_true_rtx;
4719: break;
4720: case GT: case GE:
4721: if (has_sign)
4722: return const0_rtx;
4723: break;
4724: }
4725: }
4726: }
4727:
4728: new = simplify_relational_operation (code, mode_arg0,
4729: const_arg0 ? const_arg0 : folded_arg0,
4730: const_arg1 ? const_arg1 : folded_arg1);
4731: break;
4732:
4733: case '2':
4734: case 'c':
4735: switch (code)
4736: {
4737: case PLUS:
4738: /* If the second operand is a LABEL_REF, see if the first is a MINUS
4739: with that LABEL_REF as its second operand. If so, the result is
4740: the first operand of that MINUS. This handles switches with an
4741: ADDR_DIFF_VEC table. */
4742: if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
4743: {
4744: rtx y = lookup_as_function (folded_arg0, MINUS);
4745:
4746: if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
4747: && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
4748: return XEXP (y, 0);
4749: }
4750:
4751: /* ... fall through ... */
4752:
4753: case MINUS:
4754: case SMIN: case SMAX: case UMIN: case UMAX:
4755: case IOR: case AND: case XOR:
4756: case MULT: case DIV: case UDIV:
4757: case ASHIFT: case LSHIFTRT: case ASHIFTRT:
4758: /* If we have (<op> <reg> <const_int>) for an associative OP and REG
4759: is known to be of similar form, we may be able to replace the
4760: operation with a combined operation. This may eliminate the
4761: intermediate operation if every use is simplified in this way.
4762: Note that the similar optimization done by combine.c only works
4763: if the intermediate operation's result has only one reference. */
4764:
4765: if (GET_CODE (folded_arg0) == REG
4766: && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
4767: {
4768: int is_shift
4769: = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
4770: rtx y = lookup_as_function (folded_arg0, code);
4771: rtx inner_const;
4772: enum rtx_code associate_code;
4773: rtx new_const;
4774:
4775: if (y == 0
4776: || 0 == (inner_const
4777: = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
4778: || GET_CODE (inner_const) != CONST_INT
4779: /* If we have compiled a statement like
4780: "if (x == (x & mask1))", and now are looking at
4781: "x & mask2", we will have a case where the first operand
4782: of Y is the same as our first operand. Unless we detect
4783: this case, an infinite loop will result. */
4784: || XEXP (y, 0) == folded_arg0)
4785: break;
4786:
4787: /* Don't associate these operations if they are a PLUS with the
4788: same constant and it is a power of two. These might be doable
4789: with a pre- or post-increment. Similarly for two subtracts of
4790: identical powers of two with post decrement. */
4791:
4792: if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
4793: && (0
4794: #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
4795: || exact_log2 (INTVAL (const_arg1)) >= 0
4796: #endif
4797: #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
4798: || exact_log2 (- INTVAL (const_arg1)) >= 0
4799: #endif
4800: ))
4801: break;
4802:
4803: /* Compute the code used to compose the constants. For example,
4804: A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
4805:
4806: associate_code
4807: = (code == MULT || code == DIV || code == UDIV ? MULT
4808: : is_shift || code == PLUS || code == MINUS ? PLUS : code);
4809:
4810: new_const = simplify_binary_operation (associate_code, mode,
4811: const_arg1, inner_const);
4812:
4813: if (new_const == 0)
4814: break;
4815:
4816: /* If we are associating shift operations, don't let this
4817: produce a shift of larger than the object. This could
4818: occur when we following a sign-extend by a right shift on
4819: a machine that does a sign-extend as a pair of shifts. */
4820:
4821: if (is_shift && GET_CODE (new_const) == CONST_INT
4822: && INTVAL (new_const) > GET_MODE_BITSIZE (mode))
4823: break;
4824:
4825: y = copy_rtx (XEXP (y, 0));
4826:
4827: /* If Y contains our first operand (the most common way this
4828: can happen is if Y is a MEM), we would do into an infinite
4829: loop if we tried to fold it. So don't in that case. */
4830:
4831: if (! reg_mentioned_p (folded_arg0, y))
4832: y = fold_rtx (y, insn);
4833:
4834: new = simplify_binary_operation (code, mode, y, new_const);
4835: if (new)
4836: return new;
4837:
4838: return gen_rtx (code, mode, y, new_const);
4839: }
4840: }
4841:
4842: new = simplify_binary_operation (code, mode,
4843: const_arg0 ? const_arg0 : folded_arg0,
4844: const_arg1 ? const_arg1 : folded_arg1);
4845: break;
4846:
1.1.1.2 root 4847: case 'o':
4848: /* (lo_sum (high X) X) is simply X. */
4849: if (code == LO_SUM && const_arg0 != 0
4850: && GET_CODE (const_arg0) == HIGH
4851: && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4852: return const_arg1;
4853: break;
4854:
1.1 root 4855: case '3':
4856: case 'b':
4857: new = simplify_ternary_operation (code, mode, mode_arg0,
4858: const_arg0 ? const_arg0 : folded_arg0,
4859: const_arg1 ? const_arg1 : folded_arg1,
4860: const_arg2 ? const_arg2 : XEXP (x, 2));
4861: break;
4862: }
4863:
4864: return new ? new : x;
4865: }
4866:
4867: /* Return a constant value currently equivalent to X.
4868: Return 0 if we don't know one. */
4869:
4870: static rtx
4871: equiv_constant (x)
4872: rtx x;
4873: {
4874: if (GET_CODE (x) == REG
4875: && REGNO_QTY_VALID_P (REGNO (x))
4876: && qty_const[reg_qty[REGNO (x)]])
4877: x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
4878:
4879: if (x != 0 && CONSTANT_P (x))
4880: return x;
4881:
1.1.1.3 ! root 4882: /* If X is a MEM, try to fold it outside the context of any insn to see if
! 4883: it might be equivalent to a constant. That handles the case where it
! 4884: is a constant-pool reference. Then try to look it up in the hash table
! 4885: in case it is something whose value we have seen before. */
! 4886:
! 4887: if (GET_CODE (x) == MEM)
! 4888: {
! 4889: struct table_elt *elt;
! 4890:
! 4891: x = fold_rtx (x, 0);
! 4892: if (CONSTANT_P (x))
! 4893: return x;
! 4894:
! 4895: elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
! 4896: if (elt == 0)
! 4897: return 0;
! 4898:
! 4899: for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
! 4900: if (elt->is_const && CONSTANT_P (elt->exp))
! 4901: return elt->exp;
! 4902: }
! 4903:
1.1 root 4904: return 0;
4905: }
4906:
4907: /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4908: number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4909: least-significant part of X.
4910: MODE specifies how big a part of X to return.
4911:
4912: If the requested operation cannot be done, 0 is returned.
4913:
4914: This is similar to gen_lowpart in emit-rtl.c. */
4915:
4916: rtx
4917: gen_lowpart_if_possible (mode, x)
4918: enum machine_mode mode;
4919: register rtx x;
4920: {
4921: rtx result = gen_lowpart_common (mode, x);
4922:
4923: if (result)
4924: return result;
4925: else if (GET_CODE (x) == MEM)
4926: {
4927: /* This is the only other case we handle. */
4928: register int offset = 0;
4929: rtx new;
4930:
4931: #if WORDS_BIG_ENDIAN
4932: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4933: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4934: #endif
4935: #if BYTES_BIG_ENDIAN
4936: /* Adjust the address so that the address-after-the-data
4937: is unchanged. */
4938: offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4939: - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4940: #endif
4941: new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
4942: if (! memory_address_p (mode, XEXP (new, 0)))
4943: return 0;
4944: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
4945: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4946: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
4947: return new;
4948: }
4949: else
4950: return 0;
4951: }
4952:
4953: /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4954: branch. It will be zero if not.
4955:
4956: In certain cases, this can cause us to add an equivalence. For example,
4957: if we are following the taken case of
4958: if (i == 2)
4959: we can add the fact that `i' and '2' are now equivalent.
4960:
4961: In any case, we can record that this comparison was passed. If the same
4962: comparison is seen later, we will know its value. */
4963:
4964: static void
4965: record_jump_equiv (insn, taken)
4966: rtx insn;
4967: int taken;
4968: {
4969: int cond_known_true;
4970: rtx op0, op1;
4971: enum machine_mode mode;
4972: int reversed_nonequality = 0;
4973: enum rtx_code code;
4974:
4975: /* Ensure this is the right kind of insn. */
4976: if (! condjump_p (insn) || simplejump_p (insn))
4977: return;
4978:
4979: /* See if this jump condition is known true or false. */
4980: if (taken)
4981: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4982: else
4983: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4984:
4985: /* Get the type of comparison being done and the operands being compared.
4986: If we had to reverse a non-equality condition, record that fact so we
4987: know that it isn't valid for floating-point. */
4988: code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4989: op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4990: op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4991:
4992: code = find_comparison_args (code, &op0, &op1);
4993: if (! cond_known_true)
4994: {
4995: reversed_nonequality = (code != EQ && code != NE);
4996: code = reverse_condition (code);
4997: }
4998:
4999: /* The mode is the mode of the non-constant. */
5000: mode = GET_MODE (op0);
5001: if (mode == VOIDmode) mode = GET_MODE (op1);
5002:
5003: record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5004: }
5005:
5006: /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5007: REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5008: Make any useful entries we can with that information. Called from
5009: above function and called recursively. */
5010:
5011: static void
5012: record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5013: enum rtx_code code;
5014: enum machine_mode mode;
5015: rtx op0, op1;
5016: int reversed_nonequality;
5017: {
5018: int op0_hash_code, op1_hash_code;
5019: int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5020: struct table_elt *op0_elt, *op1_elt;
5021:
5022: /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5023: we know that they are also equal in the smaller mode (this is also
5024: true for all smaller modes whether or not there is a SUBREG, but
5025: is not worth testing for with no SUBREG. */
5026:
5027: if (code == EQ && GET_CODE (op0) == SUBREG
5028: && GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))
5029: {
5030: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5031: rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5032:
5033: record_jump_cond (code, mode, SUBREG_REG (op0),
5034: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5035: reversed_nonequality);
5036: }
5037:
5038: if (code == EQ && GET_CODE (op1) == SUBREG
5039: && GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))
5040: {
5041: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5042: rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5043:
5044: record_jump_cond (code, mode, SUBREG_REG (op1),
5045: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5046: reversed_nonequality);
5047: }
5048:
5049: /* Similarly, if this is an NE comparison, and either is a SUBREG
5050: making a smaller mode, we know the whole thing is also NE. */
5051:
5052: if (code == NE && GET_CODE (op0) == SUBREG
5053: && subreg_lowpart_p (op0)
5054: && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))
5055: {
5056: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5057: rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5058:
5059: record_jump_cond (code, mode, SUBREG_REG (op0),
5060: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5061: reversed_nonequality);
5062: }
5063:
5064: if (code == NE && GET_CODE (op1) == SUBREG
5065: && subreg_lowpart_p (op1)
5066: && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))
5067: {
5068: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5069: rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5070:
5071: record_jump_cond (code, mode, SUBREG_REG (op1),
5072: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5073: reversed_nonequality);
5074: }
5075:
5076: /* Hash both operands. */
5077:
5078: do_not_record = 0;
5079: hash_arg_in_memory = 0;
5080: hash_arg_in_struct = 0;
5081: op0_hash_code = HASH (op0, mode);
5082: op0_in_memory = hash_arg_in_memory;
5083: op0_in_struct = hash_arg_in_struct;
5084:
5085: if (do_not_record)
5086: return;
5087:
5088: do_not_record = 0;
5089: hash_arg_in_memory = 0;
5090: hash_arg_in_struct = 0;
5091: op1_hash_code = HASH (op1, mode);
5092: op1_in_memory = hash_arg_in_memory;
5093: op1_in_struct = hash_arg_in_struct;
5094:
5095: if (do_not_record)
5096: return;
5097:
5098: /* Look up both operands. */
5099: op0_elt = lookup (op0, op0_hash_code, mode);
5100: op1_elt = lookup (op1, op1_hash_code, mode);
5101:
5102: /* If we aren't setting two things equal all we can do is save this
5103: comparison. */
5104: if (code != EQ)
5105: {
5106: /* If we reversed a floating-point comparison, if OP0 is not a
5107: register, or if OP1 is neither a register or constant, we can't
5108: do anything. */
5109:
5110: if (GET_CODE (op1) != REG)
5111: op1 = equiv_constant (op1);
5112:
5113: if ((reversed_nonequality && GET_MODE_CLASS (mode) != MODE_INT)
5114: || GET_CODE (op0) != REG || op1 == 0)
5115: return;
5116:
5117: /* Put OP0 in the hash table if it isn't already. This gives it a
5118: new quantity number. */
5119: if (op0_elt == 0)
5120: {
5121: if (insert_regs (op0, 0, 0))
5122: {
5123: rehash_using_reg (op0);
5124: op0_hash_code = HASH (op0, mode);
5125: }
5126:
5127: op0_elt = insert (op0, 0, op0_hash_code, mode);
5128: op0_elt->in_memory = op0_in_memory;
5129: op0_elt->in_struct = op0_in_struct;
5130: }
5131:
5132: qty_comparison_code[reg_qty[REGNO (op0)]] = code;
5133: if (GET_CODE (op1) == REG)
5134: {
5135: /* Put OP1 in the hash table so it gets a new quantity number. */
5136: if (op1_elt == 0)
5137: {
5138: if (insert_regs (op1, 0, 0))
5139: {
5140: rehash_using_reg (op1);
5141: op1_hash_code = HASH (op1, mode);
5142: }
5143:
5144: op1_elt = insert (op1, 0, op1_hash_code, mode);
5145: op1_elt->in_memory = op1_in_memory;
5146: op1_elt->in_struct = op1_in_struct;
5147: }
5148:
5149: qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
5150: qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
5151: }
5152: else
5153: {
5154: qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
5155: qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
5156: }
5157:
5158: return;
5159: }
5160:
5161: /* If both are equivalent, merge the two classes. Save this class for
5162: `cse_set_around_loop'. */
5163: if (op0_elt && op1_elt)
5164: {
5165: merge_equiv_classes (op0_elt, op1_elt);
5166: last_jump_equiv_class = op0_elt;
5167: }
5168:
5169: /* For whichever side doesn't have an equivalence, make one. */
5170: if (op0_elt == 0)
5171: {
5172: if (insert_regs (op0, op1_elt, 0))
5173: {
5174: rehash_using_reg (op0);
5175: op0_hash_code = HASH (op0, mode);
5176: }
5177:
5178: op0_elt = insert (op0, op1_elt, op0_hash_code, mode);
5179: op0_elt->in_memory = op0_in_memory;
5180: op0_elt->in_struct = op0_in_struct;
5181: last_jump_equiv_class = op0_elt;
5182: }
5183:
5184: if (op1_elt == 0)
5185: {
5186: if (insert_regs (op1, op0_elt, 0))
5187: {
5188: rehash_using_reg (op1);
5189: op1_hash_code = HASH (op1, mode);
5190: }
5191:
5192: op1_elt = insert (op1, op0_elt, op1_hash_code, mode);
5193: op1_elt->in_memory = op1_in_memory;
5194: op1_elt->in_struct = op1_in_struct;
5195: last_jump_equiv_class = op1_elt;
5196: }
5197: }
5198:
5199: /* CSE processing for one instruction.
5200: First simplify sources and addresses of all assignments
5201: in the instruction, using previously-computed equivalents values.
5202: Then install the new sources and destinations in the table
5203: of available values.
5204:
5205: If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5206: the insn. */
5207:
5208: /* Data on one SET contained in the instruction. */
5209:
5210: struct set
5211: {
5212: /* The SET rtx itself. */
5213: rtx rtl;
5214: /* The SET_SRC of the rtx (the original value, if it is changing). */
5215: rtx src;
5216: /* The hash-table element for the SET_SRC of the SET. */
5217: struct table_elt *src_elt;
5218: /* Hash code for the SET_SRC. */
5219: int src_hash_code;
5220: /* Hash code for the SET_DEST. */
5221: int dest_hash_code;
5222: /* The SET_DEST, with SUBREG, etc., stripped. */
5223: rtx inner_dest;
5224: /* Place where the pointer to the INNER_DEST was found. */
5225: rtx *inner_dest_loc;
5226: /* Nonzero if the SET_SRC is in memory. */
5227: char src_in_memory;
5228: /* Nonzero if the SET_SRC is in a structure. */
5229: char src_in_struct;
5230: /* Nonzero if the SET_SRC contains something
5231: whose value cannot be predicted and understood. */
5232: char src_volatile;
5233: /* Original machine mode, in case it becomes a CONST_INT. */
5234: enum machine_mode mode;
5235: /* A constant equivalent for SET_SRC, if any. */
5236: rtx src_const;
5237: /* Hash code of constant equivalent for SET_SRC. */
5238: int src_const_hash_code;
5239: /* Table entry for constant equivalent for SET_SRC, if any. */
5240: struct table_elt *src_const_elt;
5241: };
5242:
5243: static void
5244: cse_insn (insn, in_libcall_block)
5245: rtx insn;
5246: int in_libcall_block;
5247: {
5248: register rtx x = PATTERN (insn);
5249: rtx tem;
5250: register int i;
5251: register int n_sets = 0;
5252:
5253: /* Records what this insn does to set CC0. */
5254: rtx this_insn_cc0 = 0;
5255: enum machine_mode this_insn_cc0_mode;
5256: struct write_data writes_memory;
5257: static struct write_data init = {0, 0, 0, 0};
5258:
5259: rtx src_eqv = 0;
5260: struct table_elt *src_eqv_elt = 0;
5261: int src_eqv_volatile;
5262: int src_eqv_in_memory;
5263: int src_eqv_in_struct;
5264: int src_eqv_hash_code;
5265:
5266: struct set *sets;
5267:
5268: this_insn = insn;
5269: writes_memory = init;
5270:
5271: /* Find all the SETs and CLOBBERs in this instruction.
5272: Record all the SETs in the array `set' and count them.
5273: Also determine whether there is a CLOBBER that invalidates
5274: all memory references, or all references at varying addresses. */
5275:
5276: if (GET_CODE (x) == SET)
5277: {
5278: sets = (struct set *) alloca (sizeof (struct set));
5279: sets[0].rtl = x;
5280:
5281: /* Ignore SETs that are unconditional jumps.
5282: They never need cse processing, so this does not hurt.
5283: The reason is not efficiency but rather
5284: so that we can test at the end for instructions
5285: that have been simplified to unconditional jumps
5286: and not be misled by unchanged instructions
5287: that were unconditional jumps to begin with. */
5288: if (SET_DEST (x) == pc_rtx
5289: && GET_CODE (SET_SRC (x)) == LABEL_REF)
5290: ;
5291:
5292: /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5293: The hard function value register is used only once, to copy to
5294: someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5295: Ensure we invalidate the destination register. On the 80386 no
5296: other code would invalidate it since it is a fixed_reg. */
5297:
5298: else if (GET_CODE (SET_SRC (x)) == CALL)
5299: {
5300: canon_reg (SET_SRC (x), insn);
5301: fold_rtx (SET_SRC (x), insn);
5302: invalidate (SET_DEST (x));
5303: }
5304: else
5305: n_sets = 1;
5306: }
5307: else if (GET_CODE (x) == PARALLEL)
5308: {
5309: register int lim = XVECLEN (x, 0);
5310:
5311: sets = (struct set *) alloca (lim * sizeof (struct set));
5312:
5313: /* Find all regs explicitly clobbered in this insn,
5314: and ensure they are not replaced with any other regs
5315: elsewhere in this insn.
5316: When a reg that is clobbered is also used for input,
5317: we should presume that that is for a reason,
5318: and we should not substitute some other register
5319: which is not supposed to be clobbered.
5320: Therefore, this loop cannot be merged into the one below
1.1.1.3 ! root 5321: because a CALL may precede a CLOBBER and refer to the
1.1 root 5322: value clobbered. We must not let a canonicalization do
5323: anything in that case. */
5324: for (i = 0; i < lim; i++)
5325: {
5326: register rtx y = XVECEXP (x, 0, i);
1.1.1.3 ! root 5327: if (GET_CODE (y) == CLOBBER
! 5328: && (GET_CODE (XEXP (y, 0)) == REG
! 5329: || GET_CODE (XEXP (y, 0)) == SUBREG))
1.1 root 5330: invalidate (XEXP (y, 0));
5331: }
5332:
5333: for (i = 0; i < lim; i++)
5334: {
5335: register rtx y = XVECEXP (x, 0, i);
5336: if (GET_CODE (y) == SET)
5337: {
5338: /* As above, we ignore unconditional jumps and call-insns. */
5339: if (GET_CODE (SET_SRC (y)) == CALL)
5340: {
5341: canon_reg (SET_SRC (y), insn);
5342: fold_rtx (SET_SRC (y), insn);
5343: invalidate (SET_DEST (y));
5344: }
5345: else if (SET_DEST (y) == pc_rtx
5346: && GET_CODE (SET_SRC (y)) == LABEL_REF)
5347: ;
5348: else
5349: sets[n_sets++].rtl = y;
5350: }
5351: else if (GET_CODE (y) == CLOBBER)
5352: {
5353: /* If we clobber memory, take note of that,
5354: and canon the address.
5355: This does nothing when a register is clobbered
5356: because we have already invalidated the reg. */
5357: if (GET_CODE (XEXP (y, 0)) == MEM)
5358: {
5359: canon_reg (XEXP (y, 0), 0);
5360: note_mem_written (XEXP (y, 0), &writes_memory);
5361: }
5362: }
5363: else if (GET_CODE (y) == USE
5364: && ! (GET_CODE (XEXP (y, 0)) == REG
5365: && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
5366: canon_reg (y, 0);
5367: else if (GET_CODE (y) == CALL)
5368: {
5369: canon_reg (y, insn);
5370: fold_rtx (y, insn);
5371: }
5372: }
5373: }
5374: else if (GET_CODE (x) == CLOBBER)
5375: {
5376: if (GET_CODE (XEXP (x, 0)) == MEM)
5377: {
5378: canon_reg (XEXP (x, 0), 0);
5379: note_mem_written (XEXP (x, 0), &writes_memory);
5380: }
5381: }
5382:
5383: /* Canonicalize a USE of a pseudo register or memory location. */
5384: else if (GET_CODE (x) == USE
5385: && ! (GET_CODE (XEXP (x, 0)) == REG
5386: && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
5387: canon_reg (XEXP (x, 0), 0);
5388: else if (GET_CODE (x) == CALL)
5389: {
5390: canon_reg (x, insn);
5391: fold_rtx (x, insn);
5392: }
5393:
5394: if (n_sets == 1 && REG_NOTES (insn) != 0)
5395: {
5396: /* Store the equivalent value in SRC_EQV, if different. */
5397: rtx tem = find_reg_note (insn, REG_EQUAL, 0);
5398:
5399: if (tem && ! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
5400: src_eqv = canon_reg (XEXP (tem, 0), 0);
5401: }
5402:
5403: /* Canonicalize sources and addresses of destinations.
5404: We do this in a separate pass to avoid problems when a MATCH_DUP is
5405: present in the insn pattern. In that case, we want to ensure that
5406: we don't break the duplicate nature of the pattern. So we will replace
5407: both operands at the same time. Otherwise, we would fail to find an
5408: equivalent substitution in the loop calling validate_change below.
5409: (We also speed up that loop when a canonicalization was done since
5410: recog_memoized need not be called for just a canonicalization unless
5411: a pseudo register is being replaced by a hard reg of vice versa.)
5412:
5413: We used to suppress canonicalization of DEST if it appears in SRC,
5414: but we don't do this any more.
5415:
5416: ??? The way this code is written now, if we have a MATCH_DUP between
5417: two operands that are pseudos and we would want to canonicalize them
5418: to a hard register, we won't do that. The only time this would happen
5419: is if the hard reg was a fixed register, and this should be rare.
5420:
5421: ??? This won't work if there is a MATCH_DUP between an input and an
5422: output, but these never worked and must be declared invalid. */
5423:
5424: for (i = 0; i < n_sets; i++)
5425: {
5426: rtx dest = SET_DEST (sets[i].rtl);
5427: rtx src = SET_SRC (sets[i].rtl);
5428: rtx new = canon_reg (src, insn);
5429:
5430: if (GET_CODE (new) == REG && GET_CODE (src) == REG
5431: && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
5432: != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
5433: validate_change (insn, &SET_SRC (sets[i].rtl), new, 0);
5434: else
5435: SET_SRC (sets[i].rtl) = new;
5436:
5437: if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
5438: {
5439: validate_change (insn, &XEXP (dest, 1),
5440: canon_reg (XEXP (dest, 1), insn), 0);
5441: validate_change (insn, &XEXP (dest, 2),
5442: canon_reg (XEXP (dest, 2), insn), 0);
5443: }
5444:
5445: while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
5446: || GET_CODE (dest) == ZERO_EXTRACT
5447: || GET_CODE (dest) == SIGN_EXTRACT)
5448: dest = XEXP (dest, 0);
5449:
5450: if (GET_CODE (dest) == MEM)
5451: canon_reg (dest, insn);
5452: }
5453:
5454: /* Set sets[i].src_elt to the class each source belongs to.
5455: Detect assignments from or to volatile things
5456: and set set[i] to zero so they will be ignored
5457: in the rest of this function.
5458:
5459: Nothing in this loop changes the hash table or the register chains. */
5460:
5461: for (i = 0; i < n_sets; i++)
5462: {
5463: register rtx src, dest;
5464: register rtx src_folded;
5465: register struct table_elt *elt = 0, *p;
5466: enum machine_mode mode;
5467: rtx src_eqv_here;
5468: rtx src_const = 0;
5469: rtx src_related = 0;
5470: struct table_elt *src_const_elt = 0;
5471: int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
5472: int src_related_cost = 10000, src_elt_cost = 10000;
5473: /* Set non-zero if we need to call force_const_mem on with the
5474: contents of src_folded before using it. */
5475: int src_folded_force_flag = 0;
5476:
5477: dest = SET_DEST (sets[i].rtl);
5478: src = SET_SRC (sets[i].rtl);
5479:
5480: /* If SRC is a constant that has no machine mode,
5481: hash it with the destination's machine mode.
5482: This way we can keep different modes separate. */
5483:
5484: mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5485: sets[i].mode = mode;
5486:
5487: if (src_eqv)
5488: {
5489: enum machine_mode eqvmode = mode;
5490: if (GET_CODE (dest) == STRICT_LOW_PART)
5491: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5492: do_not_record = 0;
5493: hash_arg_in_memory = 0;
5494: hash_arg_in_struct = 0;
5495: src_eqv = fold_rtx (src_eqv, insn);
5496: src_eqv_hash_code = HASH (src_eqv, eqvmode);
5497:
5498: /* Find the equivalence class for the equivalent expression. */
5499:
5500: if (!do_not_record)
5501: src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, eqvmode);
5502:
5503: src_eqv_volatile = do_not_record;
5504: src_eqv_in_memory = hash_arg_in_memory;
5505: src_eqv_in_struct = hash_arg_in_struct;
5506: }
5507:
5508: /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
5509: value of the INNER register, not the destination. So it is not
5510: a legal substitution for the source. But save it for later. */
5511: if (GET_CODE (dest) == STRICT_LOW_PART)
5512: src_eqv_here = 0;
5513: else
5514: src_eqv_here = src_eqv;
5515:
5516: /* Simplify and foldable subexpressions in SRC. Then get the fully-
5517: simplified result, which may not necessarily be valid. */
5518: src_folded = fold_rtx (src, insn);
5519:
5520: /* If storing a constant in a bitfield, pre-truncate the constant
5521: so we will be able to record it later. */
5522: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5523: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5524: {
5525: rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5526:
5527: if (GET_CODE (src) == CONST_INT
5528: && GET_CODE (width) == CONST_INT
5529: && INTVAL (width) < HOST_BITS_PER_INT
5530: && (INTVAL (src) & ((-1) << INTVAL (width))))
5531: src_folded = gen_rtx (CONST_INT, VOIDmode,
5532: INTVAL (src) & ((1 << INTVAL (width)) - 1));
5533: }
5534:
5535: /* Compute SRC's hash code, and also notice if it
5536: should not be recorded at all. In that case,
5537: prevent any further processing of this assignment. */
5538: do_not_record = 0;
5539: hash_arg_in_memory = 0;
5540: hash_arg_in_struct = 0;
5541:
5542: sets[i].src = src;
5543: sets[i].src_hash_code = HASH (src, mode);
5544: sets[i].src_volatile = do_not_record;
5545: sets[i].src_in_memory = hash_arg_in_memory;
5546: sets[i].src_in_struct = hash_arg_in_struct;
5547:
5548: /* If source is a perverse subreg (such as QI treated as an SI),
5549: treat it as volatile. It may do the work of an SI in one context
5550: where the extra bits are not being used, but cannot replace an SI
5551: in general. */
5552: if (GET_CODE (src) == SUBREG
5553: && (GET_MODE_SIZE (GET_MODE (src))
5554: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
5555: sets[i].src_volatile = 1;
5556:
5557: /* Locate all possible equivalent forms for SRC. Try to replace
5558: SRC in the insn with each cheaper equivalent.
5559:
5560: We have the following types of equivalents: SRC itself, a folded
5561: version, a value given in a REG_EQUAL note, or a value related
5562: to a constant.
5563:
5564: Each of these equivalents may be part of an additional class
5565: of equivalents (if more than one is in the table, they must be in
5566: the same class; we check for this).
5567:
5568: If the source is volatile, we don't do any table lookups.
5569:
5570: We note any constant equivalent for possible later use in a
5571: REG_NOTE. */
5572:
5573: if (!sets[i].src_volatile)
5574: elt = lookup (src, sets[i].src_hash_code, mode);
5575:
5576: sets[i].src_elt = elt;
5577:
5578: if (elt && src_eqv_here && src_eqv_elt)
5579: {
5580: if (elt->first_same_value != src_eqv_elt->first_same_value)
5581: {
5582: /* The REG_EQUAL is indicating that two formerly distinct
5583: classes are now equivalent. So merge them. */
5584: merge_equiv_classes (elt, src_eqv_elt);
5585: src_eqv_hash_code = HASH (src_eqv, elt->mode);
5586: src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, elt->mode);
5587: }
5588:
5589: src_eqv_here = 0;
5590: }
5591:
5592: else if (src_eqv_elt)
5593: elt = src_eqv_elt;
5594:
5595: /* Try to find a constant somewhere and record it in `src_const'.
5596: Record its table element, if any, in `src_const_elt'. Look in
5597: any known equivalences first. (If the constant is not in the
5598: table, also set `sets[i].src_const_hash_code'). */
5599: if (elt)
5600: for (p = elt->first_same_value; p; p = p->next_same_value)
5601: if (p->is_const)
5602: {
5603: src_const = p->exp;
5604: src_const_elt = elt;
5605: break;
5606: }
5607:
5608: if (src_const == 0
5609: && (CONSTANT_P (src_folded)
5610: /* Consider (minus (label_ref L1) (label_ref L2)) as
5611: "constant" here so we will record it. This allows us
5612: to fold switch statements when an ADDR_DIFF_VEC is used. */
5613: || (GET_CODE (src_folded) == MINUS
5614: && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
5615: && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
5616: src_const = src_folded, src_const_elt = elt;
5617: else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
5618: src_const = src_eqv_here, src_const_elt = src_eqv_elt;
5619:
5620: /* If we don't know if the constant is in the table, get its
5621: hash code and look it up. */
5622: if (src_const && src_const_elt == 0)
5623: {
5624: sets[i].src_const_hash_code = HASH (src_const, mode);
5625: src_const_elt = lookup (src_const, sets[i].src_const_hash_code,
5626: mode);
5627: }
5628:
5629: sets[i].src_const = src_const;
5630: sets[i].src_const_elt = src_const_elt;
5631:
5632: /* If the constant and our source are both in the table, mark them as
5633: equivalent. Otherwise, if a constant is in the table but the source
5634: isn't, set ELT to it. */
5635: if (src_const_elt && elt
5636: && src_const_elt->first_same_value != elt->first_same_value)
5637: merge_equiv_classes (elt, src_const_elt);
5638: else if (src_const_elt && elt == 0)
5639: elt = src_const_elt;
5640:
5641: /* See if there is a register linearly related to a constant
5642: equivalent of SRC. */
5643: if (src_const
5644: && (GET_CODE (src_const) == CONST
5645: || (src_const_elt && src_const_elt->related_value != 0)))
5646: {
5647: src_related = use_related_value (src_const, src_const_elt);
5648: if (src_related)
5649: {
5650: struct table_elt *src_related_elt
5651: = lookup (src_related, HASH (src_related, mode), mode);
5652: if (src_related_elt && elt)
5653: {
5654: if (elt->first_same_value
5655: != src_related_elt->first_same_value)
5656: /* This can occur when we previously saw a CONST
5657: involving a SYMBOL_REF and then see the SYMBOL_REF
5658: twice. Merge the involved classes. */
5659: merge_equiv_classes (elt, src_related_elt);
5660:
5661: src_related = 0;
5662: src_related_elt = 0;
5663: }
5664: else if (src_related_elt && elt == 0)
5665: elt = src_related_elt;
5666: }
5667: }
5668:
1.1.1.2 root 5669: /* Another possibility is that we have an AND with a constant in
5670: a mode narrower than a word. If so, it might have been generated
5671: as part of an "if" which would narrow the AND. If we already
5672: have done the AND in a wider mode, we can use a SUBREG of that
5673: value. */
5674:
5675: if (flag_expensive_optimizations && ! src_related
5676: && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
5677: && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
5678: {
5679: enum machine_mode tmode;
5680: rtx new_and = gen_rtx (AND, VOIDmode, 0, XEXP (src, 1));
5681:
5682: for (tmode = GET_MODE_WIDER_MODE (mode);
5683: GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
5684: tmode = GET_MODE_WIDER_MODE (tmode))
5685: {
5686: rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
5687: struct table_elt *larger_elt;
5688:
5689: if (inner)
5690: {
5691: PUT_MODE (new_and, tmode);
5692: XEXP (new_and, 0) = inner;
5693: larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
5694: if (larger_elt == 0)
5695: continue;
5696:
5697: for (larger_elt = larger_elt->first_same_value;
5698: larger_elt; larger_elt = larger_elt->next_same_value)
5699: if (GET_CODE (larger_elt->exp) == REG)
5700: {
5701: src_related
5702: = gen_lowpart_if_possible (mode, larger_elt->exp);
5703: break;
5704: }
5705:
5706: if (src_related)
5707: break;
5708: }
5709: }
5710: }
5711:
1.1 root 5712: if (src == src_folded)
5713: src_folded = 0;
5714:
5715: /* At this point, ELT, if non-zero, points to a class of expressions
5716: equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5717: and SRC_RELATED, if non-zero, each contain additional equivalent
5718: expressions. Prune these latter expressions by deleting expressions
5719: already in the equivalence class.
5720:
5721: Check for an equivalent identical to the destination. If found,
5722: this is the preferred equivalent since it will likely lead to
5723: elimination of the insn. Indicate this by placing it in
5724: `src_related'. */
5725:
5726: if (elt) elt = elt->first_same_value;
5727: for (p = elt; p; p = p->next_same_value)
5728: {
5729: enum rtx_code code = GET_CODE (p->exp);
5730:
5731: /* If the expression is not valid, ignore it. Then we do not
5732: have to check for validity below. In most cases, we can use
5733: `rtx_equal_p', since canonicalization has already been done. */
5734: if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5735: continue;
5736:
5737: if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5738: src = 0;
5739: else if (src_folded && GET_CODE (src_folded) == code
5740: && rtx_equal_p (src_folded, p->exp))
5741: src_folded = 0;
5742: else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5743: && rtx_equal_p (src_eqv_here, p->exp))
5744: src_eqv_here = 0;
5745: else if (src_related && GET_CODE (src_related) == code
5746: && rtx_equal_p (src_related, p->exp))
5747: src_related = 0;
5748:
5749: /* This is the same as the destination of the insns, we want
5750: to prefer it. Copy it to src_related. The code below will
5751: then give it a negative cost. */
5752: if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5753: src_related = dest;
5754:
5755: }
5756:
5757: /* Find the cheapest valid equivalent, trying all the available
5758: possibilities. Prefer items not in the hash table to ones
5759: that are when they are equal cost. Note that we can never
5760: worsen an insn as the current contents will also succeed.
1.1.1.3 ! root 5761: If we find an equivalent identical to the destination, use it as best,
1.1 root 5762: since this insn will probably be eliminated in that case. */
5763: if (src)
5764: {
5765: if (rtx_equal_p (src, dest))
5766: src_cost = -1;
5767: else
5768: src_cost = COST (src);
5769: }
5770:
5771: if (src_eqv_here)
5772: {
5773: if (rtx_equal_p (src_eqv_here, dest))
5774: src_eqv_cost = -1;
5775: else
5776: src_eqv_cost = COST (src_eqv_here);
5777: }
5778:
5779: if (src_folded)
5780: {
5781: if (rtx_equal_p (src_folded, dest))
5782: src_folded_cost = -1;
5783: else
5784: src_folded_cost = COST (src_folded);
5785: }
5786:
5787: if (src_related)
5788: {
5789: if (rtx_equal_p (src_related, dest))
5790: src_related_cost = -1;
5791: else
5792: src_related_cost = COST (src_related);
5793: }
5794:
5795: /* If this was an indirect jump insn, a known label will really be
5796: cheaper even though it looks more expensive. */
5797: if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5798: src_folded = src_const, src_folded_cost = -1;
5799:
5800: /* Terminate loop when replacement made. This must terminate since
5801: the current contents will be tested and will always be valid. */
5802: while (1)
5803: {
5804: rtx trial;
5805:
5806: /* Skip invalid entries. */
5807: while (elt && GET_CODE (elt->exp) != REG
5808: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5809: elt = elt->next_same_value;
5810:
5811: if (elt) src_elt_cost = elt->cost;
5812:
5813: /* Find cheapest and skip it for the next time. For items
5814: of equal cost, use this order:
5815: src_folded, src, src_eqv, src_related and hash table entry. */
5816: if (src_folded_cost <= src_cost
5817: && src_folded_cost <= src_eqv_cost
5818: && src_folded_cost <= src_related_cost
5819: && src_folded_cost <= src_elt_cost)
5820: {
5821: trial = src_folded, src_folded_cost = 10000;
5822: if (src_folded_force_flag)
5823: trial = force_const_mem (mode, trial);
5824: }
5825: else if (src_cost <= src_eqv_cost
5826: && src_cost <= src_related_cost
5827: && src_cost <= src_elt_cost)
5828: trial = src, src_cost = 10000;
5829: else if (src_eqv_cost <= src_related_cost
5830: && src_eqv_cost <= src_elt_cost)
5831: trial = src_eqv_here, src_eqv_cost = 10000;
5832: else if (src_related_cost <= src_elt_cost)
5833: trial = src_related, src_related_cost = 10000;
5834: else
5835: {
1.1.1.3 ! root 5836: trial = copy_rtx (elt->exp);
1.1 root 5837: elt = elt->next_same_value;
5838: src_elt_cost = 10000;
5839: }
5840:
5841: /* We don't normally have an insn matching (set (pc) (pc)), so
5842: check for this separately here. We will delete such an
5843: insn below.
5844:
5845: Tablejump insns contain a USE of the table, so simply replacing
5846: the operand with the constant won't match. This is simply an
5847: unconditional branch, however, and is therefore valid. Just
5848: insert the substitution here and we will delete and re-emit
5849: the insn later. */
5850:
5851: if (n_sets == 1 && dest == pc_rtx
5852: && (trial == pc_rtx
5853: || (GET_CODE (trial) == LABEL_REF
5854: && ! condjump_p (insn))))
5855: {
5856: /* If TRIAL is a label in front of a jump table, we are
5857: really falling through the switch (this is how casesi
5858: insns work), so we must branch around the table. */
5859: if (GET_CODE (trial) == CODE_LABEL
5860: && NEXT_INSN (trial) != 0
5861: && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
5862: && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
5863: || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
5864:
5865: trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial));
5866:
5867: SET_SRC (sets[i].rtl) = trial;
5868: break;
5869: }
5870:
5871: /* Look for a substitution that makes a valid insn. */
5872: else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
1.1.1.3 ! root 5873: {
! 5874: SET_SRC (sets[i].rtl) = canon_reg (SET_SRC (sets[i].rtl), insn);
! 5875: break;
! 5876: }
1.1 root 5877:
5878: /* If we previously found constant pool entries for
5879: constants and this is a constant, try making a
5880: pool entry. Put it in src_folded unless we already have done
5881: this since that is where it likely came from. */
5882:
5883: else if (constant_pool_entries_cost
5884: && CONSTANT_P (trial)
5885: && (src_folded == 0 || GET_CODE (src_folded) != MEM)
5886: && GET_MODE_CLASS (mode) != MODE_CC)
5887: {
5888: src_folded_force_flag = 1;
5889: src_folded = trial;
5890: src_folded_cost = constant_pool_entries_cost;
5891: }
5892: }
5893:
5894: src = SET_SRC (sets[i].rtl);
5895:
5896: /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5897: However, there is an important exception: If both are registers
5898: that are not the head of their equivalence class, replace SET_SRC
5899: with the head of the class. If we do not do this, we will have
5900: both registers live over a portion of the basic block. This way,
5901: their lifetimes will likely abut instead of overlapping. */
5902: if (GET_CODE (dest) == REG
5903: && REGNO_QTY_VALID_P (REGNO (dest))
5904: && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
5905: && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
5906: && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5907: /* Don't do this if the original insn had a hard reg as
5908: SET_SRC. */
5909: && (GET_CODE (sets[i].src) != REG
5910: || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
5911: /* We can't call canon_reg here because it won't do anything if
5912: SRC is a hard register. */
5913: {
5914: int first = qty_first_reg[reg_qty[REGNO (src)]];
5915:
5916: src = SET_SRC (sets[i].rtl)
5917: = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
5918: : gen_rtx (REG, GET_MODE (src), first);
5919:
5920: /* If we had a constant that is cheaper than what we are now
5921: setting SRC to, use that constant. We ignored it when we
5922: thought we could make this into a no-op. */
5923: if (src_const && COST (src_const) < COST (src)
5924: && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
5925: src = src_const;
5926: }
5927:
5928: /* If we made a change, recompute SRC values. */
5929: if (src != sets[i].src)
5930: {
5931: do_not_record = 0;
5932: hash_arg_in_memory = 0;
5933: hash_arg_in_struct = 0;
5934: sets[i].src = src;
5935: sets[i].src_hash_code = HASH (src, mode);
5936: sets[i].src_volatile = do_not_record;
5937: sets[i].src_in_memory = hash_arg_in_memory;
5938: sets[i].src_in_struct = hash_arg_in_struct;
5939: sets[i].src_elt = lookup (src, sets[i].src_hash_code, mode);
5940: }
5941:
5942: /* If this is a single SET, we are setting a register, and we have an
5943: equivalent constant, we want to add a REG_NOTE. We don't want
5944: to write a REG_EQUAL note for a constant pseudo since verifying that
1.1.1.2 root 5945: that pseudo hasn't been eliminated is a pain. Such a note also
1.1 root 5946: won't help anything. */
5947: if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5948: && GET_CODE (src_const) != REG)
5949: {
5950: rtx tem = find_reg_note (insn, REG_EQUAL, 0);
5951:
5952: /* Record the actual constant value in a REG_EQUAL note, making
5953: a new one if one does not already exist. */
5954: if (tem)
5955: XEXP (tem, 0) = src_const;
5956: else
5957: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
5958: src_const, REG_NOTES (insn));
5959:
5960: /* If storing a constant value in a register that
5961: previously held the constant value 0,
5962: record this fact with a REG_WAS_0 note on this insn.
5963:
5964: Note that the *register* is required to have previously held 0,
5965: not just any register in the quantity and we must point to the
5966: insn that set that register to zero.
5967:
5968: Rather than track each register individually, we just see if
5969: the last set for this quantity was for this register. */
5970:
5971: if (REGNO_QTY_VALID_P (REGNO (dest))
5972: && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
5973: {
5974: /* See if we previously had a REG_WAS_0 note. */
5975: rtx note = find_reg_note (insn, REG_WAS_0, 0);
5976: rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
5977:
5978: if ((tem = single_set (const_insn)) != 0
5979: && rtx_equal_p (SET_DEST (tem), dest))
5980: {
5981: if (note)
5982: XEXP (note, 0) = const_insn;
5983: else
5984: REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0,
5985: const_insn, REG_NOTES (insn));
5986: }
5987: }
5988: }
5989:
5990: /* Now deal with the destination. */
5991: do_not_record = 0;
5992: sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
5993:
5994: /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5995: to the MEM or REG within it. */
5996: while (GET_CODE (dest) == SIGN_EXTRACT
5997: || GET_CODE (dest) == ZERO_EXTRACT
5998: || GET_CODE (dest) == SUBREG
5999: || GET_CODE (dest) == STRICT_LOW_PART)
6000: {
6001: sets[i].inner_dest_loc = &XEXP (dest, 0);
6002: dest = XEXP (dest, 0);
6003: }
6004:
6005: sets[i].inner_dest = dest;
6006:
6007: if (GET_CODE (dest) == MEM)
6008: {
6009: dest = fold_rtx (dest, insn);
6010:
6011: /* Decide whether we invalidate everything in memory,
6012: or just things at non-fixed places.
6013: Writing a large aggregate must invalidate everything
6014: because we don't know how long it is. */
6015: note_mem_written (dest, &writes_memory);
6016: }
6017:
6018: /* Compute the hash code of the destination now,
6019: before the effects of this instruction are recorded,
6020: since the register values used in the address computation
6021: are those before this instruction. */
6022: sets[i].dest_hash_code = HASH (dest, mode);
6023:
6024: /* Don't enter a bit-field in the hash table
6025: because the value in it after the store
6026: may not equal what was stored, due to truncation. */
6027:
6028: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6029: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6030: {
6031: rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6032:
6033: if (src_const != 0 && GET_CODE (src_const) == CONST_INT
6034: && GET_CODE (width) == CONST_INT
6035: && INTVAL (width) < HOST_BITS_PER_INT
6036: && ! (INTVAL (src_const) & ((-1) << INTVAL (width))))
6037: /* Exception: if the value is constant,
6038: and it won't be truncated, record it. */
6039: ;
6040: else
6041: {
6042: /* This is chosen so that the destination will be invalidated
6043: but no new value will be recorded.
6044: We must invalidate because sometimes constant
6045: values can be recorded for bitfields. */
6046: sets[i].src_elt = 0;
6047: sets[i].src_volatile = 1;
6048: src_eqv = 0;
6049: src_eqv_elt = 0;
6050: }
6051: }
6052:
6053: /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6054: the insn. */
6055: else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
6056: {
6057: PUT_CODE (insn, NOTE);
6058: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
6059: NOTE_SOURCE_FILE (insn) = 0;
6060: cse_jumps_altered = 1;
6061: /* One less use of the label this insn used to jump to. */
6062: --LABEL_NUSES (JUMP_LABEL (insn));
6063: /* No more processing for this set. */
6064: sets[i].rtl = 0;
6065: }
6066:
6067: /* If this SET is now setting PC to a label, we know it used to
6068: be a conditional or computed branch. So we see if we can follow
6069: it. If it was a computed branch, delete it and re-emit. */
6070: else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
6071: {
6072: rtx p;
6073:
6074: /* If this is not in the format for a simple branch and
6075: we are the only SET in it, re-emit it. */
6076: if (! simplejump_p (insn) && n_sets == 1)
6077: {
6078: rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
6079: JUMP_LABEL (new) = XEXP (src, 0);
6080: LABEL_NUSES (XEXP (src, 0))++;
6081: delete_insn (insn);
6082: insn = new;
6083: }
6084:
6085: /* Now that we've converted this jump to an unconditional jump,
6086: there is dead code after it. Delete the dead code until we
6087: reach a BARRIER, the end of the function, or a label. Do
6088: not delete NOTEs except for NOTE_INSN_DELETED since later
6089: phases assume these notes are retained. */
6090:
6091: p = insn;
6092:
6093: while (NEXT_INSN (p) != 0
6094: && GET_CODE (NEXT_INSN (p)) != BARRIER
6095: && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
6096: {
6097: if (GET_CODE (NEXT_INSN (p)) != NOTE
6098: || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
6099: delete_insn (NEXT_INSN (p));
6100: else
6101: p = NEXT_INSN (p);
6102: }
6103:
6104: /* If we don't have a BARRIER immediately after INSN, put one there.
6105: Much code assumes that there are no NOTEs between a JUMP_INSN and
6106: BARRIER. */
6107:
6108: if (NEXT_INSN (insn) == 0
6109: || GET_CODE (NEXT_INSN (insn)) != BARRIER)
6110: emit_barrier_after (insn);
6111:
6112: /* We might have two BARRIERs separated by notes. Delete the second
6113: one if so. */
6114:
1.1.1.2 root 6115: if (p != insn && NEXT_INSN (p) != 0
6116: && GET_CODE (NEXT_INSN (p)) == BARRIER)
1.1 root 6117: delete_insn (NEXT_INSN (p));
6118:
6119: cse_jumps_altered = 1;
6120: sets[i].rtl = 0;
6121: }
6122:
1.1.1.3 ! root 6123: /* If destination is volatile, invalidate it and then do no further
! 6124: processing for this assignment. */
1.1 root 6125:
6126: else if (do_not_record)
1.1.1.3 ! root 6127: {
! 6128: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
! 6129: || GET_CODE (dest) == MEM)
! 6130: invalidate (dest);
! 6131: sets[i].rtl = 0;
! 6132: }
1.1 root 6133:
6134: if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
6135: sets[i].dest_hash_code = HASH (SET_DEST (sets[i].rtl), mode);
6136:
6137: #ifdef HAVE_cc0
6138: /* If setting CC0, record what it was set to, or a constant, if it
6139: is equivalent to a constant. If it is being set to a floating-point
6140: value, make a COMPARE with the appropriate constant of 0. If we
6141: don't do this, later code can interpret this as a test against
6142: const0_rtx, which can cause problems if we try to put it into an
6143: insn as a floating-point operand. */
6144: if (dest == cc0_rtx)
6145: {
6146: this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
6147: this_insn_cc0_mode = mode;
6148: if (GET_MODE_CLASS (mode) == MODE_FLOAT)
6149: this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0,
6150: CONST0_RTX (mode));
6151: }
6152: #endif
6153: }
6154:
6155: /* Now enter all non-volatile source expressions in the hash table
6156: if they are not already present.
6157: Record their equivalence classes in src_elt.
6158: This way we can insert the corresponding destinations into
6159: the same classes even if the actual sources are no longer in them
6160: (having been invalidated). */
6161:
6162: if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
6163: && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
6164: {
6165: register struct table_elt *elt;
6166: register struct table_elt *classp = sets[0].src_elt;
6167: rtx dest = SET_DEST (sets[0].rtl);
6168: enum machine_mode eqvmode = GET_MODE (dest);
6169:
6170: if (GET_CODE (dest) == STRICT_LOW_PART)
6171: {
6172: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6173: classp = 0;
6174: }
6175: if (insert_regs (src_eqv, classp, 0))
6176: src_eqv_hash_code = HASH (src_eqv, eqvmode);
6177: elt = insert (src_eqv, classp, src_eqv_hash_code, eqvmode);
6178: elt->in_memory = src_eqv_in_memory;
6179: elt->in_struct = src_eqv_in_struct;
6180: src_eqv_elt = elt;
6181: }
6182:
6183: for (i = 0; i < n_sets; i++)
6184: if (sets[i].rtl && ! sets[i].src_volatile
6185: && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
6186: {
6187: if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
6188: {
6189: /* REG_EQUAL in setting a STRICT_LOW_PART
6190: gives an equivalent for the entire destination register,
6191: not just for the subreg being stored in now.
6192: This is a more interesting equivalence, so we arrange later
6193: to treat the entire reg as the destination. */
6194: sets[i].src_elt = src_eqv_elt;
6195: sets[i].src_hash_code = src_eqv_hash_code;
6196: }
6197: else
6198: {
6199: /* Insert source and constant equivalent into hash table, if not
6200: already present. */
6201: register struct table_elt *classp = src_eqv_elt;
6202: register rtx src = sets[i].src;
6203: register rtx dest = SET_DEST (sets[i].rtl);
6204: enum machine_mode mode
6205: = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6206:
6207: if (sets[i].src_elt == 0)
6208: {
6209: register struct table_elt *elt;
6210:
6211: /* Note that these insert_regs calls cannot remove
6212: any of the src_elt's, because they would have failed to
6213: match if not still valid. */
6214: if (insert_regs (src, classp, 0))
6215: sets[i].src_hash_code = HASH (src, mode);
6216: elt = insert (src, classp, sets[i].src_hash_code, mode);
6217: elt->in_memory = sets[i].src_in_memory;
6218: elt->in_struct = sets[i].src_in_struct;
6219: sets[i].src_elt = classp = elt;
6220: }
6221:
6222: if (sets[i].src_const && sets[i].src_const_elt == 0
6223: && src != sets[i].src_const
6224: && ! rtx_equal_p (sets[i].src_const, src))
6225: sets[i].src_elt = insert (sets[i].src_const, classp,
6226: sets[i].src_const_hash_code, mode);
6227: }
6228: }
6229: else if (sets[i].src_elt == 0)
6230: /* If we did not insert the source into the hash table (e.g., it was
6231: volatile), note the equivalence class for the REG_EQUAL value, if any,
6232: so that the destination goes into that class. */
6233: sets[i].src_elt = src_eqv_elt;
6234:
6235: invalidate_from_clobbers (&writes_memory, x);
6236: /* Memory, and some registers, are invalidate by subroutine calls. */
6237: if (GET_CODE (insn) == CALL_INSN)
6238: {
6239: static struct write_data everything = {0, 1, 1, 1};
6240: invalidate_memory (&everything);
6241: invalidate_for_call ();
6242: }
6243:
6244: /* Now invalidate everything set by this instruction.
6245: If a SUBREG or other funny destination is being set,
6246: sets[i].rtl is still nonzero, so here we invalidate the reg
6247: a part of which is being set. */
6248:
6249: for (i = 0; i < n_sets; i++)
6250: if (sets[i].rtl)
6251: {
6252: register rtx dest = sets[i].inner_dest;
6253:
6254: /* Needed for registers to remove the register from its
6255: previous quantity's chain.
6256: Needed for memory if this is a nonvarying address, unless
6257: we have just done an invalidate_memory that covers even those. */
6258: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
6259: || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
6260: invalidate (dest);
6261: }
6262:
6263: /* Make sure registers mentioned in destinations
6264: are safe for use in an expression to be inserted.
6265: This removes from the hash table
6266: any invalid entry that refers to one of these registers.
6267:
6268: We don't care about the return value from mention_regs because
6269: we are going to hash the SET_DEST values unconditionally. */
6270:
6271: for (i = 0; i < n_sets; i++)
6272: if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
6273: mention_regs (SET_DEST (sets[i].rtl));
6274:
6275: /* We may have just removed some of the src_elt's from the hash table.
6276: So replace each one with the current head of the same class. */
6277:
6278: for (i = 0; i < n_sets; i++)
6279: if (sets[i].rtl)
6280: {
6281: if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6282: /* If elt was removed, find current head of same class,
6283: or 0 if nothing remains of that class. */
6284: {
6285: register struct table_elt *elt = sets[i].src_elt;
6286:
6287: while (elt && elt->prev_same_value)
6288: elt = elt->prev_same_value;
6289:
6290: while (elt && elt->first_same_value == 0)
6291: elt = elt->next_same_value;
6292: sets[i].src_elt = elt ? elt->first_same_value : 0;
6293: }
6294: }
6295:
6296: /* Now insert the destinations into their equivalence classes. */
6297:
6298: for (i = 0; i < n_sets; i++)
6299: if (sets[i].rtl)
6300: {
6301: register rtx dest = SET_DEST (sets[i].rtl);
6302: register struct table_elt *elt;
6303:
6304: /* Don't record value if we are not supposed to risk allocating
6305: floating-point values in registers that might be wider than
6306: memory. */
6307: if ((flag_float_store
6308: && GET_CODE (dest) == MEM
6309: && GET_MODE_CLASS (GET_MODE (dest)) == MODE_FLOAT)
6310: /* Don't record values of destinations set inside a libcall block
6311: since we might delete the libcall. Things should have been set
6312: up so we won't want to reuse such a value, but we play it safe
6313: here. */
6314: || in_libcall_block
6315: /* If we didn't put a REG_EQUAL value or a source into the hash
6316: table, there is no point is recording DEST. */
6317: || sets[i].src_elt == 0)
6318: continue;
6319:
6320: /* STRICT_LOW_PART isn't part of the value BEING set,
6321: and neither is the SUBREG inside it.
6322: Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6323: if (GET_CODE (dest) == STRICT_LOW_PART)
6324: dest = SUBREG_REG (XEXP (dest, 0));
6325:
6326: if (GET_CODE (dest) == REG)
6327: /* Registers must also be inserted into chains for quantities. */
6328: if (insert_regs (dest, sets[i].src_elt, 1))
6329: /* If `insert_regs' changes something, the hash code must be
6330: recalculated. */
6331: sets[i].dest_hash_code = HASH (dest, GET_MODE (dest));
6332:
6333: elt = insert (dest, sets[i].src_elt,
6334: sets[i].dest_hash_code, GET_MODE (dest));
6335: elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM;
6336: if (elt->in_memory)
6337: {
6338: /* This implicitly assumes a whole struct
6339: need not have MEM_IN_STRUCT_P.
6340: But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6341: elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
6342: || sets[i].inner_dest != SET_DEST (sets[i].rtl));
6343: }
6344:
1.1.1.3 ! root 6345: /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
! 6346: narrower than M2, and both M1 and M2 are the same number of words,
! 6347: we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
! 6348: make that equivalence as well.
1.1 root 6349:
6350: However, BAR may have equivalences for which gen_lowpart_if_possible
6351: will produce a simpler value than gen_lowpart_if_possible applied to
6352: BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6353: BAR's equivalences. If we don't get a simplified form, make
6354: the SUBREG. It will not be used in an equivalence, but will
6355: cause two similar assignments to be detected.
6356:
6357: Note the loop below will find SUBREG_REG (DEST) since we have
6358: already entered SRC and DEST of the SET in the table. */
6359:
6360: if (GET_CODE (dest) == SUBREG
1.1.1.3 ! root 6361: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) / UNITS_PER_WORD
! 6362: == GET_MODE_SIZE (GET_MODE (dest)) / UNITS_PER_WORD)
1.1 root 6363: && (GET_MODE_SIZE (GET_MODE (dest))
6364: >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6365: && sets[i].src_elt != 0)
6366: {
6367: enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6368: struct table_elt *elt, *classp = 0;
6369:
6370: for (elt = sets[i].src_elt->first_same_value; elt;
6371: elt = elt->next_same_value)
6372: {
6373: rtx new_src = 0;
6374: int src_hash;
6375: struct table_elt *src_elt;
6376:
6377: /* Ignore invalid entries. */
6378: if (GET_CODE (elt->exp) != REG
6379: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6380: continue;
6381:
6382: new_src = gen_lowpart_if_possible (new_mode, elt->exp);
6383: if (new_src == 0)
6384: new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0);
6385:
6386: src_hash = HASH (new_src, new_mode);
6387: src_elt = lookup (new_src, src_hash, new_mode);
6388:
6389: /* Put the new source in the hash table is if isn't
6390: already. */
6391: if (src_elt == 0)
6392: {
6393: if (insert_regs (new_src, classp, 0))
6394: src_hash = HASH (new_src, new_mode);
6395: src_elt = insert (new_src, classp, src_hash, new_mode);
6396: src_elt->in_memory = elt->in_memory;
6397: src_elt->in_struct = elt->in_struct;
6398: }
6399: else if (classp && classp != src_elt->first_same_value)
6400: /* Show that two things that we've seen before are
6401: actually the same. */
6402: merge_equiv_classes (src_elt, classp);
6403:
6404: classp = src_elt->first_same_value;
6405: }
6406: }
6407: }
6408:
6409: /* Special handling for (set REG0 REG1)
6410: where REG0 is the "cheapest", cheaper than REG1.
6411: After cse, REG1 will probably not be used in the sequel,
6412: so (if easily done) change this insn to (set REG1 REG0) and
6413: replace REG1 with REG0 in the previous insn that computed their value.
6414: Then REG1 will become a dead store and won't cloud the situation
6415: for later optimizations.
6416:
6417: Do not make this change if REG1 is a hard register, because it will
6418: then be used in the sequel and we may be changing a two-operand insn
6419: into a three-operand insn.
6420:
6421: Also do not do this if we are operating on a copy of INSN. */
6422:
6423: if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
6424: && NEXT_INSN (PREV_INSN (insn)) == insn
6425: && GET_CODE (SET_SRC (sets[0].rtl)) == REG
6426: && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
6427: && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
6428: && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
6429: == REGNO (SET_DEST (sets[0].rtl))))
6430: {
6431: rtx prev = PREV_INSN (insn);
6432: while (prev && GET_CODE (prev) == NOTE)
6433: prev = PREV_INSN (prev);
6434:
6435: if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
6436: && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
6437: {
6438: rtx dest = SET_DEST (sets[0].rtl);
6439: rtx note = find_reg_note (prev, REG_EQUIV, 0);
6440:
6441: validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
6442: validate_change (insn, & SET_DEST (sets[0].rtl),
6443: SET_SRC (sets[0].rtl), 1);
6444: validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
6445: apply_change_group ();
6446:
6447: /* If REG1 was equivalent to a constant, REG0 is not. */
6448: if (note)
6449: PUT_REG_NOTE_KIND (note, REG_EQUAL);
6450:
6451: /* If there was a REG_WAS_0 note on PREV, remove it. Move
6452: any REG_WAS_0 note on INSN to PREV. */
6453: note = find_reg_note (prev, REG_WAS_0, 0);
6454: if (note)
6455: remove_note (prev, note);
6456:
6457: note = find_reg_note (insn, REG_WAS_0, 0);
6458: if (note)
6459: {
6460: remove_note (insn, note);
6461: XEXP (note, 1) = REG_NOTES (prev);
6462: REG_NOTES (prev) = note;
6463: }
6464: }
6465: }
6466:
6467: /* If this is a conditional jump insn, record any known equivalences due to
6468: the condition being tested. */
6469:
6470: last_jump_equiv_class = 0;
6471: if (GET_CODE (insn) == JUMP_INSN
6472: && n_sets == 1 && GET_CODE (x) == SET
6473: && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
6474: record_jump_equiv (insn, 0);
6475:
6476: #ifdef HAVE_cc0
6477: /* If the previous insn set CC0 and this insn no longer references CC0,
6478: delete the previous insn. Here we use the fact that nothing expects CC0
6479: to be valid over an insn, which is true until the final pass. */
6480: if (prev_insn && GET_CODE (prev_insn) == INSN
6481: && (tem = single_set (prev_insn)) != 0
6482: && SET_DEST (tem) == cc0_rtx
6483: && ! reg_mentioned_p (cc0_rtx, x))
6484: {
6485: PUT_CODE (prev_insn, NOTE);
6486: NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
6487: NOTE_SOURCE_FILE (prev_insn) = 0;
6488: }
6489:
6490: prev_insn_cc0 = this_insn_cc0;
6491: prev_insn_cc0_mode = this_insn_cc0_mode;
6492: #endif
6493:
6494: prev_insn = insn;
6495: }
6496:
6497: /* Store 1 in *WRITES_PTR for those categories of memory ref
6498: that must be invalidated when the expression WRITTEN is stored in.
6499: If WRITTEN is null, say everything must be invalidated. */
6500:
6501: static void
6502: note_mem_written (written, writes_ptr)
6503: rtx written;
6504: struct write_data *writes_ptr;
6505: {
6506: static struct write_data everything = {0, 1, 1, 1};
6507:
6508: if (written == 0)
6509: *writes_ptr = everything;
6510: else if (GET_CODE (written) == MEM)
6511: {
6512: /* Pushing or popping the stack invalidates just the stack pointer. */
6513: rtx addr = XEXP (written, 0);
6514: if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6515: || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6516: && GET_CODE (XEXP (addr, 0)) == REG
6517: && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6518: {
6519: writes_ptr->sp = 1;
6520: return;
6521: }
6522: else if (GET_MODE (written) == BLKmode)
6523: *writes_ptr = everything;
6524: else if (cse_rtx_addr_varies_p (written))
6525: {
6526: /* A varying address that is a sum indicates an array element,
6527: and that's just as good as a structure element
6528: in implying that we need not invalidate scalar variables. */
6529: if (!(MEM_IN_STRUCT_P (written)
6530: || GET_CODE (XEXP (written, 0)) == PLUS))
6531: writes_ptr->all = 1;
6532: writes_ptr->nonscalar = 1;
6533: }
6534: writes_ptr->var = 1;
6535: }
6536: }
6537:
6538: /* Perform invalidation on the basis of everything about an insn
6539: except for invalidating the actual places that are SET in it.
6540: This includes the places CLOBBERed, and anything that might
6541: alias with something that is SET or CLOBBERed.
6542:
6543: W points to the writes_memory for this insn, a struct write_data
6544: saying which kinds of memory references must be invalidated.
6545: X is the pattern of the insn. */
6546:
6547: static void
6548: invalidate_from_clobbers (w, x)
6549: struct write_data *w;
6550: rtx x;
6551: {
6552: /* If W->var is not set, W specifies no action.
6553: If W->all is set, this step gets all memory refs
6554: so they can be ignored in the rest of this function. */
6555: if (w->var)
6556: invalidate_memory (w);
6557:
6558: if (w->sp)
6559: {
6560: if (reg_tick[STACK_POINTER_REGNUM] >= 0)
6561: reg_tick[STACK_POINTER_REGNUM]++;
6562:
6563: /* This should be *very* rare. */
6564: if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6565: invalidate (stack_pointer_rtx);
6566: }
6567:
6568: if (GET_CODE (x) == CLOBBER)
6569: {
6570: rtx ref = XEXP (x, 0);
6571: if (ref
6572: && (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6573: || (GET_CODE (ref) == MEM && ! w->all)))
6574: invalidate (ref);
6575: }
6576: else if (GET_CODE (x) == PARALLEL)
6577: {
6578: register int i;
6579: for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6580: {
6581: register rtx y = XVECEXP (x, 0, i);
6582: if (GET_CODE (y) == CLOBBER)
6583: {
6584: rtx ref = XEXP (y, 0);
6585: if (ref
6586: &&(GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6587: || (GET_CODE (ref) == MEM && !w->all)))
6588: invalidate (ref);
6589: }
6590: }
6591: }
6592: }
6593:
6594: /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6595: and replace any registers in them with either an equivalent constant
6596: or the canonical form of the register. If we are inside an address,
6597: only do this if the address remains valid.
6598:
6599: OBJECT is 0 except when within a MEM in which case it is the MEM.
6600:
6601: Return the replacement for X. */
6602:
6603: static rtx
6604: cse_process_notes (x, object)
6605: rtx x;
6606: rtx object;
6607: {
6608: enum rtx_code code = GET_CODE (x);
6609: char *fmt = GET_RTX_FORMAT (code);
6610: int qty;
6611: int i;
6612:
6613: switch (code)
6614: {
6615: case CONST_INT:
6616: case CONST:
6617: case SYMBOL_REF:
6618: case LABEL_REF:
6619: case CONST_DOUBLE:
6620: case PC:
6621: case CC0:
6622: case LO_SUM:
6623: return x;
6624:
6625: case MEM:
6626: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6627: return x;
6628:
6629: case EXPR_LIST:
6630: case INSN_LIST:
6631: if (REG_NOTE_KIND (x) == REG_EQUAL)
6632: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), 0);
6633: if (XEXP (x, 1))
6634: XEXP (x, 1) = cse_process_notes (XEXP (x, 1), 0);
6635: return x;
6636:
1.1.1.3 ! root 6637: case SIGN_EXTEND:
! 6638: case ZERO_EXTEND:
! 6639: {
! 6640: rtx new = cse_process_notes (XEXP (x, 0), object);
! 6641: /* We don't substitute VOIDmode constants into these rtx,
! 6642: since they would impede folding. */
! 6643: if (GET_MODE (new) != VOIDmode)
! 6644: validate_change (object, &XEXP (x, 0), new, 0);
! 6645: return x;
! 6646: }
! 6647:
1.1 root 6648: case REG:
6649: i = reg_qty[REGNO (x)];
6650:
6651: /* Return a constant or a constant register. */
6652: if (REGNO_QTY_VALID_P (REGNO (x))
6653: && qty_const[i] != 0
6654: && (CONSTANT_P (qty_const[i])
6655: || GET_CODE (qty_const[i]) == REG))
6656: {
6657: rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
6658: if (new)
6659: return new;
6660: }
6661:
6662: /* Otherwise, canonicalize this register. */
6663: return canon_reg (x, 0);
6664: }
6665:
6666: for (i = 0; i < GET_RTX_LENGTH (code); i++)
6667: if (fmt[i] == 'e')
6668: validate_change (object, &XEXP (x, i),
6669: cse_process_notes (XEXP (x, i), object), 0);
6670:
6671: return x;
6672: }
6673:
6674: /* Find common subexpressions between the end test of a loop and the beginning
6675: of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6676:
6677: Often we have a loop where an expression in the exit test is used
6678: in the body of the loop. For example "while (*p) *q++ = *p++;".
6679: Because of the way we duplicate the loop exit test in front of the loop,
6680: however, we don't detect that common subexpression. This will be caught
6681: when global cse is implemented, but this is a quite common case.
6682:
6683: This function handles the most common cases of these common expressions.
6684: It is called after we have processed the basic block ending with the
6685: NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6686: jumps to a label used only once. */
6687:
6688: static void
6689: cse_around_loop (loop_start)
6690: rtx loop_start;
6691: {
6692: rtx insn;
6693: int i;
6694: struct table_elt *p;
6695:
6696: /* If the jump at the end of the loop doesn't go to the start, we don't
6697: do anything. */
6698: for (insn = PREV_INSN (loop_start);
6699: insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6700: insn = PREV_INSN (insn))
6701: ;
6702:
6703: if (insn == 0
6704: || GET_CODE (insn) != NOTE
6705: || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6706: return;
6707:
6708: /* If the last insn of the loop (the end test) was an NE comparison,
6709: we will interpret it as an EQ comparison, since we fell through
6710: the loop. Any equivalances resulting from that comparison are
6711: therefore not valid and must be invalidated. */
6712: if (last_jump_equiv_class)
6713: for (p = last_jump_equiv_class->first_same_value; p;
6714: p = p->next_same_value)
6715: if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6716: || GET_CODE (p->exp) == SUBREG)
6717: invalidate (p->exp);
6718:
6719: /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6720: a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6721:
6722: The only thing we do with SET_DEST is invalidate entries, so we
6723: can safely process each SET in order. It is slightly less efficient
6724: to do so, but we only want to handle the most common cases. */
6725:
6726: for (insn = NEXT_INSN (loop_start);
6727: GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6728: && ! (GET_CODE (insn) == NOTE
6729: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6730: insn = NEXT_INSN (insn))
6731: {
6732: if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6733: && (GET_CODE (PATTERN (insn)) == SET
6734: || GET_CODE (PATTERN (insn)) == CLOBBER))
6735: cse_set_around_loop (PATTERN (insn), insn, loop_start);
6736: else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6737: && GET_CODE (PATTERN (insn)) == PARALLEL)
6738: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6739: if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6740: || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6741: cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6742: loop_start);
6743: }
6744: }
6745:
1.1.1.3 ! root 6746: /* Variable used for communications between the next two routines. */
! 6747:
! 6748: static struct write_data skipped_writes_memory;
! 6749:
! 6750: /* Process one SET of an insn that was skipped. We ignore CLOBBERs
! 6751: since they are done elsewhere. This function is called via note_stores. */
! 6752:
! 6753: static void
! 6754: invalidate_skipped_set (dest, set)
! 6755: rtx set;
! 6756: rtx dest;
! 6757: {
! 6758: if (GET_CODE (set) == CLOBBER
! 6759: #ifdef HAVE_cc0
! 6760: || dest == cc0_rtx
! 6761: #endif
! 6762: || dest == pc_rtx)
! 6763: return;
! 6764:
! 6765: if (GET_CODE (dest) == MEM)
! 6766: note_mem_written (dest, &skipped_writes_memory);
! 6767:
! 6768: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
! 6769: || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
! 6770: invalidate (dest);
! 6771: }
! 6772:
! 6773: /* Invalidate all insns from START up to the end of the function or the
! 6774: next label. This called when we wish to CSE around a block that is
! 6775: conditionally executed. */
! 6776:
! 6777: static void
! 6778: invalidate_skipped_block (start)
! 6779: rtx start;
! 6780: {
! 6781: rtx insn;
! 6782: int i;
! 6783: static struct write_data init = {0, 0, 0, 0};
! 6784: static struct write_data everything = {0, 1, 1, 1};
! 6785:
! 6786: for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
! 6787: insn = NEXT_INSN (insn))
! 6788: {
! 6789: if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
! 6790: continue;
! 6791:
! 6792: skipped_writes_memory = init;
! 6793:
! 6794: if (GET_CODE (insn) == CALL_INSN)
! 6795: {
! 6796: invalidate_for_call ();
! 6797: skipped_writes_memory = everything;
! 6798: }
! 6799:
! 6800: note_stores (PATTERN (insn), invalidate_skipped_set);
! 6801: invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn));
! 6802: }
! 6803: }
! 6804:
1.1 root 6805: /* Used for communication between the following two routines; contains a
6806: value to be checked for modification. */
6807:
6808: static rtx cse_check_loop_start_value;
6809:
6810: /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
6811: indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
6812:
6813: static void
6814: cse_check_loop_start (x, set)
6815: rtx x;
6816: rtx set;
6817: {
6818: if (cse_check_loop_start_value == 0
6819: || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6820: return;
6821:
6822: if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
6823: || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
6824: cse_check_loop_start_value = 0;
6825: }
6826:
6827: /* X is a SET or CLOBBER contained in INSN that was found near the start of
6828: a loop that starts with the label at LOOP_START.
6829:
6830: If X is a SET, we see if its SET_SRC is currently in our hash table.
6831: If so, we see if it has a value equal to some register used only in the
6832: loop exit code (as marked by jump.c).
6833:
6834: If those two conditions are true, we search backwards from the start of
6835: the loop to see if that same value was loaded into a register that still
6836: retains its value at the start of the loop.
6837:
6838: If so, we insert an insn after the load to copy the destination of that
6839: load into the equivalent register and (try to) replace our SET_SRC with that
6840: register.
6841:
6842: In any event, we invalidate whatever this SET or CLOBBER modifies. */
6843:
6844: static void
6845: cse_set_around_loop (x, insn, loop_start)
6846: rtx x;
6847: rtx insn;
6848: rtx loop_start;
6849: {
6850: rtx p;
6851: struct table_elt *src_elt;
6852: static struct write_data init = {0, 0, 0, 0};
6853: struct write_data writes_memory;
6854:
6855: writes_memory = init;
6856:
6857: /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6858: are setting PC or CC0 or whose SET_SRC is already a register. */
6859: if (GET_CODE (x) == SET
6860: && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6861: && GET_CODE (SET_SRC (x)) != REG)
6862: {
6863: src_elt = lookup (SET_SRC (x),
6864: HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6865: GET_MODE (SET_DEST (x)));
6866:
6867: if (src_elt)
6868: for (src_elt = src_elt->first_same_value; src_elt;
6869: src_elt = src_elt->next_same_value)
6870: if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6871: && COST (src_elt->exp) < COST (SET_SRC (x)))
6872: {
6873: rtx p, set;
6874:
6875: /* Look for an insn in front of LOOP_START that sets
6876: something in the desired mode to SET_SRC (x) before we hit
6877: a label or CALL_INSN. */
6878:
6879: for (p = prev_nonnote_insn (loop_start);
6880: p && GET_CODE (p) != CALL_INSN
6881: && GET_CODE (p) != CODE_LABEL;
6882: p = prev_nonnote_insn (p))
6883: if ((set = single_set (p)) != 0
6884: && GET_CODE (SET_DEST (set)) == REG
6885: && GET_MODE (SET_DEST (set)) == src_elt->mode
6886: && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6887: {
6888: /* We now have to ensure that nothing between P
6889: and LOOP_START modified anything referenced in
6890: SET_SRC (x). We know that nothing within the loop
6891: can modify it, or we would have invalidated it in
6892: the hash table. */
6893: rtx q;
6894:
6895: cse_check_loop_start_value = SET_SRC (x);
6896: for (q = p; q != loop_start; q = NEXT_INSN (q))
6897: if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6898: note_stores (PATTERN (q), cse_check_loop_start);
6899:
6900: /* If nothing was changed and we can replace our
6901: SET_SRC, add an insn after P to copy its destination
6902: to what we will be replacing SET_SRC with. */
6903: if (cse_check_loop_start_value
6904: && validate_change (insn, &SET_SRC (x),
6905: src_elt->exp, 0))
6906: emit_insn_after (gen_move_insn (src_elt->exp,
6907: SET_DEST (set)),
6908: p);
6909: break;
6910: }
6911: }
6912: }
6913:
6914: /* Now invalidate anything modified by X. */
6915: note_mem_written (SET_DEST (x), &writes_memory);
6916:
6917: if (writes_memory.var)
6918: invalidate_memory (&writes_memory);
6919:
6920: /* See comment on similar code in cse_insn for explanation of these tests. */
6921: if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6922: || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all
6923: && ! cse_rtx_addr_varies_p (SET_DEST (x))))
6924: invalidate (SET_DEST (x));
6925: }
6926:
6927: /* Find the end of INSN's basic block and return its range,
6928: the total number of SETs in all the insns of the block, the last insn of the
6929: block, and the branch path.
6930:
6931: The branch path indicates which branches should be followed. If a non-zero
6932: path size is specified, the block should be rescanned and a different set
6933: of branches will be taken. The branch path is only used if
1.1.1.3 ! root 6934: FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
1.1 root 6935:
6936: DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6937: used to describe the block. It is filled in with the information about
6938: the current block. The incoming structure's branch path, if any, is used
6939: to construct the output branch path. */
6940:
6941: /* Define maximum length of a branch path. */
6942:
6943: #define PATHLENGTH 20
6944:
6945: struct cse_basic_block_data {
6946: /* Lowest CUID value of insns in block. */
6947: int low_cuid;
6948: /* Highest CUID value of insns in block. */
6949: int high_cuid;
6950: /* Total number of SETs in block. */
6951: int nsets;
6952: /* Last insn in the block. */
6953: rtx last;
6954: /* Size of current branch path, if any. */
6955: int path_size;
6956: /* Current branch path, indicating which branches will be taken. */
6957: struct branch_path {
6958: /* The branch insn. */
6959: rtx branch;
1.1.1.3 ! root 6960: /* Whether it should be taken or not. AROUND is the same as taken
! 6961: except that it is used when the destination label is not preceded
! 6962: by a BARRIER. */
! 6963: enum taken {TAKEN, NOT_TAKEN, AROUND} status;
1.1 root 6964: } path[PATHLENGTH];
6965: };
6966:
6967: void
1.1.1.3 ! root 6968: cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
1.1 root 6969: rtx insn;
6970: struct cse_basic_block_data *data;
6971: int follow_jumps;
6972: int after_loop;
1.1.1.3 ! root 6973: int skip_blocks;
1.1 root 6974: {
6975: rtx p = insn, q;
6976: int nsets = 0;
6977: int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
1.1.1.3 ! root 6978: rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
1.1 root 6979: int path_size = data->path_size;
6980: int path_entry = 0;
6981: int i;
6982:
6983: /* Update the previous branch path, if any. If the last branch was
6984: previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6985: shorten the path by one and look at the previous branch. We know that
6986: at least one branch must have been taken if PATH_SIZE is non-zero. */
6987: while (path_size > 0)
6988: {
1.1.1.3 ! root 6989: if (data->path[path_size - 1].status != NOT_TAKEN)
1.1 root 6990: {
6991: data->path[path_size - 1].status = NOT_TAKEN;
6992: break;
6993: }
6994: else
6995: path_size--;
6996: }
6997:
6998: /* Scan to end of this basic block. */
6999: while (p && GET_CODE (p) != CODE_LABEL)
7000: {
7001: /* Don't cse out the end of a loop. This makes a difference
7002: only for the unusual loops that always execute at least once;
7003: all other loops have labels there so we will stop in any case.
7004: Cse'ing out the end of the loop is dangerous because it
7005: might cause an invariant expression inside the loop
7006: to be reused after the end of the loop. This would make it
7007: hard to move the expression out of the loop in loop.c,
7008: especially if it is one of several equivalent expressions
7009: and loop.c would like to eliminate it.
7010:
7011: If we are running after loop.c has finished, we can ignore
7012: the NOTE_INSN_LOOP_END. */
7013:
7014: if (! after_loop && GET_CODE (p) == NOTE
7015: && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
7016: break;
7017:
7018: /* Don't cse over a call to setjmp; on some machines (eg vax)
7019: the regs restored by the longjmp come from
7020: a later time than the setjmp. */
7021: if (GET_CODE (p) == NOTE
7022: && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
7023: break;
7024:
7025: /* A PARALLEL can have lots of SETs in it,
7026: especially if it is really an ASM_OPERANDS. */
7027: if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
7028: && GET_CODE (PATTERN (p)) == PARALLEL)
7029: nsets += XVECLEN (PATTERN (p), 0);
7030: else if (GET_CODE (p) != NOTE)
7031: nsets += 1;
7032:
7033: if (INSN_CUID (p) > high_cuid)
1.1.1.3 ! root 7034: high_cuid = INSN_CUID (p);
1.1 root 7035: if (INSN_CUID (p) < low_cuid)
1.1.1.3 ! root 7036: low_cuid = INSN_CUID(p);
1.1 root 7037:
7038: /* See if this insn is in our branch path. If it is and we are to
7039: take it, do so. */
7040: if (path_entry < path_size && data->path[path_entry].branch == p)
7041: {
1.1.1.3 ! root 7042: if (data->path[path_entry].status != NOT_TAKEN)
1.1 root 7043: p = JUMP_LABEL (p);
7044:
7045: /* Point to next entry in path, if any. */
7046: path_entry++;
7047: }
7048:
7049: /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7050: was specified, we haven't reached our maximum path length, there are
7051: insns following the target of the jump, this is the only use of the
1.1.1.3 ! root 7052: jump label, and the target label is preceded by a BARRIER.
! 7053:
! 7054: Alternatively, we can follow the jump if it branches around a
! 7055: block of code and there are no other branches into the block.
! 7056: In this case invalidate_skipped_block will be called to invalidate any
! 7057: registers set in the block when following the jump. */
! 7058:
! 7059: else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
1.1 root 7060: && GET_CODE (p) == JUMP_INSN
7061: && GET_CODE (PATTERN (p)) == SET
7062: && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
7063: && LABEL_NUSES (JUMP_LABEL (p)) == 1
7064: && NEXT_INSN (JUMP_LABEL (p)) != 0)
7065: {
7066: for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
7067: if ((GET_CODE (q) != NOTE
7068: || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
7069: || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
7070: && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
7071: break;
7072:
7073: /* If we ran into a BARRIER, this code is an extension of the
7074: basic block when the branch is taken. */
1.1.1.3 ! root 7075: if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
1.1 root 7076: {
7077: /* Don't allow ourself to keep walking around an
7078: always-executed loop. */
1.1.1.3 ! root 7079: if (next_real_insn (q) == next)
! 7080: {
! 7081: p = NEXT_INSN (p);
! 7082: continue;
! 7083: }
1.1 root 7084:
7085: /* Similarly, don't put a branch in our path more than once. */
7086: for (i = 0; i < path_entry; i++)
7087: if (data->path[i].branch == p)
7088: break;
7089:
7090: if (i != path_entry)
7091: break;
7092:
7093: data->path[path_entry].branch = p;
7094: data->path[path_entry++].status = TAKEN;
7095:
7096: /* This branch now ends our path. It was possible that we
7097: didn't see this branch the last time around (when the
7098: insn in front of the target was a JUMP_INSN that was
7099: turned into a no-op). */
7100: path_size = path_entry;
7101:
7102: p = JUMP_LABEL (p);
7103: /* Mark block so we won't scan it again later. */
7104: PUT_MODE (NEXT_INSN (p), QImode);
7105: }
1.1.1.3 ! root 7106: /* Detect a branch around a block of code. */
! 7107: else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
! 7108: {
! 7109: register rtx tmp;
! 7110:
! 7111: if (next_real_insn (q) == next)
! 7112: {
! 7113: p = NEXT_INSN (p);
! 7114: continue;
! 7115: }
! 7116:
! 7117: for (i = 0; i < path_entry; i++)
! 7118: if (data->path[i].branch == p)
! 7119: break;
! 7120:
! 7121: if (i != path_entry)
! 7122: break;
! 7123:
! 7124: /* This is no_labels_between_p (p, q) with an added check for
! 7125: reaching the end of a function (in case Q precedes P). */
! 7126: for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
! 7127: if (GET_CODE (tmp) == CODE_LABEL)
! 7128: break;
! 7129:
! 7130: if (tmp == q)
! 7131: {
! 7132: data->path[path_entry].branch = p;
! 7133: data->path[path_entry++].status = AROUND;
! 7134:
! 7135: path_size = path_entry;
! 7136:
! 7137: p = JUMP_LABEL (p);
! 7138: /* Mark block so we won't scan it again later. */
! 7139: PUT_MODE (NEXT_INSN (p), QImode);
! 7140: }
! 7141: }
1.1 root 7142: }
7143: p = NEXT_INSN (p);
7144: }
7145:
7146: data->low_cuid = low_cuid;
7147: data->high_cuid = high_cuid;
7148: data->nsets = nsets;
7149: data->last = p;
7150:
7151: /* If all jumps in the path are not taken, set our path length to zero
7152: so a rescan won't be done. */
7153: for (i = path_size - 1; i >= 0; i--)
1.1.1.3 ! root 7154: if (data->path[i].status != NOT_TAKEN)
1.1 root 7155: break;
7156:
7157: if (i == -1)
7158: data->path_size = 0;
7159: else
7160: data->path_size = path_size;
7161:
7162: /* End the current branch path. */
7163: data->path[path_size].branch = 0;
7164: }
7165:
7166: static rtx cse_basic_block ();
7167:
7168: /* Perform cse on the instructions of a function.
7169: F is the first instruction.
7170: NREGS is one plus the highest pseudo-reg number used in the instruction.
7171:
7172: AFTER_LOOP is 1 if this is the cse call done after loop optimization
7173: (only if -frerun-cse-after-loop).
7174:
7175: Returns 1 if jump_optimize should be redone due to simplifications
7176: in conditional jump instructions. */
7177:
7178: int
7179: cse_main (f, nregs, after_loop, file)
7180: rtx f;
7181: int nregs;
7182: int after_loop;
7183: FILE *file;
7184: {
7185: struct cse_basic_block_data val;
7186: register rtx insn = f;
7187: register int i;
7188:
7189: cse_jumps_altered = 0;
7190: constant_pool_entries_cost = 0;
7191: val.path_size = 0;
7192:
7193: init_recog ();
7194:
7195: max_reg = nregs;
7196:
7197: all_minus_one = (int *) alloca (nregs * sizeof (int));
7198: consec_ints = (int *) alloca (nregs * sizeof (int));
7199:
7200: for (i = 0; i < nregs; i++)
7201: {
7202: all_minus_one[i] = -1;
7203: consec_ints[i] = i;
7204: }
7205:
7206: reg_next_eqv = (int *) alloca (nregs * sizeof (int));
7207: reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
7208: reg_qty = (int *) alloca (nregs * sizeof (int));
7209: reg_in_table = (int *) alloca (nregs * sizeof (int));
7210: reg_tick = (int *) alloca (nregs * sizeof (int));
7211:
7212: /* Discard all the free elements of the previous function
7213: since they are allocated in the temporarily obstack. */
7214: bzero (table, sizeof table);
7215: free_element_chain = 0;
7216: n_elements_made = 0;
7217:
7218: /* Find the largest uid. */
7219:
7220: i = get_max_uid ();
7221: uid_cuid = (short *) alloca ((i + 1) * sizeof (short));
7222: bzero (uid_cuid, (i + 1) * sizeof (short));
7223:
7224: /* Compute the mapping from uids to cuids.
7225: CUIDs are numbers assigned to insns, like uids,
7226: except that cuids increase monotonically through the code.
7227: Don't assign cuids to line-number NOTEs, so that the distance in cuids
7228: between two insns is not affected by -g. */
7229:
7230: for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7231: {
7232: if (GET_CODE (insn) != NOTE
7233: || NOTE_LINE_NUMBER (insn) < 0)
7234: INSN_CUID (insn) = ++i;
7235: else
7236: /* Give a line number note the same cuid as preceding insn. */
7237: INSN_CUID (insn) = i;
7238: }
7239:
7240: /* Initialize which registers are clobbered by calls. */
7241:
7242: CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7243:
7244: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7245: if ((call_used_regs[i]
7246: /* Used to check !fixed_regs[i] here, but that isn't safe;
7247: fixed regs are still call-clobbered, and sched can get
7248: confused if they can "live across calls".
7249:
7250: The frame pointer is always preserved across calls. The arg
7251: pointer is if it is fixed. The stack pointer usually is, unless
7252: RETURN_POPS_ARGS, in which case an explicit CLOBBER
7253: will be present. If we are generating PIC code, the PIC offset
7254: table register is preserved across calls. */
7255:
7256: && i != STACK_POINTER_REGNUM
7257: && i != FRAME_POINTER_REGNUM
7258: #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7259: && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7260: #endif
7261: #ifdef PIC_OFFSET_TABLE_REGNUM
7262: && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7263: #endif
7264: )
7265: || global_regs[i])
7266: SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7267:
7268: /* Loop over basic blocks.
7269: Compute the maximum number of qty's needed for each basic block
7270: (which is 2 for each SET). */
7271: insn = f;
7272: while (insn)
7273: {
1.1.1.3 ! root 7274: cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
! 7275: flag_cse_skip_blocks);
1.1 root 7276:
7277: /* If this basic block was already processed or has no sets, skip it. */
7278: if (val.nsets == 0 || GET_MODE (insn) == QImode)
7279: {
7280: PUT_MODE (insn, VOIDmode);
7281: insn = (val.last ? NEXT_INSN (val.last) : 0);
7282: val.path_size = 0;
7283: continue;
7284: }
7285:
7286: cse_basic_block_start = val.low_cuid;
7287: cse_basic_block_end = val.high_cuid;
7288: max_qty = val.nsets * 2;
7289:
7290: if (file)
7291: fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
7292: INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7293: val.nsets);
7294:
7295: /* Make MAX_QTY bigger to give us room to optimize
7296: past the end of this basic block, if that should prove useful. */
7297: if (max_qty < 500)
7298: max_qty = 500;
7299:
7300: max_qty += max_reg;
7301:
7302: /* If this basic block is being extended by following certain jumps,
7303: (see `cse_end_of_basic_block'), we reprocess the code from the start.
7304: Otherwise, we start after this basic block. */
7305: if (val.path_size > 0)
7306: cse_basic_block (insn, val.last, val.path, 0);
7307: else
7308: {
7309: int old_cse_jumps_altered = cse_jumps_altered;
7310: rtx temp;
7311:
7312: /* When cse changes a conditional jump to an unconditional
7313: jump, we want to reprocess the block, since it will give
7314: us a new branch path to investigate. */
7315: cse_jumps_altered = 0;
7316: temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
1.1.1.3 ! root 7317: if (cse_jumps_altered == 0
! 7318: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
1.1 root 7319: insn = temp;
7320:
7321: cse_jumps_altered |= old_cse_jumps_altered;
7322: }
7323:
7324: #ifdef USE_C_ALLOCA
7325: alloca (0);
7326: #endif
7327: }
7328:
7329: /* Tell refers_to_mem_p that qty_const info is not available. */
7330: qty_const = 0;
7331:
7332: if (max_elements_made < n_elements_made)
7333: max_elements_made = n_elements_made;
7334:
7335: return cse_jumps_altered;
7336: }
7337:
7338: /* Process a single basic block. FROM and TO and the limits of the basic
7339: block. NEXT_BRANCH points to the branch path when following jumps or
7340: a null path when not following jumps.
7341:
7342: AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7343: loop. This is true when we are being called for the last time on a
7344: block and this CSE pass is before loop.c. */
7345:
7346: static rtx
7347: cse_basic_block (from, to, next_branch, around_loop)
7348: register rtx from, to;
7349: struct branch_path *next_branch;
7350: int around_loop;
7351: {
7352: register rtx insn;
7353: int to_usage = 0;
7354: int in_libcall_block = 0;
7355:
7356: /* Each of these arrays is undefined before max_reg, so only allocate
7357: the space actually needed and adjust the start below. */
7358:
7359: qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7360: qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7361: qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
7362: qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7363: qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7364: qty_comparison_code
7365: = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
7366: qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7367: qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7368:
7369: qty_first_reg -= max_reg;
7370: qty_last_reg -= max_reg;
7371: qty_mode -= max_reg;
7372: qty_const -= max_reg;
7373: qty_const_insn -= max_reg;
7374: qty_comparison_code -= max_reg;
7375: qty_comparison_qty -= max_reg;
7376: qty_comparison_const -= max_reg;
7377:
7378: new_basic_block ();
7379:
7380: /* TO might be a label. If so, protect it from being deleted. */
7381: if (to != 0 && GET_CODE (to) == CODE_LABEL)
7382: ++LABEL_NUSES (to);
7383:
7384: for (insn = from; insn != to; insn = NEXT_INSN (insn))
7385: {
7386: register enum rtx_code code;
7387:
7388: /* See if this is a branch that is part of the path. If so, and it is
7389: to be taken, do so. */
7390: if (next_branch->branch == insn)
7391: {
1.1.1.3 ! root 7392: enum taken status = next_branch++->status;
! 7393: if (status != NOT_TAKEN)
1.1 root 7394: {
1.1.1.3 ! root 7395: if (status == TAKEN)
! 7396: record_jump_equiv (insn, 1);
! 7397: else
! 7398: invalidate_skipped_block (NEXT_INSN (insn));
! 7399:
1.1 root 7400: /* Set the last insn as the jump insn; it doesn't affect cc0.
7401: Then follow this branch. */
7402: #ifdef HAVE_cc0
7403: prev_insn_cc0 = 0;
7404: #endif
7405: prev_insn = insn;
7406: insn = JUMP_LABEL (insn);
7407: continue;
7408: }
7409: }
7410:
7411: code = GET_CODE (insn);
7412: if (GET_MODE (insn) == QImode)
7413: PUT_MODE (insn, VOIDmode);
7414:
7415: if (GET_RTX_CLASS (code) == 'i')
7416: {
7417: /* Process notes first so we have all notes in canonical forms when
7418: looking for duplicate operations. */
7419:
7420: if (REG_NOTES (insn))
7421: REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), 0);
7422:
7423: /* Track when we are inside in LIBCALL block. Inside such a block,
7424: we do not want to record destinations. The last insn of a
7425: LIBCALL block is not considered to be part of the block, since
1.1.1.3 ! root 7426: its destination is the result of the block and hence should be
1.1 root 7427: recorded. */
7428:
7429: if (find_reg_note (insn, REG_LIBCALL, 0))
7430: in_libcall_block = 1;
7431: else if (find_reg_note (insn, REG_RETVAL, 0))
7432: in_libcall_block = 0;
7433:
7434: cse_insn (insn, in_libcall_block);
7435: }
7436:
7437: /* If INSN is now an unconditional jump, skip to the end of our
7438: basic block by pretending that we just did the last insn in the
7439: basic block. If we are jumping to the end of our block, show
7440: that we can have one usage of TO. */
7441:
7442: if (simplejump_p (insn))
7443: {
7444: if (to == 0)
7445: return 0;
7446:
7447: if (JUMP_LABEL (insn) == to)
7448: to_usage = 1;
7449:
1.1.1.3 ! root 7450: /* Maybe TO was deleted because the jump is unconditional.
! 7451: If so, there is nothing left in this basic block. */
! 7452: /* ??? Perhaps it would be smarter to set TO
! 7453: to whatever follows this insn,
! 7454: and pretend the basic block had always ended here. */
! 7455: if (INSN_DELETED_P (to))
! 7456: break;
! 7457:
1.1 root 7458: insn = PREV_INSN (to);
7459: }
7460:
7461: /* See if it is ok to keep on going past the label
7462: which used to end our basic block. Remember that we incremented
1.1.1.2 root 7463: the count of that label, so we decrement it here. If we made
1.1 root 7464: a jump unconditional, TO_USAGE will be one; in that case, we don't
7465: want to count the use in that jump. */
7466:
7467: if (to != 0 && NEXT_INSN (insn) == to
7468: && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
7469: {
7470: struct cse_basic_block_data val;
7471:
7472: insn = NEXT_INSN (to);
7473:
7474: if (LABEL_NUSES (to) == 0)
7475: delete_insn (to);
7476:
7477: /* Find the end of the following block. Note that we won't be
7478: following branches in this case. If TO was the last insn
7479: in the function, we are done. Similarly, if we deleted the
1.1.1.2 root 7480: insn after TO, it must have been because it was preceded by
1.1 root 7481: a BARRIER. In that case, we are done with this block because it
7482: has no continuation. */
7483:
7484: if (insn == 0 || INSN_DELETED_P (insn))
7485: return 0;
7486:
7487: to_usage = 0;
7488: val.path_size = 0;
1.1.1.3 ! root 7489: cse_end_of_basic_block (insn, &val, 0, 0, 0);
1.1 root 7490:
7491: /* If the tables we allocated have enough space left
7492: to handle all the SETs in the next basic block,
7493: continue through it. Otherwise, return,
7494: and that block will be scanned individually. */
7495: if (val.nsets * 2 + next_qty > max_qty)
7496: break;
7497:
7498: cse_basic_block_start = val.low_cuid;
7499: cse_basic_block_end = val.high_cuid;
7500: to = val.last;
7501:
7502: /* Prevent TO from being deleted if it is a label. */
7503: if (to != 0 && GET_CODE (to) == CODE_LABEL)
7504: ++LABEL_NUSES (to);
7505:
7506: /* Back up so we process the first insn in the extension. */
7507: insn = PREV_INSN (insn);
7508: }
7509: }
7510:
7511: if (next_qty > max_qty)
7512: abort ();
7513:
7514: /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7515: the previous insn is the only insn that branches to the head of a loop,
7516: we can cse into the loop. Don't do this if we changed the jump
7517: structure of a loop unless we aren't going to be following jumps. */
7518:
1.1.1.3 ! root 7519: if ((cse_jumps_altered == 0
! 7520: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
1.1 root 7521: && around_loop && to != 0
7522: && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7523: && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7524: && JUMP_LABEL (PREV_INSN (to)) != 0
7525: && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7526: cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7527:
7528: return to ? NEXT_INSN (to) : 0;
7529: }
7530:
7531: /* Count the number of times registers are used (not set) in X.
7532: COUNTS is an array in which we accumulate the count, INCR is how much
7533: we count each register usage. */
7534:
7535: static void
7536: count_reg_usage (x, counts, incr)
7537: rtx x;
7538: int *counts;
7539: int incr;
7540: {
7541: enum rtx_code code = GET_CODE (x);
7542: char *fmt;
7543: int i, j;
7544:
7545: switch (code)
7546: {
7547: case REG:
7548: counts[REGNO (x)] += incr;
7549: return;
7550:
7551: case PC:
7552: case CC0:
7553: case CONST:
7554: case CONST_INT:
7555: case CONST_DOUBLE:
7556: case SYMBOL_REF:
7557: case LABEL_REF:
7558: case CLOBBER:
7559: return;
7560:
7561: case SET:
7562: /* Unless we are setting a REG, count everything in SET_DEST. */
7563: if (GET_CODE (SET_DEST (x)) != REG)
7564: count_reg_usage (SET_DEST (x), counts, incr);
7565: count_reg_usage (SET_SRC (x), counts, incr);
7566: return;
7567:
7568: case INSN:
7569: case JUMP_INSN:
7570: case CALL_INSN:
7571: count_reg_usage (PATTERN (x), counts, incr);
7572:
7573: /* Things used in a REG_EQUAL note aren't dead since loop may try to
7574: use them. */
7575:
7576: if (REG_NOTES (x))
7577: count_reg_usage (REG_NOTES (x), counts, incr);
7578: return;
7579:
7580: case EXPR_LIST:
7581: case INSN_LIST:
7582: if (REG_NOTE_KIND (x) == REG_EQUAL)
7583: count_reg_usage (XEXP (x, 0), counts, incr);
7584: if (XEXP (x, 1))
7585: count_reg_usage (XEXP (x, 1), counts, incr);
7586: return;
7587: }
7588:
7589: fmt = GET_RTX_FORMAT (code);
7590: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7591: {
7592: if (fmt[i] == 'e')
7593: count_reg_usage (XEXP (x, i), counts, incr);
7594: else if (fmt[i] == 'E')
7595: for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7596: count_reg_usage (XVECEXP (x, i, j), counts, incr);
7597: }
7598: }
7599:
7600: /* Scan all the insns and delete any that are dead; i.e., they store a register
7601: that is never used or they copy a register to itself.
7602:
7603: This is used to remove insns made obviously dead by cse. It improves the
7604: heuristics in loop since it won't try to move dead invariants out of loops
7605: or make givs for dead quantities. The remaining passes of the compilation
7606: are also sped up. */
7607:
7608: void
7609: delete_dead_from_cse (insns, nreg)
7610: rtx insns;
7611: int nreg;
7612: {
7613: int *counts = (int *) alloca (nreg * sizeof (int));
7614: rtx insn;
1.1.1.2 root 7615: rtx tem;
1.1 root 7616: int i;
1.1.1.3 ! root 7617: int in_libcall = 0;
1.1 root 7618:
7619: /* First count the number of times each register is used. */
7620: bzero (counts, sizeof (int) * nreg);
7621: for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7622: count_reg_usage (insn, counts, 1);
7623:
7624: /* Go from the last insn to the first and delete insns that only set unused
7625: registers or copy a register to itself. As we delete an insn, remove
7626: usage counts for registers it uses. */
7627: for (insn = prev_real_insn (get_last_insn ());
7628: insn; insn = prev_real_insn (insn))
7629: {
7630: int live_insn = 0;
7631:
1.1.1.3 ! root 7632: /* Don't delete any insns that are part of a libcall block.
! 7633: Flow or loop might get confused if we did that. */
! 7634: if (find_reg_note (insn, REG_LIBCALL, 0))
! 7635: in_libcall = 1;
! 7636:
! 7637: if (in_libcall)
! 7638: live_insn = 1;
! 7639: else if (GET_CODE (PATTERN (insn)) == SET)
1.1 root 7640: {
7641: if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
7642: && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
7643: ;
7644:
1.1.1.2 root 7645: #ifdef HAVE_cc0
7646: else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7647: && ! side_effects_p (SET_SRC (PATTERN (insn)))
7648: && ((tem = next_nonnote_insn (insn)) == 0
7649: || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7650: || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7651: ;
7652: #endif
1.1 root 7653: else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7654: || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7655: || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7656: || side_effects_p (SET_SRC (PATTERN (insn))))
7657: live_insn = 1;
7658: }
7659: else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7660: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7661: {
7662: rtx elt = XVECEXP (PATTERN (insn), 0, i);
7663:
7664: if (GET_CODE (elt) == SET)
7665: {
7666: if (GET_CODE (SET_DEST (elt)) == REG
7667: && SET_DEST (elt) == SET_SRC (elt))
7668: ;
7669:
1.1.1.2 root 7670: #ifdef HAVE_cc0
7671: else if (GET_CODE (SET_DEST (elt)) == CC0
7672: && ! side_effects_p (SET_SRC (elt))
7673: && ((tem = next_nonnote_insn (insn)) == 0
7674: || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7675: || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7676: ;
7677: #endif
1.1 root 7678: else if (GET_CODE (SET_DEST (elt)) != REG
7679: || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7680: || counts[REGNO (SET_DEST (elt))] != 0
7681: || side_effects_p (SET_SRC (elt)))
7682: live_insn = 1;
7683: }
7684: else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7685: live_insn = 1;
7686: }
7687: else
7688: live_insn = 1;
7689:
7690: /* If this is a dead insn, delete it and show registers in it aren't
1.1.1.3 ! root 7691: being used. */
1.1 root 7692:
1.1.1.3 ! root 7693: if (! live_insn)
1.1 root 7694: {
7695: count_reg_usage (insn, counts, -1);
7696: PUT_CODE (insn, NOTE);
7697: NOTE_SOURCE_FILE (insn) = 0;
7698: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
7699: }
1.1.1.3 ! root 7700:
! 7701: if (find_reg_note (insn, REG_RETVAL, 0))
! 7702: in_libcall = 0;
1.1 root 7703: }
7704: }
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