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1.1 root 1: /* Common subexpression elimination for GNU compiler. 1.1.1.5 ! root 2: Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: #include "config.h" 22: #include "rtl.h" 23: #include "regs.h" 24: #include "hard-reg-set.h" 25: #include "flags.h" 26: #include "real.h" 27: #include "insn-config.h" 28: #include "recog.h" 29: 30: #include <stdio.h> 31: #include <setjmp.h> 32: 33: /* The basic idea of common subexpression elimination is to go 34: through the code, keeping a record of expressions that would 35: have the same value at the current scan point, and replacing 36: expressions encountered with the cheapest equivalent expression. 37: 38: It is too complicated to keep track of the different possibilities 39: when control paths merge; so, at each label, we forget all that is 40: known and start fresh. This can be described as processing each 41: basic block separately. Note, however, that these are not quite 42: the same as the basic blocks found by a later pass and used for 43: data flow analysis and register packing. We do not need to start fresh 44: after a conditional jump instruction if there is no label there. 45: 46: We use two data structures to record the equivalent expressions: 47: a hash table for most expressions, and several vectors together 48: with "quantity numbers" to record equivalent (pseudo) registers. 49: 50: The use of the special data structure for registers is desirable 51: because it is faster. It is possible because registers references 52: contain a fairly small number, the register number, taken from 53: a contiguously allocated series, and two register references are 54: identical if they have the same number. General expressions 55: do not have any such thing, so the only way to retrieve the 56: information recorded on an expression other than a register 57: is to keep it in a hash table. 58: 59: Registers and "quantity numbers": 60: 61: At the start of each basic block, all of the (hardware and pseudo) 62: registers used in the function are given distinct quantity 63: numbers to indicate their contents. During scan, when the code 64: copies one register into another, we copy the quantity number. 65: When a register is loaded in any other way, we allocate a new 66: quantity number to describe the value generated by this operation. 67: `reg_qty' records what quantity a register is currently thought 68: of as containing. 69: 70: All real quantity numbers are greater than or equal to `max_reg'. 71: If register N has not been assigned a quantity, reg_qty[N] will equal N. 72: 73: Quantity numbers below `max_reg' do not exist and none of the `qty_...' 74: variables should be referenced with an index below `max_reg'. 75: 76: We also maintain a bidirectional chain of registers for each 77: quantity number. `qty_first_reg', `qty_last_reg', 78: `reg_next_eqv' and `reg_prev_eqv' hold these chains. 79: 80: The first register in a chain is the one whose lifespan is least local. 81: Among equals, it is the one that was seen first. 82: We replace any equivalent register with that one. 83: 84: If two registers have the same quantity number, it must be true that 85: REG expressions with `qty_mode' must be in the hash table for both 86: registers and must be in the same class. 87: 88: The converse is not true. Since hard registers may be referenced in 89: any mode, two REG expressions might be equivalent in the hash table 90: but not have the same quantity number if the quantity number of one 91: of the registers is not the same mode as those expressions. 92: 93: Constants and quantity numbers 94: 95: When a quantity has a known constant value, that value is stored 96: in the appropriate element of qty_const. This is in addition to 97: putting the constant in the hash table as is usual for non-regs. 98: 1.1.1.2 root 99: Whether a reg or a constant is preferred is determined by the configuration 1.1 root 100: macro CONST_COSTS and will often depend on the constant value. In any 101: event, expressions containing constants can be simplified, by fold_rtx. 102: 103: When a quantity has a known nearly constant value (such as an address 104: of a stack slot), that value is stored in the appropriate element 105: of qty_const. 106: 107: Integer constants don't have a machine mode. However, cse 108: determines the intended machine mode from the destination 109: of the instruction that moves the constant. The machine mode 110: is recorded in the hash table along with the actual RTL 111: constant expression so that different modes are kept separate. 112: 113: Other expressions: 114: 115: To record known equivalences among expressions in general 116: we use a hash table called `table'. It has a fixed number of buckets 117: that contain chains of `struct table_elt' elements for expressions. 118: These chains connect the elements whose expressions have the same 119: hash codes. 120: 121: Other chains through the same elements connect the elements which 122: currently have equivalent values. 123: 124: Register references in an expression are canonicalized before hashing 125: the expression. This is done using `reg_qty' and `qty_first_reg'. 126: The hash code of a register reference is computed using the quantity 127: number, not the register number. 128: 129: When the value of an expression changes, it is necessary to remove from the 130: hash table not just that expression but all expressions whose values 131: could be different as a result. 132: 133: 1. If the value changing is in memory, except in special cases 134: ANYTHING referring to memory could be changed. That is because 135: nobody knows where a pointer does not point. 136: The function `invalidate_memory' removes what is necessary. 137: 138: The special cases are when the address is constant or is 139: a constant plus a fixed register such as the frame pointer 140: or a static chain pointer. When such addresses are stored in, 141: we can tell exactly which other such addresses must be invalidated 142: due to overlap. `invalidate' does this. 143: All expressions that refer to non-constant 144: memory addresses are also invalidated. `invalidate_memory' does this. 145: 146: 2. If the value changing is a register, all expressions 147: containing references to that register, and only those, 148: must be removed. 149: 150: Because searching the entire hash table for expressions that contain 151: a register is very slow, we try to figure out when it isn't necessary. 152: Precisely, this is necessary only when expressions have been 153: entered in the hash table using this register, and then the value has 154: changed, and then another expression wants to be added to refer to 155: the register's new value. This sequence of circumstances is rare 156: within any one basic block. 157: 158: The vectors `reg_tick' and `reg_in_table' are used to detect this case. 159: reg_tick[i] is incremented whenever a value is stored in register i. 160: reg_in_table[i] holds -1 if no references to register i have been 161: entered in the table; otherwise, it contains the value reg_tick[i] had 162: when the references were entered. If we want to enter a reference 163: and reg_in_table[i] != reg_tick[i], we must scan and remove old references. 164: Until we want to enter a new entry, the mere fact that the two vectors 165: don't match makes the entries be ignored if anyone tries to match them. 166: 167: Registers themselves are entered in the hash table as well as in 168: the equivalent-register chains. However, the vectors `reg_tick' 169: and `reg_in_table' do not apply to expressions which are simple 170: register references. These expressions are removed from the table 171: immediately when they become invalid, and this can be done even if 172: we do not immediately search for all the expressions that refer to 173: the register. 174: 175: A CLOBBER rtx in an instruction invalidates its operand for further 176: reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK 177: invalidates everything that resides in memory. 178: 179: Related expressions: 180: 181: Constant expressions that differ only by an additive integer 182: are called related. When a constant expression is put in 183: the table, the related expression with no constant term 184: is also entered. These are made to point at each other 185: so that it is possible to find out if there exists any 186: register equivalent to an expression related to a given expression. */ 187: 188: /* One plus largest register number used in this function. */ 189: 190: static int max_reg; 191: 192: /* Length of vectors indexed by quantity number. 193: We know in advance we will not need a quantity number this big. */ 194: 195: static int max_qty; 196: 197: /* Next quantity number to be allocated. 198: This is 1 + the largest number needed so far. */ 199: 200: static int next_qty; 201: 202: /* Indexed by quantity number, gives the first (or last) (pseudo) register 203: in the chain of registers that currently contain this quantity. */ 204: 205: static int *qty_first_reg; 206: static int *qty_last_reg; 207: 208: /* Index by quantity number, gives the mode of the quantity. */ 209: 210: static enum machine_mode *qty_mode; 211: 212: /* Indexed by quantity number, gives the rtx of the constant value of the 213: quantity, or zero if it does not have a known value. 214: A sum of the frame pointer (or arg pointer) plus a constant 215: can also be entered here. */ 216: 217: static rtx *qty_const; 218: 219: /* Indexed by qty number, gives the insn that stored the constant value 220: recorded in `qty_const'. */ 221: 222: static rtx *qty_const_insn; 223: 224: /* The next three variables are used to track when a comparison between a 225: quantity and some constant or register has been passed. In that case, we 226: know the results of the comparison in case we see it again. These variables 227: record a comparison that is known to be true. */ 228: 229: /* Indexed by qty number, gives the rtx code of a comparison with a known 230: result involving this quantity. If none, it is UNKNOWN. */ 231: static enum rtx_code *qty_comparison_code; 232: 233: /* Indexed by qty number, gives the constant being compared against in a 234: comparison of known result. If no such comparison, it is undefined. 235: If the comparison is not with a constant, it is zero. */ 236: 237: static rtx *qty_comparison_const; 238: 239: /* Indexed by qty number, gives the quantity being compared against in a 240: comparison of known result. If no such comparison, if it undefined. 241: If the comparison is not with a register, it is -1. */ 242: 243: static int *qty_comparison_qty; 244: 245: #ifdef HAVE_cc0 246: /* For machines that have a CC0, we do not record its value in the hash 247: table since its use is guaranteed to be the insn immediately following 248: its definition and any other insn is presumed to invalidate it. 249: 250: Instead, we store below the value last assigned to CC0. If it should 251: happen to be a constant, it is stored in preference to the actual 252: assigned value. In case it is a constant, we store the mode in which 253: the constant should be interpreted. */ 254: 255: static rtx prev_insn_cc0; 256: static enum machine_mode prev_insn_cc0_mode; 257: #endif 258: 259: /* Previous actual insn. 0 if at first insn of basic block. */ 260: 261: static rtx prev_insn; 262: 263: /* Insn being scanned. */ 264: 265: static rtx this_insn; 266: 267: /* Index by (pseudo) register number, gives the quantity number 268: of the register's current contents. */ 269: 270: static int *reg_qty; 271: 272: /* Index by (pseudo) register number, gives the number of the next (or 273: previous) (pseudo) register in the chain of registers sharing the same 274: value. 275: 276: Or -1 if this register is at the end of the chain. 277: 278: If reg_qty[N] == N, reg_next_eqv[N] is undefined. */ 279: 280: static int *reg_next_eqv; 281: static int *reg_prev_eqv; 282: 283: /* Index by (pseudo) register number, gives the number of times 284: that register has been altered in the current basic block. */ 285: 286: static int *reg_tick; 287: 288: /* Index by (pseudo) register number, gives the reg_tick value at which 289: rtx's containing this register are valid in the hash table. 290: If this does not equal the current reg_tick value, such expressions 291: existing in the hash table are invalid. 292: If this is -1, no expressions containing this register have been 293: entered in the table. */ 294: 295: static int *reg_in_table; 296: 297: /* A HARD_REG_SET containing all the hard registers for which there is 298: currently a REG expression in the hash table. Note the difference 299: from the above variables, which indicate if the REG is mentioned in some 300: expression in the table. */ 301: 302: static HARD_REG_SET hard_regs_in_table; 303: 304: /* A HARD_REG_SET containing all the hard registers that are invalidated 305: by a CALL_INSN. */ 306: 307: static HARD_REG_SET regs_invalidated_by_call; 308: 309: /* Two vectors of ints: 310: one containing max_reg -1's; the other max_reg + 500 (an approximation 311: for max_qty) elements where element i contains i. 312: These are used to initialize various other vectors fast. */ 313: 314: static int *all_minus_one; 315: static int *consec_ints; 316: 317: /* CUID of insn that starts the basic block currently being cse-processed. */ 318: 319: static int cse_basic_block_start; 320: 321: /* CUID of insn that ends the basic block currently being cse-processed. */ 322: 323: static int cse_basic_block_end; 324: 325: /* Vector mapping INSN_UIDs to cuids. 1.1.1.2 root 326: The cuids are like uids but increase monotonically always. 1.1 root 327: We use them to see whether a reg is used outside a given basic block. */ 328: 1.1.1.4 root 329: static int *uid_cuid; 330: 331: /* Highest UID in UID_CUID. */ 332: static int max_uid; 1.1 root 333: 334: /* Get the cuid of an insn. */ 335: 336: #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) 337: 338: /* Nonzero if cse has altered conditional jump insns 339: in such a way that jump optimization should be redone. */ 340: 341: static int cse_jumps_altered; 342: 343: /* canon_hash stores 1 in do_not_record 344: if it notices a reference to CC0, PC, or some other volatile 345: subexpression. */ 346: 347: static int do_not_record; 348: 349: /* canon_hash stores 1 in hash_arg_in_memory 350: if it notices a reference to memory within the expression being hashed. */ 351: 352: static int hash_arg_in_memory; 353: 354: /* canon_hash stores 1 in hash_arg_in_struct 355: if it notices a reference to memory that's part of a structure. */ 356: 357: static int hash_arg_in_struct; 358: 359: /* The hash table contains buckets which are chains of `struct table_elt's, 360: each recording one expression's information. 361: That expression is in the `exp' field. 362: 363: Those elements with the same hash code are chained in both directions 364: through the `next_same_hash' and `prev_same_hash' fields. 365: 366: Each set of expressions with equivalent values 367: are on a two-way chain through the `next_same_value' 368: and `prev_same_value' fields, and all point with 369: the `first_same_value' field at the first element in 370: that chain. The chain is in order of increasing cost. 371: Each element's cost value is in its `cost' field. 372: 373: The `in_memory' field is nonzero for elements that 374: involve any reference to memory. These elements are removed 375: whenever a write is done to an unidentified location in memory. 376: To be safe, we assume that a memory address is unidentified unless 377: the address is either a symbol constant or a constant plus 378: the frame pointer or argument pointer. 379: 380: The `in_struct' field is nonzero for elements that 381: involve any reference to memory inside a structure or array. 382: 383: The `related_value' field is used to connect related expressions 384: (that differ by adding an integer). 385: The related expressions are chained in a circular fashion. 386: `related_value' is zero for expressions for which this 387: chain is not useful. 388: 389: The `cost' field stores the cost of this element's expression. 390: 391: The `is_const' flag is set if the element is a constant (including 392: a fixed address). 393: 394: The `flag' field is used as a temporary during some search routines. 395: 396: The `mode' field is usually the same as GET_MODE (`exp'), but 397: if `exp' is a CONST_INT and has no machine mode then the `mode' 398: field is the mode it was being used as. Each constant is 399: recorded separately for each mode it is used with. */ 400: 401: 402: struct table_elt 403: { 404: rtx exp; 405: struct table_elt *next_same_hash; 406: struct table_elt *prev_same_hash; 407: struct table_elt *next_same_value; 408: struct table_elt *prev_same_value; 409: struct table_elt *first_same_value; 410: struct table_elt *related_value; 411: int cost; 412: enum machine_mode mode; 413: char in_memory; 414: char in_struct; 415: char is_const; 416: char flag; 417: }; 418: 419: #define HASHBITS 16 420: 421: /* We don't want a lot of buckets, because we rarely have very many 422: things stored in the hash table, and a lot of buckets slows 423: down a lot of loops that happen frequently. */ 424: #define NBUCKETS 31 425: 426: /* Compute hash code of X in mode M. Special-case case where X is a pseudo 427: register (hard registers may require `do_not_record' to be set). */ 428: 429: #define HASH(X, M) \ 430: (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ 431: ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \ 432: : canon_hash (X, M) % NBUCKETS) 433: 434: /* Determine whether register number N is considered a fixed register for CSE. 435: It is desirable to replace other regs with fixed regs, to reduce need for 436: non-fixed hard regs. 437: A reg wins if it is either the frame pointer or designated as fixed, 438: but not if it is an overlapping register. */ 439: #ifdef OVERLAPPING_REGNO_P 440: #define FIXED_REGNO_P(N) \ 441: (((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) \ 442: && ! OVERLAPPING_REGNO_P ((N))) 443: #else 444: #define FIXED_REGNO_P(N) \ 445: ((N) == FRAME_POINTER_REGNUM || fixed_regs[N]) 446: #endif 447: 448: /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed 1.1.1.5 ! root 449: hard registers and pointers into the frame are the cheapest with a cost ! 450: of 0. Next come pseudos with a cost of one and other hard registers with ! 451: a cost of 2. Aside from these special cases, call `rtx_cost'. */ ! 452: ! 453: #define CHEAP_REG(N) \ ! 454: ((N) == FRAME_POINTER_REGNUM || (N) == STACK_POINTER_REGNUM \ ! 455: || (N) == ARG_POINTER_REGNUM \ ! 456: || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \ ! 457: || ((N) < FIRST_PSEUDO_REGISTER \ ! 458: && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) 1.1 root 459: 460: #define COST(X) \ 461: (GET_CODE (X) == REG \ 1.1.1.5 ! root 462: ? (CHEAP_REG (REGNO (X)) ? 0 \ ! 463: : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \ 1.1 root 464: : 2) \ 1.1.1.3 root 465: : rtx_cost (X, SET) * 2) 1.1 root 466: 467: /* Determine if the quantity number for register X represents a valid index 468: into the `qty_...' variables. */ 469: 470: #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N)) 471: 472: static struct table_elt *table[NBUCKETS]; 473: 474: /* Chain of `struct table_elt's made so far for this function 475: but currently removed from the table. */ 476: 477: static struct table_elt *free_element_chain; 478: 479: /* Number of `struct table_elt' structures made so far for this function. */ 480: 481: static int n_elements_made; 482: 483: /* Maximum value `n_elements_made' has had so far in this compilation 484: for functions previously processed. */ 485: 486: static int max_elements_made; 487: 488: /* Surviving equivalence class when two equivalence classes are merged 489: by recording the effects of a jump in the last insn. Zero if the 490: last insn was not a conditional jump. */ 491: 492: static struct table_elt *last_jump_equiv_class; 493: 494: /* Set to the cost of a constant pool reference if one was found for a 495: symbolic constant. If this was found, it means we should try to 496: convert constants into constant pool entries if they don't fit in 497: the insn. */ 498: 499: static int constant_pool_entries_cost; 500: 501: /* Bits describing what kind of values in memory must be invalidated 502: for a particular instruction. If all three bits are zero, 503: no memory refs need to be invalidated. Each bit is more powerful 504: than the preceding ones, and if a bit is set then the preceding 505: bits are also set. 506: 507: Here is how the bits are set: 508: Pushing onto the stack invalidates only the stack pointer, 509: writing at a fixed address invalidates only variable addresses, 510: writing in a structure element at variable address 511: invalidates all but scalar variables, 512: and writing in anything else at variable address invalidates everything. */ 513: 514: struct write_data 515: { 516: int sp : 1; /* Invalidate stack pointer. */ 517: int var : 1; /* Invalidate variable addresses. */ 518: int nonscalar : 1; /* Invalidate all but scalar variables. */ 519: int all : 1; /* Invalidate all memory refs. */ 520: }; 521: 1.1.1.5 ! root 522: /* Define maximum length of a branch path. */ ! 523: ! 524: #define PATHLENGTH 10 ! 525: ! 526: /* This data describes a block that will be processed by cse_basic_block. */ ! 527: ! 528: struct cse_basic_block_data { ! 529: /* Lowest CUID value of insns in block. */ ! 530: int low_cuid; ! 531: /* Highest CUID value of insns in block. */ ! 532: int high_cuid; ! 533: /* Total number of SETs in block. */ ! 534: int nsets; ! 535: /* Last insn in the block. */ ! 536: rtx last; ! 537: /* Size of current branch path, if any. */ ! 538: int path_size; ! 539: /* Current branch path, indicating which branches will be taken. */ ! 540: struct branch_path { ! 541: /* The branch insn. */ ! 542: rtx branch; ! 543: /* Whether it should be taken or not. AROUND is the same as taken ! 544: except that it is used when the destination label is not preceded ! 545: by a BARRIER. */ ! 546: enum taken {TAKEN, NOT_TAKEN, AROUND} status; ! 547: } path[PATHLENGTH]; ! 548: }; ! 549: 1.1 root 550: /* Nonzero if X has the form (PLUS frame-pointer integer). We check for 551: virtual regs here because the simplify_*_operation routines are called 552: by integrate.c, which is called before virtual register instantiation. */ 553: 554: #define FIXED_BASE_PLUS_P(X) \ 555: ((X) == frame_pointer_rtx || (X) == arg_pointer_rtx \ 556: || (X) == virtual_stack_vars_rtx \ 557: || (X) == virtual_incoming_args_rtx \ 558: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ 559: && (XEXP (X, 0) == frame_pointer_rtx \ 560: || XEXP (X, 0) == arg_pointer_rtx \ 561: || XEXP (X, 0) == virtual_stack_vars_rtx \ 562: || XEXP (X, 0) == virtual_incoming_args_rtx))) 563: 1.1.1.3 root 564: /* Similar, but also allows reference to the stack pointer. 565: 566: This used to include FIXED_BASE_PLUS_P, however, we can't assume that 567: arg_pointer_rtx by itself is nonzero, because on at least one machine, 568: the i960, the arg pointer is zero when it is unused. */ 1.1 root 569: 570: #define NONZERO_BASE_PLUS_P(X) \ 1.1.1.3 root 571: ((X) == frame_pointer_rtx \ 572: || (X) == virtual_stack_vars_rtx \ 573: || (X) == virtual_incoming_args_rtx \ 574: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ 575: && (XEXP (X, 0) == frame_pointer_rtx \ 576: || XEXP (X, 0) == arg_pointer_rtx \ 577: || XEXP (X, 0) == virtual_stack_vars_rtx \ 578: || XEXP (X, 0) == virtual_incoming_args_rtx)) \ 1.1 root 579: || (X) == stack_pointer_rtx \ 580: || (X) == virtual_stack_dynamic_rtx \ 581: || (X) == virtual_outgoing_args_rtx \ 582: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ 583: && (XEXP (X, 0) == stack_pointer_rtx \ 584: || XEXP (X, 0) == virtual_stack_dynamic_rtx \ 585: || XEXP (X, 0) == virtual_outgoing_args_rtx))) 586: 1.1.1.5 ! root 587: static void new_basic_block PROTO((void)); ! 588: static void make_new_qty PROTO((int)); ! 589: static void make_regs_eqv PROTO((int, int)); ! 590: static void delete_reg_equiv PROTO((int)); ! 591: static int mention_regs PROTO((rtx)); ! 592: static int insert_regs PROTO((rtx, struct table_elt *, int)); ! 593: static void free_element PROTO((struct table_elt *)); ! 594: static void remove_from_table PROTO((struct table_elt *, int)); ! 595: static struct table_elt *get_element PROTO((void)); ! 596: static struct table_elt *lookup PROTO((rtx, int, enum machine_mode)), ! 597: *lookup_for_remove PROTO((rtx, int, enum machine_mode)); ! 598: static rtx lookup_as_function PROTO((rtx, enum rtx_code)); ! 599: static struct table_elt *insert PROTO((rtx, struct table_elt *, int, ! 600: enum machine_mode)); ! 601: static void merge_equiv_classes PROTO((struct table_elt *, ! 602: struct table_elt *)); ! 603: static void invalidate PROTO((rtx)); ! 604: static void remove_invalid_refs PROTO((int)); ! 605: static void rehash_using_reg PROTO((rtx)); ! 606: static void invalidate_memory PROTO((struct write_data *)); ! 607: static void invalidate_for_call PROTO((void)); ! 608: static rtx use_related_value PROTO((rtx, struct table_elt *)); ! 609: static int canon_hash PROTO((rtx, enum machine_mode)); ! 610: static int safe_hash PROTO((rtx, enum machine_mode)); ! 611: static int exp_equiv_p PROTO((rtx, rtx, int, int)); ! 612: static void set_nonvarying_address_components PROTO((rtx, int, rtx *, ! 613: HOST_WIDE_INT *, ! 614: HOST_WIDE_INT *)); ! 615: static int refers_to_p PROTO((rtx, rtx)); ! 616: static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT, ! 617: HOST_WIDE_INT)); ! 618: static int cse_rtx_addr_varies_p PROTO((rtx)); ! 619: static rtx canon_reg PROTO((rtx, rtx)); ! 620: static void find_best_addr PROTO((rtx, rtx *)); ! 621: static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *, ! 622: enum machine_mode *, ! 623: enum machine_mode *)); ! 624: static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode, ! 625: rtx, rtx)); ! 626: static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode, ! 627: rtx, rtx)); ! 628: static rtx fold_rtx PROTO((rtx, rtx)); ! 629: static rtx equiv_constant PROTO((rtx)); ! 630: static void record_jump_equiv PROTO((rtx, int)); ! 631: static void record_jump_cond PROTO((enum rtx_code, enum machine_mode, ! 632: rtx, rtx, int)); ! 633: static void cse_insn PROTO((rtx, int)); ! 634: static void note_mem_written PROTO((rtx, struct write_data *)); ! 635: static void invalidate_from_clobbers PROTO((struct write_data *, rtx)); ! 636: static rtx cse_process_notes PROTO((rtx, rtx)); ! 637: static void cse_around_loop PROTO((rtx)); ! 638: static void invalidate_skipped_set PROTO((rtx, rtx)); ! 639: static void invalidate_skipped_block PROTO((rtx)); ! 640: static void cse_check_loop_start PROTO((rtx, rtx)); ! 641: static void cse_set_around_loop PROTO((rtx, rtx, rtx)); ! 642: static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int)); ! 643: static void count_reg_usage PROTO((rtx, int *, int)); 1.1 root 644: 645: /* Return an estimate of the cost of computing rtx X. 646: One use is in cse, to decide which expression to keep in the hash table. 647: Another is in rtl generation, to pick the cheapest way to multiply. 648: Other uses like the latter are expected in the future. */ 649: 650: /* Return the right cost to give to an operation 651: to make the cost of the corresponding register-to-register instruction 652: N times that of a fast register-to-register instruction. */ 653: 654: #define COSTS_N_INSNS(N) ((N) * 4 - 2) 655: 656: int 1.1.1.3 root 657: rtx_cost (x, outer_code) 1.1 root 658: rtx x; 1.1.1.3 root 659: enum rtx_code outer_code; 1.1 root 660: { 661: register int i, j; 662: register enum rtx_code code; 663: register char *fmt; 664: register int total; 665: 666: if (x == 0) 667: return 0; 668: 669: /* Compute the default costs of certain things. 670: Note that RTX_COSTS can override the defaults. */ 671: 672: code = GET_CODE (x); 673: switch (code) 674: { 675: case MULT: 676: /* Count multiplication by 2**n as a shift, 677: because if we are considering it, we would output it as a shift. */ 678: if (GET_CODE (XEXP (x, 1)) == CONST_INT 679: && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) 680: total = 2; 681: else 682: total = COSTS_N_INSNS (5); 683: break; 684: case DIV: 685: case UDIV: 686: case MOD: 687: case UMOD: 688: total = COSTS_N_INSNS (7); 689: break; 690: case USE: 691: /* Used in loop.c and combine.c as a marker. */ 692: total = 0; 693: break; 1.1.1.2 root 694: case ASM_OPERANDS: 695: /* We don't want these to be used in substitutions because 696: we have no way of validating the resulting insn. So assign 697: anything containing an ASM_OPERANDS a very high cost. */ 698: total = 1000; 699: break; 1.1 root 700: default: 701: total = 2; 702: } 703: 704: switch (code) 705: { 706: case REG: 1.1.1.5 ! root 707: return ! CHEAP_REG (REGNO (x)); ! 708: 1.1 root 709: case SUBREG: 1.1.1.3 root 710: /* If we can't tie these modes, make this expensive. The larger 711: the mode, the more expensive it is. */ 712: if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) 713: return COSTS_N_INSNS (2 714: + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); 1.1 root 715: return 2; 716: #ifdef RTX_COSTS 1.1.1.3 root 717: RTX_COSTS (x, code, outer_code); 1.1 root 718: #endif 1.1.1.3 root 719: CONST_COSTS (x, code, outer_code); 1.1 root 720: } 721: 722: /* Sum the costs of the sub-rtx's, plus cost of this operation, 723: which is already in total. */ 724: 725: fmt = GET_RTX_FORMAT (code); 726: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 727: if (fmt[i] == 'e') 1.1.1.3 root 728: total += rtx_cost (XEXP (x, i), code); 1.1 root 729: else if (fmt[i] == 'E') 730: for (j = 0; j < XVECLEN (x, i); j++) 1.1.1.3 root 731: total += rtx_cost (XVECEXP (x, i, j), code); 1.1 root 732: 733: return total; 734: } 735: 736: /* Clear the hash table and initialize each register with its own quantity, 737: for a new basic block. */ 738: 739: static void 740: new_basic_block () 741: { 742: register int i; 743: 744: next_qty = max_reg; 745: 746: bzero (reg_tick, max_reg * sizeof (int)); 747: 748: bcopy (all_minus_one, reg_in_table, max_reg * sizeof (int)); 749: bcopy (consec_ints, reg_qty, max_reg * sizeof (int)); 750: CLEAR_HARD_REG_SET (hard_regs_in_table); 751: 752: /* The per-quantity values used to be initialized here, but it is 753: much faster to initialize each as it is made in `make_new_qty'. */ 754: 755: for (i = 0; i < NBUCKETS; i++) 756: { 757: register struct table_elt *this, *next; 758: for (this = table[i]; this; this = next) 759: { 760: next = this->next_same_hash; 761: free_element (this); 762: } 763: } 764: 765: bzero (table, sizeof table); 766: 767: prev_insn = 0; 768: 769: #ifdef HAVE_cc0 770: prev_insn_cc0 = 0; 771: #endif 772: } 773: 774: /* Say that register REG contains a quantity not in any register before 775: and initialize that quantity. */ 776: 777: static void 778: make_new_qty (reg) 779: register int reg; 780: { 781: register int q; 782: 783: if (next_qty >= max_qty) 784: abort (); 785: 786: q = reg_qty[reg] = next_qty++; 787: qty_first_reg[q] = reg; 788: qty_last_reg[q] = reg; 789: qty_const[q] = qty_const_insn[q] = 0; 790: qty_comparison_code[q] = UNKNOWN; 791: 792: reg_next_eqv[reg] = reg_prev_eqv[reg] = -1; 793: } 794: 795: /* Make reg NEW equivalent to reg OLD. 796: OLD is not changing; NEW is. */ 797: 798: static void 799: make_regs_eqv (new, old) 800: register int new, old; 801: { 802: register int lastr, firstr; 803: register int q = reg_qty[old]; 804: 805: /* Nothing should become eqv until it has a "non-invalid" qty number. */ 806: if (! REGNO_QTY_VALID_P (old)) 807: abort (); 808: 809: reg_qty[new] = q; 810: firstr = qty_first_reg[q]; 811: lastr = qty_last_reg[q]; 812: 813: /* Prefer fixed hard registers to anything. Prefer pseudo regs to other 814: hard regs. Among pseudos, if NEW will live longer than any other reg 815: of the same qty, and that is beyond the current basic block, 816: make it the new canonical replacement for this qty. */ 817: if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) 818: /* Certain fixed registers might be of the class NO_REGS. This means 819: that not only can they not be allocated by the compiler, but 1.1.1.3 root 820: they cannot be used in substitutions or canonicalizations 1.1 root 821: either. */ 822: && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) 823: && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) 824: || (new >= FIRST_PSEUDO_REGISTER 825: && (firstr < FIRST_PSEUDO_REGISTER 826: || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end 827: || (uid_cuid[regno_first_uid[new]] 828: < cse_basic_block_start)) 829: && (uid_cuid[regno_last_uid[new]] 830: > uid_cuid[regno_last_uid[firstr]])))))) 831: { 832: reg_prev_eqv[firstr] = new; 833: reg_next_eqv[new] = firstr; 834: reg_prev_eqv[new] = -1; 835: qty_first_reg[q] = new; 836: } 837: else 838: { 839: /* If NEW is a hard reg (known to be non-fixed), insert at end. 840: Otherwise, insert before any non-fixed hard regs that are at the 841: end. Registers of class NO_REGS cannot be used as an 842: equivalent for anything. */ 843: while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0 844: && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) 845: && new >= FIRST_PSEUDO_REGISTER) 846: lastr = reg_prev_eqv[lastr]; 847: reg_next_eqv[new] = reg_next_eqv[lastr]; 848: if (reg_next_eqv[lastr] >= 0) 849: reg_prev_eqv[reg_next_eqv[lastr]] = new; 850: else 851: qty_last_reg[q] = new; 852: reg_next_eqv[lastr] = new; 853: reg_prev_eqv[new] = lastr; 854: } 855: } 856: 857: /* Remove REG from its equivalence class. */ 858: 859: static void 860: delete_reg_equiv (reg) 861: register int reg; 862: { 863: register int n = reg_next_eqv[reg]; 864: register int p = reg_prev_eqv[reg]; 865: register int q = reg_qty[reg]; 866: 867: /* If invalid, do nothing. N and P above are undefined in that case. */ 868: if (q == reg) 869: return; 870: 871: if (n != -1) 872: reg_prev_eqv[n] = p; 873: else 874: qty_last_reg[q] = p; 875: if (p != -1) 876: reg_next_eqv[p] = n; 877: else 878: qty_first_reg[q] = n; 879: 880: reg_qty[reg] = reg; 881: } 882: 883: /* Remove any invalid expressions from the hash table 884: that refer to any of the registers contained in expression X. 885: 886: Make sure that newly inserted references to those registers 887: as subexpressions will be considered valid. 888: 889: mention_regs is not called when a register itself 890: is being stored in the table. 891: 892: Return 1 if we have done something that may have changed the hash code 893: of X. */ 894: 895: static int 896: mention_regs (x) 897: rtx x; 898: { 899: register enum rtx_code code; 900: register int i, j; 901: register char *fmt; 902: register int changed = 0; 903: 904: if (x == 0) 1.1.1.3 root 905: return 0; 1.1 root 906: 907: code = GET_CODE (x); 908: if (code == REG) 909: { 910: register int regno = REGNO (x); 911: register int endregno 912: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 913: : HARD_REGNO_NREGS (regno, GET_MODE (x))); 914: int i; 915: 916: for (i = regno; i < endregno; i++) 917: { 918: if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i]) 919: remove_invalid_refs (i); 920: 921: reg_in_table[i] = reg_tick[i]; 922: } 923: 924: return 0; 925: } 926: 927: /* If X is a comparison or a COMPARE and either operand is a register 928: that does not have a quantity, give it one. This is so that a later 929: call to record_jump_equiv won't cause X to be assigned a different 930: hash code and not found in the table after that call. 931: 932: It is not necessary to do this here, since rehash_using_reg can 933: fix up the table later, but doing this here eliminates the need to 934: call that expensive function in the most common case where the only 935: use of the register is in the comparison. */ 936: 937: if (code == COMPARE || GET_RTX_CLASS (code) == '<') 938: { 939: if (GET_CODE (XEXP (x, 0)) == REG 940: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) 1.1.1.4 root 941: if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) 1.1 root 942: { 943: rehash_using_reg (XEXP (x, 0)); 944: changed = 1; 945: } 946: 947: if (GET_CODE (XEXP (x, 1)) == REG 948: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) 1.1.1.4 root 949: if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) 1.1 root 950: { 951: rehash_using_reg (XEXP (x, 1)); 952: changed = 1; 953: } 954: } 955: 956: fmt = GET_RTX_FORMAT (code); 957: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 958: if (fmt[i] == 'e') 959: changed |= mention_regs (XEXP (x, i)); 960: else if (fmt[i] == 'E') 961: for (j = 0; j < XVECLEN (x, i); j++) 962: changed |= mention_regs (XVECEXP (x, i, j)); 963: 964: return changed; 965: } 966: 967: /* Update the register quantities for inserting X into the hash table 968: with a value equivalent to CLASSP. 969: (If the class does not contain a REG, it is irrelevant.) 970: If MODIFIED is nonzero, X is a destination; it is being modified. 971: Note that delete_reg_equiv should be called on a register 972: before insert_regs is done on that register with MODIFIED != 0. 973: 974: Nonzero value means that elements of reg_qty have changed 975: so X's hash code may be different. */ 976: 977: static int 978: insert_regs (x, classp, modified) 979: rtx x; 980: struct table_elt *classp; 981: int modified; 982: { 983: if (GET_CODE (x) == REG) 984: { 985: register int regno = REGNO (x); 986: 1.1.1.5 ! root 987: /* If REGNO is in the equivalence table already but is of the ! 988: wrong mode for that equivalence, don't do anything here. */ ! 989: ! 990: if (REGNO_QTY_VALID_P (regno) ! 991: && qty_mode[reg_qty[regno]] != GET_MODE (x)) ! 992: return 0; ! 993: ! 994: if (modified || ! REGNO_QTY_VALID_P (regno)) 1.1 root 995: { 996: if (classp) 997: for (classp = classp->first_same_value; 998: classp != 0; 999: classp = classp->next_same_value) 1000: if (GET_CODE (classp->exp) == REG 1001: && GET_MODE (classp->exp) == GET_MODE (x)) 1002: { 1003: make_regs_eqv (regno, REGNO (classp->exp)); 1004: return 1; 1005: } 1006: 1007: make_new_qty (regno); 1008: qty_mode[reg_qty[regno]] = GET_MODE (x); 1009: return 1; 1010: } 1011: } 1.1.1.4 root 1012: 1013: /* If X is a SUBREG, we will likely be inserting the inner register in the 1014: table. If that register doesn't have an assigned quantity number at 1015: this point but does later, the insertion that we will be doing now will 1016: not be accessible because its hash code will have changed. So assign 1017: a quantity number now. */ 1018: 1019: else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG 1020: && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) 1021: { 1022: insert_regs (SUBREG_REG (x), NULL_PTR, 0); 1023: mention_regs (SUBREG_REG (x)); 1024: return 1; 1025: } 1.1 root 1026: else 1027: return mention_regs (x); 1028: } 1029: 1030: /* Look in or update the hash table. */ 1031: 1032: /* Put the element ELT on the list of free elements. */ 1033: 1034: static void 1035: free_element (elt) 1036: struct table_elt *elt; 1037: { 1038: elt->next_same_hash = free_element_chain; 1039: free_element_chain = elt; 1040: } 1041: 1042: /* Return an element that is free for use. */ 1043: 1044: static struct table_elt * 1045: get_element () 1046: { 1047: struct table_elt *elt = free_element_chain; 1048: if (elt) 1049: { 1050: free_element_chain = elt->next_same_hash; 1051: return elt; 1052: } 1053: n_elements_made++; 1054: return (struct table_elt *) oballoc (sizeof (struct table_elt)); 1055: } 1056: 1057: /* Remove table element ELT from use in the table. 1058: HASH is its hash code, made using the HASH macro. 1059: It's an argument because often that is known in advance 1060: and we save much time not recomputing it. */ 1061: 1062: static void 1063: remove_from_table (elt, hash) 1064: register struct table_elt *elt; 1065: int hash; 1066: { 1067: if (elt == 0) 1068: return; 1069: 1070: /* Mark this element as removed. See cse_insn. */ 1071: elt->first_same_value = 0; 1072: 1073: /* Remove the table element from its equivalence class. */ 1074: 1075: { 1076: register struct table_elt *prev = elt->prev_same_value; 1077: register struct table_elt *next = elt->next_same_value; 1078: 1079: if (next) next->prev_same_value = prev; 1080: 1081: if (prev) 1082: prev->next_same_value = next; 1083: else 1084: { 1085: register struct table_elt *newfirst = next; 1086: while (next) 1087: { 1088: next->first_same_value = newfirst; 1089: next = next->next_same_value; 1090: } 1091: } 1092: } 1093: 1094: /* Remove the table element from its hash bucket. */ 1095: 1096: { 1097: register struct table_elt *prev = elt->prev_same_hash; 1098: register struct table_elt *next = elt->next_same_hash; 1099: 1100: if (next) next->prev_same_hash = prev; 1101: 1102: if (prev) 1103: prev->next_same_hash = next; 1104: else if (table[hash] == elt) 1105: table[hash] = next; 1106: else 1107: { 1108: /* This entry is not in the proper hash bucket. This can happen 1109: when two classes were merged by `merge_equiv_classes'. Search 1110: for the hash bucket that it heads. This happens only very 1111: rarely, so the cost is acceptable. */ 1112: for (hash = 0; hash < NBUCKETS; hash++) 1113: if (table[hash] == elt) 1114: table[hash] = next; 1115: } 1116: } 1117: 1118: /* Remove the table element from its related-value circular chain. */ 1119: 1120: if (elt->related_value != 0 && elt->related_value != elt) 1121: { 1122: register struct table_elt *p = elt->related_value; 1123: while (p->related_value != elt) 1124: p = p->related_value; 1125: p->related_value = elt->related_value; 1126: if (p->related_value == p) 1127: p->related_value = 0; 1128: } 1129: 1130: free_element (elt); 1131: } 1132: 1133: /* Look up X in the hash table and return its table element, 1134: or 0 if X is not in the table. 1135: 1136: MODE is the machine-mode of X, or if X is an integer constant 1137: with VOIDmode then MODE is the mode with which X will be used. 1138: 1139: Here we are satisfied to find an expression whose tree structure 1140: looks like X. */ 1141: 1142: static struct table_elt * 1143: lookup (x, hash, mode) 1144: rtx x; 1145: int hash; 1146: enum machine_mode mode; 1147: { 1148: register struct table_elt *p; 1149: 1150: for (p = table[hash]; p; p = p->next_same_hash) 1151: if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) 1152: || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) 1153: return p; 1154: 1155: return 0; 1156: } 1157: 1158: /* Like `lookup' but don't care whether the table element uses invalid regs. 1159: Also ignore discrepancies in the machine mode of a register. */ 1160: 1161: static struct table_elt * 1162: lookup_for_remove (x, hash, mode) 1163: rtx x; 1164: int hash; 1165: enum machine_mode mode; 1166: { 1167: register struct table_elt *p; 1168: 1169: if (GET_CODE (x) == REG) 1170: { 1171: int regno = REGNO (x); 1172: /* Don't check the machine mode when comparing registers; 1173: invalidating (REG:SI 0) also invalidates (REG:DF 0). */ 1174: for (p = table[hash]; p; p = p->next_same_hash) 1175: if (GET_CODE (p->exp) == REG 1176: && REGNO (p->exp) == regno) 1177: return p; 1178: } 1179: else 1180: { 1181: for (p = table[hash]; p; p = p->next_same_hash) 1182: if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) 1183: return p; 1184: } 1185: 1186: return 0; 1187: } 1188: 1189: /* Look for an expression equivalent to X and with code CODE. 1190: If one is found, return that expression. */ 1191: 1192: static rtx 1193: lookup_as_function (x, code) 1194: rtx x; 1195: enum rtx_code code; 1196: { 1197: register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, 1198: GET_MODE (x)); 1199: if (p == 0) 1200: return 0; 1201: 1202: for (p = p->first_same_value; p; p = p->next_same_value) 1203: { 1204: if (GET_CODE (p->exp) == code 1205: /* Make sure this is a valid entry in the table. */ 1206: && exp_equiv_p (p->exp, p->exp, 1, 0)) 1207: return p->exp; 1208: } 1209: 1210: return 0; 1211: } 1212: 1213: /* Insert X in the hash table, assuming HASH is its hash code 1214: and CLASSP is an element of the class it should go in 1215: (or 0 if a new class should be made). 1216: It is inserted at the proper position to keep the class in 1217: the order cheapest first. 1218: 1219: MODE is the machine-mode of X, or if X is an integer constant 1220: with VOIDmode then MODE is the mode with which X will be used. 1221: 1222: For elements of equal cheapness, the most recent one 1223: goes in front, except that the first element in the list 1224: remains first unless a cheaper element is added. The order of 1225: pseudo-registers does not matter, as canon_reg will be called to 1.1.1.3 root 1226: find the cheapest when a register is retrieved from the table. 1.1 root 1227: 1228: The in_memory field in the hash table element is set to 0. 1229: The caller must set it nonzero if appropriate. 1230: 1231: You should call insert_regs (X, CLASSP, MODIFY) before calling here, 1232: and if insert_regs returns a nonzero value 1233: you must then recompute its hash code before calling here. 1234: 1235: If necessary, update table showing constant values of quantities. */ 1236: 1237: #define CHEAPER(X,Y) ((X)->cost < (Y)->cost) 1238: 1239: static struct table_elt * 1240: insert (x, classp, hash, mode) 1241: register rtx x; 1242: register struct table_elt *classp; 1243: int hash; 1244: enum machine_mode mode; 1245: { 1246: register struct table_elt *elt; 1247: 1248: /* If X is a register and we haven't made a quantity for it, 1249: something is wrong. */ 1250: if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) 1251: abort (); 1252: 1253: /* If X is a hard register, show it is being put in the table. */ 1254: if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) 1255: { 1256: int regno = REGNO (x); 1257: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); 1258: int i; 1259: 1260: for (i = regno; i < endregno; i++) 1261: SET_HARD_REG_BIT (hard_regs_in_table, i); 1262: } 1263: 1264: 1265: /* Put an element for X into the right hash bucket. */ 1266: 1267: elt = get_element (); 1268: elt->exp = x; 1269: elt->cost = COST (x); 1270: elt->next_same_value = 0; 1271: elt->prev_same_value = 0; 1272: elt->next_same_hash = table[hash]; 1273: elt->prev_same_hash = 0; 1274: elt->related_value = 0; 1275: elt->in_memory = 0; 1276: elt->mode = mode; 1277: elt->is_const = (CONSTANT_P (x) 1278: /* GNU C++ takes advantage of this for `this' 1279: (and other const values). */ 1280: || (RTX_UNCHANGING_P (x) 1281: && GET_CODE (x) == REG 1282: && REGNO (x) >= FIRST_PSEUDO_REGISTER) 1283: || FIXED_BASE_PLUS_P (x)); 1284: 1285: if (table[hash]) 1286: table[hash]->prev_same_hash = elt; 1287: table[hash] = elt; 1288: 1289: /* Put it into the proper value-class. */ 1290: if (classp) 1291: { 1292: classp = classp->first_same_value; 1293: if (CHEAPER (elt, classp)) 1294: /* Insert at the head of the class */ 1295: { 1296: register struct table_elt *p; 1297: elt->next_same_value = classp; 1298: classp->prev_same_value = elt; 1299: elt->first_same_value = elt; 1300: 1301: for (p = classp; p; p = p->next_same_value) 1302: p->first_same_value = elt; 1303: } 1304: else 1305: { 1306: /* Insert not at head of the class. */ 1307: /* Put it after the last element cheaper than X. */ 1308: register struct table_elt *p, *next; 1309: for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); 1310: p = next); 1311: /* Put it after P and before NEXT. */ 1312: elt->next_same_value = next; 1313: if (next) 1314: next->prev_same_value = elt; 1315: elt->prev_same_value = p; 1316: p->next_same_value = elt; 1317: elt->first_same_value = classp; 1318: } 1319: } 1320: else 1321: elt->first_same_value = elt; 1322: 1323: /* If this is a constant being set equivalent to a register or a register 1324: being set equivalent to a constant, note the constant equivalence. 1325: 1326: If this is a constant, it cannot be equivalent to a different constant, 1327: and a constant is the only thing that can be cheaper than a register. So 1328: we know the register is the head of the class (before the constant was 1329: inserted). 1330: 1331: If this is a register that is not already known equivalent to a 1332: constant, we must check the entire class. 1333: 1334: If this is a register that is already known equivalent to an insn, 1335: update `qty_const_insn' to show that `this_insn' is the latest 1336: insn making that quantity equivalent to the constant. */ 1337: 1338: if (elt->is_const && classp && GET_CODE (classp->exp) == REG) 1339: { 1340: qty_const[reg_qty[REGNO (classp->exp)]] 1341: = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x); 1342: qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn; 1343: } 1344: 1345: else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]]) 1346: { 1347: register struct table_elt *p; 1348: 1349: for (p = classp; p != 0; p = p->next_same_value) 1350: { 1351: if (p->is_const) 1352: { 1353: qty_const[reg_qty[REGNO (x)]] 1354: = gen_lowpart_if_possible (GET_MODE (x), p->exp); 1355: qty_const_insn[reg_qty[REGNO (x)]] = this_insn; 1356: break; 1357: } 1358: } 1359: } 1360: 1361: else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]] 1362: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]) 1363: qty_const_insn[reg_qty[REGNO (x)]] = this_insn; 1364: 1365: /* If this is a constant with symbolic value, 1366: and it has a term with an explicit integer value, 1367: link it up with related expressions. */ 1368: if (GET_CODE (x) == CONST) 1369: { 1370: rtx subexp = get_related_value (x); 1371: int subhash; 1372: struct table_elt *subelt, *subelt_prev; 1373: 1374: if (subexp != 0) 1375: { 1376: /* Get the integer-free subexpression in the hash table. */ 1377: subhash = safe_hash (subexp, mode) % NBUCKETS; 1378: subelt = lookup (subexp, subhash, mode); 1379: if (subelt == 0) 1.1.1.4 root 1380: subelt = insert (subexp, NULL_PTR, subhash, mode); 1.1 root 1381: /* Initialize SUBELT's circular chain if it has none. */ 1382: if (subelt->related_value == 0) 1383: subelt->related_value = subelt; 1384: /* Find the element in the circular chain that precedes SUBELT. */ 1385: subelt_prev = subelt; 1386: while (subelt_prev->related_value != subelt) 1387: subelt_prev = subelt_prev->related_value; 1388: /* Put new ELT into SUBELT's circular chain just before SUBELT. 1389: This way the element that follows SUBELT is the oldest one. */ 1390: elt->related_value = subelt_prev->related_value; 1391: subelt_prev->related_value = elt; 1392: } 1393: } 1394: 1395: return elt; 1396: } 1397: 1398: /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from 1399: CLASS2 into CLASS1. This is done when we have reached an insn which makes 1400: the two classes equivalent. 1401: 1402: CLASS1 will be the surviving class; CLASS2 should not be used after this 1403: call. 1404: 1405: Any invalid entries in CLASS2 will not be copied. */ 1406: 1407: static void 1408: merge_equiv_classes (class1, class2) 1409: struct table_elt *class1, *class2; 1410: { 1411: struct table_elt *elt, *next, *new; 1412: 1413: /* Ensure we start with the head of the classes. */ 1414: class1 = class1->first_same_value; 1415: class2 = class2->first_same_value; 1416: 1417: /* If they were already equal, forget it. */ 1418: if (class1 == class2) 1419: return; 1420: 1421: for (elt = class2; elt; elt = next) 1422: { 1423: int hash; 1424: rtx exp = elt->exp; 1425: enum machine_mode mode = elt->mode; 1426: 1427: next = elt->next_same_value; 1428: 1429: /* Remove old entry, make a new one in CLASS1's class. 1430: Don't do this for invalid entries as we cannot find their 1431: hash code (it also isn't necessary). */ 1432: if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) 1433: { 1434: hash_arg_in_memory = 0; 1435: hash_arg_in_struct = 0; 1436: hash = HASH (exp, mode); 1437: 1438: if (GET_CODE (exp) == REG) 1439: delete_reg_equiv (REGNO (exp)); 1440: 1441: remove_from_table (elt, hash); 1442: 1443: if (insert_regs (exp, class1, 0)) 1444: hash = HASH (exp, mode); 1445: new = insert (exp, class1, hash, mode); 1446: new->in_memory = hash_arg_in_memory; 1447: new->in_struct = hash_arg_in_struct; 1448: } 1449: } 1450: } 1451: 1452: /* Remove from the hash table, or mark as invalid, 1453: all expressions whose values could be altered by storing in X. 1454: X is a register, a subreg, or a memory reference with nonvarying address 1455: (because, when a memory reference with a varying address is stored in, 1456: all memory references are removed by invalidate_memory 1457: so specific invalidation is superfluous). 1458: 1459: A nonvarying address may be just a register or just 1460: a symbol reference, or it may be either of those plus 1461: a numeric offset. */ 1462: 1463: static void 1464: invalidate (x) 1465: rtx x; 1466: { 1467: register int i; 1468: register struct table_elt *p; 1.1.1.5 ! root 1469: rtx base; ! 1470: HOST_WIDE_INT start, end; 1.1 root 1471: 1472: /* If X is a register, dependencies on its contents 1473: are recorded through the qty number mechanism. 1474: Just change the qty number of the register, 1475: mark it as invalid for expressions that refer to it, 1476: and remove it itself. */ 1477: 1478: if (GET_CODE (x) == REG) 1479: { 1480: register int regno = REGNO (x); 1481: register int hash = HASH (x, GET_MODE (x)); 1482: 1483: /* Remove REGNO from any quantity list it might be on and indicate 1484: that it's value might have changed. If it is a pseudo, remove its 1485: entry from the hash table. 1486: 1487: For a hard register, we do the first two actions above for any 1488: additional hard registers corresponding to X. Then, if any of these 1489: registers are in the table, we must remove any REG entries that 1490: overlap these registers. */ 1491: 1492: delete_reg_equiv (regno); 1493: reg_tick[regno]++; 1494: 1495: if (regno >= FIRST_PSEUDO_REGISTER) 1496: remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash); 1497: else 1498: { 1.1.1.5 ! root 1499: HOST_WIDE_INT in_table ! 1500: = TEST_HARD_REG_BIT (hard_regs_in_table, regno); 1.1 root 1501: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); 1502: int tregno, tendregno; 1503: register struct table_elt *p, *next; 1504: 1505: CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); 1506: 1507: for (i = regno + 1; i < endregno; i++) 1508: { 1509: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i); 1510: CLEAR_HARD_REG_BIT (hard_regs_in_table, i); 1511: delete_reg_equiv (i); 1512: reg_tick[i]++; 1513: } 1514: 1515: if (in_table) 1516: for (hash = 0; hash < NBUCKETS; hash++) 1517: for (p = table[hash]; p; p = next) 1518: { 1519: next = p->next_same_hash; 1520: 1521: if (GET_CODE (p->exp) != REG 1522: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) 1523: continue; 1524: 1525: tregno = REGNO (p->exp); 1526: tendregno 1527: = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); 1528: if (tendregno > regno && tregno < endregno) 1529: remove_from_table (p, hash); 1530: } 1531: } 1532: 1533: return; 1534: } 1535: 1536: if (GET_CODE (x) == SUBREG) 1537: { 1538: if (GET_CODE (SUBREG_REG (x)) != REG) 1539: abort (); 1540: invalidate (SUBREG_REG (x)); 1541: return; 1542: } 1543: 1544: /* X is not a register; it must be a memory reference with 1545: a nonvarying address. Remove all hash table elements 1546: that refer to overlapping pieces of memory. */ 1547: 1548: if (GET_CODE (x) != MEM) 1549: abort (); 1550: 1.1.1.5 ! root 1551: set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (GET_MODE (x)), ! 1552: &base, &start, &end); 1.1 root 1553: 1554: for (i = 0; i < NBUCKETS; i++) 1555: { 1556: register struct table_elt *next; 1557: for (p = table[i]; p; p = next) 1558: { 1559: next = p->next_same_hash; 1560: if (refers_to_mem_p (p->exp, base, start, end)) 1561: remove_from_table (p, i); 1562: } 1563: } 1564: } 1565: 1566: /* Remove all expressions that refer to register REGNO, 1567: since they are already invalid, and we are about to 1568: mark that register valid again and don't want the old 1569: expressions to reappear as valid. */ 1570: 1571: static void 1572: remove_invalid_refs (regno) 1573: int regno; 1574: { 1575: register int i; 1576: register struct table_elt *p, *next; 1577: 1578: for (i = 0; i < NBUCKETS; i++) 1579: for (p = table[i]; p; p = next) 1580: { 1581: next = p->next_same_hash; 1582: if (GET_CODE (p->exp) != REG 1.1.1.4 root 1583: && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) 1.1 root 1584: remove_from_table (p, i); 1585: } 1586: } 1587: 1588: /* Recompute the hash codes of any valid entries in the hash table that 1589: reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. 1590: 1591: This is called when we make a jump equivalence. */ 1592: 1593: static void 1594: rehash_using_reg (x) 1595: rtx x; 1596: { 1597: int i; 1598: struct table_elt *p, *next; 1599: int hash; 1600: 1601: if (GET_CODE (x) == SUBREG) 1602: x = SUBREG_REG (x); 1603: 1604: /* If X is not a register or if the register is known not to be in any 1605: valid entries in the table, we have no work to do. */ 1606: 1607: if (GET_CODE (x) != REG 1608: || reg_in_table[REGNO (x)] < 0 1609: || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)]) 1610: return; 1611: 1612: /* Scan all hash chains looking for valid entries that mention X. 1613: If we find one and it is in the wrong hash chain, move it. We can skip 1614: objects that are registers, since they are handled specially. */ 1615: 1616: for (i = 0; i < NBUCKETS; i++) 1617: for (p = table[i]; p; p = next) 1618: { 1619: next = p->next_same_hash; 1620: if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) 1.1.1.2 root 1621: && exp_equiv_p (p->exp, p->exp, 1, 0) 1.1 root 1622: && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS)) 1623: { 1624: if (p->next_same_hash) 1625: p->next_same_hash->prev_same_hash = p->prev_same_hash; 1626: 1627: if (p->prev_same_hash) 1628: p->prev_same_hash->next_same_hash = p->next_same_hash; 1629: else 1630: table[i] = p->next_same_hash; 1631: 1632: p->next_same_hash = table[hash]; 1633: p->prev_same_hash = 0; 1634: if (table[hash]) 1635: table[hash]->prev_same_hash = p; 1636: table[hash] = p; 1637: } 1638: } 1639: } 1640: 1641: /* Remove from the hash table all expressions that reference memory, 1642: or some of them as specified by *WRITES. */ 1643: 1644: static void 1645: invalidate_memory (writes) 1646: struct write_data *writes; 1647: { 1648: register int i; 1649: register struct table_elt *p, *next; 1650: int all = writes->all; 1651: int nonscalar = writes->nonscalar; 1652: 1653: for (i = 0; i < NBUCKETS; i++) 1654: for (p = table[i]; p; p = next) 1655: { 1656: next = p->next_same_hash; 1657: if (p->in_memory 1658: && (all 1659: || (nonscalar && p->in_struct) 1660: || cse_rtx_addr_varies_p (p->exp))) 1661: remove_from_table (p, i); 1662: } 1663: } 1664: 1665: /* Remove from the hash table any expression that is a call-clobbered 1666: register. Also update their TICK values. */ 1667: 1668: static void 1669: invalidate_for_call () 1670: { 1671: int regno, endregno; 1672: int i; 1673: int hash; 1674: struct table_elt *p, *next; 1675: int in_table = 0; 1676: 1677: /* Go through all the hard registers. For each that is clobbered in 1678: a CALL_INSN, remove the register from quantity chains and update 1679: reg_tick if defined. Also see if any of these registers is currently 1680: in the table. */ 1681: 1682: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 1683: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) 1684: { 1685: delete_reg_equiv (regno); 1686: if (reg_tick[regno] >= 0) 1687: reg_tick[regno]++; 1688: 1689: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, regno); 1690: } 1691: 1692: /* In the case where we have no call-clobbered hard registers in the 1693: table, we are done. Otherwise, scan the table and remove any 1694: entry that overlaps a call-clobbered register. */ 1695: 1696: if (in_table) 1697: for (hash = 0; hash < NBUCKETS; hash++) 1698: for (p = table[hash]; p; p = next) 1699: { 1700: next = p->next_same_hash; 1701: 1702: if (GET_CODE (p->exp) != REG 1703: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) 1704: continue; 1705: 1706: regno = REGNO (p->exp); 1707: endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); 1708: 1709: for (i = regno; i < endregno; i++) 1710: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) 1711: { 1712: remove_from_table (p, hash); 1713: break; 1714: } 1715: } 1716: } 1717: 1718: /* Given an expression X of type CONST, 1719: and ELT which is its table entry (or 0 if it 1720: is not in the hash table), 1721: return an alternate expression for X as a register plus integer. 1722: If none can be found, return 0. */ 1723: 1724: static rtx 1725: use_related_value (x, elt) 1726: rtx x; 1727: struct table_elt *elt; 1728: { 1729: register struct table_elt *relt = 0; 1730: register struct table_elt *p, *q; 1.1.1.4 root 1731: HOST_WIDE_INT offset; 1.1 root 1732: 1733: /* First, is there anything related known? 1734: If we have a table element, we can tell from that. 1735: Otherwise, must look it up. */ 1736: 1737: if (elt != 0 && elt->related_value != 0) 1738: relt = elt; 1739: else if (elt == 0 && GET_CODE (x) == CONST) 1740: { 1741: rtx subexp = get_related_value (x); 1742: if (subexp != 0) 1743: relt = lookup (subexp, 1744: safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, 1745: GET_MODE (subexp)); 1746: } 1747: 1748: if (relt == 0) 1749: return 0; 1750: 1751: /* Search all related table entries for one that has an 1752: equivalent register. */ 1753: 1754: p = relt; 1755: while (1) 1756: { 1757: /* This loop is strange in that it is executed in two different cases. 1758: The first is when X is already in the table. Then it is searching 1759: the RELATED_VALUE list of X's class (RELT). The second case is when 1760: X is not in the table. Then RELT points to a class for the related 1761: value. 1762: 1763: Ensure that, whatever case we are in, that we ignore classes that have 1764: the same value as X. */ 1765: 1766: if (rtx_equal_p (x, p->exp)) 1767: q = 0; 1768: else 1769: for (q = p->first_same_value; q; q = q->next_same_value) 1770: if (GET_CODE (q->exp) == REG) 1771: break; 1772: 1773: if (q) 1774: break; 1775: 1776: p = p->related_value; 1777: 1778: /* We went all the way around, so there is nothing to be found. 1779: Alternatively, perhaps RELT was in the table for some other reason 1780: and it has no related values recorded. */ 1781: if (p == relt || p == 0) 1782: break; 1783: } 1784: 1785: if (q == 0) 1786: return 0; 1787: 1788: offset = (get_integer_term (x) - get_integer_term (p->exp)); 1789: /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ 1790: return plus_constant (q->exp, offset); 1791: } 1792: 1793: /* Hash an rtx. We are careful to make sure the value is never negative. 1794: Equivalent registers hash identically. 1795: MODE is used in hashing for CONST_INTs only; 1796: otherwise the mode of X is used. 1797: 1798: Store 1 in do_not_record if any subexpression is volatile. 1799: 1800: Store 1 in hash_arg_in_memory if X contains a MEM rtx 1801: which does not have the RTX_UNCHANGING_P bit set. 1802: In this case, also store 1 in hash_arg_in_struct 1803: if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set. 1804: 1805: Note that cse_insn knows that the hash code of a MEM expression 1806: is just (int) MEM plus the hash code of the address. */ 1807: 1808: static int 1809: canon_hash (x, mode) 1810: rtx x; 1811: enum machine_mode mode; 1812: { 1813: register int i, j; 1814: register int hash = 0; 1815: register enum rtx_code code; 1816: register char *fmt; 1817: 1818: /* repeat is used to turn tail-recursion into iteration. */ 1819: repeat: 1820: if (x == 0) 1821: return hash; 1822: 1823: code = GET_CODE (x); 1824: switch (code) 1825: { 1826: case REG: 1827: { 1828: register int regno = REGNO (x); 1829: 1830: /* On some machines, we can't record any non-fixed hard register, 1831: because extending its life will cause reload problems. We 1832: consider ap, fp, and sp to be fixed for this purpose. 1833: On all machines, we can't record any global registers. */ 1834: 1835: if (regno < FIRST_PSEUDO_REGISTER 1836: && (global_regs[regno] 1837: #ifdef SMALL_REGISTER_CLASSES 1838: || (! fixed_regs[regno] 1839: && regno != FRAME_POINTER_REGNUM 1840: && regno != ARG_POINTER_REGNUM 1841: && regno != STACK_POINTER_REGNUM) 1842: #endif 1843: )) 1844: { 1845: do_not_record = 1; 1846: return 0; 1847: } 1848: return hash + ((int) REG << 7) + reg_qty[regno]; 1849: } 1850: 1851: case CONST_INT: 1852: hash += ((int) mode + ((int) CONST_INT << 7) 1853: + INTVAL (x) + (INTVAL (x) >> HASHBITS)); 1854: return ((1 << HASHBITS) - 1) & hash; 1855: 1856: case CONST_DOUBLE: 1857: /* This is like the general case, except that it only counts 1858: the integers representing the constant. */ 1859: hash += (int) code + (int) GET_MODE (x); 1860: { 1861: int i; 1862: for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) 1863: { 1864: int tem = XINT (x, i); 1865: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); 1866: } 1867: } 1868: return hash; 1869: 1870: /* Assume there is only one rtx object for any given label. */ 1871: case LABEL_REF: 1872: /* Use `and' to ensure a positive number. */ 1.1.1.4 root 1873: return (hash + ((HOST_WIDE_INT) LABEL_REF << 7) 1874: + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1))); 1.1 root 1875: 1876: case SYMBOL_REF: 1.1.1.4 root 1877: return (hash + ((HOST_WIDE_INT) SYMBOL_REF << 7) 1878: + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1))); 1.1 root 1879: 1880: case MEM: 1881: if (MEM_VOLATILE_P (x)) 1882: { 1883: do_not_record = 1; 1884: return 0; 1885: } 1886: if (! RTX_UNCHANGING_P (x)) 1887: { 1888: hash_arg_in_memory = 1; 1889: if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1; 1890: } 1891: /* Now that we have already found this special case, 1892: might as well speed it up as much as possible. */ 1893: hash += (int) MEM; 1894: x = XEXP (x, 0); 1895: goto repeat; 1896: 1897: case PRE_DEC: 1898: case PRE_INC: 1899: case POST_DEC: 1900: case POST_INC: 1901: case PC: 1902: case CC0: 1903: case CALL: 1904: case UNSPEC_VOLATILE: 1905: do_not_record = 1; 1906: return 0; 1907: 1908: case ASM_OPERANDS: 1909: if (MEM_VOLATILE_P (x)) 1910: { 1911: do_not_record = 1; 1912: return 0; 1913: } 1914: } 1915: 1916: i = GET_RTX_LENGTH (code) - 1; 1917: hash += (int) code + (int) GET_MODE (x); 1918: fmt = GET_RTX_FORMAT (code); 1919: for (; i >= 0; i--) 1920: { 1921: if (fmt[i] == 'e') 1922: { 1923: rtx tem = XEXP (x, i); 1924: rtx tem1; 1925: 1926: /* If the operand is a REG that is equivalent to a constant, hash 1927: as if we were hashing the constant, since we will be comparing 1928: that way. */ 1929: if (tem != 0 && GET_CODE (tem) == REG 1930: && REGNO_QTY_VALID_P (REGNO (tem)) 1931: && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem) 1932: && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0 1933: && CONSTANT_P (tem1)) 1934: tem = tem1; 1935: 1936: /* If we are about to do the last recursive call 1937: needed at this level, change it into iteration. 1938: This function is called enough to be worth it. */ 1939: if (i == 0) 1940: { 1941: x = tem; 1942: goto repeat; 1943: } 1944: hash += canon_hash (tem, 0); 1945: } 1946: else if (fmt[i] == 'E') 1947: for (j = 0; j < XVECLEN (x, i); j++) 1948: hash += canon_hash (XVECEXP (x, i, j), 0); 1949: else if (fmt[i] == 's') 1950: { 1951: register char *p = XSTR (x, i); 1952: if (p) 1953: while (*p) 1954: { 1955: register int tem = *p++; 1956: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); 1957: } 1958: } 1959: else if (fmt[i] == 'i') 1960: { 1961: register int tem = XINT (x, i); 1962: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS)); 1963: } 1964: else 1965: abort (); 1966: } 1967: return hash; 1968: } 1969: 1970: /* Like canon_hash but with no side effects. */ 1971: 1972: static int 1973: safe_hash (x, mode) 1974: rtx x; 1975: enum machine_mode mode; 1976: { 1977: int save_do_not_record = do_not_record; 1978: int save_hash_arg_in_memory = hash_arg_in_memory; 1979: int save_hash_arg_in_struct = hash_arg_in_struct; 1980: int hash = canon_hash (x, mode); 1981: hash_arg_in_memory = save_hash_arg_in_memory; 1982: hash_arg_in_struct = save_hash_arg_in_struct; 1983: do_not_record = save_do_not_record; 1984: return hash; 1985: } 1986: 1987: /* Return 1 iff X and Y would canonicalize into the same thing, 1988: without actually constructing the canonicalization of either one. 1989: If VALIDATE is nonzero, 1990: we assume X is an expression being processed from the rtl 1991: and Y was found in the hash table. We check register refs 1992: in Y for being marked as valid. 1993: 1994: If EQUAL_VALUES is nonzero, we allow a register to match a constant value 1995: that is known to be in the register. Ordinarily, we don't allow them 1996: to match, because letting them match would cause unpredictable results 1997: in all the places that search a hash table chain for an equivalent 1998: for a given value. A possible equivalent that has different structure 1999: has its hash code computed from different data. Whether the hash code 2000: is the same as that of the the given value is pure luck. */ 2001: 2002: static int 2003: exp_equiv_p (x, y, validate, equal_values) 2004: rtx x, y; 2005: int validate; 2006: int equal_values; 2007: { 1.1.1.4 root 2008: register int i, j; 1.1 root 2009: register enum rtx_code code; 2010: register char *fmt; 2011: 2012: /* Note: it is incorrect to assume an expression is equivalent to itself 2013: if VALIDATE is nonzero. */ 2014: if (x == y && !validate) 2015: return 1; 2016: if (x == 0 || y == 0) 2017: return x == y; 2018: 2019: code = GET_CODE (x); 2020: if (code != GET_CODE (y)) 2021: { 2022: if (!equal_values) 2023: return 0; 2024: 2025: /* If X is a constant and Y is a register or vice versa, they may be 2026: equivalent. We only have to validate if Y is a register. */ 2027: if (CONSTANT_P (x) && GET_CODE (y) == REG 2028: && REGNO_QTY_VALID_P (REGNO (y)) 2029: && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]] 2030: && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]]) 2031: && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)])) 2032: return 1; 2033: 2034: if (CONSTANT_P (y) && code == REG 2035: && REGNO_QTY_VALID_P (REGNO (x)) 2036: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]] 2037: && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]])) 2038: return 1; 2039: 2040: return 0; 2041: } 2042: 2043: /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2044: if (GET_MODE (x) != GET_MODE (y)) 2045: return 0; 2046: 2047: switch (code) 2048: { 2049: case PC: 2050: case CC0: 2051: return x == y; 2052: 2053: case CONST_INT: 1.1.1.4 root 2054: return INTVAL (x) == INTVAL (y); 1.1 root 2055: 2056: case LABEL_REF: 2057: case SYMBOL_REF: 2058: return XEXP (x, 0) == XEXP (y, 0); 2059: 2060: case REG: 2061: { 2062: int regno = REGNO (y); 2063: int endregno 2064: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 2065: : HARD_REGNO_NREGS (regno, GET_MODE (y))); 2066: int i; 2067: 2068: /* If the quantities are not the same, the expressions are not 2069: equivalent. If there are and we are not to validate, they 2070: are equivalent. Otherwise, ensure all regs are up-to-date. */ 2071: 2072: if (reg_qty[REGNO (x)] != reg_qty[regno]) 2073: return 0; 2074: 2075: if (! validate) 2076: return 1; 2077: 2078: for (i = regno; i < endregno; i++) 2079: if (reg_in_table[i] != reg_tick[i]) 2080: return 0; 2081: 2082: return 1; 2083: } 2084: 2085: /* For commutative operations, check both orders. */ 2086: case PLUS: 2087: case MULT: 2088: case AND: 2089: case IOR: 2090: case XOR: 2091: case NE: 2092: case EQ: 2093: return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) 2094: && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), 2095: validate, equal_values)) 2096: || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), 2097: validate, equal_values) 2098: && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), 2099: validate, equal_values))); 2100: } 2101: 2102: /* Compare the elements. If any pair of corresponding elements 2103: fail to match, return 0 for the whole things. */ 2104: 2105: fmt = GET_RTX_FORMAT (code); 2106: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2107: { 1.1.1.4 root 2108: switch (fmt[i]) 1.1 root 2109: { 1.1.1.4 root 2110: case 'e': 1.1 root 2111: if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) 2112: return 0; 1.1.1.4 root 2113: break; 2114: 2115: case 'E': 1.1 root 2116: if (XVECLEN (x, i) != XVECLEN (y, i)) 2117: return 0; 2118: for (j = 0; j < XVECLEN (x, i); j++) 2119: if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), 2120: validate, equal_values)) 2121: return 0; 1.1.1.4 root 2122: break; 2123: 2124: case 's': 1.1 root 2125: if (strcmp (XSTR (x, i), XSTR (y, i))) 2126: return 0; 1.1.1.4 root 2127: break; 2128: 2129: case 'i': 1.1 root 2130: if (XINT (x, i) != XINT (y, i)) 2131: return 0; 1.1.1.4 root 2132: break; 2133: 2134: case 'w': 2135: if (XWINT (x, i) != XWINT (y, i)) 2136: return 0; 2137: break; 2138: 2139: case '0': 2140: break; 2141: 2142: default: 2143: abort (); 1.1 root 2144: } 1.1.1.4 root 2145: } 2146: 1.1 root 2147: return 1; 2148: } 2149: 2150: /* Return 1 iff any subexpression of X matches Y. 2151: Here we do not require that X or Y be valid (for registers referred to) 2152: for being in the hash table. */ 2153: 1.1.1.5 ! root 2154: static int 1.1 root 2155: refers_to_p (x, y) 2156: rtx x, y; 2157: { 2158: register int i; 2159: register enum rtx_code code; 2160: register char *fmt; 2161: 2162: repeat: 2163: if (x == y) 2164: return 1; 2165: if (x == 0 || y == 0) 2166: return 0; 2167: 2168: code = GET_CODE (x); 2169: /* If X as a whole has the same code as Y, they may match. 2170: If so, return 1. */ 2171: if (code == GET_CODE (y)) 2172: { 2173: if (exp_equiv_p (x, y, 0, 1)) 2174: return 1; 2175: } 2176: 2177: /* X does not match, so try its subexpressions. */ 2178: 2179: fmt = GET_RTX_FORMAT (code); 2180: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2181: if (fmt[i] == 'e') 2182: { 2183: if (i == 0) 2184: { 2185: x = XEXP (x, 0); 2186: goto repeat; 2187: } 2188: else 2189: if (refers_to_p (XEXP (x, i), y)) 2190: return 1; 2191: } 2192: else if (fmt[i] == 'E') 2193: { 2194: int j; 2195: for (j = 0; j < XVECLEN (x, i); j++) 2196: if (refers_to_p (XVECEXP (x, i, j), y)) 2197: return 1; 2198: } 2199: 2200: return 0; 2201: } 2202: 1.1.1.5 ! root 2203: /* Given ADDR and SIZE (a memory address, and the size of the memory reference), ! 2204: set PBASE, PSTART, and PEND which correspond to the base of the address, ! 2205: the starting offset, and ending offset respectively. ! 2206: ! 2207: ADDR is known to be a nonvarying address. ! 2208: ! 2209: cse_address_varies_p returns zero for nonvarying addresses. */ ! 2210: ! 2211: static void ! 2212: set_nonvarying_address_components (addr, size, pbase, pstart, pend) ! 2213: rtx addr; ! 2214: int size; ! 2215: rtx *pbase; ! 2216: HOST_WIDE_INT *pstart, *pend; ! 2217: { ! 2218: rtx base; ! 2219: int start, end; ! 2220: ! 2221: base = addr; ! 2222: start = 0; ! 2223: end = 0; ! 2224: ! 2225: /* Registers with nonvarying addresses usually have constant equivalents; ! 2226: but the frame pointer register is also possible. */ ! 2227: if (GET_CODE (base) == REG ! 2228: && qty_const != 0 ! 2229: && REGNO_QTY_VALID_P (REGNO (base)) ! 2230: && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base) ! 2231: && qty_const[reg_qty[REGNO (base)]] != 0) ! 2232: base = qty_const[reg_qty[REGNO (base)]]; ! 2233: else if (GET_CODE (base) == PLUS ! 2234: && GET_CODE (XEXP (base, 1)) == CONST_INT ! 2235: && GET_CODE (XEXP (base, 0)) == REG ! 2236: && qty_const != 0 ! 2237: && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) ! 2238: && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] ! 2239: == GET_MODE (XEXP (base, 0))) ! 2240: && qty_const[reg_qty[REGNO (XEXP (base, 0))]]) ! 2241: { ! 2242: start = INTVAL (XEXP (base, 1)); ! 2243: base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; ! 2244: } ! 2245: ! 2246: /* By definition, operand1 of a LO_SUM is the associated constant ! 2247: address. Use the associated constant address as the base instead. */ ! 2248: if (GET_CODE (base) == LO_SUM) ! 2249: base = XEXP (base, 1); ! 2250: ! 2251: /* Strip off CONST. */ ! 2252: if (GET_CODE (base) == CONST) ! 2253: base = XEXP (base, 0); ! 2254: ! 2255: if (GET_CODE (base) == PLUS ! 2256: && GET_CODE (XEXP (base, 1)) == CONST_INT) ! 2257: { ! 2258: start += INTVAL (XEXP (base, 1)); ! 2259: base = XEXP (base, 0); ! 2260: } ! 2261: ! 2262: end = start + size; ! 2263: ! 2264: /* Set the return values. */ ! 2265: *pbase = base; ! 2266: *pstart = start; ! 2267: *pend = end; ! 2268: } ! 2269: 1.1 root 2270: /* Return 1 iff any subexpression of X refers to memory 2271: at an address of BASE plus some offset 2272: such that any of the bytes' offsets fall between START (inclusive) 2273: and END (exclusive). 2274: 1.1.1.5 ! root 2275: The value is undefined if X is a varying address (as determined by ! 2276: cse_rtx_addr_varies_p). This function is not used in such cases. 1.1 root 2277: 2278: When used in the cse pass, `qty_const' is nonzero, and it is used 2279: to treat an address that is a register with a known constant value 2280: as if it were that constant value. 2281: In the loop pass, `qty_const' is zero, so this is not done. */ 2282: 1.1.1.5 ! root 2283: static int 1.1 root 2284: refers_to_mem_p (x, base, start, end) 2285: rtx x, base; 1.1.1.4 root 2286: HOST_WIDE_INT start, end; 1.1 root 2287: { 1.1.1.4 root 2288: register HOST_WIDE_INT i; 1.1 root 2289: register enum rtx_code code; 2290: register char *fmt; 2291: 2292: if (GET_CODE (base) == CONST_INT) 2293: { 2294: start += INTVAL (base); 2295: end += INTVAL (base); 2296: base = const0_rtx; 2297: } 2298: 2299: repeat: 2300: if (x == 0) 2301: return 0; 2302: 2303: code = GET_CODE (x); 2304: if (code == MEM) 2305: { 2306: register rtx addr = XEXP (x, 0); /* Get the address. */ 1.1.1.5 ! root 2307: rtx mybase; ! 2308: HOST_WIDE_INT mystart, myend; 1.1 root 2309: 1.1.1.5 ! root 2310: set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)), ! 2311: &mybase, &mystart, &myend); ! 2312: ! 2313: ! 2314: /* refers_to_mem_p is never called with varying addresses. ! 2315: If the base addresses are not equal, there is no chance ! 2316: of the memory addresses conflicting. */ ! 2317: if (! rtx_equal_p (mybase, base)) 1.1 root 2318: return 0; 2319: 1.1.1.5 ! root 2320: return myend > start && mystart < end; 1.1 root 2321: } 2322: 2323: /* X does not match, so try its subexpressions. */ 2324: 2325: fmt = GET_RTX_FORMAT (code); 2326: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2327: if (fmt[i] == 'e') 2328: { 2329: if (i == 0) 2330: { 2331: x = XEXP (x, 0); 2332: goto repeat; 2333: } 2334: else 2335: if (refers_to_mem_p (XEXP (x, i), base, start, end)) 2336: return 1; 2337: } 2338: else if (fmt[i] == 'E') 2339: { 2340: int j; 2341: for (j = 0; j < XVECLEN (x, i); j++) 2342: if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end)) 2343: return 1; 2344: } 2345: 2346: return 0; 2347: } 2348: 2349: /* Nonzero if X refers to memory at a varying address; 2350: except that a register which has at the moment a known constant value 2351: isn't considered variable. */ 2352: 2353: static int 2354: cse_rtx_addr_varies_p (x) 2355: rtx x; 2356: { 2357: /* We need not check for X and the equivalence class being of the same 2358: mode because if X is equivalent to a constant in some mode, it 2359: doesn't vary in any mode. */ 2360: 2361: if (GET_CODE (x) == MEM 2362: && GET_CODE (XEXP (x, 0)) == REG 2363: && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) 2364: && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]] 2365: && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0) 2366: return 0; 2367: 2368: if (GET_CODE (x) == MEM 2369: && GET_CODE (XEXP (x, 0)) == PLUS 2370: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT 2371: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG 2372: && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) 2373: && (GET_MODE (XEXP (XEXP (x, 0), 0)) 2374: == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) 2375: && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) 2376: return 0; 2377: 2378: return rtx_addr_varies_p (x); 2379: } 2380: 2381: /* Canonicalize an expression: 2382: replace each register reference inside it 2383: with the "oldest" equivalent register. 2384: 2385: If INSN is non-zero and we are replacing a pseudo with a hard register 1.1.1.4 root 2386: or vice versa, validate_change is used to ensure that INSN remains valid 2387: after we make our substitution. The calls are made with IN_GROUP non-zero 2388: so apply_change_group must be called upon the outermost return from this 2389: function (unless INSN is zero). The result of apply_change_group can 2390: generally be discarded since the changes we are making are optional. */ 1.1 root 2391: 2392: static rtx 2393: canon_reg (x, insn) 2394: rtx x; 2395: rtx insn; 2396: { 2397: register int i; 2398: register enum rtx_code code; 2399: register char *fmt; 2400: 2401: if (x == 0) 2402: return x; 2403: 2404: code = GET_CODE (x); 2405: switch (code) 2406: { 2407: case PC: 2408: case CC0: 2409: case CONST: 2410: case CONST_INT: 2411: case CONST_DOUBLE: 2412: case SYMBOL_REF: 2413: case LABEL_REF: 2414: case ADDR_VEC: 2415: case ADDR_DIFF_VEC: 2416: return x; 2417: 2418: case REG: 2419: { 2420: register int first; 2421: 2422: /* Never replace a hard reg, because hard regs can appear 2423: in more than one machine mode, and we must preserve the mode 2424: of each occurrence. Also, some hard regs appear in 2425: MEMs that are shared and mustn't be altered. Don't try to 2426: replace any reg that maps to a reg of class NO_REGS. */ 2427: if (REGNO (x) < FIRST_PSEUDO_REGISTER 2428: || ! REGNO_QTY_VALID_P (REGNO (x))) 2429: return x; 2430: 2431: first = qty_first_reg[reg_qty[REGNO (x)]]; 2432: return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] 2433: : REGNO_REG_CLASS (first) == NO_REGS ? x 2434: : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first)); 2435: } 2436: } 2437: 2438: fmt = GET_RTX_FORMAT (code); 2439: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2440: { 2441: register int j; 2442: 2443: if (fmt[i] == 'e') 2444: { 2445: rtx new = canon_reg (XEXP (x, i), insn); 2446: 2447: /* If replacing pseudo with hard reg or vice versa, ensure the 1.1.1.3 root 2448: insn remains valid. Likewise if the insn has MATCH_DUPs. */ 1.1.1.4 root 2449: if (insn != 0 && new != 0 2450: && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG 1.1.1.3 root 2451: && (((REGNO (new) < FIRST_PSEUDO_REGISTER) 2452: != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) 1.1.1.4 root 2453: || insn_n_dups[recog_memoized (insn)] > 0)) 2454: validate_change (insn, &XEXP (x, i), new, 1); 1.1 root 2455: else 2456: XEXP (x, i) = new; 2457: } 2458: else if (fmt[i] == 'E') 2459: for (j = 0; j < XVECLEN (x, i); j++) 2460: XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); 2461: } 2462: 2463: return x; 2464: } 2465: 2466: /* LOC is a location with INSN that is an operand address (the contents of 2467: a MEM). Find the best equivalent address to use that is valid for this 2468: insn. 2469: 2470: On most CISC machines, complicated address modes are costly, and rtx_cost 2471: is a good approximation for that cost. However, most RISC machines have 2472: only a few (usually only one) memory reference formats. If an address is 2473: valid at all, it is often just as cheap as any other address. Hence, for 2474: RISC machines, we use the configuration macro `ADDRESS_COST' to compare the 2475: costs of various addresses. For two addresses of equal cost, choose the one 2476: with the highest `rtx_cost' value as that has the potential of eliminating 2477: the most insns. For equal costs, we choose the first in the equivalence 2478: class. Note that we ignore the fact that pseudo registers are cheaper 2479: than hard registers here because we would also prefer the pseudo registers. 2480: */ 2481: 1.1.1.5 ! root 2482: static void 1.1 root 2483: find_best_addr (insn, loc) 2484: rtx insn; 2485: rtx *loc; 2486: { 2487: struct table_elt *elt, *p; 2488: rtx addr = *loc; 2489: int our_cost; 2490: int found_better = 1; 2491: int save_do_not_record = do_not_record; 2492: int save_hash_arg_in_memory = hash_arg_in_memory; 2493: int save_hash_arg_in_struct = hash_arg_in_struct; 2494: int hash_code; 2495: int addr_volatile; 2496: int regno; 2497: 2498: /* Do not try to replace constant addresses or addresses of local and 2499: argument slots. These MEM expressions are made only once and inserted 2500: in many instructions, as well as being used to control symbol table 2501: output. It is not safe to clobber them. 2502: 2503: There are some uncommon cases where the address is already in a register 2504: for some reason, but we cannot take advantage of that because we have 2505: no easy way to unshare the MEM. In addition, looking up all stack 2506: addresses is costly. */ 2507: if ((GET_CODE (addr) == PLUS 2508: && GET_CODE (XEXP (addr, 0)) == REG 2509: && GET_CODE (XEXP (addr, 1)) == CONST_INT 2510: && (regno = REGNO (XEXP (addr, 0)), 2511: regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)) 2512: || (GET_CODE (addr) == REG 2513: && (regno = REGNO (addr), 2514: regno == FRAME_POINTER_REGNUM || regno == ARG_POINTER_REGNUM)) 2515: || CONSTANT_ADDRESS_P (addr)) 2516: return; 2517: 2518: /* If this address is not simply a register, try to fold it. This will 2519: sometimes simplify the expression. Many simplifications 2520: will not be valid, but some, usually applying the associative rule, will 2521: be valid and produce better code. */ 2522: if (GET_CODE (addr) != REG 2523: && validate_change (insn, loc, fold_rtx (addr, insn), 0)) 2524: addr = *loc; 2525: 1.1.1.4 root 2526: /* If this address is not in the hash table, we can't look for equivalences 2527: of the whole address. Also, ignore if volatile. */ 2528: 1.1 root 2529: do_not_record = 0; 2530: hash_code = HASH (addr, Pmode); 2531: addr_volatile = do_not_record; 2532: do_not_record = save_do_not_record; 2533: hash_arg_in_memory = save_hash_arg_in_memory; 2534: hash_arg_in_struct = save_hash_arg_in_struct; 2535: 2536: if (addr_volatile) 2537: return; 2538: 2539: elt = lookup (addr, hash_code, Pmode); 2540: 2541: #ifndef ADDRESS_COST 1.1.1.4 root 2542: if (elt) 2543: { 2544: our_cost = elt->cost; 1.1 root 2545: 1.1.1.4 root 2546: /* Find the lowest cost below ours that works. */ 2547: for (elt = elt->first_same_value; elt; elt = elt->next_same_value) 2548: if (elt->cost < our_cost 2549: && (GET_CODE (elt->exp) == REG 2550: || exp_equiv_p (elt->exp, elt->exp, 1, 0)) 2551: && validate_change (insn, loc, 2552: canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) 2553: return; 2554: } 1.1 root 2555: #else 2556: 1.1.1.4 root 2557: if (elt) 2558: { 2559: /* We need to find the best (under the criteria documented above) entry 2560: in the class that is valid. We use the `flag' field to indicate 2561: choices that were invalid and iterate until we can't find a better 2562: one that hasn't already been tried. */ 2563: 2564: for (p = elt->first_same_value; p; p = p->next_same_value) 2565: p->flag = 0; 1.1 root 2566: 1.1.1.4 root 2567: while (found_better) 2568: { 2569: int best_addr_cost = ADDRESS_COST (*loc); 2570: int best_rtx_cost = (elt->cost + 1) >> 1; 2571: struct table_elt *best_elt = elt; 2572: 2573: found_better = 0; 2574: for (p = elt->first_same_value; p; p = p->next_same_value) 2575: if (! p->flag 2576: && (GET_CODE (p->exp) == REG 2577: || exp_equiv_p (p->exp, p->exp, 1, 0)) 2578: && (ADDRESS_COST (p->exp) < best_addr_cost 2579: || (ADDRESS_COST (p->exp) == best_addr_cost 2580: && (p->cost + 1) >> 1 > best_rtx_cost))) 2581: { 2582: found_better = 1; 2583: best_addr_cost = ADDRESS_COST (p->exp); 2584: best_rtx_cost = (p->cost + 1) >> 1; 2585: best_elt = p; 2586: } 1.1 root 2587: 1.1.1.4 root 2588: if (found_better) 2589: { 2590: if (validate_change (insn, loc, 2591: canon_reg (copy_rtx (best_elt->exp), 2592: NULL_RTX), 0)) 2593: return; 2594: else 2595: best_elt->flag = 1; 2596: } 2597: } 2598: } 2599: 2600: /* If the address is a binary operation with the first operand a register 2601: and the second a constant, do the same as above, but looking for 2602: equivalences of the register. Then try to simplify before checking for 2603: the best address to use. This catches a few cases: First is when we 2604: have REG+const and the register is another REG+const. We can often merge 2605: the constants and eliminate one insn and one register. It may also be 2606: that a machine has a cheap REG+REG+const. Finally, this improves the 2607: code on the Alpha for unaligned byte stores. */ 2608: 2609: if (flag_expensive_optimizations 2610: && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' 2611: || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') 2612: && GET_CODE (XEXP (*loc, 0)) == REG 2613: && GET_CODE (XEXP (*loc, 1)) == CONST_INT) 1.1 root 2614: { 1.1.1.4 root 2615: rtx c = XEXP (*loc, 1); 2616: 2617: do_not_record = 0; 2618: hash_code = HASH (XEXP (*loc, 0), Pmode); 2619: do_not_record = save_do_not_record; 2620: hash_arg_in_memory = save_hash_arg_in_memory; 2621: hash_arg_in_struct = save_hash_arg_in_struct; 2622: 2623: elt = lookup (XEXP (*loc, 0), hash_code, Pmode); 2624: if (elt == 0) 2625: return; 2626: 2627: /* We need to find the best (under the criteria documented above) entry 2628: in the class that is valid. We use the `flag' field to indicate 2629: choices that were invalid and iterate until we can't find a better 2630: one that hasn't already been tried. */ 1.1 root 2631: 2632: for (p = elt->first_same_value; p; p = p->next_same_value) 1.1.1.4 root 2633: p->flag = 0; 1.1 root 2634: 1.1.1.4 root 2635: while (found_better) 1.1 root 2636: { 1.1.1.4 root 2637: int best_addr_cost = ADDRESS_COST (*loc); 2638: int best_rtx_cost = (COST (*loc) + 1) >> 1; 2639: struct table_elt *best_elt = elt; 2640: rtx best_rtx = *loc; 2641: 2642: found_better = 0; 2643: for (p = elt->first_same_value; p; p = p->next_same_value) 2644: if (! p->flag 2645: && (GET_CODE (p->exp) == REG 2646: || exp_equiv_p (p->exp, p->exp, 1, 0))) 2647: { 1.1.1.5 ! root 2648: rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c); 1.1.1.4 root 2649: 2650: if ((ADDRESS_COST (new) < best_addr_cost 2651: || (ADDRESS_COST (new) == best_addr_cost 2652: && (COST (new) + 1) >> 1 > best_rtx_cost))) 2653: { 2654: found_better = 1; 2655: best_addr_cost = ADDRESS_COST (new); 2656: best_rtx_cost = (COST (new) + 1) >> 1; 2657: best_elt = p; 2658: best_rtx = new; 2659: } 2660: } 2661: 2662: if (found_better) 2663: { 2664: if (validate_change (insn, loc, 2665: canon_reg (copy_rtx (best_rtx), 2666: NULL_RTX), 0)) 2667: return; 2668: else 2669: best_elt->flag = 1; 2670: } 1.1 root 2671: } 2672: } 2673: #endif 2674: } 2675: 2676: /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison 2677: operation (EQ, NE, GT, etc.), follow it back through the hash table and 2678: what values are being compared. 2679: 2680: *PARG1 and *PARG2 are updated to contain the rtx representing the values 2681: actually being compared. For example, if *PARG1 was (cc0) and *PARG2 2682: was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were 2683: compared to produce cc0. 2684: 2685: The return value is the comparison operator and is either the code of 2686: A or the code corresponding to the inverse of the comparison. */ 2687: 2688: static enum rtx_code 1.1.1.4 root 2689: find_comparison_args (code, parg1, parg2, pmode1, pmode2) 1.1 root 2690: enum rtx_code code; 2691: rtx *parg1, *parg2; 1.1.1.4 root 2692: enum machine_mode *pmode1, *pmode2; 1.1 root 2693: { 2694: rtx arg1, arg2; 2695: 2696: arg1 = *parg1, arg2 = *parg2; 2697: 2698: /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ 2699: 1.1.1.4 root 2700: while (arg2 == CONST0_RTX (GET_MODE (arg1))) 1.1 root 2701: { 2702: /* Set non-zero when we find something of interest. */ 2703: rtx x = 0; 2704: int reverse_code = 0; 2705: struct table_elt *p = 0; 2706: 2707: /* If arg1 is a COMPARE, extract the comparison arguments from it. 2708: On machines with CC0, this is the only case that can occur, since 2709: fold_rtx will return the COMPARE or item being compared with zero 2710: when given CC0. */ 2711: 2712: if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) 2713: x = arg1; 2714: 2715: /* If ARG1 is a comparison operator and CODE is testing for 2716: STORE_FLAG_VALUE, get the inner arguments. */ 2717: 2718: else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') 2719: { 1.1.1.4 root 2720: if (code == NE 2721: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT 2722: && code == LT && STORE_FLAG_VALUE == -1) 2723: #ifdef FLOAT_STORE_FLAG_VALUE 2724: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT 2725: && FLOAT_STORE_FLAG_VALUE < 0) 2726: #endif 2727: ) 1.1 root 2728: x = arg1; 1.1.1.4 root 2729: else if (code == EQ 2730: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT 2731: && code == GE && STORE_FLAG_VALUE == -1) 2732: #ifdef FLOAT_STORE_FLAG_VALUE 2733: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT 2734: && FLOAT_STORE_FLAG_VALUE < 0) 2735: #endif 2736: ) 1.1 root 2737: x = arg1, reverse_code = 1; 2738: } 2739: 2740: /* ??? We could also check for 2741: 2742: (ne (and (eq (...) (const_int 1))) (const_int 0)) 2743: 2744: and related forms, but let's wait until we see them occurring. */ 2745: 2746: if (x == 0) 2747: /* Look up ARG1 in the hash table and see if it has an equivalence 2748: that lets us see what is being compared. */ 2749: p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS, 2750: GET_MODE (arg1)); 2751: if (p) p = p->first_same_value; 2752: 2753: for (; p; p = p->next_same_value) 2754: { 2755: enum machine_mode inner_mode = GET_MODE (p->exp); 2756: 2757: /* If the entry isn't valid, skip it. */ 2758: if (! exp_equiv_p (p->exp, p->exp, 1, 0)) 2759: continue; 2760: 2761: if (GET_CODE (p->exp) == COMPARE 2762: /* Another possibility is that this machine has a compare insn 2763: that includes the comparison code. In that case, ARG1 would 2764: be equivalent to a comparison operation that would set ARG1 to 2765: either STORE_FLAG_VALUE or zero. If this is an NE operation, 2766: ORIG_CODE is the actual comparison being done; if it is an EQ, 2767: we must reverse ORIG_CODE. On machine with a negative value 2768: for STORE_FLAG_VALUE, also look at LT and GE operations. */ 2769: || ((code == NE 2770: || (code == LT 1.1.1.4 root 2771: && GET_MODE_CLASS (inner_mode) == MODE_INT 2772: && (GET_MODE_BITSIZE (inner_mode) 2773: <= HOST_BITS_PER_WIDE_INT) 1.1 root 2774: && (STORE_FLAG_VALUE 1.1.1.4 root 2775: & ((HOST_WIDE_INT) 1 2776: << (GET_MODE_BITSIZE (inner_mode) - 1)))) 2777: #ifdef FLOAT_STORE_FLAG_VALUE 2778: || (code == LT 2779: && GET_MODE_CLASS (inner_mode) == MODE_FLOAT 2780: && FLOAT_STORE_FLAG_VALUE < 0) 2781: #endif 2782: ) 1.1 root 2783: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) 2784: { 2785: x = p->exp; 2786: break; 2787: } 2788: else if ((code == EQ 2789: || (code == GE 1.1.1.4 root 2790: && GET_MODE_CLASS (inner_mode) == MODE_INT 2791: && (GET_MODE_BITSIZE (inner_mode) 2792: <= HOST_BITS_PER_WIDE_INT) 1.1 root 2793: && (STORE_FLAG_VALUE 1.1.1.4 root 2794: & ((HOST_WIDE_INT) 1 2795: << (GET_MODE_BITSIZE (inner_mode) - 1)))) 2796: #ifdef FLOAT_STORE_FLAG_VALUE 2797: || (code == GE 2798: && GET_MODE_CLASS (inner_mode) == MODE_FLOAT 2799: && FLOAT_STORE_FLAG_VALUE < 0) 2800: #endif 2801: ) 1.1 root 2802: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') 2803: { 2804: reverse_code = 1; 2805: x = p->exp; 2806: break; 2807: } 2808: 2809: /* If this is fp + constant, the equivalent is a better operand since 2810: it may let us predict the value of the comparison. */ 2811: else if (NONZERO_BASE_PLUS_P (p->exp)) 2812: { 2813: arg1 = p->exp; 2814: continue; 2815: } 2816: } 2817: 2818: /* If we didn't find a useful equivalence for ARG1, we are done. 2819: Otherwise, set up for the next iteration. */ 2820: if (x == 0) 2821: break; 2822: 2823: arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); 2824: if (GET_RTX_CLASS (GET_CODE (x)) == '<') 2825: code = GET_CODE (x); 2826: 2827: if (reverse_code) 2828: code = reverse_condition (code); 2829: } 2830: 1.1.1.4 root 2831: /* Return our results. Return the modes from before fold_rtx 2832: because fold_rtx might produce const_int, and then it's too late. */ 2833: *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); 1.1 root 2834: *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); 2835: 2836: return code; 2837: } 2838: 2839: /* Try to simplify a unary operation CODE whose output mode is to be 2840: MODE with input operand OP whose mode was originally OP_MODE. 2841: Return zero if no simplification can be made. */ 2842: 2843: rtx 2844: simplify_unary_operation (code, mode, op, op_mode) 2845: enum rtx_code code; 2846: enum machine_mode mode; 2847: rtx op; 2848: enum machine_mode op_mode; 2849: { 2850: register int width = GET_MODE_BITSIZE (mode); 2851: 2852: /* The order of these tests is critical so that, for example, we don't 2853: check the wrong mode (input vs. output) for a conversion operation, 2854: such as FIX. At some point, this should be simplified. */ 2855: 2856: #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 2857: if (code == FLOAT && GET_CODE (op) == CONST_INT) 2858: { 2859: REAL_VALUE_TYPE d; 2860: 2861: #ifdef REAL_ARITHMETIC 2862: REAL_VALUE_FROM_INT (d, INTVAL (op), INTVAL (op) < 0 ? ~0 : 0); 2863: #else 2864: d = (double) INTVAL (op); 2865: #endif 2866: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 2867: } 2868: else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_INT) 2869: { 2870: REAL_VALUE_TYPE d; 2871: 2872: #ifdef REAL_ARITHMETIC 2873: REAL_VALUE_FROM_INT (d, INTVAL (op), 0); 2874: #else 2875: d = (double) (unsigned int) INTVAL (op); 2876: #endif 2877: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 2878: } 2879: 2880: else if (code == FLOAT && GET_CODE (op) == CONST_DOUBLE 2881: && GET_MODE (op) == VOIDmode) 2882: { 2883: REAL_VALUE_TYPE d; 2884: 2885: #ifdef REAL_ARITHMETIC 2886: REAL_VALUE_FROM_INT (d, CONST_DOUBLE_LOW (op), CONST_DOUBLE_HIGH (op)); 2887: #else 2888: if (CONST_DOUBLE_HIGH (op) < 0) 2889: { 2890: d = (double) (~ CONST_DOUBLE_HIGH (op)); 1.1.1.4 root 2891: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) 2892: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); 2893: d += (double) (unsigned HOST_WIDE_INT) (~ CONST_DOUBLE_LOW (op)); 1.1 root 2894: d = (- d - 1.0); 2895: } 2896: else 2897: { 2898: d = (double) CONST_DOUBLE_HIGH (op); 1.1.1.4 root 2899: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) 2900: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); 2901: d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); 1.1 root 2902: } 2903: #endif /* REAL_ARITHMETIC */ 2904: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 2905: } 2906: else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_DOUBLE 2907: && GET_MODE (op) == VOIDmode) 2908: { 2909: REAL_VALUE_TYPE d; 2910: 2911: #ifdef REAL_ARITHMETIC 2912: REAL_VALUE_FROM_UNSIGNED_INT (d, CONST_DOUBLE_LOW (op), 2913: CONST_DOUBLE_HIGH (op)); 2914: #else 2915: d = (double) CONST_DOUBLE_HIGH (op); 1.1.1.4 root 2916: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) 2917: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); 2918: d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op); 1.1 root 2919: #endif /* REAL_ARITHMETIC */ 2920: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 2921: } 2922: #endif 2923: 1.1.1.4 root 2924: if (GET_CODE (op) == CONST_INT 2925: && width <= HOST_BITS_PER_WIDE_INT && width > 0) 1.1 root 2926: { 1.1.1.4 root 2927: register HOST_WIDE_INT arg0 = INTVAL (op); 2928: register HOST_WIDE_INT val; 1.1 root 2929: 2930: switch (code) 2931: { 2932: case NOT: 2933: val = ~ arg0; 2934: break; 2935: 2936: case NEG: 2937: val = - arg0; 2938: break; 2939: 2940: case ABS: 2941: val = (arg0 >= 0 ? arg0 : - arg0); 2942: break; 2943: 2944: case FFS: 2945: /* Don't use ffs here. Instead, get low order bit and then its 2946: number. If arg0 is zero, this will return 0, as desired. */ 2947: arg0 &= GET_MODE_MASK (mode); 2948: val = exact_log2 (arg0 & (- arg0)) + 1; 2949: break; 2950: 2951: case TRUNCATE: 2952: val = arg0; 2953: break; 2954: 2955: case ZERO_EXTEND: 2956: if (op_mode == VOIDmode) 2957: op_mode = mode; 1.1.1.4 root 2958: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) 2959: { 2960: /* If we were really extending the mode, 2961: we would have to distinguish between zero-extension 2962: and sign-extension. */ 2963: if (width != GET_MODE_BITSIZE (op_mode)) 2964: abort (); 2965: val = arg0; 2966: } 2967: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) 2968: val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); 1.1 root 2969: else 2970: return 0; 2971: break; 2972: 2973: case SIGN_EXTEND: 2974: if (op_mode == VOIDmode) 2975: op_mode = mode; 1.1.1.4 root 2976: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) 2977: { 2978: /* If we were really extending the mode, 2979: we would have to distinguish between zero-extension 2980: and sign-extension. */ 2981: if (width != GET_MODE_BITSIZE (op_mode)) 2982: abort (); 2983: val = arg0; 2984: } 2985: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) 2986: { 2987: val 2988: = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); 2989: if (val 2990: & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1))) 2991: val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); 1.1 root 2992: } 2993: else 2994: return 0; 2995: break; 2996: 1.1.1.2 root 2997: case SQRT: 2998: return 0; 2999: 1.1 root 3000: default: 3001: abort (); 3002: } 3003: 3004: /* Clear the bits that don't belong in our mode, 3005: unless they and our sign bit are all one. 3006: So we get either a reasonable negative value or a reasonable 3007: unsigned value for this mode. */ 1.1.1.4 root 3008: if (width < HOST_BITS_PER_WIDE_INT 3009: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 3010: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 1.1 root 3011: val &= (1 << width) - 1; 3012: 1.1.1.4 root 3013: return GEN_INT (val); 1.1 root 3014: } 3015: 3016: /* We can do some operations on integer CONST_DOUBLEs. Also allow 3017: for a DImode operation on a CONST_INT. */ 3018: else if (GET_MODE (op) == VOIDmode 3019: && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) 3020: { 1.1.1.4 root 3021: HOST_WIDE_INT l1, h1, lv, hv; 1.1 root 3022: 3023: if (GET_CODE (op) == CONST_DOUBLE) 3024: l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op); 3025: else 3026: l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0; 3027: 3028: switch (code) 3029: { 3030: case NOT: 3031: lv = ~ l1; 3032: hv = ~ h1; 3033: break; 3034: 3035: case NEG: 3036: neg_double (l1, h1, &lv, &hv); 3037: break; 3038: 3039: case ABS: 3040: if (h1 < 0) 3041: neg_double (l1, h1, &lv, &hv); 3042: else 3043: lv = l1, hv = h1; 3044: break; 3045: 3046: case FFS: 3047: hv = 0; 3048: if (l1 == 0) 1.1.1.4 root 3049: lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1; 1.1 root 3050: else 3051: lv = exact_log2 (l1 & (-l1)) + 1; 3052: break; 3053: 3054: case TRUNCATE: 1.1.1.4 root 3055: if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT) 3056: return GEN_INT (l1 & GET_MODE_MASK (mode)); 1.1 root 3057: else 3058: return 0; 3059: break; 3060: 1.1.1.4 root 3061: case ZERO_EXTEND: 3062: if (op_mode == VOIDmode 3063: || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) 3064: return 0; 3065: 3066: hv = 0; 3067: lv = l1 & GET_MODE_MASK (op_mode); 3068: break; 3069: 3070: case SIGN_EXTEND: 3071: if (op_mode == VOIDmode 3072: || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) 3073: return 0; 3074: else 3075: { 3076: lv = l1 & GET_MODE_MASK (op_mode); 3077: if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT 3078: && (lv & ((HOST_WIDE_INT) 1 3079: << (GET_MODE_BITSIZE (op_mode) - 1))) != 0) 3080: lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); 3081: 3082: hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0; 3083: } 3084: break; 3085: 1.1.1.2 root 3086: case SQRT: 3087: return 0; 3088: 1.1 root 3089: default: 3090: return 0; 3091: } 3092: 3093: return immed_double_const (lv, hv, mode); 3094: } 3095: 3096: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 3097: else if (GET_CODE (op) == CONST_DOUBLE 3098: && GET_MODE_CLASS (mode) == MODE_FLOAT) 3099: { 3100: REAL_VALUE_TYPE d; 3101: jmp_buf handler; 3102: rtx x; 3103: 3104: if (setjmp (handler)) 3105: /* There used to be a warning here, but that is inadvisable. 3106: People may want to cause traps, and the natural way 3107: to do it should not get a warning. */ 3108: return 0; 3109: 3110: set_float_handler (handler); 3111: 3112: REAL_VALUE_FROM_CONST_DOUBLE (d, op); 3113: 3114: switch (code) 3115: { 3116: case NEG: 3117: d = REAL_VALUE_NEGATE (d); 3118: break; 3119: 3120: case ABS: 1.1.1.3 root 3121: if (REAL_VALUE_NEGATIVE (d)) 1.1 root 3122: d = REAL_VALUE_NEGATE (d); 3123: break; 3124: 3125: case FLOAT_TRUNCATE: 1.1.1.5 ! root 3126: d = real_value_truncate (mode, d); 1.1 root 3127: break; 3128: 3129: case FLOAT_EXTEND: 3130: /* All this does is change the mode. */ 3131: break; 3132: 3133: case FIX: 1.1.1.5 ! root 3134: d = REAL_VALUE_RNDZINT (d); 1.1 root 3135: break; 3136: 3137: case UNSIGNED_FIX: 1.1.1.5 ! root 3138: d = REAL_VALUE_UNSIGNED_RNDZINT (d); 1.1 root 3139: break; 3140: 1.1.1.2 root 3141: case SQRT: 3142: return 0; 3143: 1.1 root 3144: default: 3145: abort (); 3146: } 3147: 3148: x = immed_real_const_1 (d, mode); 1.1.1.4 root 3149: set_float_handler (NULL_PTR); 1.1 root 3150: return x; 3151: } 3152: else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE_CLASS (mode) == MODE_INT 1.1.1.4 root 3153: && width <= HOST_BITS_PER_WIDE_INT && width > 0) 1.1 root 3154: { 3155: REAL_VALUE_TYPE d; 3156: jmp_buf handler; 3157: rtx x; 1.1.1.4 root 3158: HOST_WIDE_INT val; 1.1 root 3159: 3160: if (setjmp (handler)) 3161: return 0; 3162: 3163: set_float_handler (handler); 3164: 3165: REAL_VALUE_FROM_CONST_DOUBLE (d, op); 3166: 3167: switch (code) 3168: { 3169: case FIX: 3170: val = REAL_VALUE_FIX (d); 3171: break; 3172: 3173: case UNSIGNED_FIX: 3174: val = REAL_VALUE_UNSIGNED_FIX (d); 3175: break; 3176: 3177: default: 3178: abort (); 3179: } 3180: 1.1.1.4 root 3181: set_float_handler (NULL_PTR); 1.1 root 3182: 3183: /* Clear the bits that don't belong in our mode, 3184: unless they and our sign bit are all one. 3185: So we get either a reasonable negative value or a reasonable 3186: unsigned value for this mode. */ 1.1.1.4 root 3187: if (width < HOST_BITS_PER_WIDE_INT 3188: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 3189: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 3190: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 3191: 1.1.1.4 root 3192: return GEN_INT (val); 1.1 root 3193: } 3194: #endif 1.1.1.3 root 3195: /* This was formerly used only for non-IEEE float. 3196: [email protected] says it is safe for IEEE also. */ 3197: else 1.1 root 3198: { 3199: /* There are some simplifications we can do even if the operands 1.1.1.3 root 3200: aren't constant. */ 1.1 root 3201: switch (code) 3202: { 3203: case NEG: 3204: case NOT: 3205: /* (not (not X)) == X, similarly for NEG. */ 3206: if (GET_CODE (op) == code) 3207: return XEXP (op, 0); 3208: break; 3209: 3210: case SIGN_EXTEND: 3211: /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2)))) 3212: becomes just the MINUS if its mode is MODE. This allows 3213: folding switch statements on machines using casesi (such as 3214: the Vax). */ 3215: if (GET_CODE (op) == TRUNCATE 3216: && GET_MODE (XEXP (op, 0)) == mode 3217: && GET_CODE (XEXP (op, 0)) == MINUS 3218: && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF 3219: && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) 3220: return XEXP (op, 0); 3221: break; 3222: } 3223: 3224: return 0; 3225: } 3226: } 3227: 3228: /* Simplify a binary operation CODE with result mode MODE, operating on OP0 3229: and OP1. Return 0 if no simplification is possible. 3230: 3231: Don't use this for relational operations such as EQ or LT. 3232: Use simplify_relational_operation instead. */ 3233: 3234: rtx 3235: simplify_binary_operation (code, mode, op0, op1) 3236: enum rtx_code code; 3237: enum machine_mode mode; 3238: rtx op0, op1; 3239: { 1.1.1.4 root 3240: register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; 3241: HOST_WIDE_INT val; 1.1 root 3242: int width = GET_MODE_BITSIZE (mode); 1.1.1.5 ! root 3243: rtx tem; 1.1 root 3244: 3245: /* Relational operations don't work here. We must know the mode 3246: of the operands in order to do the comparison correctly. 3247: Assuming a full word can give incorrect results. 3248: Consider comparing 128 with -128 in QImode. */ 3249: 3250: if (GET_RTX_CLASS (code) == '<') 3251: abort (); 3252: 3253: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 3254: if (GET_MODE_CLASS (mode) == MODE_FLOAT 3255: && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE 3256: && mode == GET_MODE (op0) && mode == GET_MODE (op1)) 3257: { 3258: REAL_VALUE_TYPE f0, f1, value; 3259: jmp_buf handler; 3260: 3261: if (setjmp (handler)) 3262: return 0; 3263: 3264: set_float_handler (handler); 3265: 3266: REAL_VALUE_FROM_CONST_DOUBLE (f0, op0); 3267: REAL_VALUE_FROM_CONST_DOUBLE (f1, op1); 1.1.1.4 root 3268: f0 = real_value_truncate (mode, f0); 3269: f1 = real_value_truncate (mode, f1); 1.1 root 3270: 3271: #ifdef REAL_ARITHMETIC 1.1.1.5 ! root 3272: REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1); 1.1 root 3273: #else 3274: switch (code) 3275: { 3276: case PLUS: 3277: value = f0 + f1; 3278: break; 3279: case MINUS: 3280: value = f0 - f1; 3281: break; 3282: case MULT: 3283: value = f0 * f1; 3284: break; 3285: case DIV: 3286: #ifndef REAL_INFINITY 3287: if (f1 == 0) 1.1.1.4 root 3288: return 0; 1.1 root 3289: #endif 3290: value = f0 / f1; 3291: break; 3292: case SMIN: 3293: value = MIN (f0, f1); 3294: break; 3295: case SMAX: 3296: value = MAX (f0, f1); 3297: break; 3298: default: 3299: abort (); 3300: } 3301: #endif 3302: 1.1.1.4 root 3303: set_float_handler (NULL_PTR); 3304: value = real_value_truncate (mode, value); 1.1 root 3305: return immed_real_const_1 (value, mode); 3306: } 1.1.1.5 ! root 3307: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ 1.1 root 3308: 3309: /* We can fold some multi-word operations. */ 1.1.1.5 ! root 3310: if (GET_MODE_CLASS (mode) == MODE_INT ! 3311: && GET_CODE (op0) == CONST_DOUBLE ! 3312: && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) 1.1 root 3313: { 1.1.1.4 root 3314: HOST_WIDE_INT l1, l2, h1, h2, lv, hv; 1.1 root 3315: 3316: l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0); 3317: 3318: if (GET_CODE (op1) == CONST_DOUBLE) 3319: l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1); 3320: else 3321: l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0; 3322: 3323: switch (code) 3324: { 3325: case MINUS: 3326: /* A - B == A + (-B). */ 3327: neg_double (l2, h2, &lv, &hv); 3328: l2 = lv, h2 = hv; 3329: 3330: /* .. fall through ... */ 3331: 3332: case PLUS: 3333: add_double (l1, h1, l2, h2, &lv, &hv); 3334: break; 3335: 3336: case MULT: 3337: mul_double (l1, h1, l2, h2, &lv, &hv); 3338: break; 3339: 3340: case DIV: case MOD: case UDIV: case UMOD: 3341: /* We'd need to include tree.h to do this and it doesn't seem worth 3342: it. */ 3343: return 0; 3344: 3345: case AND: 3346: lv = l1 & l2, hv = h1 & h2; 3347: break; 3348: 3349: case IOR: 3350: lv = l1 | l2, hv = h1 | h2; 3351: break; 3352: 3353: case XOR: 3354: lv = l1 ^ l2, hv = h1 ^ h2; 3355: break; 3356: 3357: case SMIN: 1.1.1.4 root 3358: if (h1 < h2 3359: || (h1 == h2 3360: && ((unsigned HOST_WIDE_INT) l1 3361: < (unsigned HOST_WIDE_INT) l2))) 1.1 root 3362: lv = l1, hv = h1; 3363: else 3364: lv = l2, hv = h2; 3365: break; 3366: 3367: case SMAX: 1.1.1.4 root 3368: if (h1 > h2 3369: || (h1 == h2 3370: && ((unsigned HOST_WIDE_INT) l1 3371: > (unsigned HOST_WIDE_INT) l2))) 1.1 root 3372: lv = l1, hv = h1; 3373: else 3374: lv = l2, hv = h2; 3375: break; 3376: 3377: case UMIN: 1.1.1.4 root 3378: if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2 3379: || (h1 == h2 3380: && ((unsigned HOST_WIDE_INT) l1 3381: < (unsigned HOST_WIDE_INT) l2))) 1.1 root 3382: lv = l1, hv = h1; 3383: else 3384: lv = l2, hv = h2; 3385: break; 3386: 3387: case UMAX: 1.1.1.4 root 3388: if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2 3389: || (h1 == h2 3390: && ((unsigned HOST_WIDE_INT) l1 3391: > (unsigned HOST_WIDE_INT) l2))) 1.1 root 3392: lv = l1, hv = h1; 3393: else 3394: lv = l2, hv = h2; 3395: break; 3396: 3397: case LSHIFTRT: case ASHIFTRT: 3398: case ASHIFT: case LSHIFT: 3399: case ROTATE: case ROTATERT: 3400: #ifdef SHIFT_COUNT_TRUNCATED 3401: l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0; 3402: #endif 3403: 3404: if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode)) 3405: return 0; 3406: 3407: if (code == LSHIFTRT || code == ASHIFTRT) 3408: rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 3409: code == ASHIFTRT); 3410: else if (code == ASHIFT || code == LSHIFT) 3411: lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 3412: code == ASHIFT); 3413: else if (code == ROTATE) 3414: lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); 3415: else /* code == ROTATERT */ 3416: rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); 3417: break; 3418: 3419: default: 3420: return 0; 3421: } 3422: 3423: return immed_double_const (lv, hv, mode); 3424: } 3425: 3426: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT 1.1.1.4 root 3427: || width > HOST_BITS_PER_WIDE_INT || width == 0) 1.1 root 3428: { 3429: /* Even if we can't compute a constant result, 3430: there are some cases worth simplifying. */ 3431: 3432: switch (code) 3433: { 3434: case PLUS: 3435: /* In IEEE floating point, x+0 is not the same as x. Similarly 3436: for the other optimizations below. */ 3437: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT 3438: && GET_MODE_CLASS (mode) != MODE_INT) 3439: break; 3440: 3441: if (op1 == CONST0_RTX (mode)) 3442: return op0; 3443: 3444: /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */ 3445: if (GET_CODE (op0) == NEG) 1.1.1.5 ! root 3446: return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0)); 1.1 root 3447: else if (GET_CODE (op1) == NEG) 1.1.1.5 ! root 3448: return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0)); 1.1 root 3449: 1.1.1.5 ! root 3450: /* Handle both-operands-constant cases. We can only add ! 3451: CONST_INTs to constants since the sum of relocatable symbols ! 3452: can't be handled by most assemblers. */ 1.1 root 3453: 1.1.1.5 ! root 3454: if (CONSTANT_P (op0) && GET_CODE (op1) == CONST_INT) ! 3455: return plus_constant (op0, INTVAL (op1)); ! 3456: else if (CONSTANT_P (op1) && GET_CODE (op0) == CONST_INT) ! 3457: return plus_constant (op1, INTVAL (op0)); 1.1 root 3458: 1.1.1.5 ! root 3459: /* If one of the operands is a PLUS or a MINUS, see if we can ! 3460: simplify this by the associative law. ! 3461: Don't use the associative law for floating point. ! 3462: The inaccuracy makes it nonassociative, ! 3463: and subtle programs can break if operations are associated. */ 1.1 root 3464: 1.1.1.5 ! root 3465: if ((GET_MODE_CLASS (mode) == MODE_INT ! 3466: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) ! 3467: && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS ! 3468: || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) ! 3469: && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) ! 3470: return tem; 1.1 root 3471: break; 3472: 3473: case COMPARE: 3474: #ifdef HAVE_cc0 3475: /* Convert (compare FOO (const_int 0)) to FOO unless we aren't 3476: using cc0, in which case we want to leave it as a COMPARE 3477: so we can distinguish it from a register-register-copy. 3478: 3479: In IEEE floating point, x-0 is not the same as x. */ 3480: 3481: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 3482: || GET_MODE_CLASS (mode) == MODE_INT) 3483: && op1 == CONST0_RTX (mode)) 3484: return op0; 3485: #else 3486: /* Do nothing here. */ 3487: #endif 3488: break; 3489: 3490: case MINUS: 1.1.1.3 root 3491: /* None of these optimizations can be done for IEEE 3492: floating point. */ 3493: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT 1.1.1.5 ! root 3494: && GET_MODE_CLASS (mode) != MODE_INT ! 3495: && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT) 1.1.1.3 root 3496: break; 3497: 3498: /* We can't assume x-x is 0 even with non-IEEE floating point. */ 1.1 root 3499: if (rtx_equal_p (op0, op1) 3500: && ! side_effects_p (op0) 1.1.1.5 ! root 3501: && GET_MODE_CLASS (mode) != MODE_FLOAT ! 3502: && GET_MODE_CLASS (mode) != MODE_COMPLEX_FLOAT) 1.1 root 3503: return const0_rtx; 3504: 3505: /* Change subtraction from zero into negation. */ 3506: if (op0 == CONST0_RTX (mode)) 3507: return gen_rtx (NEG, mode, op1); 3508: 1.1.1.5 ! root 3509: /* (-1 - a) is ~a. */ ! 3510: if (op0 == constm1_rtx) ! 3511: return gen_rtx (NOT, mode, op1); ! 3512: 1.1 root 3513: /* Subtracting 0 has no effect. */ 3514: if (op1 == CONST0_RTX (mode)) 3515: return op0; 3516: 3517: /* (a - (-b)) -> (a + b). */ 3518: if (GET_CODE (op1) == NEG) 1.1.1.5 ! root 3519: return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0)); 1.1 root 3520: 1.1.1.5 ! root 3521: /* If one of the operands is a PLUS or a MINUS, see if we can ! 3522: simplify this by the associative law. ! 3523: Don't use the associative law for floating point. 1.1 root 3524: The inaccuracy makes it nonassociative, 3525: and subtle programs can break if operations are associated. */ 3526: 1.1.1.5 ! root 3527: if ((GET_MODE_CLASS (mode) == MODE_INT ! 3528: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) ! 3529: && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS ! 3530: || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) ! 3531: && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) ! 3532: return tem; 1.1 root 3533: 3534: /* Don't let a relocatable value get a negative coeff. */ 3535: if (GET_CODE (op1) == CONST_INT) 3536: return plus_constant (op0, - INTVAL (op1)); 3537: break; 3538: 3539: case MULT: 3540: if (op1 == constm1_rtx) 3541: { 1.1.1.5 ! root 3542: tem = simplify_unary_operation (NEG, mode, op0, mode); 1.1 root 3543: 3544: return tem ? tem : gen_rtx (NEG, mode, op0); 3545: } 3546: 3547: /* In IEEE floating point, x*0 is not always 0. */ 3548: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 3549: || GET_MODE_CLASS (mode) == MODE_INT) 3550: && op1 == CONST0_RTX (mode) 3551: && ! side_effects_p (op0)) 3552: return op1; 3553: 3554: /* In IEEE floating point, x*1 is not equivalent to x for nans. 3555: However, ANSI says we can drop signals, 3556: so we can do this anyway. */ 3557: if (op1 == CONST1_RTX (mode)) 3558: return op0; 3559: 3560: /* Convert multiply by constant power of two into shift. */ 3561: if (GET_CODE (op1) == CONST_INT 3562: && (val = exact_log2 (INTVAL (op1))) >= 0) 1.1.1.4 root 3563: return gen_rtx (ASHIFT, mode, op0, GEN_INT (val)); 1.1 root 3564: 3565: if (GET_CODE (op1) == CONST_DOUBLE 3566: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT) 3567: { 3568: REAL_VALUE_TYPE d; 1.1.1.5 ! root 3569: jmp_buf handler; ! 3570: int op1is2, op1ism1; ! 3571: ! 3572: if (setjmp (handler)) ! 3573: return 0; ! 3574: ! 3575: set_float_handler (handler); 1.1 root 3576: REAL_VALUE_FROM_CONST_DOUBLE (d, op1); 1.1.1.5 ! root 3577: op1is2 = REAL_VALUES_EQUAL (d, dconst2); ! 3578: op1ism1 = REAL_VALUES_EQUAL (d, dconstm1); ! 3579: set_float_handler (NULL_PTR); 1.1 root 3580: 3581: /* x*2 is x+x and x*(-1) is -x */ 1.1.1.5 ! root 3582: if (op1is2 && GET_MODE (op0) == mode) 1.1 root 3583: return gen_rtx (PLUS, mode, op0, copy_rtx (op0)); 3584: 1.1.1.5 ! root 3585: else if (op1ism1 && GET_MODE (op0) == mode) 1.1 root 3586: return gen_rtx (NEG, mode, op0); 3587: } 3588: break; 3589: 3590: case IOR: 3591: if (op1 == const0_rtx) 3592: return op0; 3593: if (GET_CODE (op1) == CONST_INT 3594: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) 3595: return op1; 3596: if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 3597: return op0; 3598: /* A | (~A) -> -1 */ 3599: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) 3600: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) 1.1.1.5 ! root 3601: && ! side_effects_p (op0) ! 3602: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3603: return constm1_rtx; 3604: break; 3605: 3606: case XOR: 3607: if (op1 == const0_rtx) 3608: return op0; 3609: if (GET_CODE (op1) == CONST_INT 3610: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) 3611: return gen_rtx (NOT, mode, op0); 1.1.1.5 ! root 3612: if (op0 == op1 && ! side_effects_p (op0) ! 3613: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3614: return const0_rtx; 3615: break; 3616: 3617: case AND: 3618: if (op1 == const0_rtx && ! side_effects_p (op0)) 3619: return const0_rtx; 3620: if (GET_CODE (op1) == CONST_INT 3621: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) 3622: return op0; 1.1.1.5 ! root 3623: if (op0 == op1 && ! side_effects_p (op0) ! 3624: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3625: return op0; 3626: /* A & (~A) -> 0 */ 3627: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) 3628: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) 1.1.1.5 ! root 3629: && ! side_effects_p (op0) ! 3630: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3631: return const0_rtx; 3632: break; 3633: 3634: case UDIV: 3635: /* Convert divide by power of two into shift (divide by 1 handled 3636: below). */ 3637: if (GET_CODE (op1) == CONST_INT 3638: && (arg1 = exact_log2 (INTVAL (op1))) > 0) 1.1.1.4 root 3639: return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1)); 1.1 root 3640: 3641: /* ... fall through ... */ 3642: 3643: case DIV: 3644: if (op1 == CONST1_RTX (mode)) 3645: return op0; 1.1.1.4 root 3646: 3647: /* In IEEE floating point, 0/x is not always 0. */ 3648: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 3649: || GET_MODE_CLASS (mode) == MODE_INT) 3650: && op0 == CONST0_RTX (mode) 3651: && ! side_effects_p (op1)) 1.1 root 3652: return op0; 1.1.1.4 root 3653: 1.1 root 3654: #if 0 /* Turned off till an expert says this is a safe thing to do. */ 3655: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 3656: /* Change division by a constant into multiplication. */ 3657: else if (GET_CODE (op1) == CONST_DOUBLE 3658: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT 3659: && op1 != CONST0_RTX (mode)) 3660: { 3661: REAL_VALUE_TYPE d; 3662: REAL_VALUE_FROM_CONST_DOUBLE (d, op1); 3663: if (REAL_VALUES_EQUAL (d, dconst0)) 3664: abort(); 3665: #if defined (REAL_ARITHMETIC) 1.1.1.5 ! root 3666: REAL_ARITHMETIC (d, (int) RDIV_EXPR, dconst1, d); 1.1 root 3667: return gen_rtx (MULT, mode, op0, 3668: CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); 3669: #else 3670: return gen_rtx (MULT, mode, op0, 3671: CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode)); 3672: } 3673: #endif 3674: #endif 3675: #endif 3676: break; 3677: 3678: case UMOD: 3679: /* Handle modulus by power of two (mod with 1 handled below). */ 3680: if (GET_CODE (op1) == CONST_INT 3681: && exact_log2 (INTVAL (op1)) > 0) 1.1.1.4 root 3682: return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1)); 1.1 root 3683: 3684: /* ... fall through ... */ 3685: 3686: case MOD: 3687: if ((op0 == const0_rtx || op1 == const1_rtx) 3688: && ! side_effects_p (op0) && ! side_effects_p (op1)) 3689: return const0_rtx; 3690: break; 3691: 3692: case ROTATERT: 3693: case ROTATE: 3694: /* Rotating ~0 always results in ~0. */ 1.1.1.4 root 3695: if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT 1.1 root 3696: && INTVAL (op0) == GET_MODE_MASK (mode) 3697: && ! side_effects_p (op1)) 3698: return op0; 3699: 3700: /* ... fall through ... */ 3701: 3702: case LSHIFT: 3703: case ASHIFT: 3704: case ASHIFTRT: 3705: case LSHIFTRT: 3706: if (op1 == const0_rtx) 3707: return op0; 3708: if (op0 == const0_rtx && ! side_effects_p (op1)) 3709: return op0; 3710: break; 3711: 3712: case SMIN: 1.1.1.4 root 3713: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT 3714: && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1) 1.1 root 3715: && ! side_effects_p (op0)) 3716: return op1; 3717: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 3718: return op0; 3719: break; 3720: 3721: case SMAX: 1.1.1.4 root 3722: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT 1.1.1.5 ! root 3723: && (INTVAL (op1) ! 3724: == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1) 1.1 root 3725: && ! side_effects_p (op0)) 3726: return op1; 3727: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 3728: return op0; 3729: break; 3730: 3731: case UMIN: 3732: if (op1 == const0_rtx && ! side_effects_p (op0)) 3733: return op1; 3734: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 3735: return op0; 3736: break; 3737: 3738: case UMAX: 3739: if (op1 == constm1_rtx && ! side_effects_p (op0)) 3740: return op1; 3741: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 3742: return op0; 3743: break; 3744: 3745: default: 3746: abort (); 3747: } 3748: 3749: return 0; 3750: } 3751: 3752: /* Get the integer argument values in two forms: 3753: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ 3754: 3755: arg0 = INTVAL (op0); 3756: arg1 = INTVAL (op1); 3757: 1.1.1.4 root 3758: if (width < HOST_BITS_PER_WIDE_INT) 1.1 root 3759: { 1.1.1.4 root 3760: arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; 3761: arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 3762: 3763: arg0s = arg0; 1.1.1.4 root 3764: if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) 3765: arg0s |= ((HOST_WIDE_INT) (-1) << width); 1.1 root 3766: 3767: arg1s = arg1; 1.1.1.4 root 3768: if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) 3769: arg1s |= ((HOST_WIDE_INT) (-1) << width); 1.1 root 3770: } 3771: else 3772: { 3773: arg0s = arg0; 3774: arg1s = arg1; 3775: } 3776: 3777: /* Compute the value of the arithmetic. */ 3778: 3779: switch (code) 3780: { 3781: case PLUS: 1.1.1.2 root 3782: val = arg0s + arg1s; 1.1 root 3783: break; 3784: 3785: case MINUS: 1.1.1.2 root 3786: val = arg0s - arg1s; 1.1 root 3787: break; 3788: 3789: case MULT: 3790: val = arg0s * arg1s; 3791: break; 3792: 3793: case DIV: 3794: if (arg1s == 0) 3795: return 0; 3796: val = arg0s / arg1s; 3797: break; 3798: 3799: case MOD: 3800: if (arg1s == 0) 3801: return 0; 3802: val = arg0s % arg1s; 3803: break; 3804: 3805: case UDIV: 3806: if (arg1 == 0) 3807: return 0; 1.1.1.4 root 3808: val = (unsigned HOST_WIDE_INT) arg0 / arg1; 1.1 root 3809: break; 3810: 3811: case UMOD: 3812: if (arg1 == 0) 3813: return 0; 1.1.1.4 root 3814: val = (unsigned HOST_WIDE_INT) arg0 % arg1; 1.1 root 3815: break; 3816: 3817: case AND: 3818: val = arg0 & arg1; 3819: break; 3820: 3821: case IOR: 3822: val = arg0 | arg1; 3823: break; 3824: 3825: case XOR: 3826: val = arg0 ^ arg1; 3827: break; 3828: 3829: case LSHIFTRT: 3830: /* If shift count is undefined, don't fold it; let the machine do 3831: what it wants. But truncate it if the machine will do that. */ 3832: if (arg1 < 0) 3833: return 0; 3834: 3835: #ifdef SHIFT_COUNT_TRUNCATED 3836: arg1 &= (BITS_PER_WORD - 1); 3837: #endif 3838: 3839: if (arg1 >= width) 3840: return 0; 3841: 1.1.1.4 root 3842: val = ((unsigned HOST_WIDE_INT) arg0) >> arg1; 1.1 root 3843: break; 3844: 3845: case ASHIFT: 3846: case LSHIFT: 3847: if (arg1 < 0) 3848: return 0; 3849: 3850: #ifdef SHIFT_COUNT_TRUNCATED 3851: arg1 &= (BITS_PER_WORD - 1); 3852: #endif 3853: 3854: if (arg1 >= width) 3855: return 0; 3856: 1.1.1.4 root 3857: val = ((unsigned HOST_WIDE_INT) arg0) << arg1; 1.1 root 3858: break; 3859: 3860: case ASHIFTRT: 3861: if (arg1 < 0) 3862: return 0; 3863: 3864: #ifdef SHIFT_COUNT_TRUNCATED 3865: arg1 &= (BITS_PER_WORD - 1); 3866: #endif 3867: 3868: if (arg1 >= width) 3869: return 0; 3870: 3871: val = arg0s >> arg1; 1.1.1.4 root 3872: 3873: /* Bootstrap compiler may not have sign extended the right shift. 3874: Manually extend the sign to insure bootstrap cc matches gcc. */ 3875: if (arg0s < 0 && arg1 > 0) 3876: val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1); 3877: 1.1 root 3878: break; 3879: 3880: case ROTATERT: 3881: if (arg1 < 0) 3882: return 0; 3883: 3884: arg1 %= width; 1.1.1.4 root 3885: val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1)) 3886: | (((unsigned HOST_WIDE_INT) arg0) >> arg1)); 1.1 root 3887: break; 3888: 3889: case ROTATE: 3890: if (arg1 < 0) 3891: return 0; 3892: 3893: arg1 %= width; 1.1.1.4 root 3894: val = ((((unsigned HOST_WIDE_INT) arg0) << arg1) 3895: | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1))); 1.1 root 3896: break; 3897: 3898: case COMPARE: 3899: /* Do nothing here. */ 3900: return 0; 3901: 1.1.1.3 root 3902: case SMIN: 3903: val = arg0s <= arg1s ? arg0s : arg1s; 3904: break; 3905: 3906: case UMIN: 1.1.1.4 root 3907: val = ((unsigned HOST_WIDE_INT) arg0 3908: <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); 1.1.1.3 root 3909: break; 3910: 3911: case SMAX: 3912: val = arg0s > arg1s ? arg0s : arg1s; 3913: break; 3914: 3915: case UMAX: 1.1.1.4 root 3916: val = ((unsigned HOST_WIDE_INT) arg0 3917: > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); 1.1.1.3 root 3918: break; 3919: 1.1 root 3920: default: 3921: abort (); 3922: } 3923: 3924: /* Clear the bits that don't belong in our mode, unless they and our sign 3925: bit are all one. So we get either a reasonable negative value or a 3926: reasonable unsigned value for this mode. */ 1.1.1.4 root 3927: if (width < HOST_BITS_PER_WIDE_INT 3928: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 3929: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 3930: val &= ((HOST_WIDE_INT) 1 << width) - 1; 3931: 3932: return GEN_INT (val); 1.1 root 3933: } 3934: 1.1.1.5 ! root 3935: /* Simplify a PLUS or MINUS, at least one of whose operands may be another ! 3936: PLUS or MINUS. ! 3937: ! 3938: Rather than test for specific case, we do this by a brute-force method ! 3939: and do all possible simplifications until no more changes occur. Then ! 3940: we rebuild the operation. */ ! 3941: ! 3942: static rtx ! 3943: simplify_plus_minus (code, mode, op0, op1) ! 3944: enum rtx_code code; ! 3945: enum machine_mode mode; ! 3946: rtx op0, op1; ! 3947: { ! 3948: rtx ops[8]; ! 3949: int negs[8]; ! 3950: rtx result, tem; ! 3951: int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0; ! 3952: int first = 1, negate = 0, changed; ! 3953: int i, j; ! 3954: ! 3955: bzero (ops, sizeof ops); ! 3956: ! 3957: /* Set up the two operands and then expand them until nothing has been ! 3958: changed. If we run out of room in our array, give up; this should ! 3959: almost never happen. */ ! 3960: ! 3961: ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS); ! 3962: ! 3963: changed = 1; ! 3964: while (changed) ! 3965: { ! 3966: changed = 0; ! 3967: ! 3968: for (i = 0; i < n_ops; i++) ! 3969: switch (GET_CODE (ops[i])) ! 3970: { ! 3971: case PLUS: ! 3972: case MINUS: ! 3973: if (n_ops == 7) ! 3974: return 0; ! 3975: ! 3976: ops[n_ops] = XEXP (ops[i], 1); ! 3977: negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i]; ! 3978: ops[i] = XEXP (ops[i], 0); ! 3979: input_ops++; ! 3980: changed = 1; ! 3981: break; ! 3982: ! 3983: case NEG: ! 3984: ops[i] = XEXP (ops[i], 0); ! 3985: negs[i] = ! negs[i]; ! 3986: changed = 1; ! 3987: break; ! 3988: ! 3989: case CONST: ! 3990: ops[i] = XEXP (ops[i], 0); ! 3991: input_consts++; ! 3992: changed = 1; ! 3993: break; ! 3994: ! 3995: case NOT: ! 3996: /* ~a -> (-a - 1) */ ! 3997: if (n_ops != 7) ! 3998: { ! 3999: ops[n_ops] = constm1_rtx; ! 4000: negs[n_ops++] = negs[i]; ! 4001: ops[i] = XEXP (ops[i], 0); ! 4002: negs[i] = ! negs[i]; ! 4003: changed = 1; ! 4004: } ! 4005: break; ! 4006: ! 4007: case CONST_INT: ! 4008: if (negs[i]) ! 4009: ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1; ! 4010: break; ! 4011: } ! 4012: } ! 4013: ! 4014: /* If we only have two operands, we can't do anything. */ ! 4015: if (n_ops <= 2) ! 4016: return 0; ! 4017: ! 4018: /* Now simplify each pair of operands until nothing changes. The first ! 4019: time through just simplify constants against each other. */ ! 4020: ! 4021: changed = 1; ! 4022: while (changed) ! 4023: { ! 4024: changed = first; ! 4025: ! 4026: for (i = 0; i < n_ops - 1; i++) ! 4027: for (j = i + 1; j < n_ops; j++) ! 4028: if (ops[i] != 0 && ops[j] != 0 ! 4029: && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j])))) ! 4030: { ! 4031: rtx lhs = ops[i], rhs = ops[j]; ! 4032: enum rtx_code ncode = PLUS; ! 4033: ! 4034: if (negs[i] && ! negs[j]) ! 4035: lhs = ops[j], rhs = ops[i], ncode = MINUS; ! 4036: else if (! negs[i] && negs[j]) ! 4037: ncode = MINUS; ! 4038: ! 4039: tem = simplify_binary_operation (ncode, mode, lhs, rhs); ! 4040: if (tem) ! 4041: { ! 4042: ops[i] = tem, ops[j] = 0; ! 4043: negs[i] = negs[i] && negs[j]; ! 4044: if (GET_CODE (tem) == NEG) ! 4045: ops[i] = XEXP (tem, 0), negs[i] = ! negs[i]; ! 4046: ! 4047: if (GET_CODE (ops[i]) == CONST_INT && negs[i]) ! 4048: ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0; ! 4049: changed = 1; ! 4050: } ! 4051: } ! 4052: ! 4053: first = 0; ! 4054: } ! 4055: ! 4056: /* Pack all the operands to the lower-numbered entries and give up if ! 4057: we didn't reduce the number of operands we had. Make sure we ! 4058: count a CONST as two operands. If we have the same number of ! 4059: operands, but have made more CONSTs than we had, this is also ! 4060: an improvement, so accept it. */ ! 4061: ! 4062: for (i = 0, j = 0; j < n_ops; j++) ! 4063: if (ops[j] != 0) ! 4064: { ! 4065: ops[i] = ops[j], negs[i++] = negs[j]; ! 4066: if (GET_CODE (ops[j]) == CONST) ! 4067: n_consts++; ! 4068: } ! 4069: ! 4070: if (i + n_consts > input_ops ! 4071: || (i + n_consts == input_ops && n_consts <= input_consts)) ! 4072: return 0; ! 4073: ! 4074: n_ops = i; ! 4075: ! 4076: /* If we have a CONST_INT, put it last. */ ! 4077: for (i = 0; i < n_ops - 1; i++) ! 4078: if (GET_CODE (ops[i]) == CONST_INT) ! 4079: { ! 4080: tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem; ! 4081: j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j; ! 4082: } ! 4083: ! 4084: /* Put a non-negated operand first. If there aren't any, make all ! 4085: operands positive and negate the whole thing later. */ ! 4086: for (i = 0; i < n_ops && negs[i]; i++) ! 4087: ; ! 4088: ! 4089: if (i == n_ops) ! 4090: { ! 4091: for (i = 0; i < n_ops; i++) ! 4092: negs[i] = 0; ! 4093: negate = 1; ! 4094: } ! 4095: else if (i != 0) ! 4096: { ! 4097: tem = ops[0], ops[0] = ops[i], ops[i] = tem; ! 4098: j = negs[0], negs[0] = negs[i], negs[i] = j; ! 4099: } ! 4100: ! 4101: /* Now make the result by performing the requested operations. */ ! 4102: result = ops[0]; ! 4103: for (i = 1; i < n_ops; i++) ! 4104: result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]); ! 4105: ! 4106: return negate ? gen_rtx (NEG, mode, result) : result; ! 4107: } ! 4108: ! 4109: /* Make a binary operation by properly ordering the operands and ! 4110: seeing if the expression folds. */ ! 4111: ! 4112: static rtx ! 4113: cse_gen_binary (code, mode, op0, op1) ! 4114: enum rtx_code code; ! 4115: enum machine_mode mode; ! 4116: rtx op0, op1; ! 4117: { ! 4118: rtx tem; ! 4119: ! 4120: /* Put complex operands first and constants second if commutative. */ ! 4121: if (GET_RTX_CLASS (code) == 'c' ! 4122: && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT) ! 4123: || (GET_RTX_CLASS (GET_CODE (op0)) == 'o' ! 4124: && GET_RTX_CLASS (GET_CODE (op1)) != 'o') ! 4125: || (GET_CODE (op0) == SUBREG ! 4126: && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o' ! 4127: && GET_RTX_CLASS (GET_CODE (op1)) != 'o'))) ! 4128: tem = op0, op0 = op1, op1 = tem; ! 4129: ! 4130: /* If this simplifies, do it. */ ! 4131: tem = simplify_binary_operation (code, mode, op0, op1); ! 4132: ! 4133: if (tem) ! 4134: return tem; ! 4135: ! 4136: /* Handle addition and subtraction of CONST_INT specially. Otherwise, ! 4137: just form the operation. */ ! 4138: ! 4139: if (code == PLUS && GET_CODE (op1) == CONST_INT ! 4140: && GET_MODE (op0) != VOIDmode) ! 4141: return plus_constant (op0, INTVAL (op1)); ! 4142: else if (code == MINUS && GET_CODE (op1) == CONST_INT ! 4143: && GET_MODE (op0) != VOIDmode) ! 4144: return plus_constant (op0, - INTVAL (op1)); ! 4145: else ! 4146: return gen_rtx (code, mode, op0, op1); ! 4147: } ! 4148: 1.1 root 4149: /* Like simplify_binary_operation except used for relational operators. 4150: MODE is the mode of the operands, not that of the result. */ 4151: 4152: rtx 4153: simplify_relational_operation (code, mode, op0, op1) 4154: enum rtx_code code; 4155: enum machine_mode mode; 4156: rtx op0, op1; 4157: { 1.1.1.4 root 4158: register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; 4159: HOST_WIDE_INT val; 1.1 root 4160: int width = GET_MODE_BITSIZE (mode); 4161: 4162: /* If op0 is a compare, extract the comparison arguments from it. */ 4163: if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) 4164: op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 4165: 1.1.1.5 ! root 4166: /* What to do with MODE_CC isn't clear yet. ! 4167: Let's make sure nothing erroneous is done. */ ! 4168: if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC) ! 4169: return 0; ! 4170: ! 4171: /* Unlike the arithmetic operations, we can do the comparison whether ! 4172: or not WIDTH is larger than HOST_BITS_PER_WIDE_INT because the ! 4173: CONST_INTs are to be understood as being infinite precision as ! 4174: is the comparison. So there is no question of overflow. */ ! 4175: ! 4176: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT || width == 0) 1.1 root 4177: { 4178: /* Even if we can't compute a constant result, 4179: there are some cases worth simplifying. */ 4180: 4181: /* For non-IEEE floating-point, if the two operands are equal, we know 4182: the result. */ 4183: if (rtx_equal_p (op0, op1) 4184: && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 4185: || GET_MODE_CLASS (GET_MODE (op0)) != MODE_FLOAT)) 4186: return (code == EQ || code == GE || code == LE || code == LEU 4187: || code == GEU) ? const_true_rtx : const0_rtx; 1.1.1.5 ! root 4188: ! 4189: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 1.1 root 4190: else if (GET_CODE (op0) == CONST_DOUBLE 4191: && GET_CODE (op1) == CONST_DOUBLE 4192: && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) 4193: { 4194: REAL_VALUE_TYPE d0, d1; 4195: jmp_buf handler; 4196: int op0lt, op1lt, equal; 4197: 4198: if (setjmp (handler)) 4199: return 0; 4200: 4201: set_float_handler (handler); 4202: REAL_VALUE_FROM_CONST_DOUBLE (d0, op0); 4203: REAL_VALUE_FROM_CONST_DOUBLE (d1, op1); 4204: equal = REAL_VALUES_EQUAL (d0, d1); 4205: op0lt = REAL_VALUES_LESS (d0, d1); 4206: op1lt = REAL_VALUES_LESS (d1, d0); 1.1.1.4 root 4207: set_float_handler (NULL_PTR); 1.1 root 4208: 4209: switch (code) 4210: { 4211: case EQ: 4212: return equal ? const_true_rtx : const0_rtx; 4213: case NE: 4214: return !equal ? const_true_rtx : const0_rtx; 4215: case LE: 4216: return equal || op0lt ? const_true_rtx : const0_rtx; 4217: case LT: 4218: return op0lt ? const_true_rtx : const0_rtx; 4219: case GE: 4220: return equal || op1lt ? const_true_rtx : const0_rtx; 4221: case GT: 4222: return op1lt ? const_true_rtx : const0_rtx; 4223: } 4224: } 1.1.1.5 ! root 4225: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ ! 4226: ! 4227: else if (GET_MODE_CLASS (mode) == MODE_INT ! 4228: && width > HOST_BITS_PER_WIDE_INT ! 4229: && (GET_CODE (op0) == CONST_DOUBLE ! 4230: || GET_CODE (op0) == CONST_INT) ! 4231: && (GET_CODE (op1) == CONST_DOUBLE ! 4232: || GET_CODE (op1) == CONST_INT)) ! 4233: { ! 4234: HOST_WIDE_INT h0, l0, h1, l1; ! 4235: unsigned HOST_WIDE_INT uh0, ul0, uh1, ul1; ! 4236: int op0lt, op0ltu, equal; ! 4237: ! 4238: if (GET_CODE (op0) == CONST_DOUBLE) ! 4239: l0 = CONST_DOUBLE_LOW (op0), h0 = CONST_DOUBLE_HIGH (op0); ! 4240: else ! 4241: l0 = INTVAL (op0), h0 = l0 < 0 ? -1 : 0; ! 4242: ! 4243: if (GET_CODE (op1) == CONST_DOUBLE) ! 4244: l1 = CONST_DOUBLE_LOW (op1), h1 = CONST_DOUBLE_HIGH (op1); ! 4245: else ! 4246: l1 = INTVAL (op1), h1 = l1 < 0 ? -1 : 0; ! 4247: ! 4248: uh0 = h0, ul0 = l0, uh1 = h1, ul1 = l1; ! 4249: ! 4250: equal = (h0 == h1 && l0 == l1); ! 4251: op0lt = (h0 < h1 || (h0 == h1 && l0 < l1)); ! 4252: op0ltu = (uh0 < uh1 || (uh0 == uh1 && ul0 < ul1)); ! 4253: ! 4254: switch (code) ! 4255: { ! 4256: case EQ: ! 4257: return equal ? const_true_rtx : const0_rtx; ! 4258: case NE: ! 4259: return !equal ? const_true_rtx : const0_rtx; ! 4260: case LE: ! 4261: return equal || op0lt ? const_true_rtx : const0_rtx; ! 4262: case LT: ! 4263: return op0lt ? const_true_rtx : const0_rtx; ! 4264: case GE: ! 4265: return !op0lt ? const_true_rtx : const0_rtx; ! 4266: case GT: ! 4267: return !equal && !op0lt ? const_true_rtx : const0_rtx; ! 4268: case LEU: ! 4269: return equal || op0ltu ? const_true_rtx : const0_rtx; ! 4270: case LTU: ! 4271: return op0ltu ? const_true_rtx : const0_rtx; ! 4272: case GEU: ! 4273: return !op0ltu ? const_true_rtx : const0_rtx; ! 4274: case GTU: ! 4275: return !equal && !op0ltu ? const_true_rtx : const0_rtx; ! 4276: } ! 4277: } ! 4278: 1.1 root 4279: switch (code) 4280: { 4281: case EQ: 4282: { 4283: #if 0 4284: /* We can't make this assumption due to #pragma weak */ 4285: if (CONSTANT_P (op0) && op1 == const0_rtx) 4286: return const0_rtx; 4287: #endif 1.1.1.3 root 4288: if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx 4289: /* On some machines, the ap reg can be 0 sometimes. */ 4290: && op0 != arg_pointer_rtx) 1.1 root 4291: return const0_rtx; 4292: break; 4293: } 4294: 4295: case NE: 4296: #if 0 4297: /* We can't make this assumption due to #pragma weak */ 4298: if (CONSTANT_P (op0) && op1 == const0_rtx) 4299: return const_true_rtx; 4300: #endif 1.1.1.3 root 4301: if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx 4302: /* On some machines, the ap reg can be 0 sometimes. */ 4303: && op0 != arg_pointer_rtx) 1.1 root 4304: return const_true_rtx; 4305: break; 4306: 4307: case GEU: 4308: /* Unsigned values are never negative, but we must be sure we are 4309: actually comparing a value, not a CC operand. */ 4310: if (op1 == const0_rtx 4311: && GET_MODE_CLASS (mode) == MODE_INT) 4312: return const_true_rtx; 4313: break; 4314: 4315: case LTU: 4316: if (op1 == const0_rtx 4317: && GET_MODE_CLASS (mode) == MODE_INT) 4318: return const0_rtx; 4319: break; 4320: 4321: case LEU: 4322: /* Unsigned values are never greater than the largest 4323: unsigned value. */ 4324: if (GET_CODE (op1) == CONST_INT 4325: && INTVAL (op1) == GET_MODE_MASK (mode) 4326: && GET_MODE_CLASS (mode) == MODE_INT) 4327: return const_true_rtx; 4328: break; 4329: 4330: case GTU: 4331: if (GET_CODE (op1) == CONST_INT 4332: && INTVAL (op1) == GET_MODE_MASK (mode) 4333: && GET_MODE_CLASS (mode) == MODE_INT) 4334: return const0_rtx; 4335: break; 4336: } 4337: 4338: return 0; 4339: } 4340: 4341: /* Get the integer argument values in two forms: 4342: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ 4343: 4344: arg0 = INTVAL (op0); 4345: arg1 = INTVAL (op1); 4346: 1.1.1.4 root 4347: if (width < HOST_BITS_PER_WIDE_INT) 1.1 root 4348: { 1.1.1.4 root 4349: arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; 4350: arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 4351: 4352: arg0s = arg0; 1.1.1.4 root 4353: if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) 4354: arg0s |= ((HOST_WIDE_INT) (-1) << width); 1.1 root 4355: 4356: arg1s = arg1; 1.1.1.4 root 4357: if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) 4358: arg1s |= ((HOST_WIDE_INT) (-1) << width); 1.1 root 4359: } 4360: else 4361: { 4362: arg0s = arg0; 4363: arg1s = arg1; 4364: } 4365: 4366: /* Compute the value of the arithmetic. */ 4367: 4368: switch (code) 4369: { 4370: case NE: 4371: val = arg0 != arg1 ? STORE_FLAG_VALUE : 0; 4372: break; 4373: 4374: case EQ: 4375: val = arg0 == arg1 ? STORE_FLAG_VALUE : 0; 4376: break; 4377: 4378: case LE: 4379: val = arg0s <= arg1s ? STORE_FLAG_VALUE : 0; 4380: break; 4381: 4382: case LT: 4383: val = arg0s < arg1s ? STORE_FLAG_VALUE : 0; 4384: break; 4385: 4386: case GE: 4387: val = arg0s >= arg1s ? STORE_FLAG_VALUE : 0; 4388: break; 4389: 4390: case GT: 4391: val = arg0s > arg1s ? STORE_FLAG_VALUE : 0; 4392: break; 4393: 4394: case LEU: 1.1.1.4 root 4395: val = (((unsigned HOST_WIDE_INT) arg0) 4396: <= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); 1.1 root 4397: break; 4398: 4399: case LTU: 1.1.1.4 root 4400: val = (((unsigned HOST_WIDE_INT) arg0) 4401: < ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); 1.1 root 4402: break; 4403: 4404: case GEU: 1.1.1.4 root 4405: val = (((unsigned HOST_WIDE_INT) arg0) 4406: >= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); 1.1 root 4407: break; 4408: 4409: case GTU: 1.1.1.4 root 4410: val = (((unsigned HOST_WIDE_INT) arg0) 4411: > ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0); 1.1 root 4412: break; 4413: 4414: default: 4415: abort (); 4416: } 4417: 4418: /* Clear the bits that don't belong in our mode, unless they and our sign 4419: bit are all one. So we get either a reasonable negative value or a 4420: reasonable unsigned value for this mode. */ 1.1.1.4 root 4421: if (width < HOST_BITS_PER_WIDE_INT 4422: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 4423: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 4424: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 4425: 1.1.1.4 root 4426: return GEN_INT (val); 1.1 root 4427: } 4428: 4429: /* Simplify CODE, an operation with result mode MODE and three operands, 4430: OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became 4431: a constant. Return 0 if no simplifications is possible. */ 4432: 4433: rtx 4434: simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2) 4435: enum rtx_code code; 4436: enum machine_mode mode, op0_mode; 4437: rtx op0, op1, op2; 4438: { 4439: int width = GET_MODE_BITSIZE (mode); 4440: 4441: /* VOIDmode means "infinite" precision. */ 4442: if (width == 0) 1.1.1.4 root 4443: width = HOST_BITS_PER_WIDE_INT; 1.1 root 4444: 4445: switch (code) 4446: { 4447: case SIGN_EXTRACT: 4448: case ZERO_EXTRACT: 4449: if (GET_CODE (op0) == CONST_INT 4450: && GET_CODE (op1) == CONST_INT 4451: && GET_CODE (op2) == CONST_INT 4452: && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode) 1.1.1.4 root 4453: && width <= HOST_BITS_PER_WIDE_INT) 1.1 root 4454: { 4455: /* Extracting a bit-field from a constant */ 1.1.1.4 root 4456: HOST_WIDE_INT val = INTVAL (op0); 1.1 root 4457: 4458: #if BITS_BIG_ENDIAN 4459: val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1)); 4460: #else 4461: val >>= INTVAL (op2); 4462: #endif 1.1.1.4 root 4463: if (HOST_BITS_PER_WIDE_INT != INTVAL (op1)) 1.1 root 4464: { 4465: /* First zero-extend. */ 1.1.1.4 root 4466: val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1; 1.1 root 4467: /* If desired, propagate sign bit. */ 1.1.1.4 root 4468: if (code == SIGN_EXTRACT 4469: && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1)))) 4470: val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1); 1.1 root 4471: } 4472: 4473: /* Clear the bits that don't belong in our mode, 4474: unless they and our sign bit are all one. 4475: So we get either a reasonable negative value or a reasonable 4476: unsigned value for this mode. */ 1.1.1.4 root 4477: if (width < HOST_BITS_PER_WIDE_INT 4478: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 4479: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 4480: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 4481: 1.1.1.4 root 4482: return GEN_INT (val); 1.1 root 4483: } 4484: break; 4485: 4486: case IF_THEN_ELSE: 4487: if (GET_CODE (op0) == CONST_INT) 4488: return op0 != const0_rtx ? op1 : op2; 4489: break; 4490: 4491: default: 4492: abort (); 4493: } 4494: 4495: return 0; 4496: } 4497: 4498: /* If X is a nontrivial arithmetic operation on an argument 4499: for which a constant value can be determined, return 4500: the result of operating on that value, as a constant. 4501: Otherwise, return X, possibly with one or more operands 4502: modified by recursive calls to this function. 4503: 4504: If X is a register whose contents are known, we do NOT 1.1.1.5 ! root 4505: return those contents here. equiv_constant is called to ! 4506: perform that task. 1.1 root 4507: 4508: INSN is the insn that we may be modifying. If it is 0, make a copy 4509: of X before modifying it. */ 4510: 4511: static rtx 4512: fold_rtx (x, insn) 4513: rtx x; 4514: rtx insn; 4515: { 4516: register enum rtx_code code; 4517: register enum machine_mode mode; 4518: register char *fmt; 1.1.1.4 root 4519: register int i; 1.1 root 4520: rtx new = 0; 4521: int copied = 0; 4522: int must_swap = 0; 4523: 4524: /* Folded equivalents of first two operands of X. */ 4525: rtx folded_arg0; 4526: rtx folded_arg1; 4527: 4528: /* Constant equivalents of first three operands of X; 4529: 0 when no such equivalent is known. */ 4530: rtx const_arg0; 4531: rtx const_arg1; 4532: rtx const_arg2; 4533: 4534: /* The mode of the first operand of X. We need this for sign and zero 4535: extends. */ 4536: enum machine_mode mode_arg0; 4537: 4538: if (x == 0) 4539: return x; 4540: 4541: mode = GET_MODE (x); 4542: code = GET_CODE (x); 4543: switch (code) 4544: { 4545: case CONST: 4546: case CONST_INT: 4547: case CONST_DOUBLE: 4548: case SYMBOL_REF: 4549: case LABEL_REF: 4550: case REG: 4551: /* No use simplifying an EXPR_LIST 4552: since they are used only for lists of args 4553: in a function call's REG_EQUAL note. */ 4554: case EXPR_LIST: 4555: return x; 4556: 4557: #ifdef HAVE_cc0 4558: case CC0: 4559: return prev_insn_cc0; 4560: #endif 4561: 4562: case PC: 4563: /* If the next insn is a CODE_LABEL followed by a jump table, 4564: PC's value is a LABEL_REF pointing to that label. That 4565: lets us fold switch statements on the Vax. */ 4566: if (insn && GET_CODE (insn) == JUMP_INSN) 4567: { 4568: rtx next = next_nonnote_insn (insn); 4569: 4570: if (next && GET_CODE (next) == CODE_LABEL 4571: && NEXT_INSN (next) != 0 4572: && GET_CODE (NEXT_INSN (next)) == JUMP_INSN 4573: && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC 4574: || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) 4575: return gen_rtx (LABEL_REF, Pmode, next); 4576: } 4577: break; 4578: 4579: case SUBREG: 1.1.1.4 root 4580: /* See if we previously assigned a constant value to this SUBREG. */ 4581: if ((new = lookup_as_function (x, CONST_INT)) != 0 4582: || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) 1.1 root 4583: return new; 4584: 1.1.1.4 root 4585: /* If this is a paradoxical SUBREG, we have no idea what value the 4586: extra bits would have. However, if the operand is equivalent 4587: to a SUBREG whose operand is the same as our mode, and all the 4588: modes are within a word, we can just use the inner operand 4589: because these SUBREGs just say how to treat the register. */ 4590: 1.1.1.3 root 4591: if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 1.1.1.4 root 4592: { 4593: enum machine_mode imode = GET_MODE (SUBREG_REG (x)); 4594: struct table_elt *elt; 4595: 4596: if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 4597: && GET_MODE_SIZE (imode) <= UNITS_PER_WORD 4598: && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), 4599: imode)) != 0) 4600: { 4601: for (elt = elt->first_same_value; 4602: elt; elt = elt->next_same_value) 4603: if (GET_CODE (elt->exp) == SUBREG 4604: && GET_MODE (SUBREG_REG (elt->exp)) == mode 4605: && exp_equiv_p (elt->exp, elt->exp, 1, 0)) 4606: return copy_rtx (SUBREG_REG (elt->exp)); 4607: } 4608: 4609: return x; 4610: } 1.1.1.3 root 4611: 1.1 root 4612: /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. 4613: We might be able to if the SUBREG is extracting a single word in an 4614: integral mode or extracting the low part. */ 4615: 4616: folded_arg0 = fold_rtx (SUBREG_REG (x), insn); 4617: const_arg0 = equiv_constant (folded_arg0); 4618: if (const_arg0) 4619: folded_arg0 = const_arg0; 4620: 4621: if (folded_arg0 != SUBREG_REG (x)) 4622: { 4623: new = 0; 4624: 4625: if (GET_MODE_CLASS (mode) == MODE_INT 4626: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 4627: && GET_MODE (SUBREG_REG (x)) != VOIDmode) 4628: new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, 4629: GET_MODE (SUBREG_REG (x))); 4630: if (new == 0 && subreg_lowpart_p (x)) 4631: new = gen_lowpart_if_possible (mode, folded_arg0); 4632: if (new) 4633: return new; 4634: } 1.1.1.3 root 4635: 4636: /* If this is a narrowing SUBREG and our operand is a REG, see if 1.1.1.4 root 4637: we can find an equivalence for REG that is an arithmetic operation 1.1.1.3 root 4638: in a wider mode where both operands are paradoxical SUBREGs 4639: from objects of our result mode. In that case, we couldn't report 4640: an equivalent value for that operation, since we don't know what the 4641: extra bits will be. But we can find an equivalence for this SUBREG 4642: by folding that operation is the narrow mode. This allows us to 4643: fold arithmetic in narrow modes when the machine only supports 1.1.1.4 root 4644: word-sized arithmetic. 4645: 4646: Also look for a case where we have a SUBREG whose operand is the 4647: same as our result. If both modes are smaller than a word, we 4648: are simply interpreting a register in different modes and we 4649: can use the inner value. */ 1.1.1.3 root 4650: 4651: if (GET_CODE (folded_arg0) == REG 1.1.1.4 root 4652: && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)) 4653: && subreg_lowpart_p (x)) 1.1.1.3 root 4654: { 4655: struct table_elt *elt; 4656: 4657: /* We can use HASH here since we know that canon_hash won't be 4658: called. */ 4659: elt = lookup (folded_arg0, 4660: HASH (folded_arg0, GET_MODE (folded_arg0)), 4661: GET_MODE (folded_arg0)); 4662: 4663: if (elt) 4664: elt = elt->first_same_value; 4665: 4666: for (; elt; elt = elt->next_same_value) 4667: { 1.1.1.4 root 4668: enum rtx_code eltcode = GET_CODE (elt->exp); 4669: 1.1.1.3 root 4670: /* Just check for unary and binary operations. */ 4671: if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' 4672: && GET_CODE (elt->exp) != SIGN_EXTEND 4673: && GET_CODE (elt->exp) != ZERO_EXTEND 4674: && GET_CODE (XEXP (elt->exp, 0)) == SUBREG 4675: && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) 4676: { 4677: rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); 4678: 4679: if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) 1.1.1.4 root 4680: op0 = fold_rtx (op0, NULL_RTX); 1.1.1.3 root 4681: 4682: op0 = equiv_constant (op0); 4683: if (op0) 4684: new = simplify_unary_operation (GET_CODE (elt->exp), mode, 4685: op0, mode); 4686: } 4687: else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' 4688: || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') 1.1.1.4 root 4689: && eltcode != DIV && eltcode != MOD 4690: && eltcode != UDIV && eltcode != UMOD 4691: && eltcode != ASHIFTRT && eltcode != LSHIFTRT 4692: && eltcode != ROTATE && eltcode != ROTATERT 1.1.1.3 root 4693: && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG 4694: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) 4695: == mode)) 4696: || CONSTANT_P (XEXP (elt->exp, 0))) 4697: && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG 4698: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) 4699: == mode)) 4700: || CONSTANT_P (XEXP (elt->exp, 1)))) 4701: { 4702: rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); 4703: rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); 4704: 4705: if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) 1.1.1.4 root 4706: op0 = fold_rtx (op0, NULL_RTX); 1.1.1.3 root 4707: 4708: if (op0) 4709: op0 = equiv_constant (op0); 4710: 4711: if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) 1.1.1.4 root 4712: op1 = fold_rtx (op1, NULL_RTX); 1.1.1.3 root 4713: 4714: if (op1) 4715: op1 = equiv_constant (op1); 4716: 4717: if (op0 && op1) 4718: new = simplify_binary_operation (GET_CODE (elt->exp), mode, 4719: op0, op1); 4720: } 4721: 1.1.1.4 root 4722: else if (GET_CODE (elt->exp) == SUBREG 4723: && GET_MODE (SUBREG_REG (elt->exp)) == mode 4724: && (GET_MODE_SIZE (GET_MODE (folded_arg0)) 4725: <= UNITS_PER_WORD) 4726: && exp_equiv_p (elt->exp, elt->exp, 1, 0)) 4727: new = copy_rtx (SUBREG_REG (elt->exp)); 4728: 1.1.1.3 root 4729: if (new) 4730: return new; 4731: } 4732: } 4733: 1.1 root 4734: return x; 4735: 4736: case NOT: 4737: case NEG: 4738: /* If we have (NOT Y), see if Y is known to be (NOT Z). 4739: If so, (NOT Y) simplifies to Z. Similarly for NEG. */ 4740: new = lookup_as_function (XEXP (x, 0), code); 4741: if (new) 4742: return fold_rtx (copy_rtx (XEXP (new, 0)), insn); 4743: break; 1.1.1.4 root 4744: 1.1 root 4745: case MEM: 4746: /* If we are not actually processing an insn, don't try to find the 4747: best address. Not only don't we care, but we could modify the 4748: MEM in an invalid way since we have no insn to validate against. */ 4749: if (insn != 0) 4750: find_best_addr (insn, &XEXP (x, 0)); 4751: 4752: { 4753: /* Even if we don't fold in the insn itself, 4754: we can safely do so here, in hopes of getting a constant. */ 1.1.1.4 root 4755: rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); 1.1 root 4756: rtx base = 0; 1.1.1.4 root 4757: HOST_WIDE_INT offset = 0; 1.1 root 4758: 4759: if (GET_CODE (addr) == REG 4760: && REGNO_QTY_VALID_P (REGNO (addr)) 4761: && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]] 4762: && qty_const[reg_qty[REGNO (addr)]] != 0) 4763: addr = qty_const[reg_qty[REGNO (addr)]]; 4764: 4765: /* If address is constant, split it into a base and integer offset. */ 4766: if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) 4767: base = addr; 4768: else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS 4769: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) 4770: { 4771: base = XEXP (XEXP (addr, 0), 0); 4772: offset = INTVAL (XEXP (XEXP (addr, 0), 1)); 4773: } 4774: else if (GET_CODE (addr) == LO_SUM 4775: && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) 4776: base = XEXP (addr, 1); 4777: 4778: /* If this is a constant pool reference, we can fold it into its 4779: constant to allow better value tracking. */ 4780: if (base && GET_CODE (base) == SYMBOL_REF 4781: && CONSTANT_POOL_ADDRESS_P (base)) 4782: { 4783: rtx constant = get_pool_constant (base); 4784: enum machine_mode const_mode = get_pool_mode (base); 4785: rtx new; 4786: 4787: if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) 4788: constant_pool_entries_cost = COST (constant); 4789: 4790: /* If we are loading the full constant, we have an equivalence. */ 4791: if (offset == 0 && mode == const_mode) 4792: return constant; 4793: 4794: /* If this actually isn't a constant (wierd!), we can't do 4795: anything. Otherwise, handle the two most common cases: 4796: extracting a word from a multi-word constant, and extracting 4797: the low-order bits. Other cases don't seem common enough to 4798: worry about. */ 4799: if (! CONSTANT_P (constant)) 4800: return x; 4801: 4802: if (GET_MODE_CLASS (mode) == MODE_INT 4803: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 4804: && offset % UNITS_PER_WORD == 0 4805: && (new = operand_subword (constant, 4806: offset / UNITS_PER_WORD, 4807: 0, const_mode)) != 0) 4808: return new; 4809: 4810: if (((BYTES_BIG_ENDIAN 4811: && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) 4812: || (! BYTES_BIG_ENDIAN && offset == 0)) 4813: && (new = gen_lowpart_if_possible (mode, constant)) != 0) 4814: return new; 4815: } 4816: 4817: /* If this is a reference to a label at a known position in a jump 4818: table, we also know its value. */ 4819: if (base && GET_CODE (base) == LABEL_REF) 4820: { 4821: rtx label = XEXP (base, 0); 4822: rtx table_insn = NEXT_INSN (label); 4823: 4824: if (table_insn && GET_CODE (table_insn) == JUMP_INSN 4825: && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) 4826: { 4827: rtx table = PATTERN (table_insn); 4828: 4829: if (offset >= 0 4830: && (offset / GET_MODE_SIZE (GET_MODE (table)) 4831: < XVECLEN (table, 0))) 4832: return XVECEXP (table, 0, 4833: offset / GET_MODE_SIZE (GET_MODE (table))); 4834: } 4835: if (table_insn && GET_CODE (table_insn) == JUMP_INSN 4836: && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) 4837: { 4838: rtx table = PATTERN (table_insn); 4839: 4840: if (offset >= 0 4841: && (offset / GET_MODE_SIZE (GET_MODE (table)) 4842: < XVECLEN (table, 1))) 4843: { 4844: offset /= GET_MODE_SIZE (GET_MODE (table)); 4845: new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset), 4846: XEXP (table, 0)); 4847: 4848: if (GET_MODE (table) != Pmode) 4849: new = gen_rtx (TRUNCATE, GET_MODE (table), new); 4850: 4851: return new; 4852: } 4853: } 4854: } 4855: 4856: return x; 4857: } 4858: } 4859: 4860: const_arg0 = 0; 4861: const_arg1 = 0; 4862: const_arg2 = 0; 4863: mode_arg0 = VOIDmode; 4864: 4865: /* Try folding our operands. 4866: Then see which ones have constant values known. */ 4867: 4868: fmt = GET_RTX_FORMAT (code); 4869: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4870: if (fmt[i] == 'e') 4871: { 4872: rtx arg = XEXP (x, i); 4873: rtx folded_arg = arg, const_arg = 0; 4874: enum machine_mode mode_arg = GET_MODE (arg); 4875: rtx cheap_arg, expensive_arg; 4876: rtx replacements[2]; 4877: int j; 4878: 4879: /* Most arguments are cheap, so handle them specially. */ 4880: switch (GET_CODE (arg)) 4881: { 4882: case REG: 4883: /* This is the same as calling equiv_constant; it is duplicated 4884: here for speed. */ 4885: if (REGNO_QTY_VALID_P (REGNO (arg)) 4886: && qty_const[reg_qty[REGNO (arg)]] != 0 4887: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG 4888: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS) 4889: const_arg 4890: = gen_lowpart_if_possible (GET_MODE (arg), 4891: qty_const[reg_qty[REGNO (arg)]]); 4892: break; 4893: 4894: case CONST: 4895: case CONST_INT: 4896: case SYMBOL_REF: 4897: case LABEL_REF: 4898: case CONST_DOUBLE: 4899: const_arg = arg; 4900: break; 4901: 4902: #ifdef HAVE_cc0 4903: case CC0: 4904: folded_arg = prev_insn_cc0; 4905: mode_arg = prev_insn_cc0_mode; 4906: const_arg = equiv_constant (folded_arg); 4907: break; 4908: #endif 4909: 4910: default: 4911: folded_arg = fold_rtx (arg, insn); 4912: const_arg = equiv_constant (folded_arg); 4913: } 4914: 4915: /* For the first three operands, see if the operand 4916: is constant or equivalent to a constant. */ 4917: switch (i) 4918: { 4919: case 0: 4920: folded_arg0 = folded_arg; 4921: const_arg0 = const_arg; 4922: mode_arg0 = mode_arg; 4923: break; 4924: case 1: 4925: folded_arg1 = folded_arg; 4926: const_arg1 = const_arg; 4927: break; 4928: case 2: 4929: const_arg2 = const_arg; 4930: break; 4931: } 4932: 4933: /* Pick the least expensive of the folded argument and an 4934: equivalent constant argument. */ 4935: if (const_arg == 0 || const_arg == folded_arg 4936: || COST (const_arg) > COST (folded_arg)) 4937: cheap_arg = folded_arg, expensive_arg = const_arg; 4938: else 4939: cheap_arg = const_arg, expensive_arg = folded_arg; 4940: 4941: /* Try to replace the operand with the cheapest of the two 4942: possibilities. If it doesn't work and this is either of the first 4943: two operands of a commutative operation, try swapping them. 4944: If THAT fails, try the more expensive, provided it is cheaper 4945: than what is already there. */ 4946: 4947: if (cheap_arg == XEXP (x, i)) 4948: continue; 4949: 4950: if (insn == 0 && ! copied) 4951: { 4952: x = copy_rtx (x); 4953: copied = 1; 4954: } 4955: 4956: replacements[0] = cheap_arg, replacements[1] = expensive_arg; 4957: for (j = 0; 4958: j < 2 && replacements[j] 4959: && COST (replacements[j]) < COST (XEXP (x, i)); 4960: j++) 4961: { 4962: if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) 4963: break; 4964: 4965: if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') 4966: { 4967: validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); 4968: validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); 4969: 4970: if (apply_change_group ()) 4971: { 4972: /* Swap them back to be invalid so that this loop can 4973: continue and flag them to be swapped back later. */ 4974: rtx tem; 4975: 4976: tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); 4977: XEXP (x, 1) = tem; 4978: must_swap = 1; 4979: break; 4980: } 4981: } 4982: } 4983: } 4984: 4985: else if (fmt[i] == 'E') 4986: /* Don't try to fold inside of a vector of expressions. 4987: Doing nothing is harmless. */ 4988: ; 4989: 4990: /* If a commutative operation, place a constant integer as the second 4991: operand unless the first operand is also a constant integer. Otherwise, 4992: place any constant second unless the first operand is also a constant. */ 4993: 4994: if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') 4995: { 4996: if (must_swap || (const_arg0 4997: && (const_arg1 == 0 4998: || (GET_CODE (const_arg0) == CONST_INT 4999: && GET_CODE (const_arg1) != CONST_INT)))) 5000: { 5001: register rtx tem = XEXP (x, 0); 5002: 5003: if (insn == 0 && ! copied) 5004: { 5005: x = copy_rtx (x); 5006: copied = 1; 5007: } 5008: 5009: validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); 5010: validate_change (insn, &XEXP (x, 1), tem, 1); 5011: if (apply_change_group ()) 5012: { 5013: tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; 5014: tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; 5015: } 5016: } 5017: } 5018: 5019: /* If X is an arithmetic operation, see if we can simplify it. */ 5020: 5021: switch (GET_RTX_CLASS (code)) 5022: { 5023: case '1': 1.1.1.3 root 5024: /* We can't simplify extension ops unless we know the original mode. */ 5025: if ((code == ZERO_EXTEND || code == SIGN_EXTEND) 5026: && mode_arg0 == VOIDmode) 5027: break; 1.1 root 5028: new = simplify_unary_operation (code, mode, 5029: const_arg0 ? const_arg0 : folded_arg0, 5030: mode_arg0); 5031: break; 5032: 5033: case '<': 5034: /* See what items are actually being compared and set FOLDED_ARG[01] 5035: to those values and CODE to the actual comparison code. If any are 5036: constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't 5037: do anything if both operands are already known to be constant. */ 5038: 5039: if (const_arg0 == 0 || const_arg1 == 0) 5040: { 5041: struct table_elt *p0, *p1; 1.1.1.4 root 5042: rtx true = const_true_rtx, false = const0_rtx; 5043: enum machine_mode mode_arg1; 5044: 5045: #ifdef FLOAT_STORE_FLAG_VALUE 5046: if (GET_MODE_CLASS (mode) == MODE_FLOAT) 5047: { 5048: true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode); 5049: false = CONST0_RTX (mode); 5050: } 5051: #endif 1.1 root 5052: 1.1.1.4 root 5053: code = find_comparison_args (code, &folded_arg0, &folded_arg1, 5054: &mode_arg0, &mode_arg1); 1.1 root 5055: const_arg0 = equiv_constant (folded_arg0); 5056: const_arg1 = equiv_constant (folded_arg1); 5057: 1.1.1.4 root 5058: /* If the mode is VOIDmode or a MODE_CC mode, we don't know 5059: what kinds of things are being compared, so we can't do 5060: anything with this comparison. */ 1.1 root 5061: 5062: if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) 5063: break; 5064: 5065: /* If we do not now have two constants being compared, see if we 5066: can nevertheless deduce some things about the comparison. */ 5067: if (const_arg0 == 0 || const_arg1 == 0) 5068: { 5069: /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit 5070: constant? These aren't zero, but we don't know their sign. */ 5071: if (const_arg1 == const0_rtx 5072: && (NONZERO_BASE_PLUS_P (folded_arg0) 5073: #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address 5074: come out as 0. */ 5075: || GET_CODE (folded_arg0) == SYMBOL_REF 5076: #endif 5077: || GET_CODE (folded_arg0) == LABEL_REF 5078: || GET_CODE (folded_arg0) == CONST)) 5079: { 5080: if (code == EQ) 1.1.1.4 root 5081: return false; 1.1 root 5082: else if (code == NE) 1.1.1.4 root 5083: return true; 1.1 root 5084: } 5085: 5086: /* See if the two operands are the same. We don't do this 5087: for IEEE floating-point since we can't assume x == x 5088: since x might be a NaN. */ 5089: 5090: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 5091: || GET_MODE_CLASS (mode_arg0) != MODE_FLOAT) 5092: && (folded_arg0 == folded_arg1 5093: || (GET_CODE (folded_arg0) == REG 5094: && GET_CODE (folded_arg1) == REG 5095: && (reg_qty[REGNO (folded_arg0)] 5096: == reg_qty[REGNO (folded_arg1)])) 5097: || ((p0 = lookup (folded_arg0, 5098: (safe_hash (folded_arg0, mode_arg0) 5099: % NBUCKETS), mode_arg0)) 5100: && (p1 = lookup (folded_arg1, 5101: (safe_hash (folded_arg1, mode_arg0) 5102: % NBUCKETS), mode_arg0)) 5103: && p0->first_same_value == p1->first_same_value))) 5104: return ((code == EQ || code == LE || code == GE 5105: || code == LEU || code == GEU) 1.1.1.4 root 5106: ? true : false); 1.1 root 5107: 5108: /* If FOLDED_ARG0 is a register, see if the comparison we are 5109: doing now is either the same as we did before or the reverse 5110: (we only check the reverse if not floating-point). */ 5111: else if (GET_CODE (folded_arg0) == REG) 5112: { 5113: int qty = reg_qty[REGNO (folded_arg0)]; 5114: 5115: if (REGNO_QTY_VALID_P (REGNO (folded_arg0)) 5116: && (comparison_dominates_p (qty_comparison_code[qty], code) 5117: || (comparison_dominates_p (qty_comparison_code[qty], 5118: reverse_condition (code)) 5119: && GET_MODE_CLASS (mode_arg0) == MODE_INT)) 5120: && (rtx_equal_p (qty_comparison_const[qty], folded_arg1) 5121: || (const_arg1 5122: && rtx_equal_p (qty_comparison_const[qty], 5123: const_arg1)) 5124: || (GET_CODE (folded_arg1) == REG 5125: && (reg_qty[REGNO (folded_arg1)] 5126: == qty_comparison_qty[qty])))) 5127: return (comparison_dominates_p (qty_comparison_code[qty], 5128: code) 1.1.1.4 root 5129: ? true : false); 1.1 root 5130: } 5131: } 5132: } 5133: 5134: /* If we are comparing against zero, see if the first operand is 5135: equivalent to an IOR with a constant. If so, we may be able to 5136: determine the result of this comparison. */ 5137: 5138: if (const_arg1 == const0_rtx) 5139: { 5140: rtx y = lookup_as_function (folded_arg0, IOR); 5141: rtx inner_const; 5142: 5143: if (y != 0 5144: && (inner_const = equiv_constant (XEXP (y, 1))) != 0 5145: && GET_CODE (inner_const) == CONST_INT 5146: && INTVAL (inner_const) != 0) 5147: { 5148: int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; 1.1.1.4 root 5149: int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum 5150: && (INTVAL (inner_const) 5151: & ((HOST_WIDE_INT) 1 << sign_bitnum))); 5152: rtx true = const_true_rtx, false = const0_rtx; 5153: 5154: #ifdef FLOAT_STORE_FLAG_VALUE 5155: if (GET_MODE_CLASS (mode) == MODE_FLOAT) 5156: { 5157: true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode); 5158: false = CONST0_RTX (mode); 5159: } 5160: #endif 1.1 root 5161: 5162: switch (code) 5163: { 5164: case EQ: 1.1.1.4 root 5165: return false; 1.1 root 5166: case NE: 1.1.1.4 root 5167: return true; 1.1 root 5168: case LT: case LE: 5169: if (has_sign) 1.1.1.4 root 5170: return true; 1.1 root 5171: break; 5172: case GT: case GE: 5173: if (has_sign) 1.1.1.4 root 5174: return false; 1.1 root 5175: break; 5176: } 5177: } 5178: } 5179: 5180: new = simplify_relational_operation (code, mode_arg0, 5181: const_arg0 ? const_arg0 : folded_arg0, 5182: const_arg1 ? const_arg1 : folded_arg1); 1.1.1.4 root 5183: #ifdef FLOAT_STORE_FLAG_VALUE 5184: if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) 5185: new = ((new == const0_rtx) ? CONST0_RTX (mode) 5186: : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode)); 5187: #endif 1.1 root 5188: break; 5189: 5190: case '2': 5191: case 'c': 5192: switch (code) 5193: { 5194: case PLUS: 5195: /* If the second operand is a LABEL_REF, see if the first is a MINUS 5196: with that LABEL_REF as its second operand. If so, the result is 5197: the first operand of that MINUS. This handles switches with an 5198: ADDR_DIFF_VEC table. */ 5199: if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) 5200: { 5201: rtx y = lookup_as_function (folded_arg0, MINUS); 5202: 5203: if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF 5204: && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) 5205: return XEXP (y, 0); 5206: } 1.1.1.4 root 5207: goto from_plus; 5208: 5209: case MINUS: 5210: /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). 5211: If so, produce (PLUS Z C2-C). */ 5212: if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) 5213: { 5214: rtx y = lookup_as_function (XEXP (x, 0), PLUS); 5215: if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) 1.1.1.5 ! root 5216: return fold_rtx (plus_constant (y, -INTVAL (const_arg1)), ! 5217: NULL_RTX); 1.1.1.4 root 5218: } 1.1 root 5219: 5220: /* ... fall through ... */ 5221: 1.1.1.4 root 5222: from_plus: 1.1 root 5223: case SMIN: case SMAX: case UMIN: case UMAX: 5224: case IOR: case AND: case XOR: 5225: case MULT: case DIV: case UDIV: 5226: case ASHIFT: case LSHIFTRT: case ASHIFTRT: 5227: /* If we have (<op> <reg> <const_int>) for an associative OP and REG 5228: is known to be of similar form, we may be able to replace the 5229: operation with a combined operation. This may eliminate the 5230: intermediate operation if every use is simplified in this way. 5231: Note that the similar optimization done by combine.c only works 5232: if the intermediate operation's result has only one reference. */ 5233: 5234: if (GET_CODE (folded_arg0) == REG 5235: && const_arg1 && GET_CODE (const_arg1) == CONST_INT) 5236: { 5237: int is_shift 5238: = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); 5239: rtx y = lookup_as_function (folded_arg0, code); 5240: rtx inner_const; 5241: enum rtx_code associate_code; 5242: rtx new_const; 5243: 5244: if (y == 0 5245: || 0 == (inner_const 5246: = equiv_constant (fold_rtx (XEXP (y, 1), 0))) 5247: || GET_CODE (inner_const) != CONST_INT 5248: /* If we have compiled a statement like 5249: "if (x == (x & mask1))", and now are looking at 5250: "x & mask2", we will have a case where the first operand 5251: of Y is the same as our first operand. Unless we detect 5252: this case, an infinite loop will result. */ 5253: || XEXP (y, 0) == folded_arg0) 5254: break; 5255: 5256: /* Don't associate these operations if they are a PLUS with the 5257: same constant and it is a power of two. These might be doable 5258: with a pre- or post-increment. Similarly for two subtracts of 5259: identical powers of two with post decrement. */ 5260: 5261: if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) 5262: && (0 5263: #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT) 5264: || exact_log2 (INTVAL (const_arg1)) >= 0 5265: #endif 5266: #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT) 5267: || exact_log2 (- INTVAL (const_arg1)) >= 0 5268: #endif 5269: )) 5270: break; 5271: 5272: /* Compute the code used to compose the constants. For example, 5273: A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ 5274: 5275: associate_code 5276: = (code == MULT || code == DIV || code == UDIV ? MULT 5277: : is_shift || code == PLUS || code == MINUS ? PLUS : code); 5278: 5279: new_const = simplify_binary_operation (associate_code, mode, 5280: const_arg1, inner_const); 5281: 5282: if (new_const == 0) 5283: break; 5284: 5285: /* If we are associating shift operations, don't let this 1.1.1.5 ! root 5286: produce a shift of the size of the object or larger. ! 5287: This could occur when we follow a sign-extend by a right ! 5288: shift on a machine that does a sign-extend as a pair ! 5289: of shifts. */ 1.1 root 5290: 5291: if (is_shift && GET_CODE (new_const) == CONST_INT 1.1.1.5 ! root 5292: && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) ! 5293: { ! 5294: /* As an exception, we can turn an ASHIFTRT of this ! 5295: form into a shift of the number of bits - 1. */ ! 5296: if (code == ASHIFTRT) ! 5297: new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); ! 5298: else ! 5299: break; ! 5300: } 1.1 root 5301: 5302: y = copy_rtx (XEXP (y, 0)); 5303: 5304: /* If Y contains our first operand (the most common way this 5305: can happen is if Y is a MEM), we would do into an infinite 5306: loop if we tried to fold it. So don't in that case. */ 5307: 5308: if (! reg_mentioned_p (folded_arg0, y)) 5309: y = fold_rtx (y, insn); 5310: 1.1.1.5 ! root 5311: return cse_gen_binary (code, mode, y, new_const); 1.1 root 5312: } 5313: } 5314: 5315: new = simplify_binary_operation (code, mode, 5316: const_arg0 ? const_arg0 : folded_arg0, 5317: const_arg1 ? const_arg1 : folded_arg1); 5318: break; 5319: 1.1.1.2 root 5320: case 'o': 5321: /* (lo_sum (high X) X) is simply X. */ 5322: if (code == LO_SUM && const_arg0 != 0 5323: && GET_CODE (const_arg0) == HIGH 5324: && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) 5325: return const_arg1; 5326: break; 5327: 1.1 root 5328: case '3': 5329: case 'b': 5330: new = simplify_ternary_operation (code, mode, mode_arg0, 5331: const_arg0 ? const_arg0 : folded_arg0, 5332: const_arg1 ? const_arg1 : folded_arg1, 5333: const_arg2 ? const_arg2 : XEXP (x, 2)); 5334: break; 5335: } 5336: 5337: return new ? new : x; 5338: } 5339: 5340: /* Return a constant value currently equivalent to X. 5341: Return 0 if we don't know one. */ 5342: 5343: static rtx 5344: equiv_constant (x) 5345: rtx x; 5346: { 5347: if (GET_CODE (x) == REG 5348: && REGNO_QTY_VALID_P (REGNO (x)) 5349: && qty_const[reg_qty[REGNO (x)]]) 5350: x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]); 5351: 5352: if (x != 0 && CONSTANT_P (x)) 5353: return x; 5354: 1.1.1.3 root 5355: /* If X is a MEM, try to fold it outside the context of any insn to see if 5356: it might be equivalent to a constant. That handles the case where it 5357: is a constant-pool reference. Then try to look it up in the hash table 5358: in case it is something whose value we have seen before. */ 5359: 5360: if (GET_CODE (x) == MEM) 5361: { 5362: struct table_elt *elt; 5363: 1.1.1.4 root 5364: x = fold_rtx (x, NULL_RTX); 1.1.1.3 root 5365: if (CONSTANT_P (x)) 5366: return x; 5367: 5368: elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x)); 5369: if (elt == 0) 5370: return 0; 5371: 5372: for (elt = elt->first_same_value; elt; elt = elt->next_same_value) 5373: if (elt->is_const && CONSTANT_P (elt->exp)) 5374: return elt->exp; 5375: } 5376: 1.1 root 5377: return 0; 5378: } 5379: 5380: /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point 5381: number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the 5382: least-significant part of X. 5383: MODE specifies how big a part of X to return. 5384: 5385: If the requested operation cannot be done, 0 is returned. 5386: 5387: This is similar to gen_lowpart in emit-rtl.c. */ 5388: 5389: rtx 5390: gen_lowpart_if_possible (mode, x) 5391: enum machine_mode mode; 5392: register rtx x; 5393: { 5394: rtx result = gen_lowpart_common (mode, x); 5395: 5396: if (result) 5397: return result; 5398: else if (GET_CODE (x) == MEM) 5399: { 5400: /* This is the only other case we handle. */ 5401: register int offset = 0; 5402: rtx new; 5403: 5404: #if WORDS_BIG_ENDIAN 5405: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) 5406: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); 5407: #endif 5408: #if BYTES_BIG_ENDIAN 5409: /* Adjust the address so that the address-after-the-data 5410: is unchanged. */ 5411: offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) 5412: - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); 5413: #endif 5414: new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset)); 5415: if (! memory_address_p (mode, XEXP (new, 0))) 5416: return 0; 5417: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); 5418: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); 5419: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); 5420: return new; 5421: } 5422: else 5423: return 0; 5424: } 5425: 5426: /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" 5427: branch. It will be zero if not. 5428: 5429: In certain cases, this can cause us to add an equivalence. For example, 5430: if we are following the taken case of 5431: if (i == 2) 5432: we can add the fact that `i' and '2' are now equivalent. 5433: 5434: In any case, we can record that this comparison was passed. If the same 5435: comparison is seen later, we will know its value. */ 5436: 5437: static void 5438: record_jump_equiv (insn, taken) 5439: rtx insn; 5440: int taken; 5441: { 5442: int cond_known_true; 5443: rtx op0, op1; 1.1.1.4 root 5444: enum machine_mode mode, mode0, mode1; 1.1 root 5445: int reversed_nonequality = 0; 5446: enum rtx_code code; 5447: 5448: /* Ensure this is the right kind of insn. */ 5449: if (! condjump_p (insn) || simplejump_p (insn)) 5450: return; 5451: 5452: /* See if this jump condition is known true or false. */ 5453: if (taken) 5454: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx); 5455: else 5456: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx); 5457: 5458: /* Get the type of comparison being done and the operands being compared. 5459: If we had to reverse a non-equality condition, record that fact so we 5460: know that it isn't valid for floating-point. */ 5461: code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0)); 5462: op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn); 5463: op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn); 5464: 1.1.1.4 root 5465: code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); 1.1 root 5466: if (! cond_known_true) 5467: { 5468: reversed_nonequality = (code != EQ && code != NE); 5469: code = reverse_condition (code); 5470: } 5471: 5472: /* The mode is the mode of the non-constant. */ 1.1.1.4 root 5473: mode = mode0; 5474: if (mode1 != VOIDmode) 5475: mode = mode1; 1.1 root 5476: 5477: record_jump_cond (code, mode, op0, op1, reversed_nonequality); 5478: } 5479: 5480: /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. 5481: REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. 5482: Make any useful entries we can with that information. Called from 5483: above function and called recursively. */ 5484: 5485: static void 5486: record_jump_cond (code, mode, op0, op1, reversed_nonequality) 5487: enum rtx_code code; 5488: enum machine_mode mode; 5489: rtx op0, op1; 5490: int reversed_nonequality; 5491: { 5492: int op0_hash_code, op1_hash_code; 5493: int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct; 5494: struct table_elt *op0_elt, *op1_elt; 5495: 5496: /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, 5497: we know that they are also equal in the smaller mode (this is also 5498: true for all smaller modes whether or not there is a SUBREG, but 5499: is not worth testing for with no SUBREG. */ 5500: 1.1.1.5 ! root 5501: /* Note that GET_MODE (op0) may not equal MODE. */ 1.1 root 5502: if (code == EQ && GET_CODE (op0) == SUBREG 1.1.1.5 ! root 5503: && (GET_MODE_SIZE (GET_MODE (op0)) ! 5504: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) 1.1 root 5505: { 5506: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); 5507: rtx tem = gen_lowpart_if_possible (inner_mode, op1); 5508: 5509: record_jump_cond (code, mode, SUBREG_REG (op0), 5510: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), 5511: reversed_nonequality); 5512: } 5513: 5514: if (code == EQ && GET_CODE (op1) == SUBREG 1.1.1.5 ! root 5515: && (GET_MODE_SIZE (GET_MODE (op1)) ! 5516: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) 1.1 root 5517: { 5518: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); 5519: rtx tem = gen_lowpart_if_possible (inner_mode, op0); 5520: 5521: record_jump_cond (code, mode, SUBREG_REG (op1), 5522: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), 5523: reversed_nonequality); 5524: } 5525: 5526: /* Similarly, if this is an NE comparison, and either is a SUBREG 5527: making a smaller mode, we know the whole thing is also NE. */ 5528: 1.1.1.5 ! root 5529: /* Note that GET_MODE (op0) may not equal MODE; ! 5530: if we test MODE instead, we can get an infinite recursion ! 5531: alternating between two modes each wider than MODE. */ ! 5532: 1.1 root 5533: if (code == NE && GET_CODE (op0) == SUBREG 5534: && subreg_lowpart_p (op0) 1.1.1.5 ! root 5535: && (GET_MODE_SIZE (GET_MODE (op0)) ! 5536: < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) 1.1 root 5537: { 5538: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); 5539: rtx tem = gen_lowpart_if_possible (inner_mode, op1); 5540: 5541: record_jump_cond (code, mode, SUBREG_REG (op0), 5542: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), 5543: reversed_nonequality); 5544: } 5545: 5546: if (code == NE && GET_CODE (op1) == SUBREG 5547: && subreg_lowpart_p (op1) 1.1.1.5 ! root 5548: && (GET_MODE_SIZE (GET_MODE (op1)) ! 5549: < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) 1.1 root 5550: { 5551: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); 5552: rtx tem = gen_lowpart_if_possible (inner_mode, op0); 5553: 5554: record_jump_cond (code, mode, SUBREG_REG (op1), 5555: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), 5556: reversed_nonequality); 5557: } 5558: 5559: /* Hash both operands. */ 5560: 5561: do_not_record = 0; 5562: hash_arg_in_memory = 0; 5563: hash_arg_in_struct = 0; 5564: op0_hash_code = HASH (op0, mode); 5565: op0_in_memory = hash_arg_in_memory; 5566: op0_in_struct = hash_arg_in_struct; 5567: 5568: if (do_not_record) 5569: return; 5570: 5571: do_not_record = 0; 5572: hash_arg_in_memory = 0; 5573: hash_arg_in_struct = 0; 5574: op1_hash_code = HASH (op1, mode); 5575: op1_in_memory = hash_arg_in_memory; 5576: op1_in_struct = hash_arg_in_struct; 5577: 5578: if (do_not_record) 5579: return; 5580: 5581: /* Look up both operands. */ 5582: op0_elt = lookup (op0, op0_hash_code, mode); 5583: op1_elt = lookup (op1, op1_hash_code, mode); 5584: 5585: /* If we aren't setting two things equal all we can do is save this 1.1.1.4 root 5586: comparison. Similarly if this is floating-point. In the latter 5587: case, OP1 might be zero and both -0.0 and 0.0 are equal to it. 5588: If we record the equality, we might inadvertently delete code 5589: whose intent was to change -0 to +0. */ 5590: 5591: if (code != EQ || GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) 1.1 root 5592: { 5593: /* If we reversed a floating-point comparison, if OP0 is not a 5594: register, or if OP1 is neither a register or constant, we can't 5595: do anything. */ 5596: 5597: if (GET_CODE (op1) != REG) 5598: op1 = equiv_constant (op1); 5599: 5600: if ((reversed_nonequality && GET_MODE_CLASS (mode) != MODE_INT) 5601: || GET_CODE (op0) != REG || op1 == 0) 5602: return; 5603: 5604: /* Put OP0 in the hash table if it isn't already. This gives it a 5605: new quantity number. */ 5606: if (op0_elt == 0) 5607: { 1.1.1.4 root 5608: if (insert_regs (op0, NULL_PTR, 0)) 1.1 root 5609: { 5610: rehash_using_reg (op0); 5611: op0_hash_code = HASH (op0, mode); 5612: } 5613: 1.1.1.4 root 5614: op0_elt = insert (op0, NULL_PTR, op0_hash_code, mode); 1.1 root 5615: op0_elt->in_memory = op0_in_memory; 5616: op0_elt->in_struct = op0_in_struct; 5617: } 5618: 5619: qty_comparison_code[reg_qty[REGNO (op0)]] = code; 5620: if (GET_CODE (op1) == REG) 5621: { 1.1.1.5 ! root 5622: /* Look it up again--in case op0 and op1 are the same. */ ! 5623: op1_elt = lookup (op1, op1_hash_code, mode); ! 5624: 1.1 root 5625: /* Put OP1 in the hash table so it gets a new quantity number. */ 5626: if (op1_elt == 0) 5627: { 1.1.1.4 root 5628: if (insert_regs (op1, NULL_PTR, 0)) 1.1 root 5629: { 5630: rehash_using_reg (op1); 5631: op1_hash_code = HASH (op1, mode); 5632: } 5633: 1.1.1.4 root 5634: op1_elt = insert (op1, NULL_PTR, op1_hash_code, mode); 1.1 root 5635: op1_elt->in_memory = op1_in_memory; 5636: op1_elt->in_struct = op1_in_struct; 5637: } 5638: 5639: qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)]; 5640: qty_comparison_const[reg_qty[REGNO (op0)]] = 0; 5641: } 5642: else 5643: { 5644: qty_comparison_qty[reg_qty[REGNO (op0)]] = -1; 5645: qty_comparison_const[reg_qty[REGNO (op0)]] = op1; 5646: } 5647: 5648: return; 5649: } 5650: 5651: /* If both are equivalent, merge the two classes. Save this class for 5652: `cse_set_around_loop'. */ 5653: if (op0_elt && op1_elt) 5654: { 5655: merge_equiv_classes (op0_elt, op1_elt); 5656: last_jump_equiv_class = op0_elt; 5657: } 5658: 5659: /* For whichever side doesn't have an equivalence, make one. */ 5660: if (op0_elt == 0) 5661: { 5662: if (insert_regs (op0, op1_elt, 0)) 5663: { 5664: rehash_using_reg (op0); 5665: op0_hash_code = HASH (op0, mode); 5666: } 5667: 5668: op0_elt = insert (op0, op1_elt, op0_hash_code, mode); 5669: op0_elt->in_memory = op0_in_memory; 5670: op0_elt->in_struct = op0_in_struct; 5671: last_jump_equiv_class = op0_elt; 5672: } 5673: 5674: if (op1_elt == 0) 5675: { 5676: if (insert_regs (op1, op0_elt, 0)) 5677: { 5678: rehash_using_reg (op1); 5679: op1_hash_code = HASH (op1, mode); 5680: } 5681: 5682: op1_elt = insert (op1, op0_elt, op1_hash_code, mode); 5683: op1_elt->in_memory = op1_in_memory; 5684: op1_elt->in_struct = op1_in_struct; 5685: last_jump_equiv_class = op1_elt; 5686: } 5687: } 5688: 5689: /* CSE processing for one instruction. 5690: First simplify sources and addresses of all assignments 5691: in the instruction, using previously-computed equivalents values. 5692: Then install the new sources and destinations in the table 5693: of available values. 5694: 5695: If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in 5696: the insn. */ 5697: 5698: /* Data on one SET contained in the instruction. */ 5699: 5700: struct set 5701: { 5702: /* The SET rtx itself. */ 5703: rtx rtl; 5704: /* The SET_SRC of the rtx (the original value, if it is changing). */ 5705: rtx src; 5706: /* The hash-table element for the SET_SRC of the SET. */ 5707: struct table_elt *src_elt; 5708: /* Hash code for the SET_SRC. */ 5709: int src_hash_code; 5710: /* Hash code for the SET_DEST. */ 5711: int dest_hash_code; 5712: /* The SET_DEST, with SUBREG, etc., stripped. */ 5713: rtx inner_dest; 5714: /* Place where the pointer to the INNER_DEST was found. */ 5715: rtx *inner_dest_loc; 5716: /* Nonzero if the SET_SRC is in memory. */ 5717: char src_in_memory; 5718: /* Nonzero if the SET_SRC is in a structure. */ 5719: char src_in_struct; 5720: /* Nonzero if the SET_SRC contains something 5721: whose value cannot be predicted and understood. */ 5722: char src_volatile; 5723: /* Original machine mode, in case it becomes a CONST_INT. */ 5724: enum machine_mode mode; 5725: /* A constant equivalent for SET_SRC, if any. */ 5726: rtx src_const; 5727: /* Hash code of constant equivalent for SET_SRC. */ 5728: int src_const_hash_code; 5729: /* Table entry for constant equivalent for SET_SRC, if any. */ 5730: struct table_elt *src_const_elt; 5731: }; 5732: 5733: static void 5734: cse_insn (insn, in_libcall_block) 5735: rtx insn; 5736: int in_libcall_block; 5737: { 5738: register rtx x = PATTERN (insn); 5739: rtx tem; 5740: register int i; 5741: register int n_sets = 0; 5742: 5743: /* Records what this insn does to set CC0. */ 5744: rtx this_insn_cc0 = 0; 5745: enum machine_mode this_insn_cc0_mode; 5746: struct write_data writes_memory; 5747: static struct write_data init = {0, 0, 0, 0}; 5748: 5749: rtx src_eqv = 0; 5750: struct table_elt *src_eqv_elt = 0; 5751: int src_eqv_volatile; 5752: int src_eqv_in_memory; 5753: int src_eqv_in_struct; 5754: int src_eqv_hash_code; 5755: 5756: struct set *sets; 5757: 5758: this_insn = insn; 5759: writes_memory = init; 5760: 5761: /* Find all the SETs and CLOBBERs in this instruction. 5762: Record all the SETs in the array `set' and count them. 5763: Also determine whether there is a CLOBBER that invalidates 5764: all memory references, or all references at varying addresses. */ 5765: 5766: if (GET_CODE (x) == SET) 5767: { 5768: sets = (struct set *) alloca (sizeof (struct set)); 5769: sets[0].rtl = x; 5770: 5771: /* Ignore SETs that are unconditional jumps. 5772: They never need cse processing, so this does not hurt. 5773: The reason is not efficiency but rather 5774: so that we can test at the end for instructions 5775: that have been simplified to unconditional jumps 5776: and not be misled by unchanged instructions 5777: that were unconditional jumps to begin with. */ 5778: if (SET_DEST (x) == pc_rtx 5779: && GET_CODE (SET_SRC (x)) == LABEL_REF) 5780: ; 5781: 5782: /* Don't count call-insns, (set (reg 0) (call ...)), as a set. 5783: The hard function value register is used only once, to copy to 5784: someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! 5785: Ensure we invalidate the destination register. On the 80386 no 1.1.1.4 root 5786: other code would invalidate it since it is a fixed_reg. 5787: We need not check the return of apply_change_group; see canon_reg. */ 1.1 root 5788: 5789: else if (GET_CODE (SET_SRC (x)) == CALL) 5790: { 5791: canon_reg (SET_SRC (x), insn); 1.1.1.4 root 5792: apply_change_group (); 1.1 root 5793: fold_rtx (SET_SRC (x), insn); 5794: invalidate (SET_DEST (x)); 5795: } 5796: else 5797: n_sets = 1; 5798: } 5799: else if (GET_CODE (x) == PARALLEL) 5800: { 5801: register int lim = XVECLEN (x, 0); 5802: 5803: sets = (struct set *) alloca (lim * sizeof (struct set)); 5804: 5805: /* Find all regs explicitly clobbered in this insn, 5806: and ensure they are not replaced with any other regs 5807: elsewhere in this insn. 5808: When a reg that is clobbered is also used for input, 5809: we should presume that that is for a reason, 5810: and we should not substitute some other register 5811: which is not supposed to be clobbered. 5812: Therefore, this loop cannot be merged into the one below 1.1.1.3 root 5813: because a CALL may precede a CLOBBER and refer to the 1.1 root 5814: value clobbered. We must not let a canonicalization do 5815: anything in that case. */ 5816: for (i = 0; i < lim; i++) 5817: { 5818: register rtx y = XVECEXP (x, 0, i); 1.1.1.3 root 5819: if (GET_CODE (y) == CLOBBER 5820: && (GET_CODE (XEXP (y, 0)) == REG 5821: || GET_CODE (XEXP (y, 0)) == SUBREG)) 1.1 root 5822: invalidate (XEXP (y, 0)); 5823: } 5824: 5825: for (i = 0; i < lim; i++) 5826: { 5827: register rtx y = XVECEXP (x, 0, i); 5828: if (GET_CODE (y) == SET) 5829: { 1.1.1.4 root 5830: /* As above, we ignore unconditional jumps and call-insns and 5831: ignore the result of apply_change_group. */ 1.1 root 5832: if (GET_CODE (SET_SRC (y)) == CALL) 5833: { 5834: canon_reg (SET_SRC (y), insn); 1.1.1.4 root 5835: apply_change_group (); 1.1 root 5836: fold_rtx (SET_SRC (y), insn); 5837: invalidate (SET_DEST (y)); 5838: } 5839: else if (SET_DEST (y) == pc_rtx 5840: && GET_CODE (SET_SRC (y)) == LABEL_REF) 5841: ; 5842: else 5843: sets[n_sets++].rtl = y; 5844: } 5845: else if (GET_CODE (y) == CLOBBER) 5846: { 5847: /* If we clobber memory, take note of that, 5848: and canon the address. 5849: This does nothing when a register is clobbered 5850: because we have already invalidated the reg. */ 5851: if (GET_CODE (XEXP (y, 0)) == MEM) 5852: { 1.1.1.4 root 5853: canon_reg (XEXP (y, 0), NULL_RTX); 1.1 root 5854: note_mem_written (XEXP (y, 0), &writes_memory); 5855: } 5856: } 5857: else if (GET_CODE (y) == USE 5858: && ! (GET_CODE (XEXP (y, 0)) == REG 5859: && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) 1.1.1.4 root 5860: canon_reg (y, NULL_RTX); 1.1 root 5861: else if (GET_CODE (y) == CALL) 5862: { 1.1.1.4 root 5863: /* The result of apply_change_group can be ignored; see 5864: canon_reg. */ 1.1 root 5865: canon_reg (y, insn); 1.1.1.4 root 5866: apply_change_group (); 1.1 root 5867: fold_rtx (y, insn); 5868: } 5869: } 5870: } 5871: else if (GET_CODE (x) == CLOBBER) 5872: { 5873: if (GET_CODE (XEXP (x, 0)) == MEM) 5874: { 1.1.1.4 root 5875: canon_reg (XEXP (x, 0), NULL_RTX); 1.1 root 5876: note_mem_written (XEXP (x, 0), &writes_memory); 5877: } 5878: } 5879: 5880: /* Canonicalize a USE of a pseudo register or memory location. */ 5881: else if (GET_CODE (x) == USE 5882: && ! (GET_CODE (XEXP (x, 0)) == REG 5883: && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) 1.1.1.4 root 5884: canon_reg (XEXP (x, 0), NULL_RTX); 1.1 root 5885: else if (GET_CODE (x) == CALL) 5886: { 1.1.1.4 root 5887: /* The result of apply_change_group can be ignored; see canon_reg. */ 1.1 root 5888: canon_reg (x, insn); 1.1.1.4 root 5889: apply_change_group (); 1.1 root 5890: fold_rtx (x, insn); 5891: } 5892: 5893: if (n_sets == 1 && REG_NOTES (insn) != 0) 5894: { 5895: /* Store the equivalent value in SRC_EQV, if different. */ 1.1.1.4 root 5896: rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); 1.1 root 5897: 5898: if (tem && ! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))) 1.1.1.4 root 5899: src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); 1.1 root 5900: } 5901: 5902: /* Canonicalize sources and addresses of destinations. 5903: We do this in a separate pass to avoid problems when a MATCH_DUP is 5904: present in the insn pattern. In that case, we want to ensure that 5905: we don't break the duplicate nature of the pattern. So we will replace 5906: both operands at the same time. Otherwise, we would fail to find an 5907: equivalent substitution in the loop calling validate_change below. 5908: 5909: We used to suppress canonicalization of DEST if it appears in SRC, 1.1.1.4 root 5910: but we don't do this any more. */ 1.1 root 5911: 5912: for (i = 0; i < n_sets; i++) 5913: { 5914: rtx dest = SET_DEST (sets[i].rtl); 5915: rtx src = SET_SRC (sets[i].rtl); 5916: rtx new = canon_reg (src, insn); 5917: 1.1.1.4 root 5918: if ((GET_CODE (new) == REG && GET_CODE (src) == REG 5919: && ((REGNO (new) < FIRST_PSEUDO_REGISTER) 5920: != (REGNO (src) < FIRST_PSEUDO_REGISTER))) 5921: || insn_n_dups[recog_memoized (insn)] > 0) 5922: validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); 1.1 root 5923: else 5924: SET_SRC (sets[i].rtl) = new; 5925: 5926: if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) 5927: { 5928: validate_change (insn, &XEXP (dest, 1), 1.1.1.4 root 5929: canon_reg (XEXP (dest, 1), insn), 1); 1.1 root 5930: validate_change (insn, &XEXP (dest, 2), 1.1.1.4 root 5931: canon_reg (XEXP (dest, 2), insn), 1); 1.1 root 5932: } 5933: 5934: while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART 5935: || GET_CODE (dest) == ZERO_EXTRACT 5936: || GET_CODE (dest) == SIGN_EXTRACT) 5937: dest = XEXP (dest, 0); 5938: 5939: if (GET_CODE (dest) == MEM) 5940: canon_reg (dest, insn); 5941: } 5942: 1.1.1.4 root 5943: /* Now that we have done all the replacements, we can apply the change 5944: group and see if they all work. Note that this will cause some 5945: canonicalizations that would have worked individually not to be applied 5946: because some other canonicalization didn't work, but this should not 5947: occur often. 5948: 5949: The result of apply_change_group can be ignored; see canon_reg. */ 5950: 5951: apply_change_group (); 5952: 1.1 root 5953: /* Set sets[i].src_elt to the class each source belongs to. 5954: Detect assignments from or to volatile things 5955: and set set[i] to zero so they will be ignored 5956: in the rest of this function. 5957: 5958: Nothing in this loop changes the hash table or the register chains. */ 5959: 5960: for (i = 0; i < n_sets; i++) 5961: { 5962: register rtx src, dest; 5963: register rtx src_folded; 5964: register struct table_elt *elt = 0, *p; 5965: enum machine_mode mode; 5966: rtx src_eqv_here; 5967: rtx src_const = 0; 5968: rtx src_related = 0; 5969: struct table_elt *src_const_elt = 0; 5970: int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000; 5971: int src_related_cost = 10000, src_elt_cost = 10000; 5972: /* Set non-zero if we need to call force_const_mem on with the 5973: contents of src_folded before using it. */ 5974: int src_folded_force_flag = 0; 5975: 5976: dest = SET_DEST (sets[i].rtl); 5977: src = SET_SRC (sets[i].rtl); 5978: 5979: /* If SRC is a constant that has no machine mode, 5980: hash it with the destination's machine mode. 5981: This way we can keep different modes separate. */ 5982: 5983: mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); 5984: sets[i].mode = mode; 5985: 5986: if (src_eqv) 5987: { 5988: enum machine_mode eqvmode = mode; 5989: if (GET_CODE (dest) == STRICT_LOW_PART) 5990: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); 5991: do_not_record = 0; 5992: hash_arg_in_memory = 0; 5993: hash_arg_in_struct = 0; 5994: src_eqv = fold_rtx (src_eqv, insn); 5995: src_eqv_hash_code = HASH (src_eqv, eqvmode); 5996: 5997: /* Find the equivalence class for the equivalent expression. */ 5998: 5999: if (!do_not_record) 6000: src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, eqvmode); 6001: 6002: src_eqv_volatile = do_not_record; 6003: src_eqv_in_memory = hash_arg_in_memory; 6004: src_eqv_in_struct = hash_arg_in_struct; 6005: } 6006: 6007: /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the 6008: value of the INNER register, not the destination. So it is not 6009: a legal substitution for the source. But save it for later. */ 6010: if (GET_CODE (dest) == STRICT_LOW_PART) 6011: src_eqv_here = 0; 6012: else 6013: src_eqv_here = src_eqv; 6014: 6015: /* Simplify and foldable subexpressions in SRC. Then get the fully- 6016: simplified result, which may not necessarily be valid. */ 6017: src_folded = fold_rtx (src, insn); 6018: 6019: /* If storing a constant in a bitfield, pre-truncate the constant 6020: so we will be able to record it later. */ 6021: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT 6022: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) 6023: { 6024: rtx width = XEXP (SET_DEST (sets[i].rtl), 1); 6025: 6026: if (GET_CODE (src) == CONST_INT 6027: && GET_CODE (width) == CONST_INT 1.1.1.4 root 6028: && INTVAL (width) < HOST_BITS_PER_WIDE_INT 6029: && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) 6030: src_folded 6031: = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 6032: << INTVAL (width)) - 1)); 1.1 root 6033: } 6034: 6035: /* Compute SRC's hash code, and also notice if it 6036: should not be recorded at all. In that case, 6037: prevent any further processing of this assignment. */ 6038: do_not_record = 0; 6039: hash_arg_in_memory = 0; 6040: hash_arg_in_struct = 0; 6041: 6042: sets[i].src = src; 6043: sets[i].src_hash_code = HASH (src, mode); 6044: sets[i].src_volatile = do_not_record; 6045: sets[i].src_in_memory = hash_arg_in_memory; 6046: sets[i].src_in_struct = hash_arg_in_struct; 6047: 1.1.1.4 root 6048: #if 0 6049: /* It is no longer clear why we used to do this, but it doesn't 6050: appear to still be needed. So let's try without it since this 6051: code hurts cse'ing widened ops. */ 1.1 root 6052: /* If source is a perverse subreg (such as QI treated as an SI), 6053: treat it as volatile. It may do the work of an SI in one context 6054: where the extra bits are not being used, but cannot replace an SI 6055: in general. */ 6056: if (GET_CODE (src) == SUBREG 6057: && (GET_MODE_SIZE (GET_MODE (src)) 6058: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) 6059: sets[i].src_volatile = 1; 1.1.1.4 root 6060: #endif 1.1 root 6061: 6062: /* Locate all possible equivalent forms for SRC. Try to replace 6063: SRC in the insn with each cheaper equivalent. 6064: 6065: We have the following types of equivalents: SRC itself, a folded 6066: version, a value given in a REG_EQUAL note, or a value related 6067: to a constant. 6068: 6069: Each of these equivalents may be part of an additional class 6070: of equivalents (if more than one is in the table, they must be in 6071: the same class; we check for this). 6072: 6073: If the source is volatile, we don't do any table lookups. 6074: 6075: We note any constant equivalent for possible later use in a 6076: REG_NOTE. */ 6077: 6078: if (!sets[i].src_volatile) 6079: elt = lookup (src, sets[i].src_hash_code, mode); 6080: 6081: sets[i].src_elt = elt; 6082: 6083: if (elt && src_eqv_here && src_eqv_elt) 6084: { 6085: if (elt->first_same_value != src_eqv_elt->first_same_value) 6086: { 6087: /* The REG_EQUAL is indicating that two formerly distinct 6088: classes are now equivalent. So merge them. */ 6089: merge_equiv_classes (elt, src_eqv_elt); 6090: src_eqv_hash_code = HASH (src_eqv, elt->mode); 6091: src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, elt->mode); 6092: } 6093: 6094: src_eqv_here = 0; 6095: } 6096: 6097: else if (src_eqv_elt) 6098: elt = src_eqv_elt; 6099: 6100: /* Try to find a constant somewhere and record it in `src_const'. 6101: Record its table element, if any, in `src_const_elt'. Look in 6102: any known equivalences first. (If the constant is not in the 6103: table, also set `sets[i].src_const_hash_code'). */ 6104: if (elt) 6105: for (p = elt->first_same_value; p; p = p->next_same_value) 6106: if (p->is_const) 6107: { 6108: src_const = p->exp; 6109: src_const_elt = elt; 6110: break; 6111: } 6112: 6113: if (src_const == 0 6114: && (CONSTANT_P (src_folded) 6115: /* Consider (minus (label_ref L1) (label_ref L2)) as 6116: "constant" here so we will record it. This allows us 6117: to fold switch statements when an ADDR_DIFF_VEC is used. */ 6118: || (GET_CODE (src_folded) == MINUS 6119: && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF 6120: && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) 6121: src_const = src_folded, src_const_elt = elt; 6122: else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) 6123: src_const = src_eqv_here, src_const_elt = src_eqv_elt; 6124: 6125: /* If we don't know if the constant is in the table, get its 6126: hash code and look it up. */ 6127: if (src_const && src_const_elt == 0) 6128: { 6129: sets[i].src_const_hash_code = HASH (src_const, mode); 6130: src_const_elt = lookup (src_const, sets[i].src_const_hash_code, 6131: mode); 6132: } 6133: 6134: sets[i].src_const = src_const; 6135: sets[i].src_const_elt = src_const_elt; 6136: 6137: /* If the constant and our source are both in the table, mark them as 6138: equivalent. Otherwise, if a constant is in the table but the source 6139: isn't, set ELT to it. */ 6140: if (src_const_elt && elt 6141: && src_const_elt->first_same_value != elt->first_same_value) 6142: merge_equiv_classes (elt, src_const_elt); 6143: else if (src_const_elt && elt == 0) 6144: elt = src_const_elt; 6145: 6146: /* See if there is a register linearly related to a constant 6147: equivalent of SRC. */ 6148: if (src_const 6149: && (GET_CODE (src_const) == CONST 6150: || (src_const_elt && src_const_elt->related_value != 0))) 6151: { 6152: src_related = use_related_value (src_const, src_const_elt); 6153: if (src_related) 6154: { 6155: struct table_elt *src_related_elt 6156: = lookup (src_related, HASH (src_related, mode), mode); 6157: if (src_related_elt && elt) 6158: { 6159: if (elt->first_same_value 6160: != src_related_elt->first_same_value) 6161: /* This can occur when we previously saw a CONST 6162: involving a SYMBOL_REF and then see the SYMBOL_REF 6163: twice. Merge the involved classes. */ 6164: merge_equiv_classes (elt, src_related_elt); 6165: 6166: src_related = 0; 6167: src_related_elt = 0; 6168: } 6169: else if (src_related_elt && elt == 0) 6170: elt = src_related_elt; 6171: } 6172: } 6173: 1.1.1.4 root 6174: /* See if we have a CONST_INT that is already in a register in a 6175: wider mode. */ 6176: 6177: if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT 6178: && GET_MODE_CLASS (mode) == MODE_INT 6179: && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) 6180: { 6181: enum machine_mode wider_mode; 6182: 6183: for (wider_mode = GET_MODE_WIDER_MODE (mode); 6184: GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD 6185: && src_related == 0; 6186: wider_mode = GET_MODE_WIDER_MODE (wider_mode)) 6187: { 6188: struct table_elt *const_elt 6189: = lookup (src_const, HASH (src_const, wider_mode), wider_mode); 6190: 6191: if (const_elt == 0) 6192: continue; 6193: 6194: for (const_elt = const_elt->first_same_value; 6195: const_elt; const_elt = const_elt->next_same_value) 6196: if (GET_CODE (const_elt->exp) == REG) 6197: { 6198: src_related = gen_lowpart_if_possible (mode, 6199: const_elt->exp); 6200: break; 6201: } 6202: } 6203: } 6204: 1.1.1.2 root 6205: /* Another possibility is that we have an AND with a constant in 6206: a mode narrower than a word. If so, it might have been generated 6207: as part of an "if" which would narrow the AND. If we already 6208: have done the AND in a wider mode, we can use a SUBREG of that 6209: value. */ 6210: 6211: if (flag_expensive_optimizations && ! src_related 6212: && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT 6213: && GET_MODE_SIZE (mode) < UNITS_PER_WORD) 6214: { 6215: enum machine_mode tmode; 1.1.1.4 root 6216: rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1)); 1.1.1.2 root 6217: 6218: for (tmode = GET_MODE_WIDER_MODE (mode); 6219: GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; 6220: tmode = GET_MODE_WIDER_MODE (tmode)) 6221: { 6222: rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); 6223: struct table_elt *larger_elt; 6224: 6225: if (inner) 6226: { 6227: PUT_MODE (new_and, tmode); 6228: XEXP (new_and, 0) = inner; 6229: larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); 6230: if (larger_elt == 0) 6231: continue; 6232: 6233: for (larger_elt = larger_elt->first_same_value; 6234: larger_elt; larger_elt = larger_elt->next_same_value) 6235: if (GET_CODE (larger_elt->exp) == REG) 6236: { 6237: src_related 6238: = gen_lowpart_if_possible (mode, larger_elt->exp); 6239: break; 6240: } 6241: 6242: if (src_related) 6243: break; 6244: } 6245: } 6246: } 6247: 1.1 root 6248: if (src == src_folded) 6249: src_folded = 0; 6250: 6251: /* At this point, ELT, if non-zero, points to a class of expressions 6252: equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, 6253: and SRC_RELATED, if non-zero, each contain additional equivalent 6254: expressions. Prune these latter expressions by deleting expressions 6255: already in the equivalence class. 6256: 6257: Check for an equivalent identical to the destination. If found, 6258: this is the preferred equivalent since it will likely lead to 6259: elimination of the insn. Indicate this by placing it in 6260: `src_related'. */ 6261: 6262: if (elt) elt = elt->first_same_value; 6263: for (p = elt; p; p = p->next_same_value) 6264: { 6265: enum rtx_code code = GET_CODE (p->exp); 6266: 6267: /* If the expression is not valid, ignore it. Then we do not 6268: have to check for validity below. In most cases, we can use 6269: `rtx_equal_p', since canonicalization has already been done. */ 6270: if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) 6271: continue; 6272: 6273: if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) 6274: src = 0; 6275: else if (src_folded && GET_CODE (src_folded) == code 6276: && rtx_equal_p (src_folded, p->exp)) 6277: src_folded = 0; 6278: else if (src_eqv_here && GET_CODE (src_eqv_here) == code 6279: && rtx_equal_p (src_eqv_here, p->exp)) 6280: src_eqv_here = 0; 6281: else if (src_related && GET_CODE (src_related) == code 6282: && rtx_equal_p (src_related, p->exp)) 6283: src_related = 0; 6284: 6285: /* This is the same as the destination of the insns, we want 6286: to prefer it. Copy it to src_related. The code below will 6287: then give it a negative cost. */ 6288: if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) 6289: src_related = dest; 6290: 6291: } 6292: 6293: /* Find the cheapest valid equivalent, trying all the available 6294: possibilities. Prefer items not in the hash table to ones 6295: that are when they are equal cost. Note that we can never 6296: worsen an insn as the current contents will also succeed. 1.1.1.3 root 6297: If we find an equivalent identical to the destination, use it as best, 1.1 root 6298: since this insn will probably be eliminated in that case. */ 6299: if (src) 6300: { 6301: if (rtx_equal_p (src, dest)) 6302: src_cost = -1; 6303: else 6304: src_cost = COST (src); 6305: } 6306: 6307: if (src_eqv_here) 6308: { 6309: if (rtx_equal_p (src_eqv_here, dest)) 6310: src_eqv_cost = -1; 6311: else 6312: src_eqv_cost = COST (src_eqv_here); 6313: } 6314: 6315: if (src_folded) 6316: { 6317: if (rtx_equal_p (src_folded, dest)) 6318: src_folded_cost = -1; 6319: else 6320: src_folded_cost = COST (src_folded); 6321: } 6322: 6323: if (src_related) 6324: { 6325: if (rtx_equal_p (src_related, dest)) 6326: src_related_cost = -1; 6327: else 6328: src_related_cost = COST (src_related); 6329: } 6330: 6331: /* If this was an indirect jump insn, a known label will really be 6332: cheaper even though it looks more expensive. */ 6333: if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) 6334: src_folded = src_const, src_folded_cost = -1; 6335: 6336: /* Terminate loop when replacement made. This must terminate since 6337: the current contents will be tested and will always be valid. */ 6338: while (1) 6339: { 6340: rtx trial; 6341: 6342: /* Skip invalid entries. */ 6343: while (elt && GET_CODE (elt->exp) != REG 6344: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) 6345: elt = elt->next_same_value; 6346: 6347: if (elt) src_elt_cost = elt->cost; 6348: 6349: /* Find cheapest and skip it for the next time. For items 6350: of equal cost, use this order: 6351: src_folded, src, src_eqv, src_related and hash table entry. */ 6352: if (src_folded_cost <= src_cost 6353: && src_folded_cost <= src_eqv_cost 6354: && src_folded_cost <= src_related_cost 6355: && src_folded_cost <= src_elt_cost) 6356: { 6357: trial = src_folded, src_folded_cost = 10000; 6358: if (src_folded_force_flag) 6359: trial = force_const_mem (mode, trial); 6360: } 6361: else if (src_cost <= src_eqv_cost 6362: && src_cost <= src_related_cost 6363: && src_cost <= src_elt_cost) 6364: trial = src, src_cost = 10000; 6365: else if (src_eqv_cost <= src_related_cost 6366: && src_eqv_cost <= src_elt_cost) 6367: trial = src_eqv_here, src_eqv_cost = 10000; 6368: else if (src_related_cost <= src_elt_cost) 6369: trial = src_related, src_related_cost = 10000; 6370: else 6371: { 1.1.1.3 root 6372: trial = copy_rtx (elt->exp); 1.1 root 6373: elt = elt->next_same_value; 6374: src_elt_cost = 10000; 6375: } 6376: 6377: /* We don't normally have an insn matching (set (pc) (pc)), so 6378: check for this separately here. We will delete such an 6379: insn below. 6380: 6381: Tablejump insns contain a USE of the table, so simply replacing 6382: the operand with the constant won't match. This is simply an 6383: unconditional branch, however, and is therefore valid. Just 6384: insert the substitution here and we will delete and re-emit 6385: the insn later. */ 6386: 6387: if (n_sets == 1 && dest == pc_rtx 6388: && (trial == pc_rtx 6389: || (GET_CODE (trial) == LABEL_REF 6390: && ! condjump_p (insn)))) 6391: { 6392: /* If TRIAL is a label in front of a jump table, we are 6393: really falling through the switch (this is how casesi 6394: insns work), so we must branch around the table. */ 6395: if (GET_CODE (trial) == CODE_LABEL 6396: && NEXT_INSN (trial) != 0 6397: && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN 6398: && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC 6399: || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC)) 6400: 6401: trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial)); 6402: 6403: SET_SRC (sets[i].rtl) = trial; 6404: break; 6405: } 6406: 6407: /* Look for a substitution that makes a valid insn. */ 6408: else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) 1.1.1.3 root 6409: { 1.1.1.4 root 6410: /* The result of apply_change_group can be ignored; see 6411: canon_reg. */ 6412: 6413: validate_change (insn, &SET_SRC (sets[i].rtl), 6414: canon_reg (SET_SRC (sets[i].rtl), insn), 6415: 1); 6416: apply_change_group (); 1.1.1.3 root 6417: break; 6418: } 1.1 root 6419: 6420: /* If we previously found constant pool entries for 6421: constants and this is a constant, try making a 6422: pool entry. Put it in src_folded unless we already have done 6423: this since that is where it likely came from. */ 6424: 6425: else if (constant_pool_entries_cost 6426: && CONSTANT_P (trial) 6427: && (src_folded == 0 || GET_CODE (src_folded) != MEM) 6428: && GET_MODE_CLASS (mode) != MODE_CC) 6429: { 6430: src_folded_force_flag = 1; 6431: src_folded = trial; 6432: src_folded_cost = constant_pool_entries_cost; 6433: } 6434: } 6435: 6436: src = SET_SRC (sets[i].rtl); 6437: 6438: /* In general, it is good to have a SET with SET_SRC == SET_DEST. 6439: However, there is an important exception: If both are registers 6440: that are not the head of their equivalence class, replace SET_SRC 6441: with the head of the class. If we do not do this, we will have 6442: both registers live over a portion of the basic block. This way, 6443: their lifetimes will likely abut instead of overlapping. */ 6444: if (GET_CODE (dest) == REG 6445: && REGNO_QTY_VALID_P (REGNO (dest)) 6446: && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest) 6447: && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest) 6448: && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) 6449: /* Don't do this if the original insn had a hard reg as 6450: SET_SRC. */ 6451: && (GET_CODE (sets[i].src) != REG 6452: || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)) 6453: /* We can't call canon_reg here because it won't do anything if 6454: SRC is a hard register. */ 6455: { 6456: int first = qty_first_reg[reg_qty[REGNO (src)]]; 6457: 6458: src = SET_SRC (sets[i].rtl) 6459: = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] 6460: : gen_rtx (REG, GET_MODE (src), first); 6461: 6462: /* If we had a constant that is cheaper than what we are now 6463: setting SRC to, use that constant. We ignored it when we 6464: thought we could make this into a no-op. */ 6465: if (src_const && COST (src_const) < COST (src) 6466: && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0)) 6467: src = src_const; 6468: } 6469: 6470: /* If we made a change, recompute SRC values. */ 6471: if (src != sets[i].src) 6472: { 6473: do_not_record = 0; 6474: hash_arg_in_memory = 0; 6475: hash_arg_in_struct = 0; 6476: sets[i].src = src; 6477: sets[i].src_hash_code = HASH (src, mode); 6478: sets[i].src_volatile = do_not_record; 6479: sets[i].src_in_memory = hash_arg_in_memory; 6480: sets[i].src_in_struct = hash_arg_in_struct; 6481: sets[i].src_elt = lookup (src, sets[i].src_hash_code, mode); 6482: } 6483: 6484: /* If this is a single SET, we are setting a register, and we have an 6485: equivalent constant, we want to add a REG_NOTE. We don't want 6486: to write a REG_EQUAL note for a constant pseudo since verifying that 1.1.1.2 root 6487: that pseudo hasn't been eliminated is a pain. Such a note also 1.1 root 6488: won't help anything. */ 6489: if (n_sets == 1 && src_const && GET_CODE (dest) == REG 6490: && GET_CODE (src_const) != REG) 6491: { 1.1.1.4 root 6492: rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); 1.1 root 6493: 6494: /* Record the actual constant value in a REG_EQUAL note, making 6495: a new one if one does not already exist. */ 6496: if (tem) 6497: XEXP (tem, 0) = src_const; 6498: else 6499: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, 6500: src_const, REG_NOTES (insn)); 6501: 6502: /* If storing a constant value in a register that 6503: previously held the constant value 0, 6504: record this fact with a REG_WAS_0 note on this insn. 6505: 6506: Note that the *register* is required to have previously held 0, 6507: not just any register in the quantity and we must point to the 6508: insn that set that register to zero. 6509: 6510: Rather than track each register individually, we just see if 6511: the last set for this quantity was for this register. */ 6512: 6513: if (REGNO_QTY_VALID_P (REGNO (dest)) 6514: && qty_const[reg_qty[REGNO (dest)]] == const0_rtx) 6515: { 6516: /* See if we previously had a REG_WAS_0 note. */ 1.1.1.4 root 6517: rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); 1.1 root 6518: rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]]; 6519: 6520: if ((tem = single_set (const_insn)) != 0 6521: && rtx_equal_p (SET_DEST (tem), dest)) 6522: { 6523: if (note) 6524: XEXP (note, 0) = const_insn; 6525: else 6526: REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0, 6527: const_insn, REG_NOTES (insn)); 6528: } 6529: } 6530: } 6531: 6532: /* Now deal with the destination. */ 6533: do_not_record = 0; 6534: sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl); 6535: 6536: /* Look within any SIGN_EXTRACT or ZERO_EXTRACT 6537: to the MEM or REG within it. */ 6538: while (GET_CODE (dest) == SIGN_EXTRACT 6539: || GET_CODE (dest) == ZERO_EXTRACT 6540: || GET_CODE (dest) == SUBREG 6541: || GET_CODE (dest) == STRICT_LOW_PART) 6542: { 6543: sets[i].inner_dest_loc = &XEXP (dest, 0); 6544: dest = XEXP (dest, 0); 6545: } 6546: 6547: sets[i].inner_dest = dest; 6548: 6549: if (GET_CODE (dest) == MEM) 6550: { 6551: dest = fold_rtx (dest, insn); 6552: 6553: /* Decide whether we invalidate everything in memory, 6554: or just things at non-fixed places. 6555: Writing a large aggregate must invalidate everything 6556: because we don't know how long it is. */ 6557: note_mem_written (dest, &writes_memory); 6558: } 6559: 6560: /* Compute the hash code of the destination now, 6561: before the effects of this instruction are recorded, 6562: since the register values used in the address computation 6563: are those before this instruction. */ 6564: sets[i].dest_hash_code = HASH (dest, mode); 6565: 6566: /* Don't enter a bit-field in the hash table 6567: because the value in it after the store 6568: may not equal what was stored, due to truncation. */ 6569: 6570: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT 6571: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) 6572: { 6573: rtx width = XEXP (SET_DEST (sets[i].rtl), 1); 6574: 6575: if (src_const != 0 && GET_CODE (src_const) == CONST_INT 6576: && GET_CODE (width) == CONST_INT 1.1.1.4 root 6577: && INTVAL (width) < HOST_BITS_PER_WIDE_INT 6578: && ! (INTVAL (src_const) 6579: & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) 1.1 root 6580: /* Exception: if the value is constant, 6581: and it won't be truncated, record it. */ 6582: ; 6583: else 6584: { 6585: /* This is chosen so that the destination will be invalidated 6586: but no new value will be recorded. 6587: We must invalidate because sometimes constant 6588: values can be recorded for bitfields. */ 6589: sets[i].src_elt = 0; 6590: sets[i].src_volatile = 1; 6591: src_eqv = 0; 6592: src_eqv_elt = 0; 6593: } 6594: } 6595: 6596: /* If only one set in a JUMP_INSN and it is now a no-op, we can delete 6597: the insn. */ 6598: else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) 6599: { 6600: PUT_CODE (insn, NOTE); 6601: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; 6602: NOTE_SOURCE_FILE (insn) = 0; 6603: cse_jumps_altered = 1; 6604: /* One less use of the label this insn used to jump to. */ 6605: --LABEL_NUSES (JUMP_LABEL (insn)); 6606: /* No more processing for this set. */ 6607: sets[i].rtl = 0; 6608: } 6609: 6610: /* If this SET is now setting PC to a label, we know it used to 6611: be a conditional or computed branch. So we see if we can follow 6612: it. If it was a computed branch, delete it and re-emit. */ 6613: else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) 6614: { 6615: rtx p; 6616: 6617: /* If this is not in the format for a simple branch and 6618: we are the only SET in it, re-emit it. */ 6619: if (! simplejump_p (insn) && n_sets == 1) 6620: { 6621: rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); 6622: JUMP_LABEL (new) = XEXP (src, 0); 6623: LABEL_NUSES (XEXP (src, 0))++; 6624: delete_insn (insn); 6625: insn = new; 6626: } 1.1.1.5 ! root 6627: else ! 6628: /* Otherwise, force rerecognition, since it probably had ! 6629: a different pattern before. ! 6630: This shouldn't really be necessary, since whatever ! 6631: changed the source value above should have done this. ! 6632: Until the right place is found, might as well do this here. */ ! 6633: INSN_CODE (insn) = -1; 1.1 root 6634: 6635: /* Now that we've converted this jump to an unconditional jump, 6636: there is dead code after it. Delete the dead code until we 6637: reach a BARRIER, the end of the function, or a label. Do 6638: not delete NOTEs except for NOTE_INSN_DELETED since later 6639: phases assume these notes are retained. */ 6640: 6641: p = insn; 6642: 6643: while (NEXT_INSN (p) != 0 6644: && GET_CODE (NEXT_INSN (p)) != BARRIER 6645: && GET_CODE (NEXT_INSN (p)) != CODE_LABEL) 6646: { 6647: if (GET_CODE (NEXT_INSN (p)) != NOTE 6648: || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED) 6649: delete_insn (NEXT_INSN (p)); 6650: else 6651: p = NEXT_INSN (p); 6652: } 6653: 6654: /* If we don't have a BARRIER immediately after INSN, put one there. 6655: Much code assumes that there are no NOTEs between a JUMP_INSN and 6656: BARRIER. */ 6657: 6658: if (NEXT_INSN (insn) == 0 6659: || GET_CODE (NEXT_INSN (insn)) != BARRIER) 6660: emit_barrier_after (insn); 6661: 6662: /* We might have two BARRIERs separated by notes. Delete the second 6663: one if so. */ 6664: 1.1.1.2 root 6665: if (p != insn && NEXT_INSN (p) != 0 6666: && GET_CODE (NEXT_INSN (p)) == BARRIER) 1.1 root 6667: delete_insn (NEXT_INSN (p)); 6668: 6669: cse_jumps_altered = 1; 6670: sets[i].rtl = 0; 6671: } 6672: 1.1.1.3 root 6673: /* If destination is volatile, invalidate it and then do no further 6674: processing for this assignment. */ 1.1 root 6675: 6676: else if (do_not_record) 1.1.1.3 root 6677: { 6678: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG 6679: || GET_CODE (dest) == MEM) 6680: invalidate (dest); 6681: sets[i].rtl = 0; 6682: } 1.1 root 6683: 6684: if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) 6685: sets[i].dest_hash_code = HASH (SET_DEST (sets[i].rtl), mode); 6686: 6687: #ifdef HAVE_cc0 6688: /* If setting CC0, record what it was set to, or a constant, if it 6689: is equivalent to a constant. If it is being set to a floating-point 6690: value, make a COMPARE with the appropriate constant of 0. If we 6691: don't do this, later code can interpret this as a test against 6692: const0_rtx, which can cause problems if we try to put it into an 6693: insn as a floating-point operand. */ 6694: if (dest == cc0_rtx) 6695: { 6696: this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; 6697: this_insn_cc0_mode = mode; 6698: if (GET_MODE_CLASS (mode) == MODE_FLOAT) 6699: this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0, 6700: CONST0_RTX (mode)); 6701: } 6702: #endif 6703: } 6704: 6705: /* Now enter all non-volatile source expressions in the hash table 6706: if they are not already present. 6707: Record their equivalence classes in src_elt. 6708: This way we can insert the corresponding destinations into 6709: the same classes even if the actual sources are no longer in them 6710: (having been invalidated). */ 6711: 6712: if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile 6713: && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) 6714: { 6715: register struct table_elt *elt; 6716: register struct table_elt *classp = sets[0].src_elt; 6717: rtx dest = SET_DEST (sets[0].rtl); 6718: enum machine_mode eqvmode = GET_MODE (dest); 6719: 6720: if (GET_CODE (dest) == STRICT_LOW_PART) 6721: { 6722: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); 6723: classp = 0; 6724: } 6725: if (insert_regs (src_eqv, classp, 0)) 6726: src_eqv_hash_code = HASH (src_eqv, eqvmode); 6727: elt = insert (src_eqv, classp, src_eqv_hash_code, eqvmode); 6728: elt->in_memory = src_eqv_in_memory; 6729: elt->in_struct = src_eqv_in_struct; 6730: src_eqv_elt = elt; 6731: } 6732: 6733: for (i = 0; i < n_sets; i++) 6734: if (sets[i].rtl && ! sets[i].src_volatile 6735: && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) 6736: { 6737: if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) 6738: { 6739: /* REG_EQUAL in setting a STRICT_LOW_PART 6740: gives an equivalent for the entire destination register, 6741: not just for the subreg being stored in now. 6742: This is a more interesting equivalence, so we arrange later 6743: to treat the entire reg as the destination. */ 6744: sets[i].src_elt = src_eqv_elt; 6745: sets[i].src_hash_code = src_eqv_hash_code; 6746: } 6747: else 6748: { 6749: /* Insert source and constant equivalent into hash table, if not 6750: already present. */ 6751: register struct table_elt *classp = src_eqv_elt; 6752: register rtx src = sets[i].src; 6753: register rtx dest = SET_DEST (sets[i].rtl); 6754: enum machine_mode mode 6755: = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); 6756: 6757: if (sets[i].src_elt == 0) 6758: { 6759: register struct table_elt *elt; 6760: 6761: /* Note that these insert_regs calls cannot remove 6762: any of the src_elt's, because they would have failed to 6763: match if not still valid. */ 6764: if (insert_regs (src, classp, 0)) 6765: sets[i].src_hash_code = HASH (src, mode); 6766: elt = insert (src, classp, sets[i].src_hash_code, mode); 6767: elt->in_memory = sets[i].src_in_memory; 6768: elt->in_struct = sets[i].src_in_struct; 6769: sets[i].src_elt = classp = elt; 6770: } 6771: 6772: if (sets[i].src_const && sets[i].src_const_elt == 0 6773: && src != sets[i].src_const 6774: && ! rtx_equal_p (sets[i].src_const, src)) 6775: sets[i].src_elt = insert (sets[i].src_const, classp, 6776: sets[i].src_const_hash_code, mode); 6777: } 6778: } 6779: else if (sets[i].src_elt == 0) 6780: /* If we did not insert the source into the hash table (e.g., it was 6781: volatile), note the equivalence class for the REG_EQUAL value, if any, 6782: so that the destination goes into that class. */ 6783: sets[i].src_elt = src_eqv_elt; 6784: 6785: invalidate_from_clobbers (&writes_memory, x); 1.1.1.4 root 6786: 6787: /* Some registers are invalidated by subroutine calls. Memory is 6788: invalidated by non-constant calls. */ 6789: 1.1 root 6790: if (GET_CODE (insn) == CALL_INSN) 6791: { 6792: static struct write_data everything = {0, 1, 1, 1}; 1.1.1.4 root 6793: 6794: if (! CONST_CALL_P (insn)) 6795: invalidate_memory (&everything); 1.1 root 6796: invalidate_for_call (); 6797: } 6798: 6799: /* Now invalidate everything set by this instruction. 6800: If a SUBREG or other funny destination is being set, 6801: sets[i].rtl is still nonzero, so here we invalidate the reg 6802: a part of which is being set. */ 6803: 6804: for (i = 0; i < n_sets; i++) 6805: if (sets[i].rtl) 6806: { 6807: register rtx dest = sets[i].inner_dest; 6808: 6809: /* Needed for registers to remove the register from its 6810: previous quantity's chain. 6811: Needed for memory if this is a nonvarying address, unless 6812: we have just done an invalidate_memory that covers even those. */ 6813: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG 6814: || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest))) 6815: invalidate (dest); 6816: } 6817: 6818: /* Make sure registers mentioned in destinations 6819: are safe for use in an expression to be inserted. 6820: This removes from the hash table 6821: any invalid entry that refers to one of these registers. 6822: 6823: We don't care about the return value from mention_regs because 6824: we are going to hash the SET_DEST values unconditionally. */ 6825: 6826: for (i = 0; i < n_sets; i++) 6827: if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG) 6828: mention_regs (SET_DEST (sets[i].rtl)); 6829: 6830: /* We may have just removed some of the src_elt's from the hash table. 6831: So replace each one with the current head of the same class. */ 6832: 6833: for (i = 0; i < n_sets; i++) 6834: if (sets[i].rtl) 6835: { 6836: if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) 6837: /* If elt was removed, find current head of same class, 6838: or 0 if nothing remains of that class. */ 6839: { 6840: register struct table_elt *elt = sets[i].src_elt; 6841: 6842: while (elt && elt->prev_same_value) 6843: elt = elt->prev_same_value; 6844: 6845: while (elt && elt->first_same_value == 0) 6846: elt = elt->next_same_value; 6847: sets[i].src_elt = elt ? elt->first_same_value : 0; 6848: } 6849: } 6850: 6851: /* Now insert the destinations into their equivalence classes. */ 6852: 6853: for (i = 0; i < n_sets; i++) 6854: if (sets[i].rtl) 6855: { 6856: register rtx dest = SET_DEST (sets[i].rtl); 6857: register struct table_elt *elt; 6858: 6859: /* Don't record value if we are not supposed to risk allocating 6860: floating-point values in registers that might be wider than 6861: memory. */ 6862: if ((flag_float_store 6863: && GET_CODE (dest) == MEM 6864: && GET_MODE_CLASS (GET_MODE (dest)) == MODE_FLOAT) 6865: /* Don't record values of destinations set inside a libcall block 6866: since we might delete the libcall. Things should have been set 6867: up so we won't want to reuse such a value, but we play it safe 6868: here. */ 6869: || in_libcall_block 6870: /* If we didn't put a REG_EQUAL value or a source into the hash 6871: table, there is no point is recording DEST. */ 6872: || sets[i].src_elt == 0) 6873: continue; 6874: 6875: /* STRICT_LOW_PART isn't part of the value BEING set, 6876: and neither is the SUBREG inside it. 6877: Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ 6878: if (GET_CODE (dest) == STRICT_LOW_PART) 6879: dest = SUBREG_REG (XEXP (dest, 0)); 6880: 1.1.1.4 root 6881: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) 1.1 root 6882: /* Registers must also be inserted into chains for quantities. */ 6883: if (insert_regs (dest, sets[i].src_elt, 1)) 6884: /* If `insert_regs' changes something, the hash code must be 6885: recalculated. */ 6886: sets[i].dest_hash_code = HASH (dest, GET_MODE (dest)); 6887: 6888: elt = insert (dest, sets[i].src_elt, 6889: sets[i].dest_hash_code, GET_MODE (dest)); 6890: elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM; 6891: if (elt->in_memory) 6892: { 6893: /* This implicitly assumes a whole struct 6894: need not have MEM_IN_STRUCT_P. 6895: But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */ 6896: elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest) 6897: || sets[i].inner_dest != SET_DEST (sets[i].rtl)); 6898: } 6899: 1.1.1.3 root 6900: /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no 6901: narrower than M2, and both M1 and M2 are the same number of words, 6902: we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so 6903: make that equivalence as well. 1.1 root 6904: 6905: However, BAR may have equivalences for which gen_lowpart_if_possible 6906: will produce a simpler value than gen_lowpart_if_possible applied to 6907: BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all 6908: BAR's equivalences. If we don't get a simplified form, make 6909: the SUBREG. It will not be used in an equivalence, but will 6910: cause two similar assignments to be detected. 6911: 6912: Note the loop below will find SUBREG_REG (DEST) since we have 6913: already entered SRC and DEST of the SET in the table. */ 6914: 6915: if (GET_CODE (dest) == SUBREG 1.1.1.3 root 6916: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) / UNITS_PER_WORD 6917: == GET_MODE_SIZE (GET_MODE (dest)) / UNITS_PER_WORD) 1.1 root 6918: && (GET_MODE_SIZE (GET_MODE (dest)) 6919: >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) 6920: && sets[i].src_elt != 0) 6921: { 6922: enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); 6923: struct table_elt *elt, *classp = 0; 6924: 6925: for (elt = sets[i].src_elt->first_same_value; elt; 6926: elt = elt->next_same_value) 6927: { 6928: rtx new_src = 0; 6929: int src_hash; 6930: struct table_elt *src_elt; 6931: 6932: /* Ignore invalid entries. */ 6933: if (GET_CODE (elt->exp) != REG 6934: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) 6935: continue; 6936: 6937: new_src = gen_lowpart_if_possible (new_mode, elt->exp); 6938: if (new_src == 0) 6939: new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0); 6940: 6941: src_hash = HASH (new_src, new_mode); 6942: src_elt = lookup (new_src, src_hash, new_mode); 6943: 6944: /* Put the new source in the hash table is if isn't 6945: already. */ 6946: if (src_elt == 0) 6947: { 6948: if (insert_regs (new_src, classp, 0)) 6949: src_hash = HASH (new_src, new_mode); 6950: src_elt = insert (new_src, classp, src_hash, new_mode); 6951: src_elt->in_memory = elt->in_memory; 6952: src_elt->in_struct = elt->in_struct; 6953: } 6954: else if (classp && classp != src_elt->first_same_value) 6955: /* Show that two things that we've seen before are 6956: actually the same. */ 6957: merge_equiv_classes (src_elt, classp); 6958: 6959: classp = src_elt->first_same_value; 6960: } 6961: } 6962: } 6963: 6964: /* Special handling for (set REG0 REG1) 6965: where REG0 is the "cheapest", cheaper than REG1. 6966: After cse, REG1 will probably not be used in the sequel, 6967: so (if easily done) change this insn to (set REG1 REG0) and 6968: replace REG1 with REG0 in the previous insn that computed their value. 6969: Then REG1 will become a dead store and won't cloud the situation 6970: for later optimizations. 6971: 6972: Do not make this change if REG1 is a hard register, because it will 6973: then be used in the sequel and we may be changing a two-operand insn 6974: into a three-operand insn. 6975: 6976: Also do not do this if we are operating on a copy of INSN. */ 6977: 6978: if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG 6979: && NEXT_INSN (PREV_INSN (insn)) == insn 6980: && GET_CODE (SET_SRC (sets[0].rtl)) == REG 6981: && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER 6982: && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))) 6983: && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]] 6984: == REGNO (SET_DEST (sets[0].rtl)))) 6985: { 6986: rtx prev = PREV_INSN (insn); 6987: while (prev && GET_CODE (prev) == NOTE) 6988: prev = PREV_INSN (prev); 6989: 6990: if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET 6991: && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) 6992: { 6993: rtx dest = SET_DEST (sets[0].rtl); 1.1.1.4 root 6994: rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); 1.1 root 6995: 6996: validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1); 6997: validate_change (insn, & SET_DEST (sets[0].rtl), 6998: SET_SRC (sets[0].rtl), 1); 6999: validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1); 7000: apply_change_group (); 7001: 7002: /* If REG1 was equivalent to a constant, REG0 is not. */ 7003: if (note) 7004: PUT_REG_NOTE_KIND (note, REG_EQUAL); 7005: 7006: /* If there was a REG_WAS_0 note on PREV, remove it. Move 7007: any REG_WAS_0 note on INSN to PREV. */ 1.1.1.4 root 7008: note = find_reg_note (prev, REG_WAS_0, NULL_RTX); 1.1 root 7009: if (note) 7010: remove_note (prev, note); 7011: 1.1.1.4 root 7012: note = find_reg_note (insn, REG_WAS_0, NULL_RTX); 1.1 root 7013: if (note) 7014: { 7015: remove_note (insn, note); 7016: XEXP (note, 1) = REG_NOTES (prev); 7017: REG_NOTES (prev) = note; 7018: } 7019: } 7020: } 7021: 7022: /* If this is a conditional jump insn, record any known equivalences due to 7023: the condition being tested. */ 7024: 7025: last_jump_equiv_class = 0; 7026: if (GET_CODE (insn) == JUMP_INSN 7027: && n_sets == 1 && GET_CODE (x) == SET 7028: && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) 7029: record_jump_equiv (insn, 0); 7030: 7031: #ifdef HAVE_cc0 7032: /* If the previous insn set CC0 and this insn no longer references CC0, 7033: delete the previous insn. Here we use the fact that nothing expects CC0 7034: to be valid over an insn, which is true until the final pass. */ 7035: if (prev_insn && GET_CODE (prev_insn) == INSN 7036: && (tem = single_set (prev_insn)) != 0 7037: && SET_DEST (tem) == cc0_rtx 7038: && ! reg_mentioned_p (cc0_rtx, x)) 7039: { 7040: PUT_CODE (prev_insn, NOTE); 7041: NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; 7042: NOTE_SOURCE_FILE (prev_insn) = 0; 7043: } 7044: 7045: prev_insn_cc0 = this_insn_cc0; 7046: prev_insn_cc0_mode = this_insn_cc0_mode; 7047: #endif 7048: 7049: prev_insn = insn; 7050: } 7051: 7052: /* Store 1 in *WRITES_PTR for those categories of memory ref 7053: that must be invalidated when the expression WRITTEN is stored in. 7054: If WRITTEN is null, say everything must be invalidated. */ 7055: 7056: static void 7057: note_mem_written (written, writes_ptr) 7058: rtx written; 7059: struct write_data *writes_ptr; 7060: { 7061: static struct write_data everything = {0, 1, 1, 1}; 7062: 7063: if (written == 0) 7064: *writes_ptr = everything; 7065: else if (GET_CODE (written) == MEM) 7066: { 7067: /* Pushing or popping the stack invalidates just the stack pointer. */ 7068: rtx addr = XEXP (written, 0); 7069: if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 7070: || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 7071: && GET_CODE (XEXP (addr, 0)) == REG 7072: && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) 7073: { 7074: writes_ptr->sp = 1; 7075: return; 7076: } 7077: else if (GET_MODE (written) == BLKmode) 7078: *writes_ptr = everything; 7079: else if (cse_rtx_addr_varies_p (written)) 7080: { 7081: /* A varying address that is a sum indicates an array element, 7082: and that's just as good as a structure element 1.1.1.5 ! root 7083: in implying that we need not invalidate scalar variables. ! 7084: However, we must allow QImode aliasing of scalars, because the ! 7085: ANSI C standard allows character pointers to alias anything. */ ! 7086: if (! ((MEM_IN_STRUCT_P (written) ! 7087: || GET_CODE (XEXP (written, 0)) == PLUS) ! 7088: && GET_MODE (written) != QImode)) 1.1 root 7089: writes_ptr->all = 1; 7090: writes_ptr->nonscalar = 1; 7091: } 7092: writes_ptr->var = 1; 7093: } 7094: } 7095: 7096: /* Perform invalidation on the basis of everything about an insn 7097: except for invalidating the actual places that are SET in it. 7098: This includes the places CLOBBERed, and anything that might 7099: alias with something that is SET or CLOBBERed. 7100: 7101: W points to the writes_memory for this insn, a struct write_data 7102: saying which kinds of memory references must be invalidated. 7103: X is the pattern of the insn. */ 7104: 7105: static void 7106: invalidate_from_clobbers (w, x) 7107: struct write_data *w; 7108: rtx x; 7109: { 7110: /* If W->var is not set, W specifies no action. 7111: If W->all is set, this step gets all memory refs 7112: so they can be ignored in the rest of this function. */ 7113: if (w->var) 7114: invalidate_memory (w); 7115: 7116: if (w->sp) 7117: { 7118: if (reg_tick[STACK_POINTER_REGNUM] >= 0) 7119: reg_tick[STACK_POINTER_REGNUM]++; 7120: 7121: /* This should be *very* rare. */ 7122: if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) 7123: invalidate (stack_pointer_rtx); 7124: } 7125: 7126: if (GET_CODE (x) == CLOBBER) 7127: { 7128: rtx ref = XEXP (x, 0); 7129: if (ref 7130: && (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG 7131: || (GET_CODE (ref) == MEM && ! w->all))) 7132: invalidate (ref); 7133: } 7134: else if (GET_CODE (x) == PARALLEL) 7135: { 7136: register int i; 7137: for (i = XVECLEN (x, 0) - 1; i >= 0; i--) 7138: { 7139: register rtx y = XVECEXP (x, 0, i); 7140: if (GET_CODE (y) == CLOBBER) 7141: { 7142: rtx ref = XEXP (y, 0); 7143: if (ref 7144: &&(GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG 7145: || (GET_CODE (ref) == MEM && !w->all))) 7146: invalidate (ref); 7147: } 7148: } 7149: } 7150: } 7151: 7152: /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes 7153: and replace any registers in them with either an equivalent constant 7154: or the canonical form of the register. If we are inside an address, 7155: only do this if the address remains valid. 7156: 7157: OBJECT is 0 except when within a MEM in which case it is the MEM. 7158: 7159: Return the replacement for X. */ 7160: 7161: static rtx 7162: cse_process_notes (x, object) 7163: rtx x; 7164: rtx object; 7165: { 7166: enum rtx_code code = GET_CODE (x); 7167: char *fmt = GET_RTX_FORMAT (code); 7168: int qty; 7169: int i; 7170: 7171: switch (code) 7172: { 7173: case CONST_INT: 7174: case CONST: 7175: case SYMBOL_REF: 7176: case LABEL_REF: 7177: case CONST_DOUBLE: 7178: case PC: 7179: case CC0: 7180: case LO_SUM: 7181: return x; 7182: 7183: case MEM: 7184: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); 7185: return x; 7186: 7187: case EXPR_LIST: 7188: case INSN_LIST: 7189: if (REG_NOTE_KIND (x) == REG_EQUAL) 1.1.1.4 root 7190: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); 1.1 root 7191: if (XEXP (x, 1)) 1.1.1.4 root 7192: XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); 1.1 root 7193: return x; 7194: 1.1.1.3 root 7195: case SIGN_EXTEND: 7196: case ZERO_EXTEND: 7197: { 7198: rtx new = cse_process_notes (XEXP (x, 0), object); 7199: /* We don't substitute VOIDmode constants into these rtx, 7200: since they would impede folding. */ 7201: if (GET_MODE (new) != VOIDmode) 7202: validate_change (object, &XEXP (x, 0), new, 0); 7203: return x; 7204: } 7205: 1.1 root 7206: case REG: 7207: i = reg_qty[REGNO (x)]; 7208: 7209: /* Return a constant or a constant register. */ 7210: if (REGNO_QTY_VALID_P (REGNO (x)) 7211: && qty_const[i] != 0 7212: && (CONSTANT_P (qty_const[i]) 7213: || GET_CODE (qty_const[i]) == REG)) 7214: { 7215: rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]); 7216: if (new) 7217: return new; 7218: } 7219: 7220: /* Otherwise, canonicalize this register. */ 1.1.1.4 root 7221: return canon_reg (x, NULL_RTX); 1.1 root 7222: } 7223: 7224: for (i = 0; i < GET_RTX_LENGTH (code); i++) 7225: if (fmt[i] == 'e') 7226: validate_change (object, &XEXP (x, i), 1.1.1.5 ! root 7227: cse_process_notes (XEXP (x, i), object), 0); 1.1 root 7228: 7229: return x; 7230: } 7231: 7232: /* Find common subexpressions between the end test of a loop and the beginning 7233: of the loop. LOOP_START is the CODE_LABEL at the start of a loop. 7234: 7235: Often we have a loop where an expression in the exit test is used 7236: in the body of the loop. For example "while (*p) *q++ = *p++;". 7237: Because of the way we duplicate the loop exit test in front of the loop, 7238: however, we don't detect that common subexpression. This will be caught 7239: when global cse is implemented, but this is a quite common case. 7240: 7241: This function handles the most common cases of these common expressions. 7242: It is called after we have processed the basic block ending with the 7243: NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN 7244: jumps to a label used only once. */ 7245: 7246: static void 7247: cse_around_loop (loop_start) 7248: rtx loop_start; 7249: { 7250: rtx insn; 7251: int i; 7252: struct table_elt *p; 7253: 7254: /* If the jump at the end of the loop doesn't go to the start, we don't 7255: do anything. */ 7256: for (insn = PREV_INSN (loop_start); 7257: insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); 7258: insn = PREV_INSN (insn)) 7259: ; 7260: 7261: if (insn == 0 7262: || GET_CODE (insn) != NOTE 7263: || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) 7264: return; 7265: 7266: /* If the last insn of the loop (the end test) was an NE comparison, 7267: we will interpret it as an EQ comparison, since we fell through 1.1.1.4 root 7268: the loop. Any equivalences resulting from that comparison are 1.1 root 7269: therefore not valid and must be invalidated. */ 7270: if (last_jump_equiv_class) 7271: for (p = last_jump_equiv_class->first_same_value; p; 7272: p = p->next_same_value) 7273: if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG 7274: || GET_CODE (p->exp) == SUBREG) 7275: invalidate (p->exp); 7276: 7277: /* Process insns starting after LOOP_START until we hit a CALL_INSN or 7278: a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). 7279: 7280: The only thing we do with SET_DEST is invalidate entries, so we 7281: can safely process each SET in order. It is slightly less efficient 7282: to do so, but we only want to handle the most common cases. */ 7283: 7284: for (insn = NEXT_INSN (loop_start); 7285: GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL 7286: && ! (GET_CODE (insn) == NOTE 7287: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); 7288: insn = NEXT_INSN (insn)) 7289: { 7290: if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 7291: && (GET_CODE (PATTERN (insn)) == SET 7292: || GET_CODE (PATTERN (insn)) == CLOBBER)) 7293: cse_set_around_loop (PATTERN (insn), insn, loop_start); 7294: else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 7295: && GET_CODE (PATTERN (insn)) == PARALLEL) 7296: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) 7297: if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET 7298: || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 7299: cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, 7300: loop_start); 7301: } 7302: } 7303: 1.1.1.3 root 7304: /* Variable used for communications between the next two routines. */ 7305: 7306: static struct write_data skipped_writes_memory; 7307: 7308: /* Process one SET of an insn that was skipped. We ignore CLOBBERs 7309: since they are done elsewhere. This function is called via note_stores. */ 7310: 7311: static void 7312: invalidate_skipped_set (dest, set) 7313: rtx set; 7314: rtx dest; 7315: { 7316: if (GET_CODE (set) == CLOBBER 7317: #ifdef HAVE_cc0 7318: || dest == cc0_rtx 7319: #endif 7320: || dest == pc_rtx) 7321: return; 7322: 7323: if (GET_CODE (dest) == MEM) 7324: note_mem_written (dest, &skipped_writes_memory); 7325: 1.1.1.5 ! root 7326: /* There are times when an address can appear varying and be a PLUS ! 7327: during this scan when it would be a fixed address were we to know ! 7328: the proper equivalences. So promote "nonscalar" to be "all". */ ! 7329: if (skipped_writes_memory.nonscalar) ! 7330: skipped_writes_memory.all = 1; ! 7331: 1.1.1.3 root 7332: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG 7333: || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest))) 7334: invalidate (dest); 7335: } 7336: 7337: /* Invalidate all insns from START up to the end of the function or the 7338: next label. This called when we wish to CSE around a block that is 7339: conditionally executed. */ 7340: 7341: static void 7342: invalidate_skipped_block (start) 7343: rtx start; 7344: { 7345: rtx insn; 7346: int i; 7347: static struct write_data init = {0, 0, 0, 0}; 7348: static struct write_data everything = {0, 1, 1, 1}; 7349: 7350: for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; 7351: insn = NEXT_INSN (insn)) 7352: { 7353: if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 7354: continue; 7355: 7356: skipped_writes_memory = init; 7357: 7358: if (GET_CODE (insn) == CALL_INSN) 7359: { 7360: invalidate_for_call (); 7361: skipped_writes_memory = everything; 7362: } 7363: 7364: note_stores (PATTERN (insn), invalidate_skipped_set); 7365: invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn)); 7366: } 7367: } 7368: 1.1 root 7369: /* Used for communication between the following two routines; contains a 7370: value to be checked for modification. */ 7371: 7372: static rtx cse_check_loop_start_value; 7373: 7374: /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE, 7375: indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */ 7376: 7377: static void 7378: cse_check_loop_start (x, set) 7379: rtx x; 7380: rtx set; 7381: { 7382: if (cse_check_loop_start_value == 0 7383: || GET_CODE (x) == CC0 || GET_CODE (x) == PC) 7384: return; 7385: 7386: if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM) 7387: || reg_overlap_mentioned_p (x, cse_check_loop_start_value)) 7388: cse_check_loop_start_value = 0; 7389: } 7390: 7391: /* X is a SET or CLOBBER contained in INSN that was found near the start of 7392: a loop that starts with the label at LOOP_START. 7393: 7394: If X is a SET, we see if its SET_SRC is currently in our hash table. 7395: If so, we see if it has a value equal to some register used only in the 7396: loop exit code (as marked by jump.c). 7397: 7398: If those two conditions are true, we search backwards from the start of 7399: the loop to see if that same value was loaded into a register that still 7400: retains its value at the start of the loop. 7401: 7402: If so, we insert an insn after the load to copy the destination of that 7403: load into the equivalent register and (try to) replace our SET_SRC with that 7404: register. 7405: 7406: In any event, we invalidate whatever this SET or CLOBBER modifies. */ 7407: 7408: static void 7409: cse_set_around_loop (x, insn, loop_start) 7410: rtx x; 7411: rtx insn; 7412: rtx loop_start; 7413: { 7414: rtx p; 7415: struct table_elt *src_elt; 7416: static struct write_data init = {0, 0, 0, 0}; 7417: struct write_data writes_memory; 7418: 7419: writes_memory = init; 7420: 7421: /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that 7422: are setting PC or CC0 or whose SET_SRC is already a register. */ 7423: if (GET_CODE (x) == SET 7424: && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 7425: && GET_CODE (SET_SRC (x)) != REG) 7426: { 7427: src_elt = lookup (SET_SRC (x), 7428: HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), 7429: GET_MODE (SET_DEST (x))); 7430: 7431: if (src_elt) 7432: for (src_elt = src_elt->first_same_value; src_elt; 7433: src_elt = src_elt->next_same_value) 7434: if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) 7435: && COST (src_elt->exp) < COST (SET_SRC (x))) 7436: { 7437: rtx p, set; 7438: 7439: /* Look for an insn in front of LOOP_START that sets 7440: something in the desired mode to SET_SRC (x) before we hit 7441: a label or CALL_INSN. */ 7442: 7443: for (p = prev_nonnote_insn (loop_start); 7444: p && GET_CODE (p) != CALL_INSN 7445: && GET_CODE (p) != CODE_LABEL; 7446: p = prev_nonnote_insn (p)) 7447: if ((set = single_set (p)) != 0 7448: && GET_CODE (SET_DEST (set)) == REG 7449: && GET_MODE (SET_DEST (set)) == src_elt->mode 7450: && rtx_equal_p (SET_SRC (set), SET_SRC (x))) 7451: { 7452: /* We now have to ensure that nothing between P 7453: and LOOP_START modified anything referenced in 7454: SET_SRC (x). We know that nothing within the loop 7455: can modify it, or we would have invalidated it in 7456: the hash table. */ 7457: rtx q; 7458: 7459: cse_check_loop_start_value = SET_SRC (x); 7460: for (q = p; q != loop_start; q = NEXT_INSN (q)) 7461: if (GET_RTX_CLASS (GET_CODE (q)) == 'i') 7462: note_stores (PATTERN (q), cse_check_loop_start); 7463: 7464: /* If nothing was changed and we can replace our 7465: SET_SRC, add an insn after P to copy its destination 7466: to what we will be replacing SET_SRC with. */ 7467: if (cse_check_loop_start_value 7468: && validate_change (insn, &SET_SRC (x), 7469: src_elt->exp, 0)) 7470: emit_insn_after (gen_move_insn (src_elt->exp, 7471: SET_DEST (set)), 7472: p); 7473: break; 7474: } 7475: } 7476: } 7477: 7478: /* Now invalidate anything modified by X. */ 7479: note_mem_written (SET_DEST (x), &writes_memory); 7480: 7481: if (writes_memory.var) 7482: invalidate_memory (&writes_memory); 7483: 7484: /* See comment on similar code in cse_insn for explanation of these tests. */ 7485: if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG 7486: || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all 7487: && ! cse_rtx_addr_varies_p (SET_DEST (x)))) 7488: invalidate (SET_DEST (x)); 7489: } 7490: 7491: /* Find the end of INSN's basic block and return its range, 7492: the total number of SETs in all the insns of the block, the last insn of the 7493: block, and the branch path. 7494: 7495: The branch path indicates which branches should be followed. If a non-zero 7496: path size is specified, the block should be rescanned and a different set 7497: of branches will be taken. The branch path is only used if 1.1.1.3 root 7498: FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. 1.1 root 7499: 7500: DATA is a pointer to a struct cse_basic_block_data, defined below, that is 7501: used to describe the block. It is filled in with the information about 7502: the current block. The incoming structure's branch path, if any, is used 7503: to construct the output branch path. */ 7504: 7505: void 1.1.1.3 root 7506: cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) 1.1 root 7507: rtx insn; 7508: struct cse_basic_block_data *data; 7509: int follow_jumps; 7510: int after_loop; 1.1.1.3 root 7511: int skip_blocks; 1.1 root 7512: { 7513: rtx p = insn, q; 7514: int nsets = 0; 7515: int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); 1.1.1.3 root 7516: rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn); 1.1 root 7517: int path_size = data->path_size; 7518: int path_entry = 0; 7519: int i; 7520: 7521: /* Update the previous branch path, if any. If the last branch was 7522: previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, 7523: shorten the path by one and look at the previous branch. We know that 7524: at least one branch must have been taken if PATH_SIZE is non-zero. */ 7525: while (path_size > 0) 7526: { 1.1.1.3 root 7527: if (data->path[path_size - 1].status != NOT_TAKEN) 1.1 root 7528: { 7529: data->path[path_size - 1].status = NOT_TAKEN; 7530: break; 7531: } 7532: else 7533: path_size--; 7534: } 7535: 7536: /* Scan to end of this basic block. */ 7537: while (p && GET_CODE (p) != CODE_LABEL) 7538: { 7539: /* Don't cse out the end of a loop. This makes a difference 7540: only for the unusual loops that always execute at least once; 7541: all other loops have labels there so we will stop in any case. 7542: Cse'ing out the end of the loop is dangerous because it 7543: might cause an invariant expression inside the loop 7544: to be reused after the end of the loop. This would make it 7545: hard to move the expression out of the loop in loop.c, 7546: especially if it is one of several equivalent expressions 7547: and loop.c would like to eliminate it. 7548: 7549: If we are running after loop.c has finished, we can ignore 7550: the NOTE_INSN_LOOP_END. */ 7551: 7552: if (! after_loop && GET_CODE (p) == NOTE 7553: && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) 7554: break; 7555: 7556: /* Don't cse over a call to setjmp; on some machines (eg vax) 7557: the regs restored by the longjmp come from 7558: a later time than the setjmp. */ 7559: if (GET_CODE (p) == NOTE 7560: && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) 7561: break; 7562: 7563: /* A PARALLEL can have lots of SETs in it, 7564: especially if it is really an ASM_OPERANDS. */ 7565: if (GET_RTX_CLASS (GET_CODE (p)) == 'i' 7566: && GET_CODE (PATTERN (p)) == PARALLEL) 7567: nsets += XVECLEN (PATTERN (p), 0); 7568: else if (GET_CODE (p) != NOTE) 7569: nsets += 1; 7570: 1.1.1.4 root 7571: /* Ignore insns made by CSE; they cannot affect the boundaries of 7572: the basic block. */ 7573: 7574: if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) 1.1.1.3 root 7575: high_cuid = INSN_CUID (p); 1.1.1.4 root 7576: if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) 7577: low_cuid = INSN_CUID (p); 1.1 root 7578: 7579: /* See if this insn is in our branch path. If it is and we are to 7580: take it, do so. */ 7581: if (path_entry < path_size && data->path[path_entry].branch == p) 7582: { 1.1.1.3 root 7583: if (data->path[path_entry].status != NOT_TAKEN) 1.1 root 7584: p = JUMP_LABEL (p); 7585: 7586: /* Point to next entry in path, if any. */ 7587: path_entry++; 7588: } 7589: 7590: /* If this is a conditional jump, we can follow it if -fcse-follow-jumps 7591: was specified, we haven't reached our maximum path length, there are 7592: insns following the target of the jump, this is the only use of the 1.1.1.3 root 7593: jump label, and the target label is preceded by a BARRIER. 7594: 7595: Alternatively, we can follow the jump if it branches around a 7596: block of code and there are no other branches into the block. 7597: In this case invalidate_skipped_block will be called to invalidate any 7598: registers set in the block when following the jump. */ 7599: 7600: else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 1.1 root 7601: && GET_CODE (p) == JUMP_INSN 7602: && GET_CODE (PATTERN (p)) == SET 7603: && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE 7604: && LABEL_NUSES (JUMP_LABEL (p)) == 1 7605: && NEXT_INSN (JUMP_LABEL (p)) != 0) 7606: { 7607: for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) 7608: if ((GET_CODE (q) != NOTE 7609: || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END 7610: || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) 7611: && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) 7612: break; 7613: 7614: /* If we ran into a BARRIER, this code is an extension of the 7615: basic block when the branch is taken. */ 1.1.1.3 root 7616: if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) 1.1 root 7617: { 7618: /* Don't allow ourself to keep walking around an 7619: always-executed loop. */ 1.1.1.3 root 7620: if (next_real_insn (q) == next) 7621: { 7622: p = NEXT_INSN (p); 7623: continue; 7624: } 1.1 root 7625: 7626: /* Similarly, don't put a branch in our path more than once. */ 7627: for (i = 0; i < path_entry; i++) 7628: if (data->path[i].branch == p) 7629: break; 7630: 7631: if (i != path_entry) 7632: break; 7633: 7634: data->path[path_entry].branch = p; 7635: data->path[path_entry++].status = TAKEN; 7636: 7637: /* This branch now ends our path. It was possible that we 7638: didn't see this branch the last time around (when the 7639: insn in front of the target was a JUMP_INSN that was 7640: turned into a no-op). */ 7641: path_size = path_entry; 7642: 7643: p = JUMP_LABEL (p); 7644: /* Mark block so we won't scan it again later. */ 7645: PUT_MODE (NEXT_INSN (p), QImode); 7646: } 1.1.1.3 root 7647: /* Detect a branch around a block of code. */ 7648: else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) 7649: { 7650: register rtx tmp; 7651: 7652: if (next_real_insn (q) == next) 7653: { 7654: p = NEXT_INSN (p); 7655: continue; 7656: } 7657: 7658: for (i = 0; i < path_entry; i++) 7659: if (data->path[i].branch == p) 7660: break; 7661: 7662: if (i != path_entry) 7663: break; 7664: 7665: /* This is no_labels_between_p (p, q) with an added check for 7666: reaching the end of a function (in case Q precedes P). */ 7667: for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) 7668: if (GET_CODE (tmp) == CODE_LABEL) 7669: break; 7670: 7671: if (tmp == q) 7672: { 7673: data->path[path_entry].branch = p; 7674: data->path[path_entry++].status = AROUND; 7675: 7676: path_size = path_entry; 7677: 7678: p = JUMP_LABEL (p); 7679: /* Mark block so we won't scan it again later. */ 7680: PUT_MODE (NEXT_INSN (p), QImode); 7681: } 7682: } 1.1 root 7683: } 7684: p = NEXT_INSN (p); 7685: } 7686: 7687: data->low_cuid = low_cuid; 7688: data->high_cuid = high_cuid; 7689: data->nsets = nsets; 7690: data->last = p; 7691: 7692: /* If all jumps in the path are not taken, set our path length to zero 7693: so a rescan won't be done. */ 7694: for (i = path_size - 1; i >= 0; i--) 1.1.1.3 root 7695: if (data->path[i].status != NOT_TAKEN) 1.1 root 7696: break; 7697: 7698: if (i == -1) 7699: data->path_size = 0; 7700: else 7701: data->path_size = path_size; 7702: 7703: /* End the current branch path. */ 7704: data->path[path_size].branch = 0; 7705: } 7706: 7707: /* Perform cse on the instructions of a function. 7708: F is the first instruction. 7709: NREGS is one plus the highest pseudo-reg number used in the instruction. 7710: 7711: AFTER_LOOP is 1 if this is the cse call done after loop optimization 7712: (only if -frerun-cse-after-loop). 7713: 7714: Returns 1 if jump_optimize should be redone due to simplifications 7715: in conditional jump instructions. */ 7716: 7717: int 7718: cse_main (f, nregs, after_loop, file) 7719: rtx f; 7720: int nregs; 7721: int after_loop; 7722: FILE *file; 7723: { 7724: struct cse_basic_block_data val; 7725: register rtx insn = f; 7726: register int i; 7727: 7728: cse_jumps_altered = 0; 7729: constant_pool_entries_cost = 0; 7730: val.path_size = 0; 7731: 7732: init_recog (); 7733: 7734: max_reg = nregs; 7735: 7736: all_minus_one = (int *) alloca (nregs * sizeof (int)); 7737: consec_ints = (int *) alloca (nregs * sizeof (int)); 7738: 7739: for (i = 0; i < nregs; i++) 7740: { 7741: all_minus_one[i] = -1; 7742: consec_ints[i] = i; 7743: } 7744: 7745: reg_next_eqv = (int *) alloca (nregs * sizeof (int)); 7746: reg_prev_eqv = (int *) alloca (nregs * sizeof (int)); 7747: reg_qty = (int *) alloca (nregs * sizeof (int)); 7748: reg_in_table = (int *) alloca (nregs * sizeof (int)); 7749: reg_tick = (int *) alloca (nregs * sizeof (int)); 7750: 7751: /* Discard all the free elements of the previous function 7752: since they are allocated in the temporarily obstack. */ 7753: bzero (table, sizeof table); 7754: free_element_chain = 0; 7755: n_elements_made = 0; 7756: 7757: /* Find the largest uid. */ 7758: 1.1.1.4 root 7759: max_uid = get_max_uid (); 7760: uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int)); 7761: bzero (uid_cuid, (max_uid + 1) * sizeof (int)); 1.1 root 7762: 7763: /* Compute the mapping from uids to cuids. 7764: CUIDs are numbers assigned to insns, like uids, 7765: except that cuids increase monotonically through the code. 7766: Don't assign cuids to line-number NOTEs, so that the distance in cuids 7767: between two insns is not affected by -g. */ 7768: 7769: for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) 7770: { 7771: if (GET_CODE (insn) != NOTE 7772: || NOTE_LINE_NUMBER (insn) < 0) 7773: INSN_CUID (insn) = ++i; 7774: else 7775: /* Give a line number note the same cuid as preceding insn. */ 7776: INSN_CUID (insn) = i; 7777: } 7778: 7779: /* Initialize which registers are clobbered by calls. */ 7780: 7781: CLEAR_HARD_REG_SET (regs_invalidated_by_call); 7782: 7783: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 7784: if ((call_used_regs[i] 7785: /* Used to check !fixed_regs[i] here, but that isn't safe; 7786: fixed regs are still call-clobbered, and sched can get 7787: confused if they can "live across calls". 7788: 7789: The frame pointer is always preserved across calls. The arg 7790: pointer is if it is fixed. The stack pointer usually is, unless 7791: RETURN_POPS_ARGS, in which case an explicit CLOBBER 7792: will be present. If we are generating PIC code, the PIC offset 7793: table register is preserved across calls. */ 7794: 7795: && i != STACK_POINTER_REGNUM 7796: && i != FRAME_POINTER_REGNUM 7797: #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM 7798: && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) 7799: #endif 7800: #ifdef PIC_OFFSET_TABLE_REGNUM 7801: && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) 7802: #endif 7803: ) 7804: || global_regs[i]) 7805: SET_HARD_REG_BIT (regs_invalidated_by_call, i); 7806: 7807: /* Loop over basic blocks. 7808: Compute the maximum number of qty's needed for each basic block 7809: (which is 2 for each SET). */ 7810: insn = f; 7811: while (insn) 7812: { 1.1.1.3 root 7813: cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, 7814: flag_cse_skip_blocks); 1.1 root 7815: 7816: /* If this basic block was already processed or has no sets, skip it. */ 7817: if (val.nsets == 0 || GET_MODE (insn) == QImode) 7818: { 7819: PUT_MODE (insn, VOIDmode); 7820: insn = (val.last ? NEXT_INSN (val.last) : 0); 7821: val.path_size = 0; 7822: continue; 7823: } 7824: 7825: cse_basic_block_start = val.low_cuid; 7826: cse_basic_block_end = val.high_cuid; 7827: max_qty = val.nsets * 2; 7828: 7829: if (file) 7830: fprintf (file, ";; Processing block from %d to %d, %d sets.\n", 7831: INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, 7832: val.nsets); 7833: 7834: /* Make MAX_QTY bigger to give us room to optimize 7835: past the end of this basic block, if that should prove useful. */ 7836: if (max_qty < 500) 7837: max_qty = 500; 7838: 7839: max_qty += max_reg; 7840: 7841: /* If this basic block is being extended by following certain jumps, 7842: (see `cse_end_of_basic_block'), we reprocess the code from the start. 7843: Otherwise, we start after this basic block. */ 7844: if (val.path_size > 0) 7845: cse_basic_block (insn, val.last, val.path, 0); 7846: else 7847: { 7848: int old_cse_jumps_altered = cse_jumps_altered; 7849: rtx temp; 7850: 7851: /* When cse changes a conditional jump to an unconditional 7852: jump, we want to reprocess the block, since it will give 7853: us a new branch path to investigate. */ 7854: cse_jumps_altered = 0; 7855: temp = cse_basic_block (insn, val.last, val.path, ! after_loop); 1.1.1.3 root 7856: if (cse_jumps_altered == 0 7857: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) 1.1 root 7858: insn = temp; 7859: 7860: cse_jumps_altered |= old_cse_jumps_altered; 7861: } 7862: 7863: #ifdef USE_C_ALLOCA 7864: alloca (0); 7865: #endif 7866: } 7867: 7868: /* Tell refers_to_mem_p that qty_const info is not available. */ 7869: qty_const = 0; 7870: 7871: if (max_elements_made < n_elements_made) 7872: max_elements_made = n_elements_made; 7873: 7874: return cse_jumps_altered; 7875: } 7876: 7877: /* Process a single basic block. FROM and TO and the limits of the basic 7878: block. NEXT_BRANCH points to the branch path when following jumps or 7879: a null path when not following jumps. 7880: 7881: AROUND_LOOP is non-zero if we are to try to cse around to the start of a 7882: loop. This is true when we are being called for the last time on a 7883: block and this CSE pass is before loop.c. */ 7884: 7885: static rtx 7886: cse_basic_block (from, to, next_branch, around_loop) 7887: register rtx from, to; 7888: struct branch_path *next_branch; 7889: int around_loop; 7890: { 7891: register rtx insn; 7892: int to_usage = 0; 7893: int in_libcall_block = 0; 7894: 7895: /* Each of these arrays is undefined before max_reg, so only allocate 7896: the space actually needed and adjust the start below. */ 7897: 7898: qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); 7899: qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); 7900: qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode)); 7901: qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); 7902: qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); 7903: qty_comparison_code 7904: = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code)); 7905: qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int)); 7906: qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); 7907: 7908: qty_first_reg -= max_reg; 7909: qty_last_reg -= max_reg; 7910: qty_mode -= max_reg; 7911: qty_const -= max_reg; 7912: qty_const_insn -= max_reg; 7913: qty_comparison_code -= max_reg; 7914: qty_comparison_qty -= max_reg; 7915: qty_comparison_const -= max_reg; 7916: 7917: new_basic_block (); 7918: 7919: /* TO might be a label. If so, protect it from being deleted. */ 7920: if (to != 0 && GET_CODE (to) == CODE_LABEL) 7921: ++LABEL_NUSES (to); 7922: 7923: for (insn = from; insn != to; insn = NEXT_INSN (insn)) 7924: { 7925: register enum rtx_code code; 7926: 7927: /* See if this is a branch that is part of the path. If so, and it is 7928: to be taken, do so. */ 7929: if (next_branch->branch == insn) 7930: { 1.1.1.3 root 7931: enum taken status = next_branch++->status; 7932: if (status != NOT_TAKEN) 1.1 root 7933: { 1.1.1.3 root 7934: if (status == TAKEN) 7935: record_jump_equiv (insn, 1); 7936: else 7937: invalidate_skipped_block (NEXT_INSN (insn)); 7938: 1.1 root 7939: /* Set the last insn as the jump insn; it doesn't affect cc0. 7940: Then follow this branch. */ 7941: #ifdef HAVE_cc0 7942: prev_insn_cc0 = 0; 7943: #endif 7944: prev_insn = insn; 7945: insn = JUMP_LABEL (insn); 7946: continue; 7947: } 7948: } 7949: 7950: code = GET_CODE (insn); 7951: if (GET_MODE (insn) == QImode) 7952: PUT_MODE (insn, VOIDmode); 7953: 7954: if (GET_RTX_CLASS (code) == 'i') 7955: { 7956: /* Process notes first so we have all notes in canonical forms when 7957: looking for duplicate operations. */ 7958: 7959: if (REG_NOTES (insn)) 1.1.1.4 root 7960: REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); 1.1 root 7961: 7962: /* Track when we are inside in LIBCALL block. Inside such a block, 7963: we do not want to record destinations. The last insn of a 7964: LIBCALL block is not considered to be part of the block, since 1.1.1.3 root 7965: its destination is the result of the block and hence should be 1.1 root 7966: recorded. */ 7967: 1.1.1.4 root 7968: if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) 1.1 root 7969: in_libcall_block = 1; 1.1.1.4 root 7970: else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) 1.1 root 7971: in_libcall_block = 0; 7972: 7973: cse_insn (insn, in_libcall_block); 7974: } 7975: 7976: /* If INSN is now an unconditional jump, skip to the end of our 7977: basic block by pretending that we just did the last insn in the 7978: basic block. If we are jumping to the end of our block, show 7979: that we can have one usage of TO. */ 7980: 7981: if (simplejump_p (insn)) 7982: { 7983: if (to == 0) 7984: return 0; 7985: 7986: if (JUMP_LABEL (insn) == to) 7987: to_usage = 1; 7988: 1.1.1.3 root 7989: /* Maybe TO was deleted because the jump is unconditional. 7990: If so, there is nothing left in this basic block. */ 7991: /* ??? Perhaps it would be smarter to set TO 7992: to whatever follows this insn, 7993: and pretend the basic block had always ended here. */ 7994: if (INSN_DELETED_P (to)) 7995: break; 7996: 1.1 root 7997: insn = PREV_INSN (to); 7998: } 7999: 8000: /* See if it is ok to keep on going past the label 8001: which used to end our basic block. Remember that we incremented 1.1.1.2 root 8002: the count of that label, so we decrement it here. If we made 1.1 root 8003: a jump unconditional, TO_USAGE will be one; in that case, we don't 8004: want to count the use in that jump. */ 8005: 8006: if (to != 0 && NEXT_INSN (insn) == to 8007: && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) 8008: { 8009: struct cse_basic_block_data val; 8010: 8011: insn = NEXT_INSN (to); 8012: 8013: if (LABEL_NUSES (to) == 0) 8014: delete_insn (to); 8015: 8016: /* Find the end of the following block. Note that we won't be 8017: following branches in this case. If TO was the last insn 8018: in the function, we are done. Similarly, if we deleted the 1.1.1.2 root 8019: insn after TO, it must have been because it was preceded by 1.1 root 8020: a BARRIER. In that case, we are done with this block because it 8021: has no continuation. */ 8022: 8023: if (insn == 0 || INSN_DELETED_P (insn)) 8024: return 0; 8025: 8026: to_usage = 0; 8027: val.path_size = 0; 1.1.1.3 root 8028: cse_end_of_basic_block (insn, &val, 0, 0, 0); 1.1 root 8029: 8030: /* If the tables we allocated have enough space left 8031: to handle all the SETs in the next basic block, 8032: continue through it. Otherwise, return, 8033: and that block will be scanned individually. */ 8034: if (val.nsets * 2 + next_qty > max_qty) 8035: break; 8036: 8037: cse_basic_block_start = val.low_cuid; 8038: cse_basic_block_end = val.high_cuid; 8039: to = val.last; 8040: 8041: /* Prevent TO from being deleted if it is a label. */ 8042: if (to != 0 && GET_CODE (to) == CODE_LABEL) 8043: ++LABEL_NUSES (to); 8044: 8045: /* Back up so we process the first insn in the extension. */ 8046: insn = PREV_INSN (insn); 8047: } 8048: } 8049: 8050: if (next_qty > max_qty) 8051: abort (); 8052: 8053: /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and 8054: the previous insn is the only insn that branches to the head of a loop, 8055: we can cse into the loop. Don't do this if we changed the jump 8056: structure of a loop unless we aren't going to be following jumps. */ 8057: 1.1.1.3 root 8058: if ((cse_jumps_altered == 0 8059: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) 1.1 root 8060: && around_loop && to != 0 8061: && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END 8062: && GET_CODE (PREV_INSN (to)) == JUMP_INSN 8063: && JUMP_LABEL (PREV_INSN (to)) != 0 8064: && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) 8065: cse_around_loop (JUMP_LABEL (PREV_INSN (to))); 8066: 8067: return to ? NEXT_INSN (to) : 0; 8068: } 8069: 8070: /* Count the number of times registers are used (not set) in X. 8071: COUNTS is an array in which we accumulate the count, INCR is how much 8072: we count each register usage. */ 8073: 8074: static void 8075: count_reg_usage (x, counts, incr) 8076: rtx x; 8077: int *counts; 8078: int incr; 8079: { 8080: enum rtx_code code = GET_CODE (x); 8081: char *fmt; 8082: int i, j; 8083: 8084: switch (code) 8085: { 8086: case REG: 8087: counts[REGNO (x)] += incr; 8088: return; 8089: 8090: case PC: 8091: case CC0: 8092: case CONST: 8093: case CONST_INT: 8094: case CONST_DOUBLE: 8095: case SYMBOL_REF: 8096: case LABEL_REF: 8097: case CLOBBER: 8098: return; 8099: 8100: case SET: 8101: /* Unless we are setting a REG, count everything in SET_DEST. */ 8102: if (GET_CODE (SET_DEST (x)) != REG) 8103: count_reg_usage (SET_DEST (x), counts, incr); 8104: count_reg_usage (SET_SRC (x), counts, incr); 8105: return; 8106: 8107: case INSN: 8108: case JUMP_INSN: 8109: case CALL_INSN: 8110: count_reg_usage (PATTERN (x), counts, incr); 8111: 8112: /* Things used in a REG_EQUAL note aren't dead since loop may try to 8113: use them. */ 8114: 8115: if (REG_NOTES (x)) 8116: count_reg_usage (REG_NOTES (x), counts, incr); 8117: return; 8118: 8119: case EXPR_LIST: 8120: case INSN_LIST: 8121: if (REG_NOTE_KIND (x) == REG_EQUAL) 8122: count_reg_usage (XEXP (x, 0), counts, incr); 8123: if (XEXP (x, 1)) 8124: count_reg_usage (XEXP (x, 1), counts, incr); 8125: return; 8126: } 8127: 8128: fmt = GET_RTX_FORMAT (code); 8129: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 8130: { 8131: if (fmt[i] == 'e') 8132: count_reg_usage (XEXP (x, i), counts, incr); 8133: else if (fmt[i] == 'E') 8134: for (j = XVECLEN (x, i) - 1; j >= 0; j--) 8135: count_reg_usage (XVECEXP (x, i, j), counts, incr); 8136: } 8137: } 8138: 8139: /* Scan all the insns and delete any that are dead; i.e., they store a register 8140: that is never used or they copy a register to itself. 8141: 8142: This is used to remove insns made obviously dead by cse. It improves the 8143: heuristics in loop since it won't try to move dead invariants out of loops 8144: or make givs for dead quantities. The remaining passes of the compilation 8145: are also sped up. */ 8146: 8147: void 8148: delete_dead_from_cse (insns, nreg) 8149: rtx insns; 8150: int nreg; 8151: { 8152: int *counts = (int *) alloca (nreg * sizeof (int)); 1.1.1.4 root 8153: rtx insn, prev; 1.1.1.2 root 8154: rtx tem; 1.1 root 8155: int i; 1.1.1.3 root 8156: int in_libcall = 0; 1.1 root 8157: 8158: /* First count the number of times each register is used. */ 8159: bzero (counts, sizeof (int) * nreg); 8160: for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) 8161: count_reg_usage (insn, counts, 1); 8162: 8163: /* Go from the last insn to the first and delete insns that only set unused 8164: registers or copy a register to itself. As we delete an insn, remove 8165: usage counts for registers it uses. */ 1.1.1.4 root 8166: for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev) 1.1 root 8167: { 8168: int live_insn = 0; 8169: 1.1.1.4 root 8170: prev = prev_real_insn (insn); 8171: 1.1.1.3 root 8172: /* Don't delete any insns that are part of a libcall block. 1.1.1.4 root 8173: Flow or loop might get confused if we did that. Remember 8174: that we are scanning backwards. */ 8175: if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) 1.1.1.3 root 8176: in_libcall = 1; 8177: 8178: if (in_libcall) 8179: live_insn = 1; 8180: else if (GET_CODE (PATTERN (insn)) == SET) 1.1 root 8181: { 8182: if (GET_CODE (SET_DEST (PATTERN (insn))) == REG 8183: && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn))) 8184: ; 8185: 1.1.1.2 root 8186: #ifdef HAVE_cc0 8187: else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 8188: && ! side_effects_p (SET_SRC (PATTERN (insn))) 8189: && ((tem = next_nonnote_insn (insn)) == 0 8190: || GET_RTX_CLASS (GET_CODE (tem)) != 'i' 8191: || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) 8192: ; 8193: #endif 1.1 root 8194: else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG 8195: || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER 8196: || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 8197: || side_effects_p (SET_SRC (PATTERN (insn)))) 8198: live_insn = 1; 8199: } 8200: else if (GET_CODE (PATTERN (insn)) == PARALLEL) 8201: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) 8202: { 8203: rtx elt = XVECEXP (PATTERN (insn), 0, i); 8204: 8205: if (GET_CODE (elt) == SET) 8206: { 8207: if (GET_CODE (SET_DEST (elt)) == REG 8208: && SET_DEST (elt) == SET_SRC (elt)) 8209: ; 8210: 1.1.1.2 root 8211: #ifdef HAVE_cc0 8212: else if (GET_CODE (SET_DEST (elt)) == CC0 8213: && ! side_effects_p (SET_SRC (elt)) 8214: && ((tem = next_nonnote_insn (insn)) == 0 8215: || GET_RTX_CLASS (GET_CODE (tem)) != 'i' 8216: || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) 8217: ; 8218: #endif 1.1 root 8219: else if (GET_CODE (SET_DEST (elt)) != REG 8220: || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER 8221: || counts[REGNO (SET_DEST (elt))] != 0 8222: || side_effects_p (SET_SRC (elt))) 8223: live_insn = 1; 8224: } 8225: else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) 8226: live_insn = 1; 8227: } 8228: else 8229: live_insn = 1; 8230: 8231: /* If this is a dead insn, delete it and show registers in it aren't 1.1.1.3 root 8232: being used. */ 1.1 root 8233: 1.1.1.3 root 8234: if (! live_insn) 1.1 root 8235: { 8236: count_reg_usage (insn, counts, -1); 1.1.1.4 root 8237: delete_insn (insn); 1.1 root 8238: } 1.1.1.3 root 8239: 1.1.1.4 root 8240: if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) 1.1.1.3 root 8241: in_libcall = 0; 1.1 root 8242: } 8243: }
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