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1.1 root 1: /* Common subexpression elimination for GNU compiler.
1.1.1.5 root 2: Copyright (C) 1987, 1988, 1989, 1992, 1993 Free Software Foundation, Inc.
1.1 root 3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20:
21: #include "config.h"
1.1.1.6 ! root 22: /* Must precede rtl.h for FFS. */
! 23: #include <stdio.h>
! 24:
1.1 root 25: #include "rtl.h"
26: #include "regs.h"
27: #include "hard-reg-set.h"
28: #include "flags.h"
29: #include "real.h"
30: #include "insn-config.h"
31: #include "recog.h"
32:
33: #include <setjmp.h>
34:
35: /* The basic idea of common subexpression elimination is to go
36: through the code, keeping a record of expressions that would
37: have the same value at the current scan point, and replacing
38: expressions encountered with the cheapest equivalent expression.
39:
40: It is too complicated to keep track of the different possibilities
41: when control paths merge; so, at each label, we forget all that is
42: known and start fresh. This can be described as processing each
43: basic block separately. Note, however, that these are not quite
44: the same as the basic blocks found by a later pass and used for
45: data flow analysis and register packing. We do not need to start fresh
46: after a conditional jump instruction if there is no label there.
47:
48: We use two data structures to record the equivalent expressions:
49: a hash table for most expressions, and several vectors together
50: with "quantity numbers" to record equivalent (pseudo) registers.
51:
52: The use of the special data structure for registers is desirable
53: because it is faster. It is possible because registers references
54: contain a fairly small number, the register number, taken from
55: a contiguously allocated series, and two register references are
56: identical if they have the same number. General expressions
57: do not have any such thing, so the only way to retrieve the
58: information recorded on an expression other than a register
59: is to keep it in a hash table.
60:
61: Registers and "quantity numbers":
62:
63: At the start of each basic block, all of the (hardware and pseudo)
64: registers used in the function are given distinct quantity
65: numbers to indicate their contents. During scan, when the code
66: copies one register into another, we copy the quantity number.
67: When a register is loaded in any other way, we allocate a new
68: quantity number to describe the value generated by this operation.
69: `reg_qty' records what quantity a register is currently thought
70: of as containing.
71:
72: All real quantity numbers are greater than or equal to `max_reg'.
73: If register N has not been assigned a quantity, reg_qty[N] will equal N.
74:
75: Quantity numbers below `max_reg' do not exist and none of the `qty_...'
76: variables should be referenced with an index below `max_reg'.
77:
78: We also maintain a bidirectional chain of registers for each
79: quantity number. `qty_first_reg', `qty_last_reg',
80: `reg_next_eqv' and `reg_prev_eqv' hold these chains.
81:
82: The first register in a chain is the one whose lifespan is least local.
83: Among equals, it is the one that was seen first.
84: We replace any equivalent register with that one.
85:
86: If two registers have the same quantity number, it must be true that
87: REG expressions with `qty_mode' must be in the hash table for both
88: registers and must be in the same class.
89:
90: The converse is not true. Since hard registers may be referenced in
91: any mode, two REG expressions might be equivalent in the hash table
92: but not have the same quantity number if the quantity number of one
93: of the registers is not the same mode as those expressions.
94:
95: Constants and quantity numbers
96:
97: When a quantity has a known constant value, that value is stored
98: in the appropriate element of qty_const. This is in addition to
99: putting the constant in the hash table as is usual for non-regs.
100:
1.1.1.2 root 101: Whether a reg or a constant is preferred is determined by the configuration
1.1 root 102: macro CONST_COSTS and will often depend on the constant value. In any
103: event, expressions containing constants can be simplified, by fold_rtx.
104:
105: When a quantity has a known nearly constant value (such as an address
106: of a stack slot), that value is stored in the appropriate element
107: of qty_const.
108:
109: Integer constants don't have a machine mode. However, cse
110: determines the intended machine mode from the destination
111: of the instruction that moves the constant. The machine mode
112: is recorded in the hash table along with the actual RTL
113: constant expression so that different modes are kept separate.
114:
115: Other expressions:
116:
117: To record known equivalences among expressions in general
118: we use a hash table called `table'. It has a fixed number of buckets
119: that contain chains of `struct table_elt' elements for expressions.
120: These chains connect the elements whose expressions have the same
121: hash codes.
122:
123: Other chains through the same elements connect the elements which
124: currently have equivalent values.
125:
126: Register references in an expression are canonicalized before hashing
127: the expression. This is done using `reg_qty' and `qty_first_reg'.
128: The hash code of a register reference is computed using the quantity
129: number, not the register number.
130:
131: When the value of an expression changes, it is necessary to remove from the
132: hash table not just that expression but all expressions whose values
133: could be different as a result.
134:
135: 1. If the value changing is in memory, except in special cases
136: ANYTHING referring to memory could be changed. That is because
137: nobody knows where a pointer does not point.
138: The function `invalidate_memory' removes what is necessary.
139:
140: The special cases are when the address is constant or is
141: a constant plus a fixed register such as the frame pointer
142: or a static chain pointer. When such addresses are stored in,
143: we can tell exactly which other such addresses must be invalidated
144: due to overlap. `invalidate' does this.
145: All expressions that refer to non-constant
146: memory addresses are also invalidated. `invalidate_memory' does this.
147:
148: 2. If the value changing is a register, all expressions
149: containing references to that register, and only those,
150: must be removed.
151:
152: Because searching the entire hash table for expressions that contain
153: a register is very slow, we try to figure out when it isn't necessary.
154: Precisely, this is necessary only when expressions have been
155: entered in the hash table using this register, and then the value has
156: changed, and then another expression wants to be added to refer to
157: the register's new value. This sequence of circumstances is rare
158: within any one basic block.
159:
160: The vectors `reg_tick' and `reg_in_table' are used to detect this case.
161: reg_tick[i] is incremented whenever a value is stored in register i.
162: reg_in_table[i] holds -1 if no references to register i have been
163: entered in the table; otherwise, it contains the value reg_tick[i] had
164: when the references were entered. If we want to enter a reference
165: and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
166: Until we want to enter a new entry, the mere fact that the two vectors
167: don't match makes the entries be ignored if anyone tries to match them.
168:
169: Registers themselves are entered in the hash table as well as in
170: the equivalent-register chains. However, the vectors `reg_tick'
171: and `reg_in_table' do not apply to expressions which are simple
172: register references. These expressions are removed from the table
173: immediately when they become invalid, and this can be done even if
174: we do not immediately search for all the expressions that refer to
175: the register.
176:
177: A CLOBBER rtx in an instruction invalidates its operand for further
178: reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
179: invalidates everything that resides in memory.
180:
181: Related expressions:
182:
183: Constant expressions that differ only by an additive integer
184: are called related. When a constant expression is put in
185: the table, the related expression with no constant term
186: is also entered. These are made to point at each other
187: so that it is possible to find out if there exists any
188: register equivalent to an expression related to a given expression. */
189:
190: /* One plus largest register number used in this function. */
191:
192: static int max_reg;
193:
194: /* Length of vectors indexed by quantity number.
195: We know in advance we will not need a quantity number this big. */
196:
197: static int max_qty;
198:
199: /* Next quantity number to be allocated.
200: This is 1 + the largest number needed so far. */
201:
202: static int next_qty;
203:
204: /* Indexed by quantity number, gives the first (or last) (pseudo) register
205: in the chain of registers that currently contain this quantity. */
206:
207: static int *qty_first_reg;
208: static int *qty_last_reg;
209:
210: /* Index by quantity number, gives the mode of the quantity. */
211:
212: static enum machine_mode *qty_mode;
213:
214: /* Indexed by quantity number, gives the rtx of the constant value of the
215: quantity, or zero if it does not have a known value.
216: A sum of the frame pointer (or arg pointer) plus a constant
217: can also be entered here. */
218:
219: static rtx *qty_const;
220:
221: /* Indexed by qty number, gives the insn that stored the constant value
222: recorded in `qty_const'. */
223:
224: static rtx *qty_const_insn;
225:
226: /* The next three variables are used to track when a comparison between a
227: quantity and some constant or register has been passed. In that case, we
228: know the results of the comparison in case we see it again. These variables
229: record a comparison that is known to be true. */
230:
231: /* Indexed by qty number, gives the rtx code of a comparison with a known
232: result involving this quantity. If none, it is UNKNOWN. */
233: static enum rtx_code *qty_comparison_code;
234:
235: /* Indexed by qty number, gives the constant being compared against in a
236: comparison of known result. If no such comparison, it is undefined.
237: If the comparison is not with a constant, it is zero. */
238:
239: static rtx *qty_comparison_const;
240:
241: /* Indexed by qty number, gives the quantity being compared against in a
242: comparison of known result. If no such comparison, if it undefined.
243: If the comparison is not with a register, it is -1. */
244:
245: static int *qty_comparison_qty;
246:
247: #ifdef HAVE_cc0
248: /* For machines that have a CC0, we do not record its value in the hash
249: table since its use is guaranteed to be the insn immediately following
250: its definition and any other insn is presumed to invalidate it.
251:
252: Instead, we store below the value last assigned to CC0. If it should
253: happen to be a constant, it is stored in preference to the actual
254: assigned value. In case it is a constant, we store the mode in which
255: the constant should be interpreted. */
256:
257: static rtx prev_insn_cc0;
258: static enum machine_mode prev_insn_cc0_mode;
259: #endif
260:
261: /* Previous actual insn. 0 if at first insn of basic block. */
262:
263: static rtx prev_insn;
264:
265: /* Insn being scanned. */
266:
267: static rtx this_insn;
268:
269: /* Index by (pseudo) register number, gives the quantity number
270: of the register's current contents. */
271:
272: static int *reg_qty;
273:
274: /* Index by (pseudo) register number, gives the number of the next (or
275: previous) (pseudo) register in the chain of registers sharing the same
276: value.
277:
278: Or -1 if this register is at the end of the chain.
279:
280: If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
281:
282: static int *reg_next_eqv;
283: static int *reg_prev_eqv;
284:
285: /* Index by (pseudo) register number, gives the number of times
286: that register has been altered in the current basic block. */
287:
288: static int *reg_tick;
289:
290: /* Index by (pseudo) register number, gives the reg_tick value at which
291: rtx's containing this register are valid in the hash table.
292: If this does not equal the current reg_tick value, such expressions
293: existing in the hash table are invalid.
294: If this is -1, no expressions containing this register have been
295: entered in the table. */
296:
297: static int *reg_in_table;
298:
299: /* A HARD_REG_SET containing all the hard registers for which there is
300: currently a REG expression in the hash table. Note the difference
301: from the above variables, which indicate if the REG is mentioned in some
302: expression in the table. */
303:
304: static HARD_REG_SET hard_regs_in_table;
305:
306: /* A HARD_REG_SET containing all the hard registers that are invalidated
307: by a CALL_INSN. */
308:
309: static HARD_REG_SET regs_invalidated_by_call;
310:
311: /* Two vectors of ints:
312: one containing max_reg -1's; the other max_reg + 500 (an approximation
313: for max_qty) elements where element i contains i.
314: These are used to initialize various other vectors fast. */
315:
316: static int *all_minus_one;
317: static int *consec_ints;
318:
319: /* CUID of insn that starts the basic block currently being cse-processed. */
320:
321: static int cse_basic_block_start;
322:
323: /* CUID of insn that ends the basic block currently being cse-processed. */
324:
325: static int cse_basic_block_end;
326:
327: /* Vector mapping INSN_UIDs to cuids.
1.1.1.2 root 328: The cuids are like uids but increase monotonically always.
1.1 root 329: We use them to see whether a reg is used outside a given basic block. */
330:
1.1.1.4 root 331: static int *uid_cuid;
332:
333: /* Highest UID in UID_CUID. */
334: static int max_uid;
1.1 root 335:
336: /* Get the cuid of an insn. */
337:
338: #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
339:
340: /* Nonzero if cse has altered conditional jump insns
341: in such a way that jump optimization should be redone. */
342:
343: static int cse_jumps_altered;
344:
345: /* canon_hash stores 1 in do_not_record
346: if it notices a reference to CC0, PC, or some other volatile
347: subexpression. */
348:
349: static int do_not_record;
350:
351: /* canon_hash stores 1 in hash_arg_in_memory
352: if it notices a reference to memory within the expression being hashed. */
353:
354: static int hash_arg_in_memory;
355:
356: /* canon_hash stores 1 in hash_arg_in_struct
357: if it notices a reference to memory that's part of a structure. */
358:
359: static int hash_arg_in_struct;
360:
361: /* The hash table contains buckets which are chains of `struct table_elt's,
362: each recording one expression's information.
363: That expression is in the `exp' field.
364:
365: Those elements with the same hash code are chained in both directions
366: through the `next_same_hash' and `prev_same_hash' fields.
367:
368: Each set of expressions with equivalent values
369: are on a two-way chain through the `next_same_value'
370: and `prev_same_value' fields, and all point with
371: the `first_same_value' field at the first element in
372: that chain. The chain is in order of increasing cost.
373: Each element's cost value is in its `cost' field.
374:
375: The `in_memory' field is nonzero for elements that
376: involve any reference to memory. These elements are removed
377: whenever a write is done to an unidentified location in memory.
378: To be safe, we assume that a memory address is unidentified unless
379: the address is either a symbol constant or a constant plus
380: the frame pointer or argument pointer.
381:
382: The `in_struct' field is nonzero for elements that
383: involve any reference to memory inside a structure or array.
384:
385: The `related_value' field is used to connect related expressions
386: (that differ by adding an integer).
387: The related expressions are chained in a circular fashion.
388: `related_value' is zero for expressions for which this
389: chain is not useful.
390:
391: The `cost' field stores the cost of this element's expression.
392:
393: The `is_const' flag is set if the element is a constant (including
394: a fixed address).
395:
396: The `flag' field is used as a temporary during some search routines.
397:
398: The `mode' field is usually the same as GET_MODE (`exp'), but
399: if `exp' is a CONST_INT and has no machine mode then the `mode'
400: field is the mode it was being used as. Each constant is
401: recorded separately for each mode it is used with. */
402:
403:
404: struct table_elt
405: {
406: rtx exp;
407: struct table_elt *next_same_hash;
408: struct table_elt *prev_same_hash;
409: struct table_elt *next_same_value;
410: struct table_elt *prev_same_value;
411: struct table_elt *first_same_value;
412: struct table_elt *related_value;
413: int cost;
414: enum machine_mode mode;
415: char in_memory;
416: char in_struct;
417: char is_const;
418: char flag;
419: };
420:
421: #define HASHBITS 16
422:
423: /* We don't want a lot of buckets, because we rarely have very many
424: things stored in the hash table, and a lot of buckets slows
425: down a lot of loops that happen frequently. */
426: #define NBUCKETS 31
427:
428: /* Compute hash code of X in mode M. Special-case case where X is a pseudo
429: register (hard registers may require `do_not_record' to be set). */
430:
431: #define HASH(X, M) \
432: (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
433: ? ((((int) REG << 7) + reg_qty[REGNO (X)]) % NBUCKETS) \
434: : canon_hash (X, M) % NBUCKETS)
435:
436: /* Determine whether register number N is considered a fixed register for CSE.
437: It is desirable to replace other regs with fixed regs, to reduce need for
438: non-fixed hard regs.
439: A reg wins if it is either the frame pointer or designated as fixed,
440: but not if it is an overlapping register. */
441: #ifdef OVERLAPPING_REGNO_P
442: #define FIXED_REGNO_P(N) \
1.1.1.6 ! root 443: (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
! 444: || fixed_regs[N]) \
1.1 root 445: && ! OVERLAPPING_REGNO_P ((N)))
446: #else
447: #define FIXED_REGNO_P(N) \
1.1.1.6 ! root 448: ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
! 449: || fixed_regs[N])
1.1 root 450: #endif
451:
452: /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
1.1.1.5 root 453: hard registers and pointers into the frame are the cheapest with a cost
454: of 0. Next come pseudos with a cost of one and other hard registers with
455: a cost of 2. Aside from these special cases, call `rtx_cost'. */
456:
457: #define CHEAP_REG(N) \
1.1.1.6 ! root 458: ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
! 459: || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
! 460: || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
! 461: || ((N) < FIRST_PSEUDO_REGISTER \
1.1.1.5 root 462: && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
1.1 root 463:
464: #define COST(X) \
465: (GET_CODE (X) == REG \
1.1.1.5 root 466: ? (CHEAP_REG (REGNO (X)) ? 0 \
467: : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
1.1 root 468: : 2) \
1.1.1.3 root 469: : rtx_cost (X, SET) * 2)
1.1 root 470:
471: /* Determine if the quantity number for register X represents a valid index
472: into the `qty_...' variables. */
473:
474: #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N))
475:
476: static struct table_elt *table[NBUCKETS];
477:
478: /* Chain of `struct table_elt's made so far for this function
479: but currently removed from the table. */
480:
481: static struct table_elt *free_element_chain;
482:
483: /* Number of `struct table_elt' structures made so far for this function. */
484:
485: static int n_elements_made;
486:
487: /* Maximum value `n_elements_made' has had so far in this compilation
488: for functions previously processed. */
489:
490: static int max_elements_made;
491:
492: /* Surviving equivalence class when two equivalence classes are merged
493: by recording the effects of a jump in the last insn. Zero if the
494: last insn was not a conditional jump. */
495:
496: static struct table_elt *last_jump_equiv_class;
497:
498: /* Set to the cost of a constant pool reference if one was found for a
499: symbolic constant. If this was found, it means we should try to
500: convert constants into constant pool entries if they don't fit in
501: the insn. */
502:
503: static int constant_pool_entries_cost;
504:
505: /* Bits describing what kind of values in memory must be invalidated
506: for a particular instruction. If all three bits are zero,
507: no memory refs need to be invalidated. Each bit is more powerful
508: than the preceding ones, and if a bit is set then the preceding
509: bits are also set.
510:
511: Here is how the bits are set:
512: Pushing onto the stack invalidates only the stack pointer,
513: writing at a fixed address invalidates only variable addresses,
514: writing in a structure element at variable address
515: invalidates all but scalar variables,
516: and writing in anything else at variable address invalidates everything. */
517:
518: struct write_data
519: {
520: int sp : 1; /* Invalidate stack pointer. */
521: int var : 1; /* Invalidate variable addresses. */
522: int nonscalar : 1; /* Invalidate all but scalar variables. */
523: int all : 1; /* Invalidate all memory refs. */
524: };
525:
1.1.1.5 root 526: /* Define maximum length of a branch path. */
527:
528: #define PATHLENGTH 10
529:
530: /* This data describes a block that will be processed by cse_basic_block. */
531:
532: struct cse_basic_block_data {
533: /* Lowest CUID value of insns in block. */
534: int low_cuid;
535: /* Highest CUID value of insns in block. */
536: int high_cuid;
537: /* Total number of SETs in block. */
538: int nsets;
539: /* Last insn in the block. */
540: rtx last;
541: /* Size of current branch path, if any. */
542: int path_size;
543: /* Current branch path, indicating which branches will be taken. */
544: struct branch_path {
545: /* The branch insn. */
546: rtx branch;
547: /* Whether it should be taken or not. AROUND is the same as taken
548: except that it is used when the destination label is not preceded
549: by a BARRIER. */
550: enum taken {TAKEN, NOT_TAKEN, AROUND} status;
551: } path[PATHLENGTH];
552: };
553:
1.1 root 554: /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
555: virtual regs here because the simplify_*_operation routines are called
556: by integrate.c, which is called before virtual register instantiation. */
557:
558: #define FIXED_BASE_PLUS_P(X) \
1.1.1.6 ! root 559: ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
! 560: || (X) == arg_pointer_rtx \
1.1 root 561: || (X) == virtual_stack_vars_rtx \
562: || (X) == virtual_incoming_args_rtx \
563: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
564: && (XEXP (X, 0) == frame_pointer_rtx \
1.1.1.6 ! root 565: || XEXP (X, 0) == hard_frame_pointer_rtx \
1.1 root 566: || XEXP (X, 0) == arg_pointer_rtx \
567: || XEXP (X, 0) == virtual_stack_vars_rtx \
568: || XEXP (X, 0) == virtual_incoming_args_rtx)))
569:
1.1.1.3 root 570: /* Similar, but also allows reference to the stack pointer.
571:
572: This used to include FIXED_BASE_PLUS_P, however, we can't assume that
573: arg_pointer_rtx by itself is nonzero, because on at least one machine,
574: the i960, the arg pointer is zero when it is unused. */
1.1 root 575:
576: #define NONZERO_BASE_PLUS_P(X) \
1.1.1.6 ! root 577: ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
1.1.1.3 root 578: || (X) == virtual_stack_vars_rtx \
579: || (X) == virtual_incoming_args_rtx \
580: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
581: && (XEXP (X, 0) == frame_pointer_rtx \
1.1.1.6 ! root 582: || XEXP (X, 0) == hard_frame_pointer_rtx \
1.1.1.3 root 583: || XEXP (X, 0) == arg_pointer_rtx \
584: || XEXP (X, 0) == virtual_stack_vars_rtx \
585: || XEXP (X, 0) == virtual_incoming_args_rtx)) \
1.1 root 586: || (X) == stack_pointer_rtx \
587: || (X) == virtual_stack_dynamic_rtx \
588: || (X) == virtual_outgoing_args_rtx \
589: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
590: && (XEXP (X, 0) == stack_pointer_rtx \
591: || XEXP (X, 0) == virtual_stack_dynamic_rtx \
592: || XEXP (X, 0) == virtual_outgoing_args_rtx)))
593:
1.1.1.5 root 594: static void new_basic_block PROTO((void));
595: static void make_new_qty PROTO((int));
596: static void make_regs_eqv PROTO((int, int));
597: static void delete_reg_equiv PROTO((int));
598: static int mention_regs PROTO((rtx));
599: static int insert_regs PROTO((rtx, struct table_elt *, int));
600: static void free_element PROTO((struct table_elt *));
601: static void remove_from_table PROTO((struct table_elt *, int));
602: static struct table_elt *get_element PROTO((void));
603: static struct table_elt *lookup PROTO((rtx, int, enum machine_mode)),
604: *lookup_for_remove PROTO((rtx, int, enum machine_mode));
605: static rtx lookup_as_function PROTO((rtx, enum rtx_code));
606: static struct table_elt *insert PROTO((rtx, struct table_elt *, int,
607: enum machine_mode));
608: static void merge_equiv_classes PROTO((struct table_elt *,
609: struct table_elt *));
610: static void invalidate PROTO((rtx));
611: static void remove_invalid_refs PROTO((int));
612: static void rehash_using_reg PROTO((rtx));
613: static void invalidate_memory PROTO((struct write_data *));
614: static void invalidate_for_call PROTO((void));
615: static rtx use_related_value PROTO((rtx, struct table_elt *));
616: static int canon_hash PROTO((rtx, enum machine_mode));
617: static int safe_hash PROTO((rtx, enum machine_mode));
618: static int exp_equiv_p PROTO((rtx, rtx, int, int));
619: static void set_nonvarying_address_components PROTO((rtx, int, rtx *,
620: HOST_WIDE_INT *,
621: HOST_WIDE_INT *));
622: static int refers_to_p PROTO((rtx, rtx));
623: static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT,
624: HOST_WIDE_INT));
625: static int cse_rtx_addr_varies_p PROTO((rtx));
626: static rtx canon_reg PROTO((rtx, rtx));
627: static void find_best_addr PROTO((rtx, rtx *));
628: static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
629: enum machine_mode *,
630: enum machine_mode *));
631: static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode,
632: rtx, rtx));
633: static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode,
634: rtx, rtx));
635: static rtx fold_rtx PROTO((rtx, rtx));
636: static rtx equiv_constant PROTO((rtx));
637: static void record_jump_equiv PROTO((rtx, int));
638: static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
639: rtx, rtx, int));
640: static void cse_insn PROTO((rtx, int));
641: static void note_mem_written PROTO((rtx, struct write_data *));
642: static void invalidate_from_clobbers PROTO((struct write_data *, rtx));
643: static rtx cse_process_notes PROTO((rtx, rtx));
644: static void cse_around_loop PROTO((rtx));
645: static void invalidate_skipped_set PROTO((rtx, rtx));
646: static void invalidate_skipped_block PROTO((rtx));
647: static void cse_check_loop_start PROTO((rtx, rtx));
648: static void cse_set_around_loop PROTO((rtx, rtx, rtx));
649: static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
650: static void count_reg_usage PROTO((rtx, int *, int));
1.1 root 651:
652: /* Return an estimate of the cost of computing rtx X.
653: One use is in cse, to decide which expression to keep in the hash table.
654: Another is in rtl generation, to pick the cheapest way to multiply.
655: Other uses like the latter are expected in the future. */
656:
657: /* Return the right cost to give to an operation
658: to make the cost of the corresponding register-to-register instruction
659: N times that of a fast register-to-register instruction. */
660:
661: #define COSTS_N_INSNS(N) ((N) * 4 - 2)
662:
663: int
1.1.1.3 root 664: rtx_cost (x, outer_code)
1.1 root 665: rtx x;
1.1.1.3 root 666: enum rtx_code outer_code;
1.1 root 667: {
668: register int i, j;
669: register enum rtx_code code;
670: register char *fmt;
671: register int total;
672:
673: if (x == 0)
674: return 0;
675:
676: /* Compute the default costs of certain things.
677: Note that RTX_COSTS can override the defaults. */
678:
679: code = GET_CODE (x);
680: switch (code)
681: {
682: case MULT:
683: /* Count multiplication by 2**n as a shift,
684: because if we are considering it, we would output it as a shift. */
685: if (GET_CODE (XEXP (x, 1)) == CONST_INT
686: && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
687: total = 2;
688: else
689: total = COSTS_N_INSNS (5);
690: break;
691: case DIV:
692: case UDIV:
693: case MOD:
694: case UMOD:
695: total = COSTS_N_INSNS (7);
696: break;
697: case USE:
698: /* Used in loop.c and combine.c as a marker. */
699: total = 0;
700: break;
1.1.1.2 root 701: case ASM_OPERANDS:
702: /* We don't want these to be used in substitutions because
703: we have no way of validating the resulting insn. So assign
704: anything containing an ASM_OPERANDS a very high cost. */
705: total = 1000;
706: break;
1.1 root 707: default:
708: total = 2;
709: }
710:
711: switch (code)
712: {
713: case REG:
1.1.1.5 root 714: return ! CHEAP_REG (REGNO (x));
715:
1.1 root 716: case SUBREG:
1.1.1.3 root 717: /* If we can't tie these modes, make this expensive. The larger
718: the mode, the more expensive it is. */
719: if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
720: return COSTS_N_INSNS (2
721: + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
1.1 root 722: return 2;
723: #ifdef RTX_COSTS
1.1.1.3 root 724: RTX_COSTS (x, code, outer_code);
1.1 root 725: #endif
1.1.1.3 root 726: CONST_COSTS (x, code, outer_code);
1.1 root 727: }
728:
729: /* Sum the costs of the sub-rtx's, plus cost of this operation,
730: which is already in total. */
731:
732: fmt = GET_RTX_FORMAT (code);
733: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
734: if (fmt[i] == 'e')
1.1.1.3 root 735: total += rtx_cost (XEXP (x, i), code);
1.1 root 736: else if (fmt[i] == 'E')
737: for (j = 0; j < XVECLEN (x, i); j++)
1.1.1.3 root 738: total += rtx_cost (XVECEXP (x, i, j), code);
1.1 root 739:
740: return total;
741: }
742:
743: /* Clear the hash table and initialize each register with its own quantity,
744: for a new basic block. */
745:
746: static void
747: new_basic_block ()
748: {
749: register int i;
750:
751: next_qty = max_reg;
752:
753: bzero (reg_tick, max_reg * sizeof (int));
754:
755: bcopy (all_minus_one, reg_in_table, max_reg * sizeof (int));
756: bcopy (consec_ints, reg_qty, max_reg * sizeof (int));
757: CLEAR_HARD_REG_SET (hard_regs_in_table);
758:
759: /* The per-quantity values used to be initialized here, but it is
760: much faster to initialize each as it is made in `make_new_qty'. */
761:
762: for (i = 0; i < NBUCKETS; i++)
763: {
764: register struct table_elt *this, *next;
765: for (this = table[i]; this; this = next)
766: {
767: next = this->next_same_hash;
768: free_element (this);
769: }
770: }
771:
772: bzero (table, sizeof table);
773:
774: prev_insn = 0;
775:
776: #ifdef HAVE_cc0
777: prev_insn_cc0 = 0;
778: #endif
779: }
780:
781: /* Say that register REG contains a quantity not in any register before
782: and initialize that quantity. */
783:
784: static void
785: make_new_qty (reg)
786: register int reg;
787: {
788: register int q;
789:
790: if (next_qty >= max_qty)
791: abort ();
792:
793: q = reg_qty[reg] = next_qty++;
794: qty_first_reg[q] = reg;
795: qty_last_reg[q] = reg;
796: qty_const[q] = qty_const_insn[q] = 0;
797: qty_comparison_code[q] = UNKNOWN;
798:
799: reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
800: }
801:
802: /* Make reg NEW equivalent to reg OLD.
803: OLD is not changing; NEW is. */
804:
805: static void
806: make_regs_eqv (new, old)
807: register int new, old;
808: {
809: register int lastr, firstr;
810: register int q = reg_qty[old];
811:
812: /* Nothing should become eqv until it has a "non-invalid" qty number. */
813: if (! REGNO_QTY_VALID_P (old))
814: abort ();
815:
816: reg_qty[new] = q;
817: firstr = qty_first_reg[q];
818: lastr = qty_last_reg[q];
819:
820: /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
821: hard regs. Among pseudos, if NEW will live longer than any other reg
822: of the same qty, and that is beyond the current basic block,
823: make it the new canonical replacement for this qty. */
824: if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
825: /* Certain fixed registers might be of the class NO_REGS. This means
826: that not only can they not be allocated by the compiler, but
1.1.1.3 root 827: they cannot be used in substitutions or canonicalizations
1.1 root 828: either. */
829: && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
830: && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
831: || (new >= FIRST_PSEUDO_REGISTER
832: && (firstr < FIRST_PSEUDO_REGISTER
833: || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end
834: || (uid_cuid[regno_first_uid[new]]
835: < cse_basic_block_start))
836: && (uid_cuid[regno_last_uid[new]]
837: > uid_cuid[regno_last_uid[firstr]]))))))
838: {
839: reg_prev_eqv[firstr] = new;
840: reg_next_eqv[new] = firstr;
841: reg_prev_eqv[new] = -1;
842: qty_first_reg[q] = new;
843: }
844: else
845: {
846: /* If NEW is a hard reg (known to be non-fixed), insert at end.
847: Otherwise, insert before any non-fixed hard regs that are at the
848: end. Registers of class NO_REGS cannot be used as an
849: equivalent for anything. */
850: while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
851: && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
852: && new >= FIRST_PSEUDO_REGISTER)
853: lastr = reg_prev_eqv[lastr];
854: reg_next_eqv[new] = reg_next_eqv[lastr];
855: if (reg_next_eqv[lastr] >= 0)
856: reg_prev_eqv[reg_next_eqv[lastr]] = new;
857: else
858: qty_last_reg[q] = new;
859: reg_next_eqv[lastr] = new;
860: reg_prev_eqv[new] = lastr;
861: }
862: }
863:
864: /* Remove REG from its equivalence class. */
865:
866: static void
867: delete_reg_equiv (reg)
868: register int reg;
869: {
870: register int n = reg_next_eqv[reg];
871: register int p = reg_prev_eqv[reg];
872: register int q = reg_qty[reg];
873:
874: /* If invalid, do nothing. N and P above are undefined in that case. */
875: if (q == reg)
876: return;
877:
878: if (n != -1)
879: reg_prev_eqv[n] = p;
880: else
881: qty_last_reg[q] = p;
882: if (p != -1)
883: reg_next_eqv[p] = n;
884: else
885: qty_first_reg[q] = n;
886:
887: reg_qty[reg] = reg;
888: }
889:
890: /* Remove any invalid expressions from the hash table
891: that refer to any of the registers contained in expression X.
892:
893: Make sure that newly inserted references to those registers
894: as subexpressions will be considered valid.
895:
896: mention_regs is not called when a register itself
897: is being stored in the table.
898:
899: Return 1 if we have done something that may have changed the hash code
900: of X. */
901:
902: static int
903: mention_regs (x)
904: rtx x;
905: {
906: register enum rtx_code code;
907: register int i, j;
908: register char *fmt;
909: register int changed = 0;
910:
911: if (x == 0)
1.1.1.3 root 912: return 0;
1.1 root 913:
914: code = GET_CODE (x);
915: if (code == REG)
916: {
917: register int regno = REGNO (x);
918: register int endregno
919: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
920: : HARD_REGNO_NREGS (regno, GET_MODE (x)));
921: int i;
922:
923: for (i = regno; i < endregno; i++)
924: {
925: if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i])
926: remove_invalid_refs (i);
927:
928: reg_in_table[i] = reg_tick[i];
929: }
930:
931: return 0;
932: }
933:
934: /* If X is a comparison or a COMPARE and either operand is a register
935: that does not have a quantity, give it one. This is so that a later
936: call to record_jump_equiv won't cause X to be assigned a different
937: hash code and not found in the table after that call.
938:
939: It is not necessary to do this here, since rehash_using_reg can
940: fix up the table later, but doing this here eliminates the need to
941: call that expensive function in the most common case where the only
942: use of the register is in the comparison. */
943:
944: if (code == COMPARE || GET_RTX_CLASS (code) == '<')
945: {
946: if (GET_CODE (XEXP (x, 0)) == REG
947: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1.1.1.4 root 948: if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1.1 root 949: {
950: rehash_using_reg (XEXP (x, 0));
951: changed = 1;
952: }
953:
954: if (GET_CODE (XEXP (x, 1)) == REG
955: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1.1.1.4 root 956: if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1.1 root 957: {
958: rehash_using_reg (XEXP (x, 1));
959: changed = 1;
960: }
961: }
962:
963: fmt = GET_RTX_FORMAT (code);
964: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
965: if (fmt[i] == 'e')
966: changed |= mention_regs (XEXP (x, i));
967: else if (fmt[i] == 'E')
968: for (j = 0; j < XVECLEN (x, i); j++)
969: changed |= mention_regs (XVECEXP (x, i, j));
970:
971: return changed;
972: }
973:
974: /* Update the register quantities for inserting X into the hash table
975: with a value equivalent to CLASSP.
976: (If the class does not contain a REG, it is irrelevant.)
977: If MODIFIED is nonzero, X is a destination; it is being modified.
978: Note that delete_reg_equiv should be called on a register
979: before insert_regs is done on that register with MODIFIED != 0.
980:
981: Nonzero value means that elements of reg_qty have changed
982: so X's hash code may be different. */
983:
984: static int
985: insert_regs (x, classp, modified)
986: rtx x;
987: struct table_elt *classp;
988: int modified;
989: {
990: if (GET_CODE (x) == REG)
991: {
992: register int regno = REGNO (x);
993:
1.1.1.5 root 994: /* If REGNO is in the equivalence table already but is of the
995: wrong mode for that equivalence, don't do anything here. */
996:
997: if (REGNO_QTY_VALID_P (regno)
998: && qty_mode[reg_qty[regno]] != GET_MODE (x))
999: return 0;
1000:
1001: if (modified || ! REGNO_QTY_VALID_P (regno))
1.1 root 1002: {
1003: if (classp)
1004: for (classp = classp->first_same_value;
1005: classp != 0;
1006: classp = classp->next_same_value)
1007: if (GET_CODE (classp->exp) == REG
1008: && GET_MODE (classp->exp) == GET_MODE (x))
1009: {
1010: make_regs_eqv (regno, REGNO (classp->exp));
1011: return 1;
1012: }
1013:
1014: make_new_qty (regno);
1015: qty_mode[reg_qty[regno]] = GET_MODE (x);
1016: return 1;
1017: }
1.1.1.6 ! root 1018:
! 1019: return 0;
1.1 root 1020: }
1.1.1.4 root 1021:
1022: /* If X is a SUBREG, we will likely be inserting the inner register in the
1023: table. If that register doesn't have an assigned quantity number at
1024: this point but does later, the insertion that we will be doing now will
1025: not be accessible because its hash code will have changed. So assign
1026: a quantity number now. */
1027:
1028: else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1029: && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1030: {
1031: insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1032: mention_regs (SUBREG_REG (x));
1033: return 1;
1034: }
1.1 root 1035: else
1036: return mention_regs (x);
1037: }
1038:
1039: /* Look in or update the hash table. */
1040:
1041: /* Put the element ELT on the list of free elements. */
1042:
1043: static void
1044: free_element (elt)
1045: struct table_elt *elt;
1046: {
1047: elt->next_same_hash = free_element_chain;
1048: free_element_chain = elt;
1049: }
1050:
1051: /* Return an element that is free for use. */
1052:
1053: static struct table_elt *
1054: get_element ()
1055: {
1056: struct table_elt *elt = free_element_chain;
1057: if (elt)
1058: {
1059: free_element_chain = elt->next_same_hash;
1060: return elt;
1061: }
1062: n_elements_made++;
1063: return (struct table_elt *) oballoc (sizeof (struct table_elt));
1064: }
1065:
1066: /* Remove table element ELT from use in the table.
1067: HASH is its hash code, made using the HASH macro.
1068: It's an argument because often that is known in advance
1069: and we save much time not recomputing it. */
1070:
1071: static void
1072: remove_from_table (elt, hash)
1073: register struct table_elt *elt;
1074: int hash;
1075: {
1076: if (elt == 0)
1077: return;
1078:
1079: /* Mark this element as removed. See cse_insn. */
1080: elt->first_same_value = 0;
1081:
1082: /* Remove the table element from its equivalence class. */
1083:
1084: {
1085: register struct table_elt *prev = elt->prev_same_value;
1086: register struct table_elt *next = elt->next_same_value;
1087:
1088: if (next) next->prev_same_value = prev;
1089:
1090: if (prev)
1091: prev->next_same_value = next;
1092: else
1093: {
1094: register struct table_elt *newfirst = next;
1095: while (next)
1096: {
1097: next->first_same_value = newfirst;
1098: next = next->next_same_value;
1099: }
1100: }
1101: }
1102:
1103: /* Remove the table element from its hash bucket. */
1104:
1105: {
1106: register struct table_elt *prev = elt->prev_same_hash;
1107: register struct table_elt *next = elt->next_same_hash;
1108:
1109: if (next) next->prev_same_hash = prev;
1110:
1111: if (prev)
1112: prev->next_same_hash = next;
1113: else if (table[hash] == elt)
1114: table[hash] = next;
1115: else
1116: {
1117: /* This entry is not in the proper hash bucket. This can happen
1118: when two classes were merged by `merge_equiv_classes'. Search
1119: for the hash bucket that it heads. This happens only very
1120: rarely, so the cost is acceptable. */
1121: for (hash = 0; hash < NBUCKETS; hash++)
1122: if (table[hash] == elt)
1123: table[hash] = next;
1124: }
1125: }
1126:
1127: /* Remove the table element from its related-value circular chain. */
1128:
1129: if (elt->related_value != 0 && elt->related_value != elt)
1130: {
1131: register struct table_elt *p = elt->related_value;
1132: while (p->related_value != elt)
1133: p = p->related_value;
1134: p->related_value = elt->related_value;
1135: if (p->related_value == p)
1136: p->related_value = 0;
1137: }
1138:
1139: free_element (elt);
1140: }
1141:
1142: /* Look up X in the hash table and return its table element,
1143: or 0 if X is not in the table.
1144:
1145: MODE is the machine-mode of X, or if X is an integer constant
1146: with VOIDmode then MODE is the mode with which X will be used.
1147:
1148: Here we are satisfied to find an expression whose tree structure
1149: looks like X. */
1150:
1151: static struct table_elt *
1152: lookup (x, hash, mode)
1153: rtx x;
1154: int hash;
1155: enum machine_mode mode;
1156: {
1157: register struct table_elt *p;
1158:
1159: for (p = table[hash]; p; p = p->next_same_hash)
1160: if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1161: || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1162: return p;
1163:
1164: return 0;
1165: }
1166:
1167: /* Like `lookup' but don't care whether the table element uses invalid regs.
1168: Also ignore discrepancies in the machine mode of a register. */
1169:
1170: static struct table_elt *
1171: lookup_for_remove (x, hash, mode)
1172: rtx x;
1173: int hash;
1174: enum machine_mode mode;
1175: {
1176: register struct table_elt *p;
1177:
1178: if (GET_CODE (x) == REG)
1179: {
1180: int regno = REGNO (x);
1181: /* Don't check the machine mode when comparing registers;
1182: invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1183: for (p = table[hash]; p; p = p->next_same_hash)
1184: if (GET_CODE (p->exp) == REG
1185: && REGNO (p->exp) == regno)
1186: return p;
1187: }
1188: else
1189: {
1190: for (p = table[hash]; p; p = p->next_same_hash)
1191: if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1192: return p;
1193: }
1194:
1195: return 0;
1196: }
1197:
1198: /* Look for an expression equivalent to X and with code CODE.
1199: If one is found, return that expression. */
1200:
1201: static rtx
1202: lookup_as_function (x, code)
1203: rtx x;
1204: enum rtx_code code;
1205: {
1206: register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1207: GET_MODE (x));
1208: if (p == 0)
1209: return 0;
1210:
1211: for (p = p->first_same_value; p; p = p->next_same_value)
1212: {
1213: if (GET_CODE (p->exp) == code
1214: /* Make sure this is a valid entry in the table. */
1215: && exp_equiv_p (p->exp, p->exp, 1, 0))
1216: return p->exp;
1217: }
1218:
1219: return 0;
1220: }
1221:
1222: /* Insert X in the hash table, assuming HASH is its hash code
1223: and CLASSP is an element of the class it should go in
1224: (or 0 if a new class should be made).
1225: It is inserted at the proper position to keep the class in
1226: the order cheapest first.
1227:
1228: MODE is the machine-mode of X, or if X is an integer constant
1229: with VOIDmode then MODE is the mode with which X will be used.
1230:
1231: For elements of equal cheapness, the most recent one
1232: goes in front, except that the first element in the list
1233: remains first unless a cheaper element is added. The order of
1234: pseudo-registers does not matter, as canon_reg will be called to
1.1.1.3 root 1235: find the cheapest when a register is retrieved from the table.
1.1 root 1236:
1237: The in_memory field in the hash table element is set to 0.
1238: The caller must set it nonzero if appropriate.
1239:
1240: You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1241: and if insert_regs returns a nonzero value
1242: you must then recompute its hash code before calling here.
1243:
1244: If necessary, update table showing constant values of quantities. */
1245:
1246: #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1247:
1248: static struct table_elt *
1249: insert (x, classp, hash, mode)
1250: register rtx x;
1251: register struct table_elt *classp;
1252: int hash;
1253: enum machine_mode mode;
1254: {
1255: register struct table_elt *elt;
1256:
1257: /* If X is a register and we haven't made a quantity for it,
1258: something is wrong. */
1259: if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1260: abort ();
1261:
1262: /* If X is a hard register, show it is being put in the table. */
1263: if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1264: {
1265: int regno = REGNO (x);
1266: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1267: int i;
1268:
1269: for (i = regno; i < endregno; i++)
1270: SET_HARD_REG_BIT (hard_regs_in_table, i);
1271: }
1272:
1273:
1274: /* Put an element for X into the right hash bucket. */
1275:
1276: elt = get_element ();
1277: elt->exp = x;
1278: elt->cost = COST (x);
1279: elt->next_same_value = 0;
1280: elt->prev_same_value = 0;
1281: elt->next_same_hash = table[hash];
1282: elt->prev_same_hash = 0;
1283: elt->related_value = 0;
1284: elt->in_memory = 0;
1285: elt->mode = mode;
1286: elt->is_const = (CONSTANT_P (x)
1287: /* GNU C++ takes advantage of this for `this'
1288: (and other const values). */
1289: || (RTX_UNCHANGING_P (x)
1290: && GET_CODE (x) == REG
1291: && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1292: || FIXED_BASE_PLUS_P (x));
1293:
1294: if (table[hash])
1295: table[hash]->prev_same_hash = elt;
1296: table[hash] = elt;
1297:
1298: /* Put it into the proper value-class. */
1299: if (classp)
1300: {
1301: classp = classp->first_same_value;
1302: if (CHEAPER (elt, classp))
1303: /* Insert at the head of the class */
1304: {
1305: register struct table_elt *p;
1306: elt->next_same_value = classp;
1307: classp->prev_same_value = elt;
1308: elt->first_same_value = elt;
1309:
1310: for (p = classp; p; p = p->next_same_value)
1311: p->first_same_value = elt;
1312: }
1313: else
1314: {
1315: /* Insert not at head of the class. */
1316: /* Put it after the last element cheaper than X. */
1317: register struct table_elt *p, *next;
1318: for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1319: p = next);
1320: /* Put it after P and before NEXT. */
1321: elt->next_same_value = next;
1322: if (next)
1323: next->prev_same_value = elt;
1324: elt->prev_same_value = p;
1325: p->next_same_value = elt;
1326: elt->first_same_value = classp;
1327: }
1328: }
1329: else
1330: elt->first_same_value = elt;
1331:
1332: /* If this is a constant being set equivalent to a register or a register
1333: being set equivalent to a constant, note the constant equivalence.
1334:
1335: If this is a constant, it cannot be equivalent to a different constant,
1336: and a constant is the only thing that can be cheaper than a register. So
1337: we know the register is the head of the class (before the constant was
1338: inserted).
1339:
1340: If this is a register that is not already known equivalent to a
1341: constant, we must check the entire class.
1342:
1343: If this is a register that is already known equivalent to an insn,
1344: update `qty_const_insn' to show that `this_insn' is the latest
1345: insn making that quantity equivalent to the constant. */
1346:
1347: if (elt->is_const && classp && GET_CODE (classp->exp) == REG)
1348: {
1349: qty_const[reg_qty[REGNO (classp->exp)]]
1350: = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x);
1351: qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn;
1352: }
1353:
1354: else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]])
1355: {
1356: register struct table_elt *p;
1357:
1358: for (p = classp; p != 0; p = p->next_same_value)
1359: {
1360: if (p->is_const)
1361: {
1362: qty_const[reg_qty[REGNO (x)]]
1363: = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1364: qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1365: break;
1366: }
1367: }
1368: }
1369:
1370: else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]]
1371: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]])
1372: qty_const_insn[reg_qty[REGNO (x)]] = this_insn;
1373:
1374: /* If this is a constant with symbolic value,
1375: and it has a term with an explicit integer value,
1376: link it up with related expressions. */
1377: if (GET_CODE (x) == CONST)
1378: {
1379: rtx subexp = get_related_value (x);
1380: int subhash;
1381: struct table_elt *subelt, *subelt_prev;
1382:
1383: if (subexp != 0)
1384: {
1385: /* Get the integer-free subexpression in the hash table. */
1386: subhash = safe_hash (subexp, mode) % NBUCKETS;
1387: subelt = lookup (subexp, subhash, mode);
1388: if (subelt == 0)
1.1.1.4 root 1389: subelt = insert (subexp, NULL_PTR, subhash, mode);
1.1 root 1390: /* Initialize SUBELT's circular chain if it has none. */
1391: if (subelt->related_value == 0)
1392: subelt->related_value = subelt;
1393: /* Find the element in the circular chain that precedes SUBELT. */
1394: subelt_prev = subelt;
1395: while (subelt_prev->related_value != subelt)
1396: subelt_prev = subelt_prev->related_value;
1397: /* Put new ELT into SUBELT's circular chain just before SUBELT.
1398: This way the element that follows SUBELT is the oldest one. */
1399: elt->related_value = subelt_prev->related_value;
1400: subelt_prev->related_value = elt;
1401: }
1402: }
1403:
1404: return elt;
1405: }
1406:
1407: /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1408: CLASS2 into CLASS1. This is done when we have reached an insn which makes
1409: the two classes equivalent.
1410:
1411: CLASS1 will be the surviving class; CLASS2 should not be used after this
1412: call.
1413:
1414: Any invalid entries in CLASS2 will not be copied. */
1415:
1416: static void
1417: merge_equiv_classes (class1, class2)
1418: struct table_elt *class1, *class2;
1419: {
1420: struct table_elt *elt, *next, *new;
1421:
1422: /* Ensure we start with the head of the classes. */
1423: class1 = class1->first_same_value;
1424: class2 = class2->first_same_value;
1425:
1426: /* If they were already equal, forget it. */
1427: if (class1 == class2)
1428: return;
1429:
1430: for (elt = class2; elt; elt = next)
1431: {
1432: int hash;
1433: rtx exp = elt->exp;
1434: enum machine_mode mode = elt->mode;
1435:
1436: next = elt->next_same_value;
1437:
1438: /* Remove old entry, make a new one in CLASS1's class.
1439: Don't do this for invalid entries as we cannot find their
1440: hash code (it also isn't necessary). */
1441: if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1442: {
1443: hash_arg_in_memory = 0;
1444: hash_arg_in_struct = 0;
1445: hash = HASH (exp, mode);
1446:
1447: if (GET_CODE (exp) == REG)
1448: delete_reg_equiv (REGNO (exp));
1449:
1450: remove_from_table (elt, hash);
1451:
1452: if (insert_regs (exp, class1, 0))
1453: hash = HASH (exp, mode);
1454: new = insert (exp, class1, hash, mode);
1455: new->in_memory = hash_arg_in_memory;
1456: new->in_struct = hash_arg_in_struct;
1457: }
1458: }
1459: }
1460:
1461: /* Remove from the hash table, or mark as invalid,
1462: all expressions whose values could be altered by storing in X.
1463: X is a register, a subreg, or a memory reference with nonvarying address
1464: (because, when a memory reference with a varying address is stored in,
1465: all memory references are removed by invalidate_memory
1466: so specific invalidation is superfluous).
1467:
1468: A nonvarying address may be just a register or just
1469: a symbol reference, or it may be either of those plus
1470: a numeric offset. */
1471:
1472: static void
1473: invalidate (x)
1474: rtx x;
1475: {
1476: register int i;
1477: register struct table_elt *p;
1.1.1.5 root 1478: rtx base;
1479: HOST_WIDE_INT start, end;
1.1 root 1480:
1481: /* If X is a register, dependencies on its contents
1482: are recorded through the qty number mechanism.
1483: Just change the qty number of the register,
1484: mark it as invalid for expressions that refer to it,
1485: and remove it itself. */
1486:
1487: if (GET_CODE (x) == REG)
1488: {
1489: register int regno = REGNO (x);
1490: register int hash = HASH (x, GET_MODE (x));
1491:
1492: /* Remove REGNO from any quantity list it might be on and indicate
1493: that it's value might have changed. If it is a pseudo, remove its
1494: entry from the hash table.
1495:
1496: For a hard register, we do the first two actions above for any
1497: additional hard registers corresponding to X. Then, if any of these
1498: registers are in the table, we must remove any REG entries that
1499: overlap these registers. */
1500:
1501: delete_reg_equiv (regno);
1502: reg_tick[regno]++;
1503:
1504: if (regno >= FIRST_PSEUDO_REGISTER)
1505: remove_from_table (lookup_for_remove (x, hash, GET_MODE (x)), hash);
1506: else
1507: {
1.1.1.5 root 1508: HOST_WIDE_INT in_table
1509: = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1.1 root 1510: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1511: int tregno, tendregno;
1512: register struct table_elt *p, *next;
1513:
1514: CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1515:
1516: for (i = regno + 1; i < endregno; i++)
1517: {
1518: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1519: CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1520: delete_reg_equiv (i);
1521: reg_tick[i]++;
1522: }
1523:
1524: if (in_table)
1525: for (hash = 0; hash < NBUCKETS; hash++)
1526: for (p = table[hash]; p; p = next)
1527: {
1528: next = p->next_same_hash;
1529:
1530: if (GET_CODE (p->exp) != REG
1531: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1532: continue;
1533:
1534: tregno = REGNO (p->exp);
1535: tendregno
1536: = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1537: if (tendregno > regno && tregno < endregno)
1538: remove_from_table (p, hash);
1539: }
1540: }
1541:
1542: return;
1543: }
1544:
1545: if (GET_CODE (x) == SUBREG)
1546: {
1547: if (GET_CODE (SUBREG_REG (x)) != REG)
1548: abort ();
1549: invalidate (SUBREG_REG (x));
1550: return;
1551: }
1552:
1553: /* X is not a register; it must be a memory reference with
1554: a nonvarying address. Remove all hash table elements
1555: that refer to overlapping pieces of memory. */
1556:
1557: if (GET_CODE (x) != MEM)
1558: abort ();
1559:
1.1.1.5 root 1560: set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (GET_MODE (x)),
1561: &base, &start, &end);
1.1 root 1562:
1563: for (i = 0; i < NBUCKETS; i++)
1564: {
1565: register struct table_elt *next;
1566: for (p = table[i]; p; p = next)
1567: {
1568: next = p->next_same_hash;
1569: if (refers_to_mem_p (p->exp, base, start, end))
1570: remove_from_table (p, i);
1571: }
1572: }
1573: }
1574:
1575: /* Remove all expressions that refer to register REGNO,
1576: since they are already invalid, and we are about to
1577: mark that register valid again and don't want the old
1578: expressions to reappear as valid. */
1579:
1580: static void
1581: remove_invalid_refs (regno)
1582: int regno;
1583: {
1584: register int i;
1585: register struct table_elt *p, *next;
1586:
1587: for (i = 0; i < NBUCKETS; i++)
1588: for (p = table[i]; p; p = next)
1589: {
1590: next = p->next_same_hash;
1591: if (GET_CODE (p->exp) != REG
1.1.1.4 root 1592: && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1.1 root 1593: remove_from_table (p, i);
1594: }
1595: }
1596:
1597: /* Recompute the hash codes of any valid entries in the hash table that
1598: reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1599:
1600: This is called when we make a jump equivalence. */
1601:
1602: static void
1603: rehash_using_reg (x)
1604: rtx x;
1605: {
1606: int i;
1607: struct table_elt *p, *next;
1608: int hash;
1609:
1610: if (GET_CODE (x) == SUBREG)
1611: x = SUBREG_REG (x);
1612:
1613: /* If X is not a register or if the register is known not to be in any
1614: valid entries in the table, we have no work to do. */
1615:
1616: if (GET_CODE (x) != REG
1617: || reg_in_table[REGNO (x)] < 0
1618: || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)])
1619: return;
1620:
1621: /* Scan all hash chains looking for valid entries that mention X.
1622: If we find one and it is in the wrong hash chain, move it. We can skip
1623: objects that are registers, since they are handled specially. */
1624:
1625: for (i = 0; i < NBUCKETS; i++)
1626: for (p = table[i]; p; p = next)
1627: {
1628: next = p->next_same_hash;
1629: if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1.1.1.2 root 1630: && exp_equiv_p (p->exp, p->exp, 1, 0)
1.1 root 1631: && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1632: {
1633: if (p->next_same_hash)
1634: p->next_same_hash->prev_same_hash = p->prev_same_hash;
1635:
1636: if (p->prev_same_hash)
1637: p->prev_same_hash->next_same_hash = p->next_same_hash;
1638: else
1639: table[i] = p->next_same_hash;
1640:
1641: p->next_same_hash = table[hash];
1642: p->prev_same_hash = 0;
1643: if (table[hash])
1644: table[hash]->prev_same_hash = p;
1645: table[hash] = p;
1646: }
1647: }
1648: }
1649:
1650: /* Remove from the hash table all expressions that reference memory,
1651: or some of them as specified by *WRITES. */
1652:
1653: static void
1654: invalidate_memory (writes)
1655: struct write_data *writes;
1656: {
1657: register int i;
1658: register struct table_elt *p, *next;
1659: int all = writes->all;
1660: int nonscalar = writes->nonscalar;
1661:
1662: for (i = 0; i < NBUCKETS; i++)
1663: for (p = table[i]; p; p = next)
1664: {
1665: next = p->next_same_hash;
1666: if (p->in_memory
1667: && (all
1668: || (nonscalar && p->in_struct)
1669: || cse_rtx_addr_varies_p (p->exp)))
1670: remove_from_table (p, i);
1671: }
1672: }
1673:
1674: /* Remove from the hash table any expression that is a call-clobbered
1675: register. Also update their TICK values. */
1676:
1677: static void
1678: invalidate_for_call ()
1679: {
1680: int regno, endregno;
1681: int i;
1682: int hash;
1683: struct table_elt *p, *next;
1684: int in_table = 0;
1685:
1686: /* Go through all the hard registers. For each that is clobbered in
1687: a CALL_INSN, remove the register from quantity chains and update
1688: reg_tick if defined. Also see if any of these registers is currently
1689: in the table. */
1690:
1691: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1692: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1693: {
1694: delete_reg_equiv (regno);
1695: if (reg_tick[regno] >= 0)
1696: reg_tick[regno]++;
1697:
1698: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1699: }
1700:
1701: /* In the case where we have no call-clobbered hard registers in the
1702: table, we are done. Otherwise, scan the table and remove any
1703: entry that overlaps a call-clobbered register. */
1704:
1705: if (in_table)
1706: for (hash = 0; hash < NBUCKETS; hash++)
1707: for (p = table[hash]; p; p = next)
1708: {
1709: next = p->next_same_hash;
1710:
1711: if (GET_CODE (p->exp) != REG
1712: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1713: continue;
1714:
1715: regno = REGNO (p->exp);
1716: endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1717:
1718: for (i = regno; i < endregno; i++)
1719: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1720: {
1721: remove_from_table (p, hash);
1722: break;
1723: }
1724: }
1725: }
1726:
1727: /* Given an expression X of type CONST,
1728: and ELT which is its table entry (or 0 if it
1729: is not in the hash table),
1730: return an alternate expression for X as a register plus integer.
1731: If none can be found, return 0. */
1732:
1733: static rtx
1734: use_related_value (x, elt)
1735: rtx x;
1736: struct table_elt *elt;
1737: {
1738: register struct table_elt *relt = 0;
1739: register struct table_elt *p, *q;
1.1.1.4 root 1740: HOST_WIDE_INT offset;
1.1 root 1741:
1742: /* First, is there anything related known?
1743: If we have a table element, we can tell from that.
1744: Otherwise, must look it up. */
1745:
1746: if (elt != 0 && elt->related_value != 0)
1747: relt = elt;
1748: else if (elt == 0 && GET_CODE (x) == CONST)
1749: {
1750: rtx subexp = get_related_value (x);
1751: if (subexp != 0)
1752: relt = lookup (subexp,
1753: safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
1754: GET_MODE (subexp));
1755: }
1756:
1757: if (relt == 0)
1758: return 0;
1759:
1760: /* Search all related table entries for one that has an
1761: equivalent register. */
1762:
1763: p = relt;
1764: while (1)
1765: {
1766: /* This loop is strange in that it is executed in two different cases.
1767: The first is when X is already in the table. Then it is searching
1768: the RELATED_VALUE list of X's class (RELT). The second case is when
1769: X is not in the table. Then RELT points to a class for the related
1770: value.
1771:
1772: Ensure that, whatever case we are in, that we ignore classes that have
1773: the same value as X. */
1774:
1775: if (rtx_equal_p (x, p->exp))
1776: q = 0;
1777: else
1778: for (q = p->first_same_value; q; q = q->next_same_value)
1779: if (GET_CODE (q->exp) == REG)
1780: break;
1781:
1782: if (q)
1783: break;
1784:
1785: p = p->related_value;
1786:
1787: /* We went all the way around, so there is nothing to be found.
1788: Alternatively, perhaps RELT was in the table for some other reason
1789: and it has no related values recorded. */
1790: if (p == relt || p == 0)
1791: break;
1792: }
1793:
1794: if (q == 0)
1795: return 0;
1796:
1797: offset = (get_integer_term (x) - get_integer_term (p->exp));
1798: /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
1799: return plus_constant (q->exp, offset);
1800: }
1801:
1802: /* Hash an rtx. We are careful to make sure the value is never negative.
1803: Equivalent registers hash identically.
1804: MODE is used in hashing for CONST_INTs only;
1805: otherwise the mode of X is used.
1806:
1807: Store 1 in do_not_record if any subexpression is volatile.
1808:
1809: Store 1 in hash_arg_in_memory if X contains a MEM rtx
1810: which does not have the RTX_UNCHANGING_P bit set.
1811: In this case, also store 1 in hash_arg_in_struct
1812: if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set.
1813:
1814: Note that cse_insn knows that the hash code of a MEM expression
1815: is just (int) MEM plus the hash code of the address. */
1816:
1817: static int
1818: canon_hash (x, mode)
1819: rtx x;
1820: enum machine_mode mode;
1821: {
1822: register int i, j;
1823: register int hash = 0;
1824: register enum rtx_code code;
1825: register char *fmt;
1826:
1827: /* repeat is used to turn tail-recursion into iteration. */
1828: repeat:
1829: if (x == 0)
1830: return hash;
1831:
1832: code = GET_CODE (x);
1833: switch (code)
1834: {
1835: case REG:
1836: {
1837: register int regno = REGNO (x);
1838:
1839: /* On some machines, we can't record any non-fixed hard register,
1840: because extending its life will cause reload problems. We
1841: consider ap, fp, and sp to be fixed for this purpose.
1842: On all machines, we can't record any global registers. */
1843:
1844: if (regno < FIRST_PSEUDO_REGISTER
1845: && (global_regs[regno]
1846: #ifdef SMALL_REGISTER_CLASSES
1847: || (! fixed_regs[regno]
1848: && regno != FRAME_POINTER_REGNUM
1.1.1.6 ! root 1849: && regno != HARD_FRAME_POINTER_REGNUM
1.1 root 1850: && regno != ARG_POINTER_REGNUM
1851: && regno != STACK_POINTER_REGNUM)
1852: #endif
1853: ))
1854: {
1855: do_not_record = 1;
1856: return 0;
1857: }
1858: return hash + ((int) REG << 7) + reg_qty[regno];
1859: }
1860:
1861: case CONST_INT:
1862: hash += ((int) mode + ((int) CONST_INT << 7)
1863: + INTVAL (x) + (INTVAL (x) >> HASHBITS));
1864: return ((1 << HASHBITS) - 1) & hash;
1865:
1866: case CONST_DOUBLE:
1867: /* This is like the general case, except that it only counts
1868: the integers representing the constant. */
1869: hash += (int) code + (int) GET_MODE (x);
1870: {
1871: int i;
1872: for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
1873: {
1874: int tem = XINT (x, i);
1875: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1876: }
1877: }
1878: return hash;
1879:
1880: /* Assume there is only one rtx object for any given label. */
1881: case LABEL_REF:
1882: /* Use `and' to ensure a positive number. */
1.1.1.4 root 1883: return (hash + ((HOST_WIDE_INT) LABEL_REF << 7)
1884: + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1)));
1.1 root 1885:
1886: case SYMBOL_REF:
1.1.1.4 root 1887: return (hash + ((HOST_WIDE_INT) SYMBOL_REF << 7)
1888: + ((HOST_WIDE_INT) XEXP (x, 0) & ((1 << HASHBITS) - 1)));
1.1 root 1889:
1890: case MEM:
1891: if (MEM_VOLATILE_P (x))
1892: {
1893: do_not_record = 1;
1894: return 0;
1895: }
1896: if (! RTX_UNCHANGING_P (x))
1897: {
1898: hash_arg_in_memory = 1;
1899: if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1;
1900: }
1901: /* Now that we have already found this special case,
1902: might as well speed it up as much as possible. */
1903: hash += (int) MEM;
1904: x = XEXP (x, 0);
1905: goto repeat;
1906:
1907: case PRE_DEC:
1908: case PRE_INC:
1909: case POST_DEC:
1910: case POST_INC:
1911: case PC:
1912: case CC0:
1913: case CALL:
1914: case UNSPEC_VOLATILE:
1915: do_not_record = 1;
1916: return 0;
1917:
1918: case ASM_OPERANDS:
1919: if (MEM_VOLATILE_P (x))
1920: {
1921: do_not_record = 1;
1922: return 0;
1923: }
1924: }
1925:
1926: i = GET_RTX_LENGTH (code) - 1;
1927: hash += (int) code + (int) GET_MODE (x);
1928: fmt = GET_RTX_FORMAT (code);
1929: for (; i >= 0; i--)
1930: {
1931: if (fmt[i] == 'e')
1932: {
1933: rtx tem = XEXP (x, i);
1934: rtx tem1;
1935:
1936: /* If the operand is a REG that is equivalent to a constant, hash
1937: as if we were hashing the constant, since we will be comparing
1938: that way. */
1939: if (tem != 0 && GET_CODE (tem) == REG
1940: && REGNO_QTY_VALID_P (REGNO (tem))
1941: && qty_mode[reg_qty[REGNO (tem)]] == GET_MODE (tem)
1942: && (tem1 = qty_const[reg_qty[REGNO (tem)]]) != 0
1943: && CONSTANT_P (tem1))
1944: tem = tem1;
1945:
1946: /* If we are about to do the last recursive call
1947: needed at this level, change it into iteration.
1948: This function is called enough to be worth it. */
1949: if (i == 0)
1950: {
1951: x = tem;
1952: goto repeat;
1953: }
1954: hash += canon_hash (tem, 0);
1955: }
1956: else if (fmt[i] == 'E')
1957: for (j = 0; j < XVECLEN (x, i); j++)
1958: hash += canon_hash (XVECEXP (x, i, j), 0);
1959: else if (fmt[i] == 's')
1960: {
1961: register char *p = XSTR (x, i);
1962: if (p)
1963: while (*p)
1964: {
1965: register int tem = *p++;
1966: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1967: }
1968: }
1969: else if (fmt[i] == 'i')
1970: {
1971: register int tem = XINT (x, i);
1972: hash += ((1 << HASHBITS) - 1) & (tem + (tem >> HASHBITS));
1973: }
1974: else
1975: abort ();
1976: }
1977: return hash;
1978: }
1979:
1980: /* Like canon_hash but with no side effects. */
1981:
1982: static int
1983: safe_hash (x, mode)
1984: rtx x;
1985: enum machine_mode mode;
1986: {
1987: int save_do_not_record = do_not_record;
1988: int save_hash_arg_in_memory = hash_arg_in_memory;
1989: int save_hash_arg_in_struct = hash_arg_in_struct;
1990: int hash = canon_hash (x, mode);
1991: hash_arg_in_memory = save_hash_arg_in_memory;
1992: hash_arg_in_struct = save_hash_arg_in_struct;
1993: do_not_record = save_do_not_record;
1994: return hash;
1995: }
1996:
1997: /* Return 1 iff X and Y would canonicalize into the same thing,
1998: without actually constructing the canonicalization of either one.
1999: If VALIDATE is nonzero,
2000: we assume X is an expression being processed from the rtl
2001: and Y was found in the hash table. We check register refs
2002: in Y for being marked as valid.
2003:
2004: If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2005: that is known to be in the register. Ordinarily, we don't allow them
2006: to match, because letting them match would cause unpredictable results
2007: in all the places that search a hash table chain for an equivalent
2008: for a given value. A possible equivalent that has different structure
2009: has its hash code computed from different data. Whether the hash code
2010: is the same as that of the the given value is pure luck. */
2011:
2012: static int
2013: exp_equiv_p (x, y, validate, equal_values)
2014: rtx x, y;
2015: int validate;
2016: int equal_values;
2017: {
1.1.1.4 root 2018: register int i, j;
1.1 root 2019: register enum rtx_code code;
2020: register char *fmt;
2021:
2022: /* Note: it is incorrect to assume an expression is equivalent to itself
2023: if VALIDATE is nonzero. */
2024: if (x == y && !validate)
2025: return 1;
2026: if (x == 0 || y == 0)
2027: return x == y;
2028:
2029: code = GET_CODE (x);
2030: if (code != GET_CODE (y))
2031: {
2032: if (!equal_values)
2033: return 0;
2034:
2035: /* If X is a constant and Y is a register or vice versa, they may be
2036: equivalent. We only have to validate if Y is a register. */
2037: if (CONSTANT_P (x) && GET_CODE (y) == REG
2038: && REGNO_QTY_VALID_P (REGNO (y))
2039: && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]]
2040: && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]])
2041: && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)]))
2042: return 1;
2043:
2044: if (CONSTANT_P (y) && code == REG
2045: && REGNO_QTY_VALID_P (REGNO (x))
2046: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]
2047: && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]]))
2048: return 1;
2049:
2050: return 0;
2051: }
2052:
2053: /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2054: if (GET_MODE (x) != GET_MODE (y))
2055: return 0;
2056:
2057: switch (code)
2058: {
2059: case PC:
2060: case CC0:
2061: return x == y;
2062:
2063: case CONST_INT:
1.1.1.4 root 2064: return INTVAL (x) == INTVAL (y);
1.1 root 2065:
2066: case LABEL_REF:
2067: case SYMBOL_REF:
2068: return XEXP (x, 0) == XEXP (y, 0);
2069:
2070: case REG:
2071: {
2072: int regno = REGNO (y);
2073: int endregno
2074: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2075: : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2076: int i;
2077:
2078: /* If the quantities are not the same, the expressions are not
2079: equivalent. If there are and we are not to validate, they
2080: are equivalent. Otherwise, ensure all regs are up-to-date. */
2081:
2082: if (reg_qty[REGNO (x)] != reg_qty[regno])
2083: return 0;
2084:
2085: if (! validate)
2086: return 1;
2087:
2088: for (i = regno; i < endregno; i++)
2089: if (reg_in_table[i] != reg_tick[i])
2090: return 0;
2091:
2092: return 1;
2093: }
2094:
2095: /* For commutative operations, check both orders. */
2096: case PLUS:
2097: case MULT:
2098: case AND:
2099: case IOR:
2100: case XOR:
2101: case NE:
2102: case EQ:
2103: return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2104: && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2105: validate, equal_values))
2106: || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2107: validate, equal_values)
2108: && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2109: validate, equal_values)));
2110: }
2111:
2112: /* Compare the elements. If any pair of corresponding elements
2113: fail to match, return 0 for the whole things. */
2114:
2115: fmt = GET_RTX_FORMAT (code);
2116: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2117: {
1.1.1.4 root 2118: switch (fmt[i])
1.1 root 2119: {
1.1.1.4 root 2120: case 'e':
1.1 root 2121: if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2122: return 0;
1.1.1.4 root 2123: break;
2124:
2125: case 'E':
1.1 root 2126: if (XVECLEN (x, i) != XVECLEN (y, i))
2127: return 0;
2128: for (j = 0; j < XVECLEN (x, i); j++)
2129: if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2130: validate, equal_values))
2131: return 0;
1.1.1.4 root 2132: break;
2133:
2134: case 's':
1.1 root 2135: if (strcmp (XSTR (x, i), XSTR (y, i)))
2136: return 0;
1.1.1.4 root 2137: break;
2138:
2139: case 'i':
1.1 root 2140: if (XINT (x, i) != XINT (y, i))
2141: return 0;
1.1.1.4 root 2142: break;
2143:
2144: case 'w':
2145: if (XWINT (x, i) != XWINT (y, i))
2146: return 0;
2147: break;
2148:
2149: case '0':
2150: break;
2151:
2152: default:
2153: abort ();
1.1 root 2154: }
1.1.1.4 root 2155: }
2156:
1.1 root 2157: return 1;
2158: }
2159:
2160: /* Return 1 iff any subexpression of X matches Y.
2161: Here we do not require that X or Y be valid (for registers referred to)
2162: for being in the hash table. */
2163:
1.1.1.5 root 2164: static int
1.1 root 2165: refers_to_p (x, y)
2166: rtx x, y;
2167: {
2168: register int i;
2169: register enum rtx_code code;
2170: register char *fmt;
2171:
2172: repeat:
2173: if (x == y)
2174: return 1;
2175: if (x == 0 || y == 0)
2176: return 0;
2177:
2178: code = GET_CODE (x);
2179: /* If X as a whole has the same code as Y, they may match.
2180: If so, return 1. */
2181: if (code == GET_CODE (y))
2182: {
2183: if (exp_equiv_p (x, y, 0, 1))
2184: return 1;
2185: }
2186:
2187: /* X does not match, so try its subexpressions. */
2188:
2189: fmt = GET_RTX_FORMAT (code);
2190: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2191: if (fmt[i] == 'e')
2192: {
2193: if (i == 0)
2194: {
2195: x = XEXP (x, 0);
2196: goto repeat;
2197: }
2198: else
2199: if (refers_to_p (XEXP (x, i), y))
2200: return 1;
2201: }
2202: else if (fmt[i] == 'E')
2203: {
2204: int j;
2205: for (j = 0; j < XVECLEN (x, i); j++)
2206: if (refers_to_p (XVECEXP (x, i, j), y))
2207: return 1;
2208: }
2209:
2210: return 0;
2211: }
2212:
1.1.1.5 root 2213: /* Given ADDR and SIZE (a memory address, and the size of the memory reference),
2214: set PBASE, PSTART, and PEND which correspond to the base of the address,
2215: the starting offset, and ending offset respectively.
2216:
2217: ADDR is known to be a nonvarying address.
2218:
2219: cse_address_varies_p returns zero for nonvarying addresses. */
2220:
2221: static void
2222: set_nonvarying_address_components (addr, size, pbase, pstart, pend)
2223: rtx addr;
2224: int size;
2225: rtx *pbase;
2226: HOST_WIDE_INT *pstart, *pend;
2227: {
2228: rtx base;
2229: int start, end;
2230:
2231: base = addr;
2232: start = 0;
2233: end = 0;
2234:
2235: /* Registers with nonvarying addresses usually have constant equivalents;
2236: but the frame pointer register is also possible. */
2237: if (GET_CODE (base) == REG
2238: && qty_const != 0
2239: && REGNO_QTY_VALID_P (REGNO (base))
2240: && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base)
2241: && qty_const[reg_qty[REGNO (base)]] != 0)
2242: base = qty_const[reg_qty[REGNO (base)]];
2243: else if (GET_CODE (base) == PLUS
2244: && GET_CODE (XEXP (base, 1)) == CONST_INT
2245: && GET_CODE (XEXP (base, 0)) == REG
2246: && qty_const != 0
2247: && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0)))
2248: && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]]
2249: == GET_MODE (XEXP (base, 0)))
2250: && qty_const[reg_qty[REGNO (XEXP (base, 0))]])
2251: {
2252: start = INTVAL (XEXP (base, 1));
2253: base = qty_const[reg_qty[REGNO (XEXP (base, 0))]];
2254: }
2255:
2256: /* By definition, operand1 of a LO_SUM is the associated constant
2257: address. Use the associated constant address as the base instead. */
2258: if (GET_CODE (base) == LO_SUM)
2259: base = XEXP (base, 1);
2260:
2261: /* Strip off CONST. */
2262: if (GET_CODE (base) == CONST)
2263: base = XEXP (base, 0);
2264:
2265: if (GET_CODE (base) == PLUS
2266: && GET_CODE (XEXP (base, 1)) == CONST_INT)
2267: {
2268: start += INTVAL (XEXP (base, 1));
2269: base = XEXP (base, 0);
2270: }
2271:
2272: end = start + size;
2273:
2274: /* Set the return values. */
2275: *pbase = base;
2276: *pstart = start;
2277: *pend = end;
2278: }
2279:
1.1 root 2280: /* Return 1 iff any subexpression of X refers to memory
2281: at an address of BASE plus some offset
2282: such that any of the bytes' offsets fall between START (inclusive)
2283: and END (exclusive).
2284:
1.1.1.5 root 2285: The value is undefined if X is a varying address (as determined by
2286: cse_rtx_addr_varies_p). This function is not used in such cases.
1.1 root 2287:
2288: When used in the cse pass, `qty_const' is nonzero, and it is used
2289: to treat an address that is a register with a known constant value
2290: as if it were that constant value.
2291: In the loop pass, `qty_const' is zero, so this is not done. */
2292:
1.1.1.5 root 2293: static int
1.1 root 2294: refers_to_mem_p (x, base, start, end)
2295: rtx x, base;
1.1.1.4 root 2296: HOST_WIDE_INT start, end;
1.1 root 2297: {
1.1.1.4 root 2298: register HOST_WIDE_INT i;
1.1 root 2299: register enum rtx_code code;
2300: register char *fmt;
2301:
2302: if (GET_CODE (base) == CONST_INT)
2303: {
2304: start += INTVAL (base);
2305: end += INTVAL (base);
2306: base = const0_rtx;
2307: }
2308:
2309: repeat:
2310: if (x == 0)
2311: return 0;
2312:
2313: code = GET_CODE (x);
2314: if (code == MEM)
2315: {
2316: register rtx addr = XEXP (x, 0); /* Get the address. */
1.1.1.5 root 2317: rtx mybase;
2318: HOST_WIDE_INT mystart, myend;
1.1 root 2319:
1.1.1.5 root 2320: set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)),
2321: &mybase, &mystart, &myend);
2322:
2323:
2324: /* refers_to_mem_p is never called with varying addresses.
2325: If the base addresses are not equal, there is no chance
2326: of the memory addresses conflicting. */
2327: if (! rtx_equal_p (mybase, base))
1.1 root 2328: return 0;
2329:
1.1.1.5 root 2330: return myend > start && mystart < end;
1.1 root 2331: }
2332:
2333: /* X does not match, so try its subexpressions. */
2334:
2335: fmt = GET_RTX_FORMAT (code);
2336: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2337: if (fmt[i] == 'e')
2338: {
2339: if (i == 0)
2340: {
2341: x = XEXP (x, 0);
2342: goto repeat;
2343: }
2344: else
2345: if (refers_to_mem_p (XEXP (x, i), base, start, end))
2346: return 1;
2347: }
2348: else if (fmt[i] == 'E')
2349: {
2350: int j;
2351: for (j = 0; j < XVECLEN (x, i); j++)
2352: if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end))
2353: return 1;
2354: }
2355:
2356: return 0;
2357: }
2358:
2359: /* Nonzero if X refers to memory at a varying address;
2360: except that a register which has at the moment a known constant value
2361: isn't considered variable. */
2362:
2363: static int
2364: cse_rtx_addr_varies_p (x)
2365: rtx x;
2366: {
2367: /* We need not check for X and the equivalence class being of the same
2368: mode because if X is equivalent to a constant in some mode, it
2369: doesn't vary in any mode. */
2370:
2371: if (GET_CODE (x) == MEM
2372: && GET_CODE (XEXP (x, 0)) == REG
2373: && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2374: && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]]
2375: && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0)
2376: return 0;
2377:
2378: if (GET_CODE (x) == MEM
2379: && GET_CODE (XEXP (x, 0)) == PLUS
2380: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
2381: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
2382: && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0)))
2383: && (GET_MODE (XEXP (XEXP (x, 0), 0))
2384: == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2385: && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]])
2386: return 0;
2387:
2388: return rtx_addr_varies_p (x);
2389: }
2390:
2391: /* Canonicalize an expression:
2392: replace each register reference inside it
2393: with the "oldest" equivalent register.
2394:
2395: If INSN is non-zero and we are replacing a pseudo with a hard register
1.1.1.4 root 2396: or vice versa, validate_change is used to ensure that INSN remains valid
2397: after we make our substitution. The calls are made with IN_GROUP non-zero
2398: so apply_change_group must be called upon the outermost return from this
2399: function (unless INSN is zero). The result of apply_change_group can
2400: generally be discarded since the changes we are making are optional. */
1.1 root 2401:
2402: static rtx
2403: canon_reg (x, insn)
2404: rtx x;
2405: rtx insn;
2406: {
2407: register int i;
2408: register enum rtx_code code;
2409: register char *fmt;
2410:
2411: if (x == 0)
2412: return x;
2413:
2414: code = GET_CODE (x);
2415: switch (code)
2416: {
2417: case PC:
2418: case CC0:
2419: case CONST:
2420: case CONST_INT:
2421: case CONST_DOUBLE:
2422: case SYMBOL_REF:
2423: case LABEL_REF:
2424: case ADDR_VEC:
2425: case ADDR_DIFF_VEC:
2426: return x;
2427:
2428: case REG:
2429: {
2430: register int first;
2431:
2432: /* Never replace a hard reg, because hard regs can appear
2433: in more than one machine mode, and we must preserve the mode
2434: of each occurrence. Also, some hard regs appear in
2435: MEMs that are shared and mustn't be altered. Don't try to
2436: replace any reg that maps to a reg of class NO_REGS. */
2437: if (REGNO (x) < FIRST_PSEUDO_REGISTER
2438: || ! REGNO_QTY_VALID_P (REGNO (x)))
2439: return x;
2440:
2441: first = qty_first_reg[reg_qty[REGNO (x)]];
2442: return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2443: : REGNO_REG_CLASS (first) == NO_REGS ? x
2444: : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first));
2445: }
2446: }
2447:
2448: fmt = GET_RTX_FORMAT (code);
2449: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2450: {
2451: register int j;
2452:
2453: if (fmt[i] == 'e')
2454: {
2455: rtx new = canon_reg (XEXP (x, i), insn);
2456:
2457: /* If replacing pseudo with hard reg or vice versa, ensure the
1.1.1.3 root 2458: insn remains valid. Likewise if the insn has MATCH_DUPs. */
1.1.1.4 root 2459: if (insn != 0 && new != 0
2460: && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
1.1.1.3 root 2461: && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2462: != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
1.1.1.4 root 2463: || insn_n_dups[recog_memoized (insn)] > 0))
2464: validate_change (insn, &XEXP (x, i), new, 1);
1.1 root 2465: else
2466: XEXP (x, i) = new;
2467: }
2468: else if (fmt[i] == 'E')
2469: for (j = 0; j < XVECLEN (x, i); j++)
2470: XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2471: }
2472:
2473: return x;
2474: }
2475:
2476: /* LOC is a location with INSN that is an operand address (the contents of
2477: a MEM). Find the best equivalent address to use that is valid for this
2478: insn.
2479:
2480: On most CISC machines, complicated address modes are costly, and rtx_cost
2481: is a good approximation for that cost. However, most RISC machines have
2482: only a few (usually only one) memory reference formats. If an address is
2483: valid at all, it is often just as cheap as any other address. Hence, for
2484: RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2485: costs of various addresses. For two addresses of equal cost, choose the one
2486: with the highest `rtx_cost' value as that has the potential of eliminating
2487: the most insns. For equal costs, we choose the first in the equivalence
2488: class. Note that we ignore the fact that pseudo registers are cheaper
2489: than hard registers here because we would also prefer the pseudo registers.
2490: */
2491:
1.1.1.5 root 2492: static void
1.1 root 2493: find_best_addr (insn, loc)
2494: rtx insn;
2495: rtx *loc;
2496: {
2497: struct table_elt *elt, *p;
2498: rtx addr = *loc;
2499: int our_cost;
2500: int found_better = 1;
2501: int save_do_not_record = do_not_record;
2502: int save_hash_arg_in_memory = hash_arg_in_memory;
2503: int save_hash_arg_in_struct = hash_arg_in_struct;
2504: int hash_code;
2505: int addr_volatile;
2506: int regno;
2507:
2508: /* Do not try to replace constant addresses or addresses of local and
2509: argument slots. These MEM expressions are made only once and inserted
2510: in many instructions, as well as being used to control symbol table
2511: output. It is not safe to clobber them.
2512:
2513: There are some uncommon cases where the address is already in a register
2514: for some reason, but we cannot take advantage of that because we have
2515: no easy way to unshare the MEM. In addition, looking up all stack
2516: addresses is costly. */
2517: if ((GET_CODE (addr) == PLUS
2518: && GET_CODE (XEXP (addr, 0)) == REG
2519: && GET_CODE (XEXP (addr, 1)) == CONST_INT
2520: && (regno = REGNO (XEXP (addr, 0)),
1.1.1.6 ! root 2521: regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
! 2522: || regno == ARG_POINTER_REGNUM))
1.1 root 2523: || (GET_CODE (addr) == REG
1.1.1.6 ! root 2524: && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
! 2525: || regno == HARD_FRAME_POINTER_REGNUM
! 2526: || regno == ARG_POINTER_REGNUM))
1.1 root 2527: || CONSTANT_ADDRESS_P (addr))
2528: return;
2529:
2530: /* If this address is not simply a register, try to fold it. This will
2531: sometimes simplify the expression. Many simplifications
2532: will not be valid, but some, usually applying the associative rule, will
2533: be valid and produce better code. */
2534: if (GET_CODE (addr) != REG
2535: && validate_change (insn, loc, fold_rtx (addr, insn), 0))
2536: addr = *loc;
2537:
1.1.1.4 root 2538: /* If this address is not in the hash table, we can't look for equivalences
2539: of the whole address. Also, ignore if volatile. */
2540:
1.1 root 2541: do_not_record = 0;
2542: hash_code = HASH (addr, Pmode);
2543: addr_volatile = do_not_record;
2544: do_not_record = save_do_not_record;
2545: hash_arg_in_memory = save_hash_arg_in_memory;
2546: hash_arg_in_struct = save_hash_arg_in_struct;
2547:
2548: if (addr_volatile)
2549: return;
2550:
2551: elt = lookup (addr, hash_code, Pmode);
2552:
2553: #ifndef ADDRESS_COST
1.1.1.4 root 2554: if (elt)
2555: {
2556: our_cost = elt->cost;
1.1 root 2557:
1.1.1.4 root 2558: /* Find the lowest cost below ours that works. */
2559: for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2560: if (elt->cost < our_cost
2561: && (GET_CODE (elt->exp) == REG
2562: || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2563: && validate_change (insn, loc,
2564: canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2565: return;
2566: }
1.1 root 2567: #else
2568:
1.1.1.4 root 2569: if (elt)
2570: {
2571: /* We need to find the best (under the criteria documented above) entry
2572: in the class that is valid. We use the `flag' field to indicate
2573: choices that were invalid and iterate until we can't find a better
2574: one that hasn't already been tried. */
2575:
2576: for (p = elt->first_same_value; p; p = p->next_same_value)
2577: p->flag = 0;
1.1 root 2578:
1.1.1.4 root 2579: while (found_better)
2580: {
2581: int best_addr_cost = ADDRESS_COST (*loc);
2582: int best_rtx_cost = (elt->cost + 1) >> 1;
2583: struct table_elt *best_elt = elt;
2584:
2585: found_better = 0;
2586: for (p = elt->first_same_value; p; p = p->next_same_value)
2587: if (! p->flag
2588: && (GET_CODE (p->exp) == REG
2589: || exp_equiv_p (p->exp, p->exp, 1, 0))
2590: && (ADDRESS_COST (p->exp) < best_addr_cost
2591: || (ADDRESS_COST (p->exp) == best_addr_cost
2592: && (p->cost + 1) >> 1 > best_rtx_cost)))
2593: {
2594: found_better = 1;
2595: best_addr_cost = ADDRESS_COST (p->exp);
2596: best_rtx_cost = (p->cost + 1) >> 1;
2597: best_elt = p;
2598: }
1.1 root 2599:
1.1.1.4 root 2600: if (found_better)
2601: {
2602: if (validate_change (insn, loc,
2603: canon_reg (copy_rtx (best_elt->exp),
2604: NULL_RTX), 0))
2605: return;
2606: else
2607: best_elt->flag = 1;
2608: }
2609: }
2610: }
2611:
2612: /* If the address is a binary operation with the first operand a register
2613: and the second a constant, do the same as above, but looking for
2614: equivalences of the register. Then try to simplify before checking for
2615: the best address to use. This catches a few cases: First is when we
2616: have REG+const and the register is another REG+const. We can often merge
2617: the constants and eliminate one insn and one register. It may also be
2618: that a machine has a cheap REG+REG+const. Finally, this improves the
2619: code on the Alpha for unaligned byte stores. */
2620:
2621: if (flag_expensive_optimizations
2622: && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2623: || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2624: && GET_CODE (XEXP (*loc, 0)) == REG
2625: && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
1.1 root 2626: {
1.1.1.4 root 2627: rtx c = XEXP (*loc, 1);
2628:
2629: do_not_record = 0;
2630: hash_code = HASH (XEXP (*loc, 0), Pmode);
2631: do_not_record = save_do_not_record;
2632: hash_arg_in_memory = save_hash_arg_in_memory;
2633: hash_arg_in_struct = save_hash_arg_in_struct;
2634:
2635: elt = lookup (XEXP (*loc, 0), hash_code, Pmode);
2636: if (elt == 0)
2637: return;
2638:
2639: /* We need to find the best (under the criteria documented above) entry
2640: in the class that is valid. We use the `flag' field to indicate
2641: choices that were invalid and iterate until we can't find a better
2642: one that hasn't already been tried. */
1.1 root 2643:
2644: for (p = elt->first_same_value; p; p = p->next_same_value)
1.1.1.4 root 2645: p->flag = 0;
1.1 root 2646:
1.1.1.4 root 2647: while (found_better)
1.1 root 2648: {
1.1.1.4 root 2649: int best_addr_cost = ADDRESS_COST (*loc);
2650: int best_rtx_cost = (COST (*loc) + 1) >> 1;
2651: struct table_elt *best_elt = elt;
2652: rtx best_rtx = *loc;
2653:
2654: found_better = 0;
2655: for (p = elt->first_same_value; p; p = p->next_same_value)
2656: if (! p->flag
2657: && (GET_CODE (p->exp) == REG
2658: || exp_equiv_p (p->exp, p->exp, 1, 0)))
2659: {
1.1.1.5 root 2660: rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c);
1.1.1.4 root 2661:
2662: if ((ADDRESS_COST (new) < best_addr_cost
2663: || (ADDRESS_COST (new) == best_addr_cost
2664: && (COST (new) + 1) >> 1 > best_rtx_cost)))
2665: {
2666: found_better = 1;
2667: best_addr_cost = ADDRESS_COST (new);
2668: best_rtx_cost = (COST (new) + 1) >> 1;
2669: best_elt = p;
2670: best_rtx = new;
2671: }
2672: }
2673:
2674: if (found_better)
2675: {
2676: if (validate_change (insn, loc,
2677: canon_reg (copy_rtx (best_rtx),
2678: NULL_RTX), 0))
2679: return;
2680: else
2681: best_elt->flag = 1;
2682: }
1.1 root 2683: }
2684: }
2685: #endif
2686: }
2687:
2688: /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2689: operation (EQ, NE, GT, etc.), follow it back through the hash table and
2690: what values are being compared.
2691:
2692: *PARG1 and *PARG2 are updated to contain the rtx representing the values
2693: actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2694: was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2695: compared to produce cc0.
2696:
2697: The return value is the comparison operator and is either the code of
2698: A or the code corresponding to the inverse of the comparison. */
2699:
2700: static enum rtx_code
1.1.1.4 root 2701: find_comparison_args (code, parg1, parg2, pmode1, pmode2)
1.1 root 2702: enum rtx_code code;
2703: rtx *parg1, *parg2;
1.1.1.4 root 2704: enum machine_mode *pmode1, *pmode2;
1.1 root 2705: {
2706: rtx arg1, arg2;
2707:
2708: arg1 = *parg1, arg2 = *parg2;
2709:
2710: /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2711:
1.1.1.4 root 2712: while (arg2 == CONST0_RTX (GET_MODE (arg1)))
1.1 root 2713: {
2714: /* Set non-zero when we find something of interest. */
2715: rtx x = 0;
2716: int reverse_code = 0;
2717: struct table_elt *p = 0;
2718:
2719: /* If arg1 is a COMPARE, extract the comparison arguments from it.
2720: On machines with CC0, this is the only case that can occur, since
2721: fold_rtx will return the COMPARE or item being compared with zero
2722: when given CC0. */
2723:
2724: if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2725: x = arg1;
2726:
2727: /* If ARG1 is a comparison operator and CODE is testing for
2728: STORE_FLAG_VALUE, get the inner arguments. */
2729:
2730: else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2731: {
1.1.1.4 root 2732: if (code == NE
2733: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2734: && code == LT && STORE_FLAG_VALUE == -1)
2735: #ifdef FLOAT_STORE_FLAG_VALUE
2736: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2737: && FLOAT_STORE_FLAG_VALUE < 0)
2738: #endif
2739: )
1.1 root 2740: x = arg1;
1.1.1.4 root 2741: else if (code == EQ
2742: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2743: && code == GE && STORE_FLAG_VALUE == -1)
2744: #ifdef FLOAT_STORE_FLAG_VALUE
2745: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2746: && FLOAT_STORE_FLAG_VALUE < 0)
2747: #endif
2748: )
1.1 root 2749: x = arg1, reverse_code = 1;
2750: }
2751:
2752: /* ??? We could also check for
2753:
2754: (ne (and (eq (...) (const_int 1))) (const_int 0))
2755:
2756: and related forms, but let's wait until we see them occurring. */
2757:
2758: if (x == 0)
2759: /* Look up ARG1 in the hash table and see if it has an equivalence
2760: that lets us see what is being compared. */
2761: p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2762: GET_MODE (arg1));
2763: if (p) p = p->first_same_value;
2764:
2765: for (; p; p = p->next_same_value)
2766: {
2767: enum machine_mode inner_mode = GET_MODE (p->exp);
2768:
2769: /* If the entry isn't valid, skip it. */
2770: if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2771: continue;
2772:
2773: if (GET_CODE (p->exp) == COMPARE
2774: /* Another possibility is that this machine has a compare insn
2775: that includes the comparison code. In that case, ARG1 would
2776: be equivalent to a comparison operation that would set ARG1 to
2777: either STORE_FLAG_VALUE or zero. If this is an NE operation,
2778: ORIG_CODE is the actual comparison being done; if it is an EQ,
2779: we must reverse ORIG_CODE. On machine with a negative value
2780: for STORE_FLAG_VALUE, also look at LT and GE operations. */
2781: || ((code == NE
2782: || (code == LT
1.1.1.4 root 2783: && GET_MODE_CLASS (inner_mode) == MODE_INT
2784: && (GET_MODE_BITSIZE (inner_mode)
2785: <= HOST_BITS_PER_WIDE_INT)
1.1 root 2786: && (STORE_FLAG_VALUE
1.1.1.4 root 2787: & ((HOST_WIDE_INT) 1
2788: << (GET_MODE_BITSIZE (inner_mode) - 1))))
2789: #ifdef FLOAT_STORE_FLAG_VALUE
2790: || (code == LT
2791: && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2792: && FLOAT_STORE_FLAG_VALUE < 0)
2793: #endif
2794: )
1.1 root 2795: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2796: {
2797: x = p->exp;
2798: break;
2799: }
2800: else if ((code == EQ
2801: || (code == GE
1.1.1.4 root 2802: && GET_MODE_CLASS (inner_mode) == MODE_INT
2803: && (GET_MODE_BITSIZE (inner_mode)
2804: <= HOST_BITS_PER_WIDE_INT)
1.1 root 2805: && (STORE_FLAG_VALUE
1.1.1.4 root 2806: & ((HOST_WIDE_INT) 1
2807: << (GET_MODE_BITSIZE (inner_mode) - 1))))
2808: #ifdef FLOAT_STORE_FLAG_VALUE
2809: || (code == GE
2810: && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2811: && FLOAT_STORE_FLAG_VALUE < 0)
2812: #endif
2813: )
1.1 root 2814: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2815: {
2816: reverse_code = 1;
2817: x = p->exp;
2818: break;
2819: }
2820:
2821: /* If this is fp + constant, the equivalent is a better operand since
2822: it may let us predict the value of the comparison. */
2823: else if (NONZERO_BASE_PLUS_P (p->exp))
2824: {
2825: arg1 = p->exp;
2826: continue;
2827: }
2828: }
2829:
2830: /* If we didn't find a useful equivalence for ARG1, we are done.
2831: Otherwise, set up for the next iteration. */
2832: if (x == 0)
2833: break;
2834:
2835: arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2836: if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2837: code = GET_CODE (x);
2838:
2839: if (reverse_code)
2840: code = reverse_condition (code);
2841: }
2842:
1.1.1.4 root 2843: /* Return our results. Return the modes from before fold_rtx
2844: because fold_rtx might produce const_int, and then it's too late. */
2845: *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
1.1 root 2846: *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2847:
2848: return code;
2849: }
2850:
2851: /* Try to simplify a unary operation CODE whose output mode is to be
2852: MODE with input operand OP whose mode was originally OP_MODE.
2853: Return zero if no simplification can be made. */
2854:
2855: rtx
2856: simplify_unary_operation (code, mode, op, op_mode)
2857: enum rtx_code code;
2858: enum machine_mode mode;
2859: rtx op;
2860: enum machine_mode op_mode;
2861: {
2862: register int width = GET_MODE_BITSIZE (mode);
2863:
2864: /* The order of these tests is critical so that, for example, we don't
2865: check the wrong mode (input vs. output) for a conversion operation,
2866: such as FIX. At some point, this should be simplified. */
2867:
2868: #if !defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
2869: if (code == FLOAT && GET_CODE (op) == CONST_INT)
2870: {
2871: REAL_VALUE_TYPE d;
2872:
2873: #ifdef REAL_ARITHMETIC
2874: REAL_VALUE_FROM_INT (d, INTVAL (op), INTVAL (op) < 0 ? ~0 : 0);
2875: #else
2876: d = (double) INTVAL (op);
2877: #endif
2878: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2879: }
2880: else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_INT)
2881: {
2882: REAL_VALUE_TYPE d;
2883:
2884: #ifdef REAL_ARITHMETIC
2885: REAL_VALUE_FROM_INT (d, INTVAL (op), 0);
2886: #else
2887: d = (double) (unsigned int) INTVAL (op);
2888: #endif
2889: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2890: }
2891:
2892: else if (code == FLOAT && GET_CODE (op) == CONST_DOUBLE
2893: && GET_MODE (op) == VOIDmode)
2894: {
2895: REAL_VALUE_TYPE d;
2896:
2897: #ifdef REAL_ARITHMETIC
2898: REAL_VALUE_FROM_INT (d, CONST_DOUBLE_LOW (op), CONST_DOUBLE_HIGH (op));
2899: #else
2900: if (CONST_DOUBLE_HIGH (op) < 0)
2901: {
2902: d = (double) (~ CONST_DOUBLE_HIGH (op));
1.1.1.4 root 2903: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2904: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2905: d += (double) (unsigned HOST_WIDE_INT) (~ CONST_DOUBLE_LOW (op));
1.1 root 2906: d = (- d - 1.0);
2907: }
2908: else
2909: {
2910: d = (double) CONST_DOUBLE_HIGH (op);
1.1.1.4 root 2911: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2912: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2913: d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
1.1 root 2914: }
2915: #endif /* REAL_ARITHMETIC */
2916: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2917: }
2918: else if (code == UNSIGNED_FLOAT && GET_CODE (op) == CONST_DOUBLE
2919: && GET_MODE (op) == VOIDmode)
2920: {
2921: REAL_VALUE_TYPE d;
2922:
2923: #ifdef REAL_ARITHMETIC
2924: REAL_VALUE_FROM_UNSIGNED_INT (d, CONST_DOUBLE_LOW (op),
2925: CONST_DOUBLE_HIGH (op));
2926: #else
2927: d = (double) CONST_DOUBLE_HIGH (op);
1.1.1.4 root 2928: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))
2929: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)));
2930: d += (double) (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (op);
1.1 root 2931: #endif /* REAL_ARITHMETIC */
2932: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode);
2933: }
2934: #endif
2935:
1.1.1.4 root 2936: if (GET_CODE (op) == CONST_INT
2937: && width <= HOST_BITS_PER_WIDE_INT && width > 0)
1.1 root 2938: {
1.1.1.4 root 2939: register HOST_WIDE_INT arg0 = INTVAL (op);
2940: register HOST_WIDE_INT val;
1.1 root 2941:
2942: switch (code)
2943: {
2944: case NOT:
2945: val = ~ arg0;
2946: break;
2947:
2948: case NEG:
2949: val = - arg0;
2950: break;
2951:
2952: case ABS:
2953: val = (arg0 >= 0 ? arg0 : - arg0);
2954: break;
2955:
2956: case FFS:
2957: /* Don't use ffs here. Instead, get low order bit and then its
2958: number. If arg0 is zero, this will return 0, as desired. */
2959: arg0 &= GET_MODE_MASK (mode);
2960: val = exact_log2 (arg0 & (- arg0)) + 1;
2961: break;
2962:
2963: case TRUNCATE:
2964: val = arg0;
2965: break;
2966:
2967: case ZERO_EXTEND:
2968: if (op_mode == VOIDmode)
2969: op_mode = mode;
1.1.1.4 root 2970: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
2971: {
2972: /* If we were really extending the mode,
2973: we would have to distinguish between zero-extension
2974: and sign-extension. */
2975: if (width != GET_MODE_BITSIZE (op_mode))
2976: abort ();
2977: val = arg0;
2978: }
2979: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
2980: val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
1.1 root 2981: else
2982: return 0;
2983: break;
2984:
2985: case SIGN_EXTEND:
2986: if (op_mode == VOIDmode)
2987: op_mode = mode;
1.1.1.4 root 2988: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT)
2989: {
2990: /* If we were really extending the mode,
2991: we would have to distinguish between zero-extension
2992: and sign-extension. */
2993: if (width != GET_MODE_BITSIZE (op_mode))
2994: abort ();
2995: val = arg0;
2996: }
2997: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT)
2998: {
2999: val
3000: = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode));
3001: if (val
3002: & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1)))
3003: val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
1.1 root 3004: }
3005: else
3006: return 0;
3007: break;
3008:
1.1.1.2 root 3009: case SQRT:
3010: return 0;
3011:
1.1 root 3012: default:
3013: abort ();
3014: }
3015:
3016: /* Clear the bits that don't belong in our mode,
3017: unless they and our sign bit are all one.
3018: So we get either a reasonable negative value or a reasonable
3019: unsigned value for this mode. */
1.1.1.4 root 3020: if (width < HOST_BITS_PER_WIDE_INT
3021: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3022: != ((HOST_WIDE_INT) (-1) << (width - 1))))
1.1 root 3023: val &= (1 << width) - 1;
3024:
1.1.1.4 root 3025: return GEN_INT (val);
1.1 root 3026: }
3027:
3028: /* We can do some operations on integer CONST_DOUBLEs. Also allow
3029: for a DImode operation on a CONST_INT. */
3030: else if (GET_MODE (op) == VOIDmode
3031: && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT))
3032: {
1.1.1.4 root 3033: HOST_WIDE_INT l1, h1, lv, hv;
1.1 root 3034:
3035: if (GET_CODE (op) == CONST_DOUBLE)
3036: l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op);
3037: else
3038: l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0;
3039:
3040: switch (code)
3041: {
3042: case NOT:
3043: lv = ~ l1;
3044: hv = ~ h1;
3045: break;
3046:
3047: case NEG:
3048: neg_double (l1, h1, &lv, &hv);
3049: break;
3050:
3051: case ABS:
3052: if (h1 < 0)
3053: neg_double (l1, h1, &lv, &hv);
3054: else
3055: lv = l1, hv = h1;
3056: break;
3057:
3058: case FFS:
3059: hv = 0;
3060: if (l1 == 0)
1.1.1.4 root 3061: lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1;
1.1 root 3062: else
3063: lv = exact_log2 (l1 & (-l1)) + 1;
3064: break;
3065:
3066: case TRUNCATE:
1.1.1.4 root 3067: if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
3068: return GEN_INT (l1 & GET_MODE_MASK (mode));
1.1 root 3069: else
3070: return 0;
3071: break;
3072:
1.1.1.4 root 3073: case ZERO_EXTEND:
3074: if (op_mode == VOIDmode
3075: || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3076: return 0;
3077:
3078: hv = 0;
3079: lv = l1 & GET_MODE_MASK (op_mode);
3080: break;
3081:
3082: case SIGN_EXTEND:
3083: if (op_mode == VOIDmode
3084: || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT)
3085: return 0;
3086: else
3087: {
3088: lv = l1 & GET_MODE_MASK (op_mode);
3089: if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT
3090: && (lv & ((HOST_WIDE_INT) 1
3091: << (GET_MODE_BITSIZE (op_mode) - 1))) != 0)
3092: lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode);
3093:
3094: hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0;
3095: }
3096: break;
3097:
1.1.1.2 root 3098: case SQRT:
3099: return 0;
3100:
1.1 root 3101: default:
3102: return 0;
3103: }
3104:
3105: return immed_double_const (lv, hv, mode);
3106: }
3107:
3108: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3109: else if (GET_CODE (op) == CONST_DOUBLE
3110: && GET_MODE_CLASS (mode) == MODE_FLOAT)
3111: {
3112: REAL_VALUE_TYPE d;
3113: jmp_buf handler;
3114: rtx x;
3115:
3116: if (setjmp (handler))
3117: /* There used to be a warning here, but that is inadvisable.
3118: People may want to cause traps, and the natural way
3119: to do it should not get a warning. */
3120: return 0;
3121:
3122: set_float_handler (handler);
3123:
3124: REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3125:
3126: switch (code)
3127: {
3128: case NEG:
3129: d = REAL_VALUE_NEGATE (d);
3130: break;
3131:
3132: case ABS:
1.1.1.3 root 3133: if (REAL_VALUE_NEGATIVE (d))
1.1 root 3134: d = REAL_VALUE_NEGATE (d);
3135: break;
3136:
3137: case FLOAT_TRUNCATE:
1.1.1.5 root 3138: d = real_value_truncate (mode, d);
1.1 root 3139: break;
3140:
3141: case FLOAT_EXTEND:
3142: /* All this does is change the mode. */
3143: break;
3144:
3145: case FIX:
1.1.1.5 root 3146: d = REAL_VALUE_RNDZINT (d);
1.1 root 3147: break;
3148:
3149: case UNSIGNED_FIX:
1.1.1.5 root 3150: d = REAL_VALUE_UNSIGNED_RNDZINT (d);
1.1 root 3151: break;
3152:
1.1.1.2 root 3153: case SQRT:
3154: return 0;
3155:
1.1 root 3156: default:
3157: abort ();
3158: }
3159:
3160: x = immed_real_const_1 (d, mode);
1.1.1.4 root 3161: set_float_handler (NULL_PTR);
1.1 root 3162: return x;
3163: }
3164: else if (GET_CODE (op) == CONST_DOUBLE && GET_MODE_CLASS (mode) == MODE_INT
1.1.1.4 root 3165: && width <= HOST_BITS_PER_WIDE_INT && width > 0)
1.1 root 3166: {
3167: REAL_VALUE_TYPE d;
3168: jmp_buf handler;
1.1.1.4 root 3169: HOST_WIDE_INT val;
1.1 root 3170:
3171: if (setjmp (handler))
3172: return 0;
3173:
3174: set_float_handler (handler);
3175:
3176: REAL_VALUE_FROM_CONST_DOUBLE (d, op);
3177:
3178: switch (code)
3179: {
3180: case FIX:
3181: val = REAL_VALUE_FIX (d);
3182: break;
3183:
3184: case UNSIGNED_FIX:
3185: val = REAL_VALUE_UNSIGNED_FIX (d);
3186: break;
3187:
3188: default:
3189: abort ();
3190: }
3191:
1.1.1.4 root 3192: set_float_handler (NULL_PTR);
1.1 root 3193:
3194: /* Clear the bits that don't belong in our mode,
3195: unless they and our sign bit are all one.
3196: So we get either a reasonable negative value or a reasonable
3197: unsigned value for this mode. */
1.1.1.4 root 3198: if (width < HOST_BITS_PER_WIDE_INT
3199: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3200: != ((HOST_WIDE_INT) (-1) << (width - 1))))
3201: val &= ((HOST_WIDE_INT) 1 << width) - 1;
1.1 root 3202:
1.1.1.4 root 3203: return GEN_INT (val);
1.1 root 3204: }
3205: #endif
1.1.1.3 root 3206: /* This was formerly used only for non-IEEE float.
3207: [email protected] says it is safe for IEEE also. */
3208: else
1.1 root 3209: {
3210: /* There are some simplifications we can do even if the operands
1.1.1.3 root 3211: aren't constant. */
1.1 root 3212: switch (code)
3213: {
3214: case NEG:
3215: case NOT:
3216: /* (not (not X)) == X, similarly for NEG. */
3217: if (GET_CODE (op) == code)
3218: return XEXP (op, 0);
3219: break;
3220:
3221: case SIGN_EXTEND:
3222: /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
3223: becomes just the MINUS if its mode is MODE. This allows
3224: folding switch statements on machines using casesi (such as
3225: the Vax). */
3226: if (GET_CODE (op) == TRUNCATE
3227: && GET_MODE (XEXP (op, 0)) == mode
3228: && GET_CODE (XEXP (op, 0)) == MINUS
3229: && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF
3230: && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF)
3231: return XEXP (op, 0);
3232: break;
3233: }
3234:
3235: return 0;
3236: }
3237: }
3238:
3239: /* Simplify a binary operation CODE with result mode MODE, operating on OP0
3240: and OP1. Return 0 if no simplification is possible.
3241:
3242: Don't use this for relational operations such as EQ or LT.
3243: Use simplify_relational_operation instead. */
3244:
3245: rtx
3246: simplify_binary_operation (code, mode, op0, op1)
3247: enum rtx_code code;
3248: enum machine_mode mode;
3249: rtx op0, op1;
3250: {
1.1.1.4 root 3251: register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
3252: HOST_WIDE_INT val;
1.1 root 3253: int width = GET_MODE_BITSIZE (mode);
1.1.1.5 root 3254: rtx tem;
1.1 root 3255:
3256: /* Relational operations don't work here. We must know the mode
3257: of the operands in order to do the comparison correctly.
3258: Assuming a full word can give incorrect results.
3259: Consider comparing 128 with -128 in QImode. */
3260:
3261: if (GET_RTX_CLASS (code) == '<')
3262: abort ();
3263:
3264: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3265: if (GET_MODE_CLASS (mode) == MODE_FLOAT
3266: && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE
3267: && mode == GET_MODE (op0) && mode == GET_MODE (op1))
3268: {
3269: REAL_VALUE_TYPE f0, f1, value;
3270: jmp_buf handler;
3271:
3272: if (setjmp (handler))
3273: return 0;
3274:
3275: set_float_handler (handler);
3276:
3277: REAL_VALUE_FROM_CONST_DOUBLE (f0, op0);
3278: REAL_VALUE_FROM_CONST_DOUBLE (f1, op1);
1.1.1.4 root 3279: f0 = real_value_truncate (mode, f0);
3280: f1 = real_value_truncate (mode, f1);
1.1 root 3281:
3282: #ifdef REAL_ARITHMETIC
1.1.1.5 root 3283: REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1);
1.1 root 3284: #else
3285: switch (code)
3286: {
3287: case PLUS:
3288: value = f0 + f1;
3289: break;
3290: case MINUS:
3291: value = f0 - f1;
3292: break;
3293: case MULT:
3294: value = f0 * f1;
3295: break;
3296: case DIV:
3297: #ifndef REAL_INFINITY
3298: if (f1 == 0)
1.1.1.4 root 3299: return 0;
1.1 root 3300: #endif
3301: value = f0 / f1;
3302: break;
3303: case SMIN:
3304: value = MIN (f0, f1);
3305: break;
3306: case SMAX:
3307: value = MAX (f0, f1);
3308: break;
3309: default:
3310: abort ();
3311: }
3312: #endif
3313:
1.1.1.4 root 3314: set_float_handler (NULL_PTR);
3315: value = real_value_truncate (mode, value);
1.1 root 3316: return immed_real_const_1 (value, mode);
3317: }
1.1.1.5 root 3318: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
1.1 root 3319:
3320: /* We can fold some multi-word operations. */
1.1.1.5 root 3321: if (GET_MODE_CLASS (mode) == MODE_INT
1.1.1.6 ! root 3322: && width == HOST_BITS_PER_WIDE_INT * 2
! 3323: && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT)
1.1.1.5 root 3324: && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT))
1.1 root 3325: {
1.1.1.4 root 3326: HOST_WIDE_INT l1, l2, h1, h2, lv, hv;
1.1 root 3327:
1.1.1.6 ! root 3328: if (GET_CODE (op0) == CONST_DOUBLE)
! 3329: l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0);
! 3330: else
! 3331: l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0;
1.1 root 3332:
3333: if (GET_CODE (op1) == CONST_DOUBLE)
3334: l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1);
3335: else
3336: l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0;
3337:
3338: switch (code)
3339: {
3340: case MINUS:
3341: /* A - B == A + (-B). */
3342: neg_double (l2, h2, &lv, &hv);
3343: l2 = lv, h2 = hv;
3344:
3345: /* .. fall through ... */
3346:
3347: case PLUS:
3348: add_double (l1, h1, l2, h2, &lv, &hv);
3349: break;
3350:
3351: case MULT:
3352: mul_double (l1, h1, l2, h2, &lv, &hv);
3353: break;
3354:
3355: case DIV: case MOD: case UDIV: case UMOD:
3356: /* We'd need to include tree.h to do this and it doesn't seem worth
3357: it. */
3358: return 0;
3359:
3360: case AND:
3361: lv = l1 & l2, hv = h1 & h2;
3362: break;
3363:
3364: case IOR:
3365: lv = l1 | l2, hv = h1 | h2;
3366: break;
3367:
3368: case XOR:
3369: lv = l1 ^ l2, hv = h1 ^ h2;
3370: break;
3371:
3372: case SMIN:
1.1.1.4 root 3373: if (h1 < h2
3374: || (h1 == h2
3375: && ((unsigned HOST_WIDE_INT) l1
3376: < (unsigned HOST_WIDE_INT) l2)))
1.1 root 3377: lv = l1, hv = h1;
3378: else
3379: lv = l2, hv = h2;
3380: break;
3381:
3382: case SMAX:
1.1.1.4 root 3383: if (h1 > h2
3384: || (h1 == h2
3385: && ((unsigned HOST_WIDE_INT) l1
3386: > (unsigned HOST_WIDE_INT) l2)))
1.1 root 3387: lv = l1, hv = h1;
3388: else
3389: lv = l2, hv = h2;
3390: break;
3391:
3392: case UMIN:
1.1.1.4 root 3393: if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2
3394: || (h1 == h2
3395: && ((unsigned HOST_WIDE_INT) l1
3396: < (unsigned HOST_WIDE_INT) l2)))
1.1 root 3397: lv = l1, hv = h1;
3398: else
3399: lv = l2, hv = h2;
3400: break;
3401:
3402: case UMAX:
1.1.1.4 root 3403: if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2
3404: || (h1 == h2
3405: && ((unsigned HOST_WIDE_INT) l1
3406: > (unsigned HOST_WIDE_INT) l2)))
1.1 root 3407: lv = l1, hv = h1;
3408: else
3409: lv = l2, hv = h2;
3410: break;
3411:
3412: case LSHIFTRT: case ASHIFTRT:
3413: case ASHIFT: case LSHIFT:
3414: case ROTATE: case ROTATERT:
3415: #ifdef SHIFT_COUNT_TRUNCATED
1.1.1.6 ! root 3416: if (SHIFT_COUNT_TRUNCATED)
! 3417: l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0;
1.1 root 3418: #endif
3419:
3420: if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode))
3421: return 0;
3422:
3423: if (code == LSHIFTRT || code == ASHIFTRT)
3424: rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3425: code == ASHIFTRT);
3426: else if (code == ASHIFT || code == LSHIFT)
3427: lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv,
3428: code == ASHIFT);
3429: else if (code == ROTATE)
3430: lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3431: else /* code == ROTATERT */
3432: rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv);
3433: break;
3434:
3435: default:
3436: return 0;
3437: }
3438:
3439: return immed_double_const (lv, hv, mode);
3440: }
3441:
3442: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT
1.1.1.4 root 3443: || width > HOST_BITS_PER_WIDE_INT || width == 0)
1.1 root 3444: {
3445: /* Even if we can't compute a constant result,
3446: there are some cases worth simplifying. */
3447:
3448: switch (code)
3449: {
3450: case PLUS:
3451: /* In IEEE floating point, x+0 is not the same as x. Similarly
3452: for the other optimizations below. */
3453: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
1.1.1.6 ! root 3454: && FLOAT_MODE_P (mode))
1.1 root 3455: break;
3456:
3457: if (op1 == CONST0_RTX (mode))
3458: return op0;
3459:
3460: /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */
3461: if (GET_CODE (op0) == NEG)
1.1.1.5 root 3462: return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0));
1.1 root 3463: else if (GET_CODE (op1) == NEG)
1.1.1.5 root 3464: return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0));
1.1 root 3465:
1.1.1.5 root 3466: /* Handle both-operands-constant cases. We can only add
3467: CONST_INTs to constants since the sum of relocatable symbols
1.1.1.6 ! root 3468: can't be handled by most assemblers. Don't add CONST_INT
! 3469: to CONST_INT since overflow won't be computed properly if wider
! 3470: than HOST_BITS_PER_WIDE_INT. */
1.1 root 3471:
1.1.1.6 ! root 3472: if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode
! 3473: && GET_CODE (op1) == CONST_INT)
1.1.1.5 root 3474: return plus_constant (op0, INTVAL (op1));
1.1.1.6 ! root 3475: else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode
! 3476: && GET_CODE (op0) == CONST_INT)
1.1.1.5 root 3477: return plus_constant (op1, INTVAL (op0));
1.1 root 3478:
1.1.1.5 root 3479: /* If one of the operands is a PLUS or a MINUS, see if we can
3480: simplify this by the associative law.
3481: Don't use the associative law for floating point.
3482: The inaccuracy makes it nonassociative,
3483: and subtle programs can break if operations are associated. */
1.1 root 3484:
1.1.1.6 ! root 3485: if (INTEGRAL_MODE_P (mode)
1.1.1.5 root 3486: && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3487: || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3488: && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3489: return tem;
1.1 root 3490: break;
3491:
3492: case COMPARE:
3493: #ifdef HAVE_cc0
3494: /* Convert (compare FOO (const_int 0)) to FOO unless we aren't
3495: using cc0, in which case we want to leave it as a COMPARE
3496: so we can distinguish it from a register-register-copy.
3497:
3498: In IEEE floating point, x-0 is not the same as x. */
3499:
3500: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1.1.1.6 ! root 3501: || ! FLOAT_MODE_P (mode))
1.1 root 3502: && op1 == CONST0_RTX (mode))
3503: return op0;
3504: #else
3505: /* Do nothing here. */
3506: #endif
3507: break;
3508:
3509: case MINUS:
1.1.1.3 root 3510: /* None of these optimizations can be done for IEEE
3511: floating point. */
3512: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT
1.1.1.6 ! root 3513: && FLOAT_MODE_P (mode))
1.1.1.3 root 3514: break;
3515:
3516: /* We can't assume x-x is 0 even with non-IEEE floating point. */
1.1 root 3517: if (rtx_equal_p (op0, op1)
3518: && ! side_effects_p (op0)
1.1.1.6 ! root 3519: && ! FLOAT_MODE_P (mode))
1.1 root 3520: return const0_rtx;
3521:
3522: /* Change subtraction from zero into negation. */
3523: if (op0 == CONST0_RTX (mode))
3524: return gen_rtx (NEG, mode, op1);
3525:
1.1.1.5 root 3526: /* (-1 - a) is ~a. */
3527: if (op0 == constm1_rtx)
3528: return gen_rtx (NOT, mode, op1);
3529:
1.1 root 3530: /* Subtracting 0 has no effect. */
3531: if (op1 == CONST0_RTX (mode))
3532: return op0;
3533:
3534: /* (a - (-b)) -> (a + b). */
3535: if (GET_CODE (op1) == NEG)
1.1.1.5 root 3536: return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0));
1.1 root 3537:
1.1.1.5 root 3538: /* If one of the operands is a PLUS or a MINUS, see if we can
3539: simplify this by the associative law.
3540: Don't use the associative law for floating point.
1.1 root 3541: The inaccuracy makes it nonassociative,
3542: and subtle programs can break if operations are associated. */
3543:
1.1.1.6 ! root 3544: if (INTEGRAL_MODE_P (mode)
1.1.1.5 root 3545: && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS
3546: || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS)
3547: && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0)
3548: return tem;
1.1 root 3549:
3550: /* Don't let a relocatable value get a negative coeff. */
1.1.1.6 ! root 3551: if (GET_CODE (op1) == CONST_INT && GET_MODE (op1) != VOIDmode)
1.1 root 3552: return plus_constant (op0, - INTVAL (op1));
3553: break;
3554:
3555: case MULT:
3556: if (op1 == constm1_rtx)
3557: {
1.1.1.5 root 3558: tem = simplify_unary_operation (NEG, mode, op0, mode);
1.1 root 3559:
3560: return tem ? tem : gen_rtx (NEG, mode, op0);
3561: }
3562:
3563: /* In IEEE floating point, x*0 is not always 0. */
3564: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1.1.1.6 ! root 3565: && ! FLOAT_MODE_P (mode))
1.1 root 3566: && op1 == CONST0_RTX (mode)
3567: && ! side_effects_p (op0))
3568: return op1;
3569:
3570: /* In IEEE floating point, x*1 is not equivalent to x for nans.
3571: However, ANSI says we can drop signals,
3572: so we can do this anyway. */
3573: if (op1 == CONST1_RTX (mode))
3574: return op0;
3575:
3576: /* Convert multiply by constant power of two into shift. */
3577: if (GET_CODE (op1) == CONST_INT
3578: && (val = exact_log2 (INTVAL (op1))) >= 0)
1.1.1.4 root 3579: return gen_rtx (ASHIFT, mode, op0, GEN_INT (val));
1.1 root 3580:
3581: if (GET_CODE (op1) == CONST_DOUBLE
3582: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT)
3583: {
3584: REAL_VALUE_TYPE d;
1.1.1.5 root 3585: jmp_buf handler;
3586: int op1is2, op1ism1;
3587:
3588: if (setjmp (handler))
3589: return 0;
3590:
3591: set_float_handler (handler);
1.1 root 3592: REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
1.1.1.5 root 3593: op1is2 = REAL_VALUES_EQUAL (d, dconst2);
3594: op1ism1 = REAL_VALUES_EQUAL (d, dconstm1);
3595: set_float_handler (NULL_PTR);
1.1 root 3596:
3597: /* x*2 is x+x and x*(-1) is -x */
1.1.1.5 root 3598: if (op1is2 && GET_MODE (op0) == mode)
1.1 root 3599: return gen_rtx (PLUS, mode, op0, copy_rtx (op0));
3600:
1.1.1.5 root 3601: else if (op1ism1 && GET_MODE (op0) == mode)
1.1 root 3602: return gen_rtx (NEG, mode, op0);
3603: }
3604: break;
3605:
3606: case IOR:
3607: if (op1 == const0_rtx)
3608: return op0;
3609: if (GET_CODE (op1) == CONST_INT
3610: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3611: return op1;
3612: if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3613: return op0;
3614: /* A | (~A) -> -1 */
3615: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3616: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1.1.1.5 root 3617: && ! side_effects_p (op0)
3618: && GET_MODE_CLASS (mode) != MODE_CC)
1.1 root 3619: return constm1_rtx;
3620: break;
3621:
3622: case XOR:
3623: if (op1 == const0_rtx)
3624: return op0;
3625: if (GET_CODE (op1) == CONST_INT
3626: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3627: return gen_rtx (NOT, mode, op0);
1.1.1.5 root 3628: if (op0 == op1 && ! side_effects_p (op0)
3629: && GET_MODE_CLASS (mode) != MODE_CC)
1.1 root 3630: return const0_rtx;
3631: break;
3632:
3633: case AND:
3634: if (op1 == const0_rtx && ! side_effects_p (op0))
3635: return const0_rtx;
3636: if (GET_CODE (op1) == CONST_INT
3637: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode))
3638: return op0;
1.1.1.5 root 3639: if (op0 == op1 && ! side_effects_p (op0)
3640: && GET_MODE_CLASS (mode) != MODE_CC)
1.1 root 3641: return op0;
3642: /* A & (~A) -> 0 */
3643: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1))
3644: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0)))
1.1.1.5 root 3645: && ! side_effects_p (op0)
3646: && GET_MODE_CLASS (mode) != MODE_CC)
1.1 root 3647: return const0_rtx;
3648: break;
3649:
3650: case UDIV:
3651: /* Convert divide by power of two into shift (divide by 1 handled
3652: below). */
3653: if (GET_CODE (op1) == CONST_INT
3654: && (arg1 = exact_log2 (INTVAL (op1))) > 0)
1.1.1.4 root 3655: return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1));
1.1 root 3656:
3657: /* ... fall through ... */
3658:
3659: case DIV:
3660: if (op1 == CONST1_RTX (mode))
3661: return op0;
1.1.1.4 root 3662:
3663: /* In IEEE floating point, 0/x is not always 0. */
3664: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1.1.1.6 ! root 3665: || ! FLOAT_MODE_P (mode))
1.1.1.4 root 3666: && op0 == CONST0_RTX (mode)
3667: && ! side_effects_p (op1))
1.1 root 3668: return op0;
1.1.1.4 root 3669:
1.1 root 3670: #if 0 /* Turned off till an expert says this is a safe thing to do. */
3671: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
3672: /* Change division by a constant into multiplication. */
3673: else if (GET_CODE (op1) == CONST_DOUBLE
3674: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT
3675: && op1 != CONST0_RTX (mode))
3676: {
3677: REAL_VALUE_TYPE d;
3678: REAL_VALUE_FROM_CONST_DOUBLE (d, op1);
3679: if (REAL_VALUES_EQUAL (d, dconst0))
3680: abort();
3681: #if defined (REAL_ARITHMETIC)
1.1.1.5 root 3682: REAL_ARITHMETIC (d, (int) RDIV_EXPR, dconst1, d);
1.1 root 3683: return gen_rtx (MULT, mode, op0,
3684: CONST_DOUBLE_FROM_REAL_VALUE (d, mode));
3685: #else
3686: return gen_rtx (MULT, mode, op0,
3687: CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode));
3688: }
3689: #endif
3690: #endif
3691: #endif
3692: break;
3693:
3694: case UMOD:
3695: /* Handle modulus by power of two (mod with 1 handled below). */
3696: if (GET_CODE (op1) == CONST_INT
3697: && exact_log2 (INTVAL (op1)) > 0)
1.1.1.4 root 3698: return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1));
1.1 root 3699:
3700: /* ... fall through ... */
3701:
3702: case MOD:
3703: if ((op0 == const0_rtx || op1 == const1_rtx)
3704: && ! side_effects_p (op0) && ! side_effects_p (op1))
3705: return const0_rtx;
3706: break;
3707:
3708: case ROTATERT:
3709: case ROTATE:
3710: /* Rotating ~0 always results in ~0. */
1.1.1.4 root 3711: if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT
1.1 root 3712: && INTVAL (op0) == GET_MODE_MASK (mode)
3713: && ! side_effects_p (op1))
3714: return op0;
3715:
3716: /* ... fall through ... */
3717:
3718: case LSHIFT:
3719: case ASHIFT:
3720: case ASHIFTRT:
3721: case LSHIFTRT:
3722: if (op1 == const0_rtx)
3723: return op0;
3724: if (op0 == const0_rtx && ! side_effects_p (op1))
3725: return op0;
3726: break;
3727:
3728: case SMIN:
1.1.1.4 root 3729: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
3730: && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1)
1.1 root 3731: && ! side_effects_p (op0))
3732: return op1;
3733: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3734: return op0;
3735: break;
3736:
3737: case SMAX:
1.1.1.4 root 3738: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT
1.1.1.5 root 3739: && (INTVAL (op1)
3740: == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1)
1.1 root 3741: && ! side_effects_p (op0))
3742: return op1;
3743: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3744: return op0;
3745: break;
3746:
3747: case UMIN:
3748: if (op1 == const0_rtx && ! side_effects_p (op0))
3749: return op1;
3750: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3751: return op0;
3752: break;
3753:
3754: case UMAX:
3755: if (op1 == constm1_rtx && ! side_effects_p (op0))
3756: return op1;
3757: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0))
3758: return op0;
3759: break;
3760:
3761: default:
3762: abort ();
3763: }
3764:
3765: return 0;
3766: }
3767:
3768: /* Get the integer argument values in two forms:
3769: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
3770:
3771: arg0 = INTVAL (op0);
3772: arg1 = INTVAL (op1);
3773:
1.1.1.4 root 3774: if (width < HOST_BITS_PER_WIDE_INT)
1.1 root 3775: {
1.1.1.4 root 3776: arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
3777: arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
1.1 root 3778:
3779: arg0s = arg0;
1.1.1.4 root 3780: if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
3781: arg0s |= ((HOST_WIDE_INT) (-1) << width);
1.1 root 3782:
3783: arg1s = arg1;
1.1.1.4 root 3784: if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
3785: arg1s |= ((HOST_WIDE_INT) (-1) << width);
1.1 root 3786: }
3787: else
3788: {
3789: arg0s = arg0;
3790: arg1s = arg1;
3791: }
3792:
3793: /* Compute the value of the arithmetic. */
3794:
3795: switch (code)
3796: {
3797: case PLUS:
1.1.1.2 root 3798: val = arg0s + arg1s;
1.1 root 3799: break;
3800:
3801: case MINUS:
1.1.1.2 root 3802: val = arg0s - arg1s;
1.1 root 3803: break;
3804:
3805: case MULT:
3806: val = arg0s * arg1s;
3807: break;
3808:
3809: case DIV:
3810: if (arg1s == 0)
3811: return 0;
3812: val = arg0s / arg1s;
3813: break;
3814:
3815: case MOD:
3816: if (arg1s == 0)
3817: return 0;
3818: val = arg0s % arg1s;
3819: break;
3820:
3821: case UDIV:
3822: if (arg1 == 0)
3823: return 0;
1.1.1.4 root 3824: val = (unsigned HOST_WIDE_INT) arg0 / arg1;
1.1 root 3825: break;
3826:
3827: case UMOD:
3828: if (arg1 == 0)
3829: return 0;
1.1.1.4 root 3830: val = (unsigned HOST_WIDE_INT) arg0 % arg1;
1.1 root 3831: break;
3832:
3833: case AND:
3834: val = arg0 & arg1;
3835: break;
3836:
3837: case IOR:
3838: val = arg0 | arg1;
3839: break;
3840:
3841: case XOR:
3842: val = arg0 ^ arg1;
3843: break;
3844:
3845: case LSHIFTRT:
3846: /* If shift count is undefined, don't fold it; let the machine do
3847: what it wants. But truncate it if the machine will do that. */
3848: if (arg1 < 0)
3849: return 0;
3850:
3851: #ifdef SHIFT_COUNT_TRUNCATED
1.1.1.6 ! root 3852: if (SHIFT_COUNT_TRUNCATED)
! 3853: arg1 &= (BITS_PER_WORD - 1);
1.1 root 3854: #endif
3855:
3856: if (arg1 >= width)
3857: return 0;
3858:
1.1.1.4 root 3859: val = ((unsigned HOST_WIDE_INT) arg0) >> arg1;
1.1 root 3860: break;
3861:
3862: case ASHIFT:
3863: case LSHIFT:
3864: if (arg1 < 0)
3865: return 0;
3866:
3867: #ifdef SHIFT_COUNT_TRUNCATED
1.1.1.6 ! root 3868: if (SHIFT_COUNT_TRUNCATED)
! 3869: arg1 &= (BITS_PER_WORD - 1);
1.1 root 3870: #endif
3871:
3872: if (arg1 >= width)
3873: return 0;
3874:
1.1.1.4 root 3875: val = ((unsigned HOST_WIDE_INT) arg0) << arg1;
1.1 root 3876: break;
3877:
3878: case ASHIFTRT:
3879: if (arg1 < 0)
3880: return 0;
3881:
3882: #ifdef SHIFT_COUNT_TRUNCATED
1.1.1.6 ! root 3883: if (SHIFT_COUNT_TRUNCATED)
! 3884: arg1 &= (BITS_PER_WORD - 1);
1.1 root 3885: #endif
3886:
3887: if (arg1 >= width)
3888: return 0;
3889:
3890: val = arg0s >> arg1;
1.1.1.4 root 3891:
3892: /* Bootstrap compiler may not have sign extended the right shift.
3893: Manually extend the sign to insure bootstrap cc matches gcc. */
3894: if (arg0s < 0 && arg1 > 0)
3895: val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1);
3896:
1.1 root 3897: break;
3898:
3899: case ROTATERT:
3900: if (arg1 < 0)
3901: return 0;
3902:
3903: arg1 %= width;
1.1.1.4 root 3904: val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1))
3905: | (((unsigned HOST_WIDE_INT) arg0) >> arg1));
1.1 root 3906: break;
3907:
3908: case ROTATE:
3909: if (arg1 < 0)
3910: return 0;
3911:
3912: arg1 %= width;
1.1.1.4 root 3913: val = ((((unsigned HOST_WIDE_INT) arg0) << arg1)
3914: | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1)));
1.1 root 3915: break;
3916:
3917: case COMPARE:
3918: /* Do nothing here. */
3919: return 0;
3920:
1.1.1.3 root 3921: case SMIN:
3922: val = arg0s <= arg1s ? arg0s : arg1s;
3923: break;
3924:
3925: case UMIN:
1.1.1.4 root 3926: val = ((unsigned HOST_WIDE_INT) arg0
3927: <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1.1.1.3 root 3928: break;
3929:
3930: case SMAX:
3931: val = arg0s > arg1s ? arg0s : arg1s;
3932: break;
3933:
3934: case UMAX:
1.1.1.4 root 3935: val = ((unsigned HOST_WIDE_INT) arg0
3936: > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1);
1.1.1.3 root 3937: break;
3938:
1.1 root 3939: default:
3940: abort ();
3941: }
3942:
3943: /* Clear the bits that don't belong in our mode, unless they and our sign
3944: bit are all one. So we get either a reasonable negative value or a
3945: reasonable unsigned value for this mode. */
1.1.1.4 root 3946: if (width < HOST_BITS_PER_WIDE_INT
3947: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
3948: != ((HOST_WIDE_INT) (-1) << (width - 1))))
3949: val &= ((HOST_WIDE_INT) 1 << width) - 1;
3950:
3951: return GEN_INT (val);
1.1 root 3952: }
3953:
1.1.1.5 root 3954: /* Simplify a PLUS or MINUS, at least one of whose operands may be another
3955: PLUS or MINUS.
3956:
3957: Rather than test for specific case, we do this by a brute-force method
3958: and do all possible simplifications until no more changes occur. Then
3959: we rebuild the operation. */
3960:
3961: static rtx
3962: simplify_plus_minus (code, mode, op0, op1)
3963: enum rtx_code code;
3964: enum machine_mode mode;
3965: rtx op0, op1;
3966: {
3967: rtx ops[8];
3968: int negs[8];
3969: rtx result, tem;
3970: int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0;
3971: int first = 1, negate = 0, changed;
3972: int i, j;
3973:
3974: bzero (ops, sizeof ops);
3975:
3976: /* Set up the two operands and then expand them until nothing has been
3977: changed. If we run out of room in our array, give up; this should
3978: almost never happen. */
3979:
3980: ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS);
3981:
3982: changed = 1;
3983: while (changed)
3984: {
3985: changed = 0;
3986:
3987: for (i = 0; i < n_ops; i++)
3988: switch (GET_CODE (ops[i]))
3989: {
3990: case PLUS:
3991: case MINUS:
3992: if (n_ops == 7)
3993: return 0;
3994:
3995: ops[n_ops] = XEXP (ops[i], 1);
3996: negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i];
3997: ops[i] = XEXP (ops[i], 0);
3998: input_ops++;
3999: changed = 1;
4000: break;
4001:
4002: case NEG:
4003: ops[i] = XEXP (ops[i], 0);
4004: negs[i] = ! negs[i];
4005: changed = 1;
4006: break;
4007:
4008: case CONST:
4009: ops[i] = XEXP (ops[i], 0);
4010: input_consts++;
4011: changed = 1;
4012: break;
4013:
4014: case NOT:
4015: /* ~a -> (-a - 1) */
4016: if (n_ops != 7)
4017: {
4018: ops[n_ops] = constm1_rtx;
4019: negs[n_ops++] = negs[i];
4020: ops[i] = XEXP (ops[i], 0);
4021: negs[i] = ! negs[i];
4022: changed = 1;
4023: }
4024: break;
4025:
4026: case CONST_INT:
4027: if (negs[i])
4028: ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1;
4029: break;
4030: }
4031: }
4032:
4033: /* If we only have two operands, we can't do anything. */
4034: if (n_ops <= 2)
4035: return 0;
4036:
4037: /* Now simplify each pair of operands until nothing changes. The first
4038: time through just simplify constants against each other. */
4039:
4040: changed = 1;
4041: while (changed)
4042: {
4043: changed = first;
4044:
4045: for (i = 0; i < n_ops - 1; i++)
4046: for (j = i + 1; j < n_ops; j++)
4047: if (ops[i] != 0 && ops[j] != 0
4048: && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j]))))
4049: {
4050: rtx lhs = ops[i], rhs = ops[j];
4051: enum rtx_code ncode = PLUS;
4052:
4053: if (negs[i] && ! negs[j])
4054: lhs = ops[j], rhs = ops[i], ncode = MINUS;
4055: else if (! negs[i] && negs[j])
4056: ncode = MINUS;
4057:
4058: tem = simplify_binary_operation (ncode, mode, lhs, rhs);
4059: if (tem)
4060: {
4061: ops[i] = tem, ops[j] = 0;
4062: negs[i] = negs[i] && negs[j];
4063: if (GET_CODE (tem) == NEG)
4064: ops[i] = XEXP (tem, 0), negs[i] = ! negs[i];
4065:
4066: if (GET_CODE (ops[i]) == CONST_INT && negs[i])
4067: ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0;
4068: changed = 1;
4069: }
4070: }
4071:
4072: first = 0;
4073: }
4074:
4075: /* Pack all the operands to the lower-numbered entries and give up if
4076: we didn't reduce the number of operands we had. Make sure we
4077: count a CONST as two operands. If we have the same number of
4078: operands, but have made more CONSTs than we had, this is also
4079: an improvement, so accept it. */
4080:
4081: for (i = 0, j = 0; j < n_ops; j++)
4082: if (ops[j] != 0)
4083: {
4084: ops[i] = ops[j], negs[i++] = negs[j];
4085: if (GET_CODE (ops[j]) == CONST)
4086: n_consts++;
4087: }
4088:
4089: if (i + n_consts > input_ops
4090: || (i + n_consts == input_ops && n_consts <= input_consts))
4091: return 0;
4092:
4093: n_ops = i;
4094:
4095: /* If we have a CONST_INT, put it last. */
4096: for (i = 0; i < n_ops - 1; i++)
4097: if (GET_CODE (ops[i]) == CONST_INT)
4098: {
4099: tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem;
4100: j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j;
4101: }
4102:
4103: /* Put a non-negated operand first. If there aren't any, make all
4104: operands positive and negate the whole thing later. */
4105: for (i = 0; i < n_ops && negs[i]; i++)
4106: ;
4107:
4108: if (i == n_ops)
4109: {
4110: for (i = 0; i < n_ops; i++)
4111: negs[i] = 0;
4112: negate = 1;
4113: }
4114: else if (i != 0)
4115: {
4116: tem = ops[0], ops[0] = ops[i], ops[i] = tem;
4117: j = negs[0], negs[0] = negs[i], negs[i] = j;
4118: }
4119:
4120: /* Now make the result by performing the requested operations. */
4121: result = ops[0];
4122: for (i = 1; i < n_ops; i++)
4123: result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]);
4124:
4125: return negate ? gen_rtx (NEG, mode, result) : result;
4126: }
4127:
4128: /* Make a binary operation by properly ordering the operands and
4129: seeing if the expression folds. */
4130:
4131: static rtx
4132: cse_gen_binary (code, mode, op0, op1)
4133: enum rtx_code code;
4134: enum machine_mode mode;
4135: rtx op0, op1;
4136: {
4137: rtx tem;
4138:
4139: /* Put complex operands first and constants second if commutative. */
4140: if (GET_RTX_CLASS (code) == 'c'
4141: && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT)
4142: || (GET_RTX_CLASS (GET_CODE (op0)) == 'o'
4143: && GET_RTX_CLASS (GET_CODE (op1)) != 'o')
4144: || (GET_CODE (op0) == SUBREG
4145: && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o'
4146: && GET_RTX_CLASS (GET_CODE (op1)) != 'o')))
4147: tem = op0, op0 = op1, op1 = tem;
4148:
4149: /* If this simplifies, do it. */
4150: tem = simplify_binary_operation (code, mode, op0, op1);
4151:
4152: if (tem)
4153: return tem;
4154:
4155: /* Handle addition and subtraction of CONST_INT specially. Otherwise,
4156: just form the operation. */
4157:
4158: if (code == PLUS && GET_CODE (op1) == CONST_INT
4159: && GET_MODE (op0) != VOIDmode)
4160: return plus_constant (op0, INTVAL (op1));
4161: else if (code == MINUS && GET_CODE (op1) == CONST_INT
4162: && GET_MODE (op0) != VOIDmode)
4163: return plus_constant (op0, - INTVAL (op1));
4164: else
4165: return gen_rtx (code, mode, op0, op1);
4166: }
4167:
1.1 root 4168: /* Like simplify_binary_operation except used for relational operators.
4169: MODE is the mode of the operands, not that of the result. */
4170:
4171: rtx
4172: simplify_relational_operation (code, mode, op0, op1)
4173: enum rtx_code code;
4174: enum machine_mode mode;
4175: rtx op0, op1;
4176: {
1.1.1.4 root 4177: register HOST_WIDE_INT arg0, arg1, arg0s, arg1s;
4178: HOST_WIDE_INT val;
1.1 root 4179: int width = GET_MODE_BITSIZE (mode);
4180:
4181: /* If op0 is a compare, extract the comparison arguments from it. */
4182: if (GET_CODE (op0) == COMPARE && op1 == const0_rtx)
4183: op1 = XEXP (op0, 1), op0 = XEXP (op0, 0);
4184:
1.1.1.5 root 4185: /* What to do with MODE_CC isn't clear yet.
4186: Let's make sure nothing erroneous is done. */
4187: if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC)
4188: return 0;
4189:
4190: /* Unlike the arithmetic operations, we can do the comparison whether
4191: or not WIDTH is larger than HOST_BITS_PER_WIDE_INT because the
4192: CONST_INTs are to be understood as being infinite precision as
4193: is the comparison. So there is no question of overflow. */
4194:
4195: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT || width == 0)
1.1 root 4196: {
4197: /* Even if we can't compute a constant result,
4198: there are some cases worth simplifying. */
4199:
4200: /* For non-IEEE floating-point, if the two operands are equal, we know
4201: the result. */
4202: if (rtx_equal_p (op0, op1)
4203: && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1.1.1.6 ! root 4204: || ! FLOAT_MODE_P (GET_MODE (op0))))
1.1 root 4205: return (code == EQ || code == GE || code == LE || code == LEU
4206: || code == GEU) ? const_true_rtx : const0_rtx;
1.1.1.5 root 4207:
4208: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC)
1.1 root 4209: else if (GET_CODE (op0) == CONST_DOUBLE
4210: && GET_CODE (op1) == CONST_DOUBLE
4211: && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT)
4212: {
4213: REAL_VALUE_TYPE d0, d1;
4214: jmp_buf handler;
4215: int op0lt, op1lt, equal;
4216:
4217: if (setjmp (handler))
4218: return 0;
4219:
4220: set_float_handler (handler);
4221: REAL_VALUE_FROM_CONST_DOUBLE (d0, op0);
4222: REAL_VALUE_FROM_CONST_DOUBLE (d1, op1);
4223: equal = REAL_VALUES_EQUAL (d0, d1);
4224: op0lt = REAL_VALUES_LESS (d0, d1);
4225: op1lt = REAL_VALUES_LESS (d1, d0);
1.1.1.4 root 4226: set_float_handler (NULL_PTR);
1.1 root 4227:
4228: switch (code)
4229: {
4230: case EQ:
4231: return equal ? const_true_rtx : const0_rtx;
4232: case NE:
4233: return !equal ? const_true_rtx : const0_rtx;
4234: case LE:
4235: return equal || op0lt ? const_true_rtx : const0_rtx;
4236: case LT:
4237: return op0lt ? const_true_rtx : const0_rtx;
4238: case GE:
4239: return equal || op1lt ? const_true_rtx : const0_rtx;
4240: case GT:
4241: return op1lt ? const_true_rtx : const0_rtx;
4242: }
4243: }
1.1.1.5 root 4244: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */
4245:
4246: else if (GET_MODE_CLASS (mode) == MODE_INT
4247: && width > HOST_BITS_PER_WIDE_INT
4248: && (GET_CODE (op0) == CONST_DOUBLE
4249: || GET_CODE (op0) == CONST_INT)
4250: && (GET_CODE (op1) == CONST_DOUBLE
4251: || GET_CODE (op1) == CONST_INT))
4252: {
4253: HOST_WIDE_INT h0, l0, h1, l1;
4254: unsigned HOST_WIDE_INT uh0, ul0, uh1, ul1;
4255: int op0lt, op0ltu, equal;
4256:
4257: if (GET_CODE (op0) == CONST_DOUBLE)
4258: l0 = CONST_DOUBLE_LOW (op0), h0 = CONST_DOUBLE_HIGH (op0);
4259: else
4260: l0 = INTVAL (op0), h0 = l0 < 0 ? -1 : 0;
4261:
4262: if (GET_CODE (op1) == CONST_DOUBLE)
4263: l1 = CONST_DOUBLE_LOW (op1), h1 = CONST_DOUBLE_HIGH (op1);
4264: else
4265: l1 = INTVAL (op1), h1 = l1 < 0 ? -1 : 0;
4266:
4267: uh0 = h0, ul0 = l0, uh1 = h1, ul1 = l1;
4268:
4269: equal = (h0 == h1 && l0 == l1);
4270: op0lt = (h0 < h1 || (h0 == h1 && l0 < l1));
4271: op0ltu = (uh0 < uh1 || (uh0 == uh1 && ul0 < ul1));
4272:
4273: switch (code)
4274: {
4275: case EQ:
4276: return equal ? const_true_rtx : const0_rtx;
4277: case NE:
4278: return !equal ? const_true_rtx : const0_rtx;
4279: case LE:
4280: return equal || op0lt ? const_true_rtx : const0_rtx;
4281: case LT:
4282: return op0lt ? const_true_rtx : const0_rtx;
4283: case GE:
4284: return !op0lt ? const_true_rtx : const0_rtx;
4285: case GT:
4286: return !equal && !op0lt ? const_true_rtx : const0_rtx;
4287: case LEU:
4288: return equal || op0ltu ? const_true_rtx : const0_rtx;
4289: case LTU:
4290: return op0ltu ? const_true_rtx : const0_rtx;
4291: case GEU:
4292: return !op0ltu ? const_true_rtx : const0_rtx;
4293: case GTU:
4294: return !equal && !op0ltu ? const_true_rtx : const0_rtx;
4295: }
4296: }
4297:
1.1 root 4298: switch (code)
4299: {
4300: case EQ:
4301: {
4302: #if 0
4303: /* We can't make this assumption due to #pragma weak */
4304: if (CONSTANT_P (op0) && op1 == const0_rtx)
4305: return const0_rtx;
4306: #endif
1.1.1.3 root 4307: if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx
4308: /* On some machines, the ap reg can be 0 sometimes. */
4309: && op0 != arg_pointer_rtx)
1.1 root 4310: return const0_rtx;
4311: break;
4312: }
4313:
4314: case NE:
4315: #if 0
4316: /* We can't make this assumption due to #pragma weak */
4317: if (CONSTANT_P (op0) && op1 == const0_rtx)
4318: return const_true_rtx;
4319: #endif
1.1.1.3 root 4320: if (NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx
4321: /* On some machines, the ap reg can be 0 sometimes. */
4322: && op0 != arg_pointer_rtx)
1.1 root 4323: return const_true_rtx;
4324: break;
4325:
4326: case GEU:
4327: /* Unsigned values are never negative, but we must be sure we are
4328: actually comparing a value, not a CC operand. */
1.1.1.6 ! root 4329: if (op1 == const0_rtx && INTEGRAL_MODE_P (mode))
1.1 root 4330: return const_true_rtx;
4331: break;
4332:
4333: case LTU:
1.1.1.6 ! root 4334: if (op1 == const0_rtx && INTEGRAL_MODE_P (mode))
1.1 root 4335: return const0_rtx;
4336: break;
4337:
4338: case LEU:
4339: /* Unsigned values are never greater than the largest
4340: unsigned value. */
4341: if (GET_CODE (op1) == CONST_INT
4342: && INTVAL (op1) == GET_MODE_MASK (mode)
1.1.1.6 ! root 4343: && INTEGRAL_MODE_P (mode))
1.1 root 4344: return const_true_rtx;
4345: break;
4346:
4347: case GTU:
4348: if (GET_CODE (op1) == CONST_INT
4349: && INTVAL (op1) == GET_MODE_MASK (mode)
1.1.1.6 ! root 4350: && INTEGRAL_MODE_P (mode))
1.1 root 4351: return const0_rtx;
4352: break;
4353: }
4354:
4355: return 0;
4356: }
4357:
4358: /* Get the integer argument values in two forms:
4359: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */
4360:
4361: arg0 = INTVAL (op0);
4362: arg1 = INTVAL (op1);
4363:
1.1.1.4 root 4364: if (width < HOST_BITS_PER_WIDE_INT)
1.1 root 4365: {
1.1.1.4 root 4366: arg0 &= ((HOST_WIDE_INT) 1 << width) - 1;
4367: arg1 &= ((HOST_WIDE_INT) 1 << width) - 1;
1.1 root 4368:
4369: arg0s = arg0;
1.1.1.4 root 4370: if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1)))
4371: arg0s |= ((HOST_WIDE_INT) (-1) << width);
1.1 root 4372:
4373: arg1s = arg1;
1.1.1.4 root 4374: if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1)))
4375: arg1s |= ((HOST_WIDE_INT) (-1) << width);
1.1 root 4376: }
4377: else
4378: {
4379: arg0s = arg0;
4380: arg1s = arg1;
4381: }
4382:
4383: /* Compute the value of the arithmetic. */
4384:
4385: switch (code)
4386: {
4387: case NE:
4388: val = arg0 != arg1 ? STORE_FLAG_VALUE : 0;
4389: break;
4390:
4391: case EQ:
4392: val = arg0 == arg1 ? STORE_FLAG_VALUE : 0;
4393: break;
4394:
4395: case LE:
4396: val = arg0s <= arg1s ? STORE_FLAG_VALUE : 0;
4397: break;
4398:
4399: case LT:
4400: val = arg0s < arg1s ? STORE_FLAG_VALUE : 0;
4401: break;
4402:
4403: case GE:
4404: val = arg0s >= arg1s ? STORE_FLAG_VALUE : 0;
4405: break;
4406:
4407: case GT:
4408: val = arg0s > arg1s ? STORE_FLAG_VALUE : 0;
4409: break;
4410:
4411: case LEU:
1.1.1.4 root 4412: val = (((unsigned HOST_WIDE_INT) arg0)
4413: <= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
1.1 root 4414: break;
4415:
4416: case LTU:
1.1.1.4 root 4417: val = (((unsigned HOST_WIDE_INT) arg0)
4418: < ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
1.1 root 4419: break;
4420:
4421: case GEU:
1.1.1.4 root 4422: val = (((unsigned HOST_WIDE_INT) arg0)
4423: >= ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
1.1 root 4424: break;
4425:
4426: case GTU:
1.1.1.4 root 4427: val = (((unsigned HOST_WIDE_INT) arg0)
4428: > ((unsigned HOST_WIDE_INT) arg1) ? STORE_FLAG_VALUE : 0);
1.1 root 4429: break;
4430:
4431: default:
4432: abort ();
4433: }
4434:
4435: /* Clear the bits that don't belong in our mode, unless they and our sign
4436: bit are all one. So we get either a reasonable negative value or a
4437: reasonable unsigned value for this mode. */
1.1.1.4 root 4438: if (width < HOST_BITS_PER_WIDE_INT
4439: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4440: != ((HOST_WIDE_INT) (-1) << (width - 1))))
4441: val &= ((HOST_WIDE_INT) 1 << width) - 1;
1.1 root 4442:
1.1.1.4 root 4443: return GEN_INT (val);
1.1 root 4444: }
4445:
4446: /* Simplify CODE, an operation with result mode MODE and three operands,
4447: OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became
4448: a constant. Return 0 if no simplifications is possible. */
4449:
4450: rtx
4451: simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2)
4452: enum rtx_code code;
4453: enum machine_mode mode, op0_mode;
4454: rtx op0, op1, op2;
4455: {
4456: int width = GET_MODE_BITSIZE (mode);
4457:
4458: /* VOIDmode means "infinite" precision. */
4459: if (width == 0)
1.1.1.4 root 4460: width = HOST_BITS_PER_WIDE_INT;
1.1 root 4461:
4462: switch (code)
4463: {
4464: case SIGN_EXTRACT:
4465: case ZERO_EXTRACT:
4466: if (GET_CODE (op0) == CONST_INT
4467: && GET_CODE (op1) == CONST_INT
4468: && GET_CODE (op2) == CONST_INT
4469: && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode)
1.1.1.4 root 4470: && width <= HOST_BITS_PER_WIDE_INT)
1.1 root 4471: {
4472: /* Extracting a bit-field from a constant */
1.1.1.4 root 4473: HOST_WIDE_INT val = INTVAL (op0);
1.1 root 4474:
4475: #if BITS_BIG_ENDIAN
4476: val >>= (GET_MODE_BITSIZE (op0_mode) - INTVAL (op2) - INTVAL (op1));
4477: #else
4478: val >>= INTVAL (op2);
4479: #endif
1.1.1.4 root 4480: if (HOST_BITS_PER_WIDE_INT != INTVAL (op1))
1.1 root 4481: {
4482: /* First zero-extend. */
1.1.1.4 root 4483: val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1;
1.1 root 4484: /* If desired, propagate sign bit. */
1.1.1.4 root 4485: if (code == SIGN_EXTRACT
4486: && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1))))
4487: val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1);
1.1 root 4488: }
4489:
4490: /* Clear the bits that don't belong in our mode,
4491: unless they and our sign bit are all one.
4492: So we get either a reasonable negative value or a reasonable
4493: unsigned value for this mode. */
1.1.1.4 root 4494: if (width < HOST_BITS_PER_WIDE_INT
4495: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1)))
4496: != ((HOST_WIDE_INT) (-1) << (width - 1))))
4497: val &= ((HOST_WIDE_INT) 1 << width) - 1;
1.1 root 4498:
1.1.1.4 root 4499: return GEN_INT (val);
1.1 root 4500: }
4501: break;
4502:
4503: case IF_THEN_ELSE:
4504: if (GET_CODE (op0) == CONST_INT)
4505: return op0 != const0_rtx ? op1 : op2;
4506: break;
4507:
4508: default:
4509: abort ();
4510: }
4511:
4512: return 0;
4513: }
4514:
4515: /* If X is a nontrivial arithmetic operation on an argument
4516: for which a constant value can be determined, return
4517: the result of operating on that value, as a constant.
4518: Otherwise, return X, possibly with one or more operands
4519: modified by recursive calls to this function.
4520:
4521: If X is a register whose contents are known, we do NOT
1.1.1.5 root 4522: return those contents here. equiv_constant is called to
4523: perform that task.
1.1 root 4524:
4525: INSN is the insn that we may be modifying. If it is 0, make a copy
4526: of X before modifying it. */
4527:
4528: static rtx
4529: fold_rtx (x, insn)
4530: rtx x;
4531: rtx insn;
4532: {
4533: register enum rtx_code code;
4534: register enum machine_mode mode;
4535: register char *fmt;
1.1.1.4 root 4536: register int i;
1.1 root 4537: rtx new = 0;
4538: int copied = 0;
4539: int must_swap = 0;
4540:
4541: /* Folded equivalents of first two operands of X. */
4542: rtx folded_arg0;
4543: rtx folded_arg1;
4544:
4545: /* Constant equivalents of first three operands of X;
4546: 0 when no such equivalent is known. */
4547: rtx const_arg0;
4548: rtx const_arg1;
4549: rtx const_arg2;
4550:
4551: /* The mode of the first operand of X. We need this for sign and zero
4552: extends. */
4553: enum machine_mode mode_arg0;
4554:
4555: if (x == 0)
4556: return x;
4557:
4558: mode = GET_MODE (x);
4559: code = GET_CODE (x);
4560: switch (code)
4561: {
4562: case CONST:
4563: case CONST_INT:
4564: case CONST_DOUBLE:
4565: case SYMBOL_REF:
4566: case LABEL_REF:
4567: case REG:
4568: /* No use simplifying an EXPR_LIST
4569: since they are used only for lists of args
4570: in a function call's REG_EQUAL note. */
4571: case EXPR_LIST:
4572: return x;
4573:
4574: #ifdef HAVE_cc0
4575: case CC0:
4576: return prev_insn_cc0;
4577: #endif
4578:
4579: case PC:
4580: /* If the next insn is a CODE_LABEL followed by a jump table,
4581: PC's value is a LABEL_REF pointing to that label. That
4582: lets us fold switch statements on the Vax. */
4583: if (insn && GET_CODE (insn) == JUMP_INSN)
4584: {
4585: rtx next = next_nonnote_insn (insn);
4586:
4587: if (next && GET_CODE (next) == CODE_LABEL
4588: && NEXT_INSN (next) != 0
4589: && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
4590: && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
4591: || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
4592: return gen_rtx (LABEL_REF, Pmode, next);
4593: }
4594: break;
4595:
4596: case SUBREG:
1.1.1.4 root 4597: /* See if we previously assigned a constant value to this SUBREG. */
4598: if ((new = lookup_as_function (x, CONST_INT)) != 0
4599: || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
1.1 root 4600: return new;
4601:
1.1.1.4 root 4602: /* If this is a paradoxical SUBREG, we have no idea what value the
4603: extra bits would have. However, if the operand is equivalent
4604: to a SUBREG whose operand is the same as our mode, and all the
4605: modes are within a word, we can just use the inner operand
1.1.1.6 ! root 4606: because these SUBREGs just say how to treat the register.
! 4607:
! 4608: Similarly if we find an integer constant. */
1.1.1.4 root 4609:
1.1.1.3 root 4610: if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
1.1.1.4 root 4611: {
4612: enum machine_mode imode = GET_MODE (SUBREG_REG (x));
4613: struct table_elt *elt;
4614:
4615: if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
4616: && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
4617: && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
4618: imode)) != 0)
1.1.1.6 ! root 4619: for (elt = elt->first_same_value;
! 4620: elt; elt = elt->next_same_value)
! 4621: {
! 4622: if (CONSTANT_P (elt->exp)
! 4623: && GET_MODE (elt->exp) == VOIDmode)
! 4624: return elt->exp;
! 4625:
1.1.1.4 root 4626: if (GET_CODE (elt->exp) == SUBREG
4627: && GET_MODE (SUBREG_REG (elt->exp)) == mode
4628: && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4629: return copy_rtx (SUBREG_REG (elt->exp));
4630: }
4631:
4632: return x;
4633: }
1.1.1.3 root 4634:
1.1 root 4635: /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
4636: We might be able to if the SUBREG is extracting a single word in an
4637: integral mode or extracting the low part. */
4638:
4639: folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
4640: const_arg0 = equiv_constant (folded_arg0);
4641: if (const_arg0)
4642: folded_arg0 = const_arg0;
4643:
4644: if (folded_arg0 != SUBREG_REG (x))
4645: {
4646: new = 0;
4647:
4648: if (GET_MODE_CLASS (mode) == MODE_INT
4649: && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4650: && GET_MODE (SUBREG_REG (x)) != VOIDmode)
4651: new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
4652: GET_MODE (SUBREG_REG (x)));
4653: if (new == 0 && subreg_lowpart_p (x))
4654: new = gen_lowpart_if_possible (mode, folded_arg0);
4655: if (new)
4656: return new;
4657: }
1.1.1.3 root 4658:
4659: /* If this is a narrowing SUBREG and our operand is a REG, see if
1.1.1.4 root 4660: we can find an equivalence for REG that is an arithmetic operation
1.1.1.3 root 4661: in a wider mode where both operands are paradoxical SUBREGs
4662: from objects of our result mode. In that case, we couldn't report
4663: an equivalent value for that operation, since we don't know what the
4664: extra bits will be. But we can find an equivalence for this SUBREG
4665: by folding that operation is the narrow mode. This allows us to
4666: fold arithmetic in narrow modes when the machine only supports
1.1.1.4 root 4667: word-sized arithmetic.
4668:
4669: Also look for a case where we have a SUBREG whose operand is the
4670: same as our result. If both modes are smaller than a word, we
4671: are simply interpreting a register in different modes and we
4672: can use the inner value. */
1.1.1.3 root 4673:
4674: if (GET_CODE (folded_arg0) == REG
1.1.1.4 root 4675: && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
4676: && subreg_lowpart_p (x))
1.1.1.3 root 4677: {
4678: struct table_elt *elt;
4679:
4680: /* We can use HASH here since we know that canon_hash won't be
4681: called. */
4682: elt = lookup (folded_arg0,
4683: HASH (folded_arg0, GET_MODE (folded_arg0)),
4684: GET_MODE (folded_arg0));
4685:
4686: if (elt)
4687: elt = elt->first_same_value;
4688:
4689: for (; elt; elt = elt->next_same_value)
4690: {
1.1.1.4 root 4691: enum rtx_code eltcode = GET_CODE (elt->exp);
4692:
1.1.1.3 root 4693: /* Just check for unary and binary operations. */
4694: if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
4695: && GET_CODE (elt->exp) != SIGN_EXTEND
4696: && GET_CODE (elt->exp) != ZERO_EXTEND
4697: && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4698: && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
4699: {
4700: rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
4701:
4702: if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
1.1.1.4 root 4703: op0 = fold_rtx (op0, NULL_RTX);
1.1.1.3 root 4704:
4705: op0 = equiv_constant (op0);
4706: if (op0)
4707: new = simplify_unary_operation (GET_CODE (elt->exp), mode,
4708: op0, mode);
4709: }
4710: else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
4711: || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
1.1.1.4 root 4712: && eltcode != DIV && eltcode != MOD
4713: && eltcode != UDIV && eltcode != UMOD
4714: && eltcode != ASHIFTRT && eltcode != LSHIFTRT
4715: && eltcode != ROTATE && eltcode != ROTATERT
1.1.1.3 root 4716: && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
4717: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
4718: == mode))
4719: || CONSTANT_P (XEXP (elt->exp, 0)))
4720: && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
4721: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
4722: == mode))
4723: || CONSTANT_P (XEXP (elt->exp, 1))))
4724: {
4725: rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
4726: rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
4727:
4728: if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
1.1.1.4 root 4729: op0 = fold_rtx (op0, NULL_RTX);
1.1.1.3 root 4730:
4731: if (op0)
4732: op0 = equiv_constant (op0);
4733:
4734: if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
1.1.1.4 root 4735: op1 = fold_rtx (op1, NULL_RTX);
1.1.1.3 root 4736:
4737: if (op1)
4738: op1 = equiv_constant (op1);
4739:
1.1.1.6 ! root 4740: /* If we are looking for the low SImode part of
! 4741: (ashift:DI c (const_int 32)), it doesn't work
! 4742: to compute that in SImode, because a 32-bit shift
! 4743: in SImode is unpredictable. We know the value is 0. */
! 4744: if (op0 && op1
! 4745: && (GET_CODE (elt->exp) == ASHIFT
! 4746: || GET_CODE (elt->exp) == LSHIFT)
! 4747: && GET_CODE (op1) == CONST_INT
! 4748: && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
! 4749: {
! 4750: if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
! 4751:
! 4752: /* If the count fits in the inner mode's width,
! 4753: but exceeds the outer mode's width,
! 4754: the value will get truncated to 0
! 4755: by the subreg. */
! 4756: new = const0_rtx;
! 4757: else
! 4758: /* If the count exceeds even the inner mode's width,
! 4759: don't fold this expression. */
! 4760: new = 0;
! 4761: }
! 4762: else if (op0 && op1)
1.1.1.3 root 4763: new = simplify_binary_operation (GET_CODE (elt->exp), mode,
4764: op0, op1);
4765: }
4766:
1.1.1.4 root 4767: else if (GET_CODE (elt->exp) == SUBREG
4768: && GET_MODE (SUBREG_REG (elt->exp)) == mode
4769: && (GET_MODE_SIZE (GET_MODE (folded_arg0))
4770: <= UNITS_PER_WORD)
4771: && exp_equiv_p (elt->exp, elt->exp, 1, 0))
4772: new = copy_rtx (SUBREG_REG (elt->exp));
4773:
1.1.1.3 root 4774: if (new)
4775: return new;
4776: }
4777: }
4778:
1.1 root 4779: return x;
4780:
4781: case NOT:
4782: case NEG:
4783: /* If we have (NOT Y), see if Y is known to be (NOT Z).
4784: If so, (NOT Y) simplifies to Z. Similarly for NEG. */
4785: new = lookup_as_function (XEXP (x, 0), code);
4786: if (new)
4787: return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
4788: break;
1.1.1.4 root 4789:
1.1 root 4790: case MEM:
4791: /* If we are not actually processing an insn, don't try to find the
4792: best address. Not only don't we care, but we could modify the
4793: MEM in an invalid way since we have no insn to validate against. */
4794: if (insn != 0)
4795: find_best_addr (insn, &XEXP (x, 0));
4796:
4797: {
4798: /* Even if we don't fold in the insn itself,
4799: we can safely do so here, in hopes of getting a constant. */
1.1.1.4 root 4800: rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
1.1 root 4801: rtx base = 0;
1.1.1.4 root 4802: HOST_WIDE_INT offset = 0;
1.1 root 4803:
4804: if (GET_CODE (addr) == REG
4805: && REGNO_QTY_VALID_P (REGNO (addr))
4806: && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]]
4807: && qty_const[reg_qty[REGNO (addr)]] != 0)
4808: addr = qty_const[reg_qty[REGNO (addr)]];
4809:
4810: /* If address is constant, split it into a base and integer offset. */
4811: if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
4812: base = addr;
4813: else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
4814: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
4815: {
4816: base = XEXP (XEXP (addr, 0), 0);
4817: offset = INTVAL (XEXP (XEXP (addr, 0), 1));
4818: }
4819: else if (GET_CODE (addr) == LO_SUM
4820: && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
4821: base = XEXP (addr, 1);
4822:
4823: /* If this is a constant pool reference, we can fold it into its
4824: constant to allow better value tracking. */
4825: if (base && GET_CODE (base) == SYMBOL_REF
4826: && CONSTANT_POOL_ADDRESS_P (base))
4827: {
4828: rtx constant = get_pool_constant (base);
4829: enum machine_mode const_mode = get_pool_mode (base);
4830: rtx new;
4831:
4832: if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
4833: constant_pool_entries_cost = COST (constant);
4834:
4835: /* If we are loading the full constant, we have an equivalence. */
4836: if (offset == 0 && mode == const_mode)
4837: return constant;
4838:
4839: /* If this actually isn't a constant (wierd!), we can't do
4840: anything. Otherwise, handle the two most common cases:
4841: extracting a word from a multi-word constant, and extracting
4842: the low-order bits. Other cases don't seem common enough to
4843: worry about. */
4844: if (! CONSTANT_P (constant))
4845: return x;
4846:
4847: if (GET_MODE_CLASS (mode) == MODE_INT
4848: && GET_MODE_SIZE (mode) == UNITS_PER_WORD
4849: && offset % UNITS_PER_WORD == 0
4850: && (new = operand_subword (constant,
4851: offset / UNITS_PER_WORD,
4852: 0, const_mode)) != 0)
4853: return new;
4854:
4855: if (((BYTES_BIG_ENDIAN
4856: && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
4857: || (! BYTES_BIG_ENDIAN && offset == 0))
4858: && (new = gen_lowpart_if_possible (mode, constant)) != 0)
4859: return new;
4860: }
4861:
4862: /* If this is a reference to a label at a known position in a jump
4863: table, we also know its value. */
4864: if (base && GET_CODE (base) == LABEL_REF)
4865: {
4866: rtx label = XEXP (base, 0);
4867: rtx table_insn = NEXT_INSN (label);
4868:
4869: if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4870: && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
4871: {
4872: rtx table = PATTERN (table_insn);
4873:
4874: if (offset >= 0
4875: && (offset / GET_MODE_SIZE (GET_MODE (table))
4876: < XVECLEN (table, 0)))
4877: return XVECEXP (table, 0,
4878: offset / GET_MODE_SIZE (GET_MODE (table)));
4879: }
4880: if (table_insn && GET_CODE (table_insn) == JUMP_INSN
4881: && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
4882: {
4883: rtx table = PATTERN (table_insn);
4884:
4885: if (offset >= 0
4886: && (offset / GET_MODE_SIZE (GET_MODE (table))
4887: < XVECLEN (table, 1)))
4888: {
4889: offset /= GET_MODE_SIZE (GET_MODE (table));
4890: new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset),
4891: XEXP (table, 0));
4892:
4893: if (GET_MODE (table) != Pmode)
4894: new = gen_rtx (TRUNCATE, GET_MODE (table), new);
4895:
4896: return new;
4897: }
4898: }
4899: }
4900:
4901: return x;
4902: }
4903: }
4904:
4905: const_arg0 = 0;
4906: const_arg1 = 0;
4907: const_arg2 = 0;
4908: mode_arg0 = VOIDmode;
4909:
4910: /* Try folding our operands.
4911: Then see which ones have constant values known. */
4912:
4913: fmt = GET_RTX_FORMAT (code);
4914: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
4915: if (fmt[i] == 'e')
4916: {
4917: rtx arg = XEXP (x, i);
4918: rtx folded_arg = arg, const_arg = 0;
4919: enum machine_mode mode_arg = GET_MODE (arg);
4920: rtx cheap_arg, expensive_arg;
4921: rtx replacements[2];
4922: int j;
4923:
4924: /* Most arguments are cheap, so handle them specially. */
4925: switch (GET_CODE (arg))
4926: {
4927: case REG:
4928: /* This is the same as calling equiv_constant; it is duplicated
4929: here for speed. */
4930: if (REGNO_QTY_VALID_P (REGNO (arg))
4931: && qty_const[reg_qty[REGNO (arg)]] != 0
4932: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG
4933: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS)
4934: const_arg
4935: = gen_lowpart_if_possible (GET_MODE (arg),
4936: qty_const[reg_qty[REGNO (arg)]]);
4937: break;
4938:
4939: case CONST:
4940: case CONST_INT:
4941: case SYMBOL_REF:
4942: case LABEL_REF:
4943: case CONST_DOUBLE:
4944: const_arg = arg;
4945: break;
4946:
4947: #ifdef HAVE_cc0
4948: case CC0:
4949: folded_arg = prev_insn_cc0;
4950: mode_arg = prev_insn_cc0_mode;
4951: const_arg = equiv_constant (folded_arg);
4952: break;
4953: #endif
4954:
4955: default:
4956: folded_arg = fold_rtx (arg, insn);
4957: const_arg = equiv_constant (folded_arg);
4958: }
4959:
4960: /* For the first three operands, see if the operand
4961: is constant or equivalent to a constant. */
4962: switch (i)
4963: {
4964: case 0:
4965: folded_arg0 = folded_arg;
4966: const_arg0 = const_arg;
4967: mode_arg0 = mode_arg;
4968: break;
4969: case 1:
4970: folded_arg1 = folded_arg;
4971: const_arg1 = const_arg;
4972: break;
4973: case 2:
4974: const_arg2 = const_arg;
4975: break;
4976: }
4977:
4978: /* Pick the least expensive of the folded argument and an
4979: equivalent constant argument. */
4980: if (const_arg == 0 || const_arg == folded_arg
4981: || COST (const_arg) > COST (folded_arg))
4982: cheap_arg = folded_arg, expensive_arg = const_arg;
4983: else
4984: cheap_arg = const_arg, expensive_arg = folded_arg;
4985:
4986: /* Try to replace the operand with the cheapest of the two
4987: possibilities. If it doesn't work and this is either of the first
4988: two operands of a commutative operation, try swapping them.
4989: If THAT fails, try the more expensive, provided it is cheaper
4990: than what is already there. */
4991:
4992: if (cheap_arg == XEXP (x, i))
4993: continue;
4994:
4995: if (insn == 0 && ! copied)
4996: {
4997: x = copy_rtx (x);
4998: copied = 1;
4999: }
5000:
5001: replacements[0] = cheap_arg, replacements[1] = expensive_arg;
5002: for (j = 0;
5003: j < 2 && replacements[j]
5004: && COST (replacements[j]) < COST (XEXP (x, i));
5005: j++)
5006: {
5007: if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
5008: break;
5009:
5010: if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
5011: {
5012: validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
5013: validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
5014:
5015: if (apply_change_group ())
5016: {
5017: /* Swap them back to be invalid so that this loop can
5018: continue and flag them to be swapped back later. */
5019: rtx tem;
5020:
5021: tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
5022: XEXP (x, 1) = tem;
5023: must_swap = 1;
5024: break;
5025: }
5026: }
5027: }
5028: }
5029:
5030: else if (fmt[i] == 'E')
5031: /* Don't try to fold inside of a vector of expressions.
5032: Doing nothing is harmless. */
5033: ;
5034:
5035: /* If a commutative operation, place a constant integer as the second
5036: operand unless the first operand is also a constant integer. Otherwise,
5037: place any constant second unless the first operand is also a constant. */
5038:
5039: if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
5040: {
5041: if (must_swap || (const_arg0
5042: && (const_arg1 == 0
5043: || (GET_CODE (const_arg0) == CONST_INT
5044: && GET_CODE (const_arg1) != CONST_INT))))
5045: {
5046: register rtx tem = XEXP (x, 0);
5047:
5048: if (insn == 0 && ! copied)
5049: {
5050: x = copy_rtx (x);
5051: copied = 1;
5052: }
5053:
5054: validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
5055: validate_change (insn, &XEXP (x, 1), tem, 1);
5056: if (apply_change_group ())
5057: {
5058: tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
5059: tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
5060: }
5061: }
5062: }
5063:
5064: /* If X is an arithmetic operation, see if we can simplify it. */
5065:
5066: switch (GET_RTX_CLASS (code))
5067: {
5068: case '1':
1.1.1.3 root 5069: /* We can't simplify extension ops unless we know the original mode. */
5070: if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
5071: && mode_arg0 == VOIDmode)
5072: break;
1.1 root 5073: new = simplify_unary_operation (code, mode,
5074: const_arg0 ? const_arg0 : folded_arg0,
5075: mode_arg0);
5076: break;
5077:
5078: case '<':
5079: /* See what items are actually being compared and set FOLDED_ARG[01]
5080: to those values and CODE to the actual comparison code. If any are
5081: constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
5082: do anything if both operands are already known to be constant. */
5083:
5084: if (const_arg0 == 0 || const_arg1 == 0)
5085: {
5086: struct table_elt *p0, *p1;
1.1.1.4 root 5087: rtx true = const_true_rtx, false = const0_rtx;
5088: enum machine_mode mode_arg1;
5089:
5090: #ifdef FLOAT_STORE_FLAG_VALUE
5091: if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5092: {
5093: true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode);
5094: false = CONST0_RTX (mode);
5095: }
5096: #endif
1.1 root 5097:
1.1.1.4 root 5098: code = find_comparison_args (code, &folded_arg0, &folded_arg1,
5099: &mode_arg0, &mode_arg1);
1.1 root 5100: const_arg0 = equiv_constant (folded_arg0);
5101: const_arg1 = equiv_constant (folded_arg1);
5102:
1.1.1.4 root 5103: /* If the mode is VOIDmode or a MODE_CC mode, we don't know
5104: what kinds of things are being compared, so we can't do
5105: anything with this comparison. */
1.1 root 5106:
5107: if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
5108: break;
5109:
5110: /* If we do not now have two constants being compared, see if we
5111: can nevertheless deduce some things about the comparison. */
5112: if (const_arg0 == 0 || const_arg1 == 0)
5113: {
5114: /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit
5115: constant? These aren't zero, but we don't know their sign. */
5116: if (const_arg1 == const0_rtx
5117: && (NONZERO_BASE_PLUS_P (folded_arg0)
5118: #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
5119: come out as 0. */
5120: || GET_CODE (folded_arg0) == SYMBOL_REF
5121: #endif
5122: || GET_CODE (folded_arg0) == LABEL_REF
5123: || GET_CODE (folded_arg0) == CONST))
5124: {
5125: if (code == EQ)
1.1.1.4 root 5126: return false;
1.1 root 5127: else if (code == NE)
1.1.1.4 root 5128: return true;
1.1 root 5129: }
5130:
5131: /* See if the two operands are the same. We don't do this
5132: for IEEE floating-point since we can't assume x == x
5133: since x might be a NaN. */
5134:
5135: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
1.1.1.6 ! root 5136: || ! FLOAT_MODE_P (mode_arg0))
1.1 root 5137: && (folded_arg0 == folded_arg1
5138: || (GET_CODE (folded_arg0) == REG
5139: && GET_CODE (folded_arg1) == REG
5140: && (reg_qty[REGNO (folded_arg0)]
5141: == reg_qty[REGNO (folded_arg1)]))
5142: || ((p0 = lookup (folded_arg0,
5143: (safe_hash (folded_arg0, mode_arg0)
5144: % NBUCKETS), mode_arg0))
5145: && (p1 = lookup (folded_arg1,
5146: (safe_hash (folded_arg1, mode_arg0)
5147: % NBUCKETS), mode_arg0))
5148: && p0->first_same_value == p1->first_same_value)))
5149: return ((code == EQ || code == LE || code == GE
5150: || code == LEU || code == GEU)
1.1.1.4 root 5151: ? true : false);
1.1 root 5152:
5153: /* If FOLDED_ARG0 is a register, see if the comparison we are
5154: doing now is either the same as we did before or the reverse
5155: (we only check the reverse if not floating-point). */
5156: else if (GET_CODE (folded_arg0) == REG)
5157: {
5158: int qty = reg_qty[REGNO (folded_arg0)];
5159:
5160: if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
5161: && (comparison_dominates_p (qty_comparison_code[qty], code)
5162: || (comparison_dominates_p (qty_comparison_code[qty],
5163: reverse_condition (code))
1.1.1.6 ! root 5164: && ! FLOAT_MODE_P (mode_arg0)))
1.1 root 5165: && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
5166: || (const_arg1
5167: && rtx_equal_p (qty_comparison_const[qty],
5168: const_arg1))
5169: || (GET_CODE (folded_arg1) == REG
5170: && (reg_qty[REGNO (folded_arg1)]
5171: == qty_comparison_qty[qty]))))
5172: return (comparison_dominates_p (qty_comparison_code[qty],
5173: code)
1.1.1.4 root 5174: ? true : false);
1.1 root 5175: }
5176: }
5177: }
5178:
5179: /* If we are comparing against zero, see if the first operand is
5180: equivalent to an IOR with a constant. If so, we may be able to
5181: determine the result of this comparison. */
5182:
5183: if (const_arg1 == const0_rtx)
5184: {
5185: rtx y = lookup_as_function (folded_arg0, IOR);
5186: rtx inner_const;
5187:
5188: if (y != 0
5189: && (inner_const = equiv_constant (XEXP (y, 1))) != 0
5190: && GET_CODE (inner_const) == CONST_INT
5191: && INTVAL (inner_const) != 0)
5192: {
5193: int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
1.1.1.4 root 5194: int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
5195: && (INTVAL (inner_const)
5196: & ((HOST_WIDE_INT) 1 << sign_bitnum)));
5197: rtx true = const_true_rtx, false = const0_rtx;
5198:
5199: #ifdef FLOAT_STORE_FLAG_VALUE
5200: if (GET_MODE_CLASS (mode) == MODE_FLOAT)
5201: {
5202: true = immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode);
5203: false = CONST0_RTX (mode);
5204: }
5205: #endif
1.1 root 5206:
5207: switch (code)
5208: {
5209: case EQ:
1.1.1.4 root 5210: return false;
1.1 root 5211: case NE:
1.1.1.4 root 5212: return true;
1.1 root 5213: case LT: case LE:
5214: if (has_sign)
1.1.1.4 root 5215: return true;
1.1 root 5216: break;
5217: case GT: case GE:
5218: if (has_sign)
1.1.1.4 root 5219: return false;
1.1 root 5220: break;
5221: }
5222: }
5223: }
5224:
5225: new = simplify_relational_operation (code, mode_arg0,
5226: const_arg0 ? const_arg0 : folded_arg0,
5227: const_arg1 ? const_arg1 : folded_arg1);
1.1.1.4 root 5228: #ifdef FLOAT_STORE_FLAG_VALUE
5229: if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
5230: new = ((new == const0_rtx) ? CONST0_RTX (mode)
5231: : immed_real_const_1 (FLOAT_STORE_FLAG_VALUE, mode));
5232: #endif
1.1 root 5233: break;
5234:
5235: case '2':
5236: case 'c':
5237: switch (code)
5238: {
5239: case PLUS:
5240: /* If the second operand is a LABEL_REF, see if the first is a MINUS
5241: with that LABEL_REF as its second operand. If so, the result is
5242: the first operand of that MINUS. This handles switches with an
5243: ADDR_DIFF_VEC table. */
5244: if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
5245: {
5246: rtx y = lookup_as_function (folded_arg0, MINUS);
5247:
5248: if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
5249: && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
5250: return XEXP (y, 0);
5251: }
1.1.1.4 root 5252: goto from_plus;
5253:
5254: case MINUS:
5255: /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
5256: If so, produce (PLUS Z C2-C). */
5257: if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
5258: {
5259: rtx y = lookup_as_function (XEXP (x, 0), PLUS);
5260: if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
1.1.1.6 ! root 5261: return fold_rtx (plus_constant (copy_rtx (y),
! 5262: -INTVAL (const_arg1)),
1.1.1.5 root 5263: NULL_RTX);
1.1.1.4 root 5264: }
1.1 root 5265:
5266: /* ... fall through ... */
5267:
1.1.1.4 root 5268: from_plus:
1.1 root 5269: case SMIN: case SMAX: case UMIN: case UMAX:
5270: case IOR: case AND: case XOR:
5271: case MULT: case DIV: case UDIV:
5272: case ASHIFT: case LSHIFTRT: case ASHIFTRT:
5273: /* If we have (<op> <reg> <const_int>) for an associative OP and REG
5274: is known to be of similar form, we may be able to replace the
5275: operation with a combined operation. This may eliminate the
5276: intermediate operation if every use is simplified in this way.
5277: Note that the similar optimization done by combine.c only works
5278: if the intermediate operation's result has only one reference. */
5279:
5280: if (GET_CODE (folded_arg0) == REG
5281: && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
5282: {
5283: int is_shift
5284: = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
5285: rtx y = lookup_as_function (folded_arg0, code);
5286: rtx inner_const;
5287: enum rtx_code associate_code;
5288: rtx new_const;
5289:
5290: if (y == 0
5291: || 0 == (inner_const
5292: = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
5293: || GET_CODE (inner_const) != CONST_INT
5294: /* If we have compiled a statement like
5295: "if (x == (x & mask1))", and now are looking at
5296: "x & mask2", we will have a case where the first operand
5297: of Y is the same as our first operand. Unless we detect
5298: this case, an infinite loop will result. */
5299: || XEXP (y, 0) == folded_arg0)
5300: break;
5301:
5302: /* Don't associate these operations if they are a PLUS with the
5303: same constant and it is a power of two. These might be doable
5304: with a pre- or post-increment. Similarly for two subtracts of
5305: identical powers of two with post decrement. */
5306:
5307: if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
5308: && (0
5309: #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT)
5310: || exact_log2 (INTVAL (const_arg1)) >= 0
5311: #endif
5312: #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT)
5313: || exact_log2 (- INTVAL (const_arg1)) >= 0
5314: #endif
5315: ))
5316: break;
5317:
5318: /* Compute the code used to compose the constants. For example,
5319: A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
5320:
5321: associate_code
5322: = (code == MULT || code == DIV || code == UDIV ? MULT
5323: : is_shift || code == PLUS || code == MINUS ? PLUS : code);
5324:
5325: new_const = simplify_binary_operation (associate_code, mode,
5326: const_arg1, inner_const);
5327:
5328: if (new_const == 0)
5329: break;
5330:
5331: /* If we are associating shift operations, don't let this
1.1.1.5 root 5332: produce a shift of the size of the object or larger.
5333: This could occur when we follow a sign-extend by a right
5334: shift on a machine that does a sign-extend as a pair
5335: of shifts. */
1.1 root 5336:
5337: if (is_shift && GET_CODE (new_const) == CONST_INT
1.1.1.5 root 5338: && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
5339: {
5340: /* As an exception, we can turn an ASHIFTRT of this
5341: form into a shift of the number of bits - 1. */
5342: if (code == ASHIFTRT)
5343: new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
5344: else
5345: break;
5346: }
1.1 root 5347:
5348: y = copy_rtx (XEXP (y, 0));
5349:
5350: /* If Y contains our first operand (the most common way this
5351: can happen is if Y is a MEM), we would do into an infinite
5352: loop if we tried to fold it. So don't in that case. */
5353:
5354: if (! reg_mentioned_p (folded_arg0, y))
5355: y = fold_rtx (y, insn);
5356:
1.1.1.5 root 5357: return cse_gen_binary (code, mode, y, new_const);
1.1 root 5358: }
5359: }
5360:
5361: new = simplify_binary_operation (code, mode,
5362: const_arg0 ? const_arg0 : folded_arg0,
5363: const_arg1 ? const_arg1 : folded_arg1);
5364: break;
5365:
1.1.1.2 root 5366: case 'o':
5367: /* (lo_sum (high X) X) is simply X. */
5368: if (code == LO_SUM && const_arg0 != 0
5369: && GET_CODE (const_arg0) == HIGH
5370: && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
5371: return const_arg1;
5372: break;
5373:
1.1 root 5374: case '3':
5375: case 'b':
5376: new = simplify_ternary_operation (code, mode, mode_arg0,
5377: const_arg0 ? const_arg0 : folded_arg0,
5378: const_arg1 ? const_arg1 : folded_arg1,
5379: const_arg2 ? const_arg2 : XEXP (x, 2));
5380: break;
5381: }
5382:
5383: return new ? new : x;
5384: }
5385:
5386: /* Return a constant value currently equivalent to X.
5387: Return 0 if we don't know one. */
5388:
5389: static rtx
5390: equiv_constant (x)
5391: rtx x;
5392: {
5393: if (GET_CODE (x) == REG
5394: && REGNO_QTY_VALID_P (REGNO (x))
5395: && qty_const[reg_qty[REGNO (x)]])
5396: x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]);
5397:
5398: if (x != 0 && CONSTANT_P (x))
5399: return x;
5400:
1.1.1.3 root 5401: /* If X is a MEM, try to fold it outside the context of any insn to see if
5402: it might be equivalent to a constant. That handles the case where it
5403: is a constant-pool reference. Then try to look it up in the hash table
5404: in case it is something whose value we have seen before. */
5405:
5406: if (GET_CODE (x) == MEM)
5407: {
5408: struct table_elt *elt;
5409:
1.1.1.4 root 5410: x = fold_rtx (x, NULL_RTX);
1.1.1.3 root 5411: if (CONSTANT_P (x))
5412: return x;
5413:
5414: elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
5415: if (elt == 0)
5416: return 0;
5417:
5418: for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
5419: if (elt->is_const && CONSTANT_P (elt->exp))
5420: return elt->exp;
5421: }
5422:
1.1 root 5423: return 0;
5424: }
5425:
5426: /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
5427: number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
5428: least-significant part of X.
5429: MODE specifies how big a part of X to return.
5430:
5431: If the requested operation cannot be done, 0 is returned.
5432:
5433: This is similar to gen_lowpart in emit-rtl.c. */
5434:
5435: rtx
5436: gen_lowpart_if_possible (mode, x)
5437: enum machine_mode mode;
5438: register rtx x;
5439: {
5440: rtx result = gen_lowpart_common (mode, x);
5441:
5442: if (result)
5443: return result;
5444: else if (GET_CODE (x) == MEM)
5445: {
5446: /* This is the only other case we handle. */
5447: register int offset = 0;
5448: rtx new;
5449:
5450: #if WORDS_BIG_ENDIAN
5451: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
5452: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
5453: #endif
5454: #if BYTES_BIG_ENDIAN
5455: /* Adjust the address so that the address-after-the-data
5456: is unchanged. */
5457: offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
5458: - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
5459: #endif
5460: new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset));
5461: if (! memory_address_p (mode, XEXP (new, 0)))
5462: return 0;
5463: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x);
5464: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
5465: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x);
5466: return new;
5467: }
5468: else
5469: return 0;
5470: }
5471:
5472: /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
5473: branch. It will be zero if not.
5474:
5475: In certain cases, this can cause us to add an equivalence. For example,
5476: if we are following the taken case of
5477: if (i == 2)
5478: we can add the fact that `i' and '2' are now equivalent.
5479:
5480: In any case, we can record that this comparison was passed. If the same
5481: comparison is seen later, we will know its value. */
5482:
5483: static void
5484: record_jump_equiv (insn, taken)
5485: rtx insn;
5486: int taken;
5487: {
5488: int cond_known_true;
5489: rtx op0, op1;
1.1.1.4 root 5490: enum machine_mode mode, mode0, mode1;
1.1 root 5491: int reversed_nonequality = 0;
5492: enum rtx_code code;
5493:
5494: /* Ensure this is the right kind of insn. */
5495: if (! condjump_p (insn) || simplejump_p (insn))
5496: return;
5497:
5498: /* See if this jump condition is known true or false. */
5499: if (taken)
5500: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
5501: else
5502: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
5503:
5504: /* Get the type of comparison being done and the operands being compared.
5505: If we had to reverse a non-equality condition, record that fact so we
5506: know that it isn't valid for floating-point. */
5507: code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
5508: op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
5509: op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
5510:
1.1.1.4 root 5511: code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
1.1 root 5512: if (! cond_known_true)
5513: {
5514: reversed_nonequality = (code != EQ && code != NE);
5515: code = reverse_condition (code);
5516: }
5517:
5518: /* The mode is the mode of the non-constant. */
1.1.1.4 root 5519: mode = mode0;
5520: if (mode1 != VOIDmode)
5521: mode = mode1;
1.1 root 5522:
5523: record_jump_cond (code, mode, op0, op1, reversed_nonequality);
5524: }
5525:
5526: /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
5527: REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
5528: Make any useful entries we can with that information. Called from
5529: above function and called recursively. */
5530:
5531: static void
5532: record_jump_cond (code, mode, op0, op1, reversed_nonequality)
5533: enum rtx_code code;
5534: enum machine_mode mode;
5535: rtx op0, op1;
5536: int reversed_nonequality;
5537: {
5538: int op0_hash_code, op1_hash_code;
5539: int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct;
5540: struct table_elt *op0_elt, *op1_elt;
5541:
5542: /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
5543: we know that they are also equal in the smaller mode (this is also
5544: true for all smaller modes whether or not there is a SUBREG, but
5545: is not worth testing for with no SUBREG. */
5546:
1.1.1.5 root 5547: /* Note that GET_MODE (op0) may not equal MODE. */
1.1 root 5548: if (code == EQ && GET_CODE (op0) == SUBREG
1.1.1.5 root 5549: && (GET_MODE_SIZE (GET_MODE (op0))
5550: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
1.1 root 5551: {
5552: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5553: rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5554:
5555: record_jump_cond (code, mode, SUBREG_REG (op0),
5556: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5557: reversed_nonequality);
5558: }
5559:
5560: if (code == EQ && GET_CODE (op1) == SUBREG
1.1.1.5 root 5561: && (GET_MODE_SIZE (GET_MODE (op1))
5562: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
1.1 root 5563: {
5564: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5565: rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5566:
5567: record_jump_cond (code, mode, SUBREG_REG (op1),
5568: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5569: reversed_nonequality);
5570: }
5571:
5572: /* Similarly, if this is an NE comparison, and either is a SUBREG
5573: making a smaller mode, we know the whole thing is also NE. */
5574:
1.1.1.5 root 5575: /* Note that GET_MODE (op0) may not equal MODE;
5576: if we test MODE instead, we can get an infinite recursion
5577: alternating between two modes each wider than MODE. */
5578:
1.1 root 5579: if (code == NE && GET_CODE (op0) == SUBREG
5580: && subreg_lowpart_p (op0)
1.1.1.5 root 5581: && (GET_MODE_SIZE (GET_MODE (op0))
5582: < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
1.1 root 5583: {
5584: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
5585: rtx tem = gen_lowpart_if_possible (inner_mode, op1);
5586:
5587: record_jump_cond (code, mode, SUBREG_REG (op0),
5588: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0),
5589: reversed_nonequality);
5590: }
5591:
5592: if (code == NE && GET_CODE (op1) == SUBREG
5593: && subreg_lowpart_p (op1)
1.1.1.5 root 5594: && (GET_MODE_SIZE (GET_MODE (op1))
5595: < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
1.1 root 5596: {
5597: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
5598: rtx tem = gen_lowpart_if_possible (inner_mode, op0);
5599:
5600: record_jump_cond (code, mode, SUBREG_REG (op1),
5601: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0),
5602: reversed_nonequality);
5603: }
5604:
5605: /* Hash both operands. */
5606:
5607: do_not_record = 0;
5608: hash_arg_in_memory = 0;
5609: hash_arg_in_struct = 0;
5610: op0_hash_code = HASH (op0, mode);
5611: op0_in_memory = hash_arg_in_memory;
5612: op0_in_struct = hash_arg_in_struct;
5613:
5614: if (do_not_record)
5615: return;
5616:
5617: do_not_record = 0;
5618: hash_arg_in_memory = 0;
5619: hash_arg_in_struct = 0;
5620: op1_hash_code = HASH (op1, mode);
5621: op1_in_memory = hash_arg_in_memory;
5622: op1_in_struct = hash_arg_in_struct;
5623:
5624: if (do_not_record)
5625: return;
5626:
5627: /* Look up both operands. */
5628: op0_elt = lookup (op0, op0_hash_code, mode);
5629: op1_elt = lookup (op1, op1_hash_code, mode);
5630:
5631: /* If we aren't setting two things equal all we can do is save this
1.1.1.4 root 5632: comparison. Similarly if this is floating-point. In the latter
5633: case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
5634: If we record the equality, we might inadvertently delete code
5635: whose intent was to change -0 to +0. */
5636:
1.1.1.6 ! root 5637: if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
1.1 root 5638: {
5639: /* If we reversed a floating-point comparison, if OP0 is not a
5640: register, or if OP1 is neither a register or constant, we can't
5641: do anything. */
5642:
5643: if (GET_CODE (op1) != REG)
5644: op1 = equiv_constant (op1);
5645:
1.1.1.6 ! root 5646: if ((reversed_nonequality && FLOAT_MODE_P (mode))
1.1 root 5647: || GET_CODE (op0) != REG || op1 == 0)
5648: return;
5649:
5650: /* Put OP0 in the hash table if it isn't already. This gives it a
5651: new quantity number. */
5652: if (op0_elt == 0)
5653: {
1.1.1.4 root 5654: if (insert_regs (op0, NULL_PTR, 0))
1.1 root 5655: {
5656: rehash_using_reg (op0);
5657: op0_hash_code = HASH (op0, mode);
1.1.1.6 ! root 5658:
! 5659: /* If OP0 is contained in OP1, this changes its hash code
! 5660: as well. Faster to rehash than to check, except
! 5661: for the simple case of a constant. */
! 5662: if (! CONSTANT_P (op1))
! 5663: op1_hash_code = HASH (op1,mode);
1.1 root 5664: }
5665:
1.1.1.4 root 5666: op0_elt = insert (op0, NULL_PTR, op0_hash_code, mode);
1.1 root 5667: op0_elt->in_memory = op0_in_memory;
5668: op0_elt->in_struct = op0_in_struct;
5669: }
5670:
5671: qty_comparison_code[reg_qty[REGNO (op0)]] = code;
5672: if (GET_CODE (op1) == REG)
5673: {
1.1.1.5 root 5674: /* Look it up again--in case op0 and op1 are the same. */
5675: op1_elt = lookup (op1, op1_hash_code, mode);
5676:
1.1 root 5677: /* Put OP1 in the hash table so it gets a new quantity number. */
5678: if (op1_elt == 0)
5679: {
1.1.1.4 root 5680: if (insert_regs (op1, NULL_PTR, 0))
1.1 root 5681: {
5682: rehash_using_reg (op1);
5683: op1_hash_code = HASH (op1, mode);
5684: }
5685:
1.1.1.4 root 5686: op1_elt = insert (op1, NULL_PTR, op1_hash_code, mode);
1.1 root 5687: op1_elt->in_memory = op1_in_memory;
5688: op1_elt->in_struct = op1_in_struct;
5689: }
5690:
5691: qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)];
5692: qty_comparison_const[reg_qty[REGNO (op0)]] = 0;
5693: }
5694: else
5695: {
5696: qty_comparison_qty[reg_qty[REGNO (op0)]] = -1;
5697: qty_comparison_const[reg_qty[REGNO (op0)]] = op1;
5698: }
5699:
5700: return;
5701: }
5702:
1.1.1.6 ! root 5703: /* If either side is still missing an equivalence, make it now,
! 5704: then merge the equivalences. */
1.1 root 5705:
5706: if (op0_elt == 0)
5707: {
1.1.1.6 ! root 5708: if (insert_regs (op0, NULL_PTR, 0))
1.1 root 5709: {
5710: rehash_using_reg (op0);
5711: op0_hash_code = HASH (op0, mode);
5712: }
5713:
1.1.1.6 ! root 5714: op0_elt = insert (op0, NULL_PTR, op0_hash_code, mode);
1.1 root 5715: op0_elt->in_memory = op0_in_memory;
5716: op0_elt->in_struct = op0_in_struct;
5717: }
5718:
5719: if (op1_elt == 0)
5720: {
1.1.1.6 ! root 5721: if (insert_regs (op1, NULL_PTR, 0))
1.1 root 5722: {
5723: rehash_using_reg (op1);
5724: op1_hash_code = HASH (op1, mode);
5725: }
5726:
1.1.1.6 ! root 5727: op1_elt = insert (op1, NULL_PTR, op1_hash_code, mode);
1.1 root 5728: op1_elt->in_memory = op1_in_memory;
5729: op1_elt->in_struct = op1_in_struct;
5730: }
1.1.1.6 ! root 5731:
! 5732: merge_equiv_classes (op0_elt, op1_elt);
! 5733: last_jump_equiv_class = op0_elt;
1.1 root 5734: }
5735:
5736: /* CSE processing for one instruction.
5737: First simplify sources and addresses of all assignments
5738: in the instruction, using previously-computed equivalents values.
5739: Then install the new sources and destinations in the table
5740: of available values.
5741:
5742: If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in
5743: the insn. */
5744:
5745: /* Data on one SET contained in the instruction. */
5746:
5747: struct set
5748: {
5749: /* The SET rtx itself. */
5750: rtx rtl;
5751: /* The SET_SRC of the rtx (the original value, if it is changing). */
5752: rtx src;
5753: /* The hash-table element for the SET_SRC of the SET. */
5754: struct table_elt *src_elt;
5755: /* Hash code for the SET_SRC. */
5756: int src_hash_code;
5757: /* Hash code for the SET_DEST. */
5758: int dest_hash_code;
5759: /* The SET_DEST, with SUBREG, etc., stripped. */
5760: rtx inner_dest;
5761: /* Place where the pointer to the INNER_DEST was found. */
5762: rtx *inner_dest_loc;
5763: /* Nonzero if the SET_SRC is in memory. */
5764: char src_in_memory;
5765: /* Nonzero if the SET_SRC is in a structure. */
5766: char src_in_struct;
5767: /* Nonzero if the SET_SRC contains something
5768: whose value cannot be predicted and understood. */
5769: char src_volatile;
5770: /* Original machine mode, in case it becomes a CONST_INT. */
5771: enum machine_mode mode;
5772: /* A constant equivalent for SET_SRC, if any. */
5773: rtx src_const;
5774: /* Hash code of constant equivalent for SET_SRC. */
5775: int src_const_hash_code;
5776: /* Table entry for constant equivalent for SET_SRC, if any. */
5777: struct table_elt *src_const_elt;
5778: };
5779:
5780: static void
5781: cse_insn (insn, in_libcall_block)
5782: rtx insn;
5783: int in_libcall_block;
5784: {
5785: register rtx x = PATTERN (insn);
5786: rtx tem;
5787: register int i;
5788: register int n_sets = 0;
5789:
5790: /* Records what this insn does to set CC0. */
5791: rtx this_insn_cc0 = 0;
5792: enum machine_mode this_insn_cc0_mode;
5793: struct write_data writes_memory;
5794: static struct write_data init = {0, 0, 0, 0};
5795:
5796: rtx src_eqv = 0;
5797: struct table_elt *src_eqv_elt = 0;
5798: int src_eqv_volatile;
5799: int src_eqv_in_memory;
5800: int src_eqv_in_struct;
5801: int src_eqv_hash_code;
5802:
5803: struct set *sets;
5804:
5805: this_insn = insn;
5806: writes_memory = init;
5807:
5808: /* Find all the SETs and CLOBBERs in this instruction.
5809: Record all the SETs in the array `set' and count them.
5810: Also determine whether there is a CLOBBER that invalidates
5811: all memory references, or all references at varying addresses. */
5812:
5813: if (GET_CODE (x) == SET)
5814: {
5815: sets = (struct set *) alloca (sizeof (struct set));
5816: sets[0].rtl = x;
5817:
5818: /* Ignore SETs that are unconditional jumps.
5819: They never need cse processing, so this does not hurt.
5820: The reason is not efficiency but rather
5821: so that we can test at the end for instructions
5822: that have been simplified to unconditional jumps
5823: and not be misled by unchanged instructions
5824: that were unconditional jumps to begin with. */
5825: if (SET_DEST (x) == pc_rtx
5826: && GET_CODE (SET_SRC (x)) == LABEL_REF)
5827: ;
5828:
5829: /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
5830: The hard function value register is used only once, to copy to
5831: someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
5832: Ensure we invalidate the destination register. On the 80386 no
1.1.1.4 root 5833: other code would invalidate it since it is a fixed_reg.
5834: We need not check the return of apply_change_group; see canon_reg. */
1.1 root 5835:
5836: else if (GET_CODE (SET_SRC (x)) == CALL)
5837: {
5838: canon_reg (SET_SRC (x), insn);
1.1.1.4 root 5839: apply_change_group ();
1.1 root 5840: fold_rtx (SET_SRC (x), insn);
5841: invalidate (SET_DEST (x));
5842: }
5843: else
5844: n_sets = 1;
5845: }
5846: else if (GET_CODE (x) == PARALLEL)
5847: {
5848: register int lim = XVECLEN (x, 0);
5849:
5850: sets = (struct set *) alloca (lim * sizeof (struct set));
5851:
5852: /* Find all regs explicitly clobbered in this insn,
5853: and ensure they are not replaced with any other regs
5854: elsewhere in this insn.
5855: When a reg that is clobbered is also used for input,
5856: we should presume that that is for a reason,
5857: and we should not substitute some other register
5858: which is not supposed to be clobbered.
5859: Therefore, this loop cannot be merged into the one below
1.1.1.3 root 5860: because a CALL may precede a CLOBBER and refer to the
1.1 root 5861: value clobbered. We must not let a canonicalization do
5862: anything in that case. */
5863: for (i = 0; i < lim; i++)
5864: {
5865: register rtx y = XVECEXP (x, 0, i);
1.1.1.6 ! root 5866: if (GET_CODE (y) == CLOBBER)
! 5867: {
! 5868: rtx clobbered = XEXP (y, 0);
! 5869:
! 5870: if (GET_CODE (clobbered) == REG
! 5871: || GET_CODE (clobbered) == SUBREG)
! 5872: invalidate (clobbered);
! 5873: else if (GET_CODE (clobbered) == STRICT_LOW_PART
! 5874: || GET_CODE (clobbered) == ZERO_EXTRACT)
! 5875: invalidate (XEXP (clobbered, 0));
! 5876: }
1.1 root 5877: }
5878:
5879: for (i = 0; i < lim; i++)
5880: {
5881: register rtx y = XVECEXP (x, 0, i);
5882: if (GET_CODE (y) == SET)
5883: {
1.1.1.4 root 5884: /* As above, we ignore unconditional jumps and call-insns and
5885: ignore the result of apply_change_group. */
1.1 root 5886: if (GET_CODE (SET_SRC (y)) == CALL)
5887: {
5888: canon_reg (SET_SRC (y), insn);
1.1.1.4 root 5889: apply_change_group ();
1.1 root 5890: fold_rtx (SET_SRC (y), insn);
5891: invalidate (SET_DEST (y));
5892: }
5893: else if (SET_DEST (y) == pc_rtx
5894: && GET_CODE (SET_SRC (y)) == LABEL_REF)
5895: ;
5896: else
5897: sets[n_sets++].rtl = y;
5898: }
5899: else if (GET_CODE (y) == CLOBBER)
5900: {
5901: /* If we clobber memory, take note of that,
5902: and canon the address.
5903: This does nothing when a register is clobbered
5904: because we have already invalidated the reg. */
5905: if (GET_CODE (XEXP (y, 0)) == MEM)
5906: {
1.1.1.4 root 5907: canon_reg (XEXP (y, 0), NULL_RTX);
1.1 root 5908: note_mem_written (XEXP (y, 0), &writes_memory);
5909: }
5910: }
5911: else if (GET_CODE (y) == USE
5912: && ! (GET_CODE (XEXP (y, 0)) == REG
5913: && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
1.1.1.4 root 5914: canon_reg (y, NULL_RTX);
1.1 root 5915: else if (GET_CODE (y) == CALL)
5916: {
1.1.1.4 root 5917: /* The result of apply_change_group can be ignored; see
5918: canon_reg. */
1.1 root 5919: canon_reg (y, insn);
1.1.1.4 root 5920: apply_change_group ();
1.1 root 5921: fold_rtx (y, insn);
5922: }
5923: }
5924: }
5925: else if (GET_CODE (x) == CLOBBER)
5926: {
5927: if (GET_CODE (XEXP (x, 0)) == MEM)
5928: {
1.1.1.4 root 5929: canon_reg (XEXP (x, 0), NULL_RTX);
1.1 root 5930: note_mem_written (XEXP (x, 0), &writes_memory);
5931: }
5932: }
5933:
5934: /* Canonicalize a USE of a pseudo register or memory location. */
5935: else if (GET_CODE (x) == USE
5936: && ! (GET_CODE (XEXP (x, 0)) == REG
5937: && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
1.1.1.4 root 5938: canon_reg (XEXP (x, 0), NULL_RTX);
1.1 root 5939: else if (GET_CODE (x) == CALL)
5940: {
1.1.1.4 root 5941: /* The result of apply_change_group can be ignored; see canon_reg. */
1.1 root 5942: canon_reg (x, insn);
1.1.1.4 root 5943: apply_change_group ();
1.1 root 5944: fold_rtx (x, insn);
5945: }
5946:
5947: if (n_sets == 1 && REG_NOTES (insn) != 0)
5948: {
5949: /* Store the equivalent value in SRC_EQV, if different. */
1.1.1.4 root 5950: rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1.1 root 5951:
5952: if (tem && ! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)))
1.1.1.4 root 5953: src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
1.1 root 5954: }
5955:
5956: /* Canonicalize sources and addresses of destinations.
5957: We do this in a separate pass to avoid problems when a MATCH_DUP is
5958: present in the insn pattern. In that case, we want to ensure that
5959: we don't break the duplicate nature of the pattern. So we will replace
5960: both operands at the same time. Otherwise, we would fail to find an
5961: equivalent substitution in the loop calling validate_change below.
5962:
5963: We used to suppress canonicalization of DEST if it appears in SRC,
1.1.1.4 root 5964: but we don't do this any more. */
1.1 root 5965:
5966: for (i = 0; i < n_sets; i++)
5967: {
5968: rtx dest = SET_DEST (sets[i].rtl);
5969: rtx src = SET_SRC (sets[i].rtl);
5970: rtx new = canon_reg (src, insn);
5971:
1.1.1.4 root 5972: if ((GET_CODE (new) == REG && GET_CODE (src) == REG
5973: && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
5974: != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
5975: || insn_n_dups[recog_memoized (insn)] > 0)
5976: validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
1.1 root 5977: else
5978: SET_SRC (sets[i].rtl) = new;
5979:
5980: if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
5981: {
5982: validate_change (insn, &XEXP (dest, 1),
1.1.1.4 root 5983: canon_reg (XEXP (dest, 1), insn), 1);
1.1 root 5984: validate_change (insn, &XEXP (dest, 2),
1.1.1.4 root 5985: canon_reg (XEXP (dest, 2), insn), 1);
1.1 root 5986: }
5987:
5988: while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
5989: || GET_CODE (dest) == ZERO_EXTRACT
5990: || GET_CODE (dest) == SIGN_EXTRACT)
5991: dest = XEXP (dest, 0);
5992:
5993: if (GET_CODE (dest) == MEM)
5994: canon_reg (dest, insn);
5995: }
5996:
1.1.1.4 root 5997: /* Now that we have done all the replacements, we can apply the change
5998: group and see if they all work. Note that this will cause some
5999: canonicalizations that would have worked individually not to be applied
6000: because some other canonicalization didn't work, but this should not
6001: occur often.
6002:
6003: The result of apply_change_group can be ignored; see canon_reg. */
6004:
6005: apply_change_group ();
6006:
1.1 root 6007: /* Set sets[i].src_elt to the class each source belongs to.
6008: Detect assignments from or to volatile things
6009: and set set[i] to zero so they will be ignored
6010: in the rest of this function.
6011:
6012: Nothing in this loop changes the hash table or the register chains. */
6013:
6014: for (i = 0; i < n_sets; i++)
6015: {
6016: register rtx src, dest;
6017: register rtx src_folded;
6018: register struct table_elt *elt = 0, *p;
6019: enum machine_mode mode;
6020: rtx src_eqv_here;
6021: rtx src_const = 0;
6022: rtx src_related = 0;
6023: struct table_elt *src_const_elt = 0;
6024: int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
6025: int src_related_cost = 10000, src_elt_cost = 10000;
6026: /* Set non-zero if we need to call force_const_mem on with the
6027: contents of src_folded before using it. */
6028: int src_folded_force_flag = 0;
6029:
6030: dest = SET_DEST (sets[i].rtl);
6031: src = SET_SRC (sets[i].rtl);
6032:
6033: /* If SRC is a constant that has no machine mode,
6034: hash it with the destination's machine mode.
6035: This way we can keep different modes separate. */
6036:
6037: mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6038: sets[i].mode = mode;
6039:
6040: if (src_eqv)
6041: {
6042: enum machine_mode eqvmode = mode;
6043: if (GET_CODE (dest) == STRICT_LOW_PART)
6044: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6045: do_not_record = 0;
6046: hash_arg_in_memory = 0;
6047: hash_arg_in_struct = 0;
6048: src_eqv = fold_rtx (src_eqv, insn);
6049: src_eqv_hash_code = HASH (src_eqv, eqvmode);
6050:
6051: /* Find the equivalence class for the equivalent expression. */
6052:
6053: if (!do_not_record)
6054: src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, eqvmode);
6055:
6056: src_eqv_volatile = do_not_record;
6057: src_eqv_in_memory = hash_arg_in_memory;
6058: src_eqv_in_struct = hash_arg_in_struct;
6059: }
6060:
6061: /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
6062: value of the INNER register, not the destination. So it is not
6063: a legal substitution for the source. But save it for later. */
6064: if (GET_CODE (dest) == STRICT_LOW_PART)
6065: src_eqv_here = 0;
6066: else
6067: src_eqv_here = src_eqv;
6068:
6069: /* Simplify and foldable subexpressions in SRC. Then get the fully-
6070: simplified result, which may not necessarily be valid. */
6071: src_folded = fold_rtx (src, insn);
6072:
6073: /* If storing a constant in a bitfield, pre-truncate the constant
6074: so we will be able to record it later. */
6075: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6076: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6077: {
6078: rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6079:
6080: if (GET_CODE (src) == CONST_INT
6081: && GET_CODE (width) == CONST_INT
1.1.1.4 root 6082: && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6083: && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
6084: src_folded
6085: = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
6086: << INTVAL (width)) - 1));
1.1 root 6087: }
6088:
6089: /* Compute SRC's hash code, and also notice if it
6090: should not be recorded at all. In that case,
6091: prevent any further processing of this assignment. */
6092: do_not_record = 0;
6093: hash_arg_in_memory = 0;
6094: hash_arg_in_struct = 0;
6095:
6096: sets[i].src = src;
6097: sets[i].src_hash_code = HASH (src, mode);
6098: sets[i].src_volatile = do_not_record;
6099: sets[i].src_in_memory = hash_arg_in_memory;
6100: sets[i].src_in_struct = hash_arg_in_struct;
6101:
1.1.1.4 root 6102: #if 0
6103: /* It is no longer clear why we used to do this, but it doesn't
6104: appear to still be needed. So let's try without it since this
6105: code hurts cse'ing widened ops. */
1.1 root 6106: /* If source is a perverse subreg (such as QI treated as an SI),
6107: treat it as volatile. It may do the work of an SI in one context
6108: where the extra bits are not being used, but cannot replace an SI
6109: in general. */
6110: if (GET_CODE (src) == SUBREG
6111: && (GET_MODE_SIZE (GET_MODE (src))
6112: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
6113: sets[i].src_volatile = 1;
1.1.1.4 root 6114: #endif
1.1 root 6115:
6116: /* Locate all possible equivalent forms for SRC. Try to replace
6117: SRC in the insn with each cheaper equivalent.
6118:
6119: We have the following types of equivalents: SRC itself, a folded
6120: version, a value given in a REG_EQUAL note, or a value related
6121: to a constant.
6122:
6123: Each of these equivalents may be part of an additional class
6124: of equivalents (if more than one is in the table, they must be in
6125: the same class; we check for this).
6126:
6127: If the source is volatile, we don't do any table lookups.
6128:
6129: We note any constant equivalent for possible later use in a
6130: REG_NOTE. */
6131:
6132: if (!sets[i].src_volatile)
6133: elt = lookup (src, sets[i].src_hash_code, mode);
6134:
6135: sets[i].src_elt = elt;
6136:
6137: if (elt && src_eqv_here && src_eqv_elt)
6138: {
6139: if (elt->first_same_value != src_eqv_elt->first_same_value)
6140: {
6141: /* The REG_EQUAL is indicating that two formerly distinct
6142: classes are now equivalent. So merge them. */
6143: merge_equiv_classes (elt, src_eqv_elt);
6144: src_eqv_hash_code = HASH (src_eqv, elt->mode);
6145: src_eqv_elt = lookup (src_eqv, src_eqv_hash_code, elt->mode);
6146: }
6147:
6148: src_eqv_here = 0;
6149: }
6150:
6151: else if (src_eqv_elt)
6152: elt = src_eqv_elt;
6153:
6154: /* Try to find a constant somewhere and record it in `src_const'.
6155: Record its table element, if any, in `src_const_elt'. Look in
6156: any known equivalences first. (If the constant is not in the
6157: table, also set `sets[i].src_const_hash_code'). */
6158: if (elt)
6159: for (p = elt->first_same_value; p; p = p->next_same_value)
6160: if (p->is_const)
6161: {
6162: src_const = p->exp;
6163: src_const_elt = elt;
6164: break;
6165: }
6166:
6167: if (src_const == 0
6168: && (CONSTANT_P (src_folded)
6169: /* Consider (minus (label_ref L1) (label_ref L2)) as
6170: "constant" here so we will record it. This allows us
6171: to fold switch statements when an ADDR_DIFF_VEC is used. */
6172: || (GET_CODE (src_folded) == MINUS
6173: && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
6174: && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
6175: src_const = src_folded, src_const_elt = elt;
6176: else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
6177: src_const = src_eqv_here, src_const_elt = src_eqv_elt;
6178:
6179: /* If we don't know if the constant is in the table, get its
6180: hash code and look it up. */
6181: if (src_const && src_const_elt == 0)
6182: {
6183: sets[i].src_const_hash_code = HASH (src_const, mode);
6184: src_const_elt = lookup (src_const, sets[i].src_const_hash_code,
6185: mode);
6186: }
6187:
6188: sets[i].src_const = src_const;
6189: sets[i].src_const_elt = src_const_elt;
6190:
6191: /* If the constant and our source are both in the table, mark them as
6192: equivalent. Otherwise, if a constant is in the table but the source
6193: isn't, set ELT to it. */
6194: if (src_const_elt && elt
6195: && src_const_elt->first_same_value != elt->first_same_value)
6196: merge_equiv_classes (elt, src_const_elt);
6197: else if (src_const_elt && elt == 0)
6198: elt = src_const_elt;
6199:
6200: /* See if there is a register linearly related to a constant
6201: equivalent of SRC. */
6202: if (src_const
6203: && (GET_CODE (src_const) == CONST
6204: || (src_const_elt && src_const_elt->related_value != 0)))
6205: {
6206: src_related = use_related_value (src_const, src_const_elt);
6207: if (src_related)
6208: {
6209: struct table_elt *src_related_elt
6210: = lookup (src_related, HASH (src_related, mode), mode);
6211: if (src_related_elt && elt)
6212: {
6213: if (elt->first_same_value
6214: != src_related_elt->first_same_value)
6215: /* This can occur when we previously saw a CONST
6216: involving a SYMBOL_REF and then see the SYMBOL_REF
6217: twice. Merge the involved classes. */
6218: merge_equiv_classes (elt, src_related_elt);
6219:
6220: src_related = 0;
6221: src_related_elt = 0;
6222: }
6223: else if (src_related_elt && elt == 0)
6224: elt = src_related_elt;
6225: }
6226: }
6227:
1.1.1.4 root 6228: /* See if we have a CONST_INT that is already in a register in a
6229: wider mode. */
6230:
6231: if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
6232: && GET_MODE_CLASS (mode) == MODE_INT
6233: && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
6234: {
6235: enum machine_mode wider_mode;
6236:
6237: for (wider_mode = GET_MODE_WIDER_MODE (mode);
6238: GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
6239: && src_related == 0;
6240: wider_mode = GET_MODE_WIDER_MODE (wider_mode))
6241: {
6242: struct table_elt *const_elt
6243: = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
6244:
6245: if (const_elt == 0)
6246: continue;
6247:
6248: for (const_elt = const_elt->first_same_value;
6249: const_elt; const_elt = const_elt->next_same_value)
6250: if (GET_CODE (const_elt->exp) == REG)
6251: {
6252: src_related = gen_lowpart_if_possible (mode,
6253: const_elt->exp);
6254: break;
6255: }
6256: }
6257: }
6258:
1.1.1.2 root 6259: /* Another possibility is that we have an AND with a constant in
6260: a mode narrower than a word. If so, it might have been generated
6261: as part of an "if" which would narrow the AND. If we already
6262: have done the AND in a wider mode, we can use a SUBREG of that
6263: value. */
6264:
6265: if (flag_expensive_optimizations && ! src_related
6266: && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
6267: && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
6268: {
6269: enum machine_mode tmode;
1.1.1.4 root 6270: rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1));
1.1.1.2 root 6271:
6272: for (tmode = GET_MODE_WIDER_MODE (mode);
6273: GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
6274: tmode = GET_MODE_WIDER_MODE (tmode))
6275: {
6276: rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
6277: struct table_elt *larger_elt;
6278:
6279: if (inner)
6280: {
6281: PUT_MODE (new_and, tmode);
6282: XEXP (new_and, 0) = inner;
6283: larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
6284: if (larger_elt == 0)
6285: continue;
6286:
6287: for (larger_elt = larger_elt->first_same_value;
6288: larger_elt; larger_elt = larger_elt->next_same_value)
6289: if (GET_CODE (larger_elt->exp) == REG)
6290: {
6291: src_related
6292: = gen_lowpart_if_possible (mode, larger_elt->exp);
6293: break;
6294: }
6295:
6296: if (src_related)
6297: break;
6298: }
6299: }
6300: }
6301:
1.1 root 6302: if (src == src_folded)
6303: src_folded = 0;
6304:
6305: /* At this point, ELT, if non-zero, points to a class of expressions
6306: equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
6307: and SRC_RELATED, if non-zero, each contain additional equivalent
6308: expressions. Prune these latter expressions by deleting expressions
6309: already in the equivalence class.
6310:
6311: Check for an equivalent identical to the destination. If found,
6312: this is the preferred equivalent since it will likely lead to
6313: elimination of the insn. Indicate this by placing it in
6314: `src_related'. */
6315:
6316: if (elt) elt = elt->first_same_value;
6317: for (p = elt; p; p = p->next_same_value)
6318: {
6319: enum rtx_code code = GET_CODE (p->exp);
6320:
6321: /* If the expression is not valid, ignore it. Then we do not
6322: have to check for validity below. In most cases, we can use
6323: `rtx_equal_p', since canonicalization has already been done. */
6324: if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
6325: continue;
6326:
6327: if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
6328: src = 0;
6329: else if (src_folded && GET_CODE (src_folded) == code
6330: && rtx_equal_p (src_folded, p->exp))
6331: src_folded = 0;
6332: else if (src_eqv_here && GET_CODE (src_eqv_here) == code
6333: && rtx_equal_p (src_eqv_here, p->exp))
6334: src_eqv_here = 0;
6335: else if (src_related && GET_CODE (src_related) == code
6336: && rtx_equal_p (src_related, p->exp))
6337: src_related = 0;
6338:
6339: /* This is the same as the destination of the insns, we want
6340: to prefer it. Copy it to src_related. The code below will
6341: then give it a negative cost. */
6342: if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
6343: src_related = dest;
6344:
6345: }
6346:
6347: /* Find the cheapest valid equivalent, trying all the available
6348: possibilities. Prefer items not in the hash table to ones
6349: that are when they are equal cost. Note that we can never
6350: worsen an insn as the current contents will also succeed.
1.1.1.3 root 6351: If we find an equivalent identical to the destination, use it as best,
1.1 root 6352: since this insn will probably be eliminated in that case. */
6353: if (src)
6354: {
6355: if (rtx_equal_p (src, dest))
6356: src_cost = -1;
6357: else
6358: src_cost = COST (src);
6359: }
6360:
6361: if (src_eqv_here)
6362: {
6363: if (rtx_equal_p (src_eqv_here, dest))
6364: src_eqv_cost = -1;
6365: else
6366: src_eqv_cost = COST (src_eqv_here);
6367: }
6368:
6369: if (src_folded)
6370: {
6371: if (rtx_equal_p (src_folded, dest))
6372: src_folded_cost = -1;
6373: else
6374: src_folded_cost = COST (src_folded);
6375: }
6376:
6377: if (src_related)
6378: {
6379: if (rtx_equal_p (src_related, dest))
6380: src_related_cost = -1;
6381: else
6382: src_related_cost = COST (src_related);
6383: }
6384:
6385: /* If this was an indirect jump insn, a known label will really be
6386: cheaper even though it looks more expensive. */
6387: if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
6388: src_folded = src_const, src_folded_cost = -1;
6389:
6390: /* Terminate loop when replacement made. This must terminate since
6391: the current contents will be tested and will always be valid. */
6392: while (1)
6393: {
6394: rtx trial;
6395:
6396: /* Skip invalid entries. */
6397: while (elt && GET_CODE (elt->exp) != REG
6398: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
6399: elt = elt->next_same_value;
6400:
6401: if (elt) src_elt_cost = elt->cost;
6402:
6403: /* Find cheapest and skip it for the next time. For items
6404: of equal cost, use this order:
6405: src_folded, src, src_eqv, src_related and hash table entry. */
6406: if (src_folded_cost <= src_cost
6407: && src_folded_cost <= src_eqv_cost
6408: && src_folded_cost <= src_related_cost
6409: && src_folded_cost <= src_elt_cost)
6410: {
6411: trial = src_folded, src_folded_cost = 10000;
6412: if (src_folded_force_flag)
6413: trial = force_const_mem (mode, trial);
6414: }
6415: else if (src_cost <= src_eqv_cost
6416: && src_cost <= src_related_cost
6417: && src_cost <= src_elt_cost)
6418: trial = src, src_cost = 10000;
6419: else if (src_eqv_cost <= src_related_cost
6420: && src_eqv_cost <= src_elt_cost)
1.1.1.6 ! root 6421: trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
1.1 root 6422: else if (src_related_cost <= src_elt_cost)
1.1.1.6 ! root 6423: trial = copy_rtx (src_related), src_related_cost = 10000;
1.1 root 6424: else
6425: {
1.1.1.3 root 6426: trial = copy_rtx (elt->exp);
1.1 root 6427: elt = elt->next_same_value;
6428: src_elt_cost = 10000;
6429: }
6430:
6431: /* We don't normally have an insn matching (set (pc) (pc)), so
6432: check for this separately here. We will delete such an
6433: insn below.
6434:
6435: Tablejump insns contain a USE of the table, so simply replacing
6436: the operand with the constant won't match. This is simply an
6437: unconditional branch, however, and is therefore valid. Just
6438: insert the substitution here and we will delete and re-emit
6439: the insn later. */
6440:
6441: if (n_sets == 1 && dest == pc_rtx
6442: && (trial == pc_rtx
6443: || (GET_CODE (trial) == LABEL_REF
6444: && ! condjump_p (insn))))
6445: {
6446: /* If TRIAL is a label in front of a jump table, we are
6447: really falling through the switch (this is how casesi
6448: insns work), so we must branch around the table. */
6449: if (GET_CODE (trial) == CODE_LABEL
6450: && NEXT_INSN (trial) != 0
6451: && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
6452: && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
6453: || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
6454:
6455: trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial));
6456:
6457: SET_SRC (sets[i].rtl) = trial;
6458: break;
6459: }
6460:
6461: /* Look for a substitution that makes a valid insn. */
6462: else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
1.1.1.3 root 6463: {
1.1.1.4 root 6464: /* The result of apply_change_group can be ignored; see
6465: canon_reg. */
6466:
6467: validate_change (insn, &SET_SRC (sets[i].rtl),
6468: canon_reg (SET_SRC (sets[i].rtl), insn),
6469: 1);
6470: apply_change_group ();
1.1.1.3 root 6471: break;
6472: }
1.1 root 6473:
6474: /* If we previously found constant pool entries for
6475: constants and this is a constant, try making a
6476: pool entry. Put it in src_folded unless we already have done
6477: this since that is where it likely came from. */
6478:
6479: else if (constant_pool_entries_cost
6480: && CONSTANT_P (trial)
6481: && (src_folded == 0 || GET_CODE (src_folded) != MEM)
6482: && GET_MODE_CLASS (mode) != MODE_CC)
6483: {
6484: src_folded_force_flag = 1;
6485: src_folded = trial;
6486: src_folded_cost = constant_pool_entries_cost;
6487: }
6488: }
6489:
6490: src = SET_SRC (sets[i].rtl);
6491:
6492: /* In general, it is good to have a SET with SET_SRC == SET_DEST.
6493: However, there is an important exception: If both are registers
6494: that are not the head of their equivalence class, replace SET_SRC
6495: with the head of the class. If we do not do this, we will have
6496: both registers live over a portion of the basic block. This way,
6497: their lifetimes will likely abut instead of overlapping. */
6498: if (GET_CODE (dest) == REG
6499: && REGNO_QTY_VALID_P (REGNO (dest))
6500: && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest)
6501: && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest)
6502: && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
6503: /* Don't do this if the original insn had a hard reg as
6504: SET_SRC. */
6505: && (GET_CODE (sets[i].src) != REG
6506: || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER))
6507: /* We can't call canon_reg here because it won't do anything if
6508: SRC is a hard register. */
6509: {
6510: int first = qty_first_reg[reg_qty[REGNO (src)]];
6511:
6512: src = SET_SRC (sets[i].rtl)
6513: = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
6514: : gen_rtx (REG, GET_MODE (src), first);
6515:
6516: /* If we had a constant that is cheaper than what we are now
6517: setting SRC to, use that constant. We ignored it when we
6518: thought we could make this into a no-op. */
6519: if (src_const && COST (src_const) < COST (src)
6520: && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0))
6521: src = src_const;
6522: }
6523:
6524: /* If we made a change, recompute SRC values. */
6525: if (src != sets[i].src)
6526: {
6527: do_not_record = 0;
6528: hash_arg_in_memory = 0;
6529: hash_arg_in_struct = 0;
6530: sets[i].src = src;
6531: sets[i].src_hash_code = HASH (src, mode);
6532: sets[i].src_volatile = do_not_record;
6533: sets[i].src_in_memory = hash_arg_in_memory;
6534: sets[i].src_in_struct = hash_arg_in_struct;
6535: sets[i].src_elt = lookup (src, sets[i].src_hash_code, mode);
6536: }
6537:
6538: /* If this is a single SET, we are setting a register, and we have an
6539: equivalent constant, we want to add a REG_NOTE. We don't want
6540: to write a REG_EQUAL note for a constant pseudo since verifying that
1.1.1.2 root 6541: that pseudo hasn't been eliminated is a pain. Such a note also
1.1 root 6542: won't help anything. */
6543: if (n_sets == 1 && src_const && GET_CODE (dest) == REG
6544: && GET_CODE (src_const) != REG)
6545: {
1.1.1.4 root 6546: rtx tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
1.1 root 6547:
6548: /* Record the actual constant value in a REG_EQUAL note, making
6549: a new one if one does not already exist. */
6550: if (tem)
6551: XEXP (tem, 0) = src_const;
6552: else
6553: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL,
6554: src_const, REG_NOTES (insn));
6555:
6556: /* If storing a constant value in a register that
6557: previously held the constant value 0,
6558: record this fact with a REG_WAS_0 note on this insn.
6559:
6560: Note that the *register* is required to have previously held 0,
6561: not just any register in the quantity and we must point to the
6562: insn that set that register to zero.
6563:
6564: Rather than track each register individually, we just see if
6565: the last set for this quantity was for this register. */
6566:
6567: if (REGNO_QTY_VALID_P (REGNO (dest))
6568: && qty_const[reg_qty[REGNO (dest)]] == const0_rtx)
6569: {
6570: /* See if we previously had a REG_WAS_0 note. */
1.1.1.4 root 6571: rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
1.1 root 6572: rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]];
6573:
6574: if ((tem = single_set (const_insn)) != 0
6575: && rtx_equal_p (SET_DEST (tem), dest))
6576: {
6577: if (note)
6578: XEXP (note, 0) = const_insn;
6579: else
6580: REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0,
6581: const_insn, REG_NOTES (insn));
6582: }
6583: }
6584: }
6585:
6586: /* Now deal with the destination. */
6587: do_not_record = 0;
6588: sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl);
6589:
6590: /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
6591: to the MEM or REG within it. */
6592: while (GET_CODE (dest) == SIGN_EXTRACT
6593: || GET_CODE (dest) == ZERO_EXTRACT
6594: || GET_CODE (dest) == SUBREG
6595: || GET_CODE (dest) == STRICT_LOW_PART)
6596: {
6597: sets[i].inner_dest_loc = &XEXP (dest, 0);
6598: dest = XEXP (dest, 0);
6599: }
6600:
6601: sets[i].inner_dest = dest;
6602:
6603: if (GET_CODE (dest) == MEM)
6604: {
6605: dest = fold_rtx (dest, insn);
6606:
6607: /* Decide whether we invalidate everything in memory,
6608: or just things at non-fixed places.
6609: Writing a large aggregate must invalidate everything
6610: because we don't know how long it is. */
6611: note_mem_written (dest, &writes_memory);
6612: }
6613:
6614: /* Compute the hash code of the destination now,
6615: before the effects of this instruction are recorded,
6616: since the register values used in the address computation
6617: are those before this instruction. */
6618: sets[i].dest_hash_code = HASH (dest, mode);
6619:
6620: /* Don't enter a bit-field in the hash table
6621: because the value in it after the store
6622: may not equal what was stored, due to truncation. */
6623:
6624: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
6625: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
6626: {
6627: rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
6628:
6629: if (src_const != 0 && GET_CODE (src_const) == CONST_INT
6630: && GET_CODE (width) == CONST_INT
1.1.1.4 root 6631: && INTVAL (width) < HOST_BITS_PER_WIDE_INT
6632: && ! (INTVAL (src_const)
6633: & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
1.1 root 6634: /* Exception: if the value is constant,
6635: and it won't be truncated, record it. */
6636: ;
6637: else
6638: {
6639: /* This is chosen so that the destination will be invalidated
6640: but no new value will be recorded.
6641: We must invalidate because sometimes constant
6642: values can be recorded for bitfields. */
6643: sets[i].src_elt = 0;
6644: sets[i].src_volatile = 1;
6645: src_eqv = 0;
6646: src_eqv_elt = 0;
6647: }
6648: }
6649:
6650: /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
6651: the insn. */
6652: else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
6653: {
6654: PUT_CODE (insn, NOTE);
6655: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
6656: NOTE_SOURCE_FILE (insn) = 0;
6657: cse_jumps_altered = 1;
6658: /* One less use of the label this insn used to jump to. */
6659: --LABEL_NUSES (JUMP_LABEL (insn));
6660: /* No more processing for this set. */
6661: sets[i].rtl = 0;
6662: }
6663:
6664: /* If this SET is now setting PC to a label, we know it used to
6665: be a conditional or computed branch. So we see if we can follow
6666: it. If it was a computed branch, delete it and re-emit. */
6667: else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
6668: {
6669: rtx p;
6670:
6671: /* If this is not in the format for a simple branch and
6672: we are the only SET in it, re-emit it. */
6673: if (! simplejump_p (insn) && n_sets == 1)
6674: {
6675: rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
6676: JUMP_LABEL (new) = XEXP (src, 0);
6677: LABEL_NUSES (XEXP (src, 0))++;
6678: delete_insn (insn);
6679: insn = new;
6680: }
1.1.1.5 root 6681: else
6682: /* Otherwise, force rerecognition, since it probably had
6683: a different pattern before.
6684: This shouldn't really be necessary, since whatever
6685: changed the source value above should have done this.
6686: Until the right place is found, might as well do this here. */
6687: INSN_CODE (insn) = -1;
1.1 root 6688:
6689: /* Now that we've converted this jump to an unconditional jump,
6690: there is dead code after it. Delete the dead code until we
6691: reach a BARRIER, the end of the function, or a label. Do
6692: not delete NOTEs except for NOTE_INSN_DELETED since later
6693: phases assume these notes are retained. */
6694:
6695: p = insn;
6696:
6697: while (NEXT_INSN (p) != 0
6698: && GET_CODE (NEXT_INSN (p)) != BARRIER
6699: && GET_CODE (NEXT_INSN (p)) != CODE_LABEL)
6700: {
6701: if (GET_CODE (NEXT_INSN (p)) != NOTE
6702: || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED)
6703: delete_insn (NEXT_INSN (p));
6704: else
6705: p = NEXT_INSN (p);
6706: }
6707:
6708: /* If we don't have a BARRIER immediately after INSN, put one there.
6709: Much code assumes that there are no NOTEs between a JUMP_INSN and
6710: BARRIER. */
6711:
6712: if (NEXT_INSN (insn) == 0
6713: || GET_CODE (NEXT_INSN (insn)) != BARRIER)
6714: emit_barrier_after (insn);
6715:
6716: /* We might have two BARRIERs separated by notes. Delete the second
6717: one if so. */
6718:
1.1.1.2 root 6719: if (p != insn && NEXT_INSN (p) != 0
6720: && GET_CODE (NEXT_INSN (p)) == BARRIER)
1.1 root 6721: delete_insn (NEXT_INSN (p));
6722:
6723: cse_jumps_altered = 1;
6724: sets[i].rtl = 0;
6725: }
6726:
1.1.1.3 root 6727: /* If destination is volatile, invalidate it and then do no further
6728: processing for this assignment. */
1.1 root 6729:
6730: else if (do_not_record)
1.1.1.3 root 6731: {
6732: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
6733: || GET_CODE (dest) == MEM)
6734: invalidate (dest);
1.1.1.6 ! root 6735: else if (GET_CODE (dest) == STRICT_LOW_PART
! 6736: || GET_CODE (dest) == ZERO_EXTRACT)
! 6737: invalidate (XEXP (dest, 0));
1.1.1.3 root 6738: sets[i].rtl = 0;
6739: }
1.1 root 6740:
6741: if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
6742: sets[i].dest_hash_code = HASH (SET_DEST (sets[i].rtl), mode);
6743:
6744: #ifdef HAVE_cc0
6745: /* If setting CC0, record what it was set to, or a constant, if it
6746: is equivalent to a constant. If it is being set to a floating-point
6747: value, make a COMPARE with the appropriate constant of 0. If we
6748: don't do this, later code can interpret this as a test against
6749: const0_rtx, which can cause problems if we try to put it into an
6750: insn as a floating-point operand. */
6751: if (dest == cc0_rtx)
6752: {
6753: this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
6754: this_insn_cc0_mode = mode;
1.1.1.6 ! root 6755: if (FLOAT_MODE_P (mode))
1.1 root 6756: this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0,
6757: CONST0_RTX (mode));
6758: }
6759: #endif
6760: }
6761:
6762: /* Now enter all non-volatile source expressions in the hash table
6763: if they are not already present.
6764: Record their equivalence classes in src_elt.
6765: This way we can insert the corresponding destinations into
6766: the same classes even if the actual sources are no longer in them
6767: (having been invalidated). */
6768:
6769: if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
6770: && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
6771: {
6772: register struct table_elt *elt;
6773: register struct table_elt *classp = sets[0].src_elt;
6774: rtx dest = SET_DEST (sets[0].rtl);
6775: enum machine_mode eqvmode = GET_MODE (dest);
6776:
6777: if (GET_CODE (dest) == STRICT_LOW_PART)
6778: {
6779: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
6780: classp = 0;
6781: }
6782: if (insert_regs (src_eqv, classp, 0))
6783: src_eqv_hash_code = HASH (src_eqv, eqvmode);
6784: elt = insert (src_eqv, classp, src_eqv_hash_code, eqvmode);
6785: elt->in_memory = src_eqv_in_memory;
6786: elt->in_struct = src_eqv_in_struct;
6787: src_eqv_elt = elt;
1.1.1.6 ! root 6788:
! 6789: /* Check to see if src_eqv_elt is the same as a set source which
! 6790: does not yet have an elt, and if so set the elt of the set source
! 6791: to src_eqv_elt. */
! 6792: for (i = 0; i < n_sets; i++)
! 6793: if (sets[i].rtl && sets[i].src_elt == 0
! 6794: && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
! 6795: sets[i].src_elt = src_eqv_elt;
1.1 root 6796: }
6797:
6798: for (i = 0; i < n_sets; i++)
6799: if (sets[i].rtl && ! sets[i].src_volatile
6800: && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
6801: {
6802: if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
6803: {
6804: /* REG_EQUAL in setting a STRICT_LOW_PART
6805: gives an equivalent for the entire destination register,
6806: not just for the subreg being stored in now.
6807: This is a more interesting equivalence, so we arrange later
6808: to treat the entire reg as the destination. */
6809: sets[i].src_elt = src_eqv_elt;
6810: sets[i].src_hash_code = src_eqv_hash_code;
6811: }
6812: else
6813: {
6814: /* Insert source and constant equivalent into hash table, if not
6815: already present. */
6816: register struct table_elt *classp = src_eqv_elt;
6817: register rtx src = sets[i].src;
6818: register rtx dest = SET_DEST (sets[i].rtl);
6819: enum machine_mode mode
6820: = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
6821:
6822: if (sets[i].src_elt == 0)
6823: {
6824: register struct table_elt *elt;
6825:
6826: /* Note that these insert_regs calls cannot remove
6827: any of the src_elt's, because they would have failed to
6828: match if not still valid. */
6829: if (insert_regs (src, classp, 0))
6830: sets[i].src_hash_code = HASH (src, mode);
6831: elt = insert (src, classp, sets[i].src_hash_code, mode);
6832: elt->in_memory = sets[i].src_in_memory;
6833: elt->in_struct = sets[i].src_in_struct;
6834: sets[i].src_elt = classp = elt;
6835: }
6836:
6837: if (sets[i].src_const && sets[i].src_const_elt == 0
6838: && src != sets[i].src_const
6839: && ! rtx_equal_p (sets[i].src_const, src))
6840: sets[i].src_elt = insert (sets[i].src_const, classp,
6841: sets[i].src_const_hash_code, mode);
6842: }
6843: }
6844: else if (sets[i].src_elt == 0)
6845: /* If we did not insert the source into the hash table (e.g., it was
6846: volatile), note the equivalence class for the REG_EQUAL value, if any,
6847: so that the destination goes into that class. */
6848: sets[i].src_elt = src_eqv_elt;
6849:
6850: invalidate_from_clobbers (&writes_memory, x);
1.1.1.4 root 6851:
6852: /* Some registers are invalidated by subroutine calls. Memory is
6853: invalidated by non-constant calls. */
6854:
1.1 root 6855: if (GET_CODE (insn) == CALL_INSN)
6856: {
6857: static struct write_data everything = {0, 1, 1, 1};
1.1.1.4 root 6858:
6859: if (! CONST_CALL_P (insn))
6860: invalidate_memory (&everything);
1.1 root 6861: invalidate_for_call ();
6862: }
6863:
6864: /* Now invalidate everything set by this instruction.
6865: If a SUBREG or other funny destination is being set,
6866: sets[i].rtl is still nonzero, so here we invalidate the reg
6867: a part of which is being set. */
6868:
6869: for (i = 0; i < n_sets; i++)
6870: if (sets[i].rtl)
6871: {
6872: register rtx dest = sets[i].inner_dest;
6873:
6874: /* Needed for registers to remove the register from its
6875: previous quantity's chain.
6876: Needed for memory if this is a nonvarying address, unless
6877: we have just done an invalidate_memory that covers even those. */
6878: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
6879: || (! writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
6880: invalidate (dest);
1.1.1.6 ! root 6881: else if (GET_CODE (dest) == STRICT_LOW_PART
! 6882: || GET_CODE (dest) == ZERO_EXTRACT)
! 6883: invalidate (XEXP (dest, 0));
1.1 root 6884: }
6885:
6886: /* Make sure registers mentioned in destinations
6887: are safe for use in an expression to be inserted.
6888: This removes from the hash table
6889: any invalid entry that refers to one of these registers.
6890:
6891: We don't care about the return value from mention_regs because
6892: we are going to hash the SET_DEST values unconditionally. */
6893:
6894: for (i = 0; i < n_sets; i++)
6895: if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG)
6896: mention_regs (SET_DEST (sets[i].rtl));
6897:
6898: /* We may have just removed some of the src_elt's from the hash table.
6899: So replace each one with the current head of the same class. */
6900:
6901: for (i = 0; i < n_sets; i++)
6902: if (sets[i].rtl)
6903: {
6904: if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
6905: /* If elt was removed, find current head of same class,
6906: or 0 if nothing remains of that class. */
6907: {
6908: register struct table_elt *elt = sets[i].src_elt;
6909:
6910: while (elt && elt->prev_same_value)
6911: elt = elt->prev_same_value;
6912:
6913: while (elt && elt->first_same_value == 0)
6914: elt = elt->next_same_value;
6915: sets[i].src_elt = elt ? elt->first_same_value : 0;
6916: }
6917: }
6918:
6919: /* Now insert the destinations into their equivalence classes. */
6920:
6921: for (i = 0; i < n_sets; i++)
6922: if (sets[i].rtl)
6923: {
6924: register rtx dest = SET_DEST (sets[i].rtl);
6925: register struct table_elt *elt;
6926:
6927: /* Don't record value if we are not supposed to risk allocating
6928: floating-point values in registers that might be wider than
6929: memory. */
6930: if ((flag_float_store
6931: && GET_CODE (dest) == MEM
1.1.1.6 ! root 6932: && FLOAT_MODE_P (GET_MODE (dest)))
1.1 root 6933: /* Don't record values of destinations set inside a libcall block
6934: since we might delete the libcall. Things should have been set
6935: up so we won't want to reuse such a value, but we play it safe
6936: here. */
6937: || in_libcall_block
6938: /* If we didn't put a REG_EQUAL value or a source into the hash
6939: table, there is no point is recording DEST. */
6940: || sets[i].src_elt == 0)
6941: continue;
6942:
6943: /* STRICT_LOW_PART isn't part of the value BEING set,
6944: and neither is the SUBREG inside it.
6945: Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
6946: if (GET_CODE (dest) == STRICT_LOW_PART)
6947: dest = SUBREG_REG (XEXP (dest, 0));
6948:
1.1.1.4 root 6949: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
1.1 root 6950: /* Registers must also be inserted into chains for quantities. */
6951: if (insert_regs (dest, sets[i].src_elt, 1))
6952: /* If `insert_regs' changes something, the hash code must be
6953: recalculated. */
6954: sets[i].dest_hash_code = HASH (dest, GET_MODE (dest));
6955:
6956: elt = insert (dest, sets[i].src_elt,
6957: sets[i].dest_hash_code, GET_MODE (dest));
6958: elt->in_memory = GET_CODE (sets[i].inner_dest) == MEM;
6959: if (elt->in_memory)
6960: {
6961: /* This implicitly assumes a whole struct
6962: need not have MEM_IN_STRUCT_P.
6963: But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */
6964: elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest)
6965: || sets[i].inner_dest != SET_DEST (sets[i].rtl));
6966: }
6967:
1.1.1.3 root 6968: /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
6969: narrower than M2, and both M1 and M2 are the same number of words,
6970: we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
6971: make that equivalence as well.
1.1 root 6972:
6973: However, BAR may have equivalences for which gen_lowpart_if_possible
6974: will produce a simpler value than gen_lowpart_if_possible applied to
6975: BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
6976: BAR's equivalences. If we don't get a simplified form, make
6977: the SUBREG. It will not be used in an equivalence, but will
6978: cause two similar assignments to be detected.
6979:
6980: Note the loop below will find SUBREG_REG (DEST) since we have
6981: already entered SRC and DEST of the SET in the table. */
6982:
6983: if (GET_CODE (dest) == SUBREG
1.1.1.3 root 6984: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) / UNITS_PER_WORD
6985: == GET_MODE_SIZE (GET_MODE (dest)) / UNITS_PER_WORD)
1.1 root 6986: && (GET_MODE_SIZE (GET_MODE (dest))
6987: >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
6988: && sets[i].src_elt != 0)
6989: {
6990: enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
6991: struct table_elt *elt, *classp = 0;
6992:
6993: for (elt = sets[i].src_elt->first_same_value; elt;
6994: elt = elt->next_same_value)
6995: {
6996: rtx new_src = 0;
6997: int src_hash;
6998: struct table_elt *src_elt;
6999:
7000: /* Ignore invalid entries. */
7001: if (GET_CODE (elt->exp) != REG
7002: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
7003: continue;
7004:
7005: new_src = gen_lowpart_if_possible (new_mode, elt->exp);
7006: if (new_src == 0)
7007: new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0);
7008:
7009: src_hash = HASH (new_src, new_mode);
7010: src_elt = lookup (new_src, src_hash, new_mode);
7011:
7012: /* Put the new source in the hash table is if isn't
7013: already. */
7014: if (src_elt == 0)
7015: {
7016: if (insert_regs (new_src, classp, 0))
7017: src_hash = HASH (new_src, new_mode);
7018: src_elt = insert (new_src, classp, src_hash, new_mode);
7019: src_elt->in_memory = elt->in_memory;
7020: src_elt->in_struct = elt->in_struct;
7021: }
7022: else if (classp && classp != src_elt->first_same_value)
7023: /* Show that two things that we've seen before are
7024: actually the same. */
7025: merge_equiv_classes (src_elt, classp);
7026:
7027: classp = src_elt->first_same_value;
7028: }
7029: }
7030: }
7031:
7032: /* Special handling for (set REG0 REG1)
7033: where REG0 is the "cheapest", cheaper than REG1.
7034: After cse, REG1 will probably not be used in the sequel,
7035: so (if easily done) change this insn to (set REG1 REG0) and
7036: replace REG1 with REG0 in the previous insn that computed their value.
7037: Then REG1 will become a dead store and won't cloud the situation
7038: for later optimizations.
7039:
7040: Do not make this change if REG1 is a hard register, because it will
7041: then be used in the sequel and we may be changing a two-operand insn
7042: into a three-operand insn.
7043:
7044: Also do not do this if we are operating on a copy of INSN. */
7045:
7046: if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
7047: && NEXT_INSN (PREV_INSN (insn)) == insn
7048: && GET_CODE (SET_SRC (sets[0].rtl)) == REG
7049: && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
7050: && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
7051: && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]]
7052: == REGNO (SET_DEST (sets[0].rtl))))
7053: {
7054: rtx prev = PREV_INSN (insn);
7055: while (prev && GET_CODE (prev) == NOTE)
7056: prev = PREV_INSN (prev);
7057:
7058: if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
7059: && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
7060: {
7061: rtx dest = SET_DEST (sets[0].rtl);
1.1.1.4 root 7062: rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
1.1 root 7063:
7064: validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
7065: validate_change (insn, & SET_DEST (sets[0].rtl),
7066: SET_SRC (sets[0].rtl), 1);
7067: validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
7068: apply_change_group ();
7069:
7070: /* If REG1 was equivalent to a constant, REG0 is not. */
7071: if (note)
7072: PUT_REG_NOTE_KIND (note, REG_EQUAL);
7073:
7074: /* If there was a REG_WAS_0 note on PREV, remove it. Move
7075: any REG_WAS_0 note on INSN to PREV. */
1.1.1.4 root 7076: note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
1.1 root 7077: if (note)
7078: remove_note (prev, note);
7079:
1.1.1.4 root 7080: note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
1.1 root 7081: if (note)
7082: {
7083: remove_note (insn, note);
7084: XEXP (note, 1) = REG_NOTES (prev);
7085: REG_NOTES (prev) = note;
7086: }
7087: }
7088: }
7089:
7090: /* If this is a conditional jump insn, record any known equivalences due to
7091: the condition being tested. */
7092:
7093: last_jump_equiv_class = 0;
7094: if (GET_CODE (insn) == JUMP_INSN
7095: && n_sets == 1 && GET_CODE (x) == SET
7096: && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
7097: record_jump_equiv (insn, 0);
7098:
7099: #ifdef HAVE_cc0
7100: /* If the previous insn set CC0 and this insn no longer references CC0,
7101: delete the previous insn. Here we use the fact that nothing expects CC0
7102: to be valid over an insn, which is true until the final pass. */
7103: if (prev_insn && GET_CODE (prev_insn) == INSN
7104: && (tem = single_set (prev_insn)) != 0
7105: && SET_DEST (tem) == cc0_rtx
7106: && ! reg_mentioned_p (cc0_rtx, x))
7107: {
7108: PUT_CODE (prev_insn, NOTE);
7109: NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
7110: NOTE_SOURCE_FILE (prev_insn) = 0;
7111: }
7112:
7113: prev_insn_cc0 = this_insn_cc0;
7114: prev_insn_cc0_mode = this_insn_cc0_mode;
7115: #endif
7116:
7117: prev_insn = insn;
7118: }
7119:
7120: /* Store 1 in *WRITES_PTR for those categories of memory ref
7121: that must be invalidated when the expression WRITTEN is stored in.
7122: If WRITTEN is null, say everything must be invalidated. */
7123:
7124: static void
7125: note_mem_written (written, writes_ptr)
7126: rtx written;
7127: struct write_data *writes_ptr;
7128: {
7129: static struct write_data everything = {0, 1, 1, 1};
7130:
7131: if (written == 0)
7132: *writes_ptr = everything;
7133: else if (GET_CODE (written) == MEM)
7134: {
7135: /* Pushing or popping the stack invalidates just the stack pointer. */
7136: rtx addr = XEXP (written, 0);
7137: if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
7138: || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
7139: && GET_CODE (XEXP (addr, 0)) == REG
7140: && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
7141: {
7142: writes_ptr->sp = 1;
7143: return;
7144: }
7145: else if (GET_MODE (written) == BLKmode)
7146: *writes_ptr = everything;
1.1.1.6 ! root 7147: /* (mem (scratch)) means clobber everything. */
! 7148: else if (GET_CODE (addr) == SCRATCH)
! 7149: *writes_ptr = everything;
1.1 root 7150: else if (cse_rtx_addr_varies_p (written))
7151: {
7152: /* A varying address that is a sum indicates an array element,
7153: and that's just as good as a structure element
1.1.1.5 root 7154: in implying that we need not invalidate scalar variables.
7155: However, we must allow QImode aliasing of scalars, because the
7156: ANSI C standard allows character pointers to alias anything. */
7157: if (! ((MEM_IN_STRUCT_P (written)
7158: || GET_CODE (XEXP (written, 0)) == PLUS)
7159: && GET_MODE (written) != QImode))
1.1 root 7160: writes_ptr->all = 1;
7161: writes_ptr->nonscalar = 1;
7162: }
7163: writes_ptr->var = 1;
7164: }
7165: }
7166:
7167: /* Perform invalidation on the basis of everything about an insn
7168: except for invalidating the actual places that are SET in it.
7169: This includes the places CLOBBERed, and anything that might
7170: alias with something that is SET or CLOBBERed.
7171:
7172: W points to the writes_memory for this insn, a struct write_data
7173: saying which kinds of memory references must be invalidated.
7174: X is the pattern of the insn. */
7175:
7176: static void
7177: invalidate_from_clobbers (w, x)
7178: struct write_data *w;
7179: rtx x;
7180: {
7181: /* If W->var is not set, W specifies no action.
7182: If W->all is set, this step gets all memory refs
7183: so they can be ignored in the rest of this function. */
7184: if (w->var)
7185: invalidate_memory (w);
7186:
7187: if (w->sp)
7188: {
7189: if (reg_tick[STACK_POINTER_REGNUM] >= 0)
7190: reg_tick[STACK_POINTER_REGNUM]++;
7191:
7192: /* This should be *very* rare. */
7193: if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
7194: invalidate (stack_pointer_rtx);
7195: }
7196:
7197: if (GET_CODE (x) == CLOBBER)
7198: {
7199: rtx ref = XEXP (x, 0);
1.1.1.6 ! root 7200: if (ref)
! 7201: {
! 7202: if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
! 7203: || (GET_CODE (ref) == MEM && ! w->all))
! 7204: invalidate (ref);
! 7205: else if (GET_CODE (ref) == STRICT_LOW_PART
! 7206: || GET_CODE (ref) == ZERO_EXTRACT)
! 7207: invalidate (XEXP (ref, 0));
! 7208: }
1.1 root 7209: }
7210: else if (GET_CODE (x) == PARALLEL)
7211: {
7212: register int i;
7213: for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
7214: {
7215: register rtx y = XVECEXP (x, 0, i);
7216: if (GET_CODE (y) == CLOBBER)
7217: {
7218: rtx ref = XEXP (y, 0);
1.1.1.6 ! root 7219: if (ref)
! 7220: {
! 7221: if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
! 7222: || (GET_CODE (ref) == MEM && !w->all))
! 7223: invalidate (ref);
! 7224: else if (GET_CODE (ref) == STRICT_LOW_PART
! 7225: || GET_CODE (ref) == ZERO_EXTRACT)
! 7226: invalidate (XEXP (ref, 0));
! 7227: }
1.1 root 7228: }
7229: }
7230: }
7231: }
7232:
7233: /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
7234: and replace any registers in them with either an equivalent constant
7235: or the canonical form of the register. If we are inside an address,
7236: only do this if the address remains valid.
7237:
7238: OBJECT is 0 except when within a MEM in which case it is the MEM.
7239:
7240: Return the replacement for X. */
7241:
7242: static rtx
7243: cse_process_notes (x, object)
7244: rtx x;
7245: rtx object;
7246: {
7247: enum rtx_code code = GET_CODE (x);
7248: char *fmt = GET_RTX_FORMAT (code);
7249: int i;
7250:
7251: switch (code)
7252: {
7253: case CONST_INT:
7254: case CONST:
7255: case SYMBOL_REF:
7256: case LABEL_REF:
7257: case CONST_DOUBLE:
7258: case PC:
7259: case CC0:
7260: case LO_SUM:
7261: return x;
7262:
7263: case MEM:
7264: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
7265: return x;
7266:
7267: case EXPR_LIST:
7268: case INSN_LIST:
7269: if (REG_NOTE_KIND (x) == REG_EQUAL)
1.1.1.4 root 7270: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
1.1 root 7271: if (XEXP (x, 1))
1.1.1.4 root 7272: XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
1.1 root 7273: return x;
7274:
1.1.1.3 root 7275: case SIGN_EXTEND:
7276: case ZERO_EXTEND:
7277: {
7278: rtx new = cse_process_notes (XEXP (x, 0), object);
7279: /* We don't substitute VOIDmode constants into these rtx,
7280: since they would impede folding. */
7281: if (GET_MODE (new) != VOIDmode)
7282: validate_change (object, &XEXP (x, 0), new, 0);
7283: return x;
7284: }
7285:
1.1 root 7286: case REG:
7287: i = reg_qty[REGNO (x)];
7288:
7289: /* Return a constant or a constant register. */
7290: if (REGNO_QTY_VALID_P (REGNO (x))
7291: && qty_const[i] != 0
7292: && (CONSTANT_P (qty_const[i])
7293: || GET_CODE (qty_const[i]) == REG))
7294: {
7295: rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
7296: if (new)
7297: return new;
7298: }
7299:
7300: /* Otherwise, canonicalize this register. */
1.1.1.4 root 7301: return canon_reg (x, NULL_RTX);
1.1 root 7302: }
7303:
7304: for (i = 0; i < GET_RTX_LENGTH (code); i++)
7305: if (fmt[i] == 'e')
7306: validate_change (object, &XEXP (x, i),
1.1.1.5 root 7307: cse_process_notes (XEXP (x, i), object), 0);
1.1 root 7308:
7309: return x;
7310: }
7311:
7312: /* Find common subexpressions between the end test of a loop and the beginning
7313: of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
7314:
7315: Often we have a loop where an expression in the exit test is used
7316: in the body of the loop. For example "while (*p) *q++ = *p++;".
7317: Because of the way we duplicate the loop exit test in front of the loop,
7318: however, we don't detect that common subexpression. This will be caught
7319: when global cse is implemented, but this is a quite common case.
7320:
7321: This function handles the most common cases of these common expressions.
7322: It is called after we have processed the basic block ending with the
7323: NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
7324: jumps to a label used only once. */
7325:
7326: static void
7327: cse_around_loop (loop_start)
7328: rtx loop_start;
7329: {
7330: rtx insn;
7331: int i;
7332: struct table_elt *p;
7333:
7334: /* If the jump at the end of the loop doesn't go to the start, we don't
7335: do anything. */
7336: for (insn = PREV_INSN (loop_start);
7337: insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
7338: insn = PREV_INSN (insn))
7339: ;
7340:
7341: if (insn == 0
7342: || GET_CODE (insn) != NOTE
7343: || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
7344: return;
7345:
7346: /* If the last insn of the loop (the end test) was an NE comparison,
7347: we will interpret it as an EQ comparison, since we fell through
1.1.1.4 root 7348: the loop. Any equivalences resulting from that comparison are
1.1 root 7349: therefore not valid and must be invalidated. */
7350: if (last_jump_equiv_class)
7351: for (p = last_jump_equiv_class->first_same_value; p;
7352: p = p->next_same_value)
7353: if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
7354: || GET_CODE (p->exp) == SUBREG)
7355: invalidate (p->exp);
1.1.1.6 ! root 7356: else if (GET_CODE (p->exp) == STRICT_LOW_PART
! 7357: || GET_CODE (p->exp) == ZERO_EXTRACT)
! 7358: invalidate (XEXP (p->exp, 0));
1.1 root 7359:
7360: /* Process insns starting after LOOP_START until we hit a CALL_INSN or
7361: a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
7362:
7363: The only thing we do with SET_DEST is invalidate entries, so we
7364: can safely process each SET in order. It is slightly less efficient
7365: to do so, but we only want to handle the most common cases. */
7366:
7367: for (insn = NEXT_INSN (loop_start);
7368: GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
7369: && ! (GET_CODE (insn) == NOTE
7370: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
7371: insn = NEXT_INSN (insn))
7372: {
7373: if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7374: && (GET_CODE (PATTERN (insn)) == SET
7375: || GET_CODE (PATTERN (insn)) == CLOBBER))
7376: cse_set_around_loop (PATTERN (insn), insn, loop_start);
7377: else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
7378: && GET_CODE (PATTERN (insn)) == PARALLEL)
7379: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7380: if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
7381: || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
7382: cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
7383: loop_start);
7384: }
7385: }
7386:
1.1.1.3 root 7387: /* Variable used for communications between the next two routines. */
7388:
7389: static struct write_data skipped_writes_memory;
7390:
7391: /* Process one SET of an insn that was skipped. We ignore CLOBBERs
7392: since they are done elsewhere. This function is called via note_stores. */
7393:
7394: static void
7395: invalidate_skipped_set (dest, set)
7396: rtx set;
7397: rtx dest;
7398: {
7399: if (GET_CODE (set) == CLOBBER
7400: #ifdef HAVE_cc0
7401: || dest == cc0_rtx
7402: #endif
7403: || dest == pc_rtx)
7404: return;
7405:
7406: if (GET_CODE (dest) == MEM)
7407: note_mem_written (dest, &skipped_writes_memory);
7408:
1.1.1.5 root 7409: /* There are times when an address can appear varying and be a PLUS
7410: during this scan when it would be a fixed address were we to know
7411: the proper equivalences. So promote "nonscalar" to be "all". */
7412: if (skipped_writes_memory.nonscalar)
7413: skipped_writes_memory.all = 1;
7414:
1.1.1.3 root 7415: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
7416: || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest)))
7417: invalidate (dest);
1.1.1.6 ! root 7418: else if (GET_CODE (dest) == STRICT_LOW_PART
! 7419: || GET_CODE (dest) == ZERO_EXTRACT)
! 7420: invalidate (XEXP (dest, 0));
1.1.1.3 root 7421: }
7422:
7423: /* Invalidate all insns from START up to the end of the function or the
7424: next label. This called when we wish to CSE around a block that is
7425: conditionally executed. */
7426:
7427: static void
7428: invalidate_skipped_block (start)
7429: rtx start;
7430: {
7431: rtx insn;
7432: static struct write_data init = {0, 0, 0, 0};
7433: static struct write_data everything = {0, 1, 1, 1};
7434:
7435: for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
7436: insn = NEXT_INSN (insn))
7437: {
7438: if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7439: continue;
7440:
7441: skipped_writes_memory = init;
7442:
7443: if (GET_CODE (insn) == CALL_INSN)
7444: {
7445: invalidate_for_call ();
7446: skipped_writes_memory = everything;
7447: }
7448:
7449: note_stores (PATTERN (insn), invalidate_skipped_set);
7450: invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn));
7451: }
7452: }
7453:
1.1 root 7454: /* Used for communication between the following two routines; contains a
7455: value to be checked for modification. */
7456:
7457: static rtx cse_check_loop_start_value;
7458:
7459: /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE,
7460: indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */
7461:
7462: static void
7463: cse_check_loop_start (x, set)
7464: rtx x;
7465: rtx set;
7466: {
7467: if (cse_check_loop_start_value == 0
7468: || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
7469: return;
7470:
7471: if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM)
7472: || reg_overlap_mentioned_p (x, cse_check_loop_start_value))
7473: cse_check_loop_start_value = 0;
7474: }
7475:
7476: /* X is a SET or CLOBBER contained in INSN that was found near the start of
7477: a loop that starts with the label at LOOP_START.
7478:
7479: If X is a SET, we see if its SET_SRC is currently in our hash table.
7480: If so, we see if it has a value equal to some register used only in the
7481: loop exit code (as marked by jump.c).
7482:
7483: If those two conditions are true, we search backwards from the start of
7484: the loop to see if that same value was loaded into a register that still
7485: retains its value at the start of the loop.
7486:
7487: If so, we insert an insn after the load to copy the destination of that
7488: load into the equivalent register and (try to) replace our SET_SRC with that
7489: register.
7490:
7491: In any event, we invalidate whatever this SET or CLOBBER modifies. */
7492:
7493: static void
7494: cse_set_around_loop (x, insn, loop_start)
7495: rtx x;
7496: rtx insn;
7497: rtx loop_start;
7498: {
7499: struct table_elt *src_elt;
7500: static struct write_data init = {0, 0, 0, 0};
7501: struct write_data writes_memory;
7502:
7503: writes_memory = init;
7504:
7505: /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
7506: are setting PC or CC0 or whose SET_SRC is already a register. */
7507: if (GET_CODE (x) == SET
7508: && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
7509: && GET_CODE (SET_SRC (x)) != REG)
7510: {
7511: src_elt = lookup (SET_SRC (x),
7512: HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
7513: GET_MODE (SET_DEST (x)));
7514:
7515: if (src_elt)
7516: for (src_elt = src_elt->first_same_value; src_elt;
7517: src_elt = src_elt->next_same_value)
7518: if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
7519: && COST (src_elt->exp) < COST (SET_SRC (x)))
7520: {
7521: rtx p, set;
7522:
7523: /* Look for an insn in front of LOOP_START that sets
7524: something in the desired mode to SET_SRC (x) before we hit
7525: a label or CALL_INSN. */
7526:
7527: for (p = prev_nonnote_insn (loop_start);
7528: p && GET_CODE (p) != CALL_INSN
7529: && GET_CODE (p) != CODE_LABEL;
7530: p = prev_nonnote_insn (p))
7531: if ((set = single_set (p)) != 0
7532: && GET_CODE (SET_DEST (set)) == REG
7533: && GET_MODE (SET_DEST (set)) == src_elt->mode
7534: && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
7535: {
7536: /* We now have to ensure that nothing between P
7537: and LOOP_START modified anything referenced in
7538: SET_SRC (x). We know that nothing within the loop
7539: can modify it, or we would have invalidated it in
7540: the hash table. */
7541: rtx q;
7542:
7543: cse_check_loop_start_value = SET_SRC (x);
7544: for (q = p; q != loop_start; q = NEXT_INSN (q))
7545: if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
7546: note_stores (PATTERN (q), cse_check_loop_start);
7547:
7548: /* If nothing was changed and we can replace our
7549: SET_SRC, add an insn after P to copy its destination
7550: to what we will be replacing SET_SRC with. */
7551: if (cse_check_loop_start_value
7552: && validate_change (insn, &SET_SRC (x),
7553: src_elt->exp, 0))
7554: emit_insn_after (gen_move_insn (src_elt->exp,
7555: SET_DEST (set)),
7556: p);
7557: break;
7558: }
7559: }
7560: }
7561:
7562: /* Now invalidate anything modified by X. */
7563: note_mem_written (SET_DEST (x), &writes_memory);
7564:
7565: if (writes_memory.var)
7566: invalidate_memory (&writes_memory);
7567:
7568: /* See comment on similar code in cse_insn for explanation of these tests. */
7569: if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
7570: || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all
7571: && ! cse_rtx_addr_varies_p (SET_DEST (x))))
7572: invalidate (SET_DEST (x));
1.1.1.6 ! root 7573: else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
! 7574: || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
! 7575: invalidate (XEXP (SET_DEST (x), 0));
1.1 root 7576: }
7577:
7578: /* Find the end of INSN's basic block and return its range,
7579: the total number of SETs in all the insns of the block, the last insn of the
7580: block, and the branch path.
7581:
7582: The branch path indicates which branches should be followed. If a non-zero
7583: path size is specified, the block should be rescanned and a different set
7584: of branches will be taken. The branch path is only used if
1.1.1.3 root 7585: FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
1.1 root 7586:
7587: DATA is a pointer to a struct cse_basic_block_data, defined below, that is
7588: used to describe the block. It is filled in with the information about
7589: the current block. The incoming structure's branch path, if any, is used
7590: to construct the output branch path. */
7591:
7592: void
1.1.1.3 root 7593: cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
1.1 root 7594: rtx insn;
7595: struct cse_basic_block_data *data;
7596: int follow_jumps;
7597: int after_loop;
1.1.1.3 root 7598: int skip_blocks;
1.1 root 7599: {
7600: rtx p = insn, q;
7601: int nsets = 0;
7602: int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
1.1.1.3 root 7603: rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
1.1 root 7604: int path_size = data->path_size;
7605: int path_entry = 0;
7606: int i;
7607:
7608: /* Update the previous branch path, if any. If the last branch was
7609: previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
7610: shorten the path by one and look at the previous branch. We know that
7611: at least one branch must have been taken if PATH_SIZE is non-zero. */
7612: while (path_size > 0)
7613: {
1.1.1.3 root 7614: if (data->path[path_size - 1].status != NOT_TAKEN)
1.1 root 7615: {
7616: data->path[path_size - 1].status = NOT_TAKEN;
7617: break;
7618: }
7619: else
7620: path_size--;
7621: }
7622:
7623: /* Scan to end of this basic block. */
7624: while (p && GET_CODE (p) != CODE_LABEL)
7625: {
7626: /* Don't cse out the end of a loop. This makes a difference
7627: only for the unusual loops that always execute at least once;
7628: all other loops have labels there so we will stop in any case.
7629: Cse'ing out the end of the loop is dangerous because it
7630: might cause an invariant expression inside the loop
7631: to be reused after the end of the loop. This would make it
7632: hard to move the expression out of the loop in loop.c,
7633: especially if it is one of several equivalent expressions
7634: and loop.c would like to eliminate it.
7635:
7636: If we are running after loop.c has finished, we can ignore
7637: the NOTE_INSN_LOOP_END. */
7638:
7639: if (! after_loop && GET_CODE (p) == NOTE
7640: && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
7641: break;
7642:
7643: /* Don't cse over a call to setjmp; on some machines (eg vax)
7644: the regs restored by the longjmp come from
7645: a later time than the setjmp. */
7646: if (GET_CODE (p) == NOTE
7647: && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
7648: break;
7649:
7650: /* A PARALLEL can have lots of SETs in it,
7651: especially if it is really an ASM_OPERANDS. */
7652: if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
7653: && GET_CODE (PATTERN (p)) == PARALLEL)
7654: nsets += XVECLEN (PATTERN (p), 0);
7655: else if (GET_CODE (p) != NOTE)
7656: nsets += 1;
7657:
1.1.1.4 root 7658: /* Ignore insns made by CSE; they cannot affect the boundaries of
7659: the basic block. */
7660:
7661: if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
1.1.1.3 root 7662: high_cuid = INSN_CUID (p);
1.1.1.4 root 7663: if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
7664: low_cuid = INSN_CUID (p);
1.1 root 7665:
7666: /* See if this insn is in our branch path. If it is and we are to
7667: take it, do so. */
7668: if (path_entry < path_size && data->path[path_entry].branch == p)
7669: {
1.1.1.3 root 7670: if (data->path[path_entry].status != NOT_TAKEN)
1.1 root 7671: p = JUMP_LABEL (p);
7672:
7673: /* Point to next entry in path, if any. */
7674: path_entry++;
7675: }
7676:
7677: /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
7678: was specified, we haven't reached our maximum path length, there are
7679: insns following the target of the jump, this is the only use of the
1.1.1.3 root 7680: jump label, and the target label is preceded by a BARRIER.
7681:
7682: Alternatively, we can follow the jump if it branches around a
7683: block of code and there are no other branches into the block.
7684: In this case invalidate_skipped_block will be called to invalidate any
7685: registers set in the block when following the jump. */
7686:
7687: else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
1.1 root 7688: && GET_CODE (p) == JUMP_INSN
7689: && GET_CODE (PATTERN (p)) == SET
7690: && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
7691: && LABEL_NUSES (JUMP_LABEL (p)) == 1
7692: && NEXT_INSN (JUMP_LABEL (p)) != 0)
7693: {
7694: for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
7695: if ((GET_CODE (q) != NOTE
7696: || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
7697: || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
7698: && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
7699: break;
7700:
7701: /* If we ran into a BARRIER, this code is an extension of the
7702: basic block when the branch is taken. */
1.1.1.3 root 7703: if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
1.1 root 7704: {
7705: /* Don't allow ourself to keep walking around an
7706: always-executed loop. */
1.1.1.3 root 7707: if (next_real_insn (q) == next)
7708: {
7709: p = NEXT_INSN (p);
7710: continue;
7711: }
1.1 root 7712:
7713: /* Similarly, don't put a branch in our path more than once. */
7714: for (i = 0; i < path_entry; i++)
7715: if (data->path[i].branch == p)
7716: break;
7717:
7718: if (i != path_entry)
7719: break;
7720:
7721: data->path[path_entry].branch = p;
7722: data->path[path_entry++].status = TAKEN;
7723:
7724: /* This branch now ends our path. It was possible that we
7725: didn't see this branch the last time around (when the
7726: insn in front of the target was a JUMP_INSN that was
7727: turned into a no-op). */
7728: path_size = path_entry;
7729:
7730: p = JUMP_LABEL (p);
7731: /* Mark block so we won't scan it again later. */
7732: PUT_MODE (NEXT_INSN (p), QImode);
7733: }
1.1.1.3 root 7734: /* Detect a branch around a block of code. */
7735: else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
7736: {
7737: register rtx tmp;
7738:
7739: if (next_real_insn (q) == next)
7740: {
7741: p = NEXT_INSN (p);
7742: continue;
7743: }
7744:
7745: for (i = 0; i < path_entry; i++)
7746: if (data->path[i].branch == p)
7747: break;
7748:
7749: if (i != path_entry)
7750: break;
7751:
7752: /* This is no_labels_between_p (p, q) with an added check for
7753: reaching the end of a function (in case Q precedes P). */
7754: for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
7755: if (GET_CODE (tmp) == CODE_LABEL)
7756: break;
7757:
7758: if (tmp == q)
7759: {
7760: data->path[path_entry].branch = p;
7761: data->path[path_entry++].status = AROUND;
7762:
7763: path_size = path_entry;
7764:
7765: p = JUMP_LABEL (p);
7766: /* Mark block so we won't scan it again later. */
7767: PUT_MODE (NEXT_INSN (p), QImode);
7768: }
7769: }
1.1 root 7770: }
7771: p = NEXT_INSN (p);
7772: }
7773:
7774: data->low_cuid = low_cuid;
7775: data->high_cuid = high_cuid;
7776: data->nsets = nsets;
7777: data->last = p;
7778:
7779: /* If all jumps in the path are not taken, set our path length to zero
7780: so a rescan won't be done. */
7781: for (i = path_size - 1; i >= 0; i--)
1.1.1.3 root 7782: if (data->path[i].status != NOT_TAKEN)
1.1 root 7783: break;
7784:
7785: if (i == -1)
7786: data->path_size = 0;
7787: else
7788: data->path_size = path_size;
7789:
7790: /* End the current branch path. */
7791: data->path[path_size].branch = 0;
7792: }
7793:
7794: /* Perform cse on the instructions of a function.
7795: F is the first instruction.
7796: NREGS is one plus the highest pseudo-reg number used in the instruction.
7797:
7798: AFTER_LOOP is 1 if this is the cse call done after loop optimization
7799: (only if -frerun-cse-after-loop).
7800:
7801: Returns 1 if jump_optimize should be redone due to simplifications
7802: in conditional jump instructions. */
7803:
7804: int
7805: cse_main (f, nregs, after_loop, file)
7806: rtx f;
7807: int nregs;
7808: int after_loop;
7809: FILE *file;
7810: {
7811: struct cse_basic_block_data val;
7812: register rtx insn = f;
7813: register int i;
7814:
7815: cse_jumps_altered = 0;
7816: constant_pool_entries_cost = 0;
7817: val.path_size = 0;
7818:
7819: init_recog ();
7820:
7821: max_reg = nregs;
7822:
7823: all_minus_one = (int *) alloca (nregs * sizeof (int));
7824: consec_ints = (int *) alloca (nregs * sizeof (int));
7825:
7826: for (i = 0; i < nregs; i++)
7827: {
7828: all_minus_one[i] = -1;
7829: consec_ints[i] = i;
7830: }
7831:
7832: reg_next_eqv = (int *) alloca (nregs * sizeof (int));
7833: reg_prev_eqv = (int *) alloca (nregs * sizeof (int));
7834: reg_qty = (int *) alloca (nregs * sizeof (int));
7835: reg_in_table = (int *) alloca (nregs * sizeof (int));
7836: reg_tick = (int *) alloca (nregs * sizeof (int));
7837:
7838: /* Discard all the free elements of the previous function
7839: since they are allocated in the temporarily obstack. */
7840: bzero (table, sizeof table);
7841: free_element_chain = 0;
7842: n_elements_made = 0;
7843:
7844: /* Find the largest uid. */
7845:
1.1.1.4 root 7846: max_uid = get_max_uid ();
7847: uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int));
7848: bzero (uid_cuid, (max_uid + 1) * sizeof (int));
1.1 root 7849:
7850: /* Compute the mapping from uids to cuids.
7851: CUIDs are numbers assigned to insns, like uids,
7852: except that cuids increase monotonically through the code.
7853: Don't assign cuids to line-number NOTEs, so that the distance in cuids
7854: between two insns is not affected by -g. */
7855:
7856: for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
7857: {
7858: if (GET_CODE (insn) != NOTE
7859: || NOTE_LINE_NUMBER (insn) < 0)
7860: INSN_CUID (insn) = ++i;
7861: else
7862: /* Give a line number note the same cuid as preceding insn. */
7863: INSN_CUID (insn) = i;
7864: }
7865:
7866: /* Initialize which registers are clobbered by calls. */
7867:
7868: CLEAR_HARD_REG_SET (regs_invalidated_by_call);
7869:
7870: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
7871: if ((call_used_regs[i]
7872: /* Used to check !fixed_regs[i] here, but that isn't safe;
7873: fixed regs are still call-clobbered, and sched can get
7874: confused if they can "live across calls".
7875:
7876: The frame pointer is always preserved across calls. The arg
7877: pointer is if it is fixed. The stack pointer usually is, unless
7878: RETURN_POPS_ARGS, in which case an explicit CLOBBER
7879: will be present. If we are generating PIC code, the PIC offset
7880: table register is preserved across calls. */
7881:
7882: && i != STACK_POINTER_REGNUM
7883: && i != FRAME_POINTER_REGNUM
1.1.1.6 ! root 7884: #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
! 7885: && i != HARD_FRAME_POINTER_REGNUM
! 7886: #endif
1.1 root 7887: #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
7888: && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
7889: #endif
7890: #ifdef PIC_OFFSET_TABLE_REGNUM
7891: && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
7892: #endif
7893: )
7894: || global_regs[i])
7895: SET_HARD_REG_BIT (regs_invalidated_by_call, i);
7896:
7897: /* Loop over basic blocks.
7898: Compute the maximum number of qty's needed for each basic block
7899: (which is 2 for each SET). */
7900: insn = f;
7901: while (insn)
7902: {
1.1.1.3 root 7903: cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
7904: flag_cse_skip_blocks);
1.1 root 7905:
7906: /* If this basic block was already processed or has no sets, skip it. */
7907: if (val.nsets == 0 || GET_MODE (insn) == QImode)
7908: {
7909: PUT_MODE (insn, VOIDmode);
7910: insn = (val.last ? NEXT_INSN (val.last) : 0);
7911: val.path_size = 0;
7912: continue;
7913: }
7914:
7915: cse_basic_block_start = val.low_cuid;
7916: cse_basic_block_end = val.high_cuid;
7917: max_qty = val.nsets * 2;
7918:
7919: if (file)
7920: fprintf (file, ";; Processing block from %d to %d, %d sets.\n",
7921: INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
7922: val.nsets);
7923:
7924: /* Make MAX_QTY bigger to give us room to optimize
7925: past the end of this basic block, if that should prove useful. */
7926: if (max_qty < 500)
7927: max_qty = 500;
7928:
7929: max_qty += max_reg;
7930:
7931: /* If this basic block is being extended by following certain jumps,
7932: (see `cse_end_of_basic_block'), we reprocess the code from the start.
7933: Otherwise, we start after this basic block. */
7934: if (val.path_size > 0)
7935: cse_basic_block (insn, val.last, val.path, 0);
7936: else
7937: {
7938: int old_cse_jumps_altered = cse_jumps_altered;
7939: rtx temp;
7940:
7941: /* When cse changes a conditional jump to an unconditional
7942: jump, we want to reprocess the block, since it will give
7943: us a new branch path to investigate. */
7944: cse_jumps_altered = 0;
7945: temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
1.1.1.3 root 7946: if (cse_jumps_altered == 0
7947: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
1.1 root 7948: insn = temp;
7949:
7950: cse_jumps_altered |= old_cse_jumps_altered;
7951: }
7952:
7953: #ifdef USE_C_ALLOCA
7954: alloca (0);
7955: #endif
7956: }
7957:
7958: /* Tell refers_to_mem_p that qty_const info is not available. */
7959: qty_const = 0;
7960:
7961: if (max_elements_made < n_elements_made)
7962: max_elements_made = n_elements_made;
7963:
7964: return cse_jumps_altered;
7965: }
7966:
7967: /* Process a single basic block. FROM and TO and the limits of the basic
7968: block. NEXT_BRANCH points to the branch path when following jumps or
7969: a null path when not following jumps.
7970:
7971: AROUND_LOOP is non-zero if we are to try to cse around to the start of a
7972: loop. This is true when we are being called for the last time on a
7973: block and this CSE pass is before loop.c. */
7974:
7975: static rtx
7976: cse_basic_block (from, to, next_branch, around_loop)
7977: register rtx from, to;
7978: struct branch_path *next_branch;
7979: int around_loop;
7980: {
7981: register rtx insn;
7982: int to_usage = 0;
7983: int in_libcall_block = 0;
7984:
7985: /* Each of these arrays is undefined before max_reg, so only allocate
7986: the space actually needed and adjust the start below. */
7987:
7988: qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7989: qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7990: qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode));
7991: qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7992: qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7993: qty_comparison_code
7994: = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code));
7995: qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int));
7996: qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx));
7997:
7998: qty_first_reg -= max_reg;
7999: qty_last_reg -= max_reg;
8000: qty_mode -= max_reg;
8001: qty_const -= max_reg;
8002: qty_const_insn -= max_reg;
8003: qty_comparison_code -= max_reg;
8004: qty_comparison_qty -= max_reg;
8005: qty_comparison_const -= max_reg;
8006:
8007: new_basic_block ();
8008:
8009: /* TO might be a label. If so, protect it from being deleted. */
8010: if (to != 0 && GET_CODE (to) == CODE_LABEL)
8011: ++LABEL_NUSES (to);
8012:
8013: for (insn = from; insn != to; insn = NEXT_INSN (insn))
8014: {
8015: register enum rtx_code code;
8016:
8017: /* See if this is a branch that is part of the path. If so, and it is
8018: to be taken, do so. */
8019: if (next_branch->branch == insn)
8020: {
1.1.1.3 root 8021: enum taken status = next_branch++->status;
8022: if (status != NOT_TAKEN)
1.1 root 8023: {
1.1.1.3 root 8024: if (status == TAKEN)
8025: record_jump_equiv (insn, 1);
8026: else
8027: invalidate_skipped_block (NEXT_INSN (insn));
8028:
1.1 root 8029: /* Set the last insn as the jump insn; it doesn't affect cc0.
8030: Then follow this branch. */
8031: #ifdef HAVE_cc0
8032: prev_insn_cc0 = 0;
8033: #endif
8034: prev_insn = insn;
8035: insn = JUMP_LABEL (insn);
8036: continue;
8037: }
8038: }
8039:
8040: code = GET_CODE (insn);
8041: if (GET_MODE (insn) == QImode)
8042: PUT_MODE (insn, VOIDmode);
8043:
8044: if (GET_RTX_CLASS (code) == 'i')
8045: {
8046: /* Process notes first so we have all notes in canonical forms when
8047: looking for duplicate operations. */
8048:
8049: if (REG_NOTES (insn))
1.1.1.4 root 8050: REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
1.1 root 8051:
8052: /* Track when we are inside in LIBCALL block. Inside such a block,
8053: we do not want to record destinations. The last insn of a
8054: LIBCALL block is not considered to be part of the block, since
1.1.1.3 root 8055: its destination is the result of the block and hence should be
1.1 root 8056: recorded. */
8057:
1.1.1.4 root 8058: if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
1.1 root 8059: in_libcall_block = 1;
1.1.1.4 root 8060: else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
1.1 root 8061: in_libcall_block = 0;
8062:
8063: cse_insn (insn, in_libcall_block);
8064: }
8065:
8066: /* If INSN is now an unconditional jump, skip to the end of our
8067: basic block by pretending that we just did the last insn in the
8068: basic block. If we are jumping to the end of our block, show
8069: that we can have one usage of TO. */
8070:
8071: if (simplejump_p (insn))
8072: {
8073: if (to == 0)
8074: return 0;
8075:
8076: if (JUMP_LABEL (insn) == to)
8077: to_usage = 1;
8078:
1.1.1.3 root 8079: /* Maybe TO was deleted because the jump is unconditional.
8080: If so, there is nothing left in this basic block. */
8081: /* ??? Perhaps it would be smarter to set TO
8082: to whatever follows this insn,
8083: and pretend the basic block had always ended here. */
8084: if (INSN_DELETED_P (to))
8085: break;
8086:
1.1 root 8087: insn = PREV_INSN (to);
8088: }
8089:
8090: /* See if it is ok to keep on going past the label
8091: which used to end our basic block. Remember that we incremented
1.1.1.2 root 8092: the count of that label, so we decrement it here. If we made
1.1 root 8093: a jump unconditional, TO_USAGE will be one; in that case, we don't
8094: want to count the use in that jump. */
8095:
8096: if (to != 0 && NEXT_INSN (insn) == to
8097: && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
8098: {
8099: struct cse_basic_block_data val;
8100:
8101: insn = NEXT_INSN (to);
8102:
8103: if (LABEL_NUSES (to) == 0)
8104: delete_insn (to);
8105:
8106: /* Find the end of the following block. Note that we won't be
8107: following branches in this case. If TO was the last insn
8108: in the function, we are done. Similarly, if we deleted the
1.1.1.2 root 8109: insn after TO, it must have been because it was preceded by
1.1 root 8110: a BARRIER. In that case, we are done with this block because it
8111: has no continuation. */
8112:
8113: if (insn == 0 || INSN_DELETED_P (insn))
8114: return 0;
8115:
8116: to_usage = 0;
8117: val.path_size = 0;
1.1.1.3 root 8118: cse_end_of_basic_block (insn, &val, 0, 0, 0);
1.1 root 8119:
8120: /* If the tables we allocated have enough space left
8121: to handle all the SETs in the next basic block,
8122: continue through it. Otherwise, return,
8123: and that block will be scanned individually. */
8124: if (val.nsets * 2 + next_qty > max_qty)
8125: break;
8126:
8127: cse_basic_block_start = val.low_cuid;
8128: cse_basic_block_end = val.high_cuid;
8129: to = val.last;
8130:
8131: /* Prevent TO from being deleted if it is a label. */
8132: if (to != 0 && GET_CODE (to) == CODE_LABEL)
8133: ++LABEL_NUSES (to);
8134:
8135: /* Back up so we process the first insn in the extension. */
8136: insn = PREV_INSN (insn);
8137: }
8138: }
8139:
8140: if (next_qty > max_qty)
8141: abort ();
8142:
8143: /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
8144: the previous insn is the only insn that branches to the head of a loop,
8145: we can cse into the loop. Don't do this if we changed the jump
8146: structure of a loop unless we aren't going to be following jumps. */
8147:
1.1.1.3 root 8148: if ((cse_jumps_altered == 0
8149: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
1.1 root 8150: && around_loop && to != 0
8151: && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
8152: && GET_CODE (PREV_INSN (to)) == JUMP_INSN
8153: && JUMP_LABEL (PREV_INSN (to)) != 0
8154: && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
8155: cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
8156:
8157: return to ? NEXT_INSN (to) : 0;
8158: }
8159:
8160: /* Count the number of times registers are used (not set) in X.
8161: COUNTS is an array in which we accumulate the count, INCR is how much
8162: we count each register usage. */
8163:
8164: static void
8165: count_reg_usage (x, counts, incr)
8166: rtx x;
8167: int *counts;
8168: int incr;
8169: {
8170: enum rtx_code code = GET_CODE (x);
8171: char *fmt;
8172: int i, j;
8173:
8174: switch (code)
8175: {
8176: case REG:
8177: counts[REGNO (x)] += incr;
8178: return;
8179:
8180: case PC:
8181: case CC0:
8182: case CONST:
8183: case CONST_INT:
8184: case CONST_DOUBLE:
8185: case SYMBOL_REF:
8186: case LABEL_REF:
8187: case CLOBBER:
8188: return;
8189:
8190: case SET:
8191: /* Unless we are setting a REG, count everything in SET_DEST. */
8192: if (GET_CODE (SET_DEST (x)) != REG)
8193: count_reg_usage (SET_DEST (x), counts, incr);
8194: count_reg_usage (SET_SRC (x), counts, incr);
8195: return;
8196:
8197: case INSN:
8198: case JUMP_INSN:
8199: case CALL_INSN:
8200: count_reg_usage (PATTERN (x), counts, incr);
8201:
8202: /* Things used in a REG_EQUAL note aren't dead since loop may try to
8203: use them. */
8204:
8205: if (REG_NOTES (x))
8206: count_reg_usage (REG_NOTES (x), counts, incr);
8207: return;
8208:
8209: case EXPR_LIST:
8210: case INSN_LIST:
8211: if (REG_NOTE_KIND (x) == REG_EQUAL)
8212: count_reg_usage (XEXP (x, 0), counts, incr);
8213: if (XEXP (x, 1))
8214: count_reg_usage (XEXP (x, 1), counts, incr);
8215: return;
8216: }
8217:
8218: fmt = GET_RTX_FORMAT (code);
8219: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
8220: {
8221: if (fmt[i] == 'e')
8222: count_reg_usage (XEXP (x, i), counts, incr);
8223: else if (fmt[i] == 'E')
8224: for (j = XVECLEN (x, i) - 1; j >= 0; j--)
8225: count_reg_usage (XVECEXP (x, i, j), counts, incr);
8226: }
8227: }
8228:
8229: /* Scan all the insns and delete any that are dead; i.e., they store a register
8230: that is never used or they copy a register to itself.
8231:
8232: This is used to remove insns made obviously dead by cse. It improves the
8233: heuristics in loop since it won't try to move dead invariants out of loops
8234: or make givs for dead quantities. The remaining passes of the compilation
8235: are also sped up. */
8236:
8237: void
8238: delete_dead_from_cse (insns, nreg)
8239: rtx insns;
8240: int nreg;
8241: {
8242: int *counts = (int *) alloca (nreg * sizeof (int));
1.1.1.4 root 8243: rtx insn, prev;
1.1.1.2 root 8244: rtx tem;
1.1 root 8245: int i;
1.1.1.3 root 8246: int in_libcall = 0;
1.1 root 8247:
8248: /* First count the number of times each register is used. */
8249: bzero (counts, sizeof (int) * nreg);
8250: for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
8251: count_reg_usage (insn, counts, 1);
8252:
8253: /* Go from the last insn to the first and delete insns that only set unused
8254: registers or copy a register to itself. As we delete an insn, remove
8255: usage counts for registers it uses. */
1.1.1.4 root 8256: for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev)
1.1 root 8257: {
8258: int live_insn = 0;
8259:
1.1.1.4 root 8260: prev = prev_real_insn (insn);
8261:
1.1.1.3 root 8262: /* Don't delete any insns that are part of a libcall block.
1.1.1.4 root 8263: Flow or loop might get confused if we did that. Remember
8264: that we are scanning backwards. */
8265: if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
1.1.1.3 root 8266: in_libcall = 1;
8267:
8268: if (in_libcall)
8269: live_insn = 1;
8270: else if (GET_CODE (PATTERN (insn)) == SET)
1.1 root 8271: {
8272: if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
8273: && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
8274: ;
8275:
1.1.1.2 root 8276: #ifdef HAVE_cc0
8277: else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
8278: && ! side_effects_p (SET_SRC (PATTERN (insn)))
8279: && ((tem = next_nonnote_insn (insn)) == 0
8280: || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8281: || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8282: ;
8283: #endif
1.1 root 8284: else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
8285: || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
8286: || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
8287: || side_effects_p (SET_SRC (PATTERN (insn))))
8288: live_insn = 1;
8289: }
8290: else if (GET_CODE (PATTERN (insn)) == PARALLEL)
8291: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
8292: {
8293: rtx elt = XVECEXP (PATTERN (insn), 0, i);
8294:
8295: if (GET_CODE (elt) == SET)
8296: {
8297: if (GET_CODE (SET_DEST (elt)) == REG
8298: && SET_DEST (elt) == SET_SRC (elt))
8299: ;
8300:
1.1.1.2 root 8301: #ifdef HAVE_cc0
8302: else if (GET_CODE (SET_DEST (elt)) == CC0
8303: && ! side_effects_p (SET_SRC (elt))
8304: && ((tem = next_nonnote_insn (insn)) == 0
8305: || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
8306: || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
8307: ;
8308: #endif
1.1 root 8309: else if (GET_CODE (SET_DEST (elt)) != REG
8310: || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
8311: || counts[REGNO (SET_DEST (elt))] != 0
8312: || side_effects_p (SET_SRC (elt)))
8313: live_insn = 1;
8314: }
8315: else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
8316: live_insn = 1;
8317: }
8318: else
8319: live_insn = 1;
8320:
8321: /* If this is a dead insn, delete it and show registers in it aren't
1.1.1.3 root 8322: being used. */
1.1 root 8323:
1.1.1.3 root 8324: if (! live_insn)
1.1 root 8325: {
8326: count_reg_usage (insn, counts, -1);
1.1.1.4 root 8327: delete_insn (insn);
1.1 root 8328: }
1.1.1.3 root 8329:
1.1.1.4 root 8330: if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
1.1.1.3 root 8331: in_libcall = 0;
1.1 root 8332: }
8333: }
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