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1.1 root 1: /* Common subexpression elimination for GNU compiler. 1.1.1.8 ! root 2: Copyright (C) 1987, 88, 89, 92, 93, 94, 1995 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 1.1.1.8 ! root 18: the Free Software Foundation, 59 Temple Place - Suite 330, ! 19: Boston, MA 02111-1307, USA. */ 1.1 root 20: 21: 22: #include "config.h" 1.1.1.6 root 23: /* Must precede rtl.h for FFS. */ 24: #include <stdio.h> 25: 1.1 root 26: #include "rtl.h" 27: #include "regs.h" 28: #include "hard-reg-set.h" 29: #include "flags.h" 30: #include "real.h" 31: #include "insn-config.h" 32: #include "recog.h" 33: 34: #include <setjmp.h> 35: 36: /* The basic idea of common subexpression elimination is to go 37: through the code, keeping a record of expressions that would 38: have the same value at the current scan point, and replacing 39: expressions encountered with the cheapest equivalent expression. 40: 41: It is too complicated to keep track of the different possibilities 42: when control paths merge; so, at each label, we forget all that is 43: known and start fresh. This can be described as processing each 44: basic block separately. Note, however, that these are not quite 45: the same as the basic blocks found by a later pass and used for 46: data flow analysis and register packing. We do not need to start fresh 47: after a conditional jump instruction if there is no label there. 48: 49: We use two data structures to record the equivalent expressions: 50: a hash table for most expressions, and several vectors together 51: with "quantity numbers" to record equivalent (pseudo) registers. 52: 53: The use of the special data structure for registers is desirable 54: because it is faster. It is possible because registers references 55: contain a fairly small number, the register number, taken from 56: a contiguously allocated series, and two register references are 57: identical if they have the same number. General expressions 58: do not have any such thing, so the only way to retrieve the 59: information recorded on an expression other than a register 60: is to keep it in a hash table. 61: 62: Registers and "quantity numbers": 63: 64: At the start of each basic block, all of the (hardware and pseudo) 65: registers used in the function are given distinct quantity 66: numbers to indicate their contents. During scan, when the code 67: copies one register into another, we copy the quantity number. 68: When a register is loaded in any other way, we allocate a new 69: quantity number to describe the value generated by this operation. 70: `reg_qty' records what quantity a register is currently thought 71: of as containing. 72: 73: All real quantity numbers are greater than or equal to `max_reg'. 74: If register N has not been assigned a quantity, reg_qty[N] will equal N. 75: 76: Quantity numbers below `max_reg' do not exist and none of the `qty_...' 77: variables should be referenced with an index below `max_reg'. 78: 79: We also maintain a bidirectional chain of registers for each 80: quantity number. `qty_first_reg', `qty_last_reg', 81: `reg_next_eqv' and `reg_prev_eqv' hold these chains. 82: 83: The first register in a chain is the one whose lifespan is least local. 84: Among equals, it is the one that was seen first. 85: We replace any equivalent register with that one. 86: 87: If two registers have the same quantity number, it must be true that 88: REG expressions with `qty_mode' must be in the hash table for both 89: registers and must be in the same class. 90: 91: The converse is not true. Since hard registers may be referenced in 92: any mode, two REG expressions might be equivalent in the hash table 93: but not have the same quantity number if the quantity number of one 94: of the registers is not the same mode as those expressions. 95: 96: Constants and quantity numbers 97: 98: When a quantity has a known constant value, that value is stored 99: in the appropriate element of qty_const. This is in addition to 100: putting the constant in the hash table as is usual for non-regs. 101: 1.1.1.2 root 102: Whether a reg or a constant is preferred is determined by the configuration 1.1 root 103: macro CONST_COSTS and will often depend on the constant value. In any 104: event, expressions containing constants can be simplified, by fold_rtx. 105: 106: When a quantity has a known nearly constant value (such as an address 107: of a stack slot), that value is stored in the appropriate element 108: of qty_const. 109: 110: Integer constants don't have a machine mode. However, cse 111: determines the intended machine mode from the destination 112: of the instruction that moves the constant. The machine mode 113: is recorded in the hash table along with the actual RTL 114: constant expression so that different modes are kept separate. 115: 116: Other expressions: 117: 118: To record known equivalences among expressions in general 119: we use a hash table called `table'. It has a fixed number of buckets 120: that contain chains of `struct table_elt' elements for expressions. 121: These chains connect the elements whose expressions have the same 122: hash codes. 123: 124: Other chains through the same elements connect the elements which 125: currently have equivalent values. 126: 127: Register references in an expression are canonicalized before hashing 128: the expression. This is done using `reg_qty' and `qty_first_reg'. 129: The hash code of a register reference is computed using the quantity 130: number, not the register number. 131: 132: When the value of an expression changes, it is necessary to remove from the 133: hash table not just that expression but all expressions whose values 134: could be different as a result. 135: 136: 1. If the value changing is in memory, except in special cases 137: ANYTHING referring to memory could be changed. That is because 138: nobody knows where a pointer does not point. 139: The function `invalidate_memory' removes what is necessary. 140: 141: The special cases are when the address is constant or is 142: a constant plus a fixed register such as the frame pointer 143: or a static chain pointer. When such addresses are stored in, 144: we can tell exactly which other such addresses must be invalidated 145: due to overlap. `invalidate' does this. 146: All expressions that refer to non-constant 147: memory addresses are also invalidated. `invalidate_memory' does this. 148: 149: 2. If the value changing is a register, all expressions 150: containing references to that register, and only those, 151: must be removed. 152: 153: Because searching the entire hash table for expressions that contain 154: a register is very slow, we try to figure out when it isn't necessary. 155: Precisely, this is necessary only when expressions have been 156: entered in the hash table using this register, and then the value has 157: changed, and then another expression wants to be added to refer to 158: the register's new value. This sequence of circumstances is rare 159: within any one basic block. 160: 161: The vectors `reg_tick' and `reg_in_table' are used to detect this case. 162: reg_tick[i] is incremented whenever a value is stored in register i. 163: reg_in_table[i] holds -1 if no references to register i have been 164: entered in the table; otherwise, it contains the value reg_tick[i] had 165: when the references were entered. If we want to enter a reference 166: and reg_in_table[i] != reg_tick[i], we must scan and remove old references. 167: Until we want to enter a new entry, the mere fact that the two vectors 168: don't match makes the entries be ignored if anyone tries to match them. 169: 170: Registers themselves are entered in the hash table as well as in 171: the equivalent-register chains. However, the vectors `reg_tick' 172: and `reg_in_table' do not apply to expressions which are simple 173: register references. These expressions are removed from the table 174: immediately when they become invalid, and this can be done even if 175: we do not immediately search for all the expressions that refer to 176: the register. 177: 178: A CLOBBER rtx in an instruction invalidates its operand for further 179: reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK 180: invalidates everything that resides in memory. 181: 182: Related expressions: 183: 184: Constant expressions that differ only by an additive integer 185: are called related. When a constant expression is put in 186: the table, the related expression with no constant term 187: is also entered. These are made to point at each other 188: so that it is possible to find out if there exists any 189: register equivalent to an expression related to a given expression. */ 190: 191: /* One plus largest register number used in this function. */ 192: 193: static int max_reg; 194: 195: /* Length of vectors indexed by quantity number. 196: We know in advance we will not need a quantity number this big. */ 197: 198: static int max_qty; 199: 200: /* Next quantity number to be allocated. 201: This is 1 + the largest number needed so far. */ 202: 203: static int next_qty; 204: 205: /* Indexed by quantity number, gives the first (or last) (pseudo) register 206: in the chain of registers that currently contain this quantity. */ 207: 208: static int *qty_first_reg; 209: static int *qty_last_reg; 210: 211: /* Index by quantity number, gives the mode of the quantity. */ 212: 213: static enum machine_mode *qty_mode; 214: 215: /* Indexed by quantity number, gives the rtx of the constant value of the 216: quantity, or zero if it does not have a known value. 217: A sum of the frame pointer (or arg pointer) plus a constant 218: can also be entered here. */ 219: 220: static rtx *qty_const; 221: 222: /* Indexed by qty number, gives the insn that stored the constant value 223: recorded in `qty_const'. */ 224: 225: static rtx *qty_const_insn; 226: 227: /* The next three variables are used to track when a comparison between a 228: quantity and some constant or register has been passed. In that case, we 229: know the results of the comparison in case we see it again. These variables 230: record a comparison that is known to be true. */ 231: 232: /* Indexed by qty number, gives the rtx code of a comparison with a known 233: result involving this quantity. If none, it is UNKNOWN. */ 234: static enum rtx_code *qty_comparison_code; 235: 236: /* Indexed by qty number, gives the constant being compared against in a 237: comparison of known result. If no such comparison, it is undefined. 238: If the comparison is not with a constant, it is zero. */ 239: 240: static rtx *qty_comparison_const; 241: 242: /* Indexed by qty number, gives the quantity being compared against in a 243: comparison of known result. If no such comparison, if it undefined. 244: If the comparison is not with a register, it is -1. */ 245: 246: static int *qty_comparison_qty; 247: 248: #ifdef HAVE_cc0 249: /* For machines that have a CC0, we do not record its value in the hash 250: table since its use is guaranteed to be the insn immediately following 251: its definition and any other insn is presumed to invalidate it. 252: 253: Instead, we store below the value last assigned to CC0. If it should 254: happen to be a constant, it is stored in preference to the actual 255: assigned value. In case it is a constant, we store the mode in which 256: the constant should be interpreted. */ 257: 258: static rtx prev_insn_cc0; 259: static enum machine_mode prev_insn_cc0_mode; 260: #endif 261: 262: /* Previous actual insn. 0 if at first insn of basic block. */ 263: 264: static rtx prev_insn; 265: 266: /* Insn being scanned. */ 267: 268: static rtx this_insn; 269: 270: /* Index by (pseudo) register number, gives the quantity number 271: of the register's current contents. */ 272: 273: static int *reg_qty; 274: 275: /* Index by (pseudo) register number, gives the number of the next (or 276: previous) (pseudo) register in the chain of registers sharing the same 277: value. 278: 279: Or -1 if this register is at the end of the chain. 280: 281: If reg_qty[N] == N, reg_next_eqv[N] is undefined. */ 282: 283: static int *reg_next_eqv; 284: static int *reg_prev_eqv; 285: 286: /* Index by (pseudo) register number, gives the number of times 287: that register has been altered in the current basic block. */ 288: 289: static int *reg_tick; 290: 291: /* Index by (pseudo) register number, gives the reg_tick value at which 292: rtx's containing this register are valid in the hash table. 293: If this does not equal the current reg_tick value, such expressions 294: existing in the hash table are invalid. 295: If this is -1, no expressions containing this register have been 296: entered in the table. */ 297: 298: static int *reg_in_table; 299: 300: /* A HARD_REG_SET containing all the hard registers for which there is 301: currently a REG expression in the hash table. Note the difference 302: from the above variables, which indicate if the REG is mentioned in some 303: expression in the table. */ 304: 305: static HARD_REG_SET hard_regs_in_table; 306: 307: /* A HARD_REG_SET containing all the hard registers that are invalidated 308: by a CALL_INSN. */ 309: 310: static HARD_REG_SET regs_invalidated_by_call; 311: 312: /* Two vectors of ints: 313: one containing max_reg -1's; the other max_reg + 500 (an approximation 314: for max_qty) elements where element i contains i. 315: These are used to initialize various other vectors fast. */ 316: 317: static int *all_minus_one; 318: static int *consec_ints; 319: 320: /* CUID of insn that starts the basic block currently being cse-processed. */ 321: 322: static int cse_basic_block_start; 323: 324: /* CUID of insn that ends the basic block currently being cse-processed. */ 325: 326: static int cse_basic_block_end; 327: 328: /* Vector mapping INSN_UIDs to cuids. 1.1.1.2 root 329: The cuids are like uids but increase monotonically always. 1.1 root 330: We use them to see whether a reg is used outside a given basic block. */ 331: 1.1.1.4 root 332: static int *uid_cuid; 333: 334: /* Highest UID in UID_CUID. */ 335: static int max_uid; 1.1 root 336: 337: /* Get the cuid of an insn. */ 338: 339: #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)]) 340: 341: /* Nonzero if cse has altered conditional jump insns 342: in such a way that jump optimization should be redone. */ 343: 344: static int cse_jumps_altered; 345: 1.1.1.8 ! root 346: /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put ! 347: it into an INSN without a REG_LABEL, we have to rerun jump after CSE ! 348: to put in the note. */ ! 349: static int recorded_label_ref; ! 350: 1.1 root 351: /* canon_hash stores 1 in do_not_record 352: if it notices a reference to CC0, PC, or some other volatile 353: subexpression. */ 354: 355: static int do_not_record; 356: 1.1.1.7 root 357: #ifdef LOAD_EXTEND_OP 358: 359: /* Scratch rtl used when looking for load-extended copy of a MEM. */ 360: static rtx memory_extend_rtx; 361: #endif 362: 1.1 root 363: /* canon_hash stores 1 in hash_arg_in_memory 364: if it notices a reference to memory within the expression being hashed. */ 365: 366: static int hash_arg_in_memory; 367: 368: /* canon_hash stores 1 in hash_arg_in_struct 369: if it notices a reference to memory that's part of a structure. */ 370: 371: static int hash_arg_in_struct; 372: 373: /* The hash table contains buckets which are chains of `struct table_elt's, 374: each recording one expression's information. 375: That expression is in the `exp' field. 376: 377: Those elements with the same hash code are chained in both directions 378: through the `next_same_hash' and `prev_same_hash' fields. 379: 380: Each set of expressions with equivalent values 381: are on a two-way chain through the `next_same_value' 382: and `prev_same_value' fields, and all point with 383: the `first_same_value' field at the first element in 384: that chain. The chain is in order of increasing cost. 385: Each element's cost value is in its `cost' field. 386: 387: The `in_memory' field is nonzero for elements that 388: involve any reference to memory. These elements are removed 389: whenever a write is done to an unidentified location in memory. 390: To be safe, we assume that a memory address is unidentified unless 391: the address is either a symbol constant or a constant plus 392: the frame pointer or argument pointer. 393: 394: The `in_struct' field is nonzero for elements that 395: involve any reference to memory inside a structure or array. 396: 397: The `related_value' field is used to connect related expressions 398: (that differ by adding an integer). 399: The related expressions are chained in a circular fashion. 400: `related_value' is zero for expressions for which this 401: chain is not useful. 402: 403: The `cost' field stores the cost of this element's expression. 404: 405: The `is_const' flag is set if the element is a constant (including 406: a fixed address). 407: 408: The `flag' field is used as a temporary during some search routines. 409: 410: The `mode' field is usually the same as GET_MODE (`exp'), but 411: if `exp' is a CONST_INT and has no machine mode then the `mode' 412: field is the mode it was being used as. Each constant is 413: recorded separately for each mode it is used with. */ 414: 415: 416: struct table_elt 417: { 418: rtx exp; 419: struct table_elt *next_same_hash; 420: struct table_elt *prev_same_hash; 421: struct table_elt *next_same_value; 422: struct table_elt *prev_same_value; 423: struct table_elt *first_same_value; 424: struct table_elt *related_value; 425: int cost; 426: enum machine_mode mode; 427: char in_memory; 428: char in_struct; 429: char is_const; 430: char flag; 431: }; 432: 433: /* We don't want a lot of buckets, because we rarely have very many 434: things stored in the hash table, and a lot of buckets slows 435: down a lot of loops that happen frequently. */ 436: #define NBUCKETS 31 437: 438: /* Compute hash code of X in mode M. Special-case case where X is a pseudo 439: register (hard registers may require `do_not_record' to be set). */ 440: 441: #define HASH(X, M) \ 442: (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \ 1.1.1.7 root 443: ? (((unsigned) REG << 7) + (unsigned) reg_qty[REGNO (X)]) % NBUCKETS \ 1.1 root 444: : canon_hash (X, M) % NBUCKETS) 445: 446: /* Determine whether register number N is considered a fixed register for CSE. 447: It is desirable to replace other regs with fixed regs, to reduce need for 448: non-fixed hard regs. 449: A reg wins if it is either the frame pointer or designated as fixed, 450: but not if it is an overlapping register. */ 451: #ifdef OVERLAPPING_REGNO_P 452: #define FIXED_REGNO_P(N) \ 1.1.1.6 root 453: (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ 1.1.1.7 root 454: || fixed_regs[N] || global_regs[N]) \ 1.1 root 455: && ! OVERLAPPING_REGNO_P ((N))) 456: #else 457: #define FIXED_REGNO_P(N) \ 1.1.1.6 root 458: ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ 1.1.1.7 root 459: || fixed_regs[N] || global_regs[N]) 1.1 root 460: #endif 461: 462: /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed 1.1.1.5 root 463: hard registers and pointers into the frame are the cheapest with a cost 464: of 0. Next come pseudos with a cost of one and other hard registers with 465: a cost of 2. Aside from these special cases, call `rtx_cost'. */ 466: 1.1.1.7 root 467: #define CHEAP_REGNO(N) \ 1.1.1.6 root 468: ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \ 469: || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \ 470: || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \ 471: || ((N) < FIRST_PSEUDO_REGISTER \ 1.1.1.5 root 472: && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS)) 1.1 root 473: 1.1.1.7 root 474: /* A register is cheap if it is a user variable assigned to the register 475: or if its register number always corresponds to a cheap register. */ 476: 477: #define CHEAP_REG(N) \ 478: ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \ 479: || CHEAP_REGNO (REGNO (N))) 480: 1.1 root 481: #define COST(X) \ 482: (GET_CODE (X) == REG \ 1.1.1.7 root 483: ? (CHEAP_REG (X) ? 0 \ 1.1.1.5 root 484: : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \ 1.1 root 485: : 2) \ 1.1.1.3 root 486: : rtx_cost (X, SET) * 2) 1.1 root 487: 488: /* Determine if the quantity number for register X represents a valid index 489: into the `qty_...' variables. */ 490: 491: #define REGNO_QTY_VALID_P(N) (reg_qty[N] != (N)) 492: 493: static struct table_elt *table[NBUCKETS]; 494: 495: /* Chain of `struct table_elt's made so far for this function 496: but currently removed from the table. */ 497: 498: static struct table_elt *free_element_chain; 499: 500: /* Number of `struct table_elt' structures made so far for this function. */ 501: 502: static int n_elements_made; 503: 504: /* Maximum value `n_elements_made' has had so far in this compilation 505: for functions previously processed. */ 506: 507: static int max_elements_made; 508: 509: /* Surviving equivalence class when two equivalence classes are merged 510: by recording the effects of a jump in the last insn. Zero if the 511: last insn was not a conditional jump. */ 512: 513: static struct table_elt *last_jump_equiv_class; 514: 515: /* Set to the cost of a constant pool reference if one was found for a 516: symbolic constant. If this was found, it means we should try to 517: convert constants into constant pool entries if they don't fit in 518: the insn. */ 519: 520: static int constant_pool_entries_cost; 521: 522: /* Bits describing what kind of values in memory must be invalidated 523: for a particular instruction. If all three bits are zero, 524: no memory refs need to be invalidated. Each bit is more powerful 525: than the preceding ones, and if a bit is set then the preceding 526: bits are also set. 527: 528: Here is how the bits are set: 529: Pushing onto the stack invalidates only the stack pointer, 530: writing at a fixed address invalidates only variable addresses, 531: writing in a structure element at variable address 532: invalidates all but scalar variables, 533: and writing in anything else at variable address invalidates everything. */ 534: 535: struct write_data 536: { 537: int sp : 1; /* Invalidate stack pointer. */ 538: int var : 1; /* Invalidate variable addresses. */ 539: int nonscalar : 1; /* Invalidate all but scalar variables. */ 540: int all : 1; /* Invalidate all memory refs. */ 541: }; 542: 1.1.1.5 root 543: /* Define maximum length of a branch path. */ 544: 545: #define PATHLENGTH 10 546: 547: /* This data describes a block that will be processed by cse_basic_block. */ 548: 549: struct cse_basic_block_data { 550: /* Lowest CUID value of insns in block. */ 551: int low_cuid; 552: /* Highest CUID value of insns in block. */ 553: int high_cuid; 554: /* Total number of SETs in block. */ 555: int nsets; 556: /* Last insn in the block. */ 557: rtx last; 558: /* Size of current branch path, if any. */ 559: int path_size; 560: /* Current branch path, indicating which branches will be taken. */ 561: struct branch_path { 562: /* The branch insn. */ 563: rtx branch; 564: /* Whether it should be taken or not. AROUND is the same as taken 565: except that it is used when the destination label is not preceded 566: by a BARRIER. */ 567: enum taken {TAKEN, NOT_TAKEN, AROUND} status; 568: } path[PATHLENGTH]; 569: }; 570: 1.1 root 571: /* Nonzero if X has the form (PLUS frame-pointer integer). We check for 572: virtual regs here because the simplify_*_operation routines are called 573: by integrate.c, which is called before virtual register instantiation. */ 574: 575: #define FIXED_BASE_PLUS_P(X) \ 1.1.1.6 root 576: ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ 577: || (X) == arg_pointer_rtx \ 1.1 root 578: || (X) == virtual_stack_vars_rtx \ 579: || (X) == virtual_incoming_args_rtx \ 580: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ 581: && (XEXP (X, 0) == frame_pointer_rtx \ 1.1.1.6 root 582: || XEXP (X, 0) == hard_frame_pointer_rtx \ 1.1 root 583: || XEXP (X, 0) == arg_pointer_rtx \ 584: || XEXP (X, 0) == virtual_stack_vars_rtx \ 585: || XEXP (X, 0) == virtual_incoming_args_rtx))) 586: 1.1.1.3 root 587: /* Similar, but also allows reference to the stack pointer. 588: 589: This used to include FIXED_BASE_PLUS_P, however, we can't assume that 590: arg_pointer_rtx by itself is nonzero, because on at least one machine, 591: the i960, the arg pointer is zero when it is unused. */ 1.1 root 592: 593: #define NONZERO_BASE_PLUS_P(X) \ 1.1.1.6 root 594: ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \ 1.1.1.3 root 595: || (X) == virtual_stack_vars_rtx \ 596: || (X) == virtual_incoming_args_rtx \ 597: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ 598: && (XEXP (X, 0) == frame_pointer_rtx \ 1.1.1.6 root 599: || XEXP (X, 0) == hard_frame_pointer_rtx \ 1.1.1.3 root 600: || XEXP (X, 0) == arg_pointer_rtx \ 601: || XEXP (X, 0) == virtual_stack_vars_rtx \ 602: || XEXP (X, 0) == virtual_incoming_args_rtx)) \ 1.1 root 603: || (X) == stack_pointer_rtx \ 604: || (X) == virtual_stack_dynamic_rtx \ 605: || (X) == virtual_outgoing_args_rtx \ 606: || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \ 607: && (XEXP (X, 0) == stack_pointer_rtx \ 608: || XEXP (X, 0) == virtual_stack_dynamic_rtx \ 609: || XEXP (X, 0) == virtual_outgoing_args_rtx))) 610: 1.1.1.5 root 611: static void new_basic_block PROTO((void)); 612: static void make_new_qty PROTO((int)); 613: static void make_regs_eqv PROTO((int, int)); 614: static void delete_reg_equiv PROTO((int)); 615: static int mention_regs PROTO((rtx)); 616: static int insert_regs PROTO((rtx, struct table_elt *, int)); 617: static void free_element PROTO((struct table_elt *)); 1.1.1.7 root 618: static void remove_from_table PROTO((struct table_elt *, unsigned)); 1.1.1.5 root 619: static struct table_elt *get_element PROTO((void)); 1.1.1.7 root 620: static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)), 621: *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode)); 1.1.1.5 root 622: static rtx lookup_as_function PROTO((rtx, enum rtx_code)); 1.1.1.7 root 623: static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned, 1.1.1.5 root 624: enum machine_mode)); 625: static void merge_equiv_classes PROTO((struct table_elt *, 626: struct table_elt *)); 1.1.1.7 root 627: static void invalidate PROTO((rtx, enum machine_mode)); 1.1.1.5 root 628: static void remove_invalid_refs PROTO((int)); 629: static void rehash_using_reg PROTO((rtx)); 630: static void invalidate_memory PROTO((struct write_data *)); 631: static void invalidate_for_call PROTO((void)); 632: static rtx use_related_value PROTO((rtx, struct table_elt *)); 1.1.1.7 root 633: static unsigned canon_hash PROTO((rtx, enum machine_mode)); 634: static unsigned safe_hash PROTO((rtx, enum machine_mode)); 1.1.1.5 root 635: static int exp_equiv_p PROTO((rtx, rtx, int, int)); 636: static void set_nonvarying_address_components PROTO((rtx, int, rtx *, 637: HOST_WIDE_INT *, 638: HOST_WIDE_INT *)); 639: static int refers_to_p PROTO((rtx, rtx)); 640: static int refers_to_mem_p PROTO((rtx, rtx, HOST_WIDE_INT, 641: HOST_WIDE_INT)); 642: static int cse_rtx_addr_varies_p PROTO((rtx)); 643: static rtx canon_reg PROTO((rtx, rtx)); 644: static void find_best_addr PROTO((rtx, rtx *)); 645: static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *, 646: enum machine_mode *, 647: enum machine_mode *)); 648: static rtx cse_gen_binary PROTO((enum rtx_code, enum machine_mode, 649: rtx, rtx)); 650: static rtx simplify_plus_minus PROTO((enum rtx_code, enum machine_mode, 651: rtx, rtx)); 652: static rtx fold_rtx PROTO((rtx, rtx)); 653: static rtx equiv_constant PROTO((rtx)); 654: static void record_jump_equiv PROTO((rtx, int)); 655: static void record_jump_cond PROTO((enum rtx_code, enum machine_mode, 656: rtx, rtx, int)); 657: static void cse_insn PROTO((rtx, int)); 658: static void note_mem_written PROTO((rtx, struct write_data *)); 659: static void invalidate_from_clobbers PROTO((struct write_data *, rtx)); 660: static rtx cse_process_notes PROTO((rtx, rtx)); 661: static void cse_around_loop PROTO((rtx)); 662: static void invalidate_skipped_set PROTO((rtx, rtx)); 663: static void invalidate_skipped_block PROTO((rtx)); 664: static void cse_check_loop_start PROTO((rtx, rtx)); 665: static void cse_set_around_loop PROTO((rtx, rtx, rtx)); 666: static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int)); 1.1.1.7 root 667: static void count_reg_usage PROTO((rtx, int *, rtx, int)); 668: 669: extern int rtx_equal_function_value_matters; 1.1 root 670: 671: /* Return an estimate of the cost of computing rtx X. 672: One use is in cse, to decide which expression to keep in the hash table. 673: Another is in rtl generation, to pick the cheapest way to multiply. 674: Other uses like the latter are expected in the future. */ 675: 676: /* Return the right cost to give to an operation 677: to make the cost of the corresponding register-to-register instruction 678: N times that of a fast register-to-register instruction. */ 679: 680: #define COSTS_N_INSNS(N) ((N) * 4 - 2) 681: 682: int 1.1.1.3 root 683: rtx_cost (x, outer_code) 1.1 root 684: rtx x; 1.1.1.3 root 685: enum rtx_code outer_code; 1.1 root 686: { 687: register int i, j; 688: register enum rtx_code code; 689: register char *fmt; 690: register int total; 691: 692: if (x == 0) 693: return 0; 694: 695: /* Compute the default costs of certain things. 696: Note that RTX_COSTS can override the defaults. */ 697: 698: code = GET_CODE (x); 699: switch (code) 700: { 701: case MULT: 702: /* Count multiplication by 2**n as a shift, 703: because if we are considering it, we would output it as a shift. */ 704: if (GET_CODE (XEXP (x, 1)) == CONST_INT 705: && exact_log2 (INTVAL (XEXP (x, 1))) >= 0) 706: total = 2; 707: else 708: total = COSTS_N_INSNS (5); 709: break; 710: case DIV: 711: case UDIV: 712: case MOD: 713: case UMOD: 714: total = COSTS_N_INSNS (7); 715: break; 716: case USE: 717: /* Used in loop.c and combine.c as a marker. */ 718: total = 0; 719: break; 1.1.1.2 root 720: case ASM_OPERANDS: 721: /* We don't want these to be used in substitutions because 722: we have no way of validating the resulting insn. So assign 723: anything containing an ASM_OPERANDS a very high cost. */ 724: total = 1000; 725: break; 1.1 root 726: default: 727: total = 2; 728: } 729: 730: switch (code) 731: { 732: case REG: 1.1.1.7 root 733: return ! CHEAP_REG (x); 1.1.1.5 root 734: 1.1 root 735: case SUBREG: 1.1.1.3 root 736: /* If we can't tie these modes, make this expensive. The larger 737: the mode, the more expensive it is. */ 738: if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x)))) 739: return COSTS_N_INSNS (2 740: + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD); 1.1 root 741: return 2; 742: #ifdef RTX_COSTS 1.1.1.3 root 743: RTX_COSTS (x, code, outer_code); 1.1 root 744: #endif 1.1.1.3 root 745: CONST_COSTS (x, code, outer_code); 1.1 root 746: } 747: 748: /* Sum the costs of the sub-rtx's, plus cost of this operation, 749: which is already in total. */ 750: 751: fmt = GET_RTX_FORMAT (code); 752: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 753: if (fmt[i] == 'e') 1.1.1.3 root 754: total += rtx_cost (XEXP (x, i), code); 1.1 root 755: else if (fmt[i] == 'E') 756: for (j = 0; j < XVECLEN (x, i); j++) 1.1.1.3 root 757: total += rtx_cost (XVECEXP (x, i, j), code); 1.1 root 758: 759: return total; 760: } 761: 762: /* Clear the hash table and initialize each register with its own quantity, 763: for a new basic block. */ 764: 765: static void 766: new_basic_block () 767: { 768: register int i; 769: 770: next_qty = max_reg; 771: 1.1.1.7 root 772: bzero ((char *) reg_tick, max_reg * sizeof (int)); 1.1 root 773: 1.1.1.7 root 774: bcopy ((char *) all_minus_one, (char *) reg_in_table, 775: max_reg * sizeof (int)); 776: bcopy ((char *) consec_ints, (char *) reg_qty, max_reg * sizeof (int)); 1.1 root 777: CLEAR_HARD_REG_SET (hard_regs_in_table); 778: 779: /* The per-quantity values used to be initialized here, but it is 780: much faster to initialize each as it is made in `make_new_qty'. */ 781: 782: for (i = 0; i < NBUCKETS; i++) 783: { 784: register struct table_elt *this, *next; 785: for (this = table[i]; this; this = next) 786: { 787: next = this->next_same_hash; 788: free_element (this); 789: } 790: } 791: 1.1.1.7 root 792: bzero ((char *) table, sizeof table); 1.1 root 793: 794: prev_insn = 0; 795: 796: #ifdef HAVE_cc0 797: prev_insn_cc0 = 0; 798: #endif 799: } 800: 801: /* Say that register REG contains a quantity not in any register before 802: and initialize that quantity. */ 803: 804: static void 805: make_new_qty (reg) 806: register int reg; 807: { 808: register int q; 809: 810: if (next_qty >= max_qty) 811: abort (); 812: 813: q = reg_qty[reg] = next_qty++; 814: qty_first_reg[q] = reg; 815: qty_last_reg[q] = reg; 816: qty_const[q] = qty_const_insn[q] = 0; 817: qty_comparison_code[q] = UNKNOWN; 818: 819: reg_next_eqv[reg] = reg_prev_eqv[reg] = -1; 820: } 821: 822: /* Make reg NEW equivalent to reg OLD. 823: OLD is not changing; NEW is. */ 824: 825: static void 826: make_regs_eqv (new, old) 827: register int new, old; 828: { 829: register int lastr, firstr; 830: register int q = reg_qty[old]; 831: 832: /* Nothing should become eqv until it has a "non-invalid" qty number. */ 833: if (! REGNO_QTY_VALID_P (old)) 834: abort (); 835: 836: reg_qty[new] = q; 837: firstr = qty_first_reg[q]; 838: lastr = qty_last_reg[q]; 839: 840: /* Prefer fixed hard registers to anything. Prefer pseudo regs to other 841: hard regs. Among pseudos, if NEW will live longer than any other reg 842: of the same qty, and that is beyond the current basic block, 843: make it the new canonical replacement for this qty. */ 844: if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr)) 845: /* Certain fixed registers might be of the class NO_REGS. This means 846: that not only can they not be allocated by the compiler, but 1.1.1.3 root 847: they cannot be used in substitutions or canonicalizations 1.1 root 848: either. */ 849: && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS) 850: && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new)) 851: || (new >= FIRST_PSEUDO_REGISTER 852: && (firstr < FIRST_PSEUDO_REGISTER 853: || ((uid_cuid[regno_last_uid[new]] > cse_basic_block_end 854: || (uid_cuid[regno_first_uid[new]] 855: < cse_basic_block_start)) 856: && (uid_cuid[regno_last_uid[new]] 857: > uid_cuid[regno_last_uid[firstr]])))))) 858: { 859: reg_prev_eqv[firstr] = new; 860: reg_next_eqv[new] = firstr; 861: reg_prev_eqv[new] = -1; 862: qty_first_reg[q] = new; 863: } 864: else 865: { 866: /* If NEW is a hard reg (known to be non-fixed), insert at end. 867: Otherwise, insert before any non-fixed hard regs that are at the 868: end. Registers of class NO_REGS cannot be used as an 869: equivalent for anything. */ 870: while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0 871: && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr)) 872: && new >= FIRST_PSEUDO_REGISTER) 873: lastr = reg_prev_eqv[lastr]; 874: reg_next_eqv[new] = reg_next_eqv[lastr]; 875: if (reg_next_eqv[lastr] >= 0) 876: reg_prev_eqv[reg_next_eqv[lastr]] = new; 877: else 878: qty_last_reg[q] = new; 879: reg_next_eqv[lastr] = new; 880: reg_prev_eqv[new] = lastr; 881: } 882: } 883: 884: /* Remove REG from its equivalence class. */ 885: 886: static void 887: delete_reg_equiv (reg) 888: register int reg; 889: { 890: register int q = reg_qty[reg]; 1.1.1.7 root 891: register int p, n; 1.1 root 892: 1.1.1.7 root 893: /* If invalid, do nothing. */ 1.1 root 894: if (q == reg) 895: return; 896: 1.1.1.7 root 897: p = reg_prev_eqv[reg]; 898: n = reg_next_eqv[reg]; 899: 1.1 root 900: if (n != -1) 901: reg_prev_eqv[n] = p; 902: else 903: qty_last_reg[q] = p; 904: if (p != -1) 905: reg_next_eqv[p] = n; 906: else 907: qty_first_reg[q] = n; 908: 909: reg_qty[reg] = reg; 910: } 911: 912: /* Remove any invalid expressions from the hash table 913: that refer to any of the registers contained in expression X. 914: 915: Make sure that newly inserted references to those registers 916: as subexpressions will be considered valid. 917: 918: mention_regs is not called when a register itself 919: is being stored in the table. 920: 921: Return 1 if we have done something that may have changed the hash code 922: of X. */ 923: 924: static int 925: mention_regs (x) 926: rtx x; 927: { 928: register enum rtx_code code; 929: register int i, j; 930: register char *fmt; 931: register int changed = 0; 932: 933: if (x == 0) 1.1.1.3 root 934: return 0; 1.1 root 935: 936: code = GET_CODE (x); 937: if (code == REG) 938: { 939: register int regno = REGNO (x); 940: register int endregno 941: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 942: : HARD_REGNO_NREGS (regno, GET_MODE (x))); 943: int i; 944: 945: for (i = regno; i < endregno; i++) 946: { 947: if (reg_in_table[i] >= 0 && reg_in_table[i] != reg_tick[i]) 948: remove_invalid_refs (i); 949: 950: reg_in_table[i] = reg_tick[i]; 951: } 952: 953: return 0; 954: } 955: 956: /* If X is a comparison or a COMPARE and either operand is a register 957: that does not have a quantity, give it one. This is so that a later 958: call to record_jump_equiv won't cause X to be assigned a different 959: hash code and not found in the table after that call. 960: 961: It is not necessary to do this here, since rehash_using_reg can 962: fix up the table later, but doing this here eliminates the need to 963: call that expensive function in the most common case where the only 964: use of the register is in the comparison. */ 965: 966: if (code == COMPARE || GET_RTX_CLASS (code) == '<') 967: { 968: if (GET_CODE (XEXP (x, 0)) == REG 969: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))) 1.1.1.4 root 970: if (insert_regs (XEXP (x, 0), NULL_PTR, 0)) 1.1 root 971: { 972: rehash_using_reg (XEXP (x, 0)); 973: changed = 1; 974: } 975: 976: if (GET_CODE (XEXP (x, 1)) == REG 977: && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))) 1.1.1.4 root 978: if (insert_regs (XEXP (x, 1), NULL_PTR, 0)) 1.1 root 979: { 980: rehash_using_reg (XEXP (x, 1)); 981: changed = 1; 982: } 983: } 984: 985: fmt = GET_RTX_FORMAT (code); 986: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 987: if (fmt[i] == 'e') 988: changed |= mention_regs (XEXP (x, i)); 989: else if (fmt[i] == 'E') 990: for (j = 0; j < XVECLEN (x, i); j++) 991: changed |= mention_regs (XVECEXP (x, i, j)); 992: 993: return changed; 994: } 995: 996: /* Update the register quantities for inserting X into the hash table 997: with a value equivalent to CLASSP. 998: (If the class does not contain a REG, it is irrelevant.) 999: If MODIFIED is nonzero, X is a destination; it is being modified. 1000: Note that delete_reg_equiv should be called on a register 1001: before insert_regs is done on that register with MODIFIED != 0. 1002: 1003: Nonzero value means that elements of reg_qty have changed 1004: so X's hash code may be different. */ 1005: 1006: static int 1007: insert_regs (x, classp, modified) 1008: rtx x; 1009: struct table_elt *classp; 1010: int modified; 1011: { 1012: if (GET_CODE (x) == REG) 1013: { 1014: register int regno = REGNO (x); 1015: 1.1.1.5 root 1016: /* If REGNO is in the equivalence table already but is of the 1017: wrong mode for that equivalence, don't do anything here. */ 1018: 1019: if (REGNO_QTY_VALID_P (regno) 1020: && qty_mode[reg_qty[regno]] != GET_MODE (x)) 1021: return 0; 1022: 1023: if (modified || ! REGNO_QTY_VALID_P (regno)) 1.1 root 1024: { 1025: if (classp) 1026: for (classp = classp->first_same_value; 1027: classp != 0; 1028: classp = classp->next_same_value) 1029: if (GET_CODE (classp->exp) == REG 1030: && GET_MODE (classp->exp) == GET_MODE (x)) 1031: { 1032: make_regs_eqv (regno, REGNO (classp->exp)); 1033: return 1; 1034: } 1035: 1036: make_new_qty (regno); 1037: qty_mode[reg_qty[regno]] = GET_MODE (x); 1038: return 1; 1039: } 1.1.1.6 root 1040: 1041: return 0; 1.1 root 1042: } 1.1.1.4 root 1043: 1044: /* If X is a SUBREG, we will likely be inserting the inner register in the 1045: table. If that register doesn't have an assigned quantity number at 1046: this point but does later, the insertion that we will be doing now will 1047: not be accessible because its hash code will have changed. So assign 1048: a quantity number now. */ 1049: 1050: else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG 1051: && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x)))) 1052: { 1053: insert_regs (SUBREG_REG (x), NULL_PTR, 0); 1054: mention_regs (SUBREG_REG (x)); 1055: return 1; 1056: } 1.1 root 1057: else 1058: return mention_regs (x); 1059: } 1060: 1061: /* Look in or update the hash table. */ 1062: 1063: /* Put the element ELT on the list of free elements. */ 1064: 1065: static void 1066: free_element (elt) 1067: struct table_elt *elt; 1068: { 1069: elt->next_same_hash = free_element_chain; 1070: free_element_chain = elt; 1071: } 1072: 1073: /* Return an element that is free for use. */ 1074: 1075: static struct table_elt * 1076: get_element () 1077: { 1078: struct table_elt *elt = free_element_chain; 1079: if (elt) 1080: { 1081: free_element_chain = elt->next_same_hash; 1082: return elt; 1083: } 1084: n_elements_made++; 1085: return (struct table_elt *) oballoc (sizeof (struct table_elt)); 1086: } 1087: 1088: /* Remove table element ELT from use in the table. 1089: HASH is its hash code, made using the HASH macro. 1090: It's an argument because often that is known in advance 1091: and we save much time not recomputing it. */ 1092: 1093: static void 1094: remove_from_table (elt, hash) 1095: register struct table_elt *elt; 1.1.1.7 root 1096: unsigned hash; 1.1 root 1097: { 1098: if (elt == 0) 1099: return; 1100: 1101: /* Mark this element as removed. See cse_insn. */ 1102: elt->first_same_value = 0; 1103: 1104: /* Remove the table element from its equivalence class. */ 1105: 1106: { 1107: register struct table_elt *prev = elt->prev_same_value; 1108: register struct table_elt *next = elt->next_same_value; 1109: 1110: if (next) next->prev_same_value = prev; 1111: 1112: if (prev) 1113: prev->next_same_value = next; 1114: else 1115: { 1116: register struct table_elt *newfirst = next; 1117: while (next) 1118: { 1119: next->first_same_value = newfirst; 1120: next = next->next_same_value; 1121: } 1122: } 1123: } 1124: 1125: /* Remove the table element from its hash bucket. */ 1126: 1127: { 1128: register struct table_elt *prev = elt->prev_same_hash; 1129: register struct table_elt *next = elt->next_same_hash; 1130: 1131: if (next) next->prev_same_hash = prev; 1132: 1133: if (prev) 1134: prev->next_same_hash = next; 1135: else if (table[hash] == elt) 1136: table[hash] = next; 1137: else 1138: { 1139: /* This entry is not in the proper hash bucket. This can happen 1140: when two classes were merged by `merge_equiv_classes'. Search 1141: for the hash bucket that it heads. This happens only very 1142: rarely, so the cost is acceptable. */ 1143: for (hash = 0; hash < NBUCKETS; hash++) 1144: if (table[hash] == elt) 1145: table[hash] = next; 1146: } 1147: } 1148: 1149: /* Remove the table element from its related-value circular chain. */ 1150: 1151: if (elt->related_value != 0 && elt->related_value != elt) 1152: { 1153: register struct table_elt *p = elt->related_value; 1154: while (p->related_value != elt) 1155: p = p->related_value; 1156: p->related_value = elt->related_value; 1157: if (p->related_value == p) 1158: p->related_value = 0; 1159: } 1160: 1161: free_element (elt); 1162: } 1163: 1164: /* Look up X in the hash table and return its table element, 1165: or 0 if X is not in the table. 1166: 1167: MODE is the machine-mode of X, or if X is an integer constant 1168: with VOIDmode then MODE is the mode with which X will be used. 1169: 1170: Here we are satisfied to find an expression whose tree structure 1171: looks like X. */ 1172: 1173: static struct table_elt * 1174: lookup (x, hash, mode) 1175: rtx x; 1.1.1.7 root 1176: unsigned hash; 1.1 root 1177: enum machine_mode mode; 1178: { 1179: register struct table_elt *p; 1180: 1181: for (p = table[hash]; p; p = p->next_same_hash) 1182: if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG) 1183: || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0))) 1184: return p; 1185: 1186: return 0; 1187: } 1188: 1189: /* Like `lookup' but don't care whether the table element uses invalid regs. 1190: Also ignore discrepancies in the machine mode of a register. */ 1191: 1192: static struct table_elt * 1193: lookup_for_remove (x, hash, mode) 1194: rtx x; 1.1.1.7 root 1195: unsigned hash; 1.1 root 1196: enum machine_mode mode; 1197: { 1198: register struct table_elt *p; 1199: 1200: if (GET_CODE (x) == REG) 1201: { 1202: int regno = REGNO (x); 1203: /* Don't check the machine mode when comparing registers; 1204: invalidating (REG:SI 0) also invalidates (REG:DF 0). */ 1205: for (p = table[hash]; p; p = p->next_same_hash) 1206: if (GET_CODE (p->exp) == REG 1207: && REGNO (p->exp) == regno) 1208: return p; 1209: } 1210: else 1211: { 1212: for (p = table[hash]; p; p = p->next_same_hash) 1213: if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0))) 1214: return p; 1215: } 1216: 1217: return 0; 1218: } 1219: 1220: /* Look for an expression equivalent to X and with code CODE. 1221: If one is found, return that expression. */ 1222: 1223: static rtx 1224: lookup_as_function (x, code) 1225: rtx x; 1226: enum rtx_code code; 1227: { 1228: register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, 1229: GET_MODE (x)); 1230: if (p == 0) 1231: return 0; 1232: 1233: for (p = p->first_same_value; p; p = p->next_same_value) 1234: { 1235: if (GET_CODE (p->exp) == code 1236: /* Make sure this is a valid entry in the table. */ 1237: && exp_equiv_p (p->exp, p->exp, 1, 0)) 1238: return p->exp; 1239: } 1240: 1241: return 0; 1242: } 1243: 1244: /* Insert X in the hash table, assuming HASH is its hash code 1245: and CLASSP is an element of the class it should go in 1246: (or 0 if a new class should be made). 1247: It is inserted at the proper position to keep the class in 1248: the order cheapest first. 1249: 1250: MODE is the machine-mode of X, or if X is an integer constant 1251: with VOIDmode then MODE is the mode with which X will be used. 1252: 1253: For elements of equal cheapness, the most recent one 1254: goes in front, except that the first element in the list 1255: remains first unless a cheaper element is added. The order of 1256: pseudo-registers does not matter, as canon_reg will be called to 1.1.1.3 root 1257: find the cheapest when a register is retrieved from the table. 1.1 root 1258: 1259: The in_memory field in the hash table element is set to 0. 1260: The caller must set it nonzero if appropriate. 1261: 1262: You should call insert_regs (X, CLASSP, MODIFY) before calling here, 1263: and if insert_regs returns a nonzero value 1264: you must then recompute its hash code before calling here. 1265: 1266: If necessary, update table showing constant values of quantities. */ 1267: 1268: #define CHEAPER(X,Y) ((X)->cost < (Y)->cost) 1269: 1270: static struct table_elt * 1271: insert (x, classp, hash, mode) 1272: register rtx x; 1273: register struct table_elt *classp; 1.1.1.7 root 1274: unsigned hash; 1.1 root 1275: enum machine_mode mode; 1276: { 1277: register struct table_elt *elt; 1278: 1279: /* If X is a register and we haven't made a quantity for it, 1280: something is wrong. */ 1281: if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x))) 1282: abort (); 1283: 1284: /* If X is a hard register, show it is being put in the table. */ 1285: if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER) 1286: { 1287: int regno = REGNO (x); 1288: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); 1289: int i; 1290: 1291: for (i = regno; i < endregno; i++) 1292: SET_HARD_REG_BIT (hard_regs_in_table, i); 1293: } 1294: 1.1.1.8 ! root 1295: /* If X is a label, show we recorded it. */ ! 1296: if (GET_CODE (x) == LABEL_REF ! 1297: || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS ! 1298: && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF)) ! 1299: recorded_label_ref = 1; 1.1 root 1300: 1301: /* Put an element for X into the right hash bucket. */ 1302: 1303: elt = get_element (); 1304: elt->exp = x; 1305: elt->cost = COST (x); 1306: elt->next_same_value = 0; 1307: elt->prev_same_value = 0; 1308: elt->next_same_hash = table[hash]; 1309: elt->prev_same_hash = 0; 1310: elt->related_value = 0; 1311: elt->in_memory = 0; 1312: elt->mode = mode; 1313: elt->is_const = (CONSTANT_P (x) 1314: /* GNU C++ takes advantage of this for `this' 1315: (and other const values). */ 1316: || (RTX_UNCHANGING_P (x) 1317: && GET_CODE (x) == REG 1318: && REGNO (x) >= FIRST_PSEUDO_REGISTER) 1319: || FIXED_BASE_PLUS_P (x)); 1320: 1321: if (table[hash]) 1322: table[hash]->prev_same_hash = elt; 1323: table[hash] = elt; 1324: 1325: /* Put it into the proper value-class. */ 1326: if (classp) 1327: { 1328: classp = classp->first_same_value; 1329: if (CHEAPER (elt, classp)) 1330: /* Insert at the head of the class */ 1331: { 1332: register struct table_elt *p; 1333: elt->next_same_value = classp; 1334: classp->prev_same_value = elt; 1335: elt->first_same_value = elt; 1336: 1337: for (p = classp; p; p = p->next_same_value) 1338: p->first_same_value = elt; 1339: } 1340: else 1341: { 1342: /* Insert not at head of the class. */ 1343: /* Put it after the last element cheaper than X. */ 1344: register struct table_elt *p, *next; 1345: for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt); 1346: p = next); 1347: /* Put it after P and before NEXT. */ 1348: elt->next_same_value = next; 1349: if (next) 1350: next->prev_same_value = elt; 1351: elt->prev_same_value = p; 1352: p->next_same_value = elt; 1353: elt->first_same_value = classp; 1354: } 1355: } 1356: else 1357: elt->first_same_value = elt; 1358: 1359: /* If this is a constant being set equivalent to a register or a register 1360: being set equivalent to a constant, note the constant equivalence. 1361: 1362: If this is a constant, it cannot be equivalent to a different constant, 1363: and a constant is the only thing that can be cheaper than a register. So 1364: we know the register is the head of the class (before the constant was 1365: inserted). 1366: 1367: If this is a register that is not already known equivalent to a 1368: constant, we must check the entire class. 1369: 1370: If this is a register that is already known equivalent to an insn, 1371: update `qty_const_insn' to show that `this_insn' is the latest 1372: insn making that quantity equivalent to the constant. */ 1373: 1.1.1.8 ! root 1374: if (elt->is_const && classp && GET_CODE (classp->exp) == REG ! 1375: && GET_CODE (x) != REG) 1.1 root 1376: { 1377: qty_const[reg_qty[REGNO (classp->exp)]] 1378: = gen_lowpart_if_possible (qty_mode[reg_qty[REGNO (classp->exp)]], x); 1379: qty_const_insn[reg_qty[REGNO (classp->exp)]] = this_insn; 1380: } 1381: 1.1.1.8 ! root 1382: else if (GET_CODE (x) == REG && classp && ! qty_const[reg_qty[REGNO (x)]] ! 1383: && ! elt->is_const) 1.1 root 1384: { 1385: register struct table_elt *p; 1386: 1387: for (p = classp; p != 0; p = p->next_same_value) 1388: { 1.1.1.8 ! root 1389: if (p->is_const && GET_CODE (p->exp) != REG) 1.1 root 1390: { 1391: qty_const[reg_qty[REGNO (x)]] 1392: = gen_lowpart_if_possible (GET_MODE (x), p->exp); 1393: qty_const_insn[reg_qty[REGNO (x)]] = this_insn; 1394: break; 1395: } 1396: } 1397: } 1398: 1399: else if (GET_CODE (x) == REG && qty_const[reg_qty[REGNO (x)]] 1400: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]]) 1401: qty_const_insn[reg_qty[REGNO (x)]] = this_insn; 1402: 1403: /* If this is a constant with symbolic value, 1404: and it has a term with an explicit integer value, 1405: link it up with related expressions. */ 1406: if (GET_CODE (x) == CONST) 1407: { 1408: rtx subexp = get_related_value (x); 1.1.1.7 root 1409: unsigned subhash; 1.1 root 1410: struct table_elt *subelt, *subelt_prev; 1411: 1412: if (subexp != 0) 1413: { 1414: /* Get the integer-free subexpression in the hash table. */ 1415: subhash = safe_hash (subexp, mode) % NBUCKETS; 1416: subelt = lookup (subexp, subhash, mode); 1417: if (subelt == 0) 1.1.1.4 root 1418: subelt = insert (subexp, NULL_PTR, subhash, mode); 1.1 root 1419: /* Initialize SUBELT's circular chain if it has none. */ 1420: if (subelt->related_value == 0) 1421: subelt->related_value = subelt; 1422: /* Find the element in the circular chain that precedes SUBELT. */ 1423: subelt_prev = subelt; 1424: while (subelt_prev->related_value != subelt) 1425: subelt_prev = subelt_prev->related_value; 1426: /* Put new ELT into SUBELT's circular chain just before SUBELT. 1427: This way the element that follows SUBELT is the oldest one. */ 1428: elt->related_value = subelt_prev->related_value; 1429: subelt_prev->related_value = elt; 1430: } 1431: } 1432: 1433: return elt; 1434: } 1435: 1436: /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from 1437: CLASS2 into CLASS1. This is done when we have reached an insn which makes 1438: the two classes equivalent. 1439: 1440: CLASS1 will be the surviving class; CLASS2 should not be used after this 1441: call. 1442: 1443: Any invalid entries in CLASS2 will not be copied. */ 1444: 1445: static void 1446: merge_equiv_classes (class1, class2) 1447: struct table_elt *class1, *class2; 1448: { 1449: struct table_elt *elt, *next, *new; 1450: 1451: /* Ensure we start with the head of the classes. */ 1452: class1 = class1->first_same_value; 1453: class2 = class2->first_same_value; 1454: 1455: /* If they were already equal, forget it. */ 1456: if (class1 == class2) 1457: return; 1458: 1459: for (elt = class2; elt; elt = next) 1460: { 1.1.1.7 root 1461: unsigned hash; 1.1 root 1462: rtx exp = elt->exp; 1463: enum machine_mode mode = elt->mode; 1464: 1465: next = elt->next_same_value; 1466: 1467: /* Remove old entry, make a new one in CLASS1's class. 1468: Don't do this for invalid entries as we cannot find their 1469: hash code (it also isn't necessary). */ 1470: if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0)) 1471: { 1472: hash_arg_in_memory = 0; 1473: hash_arg_in_struct = 0; 1474: hash = HASH (exp, mode); 1475: 1476: if (GET_CODE (exp) == REG) 1477: delete_reg_equiv (REGNO (exp)); 1478: 1479: remove_from_table (elt, hash); 1480: 1481: if (insert_regs (exp, class1, 0)) 1.1.1.7 root 1482: { 1483: rehash_using_reg (exp); 1484: hash = HASH (exp, mode); 1485: } 1.1 root 1486: new = insert (exp, class1, hash, mode); 1487: new->in_memory = hash_arg_in_memory; 1488: new->in_struct = hash_arg_in_struct; 1489: } 1490: } 1491: } 1492: 1493: /* Remove from the hash table, or mark as invalid, 1494: all expressions whose values could be altered by storing in X. 1495: X is a register, a subreg, or a memory reference with nonvarying address 1496: (because, when a memory reference with a varying address is stored in, 1497: all memory references are removed by invalidate_memory 1498: so specific invalidation is superfluous). 1.1.1.7 root 1499: FULL_MODE, if not VOIDmode, indicates that this much should be invalidated 1500: instead of just the amount indicated by the mode of X. This is only used 1501: for bitfield stores into memory. 1.1 root 1502: 1503: A nonvarying address may be just a register or just 1504: a symbol reference, or it may be either of those plus 1505: a numeric offset. */ 1506: 1507: static void 1.1.1.7 root 1508: invalidate (x, full_mode) 1.1 root 1509: rtx x; 1.1.1.7 root 1510: enum machine_mode full_mode; 1.1 root 1511: { 1512: register int i; 1513: register struct table_elt *p; 1.1.1.5 root 1514: rtx base; 1515: HOST_WIDE_INT start, end; 1.1 root 1516: 1517: /* If X is a register, dependencies on its contents 1518: are recorded through the qty number mechanism. 1519: Just change the qty number of the register, 1520: mark it as invalid for expressions that refer to it, 1521: and remove it itself. */ 1522: 1523: if (GET_CODE (x) == REG) 1524: { 1525: register int regno = REGNO (x); 1.1.1.7 root 1526: register unsigned hash = HASH (x, GET_MODE (x)); 1.1 root 1527: 1528: /* Remove REGNO from any quantity list it might be on and indicate 1529: that it's value might have changed. If it is a pseudo, remove its 1530: entry from the hash table. 1531: 1532: For a hard register, we do the first two actions above for any 1533: additional hard registers corresponding to X. Then, if any of these 1534: registers are in the table, we must remove any REG entries that 1535: overlap these registers. */ 1536: 1537: delete_reg_equiv (regno); 1538: reg_tick[regno]++; 1539: 1540: if (regno >= FIRST_PSEUDO_REGISTER) 1.1.1.8 ! root 1541: { ! 1542: /* Because a register can be referenced in more than one mode, ! 1543: we might have to remove more than one table entry. */ ! 1544: ! 1545: struct table_elt *elt; ! 1546: ! 1547: while (elt = lookup_for_remove (x, hash, GET_MODE (x))) ! 1548: remove_from_table (elt, hash); ! 1549: } 1.1 root 1550: else 1551: { 1.1.1.5 root 1552: HOST_WIDE_INT in_table 1553: = TEST_HARD_REG_BIT (hard_regs_in_table, regno); 1.1 root 1554: int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x)); 1555: int tregno, tendregno; 1556: register struct table_elt *p, *next; 1557: 1558: CLEAR_HARD_REG_BIT (hard_regs_in_table, regno); 1559: 1560: for (i = regno + 1; i < endregno; i++) 1561: { 1562: in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i); 1563: CLEAR_HARD_REG_BIT (hard_regs_in_table, i); 1564: delete_reg_equiv (i); 1565: reg_tick[i]++; 1566: } 1567: 1568: if (in_table) 1569: for (hash = 0; hash < NBUCKETS; hash++) 1570: for (p = table[hash]; p; p = next) 1571: { 1572: next = p->next_same_hash; 1573: 1574: if (GET_CODE (p->exp) != REG 1575: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) 1576: continue; 1577: 1578: tregno = REGNO (p->exp); 1579: tendregno 1580: = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp)); 1581: if (tendregno > regno && tregno < endregno) 1582: remove_from_table (p, hash); 1583: } 1584: } 1585: 1586: return; 1587: } 1588: 1589: if (GET_CODE (x) == SUBREG) 1590: { 1591: if (GET_CODE (SUBREG_REG (x)) != REG) 1592: abort (); 1.1.1.7 root 1593: invalidate (SUBREG_REG (x), VOIDmode); 1.1 root 1594: return; 1595: } 1596: 1597: /* X is not a register; it must be a memory reference with 1598: a nonvarying address. Remove all hash table elements 1599: that refer to overlapping pieces of memory. */ 1600: 1601: if (GET_CODE (x) != MEM) 1602: abort (); 1603: 1.1.1.7 root 1604: if (full_mode == VOIDmode) 1605: full_mode = GET_MODE (x); 1606: 1607: set_nonvarying_address_components (XEXP (x, 0), GET_MODE_SIZE (full_mode), 1.1.1.5 root 1608: &base, &start, &end); 1.1 root 1609: 1610: for (i = 0; i < NBUCKETS; i++) 1611: { 1612: register struct table_elt *next; 1613: for (p = table[i]; p; p = next) 1614: { 1615: next = p->next_same_hash; 1616: if (refers_to_mem_p (p->exp, base, start, end)) 1617: remove_from_table (p, i); 1618: } 1619: } 1620: } 1621: 1622: /* Remove all expressions that refer to register REGNO, 1623: since they are already invalid, and we are about to 1624: mark that register valid again and don't want the old 1625: expressions to reappear as valid. */ 1626: 1627: static void 1628: remove_invalid_refs (regno) 1629: int regno; 1630: { 1631: register int i; 1632: register struct table_elt *p, *next; 1633: 1634: for (i = 0; i < NBUCKETS; i++) 1635: for (p = table[i]; p; p = next) 1636: { 1637: next = p->next_same_hash; 1638: if (GET_CODE (p->exp) != REG 1.1.1.4 root 1639: && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR)) 1.1 root 1640: remove_from_table (p, i); 1641: } 1642: } 1643: 1644: /* Recompute the hash codes of any valid entries in the hash table that 1645: reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. 1646: 1647: This is called when we make a jump equivalence. */ 1648: 1649: static void 1650: rehash_using_reg (x) 1651: rtx x; 1652: { 1653: int i; 1654: struct table_elt *p, *next; 1.1.1.7 root 1655: unsigned hash; 1.1 root 1656: 1657: if (GET_CODE (x) == SUBREG) 1658: x = SUBREG_REG (x); 1659: 1660: /* If X is not a register or if the register is known not to be in any 1661: valid entries in the table, we have no work to do. */ 1662: 1663: if (GET_CODE (x) != REG 1664: || reg_in_table[REGNO (x)] < 0 1665: || reg_in_table[REGNO (x)] != reg_tick[REGNO (x)]) 1666: return; 1667: 1668: /* Scan all hash chains looking for valid entries that mention X. 1669: If we find one and it is in the wrong hash chain, move it. We can skip 1670: objects that are registers, since they are handled specially. */ 1671: 1672: for (i = 0; i < NBUCKETS; i++) 1673: for (p = table[i]; p; p = next) 1674: { 1675: next = p->next_same_hash; 1676: if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp) 1.1.1.2 root 1677: && exp_equiv_p (p->exp, p->exp, 1, 0) 1.1 root 1678: && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS)) 1679: { 1680: if (p->next_same_hash) 1681: p->next_same_hash->prev_same_hash = p->prev_same_hash; 1682: 1683: if (p->prev_same_hash) 1684: p->prev_same_hash->next_same_hash = p->next_same_hash; 1685: else 1686: table[i] = p->next_same_hash; 1687: 1688: p->next_same_hash = table[hash]; 1689: p->prev_same_hash = 0; 1690: if (table[hash]) 1691: table[hash]->prev_same_hash = p; 1692: table[hash] = p; 1693: } 1694: } 1695: } 1696: 1697: /* Remove from the hash table all expressions that reference memory, 1698: or some of them as specified by *WRITES. */ 1699: 1700: static void 1701: invalidate_memory (writes) 1702: struct write_data *writes; 1703: { 1704: register int i; 1705: register struct table_elt *p, *next; 1706: int all = writes->all; 1707: int nonscalar = writes->nonscalar; 1708: 1709: for (i = 0; i < NBUCKETS; i++) 1710: for (p = table[i]; p; p = next) 1711: { 1712: next = p->next_same_hash; 1713: if (p->in_memory 1714: && (all 1715: || (nonscalar && p->in_struct) 1716: || cse_rtx_addr_varies_p (p->exp))) 1717: remove_from_table (p, i); 1718: } 1719: } 1720: 1721: /* Remove from the hash table any expression that is a call-clobbered 1722: register. Also update their TICK values. */ 1723: 1724: static void 1725: invalidate_for_call () 1726: { 1727: int regno, endregno; 1728: int i; 1.1.1.7 root 1729: unsigned hash; 1.1 root 1730: struct table_elt *p, *next; 1731: int in_table = 0; 1732: 1733: /* Go through all the hard registers. For each that is clobbered in 1734: a CALL_INSN, remove the register from quantity chains and update 1735: reg_tick if defined. Also see if any of these registers is currently 1736: in the table. */ 1737: 1738: for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 1739: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno)) 1740: { 1741: delete_reg_equiv (regno); 1742: if (reg_tick[regno] >= 0) 1743: reg_tick[regno]++; 1744: 1.1.1.7 root 1745: in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0); 1.1 root 1746: } 1747: 1748: /* In the case where we have no call-clobbered hard registers in the 1749: table, we are done. Otherwise, scan the table and remove any 1750: entry that overlaps a call-clobbered register. */ 1751: 1752: if (in_table) 1753: for (hash = 0; hash < NBUCKETS; hash++) 1754: for (p = table[hash]; p; p = next) 1755: { 1756: next = p->next_same_hash; 1757: 1758: if (GET_CODE (p->exp) != REG 1759: || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER) 1760: continue; 1761: 1762: regno = REGNO (p->exp); 1763: endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp)); 1764: 1765: for (i = regno; i < endregno; i++) 1766: if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i)) 1767: { 1768: remove_from_table (p, hash); 1769: break; 1770: } 1771: } 1772: } 1773: 1774: /* Given an expression X of type CONST, 1775: and ELT which is its table entry (or 0 if it 1776: is not in the hash table), 1777: return an alternate expression for X as a register plus integer. 1778: If none can be found, return 0. */ 1779: 1780: static rtx 1781: use_related_value (x, elt) 1782: rtx x; 1783: struct table_elt *elt; 1784: { 1785: register struct table_elt *relt = 0; 1786: register struct table_elt *p, *q; 1.1.1.4 root 1787: HOST_WIDE_INT offset; 1.1 root 1788: 1789: /* First, is there anything related known? 1790: If we have a table element, we can tell from that. 1791: Otherwise, must look it up. */ 1792: 1793: if (elt != 0 && elt->related_value != 0) 1794: relt = elt; 1795: else if (elt == 0 && GET_CODE (x) == CONST) 1796: { 1797: rtx subexp = get_related_value (x); 1798: if (subexp != 0) 1799: relt = lookup (subexp, 1800: safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS, 1801: GET_MODE (subexp)); 1802: } 1803: 1804: if (relt == 0) 1805: return 0; 1806: 1807: /* Search all related table entries for one that has an 1808: equivalent register. */ 1809: 1810: p = relt; 1811: while (1) 1812: { 1813: /* This loop is strange in that it is executed in two different cases. 1814: The first is when X is already in the table. Then it is searching 1815: the RELATED_VALUE list of X's class (RELT). The second case is when 1816: X is not in the table. Then RELT points to a class for the related 1817: value. 1818: 1819: Ensure that, whatever case we are in, that we ignore classes that have 1820: the same value as X. */ 1821: 1822: if (rtx_equal_p (x, p->exp)) 1823: q = 0; 1824: else 1825: for (q = p->first_same_value; q; q = q->next_same_value) 1826: if (GET_CODE (q->exp) == REG) 1827: break; 1828: 1829: if (q) 1830: break; 1831: 1832: p = p->related_value; 1833: 1834: /* We went all the way around, so there is nothing to be found. 1835: Alternatively, perhaps RELT was in the table for some other reason 1836: and it has no related values recorded. */ 1837: if (p == relt || p == 0) 1838: break; 1839: } 1840: 1841: if (q == 0) 1842: return 0; 1843: 1844: offset = (get_integer_term (x) - get_integer_term (p->exp)); 1845: /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */ 1846: return plus_constant (q->exp, offset); 1847: } 1848: 1849: /* Hash an rtx. We are careful to make sure the value is never negative. 1850: Equivalent registers hash identically. 1851: MODE is used in hashing for CONST_INTs only; 1852: otherwise the mode of X is used. 1853: 1854: Store 1 in do_not_record if any subexpression is volatile. 1855: 1856: Store 1 in hash_arg_in_memory if X contains a MEM rtx 1857: which does not have the RTX_UNCHANGING_P bit set. 1858: In this case, also store 1 in hash_arg_in_struct 1859: if there is a MEM rtx which has the MEM_IN_STRUCT_P bit set. 1860: 1861: Note that cse_insn knows that the hash code of a MEM expression 1862: is just (int) MEM plus the hash code of the address. */ 1863: 1.1.1.7 root 1864: static unsigned 1.1 root 1865: canon_hash (x, mode) 1866: rtx x; 1867: enum machine_mode mode; 1868: { 1869: register int i, j; 1.1.1.7 root 1870: register unsigned hash = 0; 1.1 root 1871: register enum rtx_code code; 1872: register char *fmt; 1873: 1874: /* repeat is used to turn tail-recursion into iteration. */ 1875: repeat: 1876: if (x == 0) 1877: return hash; 1878: 1879: code = GET_CODE (x); 1880: switch (code) 1881: { 1882: case REG: 1883: { 1884: register int regno = REGNO (x); 1885: 1886: /* On some machines, we can't record any non-fixed hard register, 1887: because extending its life will cause reload problems. We 1888: consider ap, fp, and sp to be fixed for this purpose. 1889: On all machines, we can't record any global registers. */ 1890: 1891: if (regno < FIRST_PSEUDO_REGISTER 1892: && (global_regs[regno] 1893: #ifdef SMALL_REGISTER_CLASSES 1894: || (! fixed_regs[regno] 1895: && regno != FRAME_POINTER_REGNUM 1.1.1.6 root 1896: && regno != HARD_FRAME_POINTER_REGNUM 1.1 root 1897: && regno != ARG_POINTER_REGNUM 1898: && regno != STACK_POINTER_REGNUM) 1899: #endif 1900: )) 1901: { 1902: do_not_record = 1; 1903: return 0; 1904: } 1.1.1.7 root 1905: hash += ((unsigned) REG << 7) + (unsigned) reg_qty[regno]; 1906: return hash; 1.1 root 1907: } 1908: 1909: case CONST_INT: 1.1.1.7 root 1910: { 1911: unsigned HOST_WIDE_INT tem = INTVAL (x); 1912: hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem; 1913: return hash; 1914: } 1.1 root 1915: 1916: case CONST_DOUBLE: 1917: /* This is like the general case, except that it only counts 1918: the integers representing the constant. */ 1.1.1.7 root 1919: hash += (unsigned) code + (unsigned) GET_MODE (x); 1.1.1.8 ! root 1920: if (GET_MODE (x) != VOIDmode) ! 1921: for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++) ! 1922: { ! 1923: unsigned tem = XINT (x, i); ! 1924: hash += tem; ! 1925: } ! 1926: else ! 1927: hash += ((unsigned) CONST_DOUBLE_LOW (x) ! 1928: + (unsigned) CONST_DOUBLE_HIGH (x)); 1.1 root 1929: return hash; 1930: 1931: /* Assume there is only one rtx object for any given label. */ 1932: case LABEL_REF: 1.1.1.7 root 1933: hash 1934: += ((unsigned) LABEL_REF << 7) + (unsigned HOST_WIDE_INT) XEXP (x, 0); 1935: return hash; 1.1 root 1936: 1937: case SYMBOL_REF: 1.1.1.7 root 1938: hash 1939: += ((unsigned) SYMBOL_REF << 7) + (unsigned HOST_WIDE_INT) XSTR (x, 0); 1940: return hash; 1.1 root 1941: 1942: case MEM: 1943: if (MEM_VOLATILE_P (x)) 1944: { 1945: do_not_record = 1; 1946: return 0; 1947: } 1948: if (! RTX_UNCHANGING_P (x)) 1949: { 1950: hash_arg_in_memory = 1; 1951: if (MEM_IN_STRUCT_P (x)) hash_arg_in_struct = 1; 1952: } 1953: /* Now that we have already found this special case, 1954: might as well speed it up as much as possible. */ 1.1.1.7 root 1955: hash += (unsigned) MEM; 1.1 root 1956: x = XEXP (x, 0); 1957: goto repeat; 1958: 1959: case PRE_DEC: 1960: case PRE_INC: 1961: case POST_DEC: 1962: case POST_INC: 1963: case PC: 1964: case CC0: 1965: case CALL: 1966: case UNSPEC_VOLATILE: 1967: do_not_record = 1; 1968: return 0; 1969: 1970: case ASM_OPERANDS: 1971: if (MEM_VOLATILE_P (x)) 1972: { 1973: do_not_record = 1; 1974: return 0; 1975: } 1976: } 1977: 1978: i = GET_RTX_LENGTH (code) - 1; 1.1.1.7 root 1979: hash += (unsigned) code + (unsigned) GET_MODE (x); 1.1 root 1980: fmt = GET_RTX_FORMAT (code); 1981: for (; i >= 0; i--) 1982: { 1983: if (fmt[i] == 'e') 1984: { 1985: rtx tem = XEXP (x, i); 1986: 1987: /* If we are about to do the last recursive call 1988: needed at this level, change it into iteration. 1989: This function is called enough to be worth it. */ 1990: if (i == 0) 1991: { 1992: x = tem; 1993: goto repeat; 1994: } 1995: hash += canon_hash (tem, 0); 1996: } 1997: else if (fmt[i] == 'E') 1998: for (j = 0; j < XVECLEN (x, i); j++) 1999: hash += canon_hash (XVECEXP (x, i, j), 0); 2000: else if (fmt[i] == 's') 2001: { 1.1.1.7 root 2002: register unsigned char *p = (unsigned char *) XSTR (x, i); 1.1 root 2003: if (p) 2004: while (*p) 1.1.1.7 root 2005: hash += *p++; 1.1 root 2006: } 2007: else if (fmt[i] == 'i') 2008: { 1.1.1.7 root 2009: register unsigned tem = XINT (x, i); 2010: hash += tem; 1.1 root 2011: } 2012: else 2013: abort (); 2014: } 2015: return hash; 2016: } 2017: 2018: /* Like canon_hash but with no side effects. */ 2019: 1.1.1.7 root 2020: static unsigned 1.1 root 2021: safe_hash (x, mode) 2022: rtx x; 2023: enum machine_mode mode; 2024: { 2025: int save_do_not_record = do_not_record; 2026: int save_hash_arg_in_memory = hash_arg_in_memory; 2027: int save_hash_arg_in_struct = hash_arg_in_struct; 1.1.1.7 root 2028: unsigned hash = canon_hash (x, mode); 1.1 root 2029: hash_arg_in_memory = save_hash_arg_in_memory; 2030: hash_arg_in_struct = save_hash_arg_in_struct; 2031: do_not_record = save_do_not_record; 2032: return hash; 2033: } 2034: 2035: /* Return 1 iff X and Y would canonicalize into the same thing, 2036: without actually constructing the canonicalization of either one. 2037: If VALIDATE is nonzero, 2038: we assume X is an expression being processed from the rtl 2039: and Y was found in the hash table. We check register refs 2040: in Y for being marked as valid. 2041: 2042: If EQUAL_VALUES is nonzero, we allow a register to match a constant value 2043: that is known to be in the register. Ordinarily, we don't allow them 2044: to match, because letting them match would cause unpredictable results 2045: in all the places that search a hash table chain for an equivalent 2046: for a given value. A possible equivalent that has different structure 2047: has its hash code computed from different data. Whether the hash code 2048: is the same as that of the the given value is pure luck. */ 2049: 2050: static int 2051: exp_equiv_p (x, y, validate, equal_values) 2052: rtx x, y; 2053: int validate; 2054: int equal_values; 2055: { 1.1.1.4 root 2056: register int i, j; 1.1 root 2057: register enum rtx_code code; 2058: register char *fmt; 2059: 2060: /* Note: it is incorrect to assume an expression is equivalent to itself 2061: if VALIDATE is nonzero. */ 2062: if (x == y && !validate) 2063: return 1; 2064: if (x == 0 || y == 0) 2065: return x == y; 2066: 2067: code = GET_CODE (x); 2068: if (code != GET_CODE (y)) 2069: { 2070: if (!equal_values) 2071: return 0; 2072: 2073: /* If X is a constant and Y is a register or vice versa, they may be 2074: equivalent. We only have to validate if Y is a register. */ 2075: if (CONSTANT_P (x) && GET_CODE (y) == REG 2076: && REGNO_QTY_VALID_P (REGNO (y)) 2077: && GET_MODE (y) == qty_mode[reg_qty[REGNO (y)]] 2078: && rtx_equal_p (x, qty_const[reg_qty[REGNO (y)]]) 2079: && (! validate || reg_in_table[REGNO (y)] == reg_tick[REGNO (y)])) 2080: return 1; 2081: 2082: if (CONSTANT_P (y) && code == REG 2083: && REGNO_QTY_VALID_P (REGNO (x)) 2084: && GET_MODE (x) == qty_mode[reg_qty[REGNO (x)]] 2085: && rtx_equal_p (y, qty_const[reg_qty[REGNO (x)]])) 2086: return 1; 2087: 2088: return 0; 2089: } 2090: 2091: /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 2092: if (GET_MODE (x) != GET_MODE (y)) 2093: return 0; 2094: 2095: switch (code) 2096: { 2097: case PC: 2098: case CC0: 2099: return x == y; 2100: 2101: case CONST_INT: 1.1.1.4 root 2102: return INTVAL (x) == INTVAL (y); 1.1 root 2103: 2104: case LABEL_REF: 2105: return XEXP (x, 0) == XEXP (y, 0); 2106: 1.1.1.7 root 2107: case SYMBOL_REF: 2108: return XSTR (x, 0) == XSTR (y, 0); 2109: 1.1 root 2110: case REG: 2111: { 2112: int regno = REGNO (y); 2113: int endregno 2114: = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1 2115: : HARD_REGNO_NREGS (regno, GET_MODE (y))); 2116: int i; 2117: 2118: /* If the quantities are not the same, the expressions are not 2119: equivalent. If there are and we are not to validate, they 2120: are equivalent. Otherwise, ensure all regs are up-to-date. */ 2121: 2122: if (reg_qty[REGNO (x)] != reg_qty[regno]) 2123: return 0; 2124: 2125: if (! validate) 2126: return 1; 2127: 2128: for (i = regno; i < endregno; i++) 2129: if (reg_in_table[i] != reg_tick[i]) 2130: return 0; 2131: 2132: return 1; 2133: } 2134: 2135: /* For commutative operations, check both orders. */ 2136: case PLUS: 2137: case MULT: 2138: case AND: 2139: case IOR: 2140: case XOR: 2141: case NE: 2142: case EQ: 2143: return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values) 2144: && exp_equiv_p (XEXP (x, 1), XEXP (y, 1), 2145: validate, equal_values)) 2146: || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1), 2147: validate, equal_values) 2148: && exp_equiv_p (XEXP (x, 1), XEXP (y, 0), 2149: validate, equal_values))); 2150: } 2151: 2152: /* Compare the elements. If any pair of corresponding elements 2153: fail to match, return 0 for the whole things. */ 2154: 2155: fmt = GET_RTX_FORMAT (code); 2156: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2157: { 1.1.1.4 root 2158: switch (fmt[i]) 1.1 root 2159: { 1.1.1.4 root 2160: case 'e': 1.1 root 2161: if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values)) 2162: return 0; 1.1.1.4 root 2163: break; 2164: 2165: case 'E': 1.1 root 2166: if (XVECLEN (x, i) != XVECLEN (y, i)) 2167: return 0; 2168: for (j = 0; j < XVECLEN (x, i); j++) 2169: if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j), 2170: validate, equal_values)) 2171: return 0; 1.1.1.4 root 2172: break; 2173: 2174: case 's': 1.1 root 2175: if (strcmp (XSTR (x, i), XSTR (y, i))) 2176: return 0; 1.1.1.4 root 2177: break; 2178: 2179: case 'i': 1.1 root 2180: if (XINT (x, i) != XINT (y, i)) 2181: return 0; 1.1.1.4 root 2182: break; 2183: 2184: case 'w': 2185: if (XWINT (x, i) != XWINT (y, i)) 2186: return 0; 2187: break; 2188: 2189: case '0': 2190: break; 2191: 2192: default: 2193: abort (); 1.1 root 2194: } 1.1.1.4 root 2195: } 2196: 1.1 root 2197: return 1; 2198: } 2199: 2200: /* Return 1 iff any subexpression of X matches Y. 2201: Here we do not require that X or Y be valid (for registers referred to) 2202: for being in the hash table. */ 2203: 1.1.1.5 root 2204: static int 1.1 root 2205: refers_to_p (x, y) 2206: rtx x, y; 2207: { 2208: register int i; 2209: register enum rtx_code code; 2210: register char *fmt; 2211: 2212: repeat: 2213: if (x == y) 2214: return 1; 2215: if (x == 0 || y == 0) 2216: return 0; 2217: 2218: code = GET_CODE (x); 2219: /* If X as a whole has the same code as Y, they may match. 2220: If so, return 1. */ 2221: if (code == GET_CODE (y)) 2222: { 2223: if (exp_equiv_p (x, y, 0, 1)) 2224: return 1; 2225: } 2226: 2227: /* X does not match, so try its subexpressions. */ 2228: 2229: fmt = GET_RTX_FORMAT (code); 2230: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2231: if (fmt[i] == 'e') 2232: { 2233: if (i == 0) 2234: { 2235: x = XEXP (x, 0); 2236: goto repeat; 2237: } 2238: else 2239: if (refers_to_p (XEXP (x, i), y)) 2240: return 1; 2241: } 2242: else if (fmt[i] == 'E') 2243: { 2244: int j; 2245: for (j = 0; j < XVECLEN (x, i); j++) 2246: if (refers_to_p (XVECEXP (x, i, j), y)) 2247: return 1; 2248: } 2249: 2250: return 0; 2251: } 2252: 1.1.1.5 root 2253: /* Given ADDR and SIZE (a memory address, and the size of the memory reference), 2254: set PBASE, PSTART, and PEND which correspond to the base of the address, 2255: the starting offset, and ending offset respectively. 2256: 1.1.1.7 root 2257: ADDR is known to be a nonvarying address. */ 1.1.1.5 root 2258: 1.1.1.7 root 2259: /* ??? Despite what the comments say, this function is in fact frequently 2260: passed varying addresses. This does not appear to cause any problems. */ 1.1.1.5 root 2261: 2262: static void 2263: set_nonvarying_address_components (addr, size, pbase, pstart, pend) 2264: rtx addr; 2265: int size; 2266: rtx *pbase; 2267: HOST_WIDE_INT *pstart, *pend; 2268: { 2269: rtx base; 1.1.1.7 root 2270: HOST_WIDE_INT start, end; 1.1.1.5 root 2271: 2272: base = addr; 2273: start = 0; 2274: end = 0; 2275: 2276: /* Registers with nonvarying addresses usually have constant equivalents; 2277: but the frame pointer register is also possible. */ 2278: if (GET_CODE (base) == REG 2279: && qty_const != 0 2280: && REGNO_QTY_VALID_P (REGNO (base)) 2281: && qty_mode[reg_qty[REGNO (base)]] == GET_MODE (base) 2282: && qty_const[reg_qty[REGNO (base)]] != 0) 2283: base = qty_const[reg_qty[REGNO (base)]]; 2284: else if (GET_CODE (base) == PLUS 2285: && GET_CODE (XEXP (base, 1)) == CONST_INT 2286: && GET_CODE (XEXP (base, 0)) == REG 2287: && qty_const != 0 2288: && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) 2289: && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] 2290: == GET_MODE (XEXP (base, 0))) 2291: && qty_const[reg_qty[REGNO (XEXP (base, 0))]]) 2292: { 2293: start = INTVAL (XEXP (base, 1)); 2294: base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; 2295: } 1.1.1.8 ! root 2296: /* This can happen as the result of virtual register instantiation, ! 2297: if the initial offset is too large to be a valid address. */ ! 2298: else if (GET_CODE (base) == PLUS ! 2299: && GET_CODE (XEXP (base, 0)) == REG ! 2300: && GET_CODE (XEXP (base, 1)) == REG ! 2301: && qty_const != 0 ! 2302: && REGNO_QTY_VALID_P (REGNO (XEXP (base, 0))) ! 2303: && (qty_mode[reg_qty[REGNO (XEXP (base, 0))]] ! 2304: == GET_MODE (XEXP (base, 0))) ! 2305: && qty_const[reg_qty[REGNO (XEXP (base, 0))]] ! 2306: && REGNO_QTY_VALID_P (REGNO (XEXP (base, 1))) ! 2307: && (qty_mode[reg_qty[REGNO (XEXP (base, 1))]] ! 2308: == GET_MODE (XEXP (base, 1))) ! 2309: && qty_const[reg_qty[REGNO (XEXP (base, 1))]]) ! 2310: { ! 2311: rtx tem = qty_const[reg_qty[REGNO (XEXP (base, 1))]]; ! 2312: base = qty_const[reg_qty[REGNO (XEXP (base, 0))]]; ! 2313: ! 2314: /* One of the two values must be a constant. */ ! 2315: if (GET_CODE (base) != CONST_INT) ! 2316: { ! 2317: if (GET_CODE (tem) != CONST_INT) ! 2318: abort (); ! 2319: start = INTVAL (tem); ! 2320: } ! 2321: else ! 2322: { ! 2323: start = INTVAL (base); ! 2324: base = tem; ! 2325: } ! 2326: } 1.1.1.5 root 2327: 1.1.1.7 root 2328: /* Handle everything that we can find inside an address that has been 2329: viewed as constant. */ 2330: 2331: while (1) 2332: { 2333: /* If no part of this switch does a "continue", the code outside 2334: will exit this loop. */ 2335: 2336: switch (GET_CODE (base)) 2337: { 2338: case LO_SUM: 2339: /* By definition, operand1 of a LO_SUM is the associated constant 2340: address. Use the associated constant address as the base 2341: instead. */ 2342: base = XEXP (base, 1); 2343: continue; 2344: 2345: case CONST: 2346: /* Strip off CONST. */ 2347: base = XEXP (base, 0); 2348: continue; 2349: 2350: case PLUS: 2351: if (GET_CODE (XEXP (base, 1)) == CONST_INT) 2352: { 2353: start += INTVAL (XEXP (base, 1)); 2354: base = XEXP (base, 0); 2355: continue; 2356: } 2357: break; 2358: 2359: case AND: 2360: /* Handle the case of an AND which is the negative of a power of 2361: two. This is used to represent unaligned memory operations. */ 2362: if (GET_CODE (XEXP (base, 1)) == CONST_INT 2363: && exact_log2 (- INTVAL (XEXP (base, 1))) > 0) 2364: { 2365: set_nonvarying_address_components (XEXP (base, 0), size, 2366: pbase, pstart, pend); 2367: 2368: /* Assume the worst misalignment. START is affected, but not 2369: END, so compensate but adjusting SIZE. Don't lose any 2370: constant we already had. */ 2371: 2372: size = *pend - *pstart - INTVAL (XEXP (base, 1)) - 1; 1.1.1.8 ! root 2373: start += *pstart + INTVAL (XEXP (base, 1)) + 1; ! 2374: end += *pend; 1.1.1.7 root 2375: base = *pbase; 2376: } 2377: break; 2378: } 2379: 2380: break; 2381: } 1.1.1.5 root 2382: 1.1.1.7 root 2383: if (GET_CODE (base) == CONST_INT) 1.1.1.5 root 2384: { 1.1.1.7 root 2385: start += INTVAL (base); 2386: base = const0_rtx; 1.1.1.5 root 2387: } 2388: 2389: end = start + size; 2390: 2391: /* Set the return values. */ 2392: *pbase = base; 2393: *pstart = start; 2394: *pend = end; 2395: } 2396: 1.1 root 2397: /* Return 1 iff any subexpression of X refers to memory 2398: at an address of BASE plus some offset 2399: such that any of the bytes' offsets fall between START (inclusive) 2400: and END (exclusive). 2401: 1.1.1.5 root 2402: The value is undefined if X is a varying address (as determined by 2403: cse_rtx_addr_varies_p). This function is not used in such cases. 1.1 root 2404: 2405: When used in the cse pass, `qty_const' is nonzero, and it is used 2406: to treat an address that is a register with a known constant value 2407: as if it were that constant value. 2408: In the loop pass, `qty_const' is zero, so this is not done. */ 2409: 1.1.1.5 root 2410: static int 1.1 root 2411: refers_to_mem_p (x, base, start, end) 2412: rtx x, base; 1.1.1.4 root 2413: HOST_WIDE_INT start, end; 1.1 root 2414: { 1.1.1.4 root 2415: register HOST_WIDE_INT i; 1.1 root 2416: register enum rtx_code code; 2417: register char *fmt; 2418: 2419: repeat: 2420: if (x == 0) 2421: return 0; 2422: 2423: code = GET_CODE (x); 2424: if (code == MEM) 2425: { 2426: register rtx addr = XEXP (x, 0); /* Get the address. */ 1.1.1.5 root 2427: rtx mybase; 2428: HOST_WIDE_INT mystart, myend; 1.1 root 2429: 1.1.1.5 root 2430: set_nonvarying_address_components (addr, GET_MODE_SIZE (GET_MODE (x)), 2431: &mybase, &mystart, &myend); 2432: 2433: 2434: /* refers_to_mem_p is never called with varying addresses. 2435: If the base addresses are not equal, there is no chance 2436: of the memory addresses conflicting. */ 2437: if (! rtx_equal_p (mybase, base)) 1.1 root 2438: return 0; 2439: 1.1.1.5 root 2440: return myend > start && mystart < end; 1.1 root 2441: } 2442: 2443: /* X does not match, so try its subexpressions. */ 2444: 2445: fmt = GET_RTX_FORMAT (code); 2446: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2447: if (fmt[i] == 'e') 2448: { 2449: if (i == 0) 2450: { 2451: x = XEXP (x, 0); 2452: goto repeat; 2453: } 2454: else 2455: if (refers_to_mem_p (XEXP (x, i), base, start, end)) 2456: return 1; 2457: } 2458: else if (fmt[i] == 'E') 2459: { 2460: int j; 2461: for (j = 0; j < XVECLEN (x, i); j++) 2462: if (refers_to_mem_p (XVECEXP (x, i, j), base, start, end)) 2463: return 1; 2464: } 2465: 2466: return 0; 2467: } 2468: 2469: /* Nonzero if X refers to memory at a varying address; 2470: except that a register which has at the moment a known constant value 2471: isn't considered variable. */ 2472: 2473: static int 2474: cse_rtx_addr_varies_p (x) 2475: rtx x; 2476: { 2477: /* We need not check for X and the equivalence class being of the same 2478: mode because if X is equivalent to a constant in some mode, it 2479: doesn't vary in any mode. */ 2480: 2481: if (GET_CODE (x) == MEM 2482: && GET_CODE (XEXP (x, 0)) == REG 2483: && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))) 2484: && GET_MODE (XEXP (x, 0)) == qty_mode[reg_qty[REGNO (XEXP (x, 0))]] 2485: && qty_const[reg_qty[REGNO (XEXP (x, 0))]] != 0) 2486: return 0; 2487: 2488: if (GET_CODE (x) == MEM 2489: && GET_CODE (XEXP (x, 0)) == PLUS 2490: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT 2491: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG 2492: && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) 2493: && (GET_MODE (XEXP (XEXP (x, 0), 0)) 2494: == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) 2495: && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) 2496: return 0; 2497: 1.1.1.8 ! root 2498: /* This can happen as the result of virtual register instantiation, if ! 2499: the initial constant is too large to be a valid address. This gives ! 2500: us a three instruction sequence, load large offset into a register, ! 2501: load fp minus a constant into a register, then a MEM which is the ! 2502: sum of the two `constant' registers. */ ! 2503: if (GET_CODE (x) == MEM ! 2504: && GET_CODE (XEXP (x, 0)) == PLUS ! 2505: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG ! 2506: && GET_CODE (XEXP (XEXP (x, 0), 1)) == REG ! 2507: && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 0))) ! 2508: && (GET_MODE (XEXP (XEXP (x, 0), 0)) ! 2509: == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]]) ! 2510: && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 0))]] ! 2511: && REGNO_QTY_VALID_P (REGNO (XEXP (XEXP (x, 0), 1))) ! 2512: && (GET_MODE (XEXP (XEXP (x, 0), 1)) ! 2513: == qty_mode[reg_qty[REGNO (XEXP (XEXP (x, 0), 1))]]) ! 2514: && qty_const[reg_qty[REGNO (XEXP (XEXP (x, 0), 1))]]) ! 2515: return 0; ! 2516: 1.1 root 2517: return rtx_addr_varies_p (x); 2518: } 2519: 2520: /* Canonicalize an expression: 2521: replace each register reference inside it 2522: with the "oldest" equivalent register. 2523: 2524: If INSN is non-zero and we are replacing a pseudo with a hard register 1.1.1.4 root 2525: or vice versa, validate_change is used to ensure that INSN remains valid 2526: after we make our substitution. The calls are made with IN_GROUP non-zero 2527: so apply_change_group must be called upon the outermost return from this 2528: function (unless INSN is zero). The result of apply_change_group can 2529: generally be discarded since the changes we are making are optional. */ 1.1 root 2530: 2531: static rtx 2532: canon_reg (x, insn) 2533: rtx x; 2534: rtx insn; 2535: { 2536: register int i; 2537: register enum rtx_code code; 2538: register char *fmt; 2539: 2540: if (x == 0) 2541: return x; 2542: 2543: code = GET_CODE (x); 2544: switch (code) 2545: { 2546: case PC: 2547: case CC0: 2548: case CONST: 2549: case CONST_INT: 2550: case CONST_DOUBLE: 2551: case SYMBOL_REF: 2552: case LABEL_REF: 2553: case ADDR_VEC: 2554: case ADDR_DIFF_VEC: 2555: return x; 2556: 2557: case REG: 2558: { 2559: register int first; 2560: 2561: /* Never replace a hard reg, because hard regs can appear 2562: in more than one machine mode, and we must preserve the mode 2563: of each occurrence. Also, some hard regs appear in 2564: MEMs that are shared and mustn't be altered. Don't try to 2565: replace any reg that maps to a reg of class NO_REGS. */ 2566: if (REGNO (x) < FIRST_PSEUDO_REGISTER 2567: || ! REGNO_QTY_VALID_P (REGNO (x))) 2568: return x; 2569: 2570: first = qty_first_reg[reg_qty[REGNO (x)]]; 2571: return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] 2572: : REGNO_REG_CLASS (first) == NO_REGS ? x 2573: : gen_rtx (REG, qty_mode[reg_qty[REGNO (x)]], first)); 2574: } 2575: } 2576: 2577: fmt = GET_RTX_FORMAT (code); 2578: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2579: { 2580: register int j; 2581: 2582: if (fmt[i] == 'e') 2583: { 2584: rtx new = canon_reg (XEXP (x, i), insn); 2585: 2586: /* If replacing pseudo with hard reg or vice versa, ensure the 1.1.1.3 root 2587: insn remains valid. Likewise if the insn has MATCH_DUPs. */ 1.1.1.4 root 2588: if (insn != 0 && new != 0 2589: && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG 1.1.1.3 root 2590: && (((REGNO (new) < FIRST_PSEUDO_REGISTER) 2591: != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER)) 1.1.1.4 root 2592: || insn_n_dups[recog_memoized (insn)] > 0)) 2593: validate_change (insn, &XEXP (x, i), new, 1); 1.1 root 2594: else 2595: XEXP (x, i) = new; 2596: } 2597: else if (fmt[i] == 'E') 2598: for (j = 0; j < XVECLEN (x, i); j++) 2599: XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn); 2600: } 2601: 2602: return x; 2603: } 2604: 2605: /* LOC is a location with INSN that is an operand address (the contents of 2606: a MEM). Find the best equivalent address to use that is valid for this 2607: insn. 2608: 2609: On most CISC machines, complicated address modes are costly, and rtx_cost 2610: is a good approximation for that cost. However, most RISC machines have 2611: only a few (usually only one) memory reference formats. If an address is 2612: valid at all, it is often just as cheap as any other address. Hence, for 2613: RISC machines, we use the configuration macro `ADDRESS_COST' to compare the 2614: costs of various addresses. For two addresses of equal cost, choose the one 2615: with the highest `rtx_cost' value as that has the potential of eliminating 2616: the most insns. For equal costs, we choose the first in the equivalence 2617: class. Note that we ignore the fact that pseudo registers are cheaper 2618: than hard registers here because we would also prefer the pseudo registers. 2619: */ 2620: 1.1.1.5 root 2621: static void 1.1 root 2622: find_best_addr (insn, loc) 2623: rtx insn; 2624: rtx *loc; 2625: { 2626: struct table_elt *elt, *p; 2627: rtx addr = *loc; 2628: int our_cost; 2629: int found_better = 1; 2630: int save_do_not_record = do_not_record; 2631: int save_hash_arg_in_memory = hash_arg_in_memory; 2632: int save_hash_arg_in_struct = hash_arg_in_struct; 2633: int addr_volatile; 2634: int regno; 1.1.1.7 root 2635: unsigned hash; 1.1 root 2636: 2637: /* Do not try to replace constant addresses or addresses of local and 2638: argument slots. These MEM expressions are made only once and inserted 2639: in many instructions, as well as being used to control symbol table 2640: output. It is not safe to clobber them. 2641: 2642: There are some uncommon cases where the address is already in a register 2643: for some reason, but we cannot take advantage of that because we have 2644: no easy way to unshare the MEM. In addition, looking up all stack 2645: addresses is costly. */ 2646: if ((GET_CODE (addr) == PLUS 2647: && GET_CODE (XEXP (addr, 0)) == REG 2648: && GET_CODE (XEXP (addr, 1)) == CONST_INT 2649: && (regno = REGNO (XEXP (addr, 0)), 1.1.1.6 root 2650: regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM 2651: || regno == ARG_POINTER_REGNUM)) 1.1 root 2652: || (GET_CODE (addr) == REG 1.1.1.6 root 2653: && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM 2654: || regno == HARD_FRAME_POINTER_REGNUM 2655: || regno == ARG_POINTER_REGNUM)) 1.1 root 2656: || CONSTANT_ADDRESS_P (addr)) 2657: return; 2658: 2659: /* If this address is not simply a register, try to fold it. This will 2660: sometimes simplify the expression. Many simplifications 2661: will not be valid, but some, usually applying the associative rule, will 2662: be valid and produce better code. */ 2663: if (GET_CODE (addr) != REG 2664: && validate_change (insn, loc, fold_rtx (addr, insn), 0)) 2665: addr = *loc; 2666: 1.1.1.4 root 2667: /* If this address is not in the hash table, we can't look for equivalences 2668: of the whole address. Also, ignore if volatile. */ 2669: 1.1 root 2670: do_not_record = 0; 1.1.1.7 root 2671: hash = HASH (addr, Pmode); 1.1 root 2672: addr_volatile = do_not_record; 2673: do_not_record = save_do_not_record; 2674: hash_arg_in_memory = save_hash_arg_in_memory; 2675: hash_arg_in_struct = save_hash_arg_in_struct; 2676: 2677: if (addr_volatile) 2678: return; 2679: 1.1.1.7 root 2680: elt = lookup (addr, hash, Pmode); 1.1 root 2681: 2682: #ifndef ADDRESS_COST 1.1.1.4 root 2683: if (elt) 2684: { 2685: our_cost = elt->cost; 1.1 root 2686: 1.1.1.4 root 2687: /* Find the lowest cost below ours that works. */ 2688: for (elt = elt->first_same_value; elt; elt = elt->next_same_value) 2689: if (elt->cost < our_cost 2690: && (GET_CODE (elt->exp) == REG 2691: || exp_equiv_p (elt->exp, elt->exp, 1, 0)) 2692: && validate_change (insn, loc, 2693: canon_reg (copy_rtx (elt->exp), NULL_RTX), 0)) 2694: return; 2695: } 1.1 root 2696: #else 2697: 1.1.1.4 root 2698: if (elt) 2699: { 2700: /* We need to find the best (under the criteria documented above) entry 2701: in the class that is valid. We use the `flag' field to indicate 2702: choices that were invalid and iterate until we can't find a better 2703: one that hasn't already been tried. */ 2704: 2705: for (p = elt->first_same_value; p; p = p->next_same_value) 2706: p->flag = 0; 1.1 root 2707: 1.1.1.4 root 2708: while (found_better) 2709: { 2710: int best_addr_cost = ADDRESS_COST (*loc); 2711: int best_rtx_cost = (elt->cost + 1) >> 1; 2712: struct table_elt *best_elt = elt; 2713: 2714: found_better = 0; 2715: for (p = elt->first_same_value; p; p = p->next_same_value) 2716: if (! p->flag 2717: && (GET_CODE (p->exp) == REG 2718: || exp_equiv_p (p->exp, p->exp, 1, 0)) 2719: && (ADDRESS_COST (p->exp) < best_addr_cost 2720: || (ADDRESS_COST (p->exp) == best_addr_cost 2721: && (p->cost + 1) >> 1 > best_rtx_cost))) 2722: { 2723: found_better = 1; 2724: best_addr_cost = ADDRESS_COST (p->exp); 2725: best_rtx_cost = (p->cost + 1) >> 1; 2726: best_elt = p; 2727: } 1.1 root 2728: 1.1.1.4 root 2729: if (found_better) 2730: { 2731: if (validate_change (insn, loc, 2732: canon_reg (copy_rtx (best_elt->exp), 2733: NULL_RTX), 0)) 2734: return; 2735: else 2736: best_elt->flag = 1; 2737: } 2738: } 2739: } 2740: 2741: /* If the address is a binary operation with the first operand a register 2742: and the second a constant, do the same as above, but looking for 2743: equivalences of the register. Then try to simplify before checking for 2744: the best address to use. This catches a few cases: First is when we 2745: have REG+const and the register is another REG+const. We can often merge 2746: the constants and eliminate one insn and one register. It may also be 2747: that a machine has a cheap REG+REG+const. Finally, this improves the 2748: code on the Alpha for unaligned byte stores. */ 2749: 2750: if (flag_expensive_optimizations 2751: && (GET_RTX_CLASS (GET_CODE (*loc)) == '2' 2752: || GET_RTX_CLASS (GET_CODE (*loc)) == 'c') 2753: && GET_CODE (XEXP (*loc, 0)) == REG 2754: && GET_CODE (XEXP (*loc, 1)) == CONST_INT) 1.1 root 2755: { 1.1.1.4 root 2756: rtx c = XEXP (*loc, 1); 2757: 2758: do_not_record = 0; 1.1.1.7 root 2759: hash = HASH (XEXP (*loc, 0), Pmode); 1.1.1.4 root 2760: do_not_record = save_do_not_record; 2761: hash_arg_in_memory = save_hash_arg_in_memory; 2762: hash_arg_in_struct = save_hash_arg_in_struct; 2763: 1.1.1.7 root 2764: elt = lookup (XEXP (*loc, 0), hash, Pmode); 1.1.1.4 root 2765: if (elt == 0) 2766: return; 2767: 2768: /* We need to find the best (under the criteria documented above) entry 2769: in the class that is valid. We use the `flag' field to indicate 2770: choices that were invalid and iterate until we can't find a better 2771: one that hasn't already been tried. */ 1.1 root 2772: 2773: for (p = elt->first_same_value; p; p = p->next_same_value) 1.1.1.4 root 2774: p->flag = 0; 1.1 root 2775: 1.1.1.4 root 2776: while (found_better) 1.1 root 2777: { 1.1.1.4 root 2778: int best_addr_cost = ADDRESS_COST (*loc); 2779: int best_rtx_cost = (COST (*loc) + 1) >> 1; 2780: struct table_elt *best_elt = elt; 2781: rtx best_rtx = *loc; 1.1.1.7 root 2782: int count; 2783: 2784: /* This is at worst case an O(n^2) algorithm, so limit our search 2785: to the first 32 elements on the list. This avoids trouble 2786: compiling code with very long basic blocks that can easily 2787: call cse_gen_binary so many times that we run out of memory. */ 1.1.1.4 root 2788: 2789: found_better = 0; 1.1.1.7 root 2790: for (p = elt->first_same_value, count = 0; 2791: p && count < 32; 2792: p = p->next_same_value, count++) 1.1.1.4 root 2793: if (! p->flag 2794: && (GET_CODE (p->exp) == REG 2795: || exp_equiv_p (p->exp, p->exp, 1, 0))) 2796: { 1.1.1.5 root 2797: rtx new = cse_gen_binary (GET_CODE (*loc), Pmode, p->exp, c); 1.1.1.4 root 2798: 2799: if ((ADDRESS_COST (new) < best_addr_cost 2800: || (ADDRESS_COST (new) == best_addr_cost 2801: && (COST (new) + 1) >> 1 > best_rtx_cost))) 2802: { 2803: found_better = 1; 2804: best_addr_cost = ADDRESS_COST (new); 2805: best_rtx_cost = (COST (new) + 1) >> 1; 2806: best_elt = p; 2807: best_rtx = new; 2808: } 2809: } 2810: 2811: if (found_better) 2812: { 2813: if (validate_change (insn, loc, 2814: canon_reg (copy_rtx (best_rtx), 2815: NULL_RTX), 0)) 2816: return; 2817: else 2818: best_elt->flag = 1; 2819: } 1.1 root 2820: } 2821: } 2822: #endif 2823: } 2824: 2825: /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison 2826: operation (EQ, NE, GT, etc.), follow it back through the hash table and 2827: what values are being compared. 2828: 2829: *PARG1 and *PARG2 are updated to contain the rtx representing the values 2830: actually being compared. For example, if *PARG1 was (cc0) and *PARG2 2831: was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were 2832: compared to produce cc0. 2833: 2834: The return value is the comparison operator and is either the code of 2835: A or the code corresponding to the inverse of the comparison. */ 2836: 2837: static enum rtx_code 1.1.1.4 root 2838: find_comparison_args (code, parg1, parg2, pmode1, pmode2) 1.1 root 2839: enum rtx_code code; 2840: rtx *parg1, *parg2; 1.1.1.4 root 2841: enum machine_mode *pmode1, *pmode2; 1.1 root 2842: { 2843: rtx arg1, arg2; 2844: 2845: arg1 = *parg1, arg2 = *parg2; 2846: 2847: /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */ 2848: 1.1.1.4 root 2849: while (arg2 == CONST0_RTX (GET_MODE (arg1))) 1.1 root 2850: { 2851: /* Set non-zero when we find something of interest. */ 2852: rtx x = 0; 2853: int reverse_code = 0; 2854: struct table_elt *p = 0; 2855: 2856: /* If arg1 is a COMPARE, extract the comparison arguments from it. 2857: On machines with CC0, this is the only case that can occur, since 2858: fold_rtx will return the COMPARE or item being compared with zero 2859: when given CC0. */ 2860: 2861: if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx) 2862: x = arg1; 2863: 2864: /* If ARG1 is a comparison operator and CODE is testing for 2865: STORE_FLAG_VALUE, get the inner arguments. */ 2866: 2867: else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<') 2868: { 1.1.1.4 root 2869: if (code == NE 2870: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT 2871: && code == LT && STORE_FLAG_VALUE == -1) 2872: #ifdef FLOAT_STORE_FLAG_VALUE 2873: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT 2874: && FLOAT_STORE_FLAG_VALUE < 0) 2875: #endif 2876: ) 1.1 root 2877: x = arg1; 1.1.1.4 root 2878: else if (code == EQ 2879: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT 2880: && code == GE && STORE_FLAG_VALUE == -1) 2881: #ifdef FLOAT_STORE_FLAG_VALUE 2882: || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT 2883: && FLOAT_STORE_FLAG_VALUE < 0) 2884: #endif 2885: ) 1.1 root 2886: x = arg1, reverse_code = 1; 2887: } 2888: 2889: /* ??? We could also check for 2890: 2891: (ne (and (eq (...) (const_int 1))) (const_int 0)) 2892: 2893: and related forms, but let's wait until we see them occurring. */ 2894: 2895: if (x == 0) 2896: /* Look up ARG1 in the hash table and see if it has an equivalence 2897: that lets us see what is being compared. */ 2898: p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS, 2899: GET_MODE (arg1)); 2900: if (p) p = p->first_same_value; 2901: 2902: for (; p; p = p->next_same_value) 2903: { 2904: enum machine_mode inner_mode = GET_MODE (p->exp); 2905: 2906: /* If the entry isn't valid, skip it. */ 2907: if (! exp_equiv_p (p->exp, p->exp, 1, 0)) 2908: continue; 2909: 2910: if (GET_CODE (p->exp) == COMPARE 2911: /* Another possibility is that this machine has a compare insn 2912: that includes the comparison code. In that case, ARG1 would 2913: be equivalent to a comparison operation that would set ARG1 to 2914: either STORE_FLAG_VALUE or zero. If this is an NE operation, 2915: ORIG_CODE is the actual comparison being done; if it is an EQ, 2916: we must reverse ORIG_CODE. On machine with a negative value 2917: for STORE_FLAG_VALUE, also look at LT and GE operations. */ 2918: || ((code == NE 2919: || (code == LT 1.1.1.4 root 2920: && GET_MODE_CLASS (inner_mode) == MODE_INT 2921: && (GET_MODE_BITSIZE (inner_mode) 2922: <= HOST_BITS_PER_WIDE_INT) 1.1 root 2923: && (STORE_FLAG_VALUE 1.1.1.4 root 2924: & ((HOST_WIDE_INT) 1 2925: << (GET_MODE_BITSIZE (inner_mode) - 1)))) 2926: #ifdef FLOAT_STORE_FLAG_VALUE 2927: || (code == LT 2928: && GET_MODE_CLASS (inner_mode) == MODE_FLOAT 2929: && FLOAT_STORE_FLAG_VALUE < 0) 2930: #endif 2931: ) 1.1 root 2932: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')) 2933: { 2934: x = p->exp; 2935: break; 2936: } 2937: else if ((code == EQ 2938: || (code == GE 1.1.1.4 root 2939: && GET_MODE_CLASS (inner_mode) == MODE_INT 2940: && (GET_MODE_BITSIZE (inner_mode) 2941: <= HOST_BITS_PER_WIDE_INT) 1.1 root 2942: && (STORE_FLAG_VALUE 1.1.1.4 root 2943: & ((HOST_WIDE_INT) 1 2944: << (GET_MODE_BITSIZE (inner_mode) - 1)))) 2945: #ifdef FLOAT_STORE_FLAG_VALUE 2946: || (code == GE 2947: && GET_MODE_CLASS (inner_mode) == MODE_FLOAT 2948: && FLOAT_STORE_FLAG_VALUE < 0) 2949: #endif 2950: ) 1.1 root 2951: && GET_RTX_CLASS (GET_CODE (p->exp)) == '<') 2952: { 2953: reverse_code = 1; 2954: x = p->exp; 2955: break; 2956: } 2957: 2958: /* If this is fp + constant, the equivalent is a better operand since 2959: it may let us predict the value of the comparison. */ 2960: else if (NONZERO_BASE_PLUS_P (p->exp)) 2961: { 2962: arg1 = p->exp; 2963: continue; 2964: } 2965: } 2966: 2967: /* If we didn't find a useful equivalence for ARG1, we are done. 2968: Otherwise, set up for the next iteration. */ 2969: if (x == 0) 2970: break; 2971: 2972: arg1 = XEXP (x, 0), arg2 = XEXP (x, 1); 2973: if (GET_RTX_CLASS (GET_CODE (x)) == '<') 2974: code = GET_CODE (x); 2975: 2976: if (reverse_code) 2977: code = reverse_condition (code); 2978: } 2979: 1.1.1.4 root 2980: /* Return our results. Return the modes from before fold_rtx 2981: because fold_rtx might produce const_int, and then it's too late. */ 2982: *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2); 1.1 root 2983: *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0); 2984: 2985: return code; 2986: } 2987: 2988: /* Try to simplify a unary operation CODE whose output mode is to be 2989: MODE with input operand OP whose mode was originally OP_MODE. 2990: Return zero if no simplification can be made. */ 2991: 2992: rtx 2993: simplify_unary_operation (code, mode, op, op_mode) 2994: enum rtx_code code; 2995: enum machine_mode mode; 2996: rtx op; 2997: enum machine_mode op_mode; 2998: { 2999: register int width = GET_MODE_BITSIZE (mode); 3000: 3001: /* The order of these tests is critical so that, for example, we don't 3002: check the wrong mode (input vs. output) for a conversion operation, 3003: such as FIX. At some point, this should be simplified. */ 3004: 1.1.1.7 root 3005: #if !defined(REAL_IS_NOT_DOUBLE) || defined(REAL_ARITHMETIC) 1.1 root 3006: 1.1.1.7 root 3007: if (code == FLOAT && GET_MODE (op) == VOIDmode 3008: && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) 1.1 root 3009: { 1.1.1.7 root 3010: HOST_WIDE_INT hv, lv; 1.1 root 3011: REAL_VALUE_TYPE d; 3012: 1.1.1.7 root 3013: if (GET_CODE (op) == CONST_INT) 3014: lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0; 3015: else 3016: lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op); 1.1 root 3017: 3018: #ifdef REAL_ARITHMETIC 1.1.1.7 root 3019: REAL_VALUE_FROM_INT (d, lv, hv); 1.1 root 3020: #else 1.1.1.7 root 3021: if (hv < 0) 1.1 root 3022: { 1.1.1.7 root 3023: d = (double) (~ hv); 1.1.1.4 root 3024: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) 3025: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); 1.1.1.7 root 3026: d += (double) (unsigned HOST_WIDE_INT) (~ lv); 1.1 root 3027: d = (- d - 1.0); 3028: } 3029: else 3030: { 1.1.1.7 root 3031: d = (double) hv; 1.1.1.4 root 3032: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) 3033: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); 1.1.1.7 root 3034: d += (double) (unsigned HOST_WIDE_INT) lv; 1.1 root 3035: } 3036: #endif /* REAL_ARITHMETIC */ 1.1.1.8 ! root 3037: d = real_value_truncate (mode, d); 1.1 root 3038: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 3039: } 1.1.1.7 root 3040: else if (code == UNSIGNED_FLOAT && GET_MODE (op) == VOIDmode 3041: && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) 1.1 root 3042: { 1.1.1.7 root 3043: HOST_WIDE_INT hv, lv; 1.1 root 3044: REAL_VALUE_TYPE d; 3045: 1.1.1.7 root 3046: if (GET_CODE (op) == CONST_INT) 3047: lv = INTVAL (op), hv = INTVAL (op) < 0 ? -1 : 0; 3048: else 3049: lv = CONST_DOUBLE_LOW (op), hv = CONST_DOUBLE_HIGH (op); 3050: 1.1.1.8 ! root 3051: if (op_mode == VOIDmode) ! 3052: { ! 3053: /* We don't know how to interpret negative-looking numbers in ! 3054: this case, so don't try to fold those. */ ! 3055: if (hv < 0) ! 3056: return 0; ! 3057: } ! 3058: else if (GET_MODE_BITSIZE (op_mode) >= HOST_BITS_PER_WIDE_INT * 2) 1.1.1.7 root 3059: ; 3060: else 3061: hv = 0, lv &= GET_MODE_MASK (op_mode); 3062: 1.1 root 3063: #ifdef REAL_ARITHMETIC 1.1.1.7 root 3064: REAL_VALUE_FROM_UNSIGNED_INT (d, lv, hv); 1.1 root 3065: #else 1.1.1.7 root 3066: 3067: d = (double) (unsigned HOST_WIDE_INT) hv; 1.1.1.4 root 3068: d *= ((double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2)) 3069: * (double) ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT / 2))); 1.1.1.7 root 3070: d += (double) (unsigned HOST_WIDE_INT) lv; 1.1 root 3071: #endif /* REAL_ARITHMETIC */ 1.1.1.8 ! root 3072: d = real_value_truncate (mode, d); 1.1 root 3073: return CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 3074: } 3075: #endif 3076: 1.1.1.4 root 3077: if (GET_CODE (op) == CONST_INT 3078: && width <= HOST_BITS_PER_WIDE_INT && width > 0) 1.1 root 3079: { 1.1.1.4 root 3080: register HOST_WIDE_INT arg0 = INTVAL (op); 3081: register HOST_WIDE_INT val; 1.1 root 3082: 3083: switch (code) 3084: { 3085: case NOT: 3086: val = ~ arg0; 3087: break; 3088: 3089: case NEG: 3090: val = - arg0; 3091: break; 3092: 3093: case ABS: 3094: val = (arg0 >= 0 ? arg0 : - arg0); 3095: break; 3096: 3097: case FFS: 3098: /* Don't use ffs here. Instead, get low order bit and then its 3099: number. If arg0 is zero, this will return 0, as desired. */ 3100: arg0 &= GET_MODE_MASK (mode); 3101: val = exact_log2 (arg0 & (- arg0)) + 1; 3102: break; 3103: 3104: case TRUNCATE: 3105: val = arg0; 3106: break; 3107: 3108: case ZERO_EXTEND: 3109: if (op_mode == VOIDmode) 3110: op_mode = mode; 1.1.1.4 root 3111: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) 3112: { 3113: /* If we were really extending the mode, 3114: we would have to distinguish between zero-extension 3115: and sign-extension. */ 3116: if (width != GET_MODE_BITSIZE (op_mode)) 3117: abort (); 3118: val = arg0; 3119: } 3120: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) 3121: val = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); 1.1 root 3122: else 3123: return 0; 3124: break; 3125: 3126: case SIGN_EXTEND: 3127: if (op_mode == VOIDmode) 3128: op_mode = mode; 1.1.1.4 root 3129: if (GET_MODE_BITSIZE (op_mode) == HOST_BITS_PER_WIDE_INT) 3130: { 3131: /* If we were really extending the mode, 3132: we would have to distinguish between zero-extension 3133: and sign-extension. */ 3134: if (width != GET_MODE_BITSIZE (op_mode)) 3135: abort (); 3136: val = arg0; 3137: } 3138: else if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT) 3139: { 3140: val 3141: = arg0 & ~((HOST_WIDE_INT) (-1) << GET_MODE_BITSIZE (op_mode)); 3142: if (val 3143: & ((HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (op_mode) - 1))) 3144: val -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); 1.1 root 3145: } 3146: else 3147: return 0; 3148: break; 3149: 1.1.1.2 root 3150: case SQRT: 3151: return 0; 3152: 1.1 root 3153: default: 3154: abort (); 3155: } 3156: 3157: /* Clear the bits that don't belong in our mode, 3158: unless they and our sign bit are all one. 3159: So we get either a reasonable negative value or a reasonable 3160: unsigned value for this mode. */ 1.1.1.4 root 3161: if (width < HOST_BITS_PER_WIDE_INT 3162: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 3163: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 1.1.1.8 ! root 3164: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 3165: 1.1.1.4 root 3166: return GEN_INT (val); 1.1 root 3167: } 3168: 3169: /* We can do some operations on integer CONST_DOUBLEs. Also allow 3170: for a DImode operation on a CONST_INT. */ 1.1.1.7 root 3171: else if (GET_MODE (op) == VOIDmode && width <= HOST_BITS_PER_INT * 2 1.1 root 3172: && (GET_CODE (op) == CONST_DOUBLE || GET_CODE (op) == CONST_INT)) 3173: { 1.1.1.4 root 3174: HOST_WIDE_INT l1, h1, lv, hv; 1.1 root 3175: 3176: if (GET_CODE (op) == CONST_DOUBLE) 3177: l1 = CONST_DOUBLE_LOW (op), h1 = CONST_DOUBLE_HIGH (op); 3178: else 3179: l1 = INTVAL (op), h1 = l1 < 0 ? -1 : 0; 3180: 3181: switch (code) 3182: { 3183: case NOT: 3184: lv = ~ l1; 3185: hv = ~ h1; 3186: break; 3187: 3188: case NEG: 3189: neg_double (l1, h1, &lv, &hv); 3190: break; 3191: 3192: case ABS: 3193: if (h1 < 0) 3194: neg_double (l1, h1, &lv, &hv); 3195: else 3196: lv = l1, hv = h1; 3197: break; 3198: 3199: case FFS: 3200: hv = 0; 3201: if (l1 == 0) 1.1.1.4 root 3202: lv = HOST_BITS_PER_WIDE_INT + exact_log2 (h1 & (-h1)) + 1; 1.1 root 3203: else 3204: lv = exact_log2 (l1 & (-l1)) + 1; 3205: break; 3206: 3207: case TRUNCATE: 1.1.1.7 root 3208: /* This is just a change-of-mode, so do nothing. */ 3209: lv = l1, hv = h1; 1.1 root 3210: break; 3211: 1.1.1.4 root 3212: case ZERO_EXTEND: 3213: if (op_mode == VOIDmode 3214: || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) 3215: return 0; 3216: 3217: hv = 0; 3218: lv = l1 & GET_MODE_MASK (op_mode); 3219: break; 3220: 3221: case SIGN_EXTEND: 3222: if (op_mode == VOIDmode 3223: || GET_MODE_BITSIZE (op_mode) > HOST_BITS_PER_WIDE_INT) 3224: return 0; 3225: else 3226: { 3227: lv = l1 & GET_MODE_MASK (op_mode); 3228: if (GET_MODE_BITSIZE (op_mode) < HOST_BITS_PER_WIDE_INT 3229: && (lv & ((HOST_WIDE_INT) 1 3230: << (GET_MODE_BITSIZE (op_mode) - 1))) != 0) 3231: lv -= (HOST_WIDE_INT) 1 << GET_MODE_BITSIZE (op_mode); 3232: 3233: hv = (lv < 0) ? ~ (HOST_WIDE_INT) 0 : 0; 3234: } 3235: break; 3236: 1.1.1.2 root 3237: case SQRT: 3238: return 0; 3239: 1.1 root 3240: default: 3241: return 0; 3242: } 3243: 3244: return immed_double_const (lv, hv, mode); 3245: } 3246: 3247: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 3248: else if (GET_CODE (op) == CONST_DOUBLE 3249: && GET_MODE_CLASS (mode) == MODE_FLOAT) 3250: { 3251: REAL_VALUE_TYPE d; 3252: jmp_buf handler; 3253: rtx x; 3254: 3255: if (setjmp (handler)) 3256: /* There used to be a warning here, but that is inadvisable. 3257: People may want to cause traps, and the natural way 3258: to do it should not get a warning. */ 3259: return 0; 3260: 3261: set_float_handler (handler); 3262: 3263: REAL_VALUE_FROM_CONST_DOUBLE (d, op); 3264: 3265: switch (code) 3266: { 3267: case NEG: 3268: d = REAL_VALUE_NEGATE (d); 3269: break; 3270: 3271: case ABS: 1.1.1.3 root 3272: if (REAL_VALUE_NEGATIVE (d)) 1.1 root 3273: d = REAL_VALUE_NEGATE (d); 3274: break; 3275: 3276: case FLOAT_TRUNCATE: 1.1.1.5 root 3277: d = real_value_truncate (mode, d); 1.1 root 3278: break; 3279: 3280: case FLOAT_EXTEND: 3281: /* All this does is change the mode. */ 3282: break; 3283: 3284: case FIX: 1.1.1.5 root 3285: d = REAL_VALUE_RNDZINT (d); 1.1 root 3286: break; 3287: 3288: case UNSIGNED_FIX: 1.1.1.5 root 3289: d = REAL_VALUE_UNSIGNED_RNDZINT (d); 1.1 root 3290: break; 3291: 1.1.1.2 root 3292: case SQRT: 3293: return 0; 3294: 1.1 root 3295: default: 3296: abort (); 3297: } 3298: 1.1.1.7 root 3299: x = CONST_DOUBLE_FROM_REAL_VALUE (d, mode); 1.1.1.4 root 3300: set_float_handler (NULL_PTR); 1.1 root 3301: return x; 3302: } 1.1.1.7 root 3303: 3304: else if (GET_CODE (op) == CONST_DOUBLE 3305: && GET_MODE_CLASS (GET_MODE (op)) == MODE_FLOAT 3306: && GET_MODE_CLASS (mode) == MODE_INT 1.1.1.4 root 3307: && width <= HOST_BITS_PER_WIDE_INT && width > 0) 1.1 root 3308: { 3309: REAL_VALUE_TYPE d; 3310: jmp_buf handler; 1.1.1.4 root 3311: HOST_WIDE_INT val; 1.1 root 3312: 3313: if (setjmp (handler)) 3314: return 0; 3315: 3316: set_float_handler (handler); 3317: 3318: REAL_VALUE_FROM_CONST_DOUBLE (d, op); 3319: 3320: switch (code) 3321: { 3322: case FIX: 3323: val = REAL_VALUE_FIX (d); 3324: break; 3325: 3326: case UNSIGNED_FIX: 3327: val = REAL_VALUE_UNSIGNED_FIX (d); 3328: break; 3329: 3330: default: 3331: abort (); 3332: } 3333: 1.1.1.4 root 3334: set_float_handler (NULL_PTR); 1.1 root 3335: 3336: /* Clear the bits that don't belong in our mode, 3337: unless they and our sign bit are all one. 3338: So we get either a reasonable negative value or a reasonable 3339: unsigned value for this mode. */ 1.1.1.4 root 3340: if (width < HOST_BITS_PER_WIDE_INT 3341: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 3342: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 3343: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 3344: 1.1.1.8 ! root 3345: /* If this would be an entire word for the target, but is not for ! 3346: the host, then sign-extend on the host so that the number will look ! 3347: the same way on the host that it would on the target. ! 3348: ! 3349: For example, when building a 64 bit alpha hosted 32 bit sparc ! 3350: targeted compiler, then we want the 32 bit unsigned value -1 to be ! 3351: represented as a 64 bit value -1, and not as 0x00000000ffffffff. ! 3352: The later confuses the sparc backend. */ ! 3353: ! 3354: if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width ! 3355: && (val & ((HOST_WIDE_INT) 1 << (width - 1)))) ! 3356: val |= ((HOST_WIDE_INT) (-1) << width); ! 3357: 1.1.1.4 root 3358: return GEN_INT (val); 1.1 root 3359: } 3360: #endif 1.1.1.3 root 3361: /* This was formerly used only for non-IEEE float. 3362: [email protected] says it is safe for IEEE also. */ 3363: else 1.1 root 3364: { 3365: /* There are some simplifications we can do even if the operands 1.1.1.3 root 3366: aren't constant. */ 1.1 root 3367: switch (code) 3368: { 3369: case NEG: 3370: case NOT: 3371: /* (not (not X)) == X, similarly for NEG. */ 3372: if (GET_CODE (op) == code) 3373: return XEXP (op, 0); 3374: break; 3375: 3376: case SIGN_EXTEND: 3377: /* (sign_extend (truncate (minus (label_ref L1) (label_ref L2)))) 3378: becomes just the MINUS if its mode is MODE. This allows 3379: folding switch statements on machines using casesi (such as 3380: the Vax). */ 3381: if (GET_CODE (op) == TRUNCATE 3382: && GET_MODE (XEXP (op, 0)) == mode 3383: && GET_CODE (XEXP (op, 0)) == MINUS 3384: && GET_CODE (XEXP (XEXP (op, 0), 0)) == LABEL_REF 3385: && GET_CODE (XEXP (XEXP (op, 0), 1)) == LABEL_REF) 3386: return XEXP (op, 0); 1.1.1.8 ! root 3387: ! 3388: #ifdef POINTERS_EXTEND_UNSIGNED ! 3389: if (! POINTERS_EXTEND_UNSIGNED ! 3390: && mode == Pmode && GET_MODE (op) == ptr_mode ! 3391: && CONSTANT_P (op)) ! 3392: return convert_memory_address (Pmode, op); ! 3393: #endif 1.1 root 3394: break; 1.1.1.8 ! root 3395: ! 3396: #ifdef POINTERS_EXTEND_UNSIGNED ! 3397: case ZERO_EXTEND: ! 3398: if (POINTERS_EXTEND_UNSIGNED ! 3399: && mode == Pmode && GET_MODE (op) == ptr_mode ! 3400: && CONSTANT_P (op)) ! 3401: return convert_memory_address (Pmode, op); ! 3402: break; ! 3403: #endif 1.1 root 3404: } 3405: 3406: return 0; 3407: } 3408: } 3409: 3410: /* Simplify a binary operation CODE with result mode MODE, operating on OP0 3411: and OP1. Return 0 if no simplification is possible. 3412: 3413: Don't use this for relational operations such as EQ or LT. 3414: Use simplify_relational_operation instead. */ 3415: 3416: rtx 3417: simplify_binary_operation (code, mode, op0, op1) 3418: enum rtx_code code; 3419: enum machine_mode mode; 3420: rtx op0, op1; 3421: { 1.1.1.4 root 3422: register HOST_WIDE_INT arg0, arg1, arg0s, arg1s; 3423: HOST_WIDE_INT val; 1.1 root 3424: int width = GET_MODE_BITSIZE (mode); 1.1.1.5 root 3425: rtx tem; 1.1 root 3426: 3427: /* Relational operations don't work here. We must know the mode 3428: of the operands in order to do the comparison correctly. 3429: Assuming a full word can give incorrect results. 3430: Consider comparing 128 with -128 in QImode. */ 3431: 3432: if (GET_RTX_CLASS (code) == '<') 3433: abort (); 3434: 3435: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 3436: if (GET_MODE_CLASS (mode) == MODE_FLOAT 3437: && GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE 3438: && mode == GET_MODE (op0) && mode == GET_MODE (op1)) 3439: { 3440: REAL_VALUE_TYPE f0, f1, value; 3441: jmp_buf handler; 3442: 3443: if (setjmp (handler)) 3444: return 0; 3445: 3446: set_float_handler (handler); 3447: 3448: REAL_VALUE_FROM_CONST_DOUBLE (f0, op0); 3449: REAL_VALUE_FROM_CONST_DOUBLE (f1, op1); 1.1.1.4 root 3450: f0 = real_value_truncate (mode, f0); 3451: f1 = real_value_truncate (mode, f1); 1.1 root 3452: 3453: #ifdef REAL_ARITHMETIC 1.1.1.5 root 3454: REAL_ARITHMETIC (value, rtx_to_tree_code (code), f0, f1); 1.1 root 3455: #else 3456: switch (code) 3457: { 3458: case PLUS: 3459: value = f0 + f1; 3460: break; 3461: case MINUS: 3462: value = f0 - f1; 3463: break; 3464: case MULT: 3465: value = f0 * f1; 3466: break; 3467: case DIV: 3468: #ifndef REAL_INFINITY 3469: if (f1 == 0) 1.1.1.4 root 3470: return 0; 1.1 root 3471: #endif 3472: value = f0 / f1; 3473: break; 3474: case SMIN: 3475: value = MIN (f0, f1); 3476: break; 3477: case SMAX: 3478: value = MAX (f0, f1); 3479: break; 3480: default: 3481: abort (); 3482: } 3483: #endif 3484: 1.1.1.4 root 3485: value = real_value_truncate (mode, value); 1.1.1.7 root 3486: set_float_handler (NULL_PTR); 3487: return CONST_DOUBLE_FROM_REAL_VALUE (value, mode); 1.1 root 3488: } 1.1.1.5 root 3489: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ 1.1 root 3490: 3491: /* We can fold some multi-word operations. */ 1.1.1.5 root 3492: if (GET_MODE_CLASS (mode) == MODE_INT 1.1.1.6 root 3493: && width == HOST_BITS_PER_WIDE_INT * 2 3494: && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT) 1.1.1.5 root 3495: && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) 1.1 root 3496: { 1.1.1.4 root 3497: HOST_WIDE_INT l1, l2, h1, h2, lv, hv; 1.1 root 3498: 1.1.1.6 root 3499: if (GET_CODE (op0) == CONST_DOUBLE) 3500: l1 = CONST_DOUBLE_LOW (op0), h1 = CONST_DOUBLE_HIGH (op0); 3501: else 3502: l1 = INTVAL (op0), h1 = l1 < 0 ? -1 : 0; 1.1 root 3503: 3504: if (GET_CODE (op1) == CONST_DOUBLE) 3505: l2 = CONST_DOUBLE_LOW (op1), h2 = CONST_DOUBLE_HIGH (op1); 3506: else 3507: l2 = INTVAL (op1), h2 = l2 < 0 ? -1 : 0; 3508: 3509: switch (code) 3510: { 3511: case MINUS: 3512: /* A - B == A + (-B). */ 3513: neg_double (l2, h2, &lv, &hv); 3514: l2 = lv, h2 = hv; 3515: 3516: /* .. fall through ... */ 3517: 3518: case PLUS: 3519: add_double (l1, h1, l2, h2, &lv, &hv); 3520: break; 3521: 3522: case MULT: 3523: mul_double (l1, h1, l2, h2, &lv, &hv); 3524: break; 3525: 3526: case DIV: case MOD: case UDIV: case UMOD: 3527: /* We'd need to include tree.h to do this and it doesn't seem worth 3528: it. */ 3529: return 0; 3530: 3531: case AND: 3532: lv = l1 & l2, hv = h1 & h2; 3533: break; 3534: 3535: case IOR: 3536: lv = l1 | l2, hv = h1 | h2; 3537: break; 3538: 3539: case XOR: 3540: lv = l1 ^ l2, hv = h1 ^ h2; 3541: break; 3542: 3543: case SMIN: 1.1.1.4 root 3544: if (h1 < h2 3545: || (h1 == h2 3546: && ((unsigned HOST_WIDE_INT) l1 3547: < (unsigned HOST_WIDE_INT) l2))) 1.1 root 3548: lv = l1, hv = h1; 3549: else 3550: lv = l2, hv = h2; 3551: break; 3552: 3553: case SMAX: 1.1.1.4 root 3554: if (h1 > h2 3555: || (h1 == h2 3556: && ((unsigned HOST_WIDE_INT) l1 3557: > (unsigned HOST_WIDE_INT) l2))) 1.1 root 3558: lv = l1, hv = h1; 3559: else 3560: lv = l2, hv = h2; 3561: break; 3562: 3563: case UMIN: 1.1.1.4 root 3564: if ((unsigned HOST_WIDE_INT) h1 < (unsigned HOST_WIDE_INT) h2 3565: || (h1 == h2 3566: && ((unsigned HOST_WIDE_INT) l1 3567: < (unsigned HOST_WIDE_INT) l2))) 1.1 root 3568: lv = l1, hv = h1; 3569: else 3570: lv = l2, hv = h2; 3571: break; 3572: 3573: case UMAX: 1.1.1.4 root 3574: if ((unsigned HOST_WIDE_INT) h1 > (unsigned HOST_WIDE_INT) h2 3575: || (h1 == h2 3576: && ((unsigned HOST_WIDE_INT) l1 3577: > (unsigned HOST_WIDE_INT) l2))) 1.1 root 3578: lv = l1, hv = h1; 3579: else 3580: lv = l2, hv = h2; 3581: break; 3582: 3583: case LSHIFTRT: case ASHIFTRT: 1.1.1.7 root 3584: case ASHIFT: 1.1 root 3585: case ROTATE: case ROTATERT: 3586: #ifdef SHIFT_COUNT_TRUNCATED 1.1.1.6 root 3587: if (SHIFT_COUNT_TRUNCATED) 3588: l2 &= (GET_MODE_BITSIZE (mode) - 1), h2 = 0; 1.1 root 3589: #endif 3590: 3591: if (h2 != 0 || l2 < 0 || l2 >= GET_MODE_BITSIZE (mode)) 3592: return 0; 3593: 3594: if (code == LSHIFTRT || code == ASHIFTRT) 3595: rshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 3596: code == ASHIFTRT); 1.1.1.7 root 3597: else if (code == ASHIFT) 3598: lshift_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv, 1); 1.1 root 3599: else if (code == ROTATE) 3600: lrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); 3601: else /* code == ROTATERT */ 3602: rrotate_double (l1, h1, l2, GET_MODE_BITSIZE (mode), &lv, &hv); 3603: break; 3604: 3605: default: 3606: return 0; 3607: } 3608: 3609: return immed_double_const (lv, hv, mode); 3610: } 3611: 3612: if (GET_CODE (op0) != CONST_INT || GET_CODE (op1) != CONST_INT 1.1.1.4 root 3613: || width > HOST_BITS_PER_WIDE_INT || width == 0) 1.1 root 3614: { 3615: /* Even if we can't compute a constant result, 3616: there are some cases worth simplifying. */ 3617: 3618: switch (code) 3619: { 3620: case PLUS: 3621: /* In IEEE floating point, x+0 is not the same as x. Similarly 3622: for the other optimizations below. */ 3623: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT 1.1.1.7 root 3624: && FLOAT_MODE_P (mode) && ! flag_fast_math) 1.1 root 3625: break; 3626: 3627: if (op1 == CONST0_RTX (mode)) 3628: return op0; 3629: 3630: /* ((-a) + b) -> (b - a) and similarly for (a + (-b)) */ 3631: if (GET_CODE (op0) == NEG) 1.1.1.5 root 3632: return cse_gen_binary (MINUS, mode, op1, XEXP (op0, 0)); 1.1 root 3633: else if (GET_CODE (op1) == NEG) 1.1.1.5 root 3634: return cse_gen_binary (MINUS, mode, op0, XEXP (op1, 0)); 1.1 root 3635: 1.1.1.5 root 3636: /* Handle both-operands-constant cases. We can only add 3637: CONST_INTs to constants since the sum of relocatable symbols 1.1.1.6 root 3638: can't be handled by most assemblers. Don't add CONST_INT 3639: to CONST_INT since overflow won't be computed properly if wider 3640: than HOST_BITS_PER_WIDE_INT. */ 1.1 root 3641: 1.1.1.6 root 3642: if (CONSTANT_P (op0) && GET_MODE (op0) != VOIDmode 3643: && GET_CODE (op1) == CONST_INT) 1.1.1.5 root 3644: return plus_constant (op0, INTVAL (op1)); 1.1.1.6 root 3645: else if (CONSTANT_P (op1) && GET_MODE (op1) != VOIDmode 3646: && GET_CODE (op0) == CONST_INT) 1.1.1.5 root 3647: return plus_constant (op1, INTVAL (op0)); 1.1 root 3648: 1.1.1.7 root 3649: /* See if this is something like X * C - X or vice versa or 3650: if the multiplication is written as a shift. If so, we can 3651: distribute and make a new multiply, shift, or maybe just 3652: have X (if C is 2 in the example above). But don't make 3653: real multiply if we didn't have one before. */ 3654: 3655: if (! FLOAT_MODE_P (mode)) 3656: { 3657: HOST_WIDE_INT coeff0 = 1, coeff1 = 1; 3658: rtx lhs = op0, rhs = op1; 3659: int had_mult = 0; 3660: 3661: if (GET_CODE (lhs) == NEG) 3662: coeff0 = -1, lhs = XEXP (lhs, 0); 3663: else if (GET_CODE (lhs) == MULT 3664: && GET_CODE (XEXP (lhs, 1)) == CONST_INT) 3665: { 3666: coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0); 3667: had_mult = 1; 3668: } 3669: else if (GET_CODE (lhs) == ASHIFT 3670: && GET_CODE (XEXP (lhs, 1)) == CONST_INT 3671: && INTVAL (XEXP (lhs, 1)) >= 0 3672: && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT) 3673: { 3674: coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1)); 3675: lhs = XEXP (lhs, 0); 3676: } 3677: 3678: if (GET_CODE (rhs) == NEG) 3679: coeff1 = -1, rhs = XEXP (rhs, 0); 3680: else if (GET_CODE (rhs) == MULT 3681: && GET_CODE (XEXP (rhs, 1)) == CONST_INT) 3682: { 3683: coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0); 3684: had_mult = 1; 3685: } 3686: else if (GET_CODE (rhs) == ASHIFT 3687: && GET_CODE (XEXP (rhs, 1)) == CONST_INT 3688: && INTVAL (XEXP (rhs, 1)) >= 0 3689: && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT) 3690: { 3691: coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1)); 3692: rhs = XEXP (rhs, 0); 3693: } 3694: 3695: if (rtx_equal_p (lhs, rhs)) 3696: { 3697: tem = cse_gen_binary (MULT, mode, lhs, 3698: GEN_INT (coeff0 + coeff1)); 3699: return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem; 3700: } 3701: } 3702: 1.1.1.5 root 3703: /* If one of the operands is a PLUS or a MINUS, see if we can 3704: simplify this by the associative law. 3705: Don't use the associative law for floating point. 3706: The inaccuracy makes it nonassociative, 3707: and subtle programs can break if operations are associated. */ 1.1 root 3708: 1.1.1.6 root 3709: if (INTEGRAL_MODE_P (mode) 1.1.1.5 root 3710: && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS 3711: || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) 3712: && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) 3713: return tem; 1.1 root 3714: break; 3715: 3716: case COMPARE: 3717: #ifdef HAVE_cc0 3718: /* Convert (compare FOO (const_int 0)) to FOO unless we aren't 3719: using cc0, in which case we want to leave it as a COMPARE 3720: so we can distinguish it from a register-register-copy. 3721: 3722: In IEEE floating point, x-0 is not the same as x. */ 3723: 3724: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 1.1.1.7 root 3725: || ! FLOAT_MODE_P (mode) || flag_fast_math) 1.1 root 3726: && op1 == CONST0_RTX (mode)) 3727: return op0; 3728: #else 3729: /* Do nothing here. */ 3730: #endif 3731: break; 3732: 3733: case MINUS: 1.1.1.3 root 3734: /* None of these optimizations can be done for IEEE 3735: floating point. */ 3736: if (TARGET_FLOAT_FORMAT == IEEE_FLOAT_FORMAT 1.1.1.7 root 3737: && FLOAT_MODE_P (mode) && ! flag_fast_math) 1.1.1.3 root 3738: break; 3739: 1.1.1.7 root 3740: /* We can't assume x-x is 0 even with non-IEEE floating point, 3741: but since it is zero except in very strange circumstances, we 3742: will treat it as zero with -ffast-math. */ 1.1 root 3743: if (rtx_equal_p (op0, op1) 3744: && ! side_effects_p (op0) 1.1.1.7 root 3745: && (! FLOAT_MODE_P (mode) || flag_fast_math)) 3746: return CONST0_RTX (mode); 1.1 root 3747: 3748: /* Change subtraction from zero into negation. */ 3749: if (op0 == CONST0_RTX (mode)) 3750: return gen_rtx (NEG, mode, op1); 3751: 1.1.1.5 root 3752: /* (-1 - a) is ~a. */ 3753: if (op0 == constm1_rtx) 3754: return gen_rtx (NOT, mode, op1); 3755: 1.1 root 3756: /* Subtracting 0 has no effect. */ 3757: if (op1 == CONST0_RTX (mode)) 3758: return op0; 3759: 1.1.1.7 root 3760: /* See if this is something like X * C - X or vice versa or 3761: if the multiplication is written as a shift. If so, we can 3762: distribute and make a new multiply, shift, or maybe just 3763: have X (if C is 2 in the example above). But don't make 3764: real multiply if we didn't have one before. */ 3765: 3766: if (! FLOAT_MODE_P (mode)) 3767: { 3768: HOST_WIDE_INT coeff0 = 1, coeff1 = 1; 3769: rtx lhs = op0, rhs = op1; 3770: int had_mult = 0; 3771: 3772: if (GET_CODE (lhs) == NEG) 3773: coeff0 = -1, lhs = XEXP (lhs, 0); 3774: else if (GET_CODE (lhs) == MULT 3775: && GET_CODE (XEXP (lhs, 1)) == CONST_INT) 3776: { 3777: coeff0 = INTVAL (XEXP (lhs, 1)), lhs = XEXP (lhs, 0); 3778: had_mult = 1; 3779: } 3780: else if (GET_CODE (lhs) == ASHIFT 3781: && GET_CODE (XEXP (lhs, 1)) == CONST_INT 3782: && INTVAL (XEXP (lhs, 1)) >= 0 3783: && INTVAL (XEXP (lhs, 1)) < HOST_BITS_PER_WIDE_INT) 3784: { 3785: coeff0 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (lhs, 1)); 3786: lhs = XEXP (lhs, 0); 3787: } 3788: 3789: if (GET_CODE (rhs) == NEG) 3790: coeff1 = - 1, rhs = XEXP (rhs, 0); 3791: else if (GET_CODE (rhs) == MULT 3792: && GET_CODE (XEXP (rhs, 1)) == CONST_INT) 3793: { 3794: coeff1 = INTVAL (XEXP (rhs, 1)), rhs = XEXP (rhs, 0); 3795: had_mult = 1; 3796: } 3797: else if (GET_CODE (rhs) == ASHIFT 3798: && GET_CODE (XEXP (rhs, 1)) == CONST_INT 3799: && INTVAL (XEXP (rhs, 1)) >= 0 3800: && INTVAL (XEXP (rhs, 1)) < HOST_BITS_PER_WIDE_INT) 3801: { 3802: coeff1 = ((HOST_WIDE_INT) 1) << INTVAL (XEXP (rhs, 1)); 3803: rhs = XEXP (rhs, 0); 3804: } 3805: 3806: if (rtx_equal_p (lhs, rhs)) 3807: { 3808: tem = cse_gen_binary (MULT, mode, lhs, 3809: GEN_INT (coeff0 - coeff1)); 3810: return (GET_CODE (tem) == MULT && ! had_mult) ? 0 : tem; 3811: } 3812: } 3813: 1.1 root 3814: /* (a - (-b)) -> (a + b). */ 3815: if (GET_CODE (op1) == NEG) 1.1.1.5 root 3816: return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0)); 1.1 root 3817: 1.1.1.5 root 3818: /* If one of the operands is a PLUS or a MINUS, see if we can 3819: simplify this by the associative law. 3820: Don't use the associative law for floating point. 1.1 root 3821: The inaccuracy makes it nonassociative, 3822: and subtle programs can break if operations are associated. */ 3823: 1.1.1.6 root 3824: if (INTEGRAL_MODE_P (mode) 1.1.1.5 root 3825: && (GET_CODE (op0) == PLUS || GET_CODE (op0) == MINUS 3826: || GET_CODE (op1) == PLUS || GET_CODE (op1) == MINUS) 3827: && (tem = simplify_plus_minus (code, mode, op0, op1)) != 0) 3828: return tem; 1.1 root 3829: 3830: /* Don't let a relocatable value get a negative coeff. */ 1.1.1.7 root 3831: if (GET_CODE (op1) == CONST_INT && GET_MODE (op0) != VOIDmode) 1.1 root 3832: return plus_constant (op0, - INTVAL (op1)); 1.1.1.8 ! root 3833: ! 3834: /* (x - (x & y)) -> (x & ~y) */ ! 3835: if (GET_CODE (op1) == AND) ! 3836: { ! 3837: if (rtx_equal_p (op0, XEXP (op1, 0))) ! 3838: return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 1))); ! 3839: if (rtx_equal_p (op0, XEXP (op1, 1))) ! 3840: return cse_gen_binary (AND, mode, op0, gen_rtx (NOT, mode, XEXP (op1, 0))); ! 3841: } 1.1 root 3842: break; 3843: 3844: case MULT: 3845: if (op1 == constm1_rtx) 3846: { 1.1.1.5 root 3847: tem = simplify_unary_operation (NEG, mode, op0, mode); 1.1 root 3848: 3849: return tem ? tem : gen_rtx (NEG, mode, op0); 3850: } 3851: 3852: /* In IEEE floating point, x*0 is not always 0. */ 3853: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 1.1.1.7 root 3854: || ! FLOAT_MODE_P (mode) || flag_fast_math) 1.1 root 3855: && op1 == CONST0_RTX (mode) 3856: && ! side_effects_p (op0)) 3857: return op1; 3858: 3859: /* In IEEE floating point, x*1 is not equivalent to x for nans. 3860: However, ANSI says we can drop signals, 3861: so we can do this anyway. */ 3862: if (op1 == CONST1_RTX (mode)) 3863: return op0; 3864: 1.1.1.7 root 3865: /* Convert multiply by constant power of two into shift unless 3866: we are still generating RTL. This test is a kludge. */ 1.1 root 3867: if (GET_CODE (op1) == CONST_INT 1.1.1.7 root 3868: && (val = exact_log2 (INTVAL (op1))) >= 0 3869: && ! rtx_equal_function_value_matters) 1.1.1.4 root 3870: return gen_rtx (ASHIFT, mode, op0, GEN_INT (val)); 1.1 root 3871: 3872: if (GET_CODE (op1) == CONST_DOUBLE 3873: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT) 3874: { 3875: REAL_VALUE_TYPE d; 1.1.1.5 root 3876: jmp_buf handler; 3877: int op1is2, op1ism1; 3878: 3879: if (setjmp (handler)) 3880: return 0; 3881: 3882: set_float_handler (handler); 1.1 root 3883: REAL_VALUE_FROM_CONST_DOUBLE (d, op1); 1.1.1.5 root 3884: op1is2 = REAL_VALUES_EQUAL (d, dconst2); 3885: op1ism1 = REAL_VALUES_EQUAL (d, dconstm1); 3886: set_float_handler (NULL_PTR); 1.1 root 3887: 3888: /* x*2 is x+x and x*(-1) is -x */ 1.1.1.5 root 3889: if (op1is2 && GET_MODE (op0) == mode) 1.1 root 3890: return gen_rtx (PLUS, mode, op0, copy_rtx (op0)); 3891: 1.1.1.5 root 3892: else if (op1ism1 && GET_MODE (op0) == mode) 1.1 root 3893: return gen_rtx (NEG, mode, op0); 3894: } 3895: break; 3896: 3897: case IOR: 3898: if (op1 == const0_rtx) 3899: return op0; 3900: if (GET_CODE (op1) == CONST_INT 3901: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) 3902: return op1; 3903: if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 3904: return op0; 3905: /* A | (~A) -> -1 */ 3906: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) 3907: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) 1.1.1.5 root 3908: && ! side_effects_p (op0) 3909: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3910: return constm1_rtx; 3911: break; 3912: 3913: case XOR: 3914: if (op1 == const0_rtx) 3915: return op0; 3916: if (GET_CODE (op1) == CONST_INT 3917: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) 3918: return gen_rtx (NOT, mode, op0); 1.1.1.5 root 3919: if (op0 == op1 && ! side_effects_p (op0) 3920: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3921: return const0_rtx; 3922: break; 3923: 3924: case AND: 3925: if (op1 == const0_rtx && ! side_effects_p (op0)) 3926: return const0_rtx; 3927: if (GET_CODE (op1) == CONST_INT 3928: && (INTVAL (op1) & GET_MODE_MASK (mode)) == GET_MODE_MASK (mode)) 3929: return op0; 1.1.1.5 root 3930: if (op0 == op1 && ! side_effects_p (op0) 3931: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3932: return op0; 3933: /* A & (~A) -> 0 */ 3934: if (((GET_CODE (op0) == NOT && rtx_equal_p (XEXP (op0, 0), op1)) 3935: || (GET_CODE (op1) == NOT && rtx_equal_p (XEXP (op1, 0), op0))) 1.1.1.5 root 3936: && ! side_effects_p (op0) 3937: && GET_MODE_CLASS (mode) != MODE_CC) 1.1 root 3938: return const0_rtx; 3939: break; 3940: 3941: case UDIV: 3942: /* Convert divide by power of two into shift (divide by 1 handled 3943: below). */ 3944: if (GET_CODE (op1) == CONST_INT 3945: && (arg1 = exact_log2 (INTVAL (op1))) > 0) 1.1.1.4 root 3946: return gen_rtx (LSHIFTRT, mode, op0, GEN_INT (arg1)); 1.1 root 3947: 3948: /* ... fall through ... */ 3949: 3950: case DIV: 3951: if (op1 == CONST1_RTX (mode)) 3952: return op0; 1.1.1.4 root 3953: 3954: /* In IEEE floating point, 0/x is not always 0. */ 3955: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 1.1.1.7 root 3956: || ! FLOAT_MODE_P (mode) || flag_fast_math) 1.1.1.4 root 3957: && op0 == CONST0_RTX (mode) 3958: && ! side_effects_p (op1)) 1.1 root 3959: return op0; 1.1.1.4 root 3960: 1.1 root 3961: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 1.1.1.7 root 3962: /* Change division by a constant into multiplication. Only do 3963: this with -ffast-math until an expert says it is safe in 3964: general. */ 1.1 root 3965: else if (GET_CODE (op1) == CONST_DOUBLE 3966: && GET_MODE_CLASS (GET_MODE (op1)) == MODE_FLOAT 1.1.1.7 root 3967: && op1 != CONST0_RTX (mode) 3968: && flag_fast_math) 1.1 root 3969: { 3970: REAL_VALUE_TYPE d; 3971: REAL_VALUE_FROM_CONST_DOUBLE (d, op1); 1.1.1.7 root 3972: 3973: if (! REAL_VALUES_EQUAL (d, dconst0)) 3974: { 1.1 root 3975: #if defined (REAL_ARITHMETIC) 1.1.1.7 root 3976: REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d); 3977: return gen_rtx (MULT, mode, op0, 3978: CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); 1.1 root 3979: #else 1.1.1.7 root 3980: return gen_rtx (MULT, mode, op0, 3981: CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode)); 1.1 root 3982: #endif 1.1.1.7 root 3983: } 3984: } 1.1 root 3985: #endif 3986: break; 3987: 3988: case UMOD: 3989: /* Handle modulus by power of two (mod with 1 handled below). */ 3990: if (GET_CODE (op1) == CONST_INT 3991: && exact_log2 (INTVAL (op1)) > 0) 1.1.1.4 root 3992: return gen_rtx (AND, mode, op0, GEN_INT (INTVAL (op1) - 1)); 1.1 root 3993: 3994: /* ... fall through ... */ 3995: 3996: case MOD: 3997: if ((op0 == const0_rtx || op1 == const1_rtx) 3998: && ! side_effects_p (op0) && ! side_effects_p (op1)) 3999: return const0_rtx; 4000: break; 4001: 4002: case ROTATERT: 4003: case ROTATE: 4004: /* Rotating ~0 always results in ~0. */ 1.1.1.4 root 4005: if (GET_CODE (op0) == CONST_INT && width <= HOST_BITS_PER_WIDE_INT 1.1 root 4006: && INTVAL (op0) == GET_MODE_MASK (mode) 4007: && ! side_effects_p (op1)) 4008: return op0; 4009: 4010: /* ... fall through ... */ 4011: 4012: case ASHIFT: 4013: case ASHIFTRT: 4014: case LSHIFTRT: 4015: if (op1 == const0_rtx) 4016: return op0; 4017: if (op0 == const0_rtx && ! side_effects_p (op1)) 4018: return op0; 4019: break; 4020: 4021: case SMIN: 1.1.1.4 root 4022: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT 4023: && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1) 1.1 root 4024: && ! side_effects_p (op0)) 4025: return op1; 4026: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 4027: return op0; 4028: break; 4029: 4030: case SMAX: 1.1.1.4 root 4031: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT 1.1.1.5 root 4032: && (INTVAL (op1) 4033: == (unsigned HOST_WIDE_INT) GET_MODE_MASK (mode) >> 1) 1.1 root 4034: && ! side_effects_p (op0)) 4035: return op1; 4036: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 4037: return op0; 4038: break; 4039: 4040: case UMIN: 4041: if (op1 == const0_rtx && ! side_effects_p (op0)) 4042: return op1; 4043: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 4044: return op0; 4045: break; 4046: 4047: case UMAX: 4048: if (op1 == constm1_rtx && ! side_effects_p (op0)) 4049: return op1; 4050: else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) 4051: return op0; 4052: break; 4053: 4054: default: 4055: abort (); 4056: } 4057: 4058: return 0; 4059: } 4060: 4061: /* Get the integer argument values in two forms: 4062: zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. */ 4063: 4064: arg0 = INTVAL (op0); 4065: arg1 = INTVAL (op1); 4066: 1.1.1.4 root 4067: if (width < HOST_BITS_PER_WIDE_INT) 1.1 root 4068: { 1.1.1.4 root 4069: arg0 &= ((HOST_WIDE_INT) 1 << width) - 1; 4070: arg1 &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 4071: 4072: arg0s = arg0; 1.1.1.4 root 4073: if (arg0s & ((HOST_WIDE_INT) 1 << (width - 1))) 4074: arg0s |= ((HOST_WIDE_INT) (-1) << width); 1.1 root 4075: 4076: arg1s = arg1; 1.1.1.4 root 4077: if (arg1s & ((HOST_WIDE_INT) 1 << (width - 1))) 4078: arg1s |= ((HOST_WIDE_INT) (-1) << width); 1.1 root 4079: } 4080: else 4081: { 4082: arg0s = arg0; 4083: arg1s = arg1; 4084: } 4085: 4086: /* Compute the value of the arithmetic. */ 4087: 4088: switch (code) 4089: { 4090: case PLUS: 1.1.1.2 root 4091: val = arg0s + arg1s; 1.1 root 4092: break; 4093: 4094: case MINUS: 1.1.1.2 root 4095: val = arg0s - arg1s; 1.1 root 4096: break; 4097: 4098: case MULT: 4099: val = arg0s * arg1s; 4100: break; 4101: 4102: case DIV: 4103: if (arg1s == 0) 4104: return 0; 4105: val = arg0s / arg1s; 4106: break; 4107: 4108: case MOD: 4109: if (arg1s == 0) 4110: return 0; 4111: val = arg0s % arg1s; 4112: break; 4113: 4114: case UDIV: 4115: if (arg1 == 0) 4116: return 0; 1.1.1.4 root 4117: val = (unsigned HOST_WIDE_INT) arg0 / arg1; 1.1 root 4118: break; 4119: 4120: case UMOD: 4121: if (arg1 == 0) 4122: return 0; 1.1.1.4 root 4123: val = (unsigned HOST_WIDE_INT) arg0 % arg1; 1.1 root 4124: break; 4125: 4126: case AND: 4127: val = arg0 & arg1; 4128: break; 4129: 4130: case IOR: 4131: val = arg0 | arg1; 4132: break; 4133: 4134: case XOR: 4135: val = arg0 ^ arg1; 4136: break; 4137: 4138: case LSHIFTRT: 4139: /* If shift count is undefined, don't fold it; let the machine do 4140: what it wants. But truncate it if the machine will do that. */ 4141: if (arg1 < 0) 4142: return 0; 4143: 4144: #ifdef SHIFT_COUNT_TRUNCATED 1.1.1.6 root 4145: if (SHIFT_COUNT_TRUNCATED) 1.1.1.7 root 4146: arg1 %= width; 1.1 root 4147: #endif 4148: 1.1.1.4 root 4149: val = ((unsigned HOST_WIDE_INT) arg0) >> arg1; 1.1 root 4150: break; 4151: 4152: case ASHIFT: 4153: if (arg1 < 0) 4154: return 0; 4155: 4156: #ifdef SHIFT_COUNT_TRUNCATED 1.1.1.6 root 4157: if (SHIFT_COUNT_TRUNCATED) 1.1.1.7 root 4158: arg1 %= width; 1.1 root 4159: #endif 4160: 1.1.1.4 root 4161: val = ((unsigned HOST_WIDE_INT) arg0) << arg1; 1.1 root 4162: break; 4163: 4164: case ASHIFTRT: 4165: if (arg1 < 0) 4166: return 0; 4167: 4168: #ifdef SHIFT_COUNT_TRUNCATED 1.1.1.6 root 4169: if (SHIFT_COUNT_TRUNCATED) 1.1.1.7 root 4170: arg1 %= width; 1.1 root 4171: #endif 4172: 4173: val = arg0s >> arg1; 1.1.1.4 root 4174: 4175: /* Bootstrap compiler may not have sign extended the right shift. 4176: Manually extend the sign to insure bootstrap cc matches gcc. */ 4177: if (arg0s < 0 && arg1 > 0) 4178: val |= ((HOST_WIDE_INT) -1) << (HOST_BITS_PER_WIDE_INT - arg1); 4179: 1.1 root 4180: break; 4181: 4182: case ROTATERT: 4183: if (arg1 < 0) 4184: return 0; 4185: 4186: arg1 %= width; 1.1.1.4 root 4187: val = ((((unsigned HOST_WIDE_INT) arg0) << (width - arg1)) 4188: | (((unsigned HOST_WIDE_INT) arg0) >> arg1)); 1.1 root 4189: break; 4190: 4191: case ROTATE: 4192: if (arg1 < 0) 4193: return 0; 4194: 4195: arg1 %= width; 1.1.1.4 root 4196: val = ((((unsigned HOST_WIDE_INT) arg0) << arg1) 4197: | (((unsigned HOST_WIDE_INT) arg0) >> (width - arg1))); 1.1 root 4198: break; 4199: 4200: case COMPARE: 4201: /* Do nothing here. */ 4202: return 0; 4203: 1.1.1.3 root 4204: case SMIN: 4205: val = arg0s <= arg1s ? arg0s : arg1s; 4206: break; 4207: 4208: case UMIN: 1.1.1.4 root 4209: val = ((unsigned HOST_WIDE_INT) arg0 4210: <= (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); 1.1.1.3 root 4211: break; 4212: 4213: case SMAX: 4214: val = arg0s > arg1s ? arg0s : arg1s; 4215: break; 4216: 4217: case UMAX: 1.1.1.4 root 4218: val = ((unsigned HOST_WIDE_INT) arg0 4219: > (unsigned HOST_WIDE_INT) arg1 ? arg0 : arg1); 1.1.1.3 root 4220: break; 4221: 1.1 root 4222: default: 4223: abort (); 4224: } 4225: 4226: /* Clear the bits that don't belong in our mode, unless they and our sign 4227: bit are all one. So we get either a reasonable negative value or a 4228: reasonable unsigned value for this mode. */ 1.1.1.4 root 4229: if (width < HOST_BITS_PER_WIDE_INT 4230: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 4231: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 4232: val &= ((HOST_WIDE_INT) 1 << width) - 1; 4233: 1.1.1.8 ! root 4234: /* If this would be an entire word for the target, but is not for ! 4235: the host, then sign-extend on the host so that the number will look ! 4236: the same way on the host that it would on the target. ! 4237: ! 4238: For example, when building a 64 bit alpha hosted 32 bit sparc ! 4239: targeted compiler, then we want the 32 bit unsigned value -1 to be ! 4240: represented as a 64 bit value -1, and not as 0x00000000ffffffff. ! 4241: The later confuses the sparc backend. */ ! 4242: ! 4243: if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT && BITS_PER_WORD == width ! 4244: && (val & ((HOST_WIDE_INT) 1 << (width - 1)))) ! 4245: val |= ((HOST_WIDE_INT) (-1) << width); ! 4246: 1.1.1.4 root 4247: return GEN_INT (val); 1.1 root 4248: } 4249: 1.1.1.5 root 4250: /* Simplify a PLUS or MINUS, at least one of whose operands may be another 4251: PLUS or MINUS. 4252: 4253: Rather than test for specific case, we do this by a brute-force method 4254: and do all possible simplifications until no more changes occur. Then 4255: we rebuild the operation. */ 4256: 4257: static rtx 4258: simplify_plus_minus (code, mode, op0, op1) 4259: enum rtx_code code; 4260: enum machine_mode mode; 4261: rtx op0, op1; 4262: { 4263: rtx ops[8]; 4264: int negs[8]; 4265: rtx result, tem; 4266: int n_ops = 2, input_ops = 2, input_consts = 0, n_consts = 0; 4267: int first = 1, negate = 0, changed; 4268: int i, j; 4269: 1.1.1.7 root 4270: bzero ((char *) ops, sizeof ops); 1.1.1.5 root 4271: 4272: /* Set up the two operands and then expand them until nothing has been 4273: changed. If we run out of room in our array, give up; this should 4274: almost never happen. */ 4275: 4276: ops[0] = op0, ops[1] = op1, negs[0] = 0, negs[1] = (code == MINUS); 4277: 4278: changed = 1; 4279: while (changed) 4280: { 4281: changed = 0; 4282: 4283: for (i = 0; i < n_ops; i++) 4284: switch (GET_CODE (ops[i])) 4285: { 4286: case PLUS: 4287: case MINUS: 4288: if (n_ops == 7) 4289: return 0; 4290: 4291: ops[n_ops] = XEXP (ops[i], 1); 4292: negs[n_ops++] = GET_CODE (ops[i]) == MINUS ? !negs[i] : negs[i]; 4293: ops[i] = XEXP (ops[i], 0); 4294: input_ops++; 4295: changed = 1; 4296: break; 4297: 4298: case NEG: 4299: ops[i] = XEXP (ops[i], 0); 4300: negs[i] = ! negs[i]; 4301: changed = 1; 4302: break; 4303: 4304: case CONST: 4305: ops[i] = XEXP (ops[i], 0); 4306: input_consts++; 4307: changed = 1; 4308: break; 4309: 4310: case NOT: 4311: /* ~a -> (-a - 1) */ 4312: if (n_ops != 7) 4313: { 4314: ops[n_ops] = constm1_rtx; 4315: negs[n_ops++] = negs[i]; 4316: ops[i] = XEXP (ops[i], 0); 4317: negs[i] = ! negs[i]; 4318: changed = 1; 4319: } 4320: break; 4321: 4322: case CONST_INT: 4323: if (negs[i]) 4324: ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0, changed = 1; 4325: break; 4326: } 4327: } 4328: 4329: /* If we only have two operands, we can't do anything. */ 4330: if (n_ops <= 2) 4331: return 0; 4332: 4333: /* Now simplify each pair of operands until nothing changes. The first 4334: time through just simplify constants against each other. */ 4335: 4336: changed = 1; 4337: while (changed) 4338: { 4339: changed = first; 4340: 4341: for (i = 0; i < n_ops - 1; i++) 4342: for (j = i + 1; j < n_ops; j++) 4343: if (ops[i] != 0 && ops[j] != 0 4344: && (! first || (CONSTANT_P (ops[i]) && CONSTANT_P (ops[j])))) 4345: { 4346: rtx lhs = ops[i], rhs = ops[j]; 4347: enum rtx_code ncode = PLUS; 4348: 4349: if (negs[i] && ! negs[j]) 4350: lhs = ops[j], rhs = ops[i], ncode = MINUS; 4351: else if (! negs[i] && negs[j]) 4352: ncode = MINUS; 4353: 4354: tem = simplify_binary_operation (ncode, mode, lhs, rhs); 4355: if (tem) 4356: { 4357: ops[i] = tem, ops[j] = 0; 4358: negs[i] = negs[i] && negs[j]; 4359: if (GET_CODE (tem) == NEG) 4360: ops[i] = XEXP (tem, 0), negs[i] = ! negs[i]; 4361: 4362: if (GET_CODE (ops[i]) == CONST_INT && negs[i]) 4363: ops[i] = GEN_INT (- INTVAL (ops[i])), negs[i] = 0; 4364: changed = 1; 4365: } 4366: } 4367: 4368: first = 0; 4369: } 4370: 4371: /* Pack all the operands to the lower-numbered entries and give up if 4372: we didn't reduce the number of operands we had. Make sure we 4373: count a CONST as two operands. If we have the same number of 4374: operands, but have made more CONSTs than we had, this is also 4375: an improvement, so accept it. */ 4376: 4377: for (i = 0, j = 0; j < n_ops; j++) 4378: if (ops[j] != 0) 4379: { 4380: ops[i] = ops[j], negs[i++] = negs[j]; 4381: if (GET_CODE (ops[j]) == CONST) 4382: n_consts++; 4383: } 4384: 4385: if (i + n_consts > input_ops 4386: || (i + n_consts == input_ops && n_consts <= input_consts)) 4387: return 0; 4388: 4389: n_ops = i; 4390: 4391: /* If we have a CONST_INT, put it last. */ 4392: for (i = 0; i < n_ops - 1; i++) 4393: if (GET_CODE (ops[i]) == CONST_INT) 4394: { 4395: tem = ops[n_ops - 1], ops[n_ops - 1] = ops[i] , ops[i] = tem; 4396: j = negs[n_ops - 1], negs[n_ops - 1] = negs[i], negs[i] = j; 4397: } 4398: 4399: /* Put a non-negated operand first. If there aren't any, make all 4400: operands positive and negate the whole thing later. */ 4401: for (i = 0; i < n_ops && negs[i]; i++) 4402: ; 4403: 4404: if (i == n_ops) 4405: { 4406: for (i = 0; i < n_ops; i++) 4407: negs[i] = 0; 4408: negate = 1; 4409: } 4410: else if (i != 0) 4411: { 4412: tem = ops[0], ops[0] = ops[i], ops[i] = tem; 4413: j = negs[0], negs[0] = negs[i], negs[i] = j; 4414: } 4415: 4416: /* Now make the result by performing the requested operations. */ 4417: result = ops[0]; 4418: for (i = 1; i < n_ops; i++) 4419: result = cse_gen_binary (negs[i] ? MINUS : PLUS, mode, result, ops[i]); 4420: 4421: return negate ? gen_rtx (NEG, mode, result) : result; 4422: } 4423: 4424: /* Make a binary operation by properly ordering the operands and 4425: seeing if the expression folds. */ 4426: 4427: static rtx 4428: cse_gen_binary (code, mode, op0, op1) 4429: enum rtx_code code; 4430: enum machine_mode mode; 4431: rtx op0, op1; 4432: { 4433: rtx tem; 4434: 4435: /* Put complex operands first and constants second if commutative. */ 4436: if (GET_RTX_CLASS (code) == 'c' 4437: && ((CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT) 4438: || (GET_RTX_CLASS (GET_CODE (op0)) == 'o' 4439: && GET_RTX_CLASS (GET_CODE (op1)) != 'o') 4440: || (GET_CODE (op0) == SUBREG 4441: && GET_RTX_CLASS (GET_CODE (SUBREG_REG (op0))) == 'o' 4442: && GET_RTX_CLASS (GET_CODE (op1)) != 'o'))) 4443: tem = op0, op0 = op1, op1 = tem; 4444: 4445: /* If this simplifies, do it. */ 4446: tem = simplify_binary_operation (code, mode, op0, op1); 4447: 4448: if (tem) 4449: return tem; 4450: 4451: /* Handle addition and subtraction of CONST_INT specially. Otherwise, 4452: just form the operation. */ 4453: 4454: if (code == PLUS && GET_CODE (op1) == CONST_INT 4455: && GET_MODE (op0) != VOIDmode) 4456: return plus_constant (op0, INTVAL (op1)); 4457: else if (code == MINUS && GET_CODE (op1) == CONST_INT 4458: && GET_MODE (op0) != VOIDmode) 4459: return plus_constant (op0, - INTVAL (op1)); 4460: else 4461: return gen_rtx (code, mode, op0, op1); 4462: } 4463: 1.1 root 4464: /* Like simplify_binary_operation except used for relational operators. 1.1.1.7 root 4465: MODE is the mode of the operands, not that of the result. If MODE 4466: is VOIDmode, both operands must also be VOIDmode and we compare the 4467: operands in "infinite precision". 4468: 4469: If no simplification is possible, this function returns zero. Otherwise, 4470: it returns either const_true_rtx or const0_rtx. */ 1.1 root 4471: 4472: rtx 4473: simplify_relational_operation (code, mode, op0, op1) 4474: enum rtx_code code; 4475: enum machine_mode mode; 4476: rtx op0, op1; 4477: { 1.1.1.7 root 4478: int equal, op0lt, op0ltu, op1lt, op1ltu; 4479: rtx tem; 1.1 root 4480: 4481: /* If op0 is a compare, extract the comparison arguments from it. */ 4482: if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) 4483: op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 4484: 1.1.1.7 root 4485: /* We can't simplify MODE_CC values since we don't know what the 4486: actual comparison is. */ 4487: if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_CC 4488: #ifdef HAVE_cc0 4489: || op0 == cc0_rtx 4490: #endif 4491: ) 1.1.1.5 root 4492: return 0; 4493: 1.1.1.7 root 4494: /* For integer comparisons of A and B maybe we can simplify A - B and can 4495: then simplify a comparison of that with zero. If A and B are both either 4496: a register or a CONST_INT, this can't help; testing for these cases will 4497: prevent infinite recursion here and speed things up. 4498: 1.1.1.8 ! root 4499: If CODE is an unsigned comparison, then we can never do this optimization, ! 4500: because it gives an incorrect result if the subtraction wraps around zero. ! 4501: ANSI C defines unsigned operations such that they never overflow, and ! 4502: thus such cases can not be ignored. */ 1.1.1.7 root 4503: 4504: if (INTEGRAL_MODE_P (mode) && op1 != const0_rtx 4505: && ! ((GET_CODE (op0) == REG || GET_CODE (op0) == CONST_INT) 4506: && (GET_CODE (op1) == REG || GET_CODE (op1) == CONST_INT)) 4507: && 0 != (tem = simplify_binary_operation (MINUS, mode, op0, op1)) 1.1.1.8 ! root 4508: && code != GTU && code != GEU && code != LTU && code != LEU) 1.1.1.7 root 4509: return simplify_relational_operation (signed_condition (code), 4510: mode, tem, const0_rtx); 4511: 4512: /* For non-IEEE floating-point, if the two operands are equal, we know the 4513: result. */ 4514: if (rtx_equal_p (op0, op1) 4515: && (TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 4516: || ! FLOAT_MODE_P (GET_MODE (op0)) || flag_fast_math)) 4517: equal = 1, op0lt = 0, op0ltu = 0, op1lt = 0, op1ltu = 0; 1.1.1.5 root 4518: 1.1.1.7 root 4519: /* If the operands are floating-point constants, see if we can fold 4520: the result. */ 4521: #if ! defined (REAL_IS_NOT_DOUBLE) || defined (REAL_ARITHMETIC) 4522: else if (GET_CODE (op0) == CONST_DOUBLE && GET_CODE (op1) == CONST_DOUBLE 4523: && GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) 1.1 root 4524: { 1.1.1.7 root 4525: REAL_VALUE_TYPE d0, d1; 4526: jmp_buf handler; 4527: 4528: if (setjmp (handler)) 4529: return 0; 1.1.1.5 root 4530: 1.1.1.7 root 4531: set_float_handler (handler); 4532: REAL_VALUE_FROM_CONST_DOUBLE (d0, op0); 4533: REAL_VALUE_FROM_CONST_DOUBLE (d1, op1); 4534: equal = REAL_VALUES_EQUAL (d0, d1); 4535: op0lt = op0ltu = REAL_VALUES_LESS (d0, d1); 4536: op1lt = op1ltu = REAL_VALUES_LESS (d1, d0); 4537: set_float_handler (NULL_PTR); 4538: } 4539: #endif /* not REAL_IS_NOT_DOUBLE, or REAL_ARITHMETIC */ 1.1 root 4540: 1.1.1.7 root 4541: /* Otherwise, see if the operands are both integers. */ 4542: else if ((GET_MODE_CLASS (mode) == MODE_INT || mode == VOIDmode) 4543: && (GET_CODE (op0) == CONST_DOUBLE || GET_CODE (op0) == CONST_INT) 4544: && (GET_CODE (op1) == CONST_DOUBLE || GET_CODE (op1) == CONST_INT)) 4545: { 4546: int width = GET_MODE_BITSIZE (mode); 4547: HOST_WIDE_INT l0s, h0s, l1s, h1s; 4548: unsigned HOST_WIDE_INT l0u, h0u, l1u, h1u; 1.1 root 4549: 1.1.1.7 root 4550: /* Get the two words comprising each integer constant. */ 4551: if (GET_CODE (op0) == CONST_DOUBLE) 4552: { 4553: l0u = l0s = CONST_DOUBLE_LOW (op0); 4554: h0u = h0s = CONST_DOUBLE_HIGH (op0); 4555: } 4556: else 4557: { 4558: l0u = l0s = INTVAL (op0); 4559: h0u = 0, h0s = l0s < 0 ? -1 : 0; 4560: } 4561: 4562: if (GET_CODE (op1) == CONST_DOUBLE) 4563: { 4564: l1u = l1s = CONST_DOUBLE_LOW (op1); 4565: h1u = h1s = CONST_DOUBLE_HIGH (op1); 4566: } 4567: else 4568: { 4569: l1u = l1s = INTVAL (op1); 4570: h1u = 0, h1s = l1s < 0 ? -1 : 0; 1.1 root 4571: } 1.1.1.5 root 4572: 1.1.1.7 root 4573: /* If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT, 4574: we have to sign or zero-extend the values. */ 4575: if (width != 0 && width <= HOST_BITS_PER_WIDE_INT) 4576: h0u = h1u = 0, h0s = l0s < 0 ? -1 : 0, h1s = l1s < 0 ? -1 : 0; 1.1.1.5 root 4577: 1.1.1.7 root 4578: if (width != 0 && width < HOST_BITS_PER_WIDE_INT) 4579: { 4580: l0u &= ((HOST_WIDE_INT) 1 << width) - 1; 4581: l1u &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1.1.5 root 4582: 1.1.1.7 root 4583: if (l0s & ((HOST_WIDE_INT) 1 << (width - 1))) 4584: l0s |= ((HOST_WIDE_INT) (-1) << width); 1.1.1.5 root 4585: 1.1.1.7 root 4586: if (l1s & ((HOST_WIDE_INT) 1 << (width - 1))) 4587: l1s |= ((HOST_WIDE_INT) (-1) << width); 1.1.1.5 root 4588: } 4589: 1.1.1.7 root 4590: equal = (h0u == h1u && l0u == l1u); 4591: op0lt = (h0s < h1s || (h0s == h1s && l0s < l1s)); 4592: op1lt = (h1s < h0s || (h1s == h0s && l1s < l0s)); 4593: op0ltu = (h0u < h1u || (h0u == h1u && l0u < l1u)); 4594: op1ltu = (h1u < h0u || (h1u == h0u && l1u < l0u)); 4595: } 4596: 4597: /* Otherwise, there are some code-specific tests we can make. */ 4598: else 4599: { 1.1 root 4600: switch (code) 4601: { 4602: case EQ: 1.1.1.7 root 4603: /* References to the frame plus a constant or labels cannot 4604: be zero, but a SYMBOL_REF can due to #pragma weak. */ 4605: if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx) 4606: || GET_CODE (op0) == LABEL_REF) 4607: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4608: /* On some machines, the ap reg can be 0 sometimes. */ 4609: && op0 != arg_pointer_rtx 4610: #endif 4611: ) 4612: return const0_rtx; 4613: break; 1.1 root 4614: 4615: case NE: 1.1.1.7 root 4616: if (((NONZERO_BASE_PLUS_P (op0) && op1 == const0_rtx) 4617: || GET_CODE (op0) == LABEL_REF) 4618: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4619: && op0 != arg_pointer_rtx 1.1 root 4620: #endif 1.1.1.7 root 4621: ) 1.1 root 4622: return const_true_rtx; 4623: break; 4624: 4625: case GEU: 1.1.1.7 root 4626: /* Unsigned values are never negative. */ 4627: if (op1 == const0_rtx) 1.1 root 4628: return const_true_rtx; 4629: break; 4630: 4631: case LTU: 1.1.1.7 root 4632: if (op1 == const0_rtx) 1.1 root 4633: return const0_rtx; 4634: break; 4635: 4636: case LEU: 4637: /* Unsigned values are never greater than the largest 4638: unsigned value. */ 4639: if (GET_CODE (op1) == CONST_INT 4640: && INTVAL (op1) == GET_MODE_MASK (mode) 1.1.1.7 root 4641: && INTEGRAL_MODE_P (mode)) 4642: return const_true_rtx; 1.1 root 4643: break; 4644: 4645: case GTU: 4646: if (GET_CODE (op1) == CONST_INT 4647: && INTVAL (op1) == GET_MODE_MASK (mode) 1.1.1.6 root 4648: && INTEGRAL_MODE_P (mode)) 1.1 root 4649: return const0_rtx; 4650: break; 4651: } 4652: 4653: return 0; 4654: } 4655: 1.1.1.7 root 4656: /* If we reach here, EQUAL, OP0LT, OP0LTU, OP1LT, and OP1LTU are set 4657: as appropriate. */ 1.1 root 4658: switch (code) 4659: { 4660: case EQ: 1.1.1.7 root 4661: return equal ? const_true_rtx : const0_rtx; 4662: case NE: 4663: return ! equal ? const_true_rtx : const0_rtx; 1.1 root 4664: case LT: 1.1.1.7 root 4665: return op0lt ? const_true_rtx : const0_rtx; 1.1 root 4666: case GT: 1.1.1.7 root 4667: return op1lt ? const_true_rtx : const0_rtx; 1.1 root 4668: case LTU: 1.1.1.7 root 4669: return op0ltu ? const_true_rtx : const0_rtx; 1.1 root 4670: case GTU: 1.1.1.7 root 4671: return op1ltu ? const_true_rtx : const0_rtx; 4672: case LE: 4673: return equal || op0lt ? const_true_rtx : const0_rtx; 4674: case GE: 4675: return equal || op1lt ? const_true_rtx : const0_rtx; 4676: case LEU: 4677: return equal || op0ltu ? const_true_rtx : const0_rtx; 4678: case GEU: 4679: return equal || op1ltu ? const_true_rtx : const0_rtx; 1.1 root 4680: } 4681: 1.1.1.7 root 4682: abort (); 1.1 root 4683: } 4684: 4685: /* Simplify CODE, an operation with result mode MODE and three operands, 4686: OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became 4687: a constant. Return 0 if no simplifications is possible. */ 4688: 4689: rtx 4690: simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2) 4691: enum rtx_code code; 4692: enum machine_mode mode, op0_mode; 4693: rtx op0, op1, op2; 4694: { 4695: int width = GET_MODE_BITSIZE (mode); 4696: 4697: /* VOIDmode means "infinite" precision. */ 4698: if (width == 0) 1.1.1.4 root 4699: width = HOST_BITS_PER_WIDE_INT; 1.1 root 4700: 4701: switch (code) 4702: { 4703: case SIGN_EXTRACT: 4704: case ZERO_EXTRACT: 4705: if (GET_CODE (op0) == CONST_INT 4706: && GET_CODE (op1) == CONST_INT 4707: && GET_CODE (op2) == CONST_INT 4708: && INTVAL (op1) + INTVAL (op2) <= GET_MODE_BITSIZE (op0_mode) 1.1.1.4 root 4709: && width <= HOST_BITS_PER_WIDE_INT) 1.1 root 4710: { 4711: /* Extracting a bit-field from a constant */ 1.1.1.4 root 4712: HOST_WIDE_INT val = INTVAL (op0); 1.1 root 4713: 1.1.1.8 ! root 4714: if (BITS_BIG_ENDIAN) ! 4715: val >>= (GET_MODE_BITSIZE (op0_mode) ! 4716: - INTVAL (op2) - INTVAL (op1)); ! 4717: else ! 4718: val >>= INTVAL (op2); ! 4719: 1.1.1.4 root 4720: if (HOST_BITS_PER_WIDE_INT != INTVAL (op1)) 1.1 root 4721: { 4722: /* First zero-extend. */ 1.1.1.4 root 4723: val &= ((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1; 1.1 root 4724: /* If desired, propagate sign bit. */ 1.1.1.4 root 4725: if (code == SIGN_EXTRACT 4726: && (val & ((HOST_WIDE_INT) 1 << (INTVAL (op1) - 1)))) 4727: val |= ~ (((HOST_WIDE_INT) 1 << INTVAL (op1)) - 1); 1.1 root 4728: } 4729: 4730: /* Clear the bits that don't belong in our mode, 4731: unless they and our sign bit are all one. 4732: So we get either a reasonable negative value or a reasonable 4733: unsigned value for this mode. */ 1.1.1.4 root 4734: if (width < HOST_BITS_PER_WIDE_INT 4735: && ((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 4736: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 4737: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1 root 4738: 1.1.1.4 root 4739: return GEN_INT (val); 1.1 root 4740: } 4741: break; 4742: 4743: case IF_THEN_ELSE: 4744: if (GET_CODE (op0) == CONST_INT) 4745: return op0 != const0_rtx ? op1 : op2; 4746: break; 4747: 4748: default: 4749: abort (); 4750: } 4751: 4752: return 0; 4753: } 4754: 4755: /* If X is a nontrivial arithmetic operation on an argument 4756: for which a constant value can be determined, return 4757: the result of operating on that value, as a constant. 4758: Otherwise, return X, possibly with one or more operands 4759: modified by recursive calls to this function. 4760: 4761: If X is a register whose contents are known, we do NOT 1.1.1.5 root 4762: return those contents here. equiv_constant is called to 4763: perform that task. 1.1 root 4764: 4765: INSN is the insn that we may be modifying. If it is 0, make a copy 4766: of X before modifying it. */ 4767: 4768: static rtx 4769: fold_rtx (x, insn) 4770: rtx x; 4771: rtx insn; 4772: { 4773: register enum rtx_code code; 4774: register enum machine_mode mode; 4775: register char *fmt; 1.1.1.4 root 4776: register int i; 1.1 root 4777: rtx new = 0; 4778: int copied = 0; 4779: int must_swap = 0; 4780: 4781: /* Folded equivalents of first two operands of X. */ 4782: rtx folded_arg0; 4783: rtx folded_arg1; 4784: 4785: /* Constant equivalents of first three operands of X; 4786: 0 when no such equivalent is known. */ 4787: rtx const_arg0; 4788: rtx const_arg1; 4789: rtx const_arg2; 4790: 4791: /* The mode of the first operand of X. We need this for sign and zero 4792: extends. */ 4793: enum machine_mode mode_arg0; 4794: 4795: if (x == 0) 4796: return x; 4797: 4798: mode = GET_MODE (x); 4799: code = GET_CODE (x); 4800: switch (code) 4801: { 4802: case CONST: 4803: case CONST_INT: 4804: case CONST_DOUBLE: 4805: case SYMBOL_REF: 4806: case LABEL_REF: 4807: case REG: 4808: /* No use simplifying an EXPR_LIST 4809: since they are used only for lists of args 4810: in a function call's REG_EQUAL note. */ 4811: case EXPR_LIST: 4812: return x; 4813: 4814: #ifdef HAVE_cc0 4815: case CC0: 4816: return prev_insn_cc0; 4817: #endif 4818: 4819: case PC: 4820: /* If the next insn is a CODE_LABEL followed by a jump table, 4821: PC's value is a LABEL_REF pointing to that label. That 4822: lets us fold switch statements on the Vax. */ 4823: if (insn && GET_CODE (insn) == JUMP_INSN) 4824: { 4825: rtx next = next_nonnote_insn (insn); 4826: 4827: if (next && GET_CODE (next) == CODE_LABEL 4828: && NEXT_INSN (next) != 0 4829: && GET_CODE (NEXT_INSN (next)) == JUMP_INSN 4830: && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC 4831: || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC)) 4832: return gen_rtx (LABEL_REF, Pmode, next); 4833: } 4834: break; 4835: 4836: case SUBREG: 1.1.1.4 root 4837: /* See if we previously assigned a constant value to this SUBREG. */ 4838: if ((new = lookup_as_function (x, CONST_INT)) != 0 4839: || (new = lookup_as_function (x, CONST_DOUBLE)) != 0) 1.1 root 4840: return new; 4841: 1.1.1.4 root 4842: /* If this is a paradoxical SUBREG, we have no idea what value the 4843: extra bits would have. However, if the operand is equivalent 4844: to a SUBREG whose operand is the same as our mode, and all the 4845: modes are within a word, we can just use the inner operand 1.1.1.6 root 4846: because these SUBREGs just say how to treat the register. 4847: 4848: Similarly if we find an integer constant. */ 1.1.1.4 root 4849: 1.1.1.3 root 4850: if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 1.1.1.4 root 4851: { 4852: enum machine_mode imode = GET_MODE (SUBREG_REG (x)); 4853: struct table_elt *elt; 4854: 4855: if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 4856: && GET_MODE_SIZE (imode) <= UNITS_PER_WORD 4857: && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode), 4858: imode)) != 0) 1.1.1.6 root 4859: for (elt = elt->first_same_value; 4860: elt; elt = elt->next_same_value) 4861: { 4862: if (CONSTANT_P (elt->exp) 4863: && GET_MODE (elt->exp) == VOIDmode) 4864: return elt->exp; 4865: 1.1.1.4 root 4866: if (GET_CODE (elt->exp) == SUBREG 4867: && GET_MODE (SUBREG_REG (elt->exp)) == mode 4868: && exp_equiv_p (elt->exp, elt->exp, 1, 0)) 4869: return copy_rtx (SUBREG_REG (elt->exp)); 4870: } 4871: 4872: return x; 4873: } 1.1.1.3 root 4874: 1.1 root 4875: /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG. 4876: We might be able to if the SUBREG is extracting a single word in an 4877: integral mode or extracting the low part. */ 4878: 4879: folded_arg0 = fold_rtx (SUBREG_REG (x), insn); 4880: const_arg0 = equiv_constant (folded_arg0); 4881: if (const_arg0) 4882: folded_arg0 = const_arg0; 4883: 4884: if (folded_arg0 != SUBREG_REG (x)) 4885: { 4886: new = 0; 4887: 4888: if (GET_MODE_CLASS (mode) == MODE_INT 4889: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 4890: && GET_MODE (SUBREG_REG (x)) != VOIDmode) 4891: new = operand_subword (folded_arg0, SUBREG_WORD (x), 0, 4892: GET_MODE (SUBREG_REG (x))); 4893: if (new == 0 && subreg_lowpart_p (x)) 4894: new = gen_lowpart_if_possible (mode, folded_arg0); 4895: if (new) 4896: return new; 4897: } 1.1.1.3 root 4898: 4899: /* If this is a narrowing SUBREG and our operand is a REG, see if 1.1.1.4 root 4900: we can find an equivalence for REG that is an arithmetic operation 1.1.1.3 root 4901: in a wider mode where both operands are paradoxical SUBREGs 4902: from objects of our result mode. In that case, we couldn't report 4903: an equivalent value for that operation, since we don't know what the 4904: extra bits will be. But we can find an equivalence for this SUBREG 4905: by folding that operation is the narrow mode. This allows us to 4906: fold arithmetic in narrow modes when the machine only supports 1.1.1.4 root 4907: word-sized arithmetic. 4908: 4909: Also look for a case where we have a SUBREG whose operand is the 4910: same as our result. If both modes are smaller than a word, we 4911: are simply interpreting a register in different modes and we 4912: can use the inner value. */ 1.1.1.3 root 4913: 4914: if (GET_CODE (folded_arg0) == REG 1.1.1.4 root 4915: && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0)) 4916: && subreg_lowpart_p (x)) 1.1.1.3 root 4917: { 4918: struct table_elt *elt; 4919: 4920: /* We can use HASH here since we know that canon_hash won't be 4921: called. */ 4922: elt = lookup (folded_arg0, 4923: HASH (folded_arg0, GET_MODE (folded_arg0)), 4924: GET_MODE (folded_arg0)); 4925: 4926: if (elt) 4927: elt = elt->first_same_value; 4928: 4929: for (; elt; elt = elt->next_same_value) 4930: { 1.1.1.4 root 4931: enum rtx_code eltcode = GET_CODE (elt->exp); 4932: 1.1.1.3 root 4933: /* Just check for unary and binary operations. */ 4934: if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1' 4935: && GET_CODE (elt->exp) != SIGN_EXTEND 4936: && GET_CODE (elt->exp) != ZERO_EXTEND 4937: && GET_CODE (XEXP (elt->exp, 0)) == SUBREG 4938: && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode) 4939: { 4940: rtx op0 = SUBREG_REG (XEXP (elt->exp, 0)); 4941: 4942: if (GET_CODE (op0) != REG && ! CONSTANT_P (op0)) 1.1.1.4 root 4943: op0 = fold_rtx (op0, NULL_RTX); 1.1.1.3 root 4944: 4945: op0 = equiv_constant (op0); 4946: if (op0) 4947: new = simplify_unary_operation (GET_CODE (elt->exp), mode, 4948: op0, mode); 4949: } 4950: else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2' 4951: || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c') 1.1.1.4 root 4952: && eltcode != DIV && eltcode != MOD 4953: && eltcode != UDIV && eltcode != UMOD 4954: && eltcode != ASHIFTRT && eltcode != LSHIFTRT 4955: && eltcode != ROTATE && eltcode != ROTATERT 1.1.1.3 root 4956: && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG 4957: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) 4958: == mode)) 4959: || CONSTANT_P (XEXP (elt->exp, 0))) 4960: && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG 4961: && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1))) 4962: == mode)) 4963: || CONSTANT_P (XEXP (elt->exp, 1)))) 4964: { 4965: rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0)); 4966: rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1)); 4967: 4968: if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0)) 1.1.1.4 root 4969: op0 = fold_rtx (op0, NULL_RTX); 1.1.1.3 root 4970: 4971: if (op0) 4972: op0 = equiv_constant (op0); 4973: 4974: if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1)) 1.1.1.4 root 4975: op1 = fold_rtx (op1, NULL_RTX); 1.1.1.3 root 4976: 4977: if (op1) 4978: op1 = equiv_constant (op1); 4979: 1.1.1.6 root 4980: /* If we are looking for the low SImode part of 4981: (ashift:DI c (const_int 32)), it doesn't work 4982: to compute that in SImode, because a 32-bit shift 4983: in SImode is unpredictable. We know the value is 0. */ 4984: if (op0 && op1 1.1.1.7 root 4985: && GET_CODE (elt->exp) == ASHIFT 1.1.1.6 root 4986: && GET_CODE (op1) == CONST_INT 4987: && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) 4988: { 4989: if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp))) 4990: 4991: /* If the count fits in the inner mode's width, 4992: but exceeds the outer mode's width, 4993: the value will get truncated to 0 4994: by the subreg. */ 4995: new = const0_rtx; 4996: else 4997: /* If the count exceeds even the inner mode's width, 4998: don't fold this expression. */ 4999: new = 0; 5000: } 5001: else if (op0 && op1) 1.1.1.3 root 5002: new = simplify_binary_operation (GET_CODE (elt->exp), mode, 5003: op0, op1); 5004: } 5005: 1.1.1.4 root 5006: else if (GET_CODE (elt->exp) == SUBREG 5007: && GET_MODE (SUBREG_REG (elt->exp)) == mode 5008: && (GET_MODE_SIZE (GET_MODE (folded_arg0)) 5009: <= UNITS_PER_WORD) 5010: && exp_equiv_p (elt->exp, elt->exp, 1, 0)) 5011: new = copy_rtx (SUBREG_REG (elt->exp)); 5012: 1.1.1.3 root 5013: if (new) 5014: return new; 5015: } 5016: } 5017: 1.1 root 5018: return x; 5019: 5020: case NOT: 5021: case NEG: 5022: /* If we have (NOT Y), see if Y is known to be (NOT Z). 5023: If so, (NOT Y) simplifies to Z. Similarly for NEG. */ 5024: new = lookup_as_function (XEXP (x, 0), code); 5025: if (new) 5026: return fold_rtx (copy_rtx (XEXP (new, 0)), insn); 5027: break; 1.1.1.4 root 5028: 1.1 root 5029: case MEM: 5030: /* If we are not actually processing an insn, don't try to find the 5031: best address. Not only don't we care, but we could modify the 5032: MEM in an invalid way since we have no insn to validate against. */ 5033: if (insn != 0) 5034: find_best_addr (insn, &XEXP (x, 0)); 5035: 5036: { 5037: /* Even if we don't fold in the insn itself, 5038: we can safely do so here, in hopes of getting a constant. */ 1.1.1.4 root 5039: rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX); 1.1 root 5040: rtx base = 0; 1.1.1.4 root 5041: HOST_WIDE_INT offset = 0; 1.1 root 5042: 5043: if (GET_CODE (addr) == REG 5044: && REGNO_QTY_VALID_P (REGNO (addr)) 5045: && GET_MODE (addr) == qty_mode[reg_qty[REGNO (addr)]] 5046: && qty_const[reg_qty[REGNO (addr)]] != 0) 5047: addr = qty_const[reg_qty[REGNO (addr)]]; 5048: 5049: /* If address is constant, split it into a base and integer offset. */ 5050: if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF) 5051: base = addr; 5052: else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS 5053: && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT) 5054: { 5055: base = XEXP (XEXP (addr, 0), 0); 5056: offset = INTVAL (XEXP (XEXP (addr, 0), 1)); 5057: } 5058: else if (GET_CODE (addr) == LO_SUM 5059: && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF) 5060: base = XEXP (addr, 1); 5061: 5062: /* If this is a constant pool reference, we can fold it into its 5063: constant to allow better value tracking. */ 5064: if (base && GET_CODE (base) == SYMBOL_REF 5065: && CONSTANT_POOL_ADDRESS_P (base)) 5066: { 5067: rtx constant = get_pool_constant (base); 5068: enum machine_mode const_mode = get_pool_mode (base); 5069: rtx new; 5070: 5071: if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT) 5072: constant_pool_entries_cost = COST (constant); 5073: 5074: /* If we are loading the full constant, we have an equivalence. */ 5075: if (offset == 0 && mode == const_mode) 5076: return constant; 5077: 1.1.1.8 ! root 5078: /* If this actually isn't a constant (weird!), we can't do 1.1 root 5079: anything. Otherwise, handle the two most common cases: 5080: extracting a word from a multi-word constant, and extracting 5081: the low-order bits. Other cases don't seem common enough to 5082: worry about. */ 5083: if (! CONSTANT_P (constant)) 5084: return x; 5085: 5086: if (GET_MODE_CLASS (mode) == MODE_INT 5087: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 5088: && offset % UNITS_PER_WORD == 0 5089: && (new = operand_subword (constant, 5090: offset / UNITS_PER_WORD, 5091: 0, const_mode)) != 0) 5092: return new; 5093: 5094: if (((BYTES_BIG_ENDIAN 5095: && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1) 5096: || (! BYTES_BIG_ENDIAN && offset == 0)) 5097: && (new = gen_lowpart_if_possible (mode, constant)) != 0) 5098: return new; 5099: } 5100: 5101: /* If this is a reference to a label at a known position in a jump 5102: table, we also know its value. */ 5103: if (base && GET_CODE (base) == LABEL_REF) 5104: { 5105: rtx label = XEXP (base, 0); 5106: rtx table_insn = NEXT_INSN (label); 5107: 5108: if (table_insn && GET_CODE (table_insn) == JUMP_INSN 5109: && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) 5110: { 5111: rtx table = PATTERN (table_insn); 5112: 5113: if (offset >= 0 5114: && (offset / GET_MODE_SIZE (GET_MODE (table)) 5115: < XVECLEN (table, 0))) 5116: return XVECEXP (table, 0, 5117: offset / GET_MODE_SIZE (GET_MODE (table))); 5118: } 5119: if (table_insn && GET_CODE (table_insn) == JUMP_INSN 5120: && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC) 5121: { 5122: rtx table = PATTERN (table_insn); 5123: 5124: if (offset >= 0 5125: && (offset / GET_MODE_SIZE (GET_MODE (table)) 5126: < XVECLEN (table, 1))) 5127: { 5128: offset /= GET_MODE_SIZE (GET_MODE (table)); 5129: new = gen_rtx (MINUS, Pmode, XVECEXP (table, 1, offset), 5130: XEXP (table, 0)); 5131: 5132: if (GET_MODE (table) != Pmode) 5133: new = gen_rtx (TRUNCATE, GET_MODE (table), new); 5134: 1.1.1.7 root 5135: /* Indicate this is a constant. This isn't a 5136: valid form of CONST, but it will only be used 5137: to fold the next insns and then discarded, so 5138: it should be safe. */ 5139: return gen_rtx (CONST, GET_MODE (new), new); 1.1 root 5140: } 5141: } 5142: } 5143: 5144: return x; 5145: } 5146: } 5147: 5148: const_arg0 = 0; 5149: const_arg1 = 0; 5150: const_arg2 = 0; 5151: mode_arg0 = VOIDmode; 5152: 5153: /* Try folding our operands. 5154: Then see which ones have constant values known. */ 5155: 5156: fmt = GET_RTX_FORMAT (code); 5157: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5158: if (fmt[i] == 'e') 5159: { 5160: rtx arg = XEXP (x, i); 5161: rtx folded_arg = arg, const_arg = 0; 5162: enum machine_mode mode_arg = GET_MODE (arg); 5163: rtx cheap_arg, expensive_arg; 5164: rtx replacements[2]; 5165: int j; 5166: 5167: /* Most arguments are cheap, so handle them specially. */ 5168: switch (GET_CODE (arg)) 5169: { 5170: case REG: 5171: /* This is the same as calling equiv_constant; it is duplicated 5172: here for speed. */ 5173: if (REGNO_QTY_VALID_P (REGNO (arg)) 5174: && qty_const[reg_qty[REGNO (arg)]] != 0 5175: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != REG 5176: && GET_CODE (qty_const[reg_qty[REGNO (arg)]]) != PLUS) 5177: const_arg 5178: = gen_lowpart_if_possible (GET_MODE (arg), 5179: qty_const[reg_qty[REGNO (arg)]]); 5180: break; 5181: 5182: case CONST: 5183: case CONST_INT: 5184: case SYMBOL_REF: 5185: case LABEL_REF: 5186: case CONST_DOUBLE: 5187: const_arg = arg; 5188: break; 5189: 5190: #ifdef HAVE_cc0 5191: case CC0: 5192: folded_arg = prev_insn_cc0; 5193: mode_arg = prev_insn_cc0_mode; 5194: const_arg = equiv_constant (folded_arg); 5195: break; 5196: #endif 5197: 5198: default: 5199: folded_arg = fold_rtx (arg, insn); 5200: const_arg = equiv_constant (folded_arg); 5201: } 5202: 5203: /* For the first three operands, see if the operand 5204: is constant or equivalent to a constant. */ 5205: switch (i) 5206: { 5207: case 0: 5208: folded_arg0 = folded_arg; 5209: const_arg0 = const_arg; 5210: mode_arg0 = mode_arg; 5211: break; 5212: case 1: 5213: folded_arg1 = folded_arg; 5214: const_arg1 = const_arg; 5215: break; 5216: case 2: 5217: const_arg2 = const_arg; 5218: break; 5219: } 5220: 5221: /* Pick the least expensive of the folded argument and an 5222: equivalent constant argument. */ 5223: if (const_arg == 0 || const_arg == folded_arg 5224: || COST (const_arg) > COST (folded_arg)) 5225: cheap_arg = folded_arg, expensive_arg = const_arg; 5226: else 5227: cheap_arg = const_arg, expensive_arg = folded_arg; 5228: 5229: /* Try to replace the operand with the cheapest of the two 5230: possibilities. If it doesn't work and this is either of the first 5231: two operands of a commutative operation, try swapping them. 5232: If THAT fails, try the more expensive, provided it is cheaper 5233: than what is already there. */ 5234: 5235: if (cheap_arg == XEXP (x, i)) 5236: continue; 5237: 5238: if (insn == 0 && ! copied) 5239: { 5240: x = copy_rtx (x); 5241: copied = 1; 5242: } 5243: 5244: replacements[0] = cheap_arg, replacements[1] = expensive_arg; 5245: for (j = 0; 5246: j < 2 && replacements[j] 5247: && COST (replacements[j]) < COST (XEXP (x, i)); 5248: j++) 5249: { 5250: if (validate_change (insn, &XEXP (x, i), replacements[j], 0)) 5251: break; 5252: 5253: if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c') 5254: { 5255: validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1); 5256: validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1); 5257: 5258: if (apply_change_group ()) 5259: { 5260: /* Swap them back to be invalid so that this loop can 5261: continue and flag them to be swapped back later. */ 5262: rtx tem; 5263: 5264: tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1); 5265: XEXP (x, 1) = tem; 5266: must_swap = 1; 5267: break; 5268: } 5269: } 5270: } 5271: } 5272: 5273: else if (fmt[i] == 'E') 5274: /* Don't try to fold inside of a vector of expressions. 5275: Doing nothing is harmless. */ 5276: ; 5277: 5278: /* If a commutative operation, place a constant integer as the second 5279: operand unless the first operand is also a constant integer. Otherwise, 5280: place any constant second unless the first operand is also a constant. */ 5281: 5282: if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c') 5283: { 5284: if (must_swap || (const_arg0 5285: && (const_arg1 == 0 5286: || (GET_CODE (const_arg0) == CONST_INT 5287: && GET_CODE (const_arg1) != CONST_INT)))) 5288: { 5289: register rtx tem = XEXP (x, 0); 5290: 5291: if (insn == 0 && ! copied) 5292: { 5293: x = copy_rtx (x); 5294: copied = 1; 5295: } 5296: 5297: validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1); 5298: validate_change (insn, &XEXP (x, 1), tem, 1); 5299: if (apply_change_group ()) 5300: { 5301: tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem; 5302: tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem; 5303: } 5304: } 5305: } 5306: 5307: /* If X is an arithmetic operation, see if we can simplify it. */ 5308: 5309: switch (GET_RTX_CLASS (code)) 5310: { 5311: case '1': 1.1.1.7 root 5312: { 5313: int is_const = 0; 5314: 5315: /* We can't simplify extension ops unless we know the 5316: original mode. */ 5317: if ((code == ZERO_EXTEND || code == SIGN_EXTEND) 5318: && mode_arg0 == VOIDmode) 5319: break; 5320: 5321: /* If we had a CONST, strip it off and put it back later if we 5322: fold. */ 5323: if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST) 5324: is_const = 1, const_arg0 = XEXP (const_arg0, 0); 5325: 5326: new = simplify_unary_operation (code, mode, 5327: const_arg0 ? const_arg0 : folded_arg0, 5328: mode_arg0); 5329: if (new != 0 && is_const) 5330: new = gen_rtx (CONST, mode, new); 5331: } 1.1 root 5332: break; 5333: 5334: case '<': 5335: /* See what items are actually being compared and set FOLDED_ARG[01] 5336: to those values and CODE to the actual comparison code. If any are 5337: constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't 5338: do anything if both operands are already known to be constant. */ 5339: 5340: if (const_arg0 == 0 || const_arg1 == 0) 5341: { 5342: struct table_elt *p0, *p1; 1.1.1.4 root 5343: rtx true = const_true_rtx, false = const0_rtx; 5344: enum machine_mode mode_arg1; 5345: 5346: #ifdef FLOAT_STORE_FLAG_VALUE 5347: if (GET_MODE_CLASS (mode) == MODE_FLOAT) 5348: { 1.1.1.7 root 5349: true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, 5350: mode); 1.1.1.4 root 5351: false = CONST0_RTX (mode); 5352: } 5353: #endif 1.1 root 5354: 1.1.1.4 root 5355: code = find_comparison_args (code, &folded_arg0, &folded_arg1, 5356: &mode_arg0, &mode_arg1); 1.1 root 5357: const_arg0 = equiv_constant (folded_arg0); 5358: const_arg1 = equiv_constant (folded_arg1); 5359: 1.1.1.4 root 5360: /* If the mode is VOIDmode or a MODE_CC mode, we don't know 5361: what kinds of things are being compared, so we can't do 5362: anything with this comparison. */ 1.1 root 5363: 5364: if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC) 5365: break; 5366: 5367: /* If we do not now have two constants being compared, see if we 5368: can nevertheless deduce some things about the comparison. */ 5369: if (const_arg0 == 0 || const_arg1 == 0) 5370: { 5371: /* Is FOLDED_ARG0 frame-pointer plus a constant? Or non-explicit 5372: constant? These aren't zero, but we don't know their sign. */ 5373: if (const_arg1 == const0_rtx 5374: && (NONZERO_BASE_PLUS_P (folded_arg0) 5375: #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address 5376: come out as 0. */ 5377: || GET_CODE (folded_arg0) == SYMBOL_REF 5378: #endif 5379: || GET_CODE (folded_arg0) == LABEL_REF 5380: || GET_CODE (folded_arg0) == CONST)) 5381: { 5382: if (code == EQ) 1.1.1.4 root 5383: return false; 1.1 root 5384: else if (code == NE) 1.1.1.4 root 5385: return true; 1.1 root 5386: } 5387: 5388: /* See if the two operands are the same. We don't do this 5389: for IEEE floating-point since we can't assume x == x 5390: since x might be a NaN. */ 5391: 5392: if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT 1.1.1.7 root 5393: || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math) 1.1 root 5394: && (folded_arg0 == folded_arg1 5395: || (GET_CODE (folded_arg0) == REG 5396: && GET_CODE (folded_arg1) == REG 5397: && (reg_qty[REGNO (folded_arg0)] 5398: == reg_qty[REGNO (folded_arg1)])) 5399: || ((p0 = lookup (folded_arg0, 5400: (safe_hash (folded_arg0, mode_arg0) 5401: % NBUCKETS), mode_arg0)) 5402: && (p1 = lookup (folded_arg1, 5403: (safe_hash (folded_arg1, mode_arg0) 5404: % NBUCKETS), mode_arg0)) 5405: && p0->first_same_value == p1->first_same_value))) 5406: return ((code == EQ || code == LE || code == GE 5407: || code == LEU || code == GEU) 1.1.1.4 root 5408: ? true : false); 1.1 root 5409: 5410: /* If FOLDED_ARG0 is a register, see if the comparison we are 5411: doing now is either the same as we did before or the reverse 5412: (we only check the reverse if not floating-point). */ 5413: else if (GET_CODE (folded_arg0) == REG) 5414: { 5415: int qty = reg_qty[REGNO (folded_arg0)]; 5416: 5417: if (REGNO_QTY_VALID_P (REGNO (folded_arg0)) 5418: && (comparison_dominates_p (qty_comparison_code[qty], code) 5419: || (comparison_dominates_p (qty_comparison_code[qty], 5420: reverse_condition (code)) 1.1.1.6 root 5421: && ! FLOAT_MODE_P (mode_arg0))) 1.1 root 5422: && (rtx_equal_p (qty_comparison_const[qty], folded_arg1) 5423: || (const_arg1 5424: && rtx_equal_p (qty_comparison_const[qty], 5425: const_arg1)) 5426: || (GET_CODE (folded_arg1) == REG 5427: && (reg_qty[REGNO (folded_arg1)] 5428: == qty_comparison_qty[qty])))) 5429: return (comparison_dominates_p (qty_comparison_code[qty], 5430: code) 1.1.1.4 root 5431: ? true : false); 1.1 root 5432: } 5433: } 5434: } 5435: 5436: /* If we are comparing against zero, see if the first operand is 5437: equivalent to an IOR with a constant. If so, we may be able to 5438: determine the result of this comparison. */ 5439: 5440: if (const_arg1 == const0_rtx) 5441: { 5442: rtx y = lookup_as_function (folded_arg0, IOR); 5443: rtx inner_const; 5444: 5445: if (y != 0 5446: && (inner_const = equiv_constant (XEXP (y, 1))) != 0 5447: && GET_CODE (inner_const) == CONST_INT 5448: && INTVAL (inner_const) != 0) 5449: { 5450: int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1; 1.1.1.4 root 5451: int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum 5452: && (INTVAL (inner_const) 5453: & ((HOST_WIDE_INT) 1 << sign_bitnum))); 5454: rtx true = const_true_rtx, false = const0_rtx; 5455: 5456: #ifdef FLOAT_STORE_FLAG_VALUE 5457: if (GET_MODE_CLASS (mode) == MODE_FLOAT) 5458: { 1.1.1.7 root 5459: true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, 5460: mode); 1.1.1.4 root 5461: false = CONST0_RTX (mode); 5462: } 5463: #endif 1.1 root 5464: 5465: switch (code) 5466: { 5467: case EQ: 1.1.1.4 root 5468: return false; 1.1 root 5469: case NE: 1.1.1.4 root 5470: return true; 1.1 root 5471: case LT: case LE: 5472: if (has_sign) 1.1.1.4 root 5473: return true; 1.1 root 5474: break; 5475: case GT: case GE: 5476: if (has_sign) 1.1.1.4 root 5477: return false; 1.1 root 5478: break; 5479: } 5480: } 5481: } 5482: 5483: new = simplify_relational_operation (code, mode_arg0, 5484: const_arg0 ? const_arg0 : folded_arg0, 5485: const_arg1 ? const_arg1 : folded_arg1); 1.1.1.4 root 5486: #ifdef FLOAT_STORE_FLAG_VALUE 5487: if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT) 5488: new = ((new == const0_rtx) ? CONST0_RTX (mode) 1.1.1.7 root 5489: : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode)); 1.1.1.4 root 5490: #endif 1.1 root 5491: break; 5492: 5493: case '2': 5494: case 'c': 5495: switch (code) 5496: { 5497: case PLUS: 5498: /* If the second operand is a LABEL_REF, see if the first is a MINUS 5499: with that LABEL_REF as its second operand. If so, the result is 5500: the first operand of that MINUS. This handles switches with an 5501: ADDR_DIFF_VEC table. */ 5502: if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF) 5503: { 1.1.1.7 root 5504: rtx y 5505: = GET_CODE (folded_arg0) == MINUS ? folded_arg0 5506: : lookup_as_function (folded_arg0, MINUS); 1.1 root 5507: 5508: if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF 5509: && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0)) 5510: return XEXP (y, 0); 1.1.1.7 root 5511: 5512: /* Now try for a CONST of a MINUS like the above. */ 5513: if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0 5514: : lookup_as_function (folded_arg0, CONST))) != 0 5515: && GET_CODE (XEXP (y, 0)) == MINUS 5516: && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF 5517: && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0)) 5518: return XEXP (XEXP (y, 0), 0); 5519: } 5520: 5521: /* Likewise if the operands are in the other order. */ 5522: if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF) 5523: { 5524: rtx y 5525: = GET_CODE (folded_arg1) == MINUS ? folded_arg1 5526: : lookup_as_function (folded_arg1, MINUS); 5527: 5528: if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF 5529: && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0)) 5530: return XEXP (y, 0); 5531: 5532: /* Now try for a CONST of a MINUS like the above. */ 5533: if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1 5534: : lookup_as_function (folded_arg1, CONST))) != 0 5535: && GET_CODE (XEXP (y, 0)) == MINUS 5536: && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF 5537: && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0)) 5538: return XEXP (XEXP (y, 0), 0); 5539: } 5540: 5541: /* If second operand is a register equivalent to a negative 5542: CONST_INT, see if we can find a register equivalent to the 5543: positive constant. Make a MINUS if so. Don't do this for 5544: a negative constant since we might then alternate between 5545: chosing positive and negative constants. Having the positive 5546: constant previously-used is the more common case. */ 5547: if (const_arg1 && GET_CODE (const_arg1) == CONST_INT 5548: && INTVAL (const_arg1) < 0 && GET_CODE (folded_arg1) == REG) 5549: { 5550: rtx new_const = GEN_INT (- INTVAL (const_arg1)); 5551: struct table_elt *p 5552: = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS, 5553: mode); 5554: 5555: if (p) 5556: for (p = p->first_same_value; p; p = p->next_same_value) 5557: if (GET_CODE (p->exp) == REG) 5558: return cse_gen_binary (MINUS, mode, folded_arg0, 5559: canon_reg (p->exp, NULL_RTX)); 1.1 root 5560: } 1.1.1.4 root 5561: goto from_plus; 5562: 5563: case MINUS: 5564: /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2). 5565: If so, produce (PLUS Z C2-C). */ 5566: if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT) 5567: { 5568: rtx y = lookup_as_function (XEXP (x, 0), PLUS); 5569: if (y && GET_CODE (XEXP (y, 1)) == CONST_INT) 1.1.1.6 root 5570: return fold_rtx (plus_constant (copy_rtx (y), 5571: -INTVAL (const_arg1)), 1.1.1.5 root 5572: NULL_RTX); 1.1.1.4 root 5573: } 1.1 root 5574: 5575: /* ... fall through ... */ 5576: 1.1.1.4 root 5577: from_plus: 1.1 root 5578: case SMIN: case SMAX: case UMIN: case UMAX: 5579: case IOR: case AND: case XOR: 5580: case MULT: case DIV: case UDIV: 5581: case ASHIFT: case LSHIFTRT: case ASHIFTRT: 5582: /* If we have (<op> <reg> <const_int>) for an associative OP and REG 5583: is known to be of similar form, we may be able to replace the 5584: operation with a combined operation. This may eliminate the 5585: intermediate operation if every use is simplified in this way. 5586: Note that the similar optimization done by combine.c only works 5587: if the intermediate operation's result has only one reference. */ 5588: 5589: if (GET_CODE (folded_arg0) == REG 5590: && const_arg1 && GET_CODE (const_arg1) == CONST_INT) 5591: { 5592: int is_shift 5593: = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT); 5594: rtx y = lookup_as_function (folded_arg0, code); 5595: rtx inner_const; 5596: enum rtx_code associate_code; 5597: rtx new_const; 5598: 5599: if (y == 0 5600: || 0 == (inner_const 5601: = equiv_constant (fold_rtx (XEXP (y, 1), 0))) 5602: || GET_CODE (inner_const) != CONST_INT 5603: /* If we have compiled a statement like 5604: "if (x == (x & mask1))", and now are looking at 5605: "x & mask2", we will have a case where the first operand 5606: of Y is the same as our first operand. Unless we detect 5607: this case, an infinite loop will result. */ 5608: || XEXP (y, 0) == folded_arg0) 5609: break; 5610: 5611: /* Don't associate these operations if they are a PLUS with the 5612: same constant and it is a power of two. These might be doable 5613: with a pre- or post-increment. Similarly for two subtracts of 5614: identical powers of two with post decrement. */ 5615: 5616: if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const) 5617: && (0 5618: #if defined(HAVE_PRE_INCREMENT) || defined(HAVE_POST_INCREMENT) 5619: || exact_log2 (INTVAL (const_arg1)) >= 0 5620: #endif 5621: #if defined(HAVE_PRE_DECREMENT) || defined(HAVE_POST_DECREMENT) 5622: || exact_log2 (- INTVAL (const_arg1)) >= 0 5623: #endif 5624: )) 5625: break; 5626: 5627: /* Compute the code used to compose the constants. For example, 5628: A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */ 5629: 5630: associate_code 5631: = (code == MULT || code == DIV || code == UDIV ? MULT 5632: : is_shift || code == PLUS || code == MINUS ? PLUS : code); 5633: 5634: new_const = simplify_binary_operation (associate_code, mode, 5635: const_arg1, inner_const); 5636: 5637: if (new_const == 0) 5638: break; 5639: 5640: /* If we are associating shift operations, don't let this 1.1.1.5 root 5641: produce a shift of the size of the object or larger. 5642: This could occur when we follow a sign-extend by a right 5643: shift on a machine that does a sign-extend as a pair 5644: of shifts. */ 1.1 root 5645: 5646: if (is_shift && GET_CODE (new_const) == CONST_INT 1.1.1.5 root 5647: && INTVAL (new_const) >= GET_MODE_BITSIZE (mode)) 5648: { 5649: /* As an exception, we can turn an ASHIFTRT of this 5650: form into a shift of the number of bits - 1. */ 5651: if (code == ASHIFTRT) 5652: new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1); 5653: else 5654: break; 5655: } 1.1 root 5656: 5657: y = copy_rtx (XEXP (y, 0)); 5658: 5659: /* If Y contains our first operand (the most common way this 5660: can happen is if Y is a MEM), we would do into an infinite 5661: loop if we tried to fold it. So don't in that case. */ 5662: 5663: if (! reg_mentioned_p (folded_arg0, y)) 5664: y = fold_rtx (y, insn); 5665: 1.1.1.5 root 5666: return cse_gen_binary (code, mode, y, new_const); 1.1 root 5667: } 5668: } 5669: 5670: new = simplify_binary_operation (code, mode, 5671: const_arg0 ? const_arg0 : folded_arg0, 5672: const_arg1 ? const_arg1 : folded_arg1); 5673: break; 5674: 1.1.1.2 root 5675: case 'o': 5676: /* (lo_sum (high X) X) is simply X. */ 5677: if (code == LO_SUM && const_arg0 != 0 5678: && GET_CODE (const_arg0) == HIGH 5679: && rtx_equal_p (XEXP (const_arg0, 0), const_arg1)) 5680: return const_arg1; 5681: break; 5682: 1.1 root 5683: case '3': 5684: case 'b': 5685: new = simplify_ternary_operation (code, mode, mode_arg0, 5686: const_arg0 ? const_arg0 : folded_arg0, 5687: const_arg1 ? const_arg1 : folded_arg1, 5688: const_arg2 ? const_arg2 : XEXP (x, 2)); 5689: break; 5690: } 5691: 5692: return new ? new : x; 5693: } 5694: 5695: /* Return a constant value currently equivalent to X. 5696: Return 0 if we don't know one. */ 5697: 5698: static rtx 5699: equiv_constant (x) 5700: rtx x; 5701: { 5702: if (GET_CODE (x) == REG 5703: && REGNO_QTY_VALID_P (REGNO (x)) 5704: && qty_const[reg_qty[REGNO (x)]]) 5705: x = gen_lowpart_if_possible (GET_MODE (x), qty_const[reg_qty[REGNO (x)]]); 5706: 5707: if (x != 0 && CONSTANT_P (x)) 5708: return x; 5709: 1.1.1.3 root 5710: /* If X is a MEM, try to fold it outside the context of any insn to see if 5711: it might be equivalent to a constant. That handles the case where it 5712: is a constant-pool reference. Then try to look it up in the hash table 5713: in case it is something whose value we have seen before. */ 5714: 5715: if (GET_CODE (x) == MEM) 5716: { 5717: struct table_elt *elt; 5718: 1.1.1.4 root 5719: x = fold_rtx (x, NULL_RTX); 1.1.1.3 root 5720: if (CONSTANT_P (x)) 5721: return x; 5722: 5723: elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x)); 5724: if (elt == 0) 5725: return 0; 5726: 5727: for (elt = elt->first_same_value; elt; elt = elt->next_same_value) 5728: if (elt->is_const && CONSTANT_P (elt->exp)) 5729: return elt->exp; 5730: } 5731: 1.1 root 5732: return 0; 5733: } 5734: 5735: /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point 5736: number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the 5737: least-significant part of X. 5738: MODE specifies how big a part of X to return. 5739: 5740: If the requested operation cannot be done, 0 is returned. 5741: 5742: This is similar to gen_lowpart in emit-rtl.c. */ 5743: 5744: rtx 5745: gen_lowpart_if_possible (mode, x) 5746: enum machine_mode mode; 5747: register rtx x; 5748: { 5749: rtx result = gen_lowpart_common (mode, x); 5750: 5751: if (result) 5752: return result; 5753: else if (GET_CODE (x) == MEM) 5754: { 5755: /* This is the only other case we handle. */ 5756: register int offset = 0; 5757: rtx new; 5758: 1.1.1.8 ! root 5759: if (WORDS_BIG_ENDIAN) ! 5760: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) ! 5761: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); ! 5762: if (BYTES_BIG_ENDIAN) ! 5763: /* Adjust the address so that the address-after-the-data is ! 5764: unchanged. */ ! 5765: offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) ! 5766: - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); 1.1 root 5767: new = gen_rtx (MEM, mode, plus_constant (XEXP (x, 0), offset)); 5768: if (! memory_address_p (mode, XEXP (new, 0))) 5769: return 0; 5770: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (x); 5771: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x); 5772: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (x); 5773: return new; 5774: } 5775: else 5776: return 0; 5777: } 5778: 5779: /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken" 5780: branch. It will be zero if not. 5781: 5782: In certain cases, this can cause us to add an equivalence. For example, 5783: if we are following the taken case of 5784: if (i == 2) 5785: we can add the fact that `i' and '2' are now equivalent. 5786: 5787: In any case, we can record that this comparison was passed. If the same 5788: comparison is seen later, we will know its value. */ 5789: 5790: static void 5791: record_jump_equiv (insn, taken) 5792: rtx insn; 5793: int taken; 5794: { 5795: int cond_known_true; 5796: rtx op0, op1; 1.1.1.4 root 5797: enum machine_mode mode, mode0, mode1; 1.1 root 5798: int reversed_nonequality = 0; 5799: enum rtx_code code; 5800: 5801: /* Ensure this is the right kind of insn. */ 5802: if (! condjump_p (insn) || simplejump_p (insn)) 5803: return; 5804: 5805: /* See if this jump condition is known true or false. */ 5806: if (taken) 5807: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx); 5808: else 5809: cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx); 5810: 5811: /* Get the type of comparison being done and the operands being compared. 5812: If we had to reverse a non-equality condition, record that fact so we 5813: know that it isn't valid for floating-point. */ 5814: code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0)); 5815: op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn); 5816: op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn); 5817: 1.1.1.4 root 5818: code = find_comparison_args (code, &op0, &op1, &mode0, &mode1); 1.1 root 5819: if (! cond_known_true) 5820: { 5821: reversed_nonequality = (code != EQ && code != NE); 5822: code = reverse_condition (code); 5823: } 5824: 5825: /* The mode is the mode of the non-constant. */ 1.1.1.4 root 5826: mode = mode0; 5827: if (mode1 != VOIDmode) 5828: mode = mode1; 1.1 root 5829: 5830: record_jump_cond (code, mode, op0, op1, reversed_nonequality); 5831: } 5832: 5833: /* We know that comparison CODE applied to OP0 and OP1 in MODE is true. 5834: REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. 5835: Make any useful entries we can with that information. Called from 5836: above function and called recursively. */ 5837: 5838: static void 5839: record_jump_cond (code, mode, op0, op1, reversed_nonequality) 5840: enum rtx_code code; 5841: enum machine_mode mode; 5842: rtx op0, op1; 5843: int reversed_nonequality; 5844: { 1.1.1.7 root 5845: unsigned op0_hash, op1_hash; 1.1 root 5846: int op0_in_memory, op0_in_struct, op1_in_memory, op1_in_struct; 5847: struct table_elt *op0_elt, *op1_elt; 5848: 5849: /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG, 5850: we know that they are also equal in the smaller mode (this is also 5851: true for all smaller modes whether or not there is a SUBREG, but 5852: is not worth testing for with no SUBREG. */ 5853: 1.1.1.5 root 5854: /* Note that GET_MODE (op0) may not equal MODE. */ 1.1 root 5855: if (code == EQ && GET_CODE (op0) == SUBREG 1.1.1.5 root 5856: && (GET_MODE_SIZE (GET_MODE (op0)) 5857: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) 1.1 root 5858: { 5859: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); 5860: rtx tem = gen_lowpart_if_possible (inner_mode, op1); 5861: 5862: record_jump_cond (code, mode, SUBREG_REG (op0), 5863: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), 5864: reversed_nonequality); 5865: } 5866: 5867: if (code == EQ && GET_CODE (op1) == SUBREG 1.1.1.5 root 5868: && (GET_MODE_SIZE (GET_MODE (op1)) 5869: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) 1.1 root 5870: { 5871: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); 5872: rtx tem = gen_lowpart_if_possible (inner_mode, op0); 5873: 5874: record_jump_cond (code, mode, SUBREG_REG (op1), 5875: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), 5876: reversed_nonequality); 5877: } 5878: 5879: /* Similarly, if this is an NE comparison, and either is a SUBREG 5880: making a smaller mode, we know the whole thing is also NE. */ 5881: 1.1.1.5 root 5882: /* Note that GET_MODE (op0) may not equal MODE; 5883: if we test MODE instead, we can get an infinite recursion 5884: alternating between two modes each wider than MODE. */ 5885: 1.1 root 5886: if (code == NE && GET_CODE (op0) == SUBREG 5887: && subreg_lowpart_p (op0) 1.1.1.5 root 5888: && (GET_MODE_SIZE (GET_MODE (op0)) 5889: < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0))))) 1.1 root 5890: { 5891: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0)); 5892: rtx tem = gen_lowpart_if_possible (inner_mode, op1); 5893: 5894: record_jump_cond (code, mode, SUBREG_REG (op0), 5895: tem ? tem : gen_rtx (SUBREG, inner_mode, op1, 0), 5896: reversed_nonequality); 5897: } 5898: 5899: if (code == NE && GET_CODE (op1) == SUBREG 5900: && subreg_lowpart_p (op1) 1.1.1.5 root 5901: && (GET_MODE_SIZE (GET_MODE (op1)) 5902: < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1))))) 1.1 root 5903: { 5904: enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1)); 5905: rtx tem = gen_lowpart_if_possible (inner_mode, op0); 5906: 5907: record_jump_cond (code, mode, SUBREG_REG (op1), 5908: tem ? tem : gen_rtx (SUBREG, inner_mode, op0, 0), 5909: reversed_nonequality); 5910: } 5911: 5912: /* Hash both operands. */ 5913: 5914: do_not_record = 0; 5915: hash_arg_in_memory = 0; 5916: hash_arg_in_struct = 0; 1.1.1.7 root 5917: op0_hash = HASH (op0, mode); 1.1 root 5918: op0_in_memory = hash_arg_in_memory; 5919: op0_in_struct = hash_arg_in_struct; 5920: 5921: if (do_not_record) 5922: return; 5923: 5924: do_not_record = 0; 5925: hash_arg_in_memory = 0; 5926: hash_arg_in_struct = 0; 1.1.1.7 root 5927: op1_hash = HASH (op1, mode); 1.1 root 5928: op1_in_memory = hash_arg_in_memory; 5929: op1_in_struct = hash_arg_in_struct; 5930: 5931: if (do_not_record) 5932: return; 5933: 5934: /* Look up both operands. */ 1.1.1.7 root 5935: op0_elt = lookup (op0, op0_hash, mode); 5936: op1_elt = lookup (op1, op1_hash, mode); 5937: 5938: /* If both operands are already equivalent or if they are not in the 5939: table but are identical, do nothing. */ 5940: if ((op0_elt != 0 && op1_elt != 0 5941: && op0_elt->first_same_value == op1_elt->first_same_value) 5942: || op0 == op1 || rtx_equal_p (op0, op1)) 5943: return; 1.1 root 5944: 5945: /* If we aren't setting two things equal all we can do is save this 1.1.1.4 root 5946: comparison. Similarly if this is floating-point. In the latter 5947: case, OP1 might be zero and both -0.0 and 0.0 are equal to it. 5948: If we record the equality, we might inadvertently delete code 5949: whose intent was to change -0 to +0. */ 5950: 1.1.1.6 root 5951: if (code != EQ || FLOAT_MODE_P (GET_MODE (op0))) 1.1 root 5952: { 5953: /* If we reversed a floating-point comparison, if OP0 is not a 5954: register, or if OP1 is neither a register or constant, we can't 5955: do anything. */ 5956: 5957: if (GET_CODE (op1) != REG) 5958: op1 = equiv_constant (op1); 5959: 1.1.1.6 root 5960: if ((reversed_nonequality && FLOAT_MODE_P (mode)) 1.1 root 5961: || GET_CODE (op0) != REG || op1 == 0) 5962: return; 5963: 5964: /* Put OP0 in the hash table if it isn't already. This gives it a 5965: new quantity number. */ 5966: if (op0_elt == 0) 5967: { 1.1.1.4 root 5968: if (insert_regs (op0, NULL_PTR, 0)) 1.1 root 5969: { 5970: rehash_using_reg (op0); 1.1.1.7 root 5971: op0_hash = HASH (op0, mode); 1.1.1.6 root 5972: 5973: /* If OP0 is contained in OP1, this changes its hash code 5974: as well. Faster to rehash than to check, except 5975: for the simple case of a constant. */ 5976: if (! CONSTANT_P (op1)) 1.1.1.7 root 5977: op1_hash = HASH (op1,mode); 1.1 root 5978: } 5979: 1.1.1.7 root 5980: op0_elt = insert (op0, NULL_PTR, op0_hash, mode); 1.1 root 5981: op0_elt->in_memory = op0_in_memory; 5982: op0_elt->in_struct = op0_in_struct; 5983: } 5984: 5985: qty_comparison_code[reg_qty[REGNO (op0)]] = code; 5986: if (GET_CODE (op1) == REG) 5987: { 1.1.1.5 root 5988: /* Look it up again--in case op0 and op1 are the same. */ 1.1.1.7 root 5989: op1_elt = lookup (op1, op1_hash, mode); 1.1.1.5 root 5990: 1.1 root 5991: /* Put OP1 in the hash table so it gets a new quantity number. */ 5992: if (op1_elt == 0) 5993: { 1.1.1.4 root 5994: if (insert_regs (op1, NULL_PTR, 0)) 1.1 root 5995: { 5996: rehash_using_reg (op1); 1.1.1.7 root 5997: op1_hash = HASH (op1, mode); 1.1 root 5998: } 5999: 1.1.1.7 root 6000: op1_elt = insert (op1, NULL_PTR, op1_hash, mode); 1.1 root 6001: op1_elt->in_memory = op1_in_memory; 6002: op1_elt->in_struct = op1_in_struct; 6003: } 6004: 6005: qty_comparison_qty[reg_qty[REGNO (op0)]] = reg_qty[REGNO (op1)]; 6006: qty_comparison_const[reg_qty[REGNO (op0)]] = 0; 6007: } 6008: else 6009: { 6010: qty_comparison_qty[reg_qty[REGNO (op0)]] = -1; 6011: qty_comparison_const[reg_qty[REGNO (op0)]] = op1; 6012: } 6013: 6014: return; 6015: } 6016: 1.1.1.6 root 6017: /* If either side is still missing an equivalence, make it now, 6018: then merge the equivalences. */ 1.1 root 6019: 6020: if (op0_elt == 0) 6021: { 1.1.1.6 root 6022: if (insert_regs (op0, NULL_PTR, 0)) 1.1 root 6023: { 6024: rehash_using_reg (op0); 1.1.1.7 root 6025: op0_hash = HASH (op0, mode); 1.1 root 6026: } 6027: 1.1.1.7 root 6028: op0_elt = insert (op0, NULL_PTR, op0_hash, mode); 1.1 root 6029: op0_elt->in_memory = op0_in_memory; 6030: op0_elt->in_struct = op0_in_struct; 6031: } 6032: 6033: if (op1_elt == 0) 6034: { 1.1.1.6 root 6035: if (insert_regs (op1, NULL_PTR, 0)) 1.1 root 6036: { 6037: rehash_using_reg (op1); 1.1.1.7 root 6038: op1_hash = HASH (op1, mode); 1.1 root 6039: } 6040: 1.1.1.7 root 6041: op1_elt = insert (op1, NULL_PTR, op1_hash, mode); 1.1 root 6042: op1_elt->in_memory = op1_in_memory; 6043: op1_elt->in_struct = op1_in_struct; 6044: } 1.1.1.6 root 6045: 6046: merge_equiv_classes (op0_elt, op1_elt); 6047: last_jump_equiv_class = op0_elt; 1.1 root 6048: } 6049: 6050: /* CSE processing for one instruction. 6051: First simplify sources and addresses of all assignments 6052: in the instruction, using previously-computed equivalents values. 6053: Then install the new sources and destinations in the table 6054: of available values. 6055: 6056: If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in 6057: the insn. */ 6058: 6059: /* Data on one SET contained in the instruction. */ 6060: 6061: struct set 6062: { 6063: /* The SET rtx itself. */ 6064: rtx rtl; 6065: /* The SET_SRC of the rtx (the original value, if it is changing). */ 6066: rtx src; 6067: /* The hash-table element for the SET_SRC of the SET. */ 6068: struct table_elt *src_elt; 1.1.1.7 root 6069: /* Hash value for the SET_SRC. */ 6070: unsigned src_hash; 6071: /* Hash value for the SET_DEST. */ 6072: unsigned dest_hash; 1.1 root 6073: /* The SET_DEST, with SUBREG, etc., stripped. */ 6074: rtx inner_dest; 6075: /* Place where the pointer to the INNER_DEST was found. */ 6076: rtx *inner_dest_loc; 6077: /* Nonzero if the SET_SRC is in memory. */ 6078: char src_in_memory; 6079: /* Nonzero if the SET_SRC is in a structure. */ 6080: char src_in_struct; 6081: /* Nonzero if the SET_SRC contains something 6082: whose value cannot be predicted and understood. */ 6083: char src_volatile; 6084: /* Original machine mode, in case it becomes a CONST_INT. */ 6085: enum machine_mode mode; 6086: /* A constant equivalent for SET_SRC, if any. */ 6087: rtx src_const; 1.1.1.7 root 6088: /* Hash value of constant equivalent for SET_SRC. */ 6089: unsigned src_const_hash; 1.1 root 6090: /* Table entry for constant equivalent for SET_SRC, if any. */ 6091: struct table_elt *src_const_elt; 6092: }; 6093: 6094: static void 6095: cse_insn (insn, in_libcall_block) 6096: rtx insn; 6097: int in_libcall_block; 6098: { 6099: register rtx x = PATTERN (insn); 6100: register int i; 1.1.1.7 root 6101: rtx tem; 1.1 root 6102: register int n_sets = 0; 6103: 6104: /* Records what this insn does to set CC0. */ 6105: rtx this_insn_cc0 = 0; 6106: enum machine_mode this_insn_cc0_mode; 6107: struct write_data writes_memory; 6108: static struct write_data init = {0, 0, 0, 0}; 6109: 6110: rtx src_eqv = 0; 6111: struct table_elt *src_eqv_elt = 0; 6112: int src_eqv_volatile; 6113: int src_eqv_in_memory; 6114: int src_eqv_in_struct; 1.1.1.7 root 6115: unsigned src_eqv_hash; 1.1 root 6116: 6117: struct set *sets; 6118: 6119: this_insn = insn; 6120: writes_memory = init; 6121: 6122: /* Find all the SETs and CLOBBERs in this instruction. 6123: Record all the SETs in the array `set' and count them. 6124: Also determine whether there is a CLOBBER that invalidates 6125: all memory references, or all references at varying addresses. */ 6126: 1.1.1.7 root 6127: if (GET_CODE (insn) == CALL_INSN) 6128: { 6129: for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1)) 6130: if (GET_CODE (XEXP (tem, 0)) == CLOBBER) 6131: invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode); 6132: } 6133: 1.1 root 6134: if (GET_CODE (x) == SET) 6135: { 6136: sets = (struct set *) alloca (sizeof (struct set)); 6137: sets[0].rtl = x; 6138: 6139: /* Ignore SETs that are unconditional jumps. 6140: They never need cse processing, so this does not hurt. 6141: The reason is not efficiency but rather 6142: so that we can test at the end for instructions 6143: that have been simplified to unconditional jumps 6144: and not be misled by unchanged instructions 6145: that were unconditional jumps to begin with. */ 6146: if (SET_DEST (x) == pc_rtx 6147: && GET_CODE (SET_SRC (x)) == LABEL_REF) 6148: ; 6149: 6150: /* Don't count call-insns, (set (reg 0) (call ...)), as a set. 6151: The hard function value register is used only once, to copy to 6152: someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)! 6153: Ensure we invalidate the destination register. On the 80386 no 1.1.1.4 root 6154: other code would invalidate it since it is a fixed_reg. 6155: We need not check the return of apply_change_group; see canon_reg. */ 1.1 root 6156: 6157: else if (GET_CODE (SET_SRC (x)) == CALL) 6158: { 6159: canon_reg (SET_SRC (x), insn); 1.1.1.4 root 6160: apply_change_group (); 1.1 root 6161: fold_rtx (SET_SRC (x), insn); 1.1.1.7 root 6162: invalidate (SET_DEST (x), VOIDmode); 1.1 root 6163: } 6164: else 6165: n_sets = 1; 6166: } 6167: else if (GET_CODE (x) == PARALLEL) 6168: { 6169: register int lim = XVECLEN (x, 0); 6170: 6171: sets = (struct set *) alloca (lim * sizeof (struct set)); 6172: 6173: /* Find all regs explicitly clobbered in this insn, 6174: and ensure they are not replaced with any other regs 6175: elsewhere in this insn. 6176: When a reg that is clobbered is also used for input, 6177: we should presume that that is for a reason, 6178: and we should not substitute some other register 6179: which is not supposed to be clobbered. 6180: Therefore, this loop cannot be merged into the one below 1.1.1.3 root 6181: because a CALL may precede a CLOBBER and refer to the 1.1 root 6182: value clobbered. We must not let a canonicalization do 6183: anything in that case. */ 6184: for (i = 0; i < lim; i++) 6185: { 6186: register rtx y = XVECEXP (x, 0, i); 1.1.1.6 root 6187: if (GET_CODE (y) == CLOBBER) 6188: { 6189: rtx clobbered = XEXP (y, 0); 6190: 6191: if (GET_CODE (clobbered) == REG 6192: || GET_CODE (clobbered) == SUBREG) 1.1.1.7 root 6193: invalidate (clobbered, VOIDmode); 1.1.1.6 root 6194: else if (GET_CODE (clobbered) == STRICT_LOW_PART 6195: || GET_CODE (clobbered) == ZERO_EXTRACT) 1.1.1.7 root 6196: invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); 1.1.1.6 root 6197: } 1.1 root 6198: } 6199: 6200: for (i = 0; i < lim; i++) 6201: { 6202: register rtx y = XVECEXP (x, 0, i); 6203: if (GET_CODE (y) == SET) 6204: { 1.1.1.4 root 6205: /* As above, we ignore unconditional jumps and call-insns and 6206: ignore the result of apply_change_group. */ 1.1 root 6207: if (GET_CODE (SET_SRC (y)) == CALL) 6208: { 6209: canon_reg (SET_SRC (y), insn); 1.1.1.4 root 6210: apply_change_group (); 1.1 root 6211: fold_rtx (SET_SRC (y), insn); 1.1.1.7 root 6212: invalidate (SET_DEST (y), VOIDmode); 1.1 root 6213: } 6214: else if (SET_DEST (y) == pc_rtx 6215: && GET_CODE (SET_SRC (y)) == LABEL_REF) 6216: ; 6217: else 6218: sets[n_sets++].rtl = y; 6219: } 6220: else if (GET_CODE (y) == CLOBBER) 6221: { 6222: /* If we clobber memory, take note of that, 6223: and canon the address. 6224: This does nothing when a register is clobbered 6225: because we have already invalidated the reg. */ 6226: if (GET_CODE (XEXP (y, 0)) == MEM) 6227: { 1.1.1.4 root 6228: canon_reg (XEXP (y, 0), NULL_RTX); 1.1 root 6229: note_mem_written (XEXP (y, 0), &writes_memory); 6230: } 6231: } 6232: else if (GET_CODE (y) == USE 6233: && ! (GET_CODE (XEXP (y, 0)) == REG 6234: && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER)) 1.1.1.4 root 6235: canon_reg (y, NULL_RTX); 1.1 root 6236: else if (GET_CODE (y) == CALL) 6237: { 1.1.1.4 root 6238: /* The result of apply_change_group can be ignored; see 6239: canon_reg. */ 1.1 root 6240: canon_reg (y, insn); 1.1.1.4 root 6241: apply_change_group (); 1.1 root 6242: fold_rtx (y, insn); 6243: } 6244: } 6245: } 6246: else if (GET_CODE (x) == CLOBBER) 6247: { 6248: if (GET_CODE (XEXP (x, 0)) == MEM) 6249: { 1.1.1.4 root 6250: canon_reg (XEXP (x, 0), NULL_RTX); 1.1 root 6251: note_mem_written (XEXP (x, 0), &writes_memory); 6252: } 6253: } 6254: 6255: /* Canonicalize a USE of a pseudo register or memory location. */ 6256: else if (GET_CODE (x) == USE 6257: && ! (GET_CODE (XEXP (x, 0)) == REG 6258: && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER)) 1.1.1.4 root 6259: canon_reg (XEXP (x, 0), NULL_RTX); 1.1 root 6260: else if (GET_CODE (x) == CALL) 6261: { 1.1.1.4 root 6262: /* The result of apply_change_group can be ignored; see canon_reg. */ 1.1 root 6263: canon_reg (x, insn); 1.1.1.4 root 6264: apply_change_group (); 1.1 root 6265: fold_rtx (x, insn); 6266: } 6267: 1.1.1.7 root 6268: /* Store the equivalent value in SRC_EQV, if different, or if the DEST 6269: is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV 6270: is handled specially for this case, and if it isn't set, then there will 1.1.1.8 ! root 6271: be no equivalence for the destination. */ 1.1.1.7 root 6272: if (n_sets == 1 && REG_NOTES (insn) != 0 6273: && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0 6274: && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl)) 6275: || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART)) 6276: src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX); 1.1 root 6277: 6278: /* Canonicalize sources and addresses of destinations. 6279: We do this in a separate pass to avoid problems when a MATCH_DUP is 6280: present in the insn pattern. In that case, we want to ensure that 6281: we don't break the duplicate nature of the pattern. So we will replace 6282: both operands at the same time. Otherwise, we would fail to find an 6283: equivalent substitution in the loop calling validate_change below. 6284: 6285: We used to suppress canonicalization of DEST if it appears in SRC, 1.1.1.4 root 6286: but we don't do this any more. */ 1.1 root 6287: 6288: for (i = 0; i < n_sets; i++) 6289: { 6290: rtx dest = SET_DEST (sets[i].rtl); 6291: rtx src = SET_SRC (sets[i].rtl); 6292: rtx new = canon_reg (src, insn); 6293: 1.1.1.4 root 6294: if ((GET_CODE (new) == REG && GET_CODE (src) == REG 6295: && ((REGNO (new) < FIRST_PSEUDO_REGISTER) 6296: != (REGNO (src) < FIRST_PSEUDO_REGISTER))) 6297: || insn_n_dups[recog_memoized (insn)] > 0) 6298: validate_change (insn, &SET_SRC (sets[i].rtl), new, 1); 1.1 root 6299: else 6300: SET_SRC (sets[i].rtl) = new; 6301: 6302: if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) 6303: { 6304: validate_change (insn, &XEXP (dest, 1), 1.1.1.4 root 6305: canon_reg (XEXP (dest, 1), insn), 1); 1.1 root 6306: validate_change (insn, &XEXP (dest, 2), 1.1.1.4 root 6307: canon_reg (XEXP (dest, 2), insn), 1); 1.1 root 6308: } 6309: 6310: while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART 6311: || GET_CODE (dest) == ZERO_EXTRACT 6312: || GET_CODE (dest) == SIGN_EXTRACT) 6313: dest = XEXP (dest, 0); 6314: 6315: if (GET_CODE (dest) == MEM) 6316: canon_reg (dest, insn); 6317: } 6318: 1.1.1.4 root 6319: /* Now that we have done all the replacements, we can apply the change 6320: group and see if they all work. Note that this will cause some 6321: canonicalizations that would have worked individually not to be applied 6322: because some other canonicalization didn't work, but this should not 6323: occur often. 6324: 6325: The result of apply_change_group can be ignored; see canon_reg. */ 6326: 6327: apply_change_group (); 6328: 1.1 root 6329: /* Set sets[i].src_elt to the class each source belongs to. 6330: Detect assignments from or to volatile things 6331: and set set[i] to zero so they will be ignored 6332: in the rest of this function. 6333: 6334: Nothing in this loop changes the hash table or the register chains. */ 6335: 6336: for (i = 0; i < n_sets; i++) 6337: { 6338: register rtx src, dest; 6339: register rtx src_folded; 6340: register struct table_elt *elt = 0, *p; 6341: enum machine_mode mode; 6342: rtx src_eqv_here; 6343: rtx src_const = 0; 6344: rtx src_related = 0; 6345: struct table_elt *src_const_elt = 0; 6346: int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000; 6347: int src_related_cost = 10000, src_elt_cost = 10000; 6348: /* Set non-zero if we need to call force_const_mem on with the 6349: contents of src_folded before using it. */ 6350: int src_folded_force_flag = 0; 6351: 6352: dest = SET_DEST (sets[i].rtl); 6353: src = SET_SRC (sets[i].rtl); 6354: 6355: /* If SRC is a constant that has no machine mode, 6356: hash it with the destination's machine mode. 6357: This way we can keep different modes separate. */ 6358: 6359: mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); 6360: sets[i].mode = mode; 6361: 6362: if (src_eqv) 6363: { 6364: enum machine_mode eqvmode = mode; 6365: if (GET_CODE (dest) == STRICT_LOW_PART) 6366: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); 6367: do_not_record = 0; 6368: hash_arg_in_memory = 0; 6369: hash_arg_in_struct = 0; 6370: src_eqv = fold_rtx (src_eqv, insn); 1.1.1.7 root 6371: src_eqv_hash = HASH (src_eqv, eqvmode); 1.1 root 6372: 6373: /* Find the equivalence class for the equivalent expression. */ 6374: 6375: if (!do_not_record) 1.1.1.7 root 6376: src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode); 1.1 root 6377: 6378: src_eqv_volatile = do_not_record; 6379: src_eqv_in_memory = hash_arg_in_memory; 6380: src_eqv_in_struct = hash_arg_in_struct; 6381: } 6382: 6383: /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the 6384: value of the INNER register, not the destination. So it is not 1.1.1.8 ! root 6385: a valid substitution for the source. But save it for later. */ 1.1 root 6386: if (GET_CODE (dest) == STRICT_LOW_PART) 6387: src_eqv_here = 0; 6388: else 6389: src_eqv_here = src_eqv; 6390: 6391: /* Simplify and foldable subexpressions in SRC. Then get the fully- 6392: simplified result, which may not necessarily be valid. */ 6393: src_folded = fold_rtx (src, insn); 6394: 1.1.1.8 ! root 6395: #if 0 ! 6396: /* ??? This caused bad code to be generated for the m68k port with -O2. ! 6397: Suppose src is (CONST_INT -1), and that after truncation src_folded ! 6398: is (CONST_INT 3). Suppose src_folded is then used for src_const. ! 6399: At the end we will add src and src_const to the same equivalence ! 6400: class. We now have 3 and -1 on the same equivalence class. This ! 6401: causes later instructions to be mis-optimized. */ 1.1 root 6402: /* If storing a constant in a bitfield, pre-truncate the constant 6403: so we will be able to record it later. */ 6404: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT 6405: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) 6406: { 6407: rtx width = XEXP (SET_DEST (sets[i].rtl), 1); 6408: 6409: if (GET_CODE (src) == CONST_INT 6410: && GET_CODE (width) == CONST_INT 1.1.1.4 root 6411: && INTVAL (width) < HOST_BITS_PER_WIDE_INT 6412: && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) 6413: src_folded 6414: = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1 6415: << INTVAL (width)) - 1)); 1.1 root 6416: } 1.1.1.8 ! root 6417: #endif 1.1 root 6418: 6419: /* Compute SRC's hash code, and also notice if it 6420: should not be recorded at all. In that case, 6421: prevent any further processing of this assignment. */ 6422: do_not_record = 0; 6423: hash_arg_in_memory = 0; 6424: hash_arg_in_struct = 0; 6425: 6426: sets[i].src = src; 1.1.1.7 root 6427: sets[i].src_hash = HASH (src, mode); 1.1 root 6428: sets[i].src_volatile = do_not_record; 6429: sets[i].src_in_memory = hash_arg_in_memory; 6430: sets[i].src_in_struct = hash_arg_in_struct; 6431: 1.1.1.4 root 6432: #if 0 6433: /* It is no longer clear why we used to do this, but it doesn't 6434: appear to still be needed. So let's try without it since this 6435: code hurts cse'ing widened ops. */ 1.1 root 6436: /* If source is a perverse subreg (such as QI treated as an SI), 6437: treat it as volatile. It may do the work of an SI in one context 6438: where the extra bits are not being used, but cannot replace an SI 6439: in general. */ 6440: if (GET_CODE (src) == SUBREG 6441: && (GET_MODE_SIZE (GET_MODE (src)) 6442: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src))))) 6443: sets[i].src_volatile = 1; 1.1.1.4 root 6444: #endif 1.1 root 6445: 6446: /* Locate all possible equivalent forms for SRC. Try to replace 6447: SRC in the insn with each cheaper equivalent. 6448: 6449: We have the following types of equivalents: SRC itself, a folded 6450: version, a value given in a REG_EQUAL note, or a value related 6451: to a constant. 6452: 6453: Each of these equivalents may be part of an additional class 6454: of equivalents (if more than one is in the table, they must be in 6455: the same class; we check for this). 6456: 6457: If the source is volatile, we don't do any table lookups. 6458: 6459: We note any constant equivalent for possible later use in a 6460: REG_NOTE. */ 6461: 6462: if (!sets[i].src_volatile) 1.1.1.7 root 6463: elt = lookup (src, sets[i].src_hash, mode); 1.1 root 6464: 6465: sets[i].src_elt = elt; 6466: 6467: if (elt && src_eqv_here && src_eqv_elt) 6468: { 6469: if (elt->first_same_value != src_eqv_elt->first_same_value) 6470: { 6471: /* The REG_EQUAL is indicating that two formerly distinct 6472: classes are now equivalent. So merge them. */ 6473: merge_equiv_classes (elt, src_eqv_elt); 1.1.1.7 root 6474: src_eqv_hash = HASH (src_eqv, elt->mode); 6475: src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode); 1.1 root 6476: } 6477: 6478: src_eqv_here = 0; 6479: } 6480: 6481: else if (src_eqv_elt) 6482: elt = src_eqv_elt; 6483: 6484: /* Try to find a constant somewhere and record it in `src_const'. 6485: Record its table element, if any, in `src_const_elt'. Look in 6486: any known equivalences first. (If the constant is not in the 1.1.1.7 root 6487: table, also set `sets[i].src_const_hash'). */ 1.1 root 6488: if (elt) 6489: for (p = elt->first_same_value; p; p = p->next_same_value) 6490: if (p->is_const) 6491: { 6492: src_const = p->exp; 6493: src_const_elt = elt; 6494: break; 6495: } 6496: 6497: if (src_const == 0 6498: && (CONSTANT_P (src_folded) 6499: /* Consider (minus (label_ref L1) (label_ref L2)) as 6500: "constant" here so we will record it. This allows us 6501: to fold switch statements when an ADDR_DIFF_VEC is used. */ 6502: || (GET_CODE (src_folded) == MINUS 6503: && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF 6504: && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF))) 6505: src_const = src_folded, src_const_elt = elt; 6506: else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here)) 6507: src_const = src_eqv_here, src_const_elt = src_eqv_elt; 6508: 6509: /* If we don't know if the constant is in the table, get its 6510: hash code and look it up. */ 6511: if (src_const && src_const_elt == 0) 6512: { 1.1.1.7 root 6513: sets[i].src_const_hash = HASH (src_const, mode); 6514: src_const_elt = lookup (src_const, sets[i].src_const_hash, mode); 1.1 root 6515: } 6516: 6517: sets[i].src_const = src_const; 6518: sets[i].src_const_elt = src_const_elt; 6519: 6520: /* If the constant and our source are both in the table, mark them as 6521: equivalent. Otherwise, if a constant is in the table but the source 6522: isn't, set ELT to it. */ 6523: if (src_const_elt && elt 6524: && src_const_elt->first_same_value != elt->first_same_value) 6525: merge_equiv_classes (elt, src_const_elt); 6526: else if (src_const_elt && elt == 0) 6527: elt = src_const_elt; 6528: 6529: /* See if there is a register linearly related to a constant 6530: equivalent of SRC. */ 6531: if (src_const 6532: && (GET_CODE (src_const) == CONST 6533: || (src_const_elt && src_const_elt->related_value != 0))) 6534: { 6535: src_related = use_related_value (src_const, src_const_elt); 6536: if (src_related) 6537: { 6538: struct table_elt *src_related_elt 6539: = lookup (src_related, HASH (src_related, mode), mode); 6540: if (src_related_elt && elt) 6541: { 6542: if (elt->first_same_value 6543: != src_related_elt->first_same_value) 6544: /* This can occur when we previously saw a CONST 6545: involving a SYMBOL_REF and then see the SYMBOL_REF 6546: twice. Merge the involved classes. */ 6547: merge_equiv_classes (elt, src_related_elt); 6548: 6549: src_related = 0; 6550: src_related_elt = 0; 6551: } 6552: else if (src_related_elt && elt == 0) 6553: elt = src_related_elt; 6554: } 6555: } 6556: 1.1.1.4 root 6557: /* See if we have a CONST_INT that is already in a register in a 6558: wider mode. */ 6559: 6560: if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT 6561: && GET_MODE_CLASS (mode) == MODE_INT 6562: && GET_MODE_BITSIZE (mode) < BITS_PER_WORD) 6563: { 6564: enum machine_mode wider_mode; 6565: 6566: for (wider_mode = GET_MODE_WIDER_MODE (mode); 6567: GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD 6568: && src_related == 0; 6569: wider_mode = GET_MODE_WIDER_MODE (wider_mode)) 6570: { 6571: struct table_elt *const_elt 6572: = lookup (src_const, HASH (src_const, wider_mode), wider_mode); 6573: 6574: if (const_elt == 0) 6575: continue; 6576: 6577: for (const_elt = const_elt->first_same_value; 6578: const_elt; const_elt = const_elt->next_same_value) 6579: if (GET_CODE (const_elt->exp) == REG) 6580: { 6581: src_related = gen_lowpart_if_possible (mode, 6582: const_elt->exp); 6583: break; 6584: } 6585: } 6586: } 6587: 1.1.1.2 root 6588: /* Another possibility is that we have an AND with a constant in 6589: a mode narrower than a word. If so, it might have been generated 6590: as part of an "if" which would narrow the AND. If we already 6591: have done the AND in a wider mode, we can use a SUBREG of that 6592: value. */ 6593: 6594: if (flag_expensive_optimizations && ! src_related 6595: && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT 6596: && GET_MODE_SIZE (mode) < UNITS_PER_WORD) 6597: { 6598: enum machine_mode tmode; 1.1.1.4 root 6599: rtx new_and = gen_rtx (AND, VOIDmode, NULL_RTX, XEXP (src, 1)); 1.1.1.2 root 6600: 6601: for (tmode = GET_MODE_WIDER_MODE (mode); 6602: GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; 6603: tmode = GET_MODE_WIDER_MODE (tmode)) 6604: { 6605: rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0)); 6606: struct table_elt *larger_elt; 6607: 6608: if (inner) 6609: { 6610: PUT_MODE (new_and, tmode); 6611: XEXP (new_and, 0) = inner; 6612: larger_elt = lookup (new_and, HASH (new_and, tmode), tmode); 6613: if (larger_elt == 0) 6614: continue; 6615: 6616: for (larger_elt = larger_elt->first_same_value; 6617: larger_elt; larger_elt = larger_elt->next_same_value) 6618: if (GET_CODE (larger_elt->exp) == REG) 6619: { 6620: src_related 6621: = gen_lowpart_if_possible (mode, larger_elt->exp); 6622: break; 6623: } 6624: 6625: if (src_related) 6626: break; 6627: } 6628: } 6629: } 1.1.1.7 root 6630: 6631: #ifdef LOAD_EXTEND_OP 6632: /* See if a MEM has already been loaded with a widening operation; 6633: if it has, we can use a subreg of that. Many CISC machines 6634: also have such operations, but this is only likely to be 6635: beneficial these machines. */ 6636: 6637: if (flag_expensive_optimizations && src_related == 0 6638: && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) 6639: && GET_MODE_CLASS (mode) == MODE_INT 6640: && GET_CODE (src) == MEM && ! do_not_record 6641: && LOAD_EXTEND_OP (mode) != NIL) 6642: { 6643: enum machine_mode tmode; 6644: 6645: /* Set what we are trying to extend and the operation it might 6646: have been extended with. */ 6647: PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); 6648: XEXP (memory_extend_rtx, 0) = src; 6649: 6650: for (tmode = GET_MODE_WIDER_MODE (mode); 6651: GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; 6652: tmode = GET_MODE_WIDER_MODE (tmode)) 6653: { 6654: struct table_elt *larger_elt; 6655: 6656: PUT_MODE (memory_extend_rtx, tmode); 6657: larger_elt = lookup (memory_extend_rtx, 6658: HASH (memory_extend_rtx, tmode), tmode); 6659: if (larger_elt == 0) 6660: continue; 6661: 6662: for (larger_elt = larger_elt->first_same_value; 6663: larger_elt; larger_elt = larger_elt->next_same_value) 6664: if (GET_CODE (larger_elt->exp) == REG) 6665: { 6666: src_related = gen_lowpart_if_possible (mode, 6667: larger_elt->exp); 6668: break; 6669: } 6670: 6671: if (src_related) 6672: break; 6673: } 6674: } 6675: #endif /* LOAD_EXTEND_OP */ 6676: 1.1 root 6677: if (src == src_folded) 6678: src_folded = 0; 6679: 6680: /* At this point, ELT, if non-zero, points to a class of expressions 6681: equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED, 6682: and SRC_RELATED, if non-zero, each contain additional equivalent 6683: expressions. Prune these latter expressions by deleting expressions 6684: already in the equivalence class. 6685: 6686: Check for an equivalent identical to the destination. If found, 6687: this is the preferred equivalent since it will likely lead to 6688: elimination of the insn. Indicate this by placing it in 6689: `src_related'. */ 6690: 6691: if (elt) elt = elt->first_same_value; 6692: for (p = elt; p; p = p->next_same_value) 6693: { 6694: enum rtx_code code = GET_CODE (p->exp); 6695: 6696: /* If the expression is not valid, ignore it. Then we do not 6697: have to check for validity below. In most cases, we can use 6698: `rtx_equal_p', since canonicalization has already been done. */ 6699: if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0)) 6700: continue; 6701: 6702: if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp)) 6703: src = 0; 6704: else if (src_folded && GET_CODE (src_folded) == code 6705: && rtx_equal_p (src_folded, p->exp)) 6706: src_folded = 0; 6707: else if (src_eqv_here && GET_CODE (src_eqv_here) == code 6708: && rtx_equal_p (src_eqv_here, p->exp)) 6709: src_eqv_here = 0; 6710: else if (src_related && GET_CODE (src_related) == code 6711: && rtx_equal_p (src_related, p->exp)) 6712: src_related = 0; 6713: 6714: /* This is the same as the destination of the insns, we want 6715: to prefer it. Copy it to src_related. The code below will 6716: then give it a negative cost. */ 6717: if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest)) 6718: src_related = dest; 6719: 6720: } 6721: 6722: /* Find the cheapest valid equivalent, trying all the available 6723: possibilities. Prefer items not in the hash table to ones 6724: that are when they are equal cost. Note that we can never 6725: worsen an insn as the current contents will also succeed. 1.1.1.3 root 6726: If we find an equivalent identical to the destination, use it as best, 1.1 root 6727: since this insn will probably be eliminated in that case. */ 6728: if (src) 6729: { 6730: if (rtx_equal_p (src, dest)) 6731: src_cost = -1; 6732: else 6733: src_cost = COST (src); 6734: } 6735: 6736: if (src_eqv_here) 6737: { 6738: if (rtx_equal_p (src_eqv_here, dest)) 6739: src_eqv_cost = -1; 6740: else 6741: src_eqv_cost = COST (src_eqv_here); 6742: } 6743: 6744: if (src_folded) 6745: { 6746: if (rtx_equal_p (src_folded, dest)) 6747: src_folded_cost = -1; 6748: else 6749: src_folded_cost = COST (src_folded); 6750: } 6751: 6752: if (src_related) 6753: { 6754: if (rtx_equal_p (src_related, dest)) 6755: src_related_cost = -1; 6756: else 6757: src_related_cost = COST (src_related); 6758: } 6759: 6760: /* If this was an indirect jump insn, a known label will really be 6761: cheaper even though it looks more expensive. */ 6762: if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) 6763: src_folded = src_const, src_folded_cost = -1; 6764: 6765: /* Terminate loop when replacement made. This must terminate since 6766: the current contents will be tested and will always be valid. */ 6767: while (1) 6768: { 6769: rtx trial; 6770: 6771: /* Skip invalid entries. */ 6772: while (elt && GET_CODE (elt->exp) != REG 6773: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) 6774: elt = elt->next_same_value; 6775: 6776: if (elt) src_elt_cost = elt->cost; 6777: 6778: /* Find cheapest and skip it for the next time. For items 6779: of equal cost, use this order: 6780: src_folded, src, src_eqv, src_related and hash table entry. */ 6781: if (src_folded_cost <= src_cost 6782: && src_folded_cost <= src_eqv_cost 6783: && src_folded_cost <= src_related_cost 6784: && src_folded_cost <= src_elt_cost) 6785: { 6786: trial = src_folded, src_folded_cost = 10000; 6787: if (src_folded_force_flag) 6788: trial = force_const_mem (mode, trial); 6789: } 6790: else if (src_cost <= src_eqv_cost 6791: && src_cost <= src_related_cost 6792: && src_cost <= src_elt_cost) 6793: trial = src, src_cost = 10000; 6794: else if (src_eqv_cost <= src_related_cost 6795: && src_eqv_cost <= src_elt_cost) 1.1.1.6 root 6796: trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000; 1.1 root 6797: else if (src_related_cost <= src_elt_cost) 1.1.1.6 root 6798: trial = copy_rtx (src_related), src_related_cost = 10000; 1.1 root 6799: else 6800: { 1.1.1.3 root 6801: trial = copy_rtx (elt->exp); 1.1 root 6802: elt = elt->next_same_value; 6803: src_elt_cost = 10000; 6804: } 6805: 6806: /* We don't normally have an insn matching (set (pc) (pc)), so 6807: check for this separately here. We will delete such an 6808: insn below. 6809: 6810: Tablejump insns contain a USE of the table, so simply replacing 6811: the operand with the constant won't match. This is simply an 6812: unconditional branch, however, and is therefore valid. Just 6813: insert the substitution here and we will delete and re-emit 6814: the insn later. */ 6815: 6816: if (n_sets == 1 && dest == pc_rtx 6817: && (trial == pc_rtx 6818: || (GET_CODE (trial) == LABEL_REF 6819: && ! condjump_p (insn)))) 6820: { 6821: /* If TRIAL is a label in front of a jump table, we are 6822: really falling through the switch (this is how casesi 6823: insns work), so we must branch around the table. */ 6824: if (GET_CODE (trial) == CODE_LABEL 6825: && NEXT_INSN (trial) != 0 6826: && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN 6827: && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC 6828: || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC)) 6829: 6830: trial = gen_rtx (LABEL_REF, Pmode, get_label_after (trial)); 6831: 6832: SET_SRC (sets[i].rtl) = trial; 1.1.1.7 root 6833: cse_jumps_altered = 1; 1.1 root 6834: break; 6835: } 6836: 6837: /* Look for a substitution that makes a valid insn. */ 6838: else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) 1.1.1.3 root 6839: { 1.1.1.4 root 6840: /* The result of apply_change_group can be ignored; see 6841: canon_reg. */ 6842: 6843: validate_change (insn, &SET_SRC (sets[i].rtl), 6844: canon_reg (SET_SRC (sets[i].rtl), insn), 6845: 1); 6846: apply_change_group (); 1.1.1.3 root 6847: break; 6848: } 1.1 root 6849: 6850: /* If we previously found constant pool entries for 6851: constants and this is a constant, try making a 6852: pool entry. Put it in src_folded unless we already have done 6853: this since that is where it likely came from. */ 6854: 6855: else if (constant_pool_entries_cost 6856: && CONSTANT_P (trial) 1.1.1.7 root 6857: && ! (GET_CODE (trial) == CONST 6858: && GET_CODE (XEXP (trial, 0)) == TRUNCATE) 6859: && (src_folded == 0 6860: || (GET_CODE (src_folded) != MEM 6861: && ! src_folded_force_flag)) 1.1 root 6862: && GET_MODE_CLASS (mode) != MODE_CC) 6863: { 6864: src_folded_force_flag = 1; 6865: src_folded = trial; 6866: src_folded_cost = constant_pool_entries_cost; 6867: } 6868: } 6869: 6870: src = SET_SRC (sets[i].rtl); 6871: 6872: /* In general, it is good to have a SET with SET_SRC == SET_DEST. 6873: However, there is an important exception: If both are registers 6874: that are not the head of their equivalence class, replace SET_SRC 6875: with the head of the class. If we do not do this, we will have 6876: both registers live over a portion of the basic block. This way, 6877: their lifetimes will likely abut instead of overlapping. */ 6878: if (GET_CODE (dest) == REG 6879: && REGNO_QTY_VALID_P (REGNO (dest)) 6880: && qty_mode[reg_qty[REGNO (dest)]] == GET_MODE (dest) 6881: && qty_first_reg[reg_qty[REGNO (dest)]] != REGNO (dest) 6882: && GET_CODE (src) == REG && REGNO (src) == REGNO (dest) 6883: /* Don't do this if the original insn had a hard reg as 6884: SET_SRC. */ 6885: && (GET_CODE (sets[i].src) != REG 6886: || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)) 6887: /* We can't call canon_reg here because it won't do anything if 6888: SRC is a hard register. */ 6889: { 6890: int first = qty_first_reg[reg_qty[REGNO (src)]]; 6891: 6892: src = SET_SRC (sets[i].rtl) 6893: = first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first] 6894: : gen_rtx (REG, GET_MODE (src), first); 6895: 6896: /* If we had a constant that is cheaper than what we are now 6897: setting SRC to, use that constant. We ignored it when we 6898: thought we could make this into a no-op. */ 6899: if (src_const && COST (src_const) < COST (src) 6900: && validate_change (insn, &SET_SRC (sets[i].rtl), src_const, 0)) 6901: src = src_const; 6902: } 6903: 6904: /* If we made a change, recompute SRC values. */ 6905: if (src != sets[i].src) 6906: { 6907: do_not_record = 0; 6908: hash_arg_in_memory = 0; 6909: hash_arg_in_struct = 0; 6910: sets[i].src = src; 1.1.1.7 root 6911: sets[i].src_hash = HASH (src, mode); 1.1 root 6912: sets[i].src_volatile = do_not_record; 6913: sets[i].src_in_memory = hash_arg_in_memory; 6914: sets[i].src_in_struct = hash_arg_in_struct; 1.1.1.7 root 6915: sets[i].src_elt = lookup (src, sets[i].src_hash, mode); 1.1 root 6916: } 6917: 6918: /* If this is a single SET, we are setting a register, and we have an 6919: equivalent constant, we want to add a REG_NOTE. We don't want 6920: to write a REG_EQUAL note for a constant pseudo since verifying that 1.1.1.2 root 6921: that pseudo hasn't been eliminated is a pain. Such a note also 1.1 root 6922: won't help anything. */ 6923: if (n_sets == 1 && src_const && GET_CODE (dest) == REG 6924: && GET_CODE (src_const) != REG) 6925: { 1.1.1.7 root 6926: tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); 1.1 root 6927: 6928: /* Record the actual constant value in a REG_EQUAL note, making 6929: a new one if one does not already exist. */ 6930: if (tem) 6931: XEXP (tem, 0) = src_const; 6932: else 6933: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_EQUAL, 6934: src_const, REG_NOTES (insn)); 6935: 6936: /* If storing a constant value in a register that 6937: previously held the constant value 0, 6938: record this fact with a REG_WAS_0 note on this insn. 6939: 6940: Note that the *register* is required to have previously held 0, 6941: not just any register in the quantity and we must point to the 6942: insn that set that register to zero. 6943: 6944: Rather than track each register individually, we just see if 6945: the last set for this quantity was for this register. */ 6946: 6947: if (REGNO_QTY_VALID_P (REGNO (dest)) 6948: && qty_const[reg_qty[REGNO (dest)]] == const0_rtx) 6949: { 6950: /* See if we previously had a REG_WAS_0 note. */ 1.1.1.4 root 6951: rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX); 1.1 root 6952: rtx const_insn = qty_const_insn[reg_qty[REGNO (dest)]]; 6953: 6954: if ((tem = single_set (const_insn)) != 0 6955: && rtx_equal_p (SET_DEST (tem), dest)) 6956: { 6957: if (note) 6958: XEXP (note, 0) = const_insn; 6959: else 6960: REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_WAS_0, 6961: const_insn, REG_NOTES (insn)); 6962: } 6963: } 6964: } 6965: 6966: /* Now deal with the destination. */ 6967: do_not_record = 0; 6968: sets[i].inner_dest_loc = &SET_DEST (sets[0].rtl); 6969: 6970: /* Look within any SIGN_EXTRACT or ZERO_EXTRACT 6971: to the MEM or REG within it. */ 6972: while (GET_CODE (dest) == SIGN_EXTRACT 6973: || GET_CODE (dest) == ZERO_EXTRACT 6974: || GET_CODE (dest) == SUBREG 6975: || GET_CODE (dest) == STRICT_LOW_PART) 6976: { 6977: sets[i].inner_dest_loc = &XEXP (dest, 0); 6978: dest = XEXP (dest, 0); 6979: } 6980: 6981: sets[i].inner_dest = dest; 6982: 6983: if (GET_CODE (dest) == MEM) 6984: { 6985: dest = fold_rtx (dest, insn); 6986: 6987: /* Decide whether we invalidate everything in memory, 6988: or just things at non-fixed places. 6989: Writing a large aggregate must invalidate everything 6990: because we don't know how long it is. */ 6991: note_mem_written (dest, &writes_memory); 6992: } 6993: 6994: /* Compute the hash code of the destination now, 6995: before the effects of this instruction are recorded, 6996: since the register values used in the address computation 6997: are those before this instruction. */ 1.1.1.7 root 6998: sets[i].dest_hash = HASH (dest, mode); 1.1 root 6999: 7000: /* Don't enter a bit-field in the hash table 7001: because the value in it after the store 7002: may not equal what was stored, due to truncation. */ 7003: 7004: if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT 7005: || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT) 7006: { 7007: rtx width = XEXP (SET_DEST (sets[i].rtl), 1); 7008: 7009: if (src_const != 0 && GET_CODE (src_const) == CONST_INT 7010: && GET_CODE (width) == CONST_INT 1.1.1.4 root 7011: && INTVAL (width) < HOST_BITS_PER_WIDE_INT 7012: && ! (INTVAL (src_const) 7013: & ((HOST_WIDE_INT) (-1) << INTVAL (width)))) 1.1 root 7014: /* Exception: if the value is constant, 7015: and it won't be truncated, record it. */ 7016: ; 7017: else 7018: { 7019: /* This is chosen so that the destination will be invalidated 7020: but no new value will be recorded. 7021: We must invalidate because sometimes constant 7022: values can be recorded for bitfields. */ 7023: sets[i].src_elt = 0; 7024: sets[i].src_volatile = 1; 7025: src_eqv = 0; 7026: src_eqv_elt = 0; 7027: } 7028: } 7029: 7030: /* If only one set in a JUMP_INSN and it is now a no-op, we can delete 7031: the insn. */ 7032: else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx) 7033: { 7034: PUT_CODE (insn, NOTE); 7035: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; 7036: NOTE_SOURCE_FILE (insn) = 0; 7037: cse_jumps_altered = 1; 7038: /* One less use of the label this insn used to jump to. */ 7039: --LABEL_NUSES (JUMP_LABEL (insn)); 7040: /* No more processing for this set. */ 7041: sets[i].rtl = 0; 7042: } 7043: 7044: /* If this SET is now setting PC to a label, we know it used to 7045: be a conditional or computed branch. So we see if we can follow 7046: it. If it was a computed branch, delete it and re-emit. */ 7047: else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF) 7048: { 7049: rtx p; 7050: 7051: /* If this is not in the format for a simple branch and 7052: we are the only SET in it, re-emit it. */ 7053: if (! simplejump_p (insn) && n_sets == 1) 7054: { 7055: rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn); 7056: JUMP_LABEL (new) = XEXP (src, 0); 7057: LABEL_NUSES (XEXP (src, 0))++; 7058: delete_insn (insn); 7059: insn = new; 7060: } 1.1.1.5 root 7061: else 7062: /* Otherwise, force rerecognition, since it probably had 7063: a different pattern before. 7064: This shouldn't really be necessary, since whatever 7065: changed the source value above should have done this. 7066: Until the right place is found, might as well do this here. */ 7067: INSN_CODE (insn) = -1; 1.1 root 7068: 7069: /* Now that we've converted this jump to an unconditional jump, 7070: there is dead code after it. Delete the dead code until we 7071: reach a BARRIER, the end of the function, or a label. Do 7072: not delete NOTEs except for NOTE_INSN_DELETED since later 7073: phases assume these notes are retained. */ 7074: 7075: p = insn; 7076: 7077: while (NEXT_INSN (p) != 0 7078: && GET_CODE (NEXT_INSN (p)) != BARRIER 7079: && GET_CODE (NEXT_INSN (p)) != CODE_LABEL) 7080: { 7081: if (GET_CODE (NEXT_INSN (p)) != NOTE 7082: || NOTE_LINE_NUMBER (NEXT_INSN (p)) == NOTE_INSN_DELETED) 7083: delete_insn (NEXT_INSN (p)); 7084: else 7085: p = NEXT_INSN (p); 7086: } 7087: 7088: /* If we don't have a BARRIER immediately after INSN, put one there. 7089: Much code assumes that there are no NOTEs between a JUMP_INSN and 7090: BARRIER. */ 7091: 7092: if (NEXT_INSN (insn) == 0 7093: || GET_CODE (NEXT_INSN (insn)) != BARRIER) 1.1.1.8 ! root 7094: emit_barrier_before (NEXT_INSN (insn)); 1.1 root 7095: 7096: /* We might have two BARRIERs separated by notes. Delete the second 7097: one if so. */ 7098: 1.1.1.2 root 7099: if (p != insn && NEXT_INSN (p) != 0 7100: && GET_CODE (NEXT_INSN (p)) == BARRIER) 1.1 root 7101: delete_insn (NEXT_INSN (p)); 7102: 7103: cse_jumps_altered = 1; 7104: sets[i].rtl = 0; 7105: } 7106: 1.1.1.3 root 7107: /* If destination is volatile, invalidate it and then do no further 7108: processing for this assignment. */ 1.1 root 7109: 7110: else if (do_not_record) 1.1.1.3 root 7111: { 7112: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG 7113: || GET_CODE (dest) == MEM) 1.1.1.7 root 7114: invalidate (dest, VOIDmode); 1.1.1.6 root 7115: else if (GET_CODE (dest) == STRICT_LOW_PART 7116: || GET_CODE (dest) == ZERO_EXTRACT) 1.1.1.7 root 7117: invalidate (XEXP (dest, 0), GET_MODE (dest)); 1.1.1.3 root 7118: sets[i].rtl = 0; 7119: } 1.1 root 7120: 7121: if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl)) 1.1.1.7 root 7122: sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode); 1.1 root 7123: 7124: #ifdef HAVE_cc0 7125: /* If setting CC0, record what it was set to, or a constant, if it 7126: is equivalent to a constant. If it is being set to a floating-point 7127: value, make a COMPARE with the appropriate constant of 0. If we 7128: don't do this, later code can interpret this as a test against 7129: const0_rtx, which can cause problems if we try to put it into an 7130: insn as a floating-point operand. */ 7131: if (dest == cc0_rtx) 7132: { 7133: this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src; 7134: this_insn_cc0_mode = mode; 1.1.1.6 root 7135: if (FLOAT_MODE_P (mode)) 1.1 root 7136: this_insn_cc0 = gen_rtx (COMPARE, VOIDmode, this_insn_cc0, 7137: CONST0_RTX (mode)); 7138: } 7139: #endif 7140: } 7141: 7142: /* Now enter all non-volatile source expressions in the hash table 7143: if they are not already present. 7144: Record their equivalence classes in src_elt. 7145: This way we can insert the corresponding destinations into 7146: the same classes even if the actual sources are no longer in them 7147: (having been invalidated). */ 7148: 7149: if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile 7150: && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl))) 7151: { 7152: register struct table_elt *elt; 7153: register struct table_elt *classp = sets[0].src_elt; 7154: rtx dest = SET_DEST (sets[0].rtl); 7155: enum machine_mode eqvmode = GET_MODE (dest); 7156: 7157: if (GET_CODE (dest) == STRICT_LOW_PART) 7158: { 7159: eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0))); 7160: classp = 0; 7161: } 7162: if (insert_regs (src_eqv, classp, 0)) 1.1.1.7 root 7163: { 7164: rehash_using_reg (src_eqv); 7165: src_eqv_hash = HASH (src_eqv, eqvmode); 7166: } 7167: elt = insert (src_eqv, classp, src_eqv_hash, eqvmode); 1.1 root 7168: elt->in_memory = src_eqv_in_memory; 7169: elt->in_struct = src_eqv_in_struct; 7170: src_eqv_elt = elt; 1.1.1.6 root 7171: 7172: /* Check to see if src_eqv_elt is the same as a set source which 7173: does not yet have an elt, and if so set the elt of the set source 7174: to src_eqv_elt. */ 7175: for (i = 0; i < n_sets; i++) 7176: if (sets[i].rtl && sets[i].src_elt == 0 7177: && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv)) 7178: sets[i].src_elt = src_eqv_elt; 1.1 root 7179: } 7180: 7181: for (i = 0; i < n_sets; i++) 7182: if (sets[i].rtl && ! sets[i].src_volatile 7183: && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl))) 7184: { 7185: if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART) 7186: { 7187: /* REG_EQUAL in setting a STRICT_LOW_PART 7188: gives an equivalent for the entire destination register, 7189: not just for the subreg being stored in now. 7190: This is a more interesting equivalence, so we arrange later 7191: to treat the entire reg as the destination. */ 7192: sets[i].src_elt = src_eqv_elt; 1.1.1.7 root 7193: sets[i].src_hash = src_eqv_hash; 1.1 root 7194: } 7195: else 7196: { 7197: /* Insert source and constant equivalent into hash table, if not 7198: already present. */ 7199: register struct table_elt *classp = src_eqv_elt; 7200: register rtx src = sets[i].src; 7201: register rtx dest = SET_DEST (sets[i].rtl); 7202: enum machine_mode mode 7203: = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); 7204: 7205: if (sets[i].src_elt == 0) 7206: { 7207: register struct table_elt *elt; 7208: 7209: /* Note that these insert_regs calls cannot remove 7210: any of the src_elt's, because they would have failed to 7211: match if not still valid. */ 7212: if (insert_regs (src, classp, 0)) 1.1.1.7 root 7213: { 7214: rehash_using_reg (src); 7215: sets[i].src_hash = HASH (src, mode); 7216: } 7217: elt = insert (src, classp, sets[i].src_hash, mode); 1.1 root 7218: elt->in_memory = sets[i].src_in_memory; 7219: elt->in_struct = sets[i].src_in_struct; 7220: sets[i].src_elt = classp = elt; 7221: } 7222: 7223: if (sets[i].src_const && sets[i].src_const_elt == 0 7224: && src != sets[i].src_const 7225: && ! rtx_equal_p (sets[i].src_const, src)) 7226: sets[i].src_elt = insert (sets[i].src_const, classp, 1.1.1.7 root 7227: sets[i].src_const_hash, mode); 1.1 root 7228: } 7229: } 7230: else if (sets[i].src_elt == 0) 7231: /* If we did not insert the source into the hash table (e.g., it was 7232: volatile), note the equivalence class for the REG_EQUAL value, if any, 7233: so that the destination goes into that class. */ 7234: sets[i].src_elt = src_eqv_elt; 7235: 7236: invalidate_from_clobbers (&writes_memory, x); 1.1.1.4 root 7237: 7238: /* Some registers are invalidated by subroutine calls. Memory is 7239: invalidated by non-constant calls. */ 7240: 1.1 root 7241: if (GET_CODE (insn) == CALL_INSN) 7242: { 7243: static struct write_data everything = {0, 1, 1, 1}; 1.1.1.4 root 7244: 7245: if (! CONST_CALL_P (insn)) 7246: invalidate_memory (&everything); 1.1 root 7247: invalidate_for_call (); 7248: } 7249: 7250: /* Now invalidate everything set by this instruction. 7251: If a SUBREG or other funny destination is being set, 7252: sets[i].rtl is still nonzero, so here we invalidate the reg 7253: a part of which is being set. */ 7254: 7255: for (i = 0; i < n_sets; i++) 7256: if (sets[i].rtl) 7257: { 1.1.1.7 root 7258: /* We can't use the inner dest, because the mode associated with 7259: a ZERO_EXTRACT is significant. */ 7260: register rtx dest = SET_DEST (sets[i].rtl); 1.1 root 7261: 7262: /* Needed for registers to remove the register from its 7263: previous quantity's chain. 7264: Needed for memory if this is a nonvarying address, unless 7265: we have just done an invalidate_memory that covers even those. */ 7266: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG 1.1.1.7 root 7267: || (GET_CODE (dest) == MEM && ! writes_memory.all 7268: && ! cse_rtx_addr_varies_p (dest))) 7269: invalidate (dest, VOIDmode); 1.1.1.6 root 7270: else if (GET_CODE (dest) == STRICT_LOW_PART 7271: || GET_CODE (dest) == ZERO_EXTRACT) 1.1.1.7 root 7272: invalidate (XEXP (dest, 0), GET_MODE (dest)); 1.1 root 7273: } 7274: 7275: /* Make sure registers mentioned in destinations 7276: are safe for use in an expression to be inserted. 7277: This removes from the hash table 7278: any invalid entry that refers to one of these registers. 7279: 7280: We don't care about the return value from mention_regs because 7281: we are going to hash the SET_DEST values unconditionally. */ 7282: 7283: for (i = 0; i < n_sets; i++) 7284: if (sets[i].rtl && GET_CODE (SET_DEST (sets[i].rtl)) != REG) 7285: mention_regs (SET_DEST (sets[i].rtl)); 7286: 7287: /* We may have just removed some of the src_elt's from the hash table. 7288: So replace each one with the current head of the same class. */ 7289: 7290: for (i = 0; i < n_sets; i++) 7291: if (sets[i].rtl) 7292: { 7293: if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0) 7294: /* If elt was removed, find current head of same class, 7295: or 0 if nothing remains of that class. */ 7296: { 7297: register struct table_elt *elt = sets[i].src_elt; 7298: 7299: while (elt && elt->prev_same_value) 7300: elt = elt->prev_same_value; 7301: 7302: while (elt && elt->first_same_value == 0) 7303: elt = elt->next_same_value; 7304: sets[i].src_elt = elt ? elt->first_same_value : 0; 7305: } 7306: } 7307: 7308: /* Now insert the destinations into their equivalence classes. */ 7309: 7310: for (i = 0; i < n_sets; i++) 7311: if (sets[i].rtl) 7312: { 7313: register rtx dest = SET_DEST (sets[i].rtl); 7314: register struct table_elt *elt; 7315: 7316: /* Don't record value if we are not supposed to risk allocating 7317: floating-point values in registers that might be wider than 7318: memory. */ 7319: if ((flag_float_store 7320: && GET_CODE (dest) == MEM 1.1.1.6 root 7321: && FLOAT_MODE_P (GET_MODE (dest))) 1.1 root 7322: /* Don't record values of destinations set inside a libcall block 7323: since we might delete the libcall. Things should have been set 7324: up so we won't want to reuse such a value, but we play it safe 7325: here. */ 7326: || in_libcall_block 7327: /* If we didn't put a REG_EQUAL value or a source into the hash 7328: table, there is no point is recording DEST. */ 1.1.1.7 root 7329: || sets[i].src_elt == 0 7330: /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND 7331: or SIGN_EXTEND, don't record DEST since it can cause 7332: some tracking to be wrong. 7333: 7334: ??? Think about this more later. */ 7335: || (GET_CODE (dest) == SUBREG 7336: && (GET_MODE_SIZE (GET_MODE (dest)) 7337: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) 7338: && (GET_CODE (sets[i].src) == SIGN_EXTEND 7339: || GET_CODE (sets[i].src) == ZERO_EXTEND))) 1.1 root 7340: continue; 7341: 7342: /* STRICT_LOW_PART isn't part of the value BEING set, 7343: and neither is the SUBREG inside it. 7344: Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */ 7345: if (GET_CODE (dest) == STRICT_LOW_PART) 7346: dest = SUBREG_REG (XEXP (dest, 0)); 7347: 1.1.1.4 root 7348: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG) 1.1 root 7349: /* Registers must also be inserted into chains for quantities. */ 7350: if (insert_regs (dest, sets[i].src_elt, 1)) 1.1.1.7 root 7351: { 7352: /* If `insert_regs' changes something, the hash code must be 7353: recalculated. */ 7354: rehash_using_reg (dest); 7355: sets[i].dest_hash = HASH (dest, GET_MODE (dest)); 7356: } 1.1 root 7357: 7358: elt = insert (dest, sets[i].src_elt, 1.1.1.7 root 7359: sets[i].dest_hash, GET_MODE (dest)); 1.1.1.8 ! root 7360: elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM ! 7361: && ! RTX_UNCHANGING_P (sets[i].inner_dest)); ! 7362: 1.1 root 7363: if (elt->in_memory) 7364: { 7365: /* This implicitly assumes a whole struct 7366: need not have MEM_IN_STRUCT_P. 7367: But a whole struct is *supposed* to have MEM_IN_STRUCT_P. */ 7368: elt->in_struct = (MEM_IN_STRUCT_P (sets[i].inner_dest) 7369: || sets[i].inner_dest != SET_DEST (sets[i].rtl)); 7370: } 7371: 1.1.1.3 root 7372: /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no 7373: narrower than M2, and both M1 and M2 are the same number of words, 7374: we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so 7375: make that equivalence as well. 1.1 root 7376: 7377: However, BAR may have equivalences for which gen_lowpart_if_possible 7378: will produce a simpler value than gen_lowpart_if_possible applied to 7379: BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all 7380: BAR's equivalences. If we don't get a simplified form, make 7381: the SUBREG. It will not be used in an equivalence, but will 7382: cause two similar assignments to be detected. 7383: 7384: Note the loop below will find SUBREG_REG (DEST) since we have 7385: already entered SRC and DEST of the SET in the table. */ 7386: 7387: if (GET_CODE (dest) == SUBREG 1.1.1.7 root 7388: && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1) 7389: / UNITS_PER_WORD) 7390: == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD) 1.1 root 7391: && (GET_MODE_SIZE (GET_MODE (dest)) 7392: >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest)))) 7393: && sets[i].src_elt != 0) 7394: { 7395: enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest)); 7396: struct table_elt *elt, *classp = 0; 7397: 7398: for (elt = sets[i].src_elt->first_same_value; elt; 7399: elt = elt->next_same_value) 7400: { 7401: rtx new_src = 0; 1.1.1.7 root 7402: unsigned src_hash; 1.1 root 7403: struct table_elt *src_elt; 7404: 7405: /* Ignore invalid entries. */ 7406: if (GET_CODE (elt->exp) != REG 7407: && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) 7408: continue; 7409: 7410: new_src = gen_lowpart_if_possible (new_mode, elt->exp); 7411: if (new_src == 0) 7412: new_src = gen_rtx (SUBREG, new_mode, elt->exp, 0); 7413: 7414: src_hash = HASH (new_src, new_mode); 7415: src_elt = lookup (new_src, src_hash, new_mode); 7416: 7417: /* Put the new source in the hash table is if isn't 7418: already. */ 7419: if (src_elt == 0) 7420: { 7421: if (insert_regs (new_src, classp, 0)) 1.1.1.7 root 7422: { 7423: rehash_using_reg (new_src); 7424: src_hash = HASH (new_src, new_mode); 7425: } 1.1 root 7426: src_elt = insert (new_src, classp, src_hash, new_mode); 7427: src_elt->in_memory = elt->in_memory; 7428: src_elt->in_struct = elt->in_struct; 7429: } 7430: else if (classp && classp != src_elt->first_same_value) 7431: /* Show that two things that we've seen before are 7432: actually the same. */ 7433: merge_equiv_classes (src_elt, classp); 7434: 7435: classp = src_elt->first_same_value; 7436: } 7437: } 7438: } 7439: 7440: /* Special handling for (set REG0 REG1) 7441: where REG0 is the "cheapest", cheaper than REG1. 7442: After cse, REG1 will probably not be used in the sequel, 7443: so (if easily done) change this insn to (set REG1 REG0) and 7444: replace REG1 with REG0 in the previous insn that computed their value. 7445: Then REG1 will become a dead store and won't cloud the situation 7446: for later optimizations. 7447: 7448: Do not make this change if REG1 is a hard register, because it will 7449: then be used in the sequel and we may be changing a two-operand insn 7450: into a three-operand insn. 7451: 7452: Also do not do this if we are operating on a copy of INSN. */ 7453: 7454: if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG 7455: && NEXT_INSN (PREV_INSN (insn)) == insn 7456: && GET_CODE (SET_SRC (sets[0].rtl)) == REG 7457: && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER 7458: && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))) 7459: && (qty_first_reg[reg_qty[REGNO (SET_SRC (sets[0].rtl))]] 7460: == REGNO (SET_DEST (sets[0].rtl)))) 7461: { 7462: rtx prev = PREV_INSN (insn); 7463: while (prev && GET_CODE (prev) == NOTE) 7464: prev = PREV_INSN (prev); 7465: 7466: if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET 7467: && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl)) 7468: { 7469: rtx dest = SET_DEST (sets[0].rtl); 1.1.1.4 root 7470: rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX); 1.1 root 7471: 7472: validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1); 7473: validate_change (insn, & SET_DEST (sets[0].rtl), 7474: SET_SRC (sets[0].rtl), 1); 7475: validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1); 7476: apply_change_group (); 7477: 7478: /* If REG1 was equivalent to a constant, REG0 is not. */ 7479: if (note) 7480: PUT_REG_NOTE_KIND (note, REG_EQUAL); 7481: 7482: /* If there was a REG_WAS_0 note on PREV, remove it. Move 7483: any REG_WAS_0 note on INSN to PREV. */ 1.1.1.4 root 7484: note = find_reg_note (prev, REG_WAS_0, NULL_RTX); 1.1 root 7485: if (note) 7486: remove_note (prev, note); 7487: 1.1.1.4 root 7488: note = find_reg_note (insn, REG_WAS_0, NULL_RTX); 1.1 root 7489: if (note) 7490: { 7491: remove_note (insn, note); 7492: XEXP (note, 1) = REG_NOTES (prev); 7493: REG_NOTES (prev) = note; 7494: } 1.1.1.8 ! root 7495: ! 7496: /* If INSN has a REG_EQUAL note, and this note mentions REG0, ! 7497: then we must delete it, because the value in REG0 has changed. */ ! 7498: note = find_reg_note (insn, REG_EQUAL, NULL_RTX); ! 7499: if (note && reg_mentioned_p (dest, XEXP (note, 0))) ! 7500: remove_note (insn, note); 1.1 root 7501: } 7502: } 7503: 7504: /* If this is a conditional jump insn, record any known equivalences due to 7505: the condition being tested. */ 7506: 7507: last_jump_equiv_class = 0; 7508: if (GET_CODE (insn) == JUMP_INSN 7509: && n_sets == 1 && GET_CODE (x) == SET 7510: && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE) 7511: record_jump_equiv (insn, 0); 7512: 7513: #ifdef HAVE_cc0 7514: /* If the previous insn set CC0 and this insn no longer references CC0, 7515: delete the previous insn. Here we use the fact that nothing expects CC0 7516: to be valid over an insn, which is true until the final pass. */ 7517: if (prev_insn && GET_CODE (prev_insn) == INSN 7518: && (tem = single_set (prev_insn)) != 0 7519: && SET_DEST (tem) == cc0_rtx 7520: && ! reg_mentioned_p (cc0_rtx, x)) 7521: { 7522: PUT_CODE (prev_insn, NOTE); 7523: NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED; 7524: NOTE_SOURCE_FILE (prev_insn) = 0; 7525: } 7526: 7527: prev_insn_cc0 = this_insn_cc0; 7528: prev_insn_cc0_mode = this_insn_cc0_mode; 7529: #endif 7530: 7531: prev_insn = insn; 7532: } 7533: 7534: /* Store 1 in *WRITES_PTR for those categories of memory ref 7535: that must be invalidated when the expression WRITTEN is stored in. 7536: If WRITTEN is null, say everything must be invalidated. */ 7537: 7538: static void 7539: note_mem_written (written, writes_ptr) 7540: rtx written; 7541: struct write_data *writes_ptr; 7542: { 7543: static struct write_data everything = {0, 1, 1, 1}; 7544: 7545: if (written == 0) 7546: *writes_ptr = everything; 7547: else if (GET_CODE (written) == MEM) 7548: { 7549: /* Pushing or popping the stack invalidates just the stack pointer. */ 7550: rtx addr = XEXP (written, 0); 7551: if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 7552: || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 7553: && GET_CODE (XEXP (addr, 0)) == REG 7554: && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM) 7555: { 7556: writes_ptr->sp = 1; 7557: return; 7558: } 7559: else if (GET_MODE (written) == BLKmode) 7560: *writes_ptr = everything; 1.1.1.6 root 7561: /* (mem (scratch)) means clobber everything. */ 7562: else if (GET_CODE (addr) == SCRATCH) 7563: *writes_ptr = everything; 1.1 root 7564: else if (cse_rtx_addr_varies_p (written)) 7565: { 7566: /* A varying address that is a sum indicates an array element, 7567: and that's just as good as a structure element 1.1.1.5 root 7568: in implying that we need not invalidate scalar variables. 7569: However, we must allow QImode aliasing of scalars, because the 7570: ANSI C standard allows character pointers to alias anything. */ 7571: if (! ((MEM_IN_STRUCT_P (written) 7572: || GET_CODE (XEXP (written, 0)) == PLUS) 7573: && GET_MODE (written) != QImode)) 1.1 root 7574: writes_ptr->all = 1; 7575: writes_ptr->nonscalar = 1; 7576: } 7577: writes_ptr->var = 1; 7578: } 7579: } 7580: 7581: /* Perform invalidation on the basis of everything about an insn 7582: except for invalidating the actual places that are SET in it. 7583: This includes the places CLOBBERed, and anything that might 7584: alias with something that is SET or CLOBBERed. 7585: 7586: W points to the writes_memory for this insn, a struct write_data 7587: saying which kinds of memory references must be invalidated. 7588: X is the pattern of the insn. */ 7589: 7590: static void 7591: invalidate_from_clobbers (w, x) 7592: struct write_data *w; 7593: rtx x; 7594: { 7595: /* If W->var is not set, W specifies no action. 7596: If W->all is set, this step gets all memory refs 7597: so they can be ignored in the rest of this function. */ 7598: if (w->var) 7599: invalidate_memory (w); 7600: 7601: if (w->sp) 7602: { 7603: if (reg_tick[STACK_POINTER_REGNUM] >= 0) 7604: reg_tick[STACK_POINTER_REGNUM]++; 7605: 7606: /* This should be *very* rare. */ 7607: if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM)) 1.1.1.7 root 7608: invalidate (stack_pointer_rtx, VOIDmode); 1.1 root 7609: } 7610: 7611: if (GET_CODE (x) == CLOBBER) 7612: { 7613: rtx ref = XEXP (x, 0); 1.1.1.6 root 7614: if (ref) 7615: { 7616: if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG 7617: || (GET_CODE (ref) == MEM && ! w->all)) 1.1.1.7 root 7618: invalidate (ref, VOIDmode); 1.1.1.6 root 7619: else if (GET_CODE (ref) == STRICT_LOW_PART 7620: || GET_CODE (ref) == ZERO_EXTRACT) 1.1.1.7 root 7621: invalidate (XEXP (ref, 0), GET_MODE (ref)); 1.1.1.6 root 7622: } 1.1 root 7623: } 7624: else if (GET_CODE (x) == PARALLEL) 7625: { 7626: register int i; 7627: for (i = XVECLEN (x, 0) - 1; i >= 0; i--) 7628: { 7629: register rtx y = XVECEXP (x, 0, i); 7630: if (GET_CODE (y) == CLOBBER) 7631: { 7632: rtx ref = XEXP (y, 0); 1.1.1.6 root 7633: if (ref) 7634: { 7635: if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG 7636: || (GET_CODE (ref) == MEM && !w->all)) 1.1.1.7 root 7637: invalidate (ref, VOIDmode); 1.1.1.6 root 7638: else if (GET_CODE (ref) == STRICT_LOW_PART 7639: || GET_CODE (ref) == ZERO_EXTRACT) 1.1.1.7 root 7640: invalidate (XEXP (ref, 0), GET_MODE (ref)); 1.1.1.6 root 7641: } 1.1 root 7642: } 7643: } 7644: } 7645: } 7646: 7647: /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes 7648: and replace any registers in them with either an equivalent constant 7649: or the canonical form of the register. If we are inside an address, 7650: only do this if the address remains valid. 7651: 7652: OBJECT is 0 except when within a MEM in which case it is the MEM. 7653: 7654: Return the replacement for X. */ 7655: 7656: static rtx 7657: cse_process_notes (x, object) 7658: rtx x; 7659: rtx object; 7660: { 7661: enum rtx_code code = GET_CODE (x); 7662: char *fmt = GET_RTX_FORMAT (code); 7663: int i; 7664: 7665: switch (code) 7666: { 7667: case CONST_INT: 7668: case CONST: 7669: case SYMBOL_REF: 7670: case LABEL_REF: 7671: case CONST_DOUBLE: 7672: case PC: 7673: case CC0: 7674: case LO_SUM: 7675: return x; 7676: 7677: case MEM: 7678: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x); 7679: return x; 7680: 7681: case EXPR_LIST: 7682: case INSN_LIST: 7683: if (REG_NOTE_KIND (x) == REG_EQUAL) 1.1.1.4 root 7684: XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX); 1.1 root 7685: if (XEXP (x, 1)) 1.1.1.4 root 7686: XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX); 1.1 root 7687: return x; 7688: 1.1.1.3 root 7689: case SIGN_EXTEND: 7690: case ZERO_EXTEND: 7691: { 7692: rtx new = cse_process_notes (XEXP (x, 0), object); 7693: /* We don't substitute VOIDmode constants into these rtx, 7694: since they would impede folding. */ 7695: if (GET_MODE (new) != VOIDmode) 7696: validate_change (object, &XEXP (x, 0), new, 0); 7697: return x; 7698: } 7699: 1.1 root 7700: case REG: 7701: i = reg_qty[REGNO (x)]; 7702: 7703: /* Return a constant or a constant register. */ 7704: if (REGNO_QTY_VALID_P (REGNO (x)) 7705: && qty_const[i] != 0 7706: && (CONSTANT_P (qty_const[i]) 7707: || GET_CODE (qty_const[i]) == REG)) 7708: { 7709: rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]); 7710: if (new) 7711: return new; 7712: } 7713: 7714: /* Otherwise, canonicalize this register. */ 1.1.1.4 root 7715: return canon_reg (x, NULL_RTX); 1.1 root 7716: } 7717: 7718: for (i = 0; i < GET_RTX_LENGTH (code); i++) 7719: if (fmt[i] == 'e') 7720: validate_change (object, &XEXP (x, i), 1.1.1.5 root 7721: cse_process_notes (XEXP (x, i), object), 0); 1.1 root 7722: 7723: return x; 7724: } 7725: 7726: /* Find common subexpressions between the end test of a loop and the beginning 7727: of the loop. LOOP_START is the CODE_LABEL at the start of a loop. 7728: 7729: Often we have a loop where an expression in the exit test is used 7730: in the body of the loop. For example "while (*p) *q++ = *p++;". 7731: Because of the way we duplicate the loop exit test in front of the loop, 7732: however, we don't detect that common subexpression. This will be caught 7733: when global cse is implemented, but this is a quite common case. 7734: 7735: This function handles the most common cases of these common expressions. 7736: It is called after we have processed the basic block ending with the 7737: NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN 7738: jumps to a label used only once. */ 7739: 7740: static void 7741: cse_around_loop (loop_start) 7742: rtx loop_start; 7743: { 7744: rtx insn; 7745: int i; 7746: struct table_elt *p; 7747: 7748: /* If the jump at the end of the loop doesn't go to the start, we don't 7749: do anything. */ 7750: for (insn = PREV_INSN (loop_start); 7751: insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0); 7752: insn = PREV_INSN (insn)) 7753: ; 7754: 7755: if (insn == 0 7756: || GET_CODE (insn) != NOTE 7757: || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG) 7758: return; 7759: 7760: /* If the last insn of the loop (the end test) was an NE comparison, 7761: we will interpret it as an EQ comparison, since we fell through 1.1.1.4 root 7762: the loop. Any equivalences resulting from that comparison are 1.1 root 7763: therefore not valid and must be invalidated. */ 7764: if (last_jump_equiv_class) 7765: for (p = last_jump_equiv_class->first_same_value; p; 7766: p = p->next_same_value) 7767: if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG 1.1.1.7 root 7768: || (GET_CODE (p->exp) == SUBREG 7769: && GET_CODE (SUBREG_REG (p->exp)) == REG)) 7770: invalidate (p->exp, VOIDmode); 1.1.1.6 root 7771: else if (GET_CODE (p->exp) == STRICT_LOW_PART 7772: || GET_CODE (p->exp) == ZERO_EXTRACT) 1.1.1.7 root 7773: invalidate (XEXP (p->exp, 0), GET_MODE (p->exp)); 1.1 root 7774: 7775: /* Process insns starting after LOOP_START until we hit a CALL_INSN or 7776: a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it). 7777: 7778: The only thing we do with SET_DEST is invalidate entries, so we 7779: can safely process each SET in order. It is slightly less efficient 7780: to do so, but we only want to handle the most common cases. */ 7781: 7782: for (insn = NEXT_INSN (loop_start); 7783: GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL 7784: && ! (GET_CODE (insn) == NOTE 7785: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END); 7786: insn = NEXT_INSN (insn)) 7787: { 7788: if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 7789: && (GET_CODE (PATTERN (insn)) == SET 7790: || GET_CODE (PATTERN (insn)) == CLOBBER)) 7791: cse_set_around_loop (PATTERN (insn), insn, loop_start); 7792: else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 7793: && GET_CODE (PATTERN (insn)) == PARALLEL) 7794: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) 7795: if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET 7796: || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER) 7797: cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn, 7798: loop_start); 7799: } 7800: } 7801: 1.1.1.3 root 7802: /* Variable used for communications between the next two routines. */ 7803: 7804: static struct write_data skipped_writes_memory; 7805: 7806: /* Process one SET of an insn that was skipped. We ignore CLOBBERs 7807: since they are done elsewhere. This function is called via note_stores. */ 7808: 7809: static void 7810: invalidate_skipped_set (dest, set) 7811: rtx set; 7812: rtx dest; 7813: { 7814: if (GET_CODE (set) == CLOBBER 7815: #ifdef HAVE_cc0 7816: || dest == cc0_rtx 7817: #endif 7818: || dest == pc_rtx) 7819: return; 7820: 7821: if (GET_CODE (dest) == MEM) 7822: note_mem_written (dest, &skipped_writes_memory); 7823: 1.1.1.5 root 7824: /* There are times when an address can appear varying and be a PLUS 7825: during this scan when it would be a fixed address were we to know 7826: the proper equivalences. So promote "nonscalar" to be "all". */ 7827: if (skipped_writes_memory.nonscalar) 7828: skipped_writes_memory.all = 1; 7829: 1.1.1.3 root 7830: if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG 7831: || (! skipped_writes_memory.all && ! cse_rtx_addr_varies_p (dest))) 1.1.1.7 root 7832: invalidate (dest, VOIDmode); 1.1.1.6 root 7833: else if (GET_CODE (dest) == STRICT_LOW_PART 7834: || GET_CODE (dest) == ZERO_EXTRACT) 1.1.1.7 root 7835: invalidate (XEXP (dest, 0), GET_MODE (dest)); 1.1.1.3 root 7836: } 7837: 7838: /* Invalidate all insns from START up to the end of the function or the 7839: next label. This called when we wish to CSE around a block that is 7840: conditionally executed. */ 7841: 7842: static void 7843: invalidate_skipped_block (start) 7844: rtx start; 7845: { 7846: rtx insn; 7847: static struct write_data init = {0, 0, 0, 0}; 7848: static struct write_data everything = {0, 1, 1, 1}; 7849: 7850: for (insn = start; insn && GET_CODE (insn) != CODE_LABEL; 7851: insn = NEXT_INSN (insn)) 7852: { 7853: if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') 7854: continue; 7855: 7856: skipped_writes_memory = init; 7857: 7858: if (GET_CODE (insn) == CALL_INSN) 7859: { 7860: invalidate_for_call (); 7861: skipped_writes_memory = everything; 7862: } 7863: 7864: note_stores (PATTERN (insn), invalidate_skipped_set); 7865: invalidate_from_clobbers (&skipped_writes_memory, PATTERN (insn)); 7866: } 7867: } 7868: 1.1 root 7869: /* Used for communication between the following two routines; contains a 7870: value to be checked for modification. */ 7871: 7872: static rtx cse_check_loop_start_value; 7873: 7874: /* If modifying X will modify the value in CSE_CHECK_LOOP_START_VALUE, 7875: indicate that fact by setting CSE_CHECK_LOOP_START_VALUE to 0. */ 7876: 7877: static void 7878: cse_check_loop_start (x, set) 7879: rtx x; 7880: rtx set; 7881: { 7882: if (cse_check_loop_start_value == 0 7883: || GET_CODE (x) == CC0 || GET_CODE (x) == PC) 7884: return; 7885: 7886: if ((GET_CODE (x) == MEM && GET_CODE (cse_check_loop_start_value) == MEM) 7887: || reg_overlap_mentioned_p (x, cse_check_loop_start_value)) 7888: cse_check_loop_start_value = 0; 7889: } 7890: 7891: /* X is a SET or CLOBBER contained in INSN that was found near the start of 7892: a loop that starts with the label at LOOP_START. 7893: 7894: If X is a SET, we see if its SET_SRC is currently in our hash table. 7895: If so, we see if it has a value equal to some register used only in the 7896: loop exit code (as marked by jump.c). 7897: 7898: If those two conditions are true, we search backwards from the start of 7899: the loop to see if that same value was loaded into a register that still 7900: retains its value at the start of the loop. 7901: 7902: If so, we insert an insn after the load to copy the destination of that 7903: load into the equivalent register and (try to) replace our SET_SRC with that 7904: register. 7905: 7906: In any event, we invalidate whatever this SET or CLOBBER modifies. */ 7907: 7908: static void 7909: cse_set_around_loop (x, insn, loop_start) 7910: rtx x; 7911: rtx insn; 7912: rtx loop_start; 7913: { 7914: struct table_elt *src_elt; 7915: static struct write_data init = {0, 0, 0, 0}; 7916: struct write_data writes_memory; 7917: 7918: writes_memory = init; 7919: 7920: /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that 7921: are setting PC or CC0 or whose SET_SRC is already a register. */ 7922: if (GET_CODE (x) == SET 7923: && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0 7924: && GET_CODE (SET_SRC (x)) != REG) 7925: { 7926: src_elt = lookup (SET_SRC (x), 7927: HASH (SET_SRC (x), GET_MODE (SET_DEST (x))), 7928: GET_MODE (SET_DEST (x))); 7929: 7930: if (src_elt) 7931: for (src_elt = src_elt->first_same_value; src_elt; 7932: src_elt = src_elt->next_same_value) 7933: if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp) 7934: && COST (src_elt->exp) < COST (SET_SRC (x))) 7935: { 7936: rtx p, set; 7937: 7938: /* Look for an insn in front of LOOP_START that sets 7939: something in the desired mode to SET_SRC (x) before we hit 7940: a label or CALL_INSN. */ 7941: 7942: for (p = prev_nonnote_insn (loop_start); 7943: p && GET_CODE (p) != CALL_INSN 7944: && GET_CODE (p) != CODE_LABEL; 7945: p = prev_nonnote_insn (p)) 7946: if ((set = single_set (p)) != 0 7947: && GET_CODE (SET_DEST (set)) == REG 7948: && GET_MODE (SET_DEST (set)) == src_elt->mode 7949: && rtx_equal_p (SET_SRC (set), SET_SRC (x))) 7950: { 7951: /* We now have to ensure that nothing between P 7952: and LOOP_START modified anything referenced in 7953: SET_SRC (x). We know that nothing within the loop 7954: can modify it, or we would have invalidated it in 7955: the hash table. */ 7956: rtx q; 7957: 7958: cse_check_loop_start_value = SET_SRC (x); 7959: for (q = p; q != loop_start; q = NEXT_INSN (q)) 7960: if (GET_RTX_CLASS (GET_CODE (q)) == 'i') 7961: note_stores (PATTERN (q), cse_check_loop_start); 7962: 7963: /* If nothing was changed and we can replace our 7964: SET_SRC, add an insn after P to copy its destination 7965: to what we will be replacing SET_SRC with. */ 7966: if (cse_check_loop_start_value 7967: && validate_change (insn, &SET_SRC (x), 7968: src_elt->exp, 0)) 7969: emit_insn_after (gen_move_insn (src_elt->exp, 7970: SET_DEST (set)), 7971: p); 7972: break; 7973: } 7974: } 7975: } 7976: 7977: /* Now invalidate anything modified by X. */ 7978: note_mem_written (SET_DEST (x), &writes_memory); 7979: 7980: if (writes_memory.var) 7981: invalidate_memory (&writes_memory); 7982: 7983: /* See comment on similar code in cse_insn for explanation of these tests. */ 7984: if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG 7985: || (GET_CODE (SET_DEST (x)) == MEM && ! writes_memory.all 7986: && ! cse_rtx_addr_varies_p (SET_DEST (x)))) 1.1.1.7 root 7987: invalidate (SET_DEST (x), VOIDmode); 1.1.1.6 root 7988: else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART 7989: || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT) 1.1.1.7 root 7990: invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x))); 1.1 root 7991: } 7992: 7993: /* Find the end of INSN's basic block and return its range, 7994: the total number of SETs in all the insns of the block, the last insn of the 7995: block, and the branch path. 7996: 7997: The branch path indicates which branches should be followed. If a non-zero 7998: path size is specified, the block should be rescanned and a different set 7999: of branches will be taken. The branch path is only used if 1.1.1.3 root 8000: FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero. 1.1 root 8001: 8002: DATA is a pointer to a struct cse_basic_block_data, defined below, that is 8003: used to describe the block. It is filled in with the information about 8004: the current block. The incoming structure's branch path, if any, is used 8005: to construct the output branch path. */ 8006: 8007: void 1.1.1.3 root 8008: cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) 1.1 root 8009: rtx insn; 8010: struct cse_basic_block_data *data; 8011: int follow_jumps; 8012: int after_loop; 1.1.1.3 root 8013: int skip_blocks; 1.1 root 8014: { 8015: rtx p = insn, q; 8016: int nsets = 0; 8017: int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn); 1.1.1.3 root 8018: rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn); 1.1 root 8019: int path_size = data->path_size; 8020: int path_entry = 0; 8021: int i; 8022: 8023: /* Update the previous branch path, if any. If the last branch was 8024: previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN, 8025: shorten the path by one and look at the previous branch. We know that 8026: at least one branch must have been taken if PATH_SIZE is non-zero. */ 8027: while (path_size > 0) 8028: { 1.1.1.3 root 8029: if (data->path[path_size - 1].status != NOT_TAKEN) 1.1 root 8030: { 8031: data->path[path_size - 1].status = NOT_TAKEN; 8032: break; 8033: } 8034: else 8035: path_size--; 8036: } 8037: 8038: /* Scan to end of this basic block. */ 8039: while (p && GET_CODE (p) != CODE_LABEL) 8040: { 8041: /* Don't cse out the end of a loop. This makes a difference 8042: only for the unusual loops that always execute at least once; 8043: all other loops have labels there so we will stop in any case. 8044: Cse'ing out the end of the loop is dangerous because it 8045: might cause an invariant expression inside the loop 8046: to be reused after the end of the loop. This would make it 8047: hard to move the expression out of the loop in loop.c, 8048: especially if it is one of several equivalent expressions 8049: and loop.c would like to eliminate it. 8050: 8051: If we are running after loop.c has finished, we can ignore 8052: the NOTE_INSN_LOOP_END. */ 8053: 8054: if (! after_loop && GET_CODE (p) == NOTE 8055: && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END) 8056: break; 8057: 8058: /* Don't cse over a call to setjmp; on some machines (eg vax) 8059: the regs restored by the longjmp come from 8060: a later time than the setjmp. */ 8061: if (GET_CODE (p) == NOTE 8062: && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP) 8063: break; 8064: 8065: /* A PARALLEL can have lots of SETs in it, 8066: especially if it is really an ASM_OPERANDS. */ 8067: if (GET_RTX_CLASS (GET_CODE (p)) == 'i' 8068: && GET_CODE (PATTERN (p)) == PARALLEL) 8069: nsets += XVECLEN (PATTERN (p), 0); 8070: else if (GET_CODE (p) != NOTE) 8071: nsets += 1; 8072: 1.1.1.4 root 8073: /* Ignore insns made by CSE; they cannot affect the boundaries of 8074: the basic block. */ 8075: 8076: if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid) 1.1.1.3 root 8077: high_cuid = INSN_CUID (p); 1.1.1.4 root 8078: if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid) 8079: low_cuid = INSN_CUID (p); 1.1 root 8080: 8081: /* See if this insn is in our branch path. If it is and we are to 8082: take it, do so. */ 8083: if (path_entry < path_size && data->path[path_entry].branch == p) 8084: { 1.1.1.3 root 8085: if (data->path[path_entry].status != NOT_TAKEN) 1.1 root 8086: p = JUMP_LABEL (p); 8087: 8088: /* Point to next entry in path, if any. */ 8089: path_entry++; 8090: } 8091: 8092: /* If this is a conditional jump, we can follow it if -fcse-follow-jumps 8093: was specified, we haven't reached our maximum path length, there are 8094: insns following the target of the jump, this is the only use of the 1.1.1.3 root 8095: jump label, and the target label is preceded by a BARRIER. 8096: 8097: Alternatively, we can follow the jump if it branches around a 8098: block of code and there are no other branches into the block. 8099: In this case invalidate_skipped_block will be called to invalidate any 8100: registers set in the block when following the jump. */ 8101: 8102: else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1 1.1 root 8103: && GET_CODE (p) == JUMP_INSN 8104: && GET_CODE (PATTERN (p)) == SET 8105: && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE 8106: && LABEL_NUSES (JUMP_LABEL (p)) == 1 8107: && NEXT_INSN (JUMP_LABEL (p)) != 0) 8108: { 8109: for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q)) 8110: if ((GET_CODE (q) != NOTE 8111: || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END 8112: || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP) 8113: && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0)) 8114: break; 8115: 8116: /* If we ran into a BARRIER, this code is an extension of the 8117: basic block when the branch is taken. */ 1.1.1.3 root 8118: if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER) 1.1 root 8119: { 8120: /* Don't allow ourself to keep walking around an 8121: always-executed loop. */ 1.1.1.3 root 8122: if (next_real_insn (q) == next) 8123: { 8124: p = NEXT_INSN (p); 8125: continue; 8126: } 1.1 root 8127: 8128: /* Similarly, don't put a branch in our path more than once. */ 8129: for (i = 0; i < path_entry; i++) 8130: if (data->path[i].branch == p) 8131: break; 8132: 8133: if (i != path_entry) 8134: break; 8135: 8136: data->path[path_entry].branch = p; 8137: data->path[path_entry++].status = TAKEN; 8138: 8139: /* This branch now ends our path. It was possible that we 8140: didn't see this branch the last time around (when the 8141: insn in front of the target was a JUMP_INSN that was 8142: turned into a no-op). */ 8143: path_size = path_entry; 8144: 8145: p = JUMP_LABEL (p); 8146: /* Mark block so we won't scan it again later. */ 8147: PUT_MODE (NEXT_INSN (p), QImode); 8148: } 1.1.1.3 root 8149: /* Detect a branch around a block of code. */ 8150: else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL) 8151: { 8152: register rtx tmp; 8153: 8154: if (next_real_insn (q) == next) 8155: { 8156: p = NEXT_INSN (p); 8157: continue; 8158: } 8159: 8160: for (i = 0; i < path_entry; i++) 8161: if (data->path[i].branch == p) 8162: break; 8163: 8164: if (i != path_entry) 8165: break; 8166: 8167: /* This is no_labels_between_p (p, q) with an added check for 8168: reaching the end of a function (in case Q precedes P). */ 8169: for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) 8170: if (GET_CODE (tmp) == CODE_LABEL) 8171: break; 8172: 8173: if (tmp == q) 8174: { 8175: data->path[path_entry].branch = p; 8176: data->path[path_entry++].status = AROUND; 8177: 8178: path_size = path_entry; 8179: 8180: p = JUMP_LABEL (p); 8181: /* Mark block so we won't scan it again later. */ 8182: PUT_MODE (NEXT_INSN (p), QImode); 8183: } 8184: } 1.1 root 8185: } 8186: p = NEXT_INSN (p); 8187: } 8188: 8189: data->low_cuid = low_cuid; 8190: data->high_cuid = high_cuid; 8191: data->nsets = nsets; 8192: data->last = p; 8193: 8194: /* If all jumps in the path are not taken, set our path length to zero 8195: so a rescan won't be done. */ 8196: for (i = path_size - 1; i >= 0; i--) 1.1.1.3 root 8197: if (data->path[i].status != NOT_TAKEN) 1.1 root 8198: break; 8199: 8200: if (i == -1) 8201: data->path_size = 0; 8202: else 8203: data->path_size = path_size; 8204: 8205: /* End the current branch path. */ 8206: data->path[path_size].branch = 0; 8207: } 8208: 8209: /* Perform cse on the instructions of a function. 8210: F is the first instruction. 8211: NREGS is one plus the highest pseudo-reg number used in the instruction. 8212: 8213: AFTER_LOOP is 1 if this is the cse call done after loop optimization 8214: (only if -frerun-cse-after-loop). 8215: 8216: Returns 1 if jump_optimize should be redone due to simplifications 8217: in conditional jump instructions. */ 8218: 8219: int 8220: cse_main (f, nregs, after_loop, file) 8221: rtx f; 8222: int nregs; 8223: int after_loop; 8224: FILE *file; 8225: { 8226: struct cse_basic_block_data val; 8227: register rtx insn = f; 8228: register int i; 8229: 8230: cse_jumps_altered = 0; 1.1.1.8 ! root 8231: recorded_label_ref = 0; 1.1 root 8232: constant_pool_entries_cost = 0; 8233: val.path_size = 0; 8234: 8235: init_recog (); 8236: 8237: max_reg = nregs; 8238: 8239: all_minus_one = (int *) alloca (nregs * sizeof (int)); 8240: consec_ints = (int *) alloca (nregs * sizeof (int)); 8241: 8242: for (i = 0; i < nregs; i++) 8243: { 8244: all_minus_one[i] = -1; 8245: consec_ints[i] = i; 8246: } 8247: 8248: reg_next_eqv = (int *) alloca (nregs * sizeof (int)); 8249: reg_prev_eqv = (int *) alloca (nregs * sizeof (int)); 8250: reg_qty = (int *) alloca (nregs * sizeof (int)); 8251: reg_in_table = (int *) alloca (nregs * sizeof (int)); 8252: reg_tick = (int *) alloca (nregs * sizeof (int)); 8253: 1.1.1.7 root 8254: #ifdef LOAD_EXTEND_OP 8255: 8256: /* Allocate scratch rtl here. cse_insn will fill in the memory reference 8257: and change the code and mode as appropriate. */ 8258: memory_extend_rtx = gen_rtx (ZERO_EXTEND, VOIDmode, 0); 8259: #endif 8260: 1.1 root 8261: /* Discard all the free elements of the previous function 8262: since they are allocated in the temporarily obstack. */ 1.1.1.7 root 8263: bzero ((char *) table, sizeof table); 1.1 root 8264: free_element_chain = 0; 8265: n_elements_made = 0; 8266: 8267: /* Find the largest uid. */ 8268: 1.1.1.4 root 8269: max_uid = get_max_uid (); 8270: uid_cuid = (int *) alloca ((max_uid + 1) * sizeof (int)); 1.1.1.7 root 8271: bzero ((char *) uid_cuid, (max_uid + 1) * sizeof (int)); 1.1 root 8272: 8273: /* Compute the mapping from uids to cuids. 8274: CUIDs are numbers assigned to insns, like uids, 8275: except that cuids increase monotonically through the code. 8276: Don't assign cuids to line-number NOTEs, so that the distance in cuids 8277: between two insns is not affected by -g. */ 8278: 8279: for (insn = f, i = 0; insn; insn = NEXT_INSN (insn)) 8280: { 8281: if (GET_CODE (insn) != NOTE 8282: || NOTE_LINE_NUMBER (insn) < 0) 8283: INSN_CUID (insn) = ++i; 8284: else 8285: /* Give a line number note the same cuid as preceding insn. */ 8286: INSN_CUID (insn) = i; 8287: } 8288: 8289: /* Initialize which registers are clobbered by calls. */ 8290: 8291: CLEAR_HARD_REG_SET (regs_invalidated_by_call); 8292: 8293: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 8294: if ((call_used_regs[i] 8295: /* Used to check !fixed_regs[i] here, but that isn't safe; 8296: fixed regs are still call-clobbered, and sched can get 8297: confused if they can "live across calls". 8298: 8299: The frame pointer is always preserved across calls. The arg 8300: pointer is if it is fixed. The stack pointer usually is, unless 8301: RETURN_POPS_ARGS, in which case an explicit CLOBBER 8302: will be present. If we are generating PIC code, the PIC offset 8303: table register is preserved across calls. */ 8304: 8305: && i != STACK_POINTER_REGNUM 8306: && i != FRAME_POINTER_REGNUM 1.1.1.6 root 8307: #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 8308: && i != HARD_FRAME_POINTER_REGNUM 8309: #endif 1.1 root 8310: #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM 8311: && ! (i == ARG_POINTER_REGNUM && fixed_regs[i]) 8312: #endif 1.1.1.7 root 8313: #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED) 1.1 root 8314: && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic) 8315: #endif 8316: ) 8317: || global_regs[i]) 8318: SET_HARD_REG_BIT (regs_invalidated_by_call, i); 8319: 8320: /* Loop over basic blocks. 8321: Compute the maximum number of qty's needed for each basic block 8322: (which is 2 for each SET). */ 8323: insn = f; 8324: while (insn) 8325: { 1.1.1.3 root 8326: cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop, 8327: flag_cse_skip_blocks); 1.1 root 8328: 8329: /* If this basic block was already processed or has no sets, skip it. */ 8330: if (val.nsets == 0 || GET_MODE (insn) == QImode) 8331: { 8332: PUT_MODE (insn, VOIDmode); 8333: insn = (val.last ? NEXT_INSN (val.last) : 0); 8334: val.path_size = 0; 8335: continue; 8336: } 8337: 8338: cse_basic_block_start = val.low_cuid; 8339: cse_basic_block_end = val.high_cuid; 8340: max_qty = val.nsets * 2; 8341: 8342: if (file) 8343: fprintf (file, ";; Processing block from %d to %d, %d sets.\n", 8344: INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, 8345: val.nsets); 8346: 8347: /* Make MAX_QTY bigger to give us room to optimize 8348: past the end of this basic block, if that should prove useful. */ 8349: if (max_qty < 500) 8350: max_qty = 500; 8351: 8352: max_qty += max_reg; 8353: 8354: /* If this basic block is being extended by following certain jumps, 8355: (see `cse_end_of_basic_block'), we reprocess the code from the start. 8356: Otherwise, we start after this basic block. */ 8357: if (val.path_size > 0) 8358: cse_basic_block (insn, val.last, val.path, 0); 8359: else 8360: { 8361: int old_cse_jumps_altered = cse_jumps_altered; 8362: rtx temp; 8363: 8364: /* When cse changes a conditional jump to an unconditional 8365: jump, we want to reprocess the block, since it will give 8366: us a new branch path to investigate. */ 8367: cse_jumps_altered = 0; 8368: temp = cse_basic_block (insn, val.last, val.path, ! after_loop); 1.1.1.3 root 8369: if (cse_jumps_altered == 0 8370: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) 1.1 root 8371: insn = temp; 8372: 8373: cse_jumps_altered |= old_cse_jumps_altered; 8374: } 8375: 8376: #ifdef USE_C_ALLOCA 8377: alloca (0); 8378: #endif 8379: } 8380: 8381: /* Tell refers_to_mem_p that qty_const info is not available. */ 8382: qty_const = 0; 8383: 8384: if (max_elements_made < n_elements_made) 8385: max_elements_made = n_elements_made; 8386: 1.1.1.8 ! root 8387: return cse_jumps_altered || recorded_label_ref; 1.1 root 8388: } 8389: 8390: /* Process a single basic block. FROM and TO and the limits of the basic 8391: block. NEXT_BRANCH points to the branch path when following jumps or 8392: a null path when not following jumps. 8393: 8394: AROUND_LOOP is non-zero if we are to try to cse around to the start of a 8395: loop. This is true when we are being called for the last time on a 8396: block and this CSE pass is before loop.c. */ 8397: 8398: static rtx 8399: cse_basic_block (from, to, next_branch, around_loop) 8400: register rtx from, to; 8401: struct branch_path *next_branch; 8402: int around_loop; 8403: { 8404: register rtx insn; 8405: int to_usage = 0; 8406: int in_libcall_block = 0; 8407: 8408: /* Each of these arrays is undefined before max_reg, so only allocate 8409: the space actually needed and adjust the start below. */ 8410: 8411: qty_first_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); 8412: qty_last_reg = (int *) alloca ((max_qty - max_reg) * sizeof (int)); 8413: qty_mode= (enum machine_mode *) alloca ((max_qty - max_reg) * sizeof (enum machine_mode)); 8414: qty_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); 8415: qty_const_insn = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); 8416: qty_comparison_code 8417: = (enum rtx_code *) alloca ((max_qty - max_reg) * sizeof (enum rtx_code)); 8418: qty_comparison_qty = (int *) alloca ((max_qty - max_reg) * sizeof (int)); 8419: qty_comparison_const = (rtx *) alloca ((max_qty - max_reg) * sizeof (rtx)); 8420: 8421: qty_first_reg -= max_reg; 8422: qty_last_reg -= max_reg; 8423: qty_mode -= max_reg; 8424: qty_const -= max_reg; 8425: qty_const_insn -= max_reg; 8426: qty_comparison_code -= max_reg; 8427: qty_comparison_qty -= max_reg; 8428: qty_comparison_const -= max_reg; 8429: 8430: new_basic_block (); 8431: 8432: /* TO might be a label. If so, protect it from being deleted. */ 8433: if (to != 0 && GET_CODE (to) == CODE_LABEL) 8434: ++LABEL_NUSES (to); 8435: 8436: for (insn = from; insn != to; insn = NEXT_INSN (insn)) 8437: { 8438: register enum rtx_code code; 8439: 8440: /* See if this is a branch that is part of the path. If so, and it is 8441: to be taken, do so. */ 8442: if (next_branch->branch == insn) 8443: { 1.1.1.3 root 8444: enum taken status = next_branch++->status; 8445: if (status != NOT_TAKEN) 1.1 root 8446: { 1.1.1.3 root 8447: if (status == TAKEN) 8448: record_jump_equiv (insn, 1); 8449: else 8450: invalidate_skipped_block (NEXT_INSN (insn)); 8451: 1.1 root 8452: /* Set the last insn as the jump insn; it doesn't affect cc0. 8453: Then follow this branch. */ 8454: #ifdef HAVE_cc0 8455: prev_insn_cc0 = 0; 8456: #endif 8457: prev_insn = insn; 8458: insn = JUMP_LABEL (insn); 8459: continue; 8460: } 8461: } 8462: 8463: code = GET_CODE (insn); 8464: if (GET_MODE (insn) == QImode) 8465: PUT_MODE (insn, VOIDmode); 8466: 8467: if (GET_RTX_CLASS (code) == 'i') 8468: { 8469: /* Process notes first so we have all notes in canonical forms when 8470: looking for duplicate operations. */ 8471: 8472: if (REG_NOTES (insn)) 1.1.1.4 root 8473: REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX); 1.1 root 8474: 8475: /* Track when we are inside in LIBCALL block. Inside such a block, 8476: we do not want to record destinations. The last insn of a 8477: LIBCALL block is not considered to be part of the block, since 1.1.1.3 root 8478: its destination is the result of the block and hence should be 1.1 root 8479: recorded. */ 8480: 1.1.1.4 root 8481: if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) 1.1 root 8482: in_libcall_block = 1; 1.1.1.4 root 8483: else if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) 1.1 root 8484: in_libcall_block = 0; 8485: 8486: cse_insn (insn, in_libcall_block); 8487: } 8488: 8489: /* If INSN is now an unconditional jump, skip to the end of our 8490: basic block by pretending that we just did the last insn in the 8491: basic block. If we are jumping to the end of our block, show 8492: that we can have one usage of TO. */ 8493: 8494: if (simplejump_p (insn)) 8495: { 8496: if (to == 0) 8497: return 0; 8498: 8499: if (JUMP_LABEL (insn) == to) 8500: to_usage = 1; 8501: 1.1.1.3 root 8502: /* Maybe TO was deleted because the jump is unconditional. 8503: If so, there is nothing left in this basic block. */ 8504: /* ??? Perhaps it would be smarter to set TO 8505: to whatever follows this insn, 8506: and pretend the basic block had always ended here. */ 8507: if (INSN_DELETED_P (to)) 8508: break; 8509: 1.1 root 8510: insn = PREV_INSN (to); 8511: } 8512: 8513: /* See if it is ok to keep on going past the label 8514: which used to end our basic block. Remember that we incremented 1.1.1.2 root 8515: the count of that label, so we decrement it here. If we made 1.1 root 8516: a jump unconditional, TO_USAGE will be one; in that case, we don't 8517: want to count the use in that jump. */ 8518: 8519: if (to != 0 && NEXT_INSN (insn) == to 8520: && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage) 8521: { 8522: struct cse_basic_block_data val; 1.1.1.8 ! root 8523: rtx prev; 1.1 root 8524: 8525: insn = NEXT_INSN (to); 8526: 8527: if (LABEL_NUSES (to) == 0) 1.1.1.8 ! root 8528: insn = delete_insn (to); 1.1 root 8529: 1.1.1.8 ! root 8530: /* If TO was the last insn in the function, we are done. */ ! 8531: if (insn == 0) 1.1 root 8532: return 0; 8533: 1.1.1.8 ! root 8534: /* If TO was preceded by a BARRIER we are done with this block ! 8535: because it has no continuation. */ ! 8536: prev = prev_nonnote_insn (to); ! 8537: if (prev && GET_CODE (prev) == BARRIER) ! 8538: return insn; ! 8539: ! 8540: /* Find the end of the following block. Note that we won't be ! 8541: following branches in this case. */ 1.1 root 8542: to_usage = 0; 8543: val.path_size = 0; 1.1.1.3 root 8544: cse_end_of_basic_block (insn, &val, 0, 0, 0); 1.1 root 8545: 8546: /* If the tables we allocated have enough space left 8547: to handle all the SETs in the next basic block, 8548: continue through it. Otherwise, return, 8549: and that block will be scanned individually. */ 8550: if (val.nsets * 2 + next_qty > max_qty) 8551: break; 8552: 8553: cse_basic_block_start = val.low_cuid; 8554: cse_basic_block_end = val.high_cuid; 8555: to = val.last; 8556: 8557: /* Prevent TO from being deleted if it is a label. */ 8558: if (to != 0 && GET_CODE (to) == CODE_LABEL) 8559: ++LABEL_NUSES (to); 8560: 8561: /* Back up so we process the first insn in the extension. */ 8562: insn = PREV_INSN (insn); 8563: } 8564: } 8565: 8566: if (next_qty > max_qty) 8567: abort (); 8568: 8569: /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and 8570: the previous insn is the only insn that branches to the head of a loop, 8571: we can cse into the loop. Don't do this if we changed the jump 8572: structure of a loop unless we aren't going to be following jumps. */ 8573: 1.1.1.3 root 8574: if ((cse_jumps_altered == 0 8575: || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0)) 1.1 root 8576: && around_loop && to != 0 8577: && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END 8578: && GET_CODE (PREV_INSN (to)) == JUMP_INSN 8579: && JUMP_LABEL (PREV_INSN (to)) != 0 8580: && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1) 8581: cse_around_loop (JUMP_LABEL (PREV_INSN (to))); 8582: 8583: return to ? NEXT_INSN (to) : 0; 8584: } 8585: 8586: /* Count the number of times registers are used (not set) in X. 8587: COUNTS is an array in which we accumulate the count, INCR is how much 1.1.1.7 root 8588: we count each register usage. 8589: 8590: Don't count a usage of DEST, which is the SET_DEST of a SET which 8591: contains X in its SET_SRC. This is because such a SET does not 8592: modify the liveness of DEST. */ 1.1 root 8593: 8594: static void 1.1.1.7 root 8595: count_reg_usage (x, counts, dest, incr) 1.1 root 8596: rtx x; 8597: int *counts; 1.1.1.7 root 8598: rtx dest; 1.1 root 8599: int incr; 8600: { 1.1.1.7 root 8601: enum rtx_code code; 1.1 root 8602: char *fmt; 8603: int i, j; 8604: 1.1.1.7 root 8605: if (x == 0) 8606: return; 8607: 8608: switch (code = GET_CODE (x)) 1.1 root 8609: { 8610: case REG: 1.1.1.7 root 8611: if (x != dest) 8612: counts[REGNO (x)] += incr; 1.1 root 8613: return; 8614: 8615: case PC: 8616: case CC0: 8617: case CONST: 8618: case CONST_INT: 8619: case CONST_DOUBLE: 8620: case SYMBOL_REF: 8621: case LABEL_REF: 8622: case CLOBBER: 8623: return; 8624: 8625: case SET: 8626: /* Unless we are setting a REG, count everything in SET_DEST. */ 8627: if (GET_CODE (SET_DEST (x)) != REG) 1.1.1.7 root 8628: count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr); 8629: 8630: /* If SRC has side-effects, then we can't delete this insn, so the 8631: usage of SET_DEST inside SRC counts. 8632: 8633: ??? Strictly-speaking, we might be preserving this insn 8634: because some other SET has side-effects, but that's hard 8635: to do and can't happen now. */ 8636: count_reg_usage (SET_SRC (x), counts, 8637: side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x), 8638: incr); 1.1 root 8639: return; 8640: 1.1.1.7 root 8641: case CALL_INSN: 8642: count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr); 8643: 8644: /* ... falls through ... */ 1.1 root 8645: case INSN: 8646: case JUMP_INSN: 1.1.1.7 root 8647: count_reg_usage (PATTERN (x), counts, NULL_RTX, incr); 1.1 root 8648: 8649: /* Things used in a REG_EQUAL note aren't dead since loop may try to 8650: use them. */ 8651: 1.1.1.7 root 8652: count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr); 1.1 root 8653: return; 8654: 8655: case EXPR_LIST: 8656: case INSN_LIST: 1.1.1.7 root 8657: if (REG_NOTE_KIND (x) == REG_EQUAL 8658: || GET_CODE (XEXP (x,0)) == USE) 8659: count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr); 8660: count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr); 1.1 root 8661: return; 8662: } 8663: 8664: fmt = GET_RTX_FORMAT (code); 8665: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 8666: { 8667: if (fmt[i] == 'e') 1.1.1.7 root 8668: count_reg_usage (XEXP (x, i), counts, dest, incr); 1.1 root 8669: else if (fmt[i] == 'E') 8670: for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1.1.1.7 root 8671: count_reg_usage (XVECEXP (x, i, j), counts, dest, incr); 1.1 root 8672: } 8673: } 8674: 8675: /* Scan all the insns and delete any that are dead; i.e., they store a register 8676: that is never used or they copy a register to itself. 8677: 8678: This is used to remove insns made obviously dead by cse. It improves the 8679: heuristics in loop since it won't try to move dead invariants out of loops 8680: or make givs for dead quantities. The remaining passes of the compilation 8681: are also sped up. */ 8682: 8683: void 8684: delete_dead_from_cse (insns, nreg) 8685: rtx insns; 8686: int nreg; 8687: { 8688: int *counts = (int *) alloca (nreg * sizeof (int)); 1.1.1.4 root 8689: rtx insn, prev; 1.1.1.2 root 8690: rtx tem; 1.1 root 8691: int i; 1.1.1.3 root 8692: int in_libcall = 0; 1.1 root 8693: 8694: /* First count the number of times each register is used. */ 1.1.1.7 root 8695: bzero ((char *) counts, sizeof (int) * nreg); 1.1 root 8696: for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn)) 1.1.1.7 root 8697: count_reg_usage (insn, counts, NULL_RTX, 1); 1.1 root 8698: 8699: /* Go from the last insn to the first and delete insns that only set unused 8700: registers or copy a register to itself. As we delete an insn, remove 8701: usage counts for registers it uses. */ 1.1.1.4 root 8702: for (insn = prev_real_insn (get_last_insn ()); insn; insn = prev) 1.1 root 8703: { 8704: int live_insn = 0; 8705: 1.1.1.4 root 8706: prev = prev_real_insn (insn); 8707: 1.1.1.3 root 8708: /* Don't delete any insns that are part of a libcall block. 1.1.1.4 root 8709: Flow or loop might get confused if we did that. Remember 8710: that we are scanning backwards. */ 8711: if (find_reg_note (insn, REG_RETVAL, NULL_RTX)) 1.1.1.3 root 8712: in_libcall = 1; 8713: 8714: if (in_libcall) 8715: live_insn = 1; 8716: else if (GET_CODE (PATTERN (insn)) == SET) 1.1 root 8717: { 8718: if (GET_CODE (SET_DEST (PATTERN (insn))) == REG 8719: && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn))) 8720: ; 8721: 1.1.1.2 root 8722: #ifdef HAVE_cc0 8723: else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0 8724: && ! side_effects_p (SET_SRC (PATTERN (insn))) 8725: && ((tem = next_nonnote_insn (insn)) == 0 8726: || GET_RTX_CLASS (GET_CODE (tem)) != 'i' 8727: || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) 8728: ; 8729: #endif 1.1 root 8730: else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG 8731: || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER 8732: || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0 8733: || side_effects_p (SET_SRC (PATTERN (insn)))) 8734: live_insn = 1; 8735: } 8736: else if (GET_CODE (PATTERN (insn)) == PARALLEL) 8737: for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--) 8738: { 8739: rtx elt = XVECEXP (PATTERN (insn), 0, i); 8740: 8741: if (GET_CODE (elt) == SET) 8742: { 8743: if (GET_CODE (SET_DEST (elt)) == REG 8744: && SET_DEST (elt) == SET_SRC (elt)) 8745: ; 8746: 1.1.1.2 root 8747: #ifdef HAVE_cc0 8748: else if (GET_CODE (SET_DEST (elt)) == CC0 8749: && ! side_effects_p (SET_SRC (elt)) 8750: && ((tem = next_nonnote_insn (insn)) == 0 8751: || GET_RTX_CLASS (GET_CODE (tem)) != 'i' 8752: || ! reg_referenced_p (cc0_rtx, PATTERN (tem)))) 8753: ; 8754: #endif 1.1 root 8755: else if (GET_CODE (SET_DEST (elt)) != REG 8756: || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER 8757: || counts[REGNO (SET_DEST (elt))] != 0 8758: || side_effects_p (SET_SRC (elt))) 8759: live_insn = 1; 8760: } 8761: else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE) 8762: live_insn = 1; 8763: } 8764: else 8765: live_insn = 1; 8766: 8767: /* If this is a dead insn, delete it and show registers in it aren't 1.1.1.3 root 8768: being used. */ 1.1 root 8769: 1.1.1.3 root 8770: if (! live_insn) 1.1 root 8771: { 1.1.1.7 root 8772: count_reg_usage (insn, counts, NULL_RTX, -1); 1.1.1.4 root 8773: delete_insn (insn); 1.1 root 8774: } 1.1.1.3 root 8775: 1.1.1.4 root 8776: if (find_reg_note (insn, REG_LIBCALL, NULL_RTX)) 1.1.1.3 root 8777: in_libcall = 0; 1.1 root 8778: } 8779: }
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