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1.1 root 1: /* Emit RTL for the GNU C-Compiler expander. 1.1.1.5 ! root 2: Copyright (C) 1987, 1988, 1992, 1993 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: /* Middle-to-low level generation of rtx code and insns. 22: 23: This file contains the functions `gen_rtx', `gen_reg_rtx' 24: and `gen_label_rtx' that are the usual ways of creating rtl 25: expressions for most purposes. 26: 27: It also has the functions for creating insns and linking 28: them in the doubly-linked chain. 29: 30: The patterns of the insns are created by machine-dependent 31: routines in insn-emit.c, which is generated automatically from 32: the machine description. These routines use `gen_rtx' to make 33: the individual rtx's of the pattern; what is machine dependent 34: is the kind of rtx's they make and what arguments they use. */ 35: 36: #include "config.h" 37: #include "gvarargs.h" 38: #include "rtl.h" 39: #include "flags.h" 40: #include "function.h" 41: #include "expr.h" 42: #include "regs.h" 43: #include "insn-config.h" 44: #include "real.h" 1.1.1.4 root 45: #include <stdio.h> 1.1 root 46: 47: /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. 48: After rtl generation, it is 1 plus the largest register number used. */ 49: 50: int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; 51: 52: /* This is *not* reset after each function. It gives each CODE_LABEL 53: in the entire compilation a unique label number. */ 54: 55: static int label_num = 1; 56: 57: /* Lowest label number in current function. */ 58: 59: static int first_label_num; 60: 61: /* Highest label number in current function. 62: Zero means use the value of label_num instead. 63: This is nonzero only when belatedly compiling an inline function. */ 64: 65: static int last_label_num; 66: 67: /* Value label_num had when set_new_first_and_last_label_number was called. 68: If label_num has not changed since then, last_label_num is valid. */ 69: 70: static int base_label_num; 71: 72: /* Nonzero means do not generate NOTEs for source line numbers. */ 73: 74: static int no_line_numbers; 75: 76: /* Commonly used rtx's, so that we only need space for one copy. 77: These are initialized once for the entire compilation. 78: All of these except perhaps the floating-point CONST_DOUBLEs 79: are unique; no other rtx-object will be equal to any of these. */ 80: 81: rtx pc_rtx; /* (PC) */ 82: rtx cc0_rtx; /* (CC0) */ 83: rtx cc1_rtx; /* (CC1) (not actually used nowadays) */ 84: rtx const0_rtx; /* (CONST_INT 0) */ 85: rtx const1_rtx; /* (CONST_INT 1) */ 86: rtx const2_rtx; /* (CONST_INT 2) */ 87: rtx constm1_rtx; /* (CONST_INT -1) */ 88: rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */ 89: 90: /* We record floating-point CONST_DOUBLEs in each floating-point mode for 91: the values of 0, 1, and 2. For the integer entries and VOIDmode, we 92: record a copy of const[012]_rtx. */ 93: 94: rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; 95: 96: REAL_VALUE_TYPE dconst0; 97: REAL_VALUE_TYPE dconst1; 98: REAL_VALUE_TYPE dconst2; 99: REAL_VALUE_TYPE dconstm1; 100: 101: /* All references to the following fixed hard registers go through 102: these unique rtl objects. On machines where the frame-pointer and 103: arg-pointer are the same register, they use the same unique object. 104: 105: After register allocation, other rtl objects which used to be pseudo-regs 106: may be clobbered to refer to the frame-pointer register. 107: But references that were originally to the frame-pointer can be 108: distinguished from the others because they contain frame_pointer_rtx. 109: 110: In an inline procedure, the stack and frame pointer rtxs may not be 111: used for anything else. */ 112: rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */ 113: rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */ 114: rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */ 115: rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ 116: rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ 117: rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ 118: rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ 119: rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ 120: 121: rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */ 122: rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */ 123: rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */ 124: rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */ 125: 126: /* We make one copy of (const_int C) where C is in 127: [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] 128: to save space during the compilation and simplify comparisons of 129: integers. */ 130: 131: #define MAX_SAVED_CONST_INT 64 132: 133: static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; 134: 135: /* The ends of the doubly-linked chain of rtl for the current function. 136: Both are reset to null at the start of rtl generation for the function. 137: 138: start_sequence saves both of these on `sequence_stack' and then 139: starts a new, nested sequence of insns. */ 140: 141: static rtx first_insn = NULL; 142: static rtx last_insn = NULL; 143: 144: /* INSN_UID for next insn emitted. 145: Reset to 1 for each function compiled. */ 146: 147: static int cur_insn_uid = 1; 148: 149: /* Line number and source file of the last line-number NOTE emitted. 150: This is used to avoid generating duplicates. */ 151: 152: static int last_linenum = 0; 153: static char *last_filename = 0; 154: 155: /* A vector indexed by pseudo reg number. The allocated length 156: of this vector is regno_pointer_flag_length. Since this 157: vector is needed during the expansion phase when the total 158: number of registers in the function is not yet known, 159: it is copied and made bigger when necessary. */ 160: 161: char *regno_pointer_flag; 162: int regno_pointer_flag_length; 163: 164: /* Indexed by pseudo register number, gives the rtx for that pseudo. 165: Allocated in parallel with regno_pointer_flag. */ 166: 167: rtx *regno_reg_rtx; 168: 169: /* Stack of pending (incomplete) sequences saved by `start_sequence'. 170: Each element describes one pending sequence. 171: The main insn-chain is saved in the last element of the chain, 172: unless the chain is empty. */ 173: 174: struct sequence_stack *sequence_stack; 175: 176: /* start_sequence and gen_sequence can make a lot of rtx expressions which are 177: shortly thrown away. We use two mechanisms to prevent this waste: 178: 179: First, we keep a list of the expressions used to represent the sequence 180: stack in sequence_element_free_list. 181: 182: Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated 183: rtvec for use by gen_sequence. One entry for each size is sufficient 184: because most cases are calls to gen_sequence followed by immediately 185: emitting the SEQUENCE. Reuse is safe since emitting a sequence is 186: destructive on the insn in it anyway and hence can't be redone. 187: 188: We do not bother to save this cached data over nested function calls. 189: Instead, we just reinitialize them. */ 190: 191: #define SEQUENCE_RESULT_SIZE 5 192: 193: static struct sequence_stack *sequence_element_free_list; 194: static rtx sequence_result[SEQUENCE_RESULT_SIZE]; 195: 196: extern int rtx_equal_function_value_matters; 197: 198: /* Filename and line number of last line-number note, 199: whether we actually emitted it or not. */ 200: extern char *emit_filename; 201: extern int emit_lineno; 202: 203: rtx change_address (); 204: void init_emit (); 205: 206: /* rtx gen_rtx (code, mode, [element1, ..., elementn]) 207: ** 208: ** This routine generates an RTX of the size specified by 209: ** <code>, which is an RTX code. The RTX structure is initialized 210: ** from the arguments <element1> through <elementn>, which are 211: ** interpreted according to the specific RTX type's format. The 212: ** special machine mode associated with the rtx (if any) is specified 213: ** in <mode>. 214: ** 1.1.1.5 ! root 215: ** gen_rtx can be invoked in a way which resembles the lisp-like 1.1 root 216: ** rtx it will generate. For example, the following rtx structure: 217: ** 218: ** (plus:QI (mem:QI (reg:SI 1)) 219: ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) 220: ** 221: ** ...would be generated by the following C code: 222: ** 223: ** gen_rtx (PLUS, QImode, 224: ** gen_rtx (MEM, QImode, 225: ** gen_rtx (REG, SImode, 1)), 226: ** gen_rtx (MEM, QImode, 227: ** gen_rtx (PLUS, SImode, 228: ** gen_rtx (REG, SImode, 2), 229: ** gen_rtx (REG, SImode, 3)))), 230: */ 231: 232: /*VARARGS2*/ 233: rtx 234: gen_rtx (va_alist) 235: va_dcl 236: { 237: va_list p; 238: enum rtx_code code; 239: enum machine_mode mode; 240: register int i; /* Array indices... */ 241: register char *fmt; /* Current rtx's format... */ 242: register rtx rt_val; /* RTX to return to caller... */ 243: 244: va_start (p); 245: code = va_arg (p, enum rtx_code); 246: mode = va_arg (p, enum machine_mode); 247: 248: if (code == CONST_INT) 249: { 1.1.1.4 root 250: HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT); 1.1 root 251: 252: if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) 253: return const_int_rtx[arg + MAX_SAVED_CONST_INT]; 254: 255: if (const_true_rtx && arg == STORE_FLAG_VALUE) 256: return const_true_rtx; 257: 258: rt_val = rtx_alloc (code); 259: INTVAL (rt_val) = arg; 260: } 261: else if (code == REG) 262: { 263: int regno = va_arg (p, int); 264: 265: /* In case the MD file explicitly references the frame pointer, have 266: all such references point to the same frame pointer. This is used 267: during frame pointer elimination to distinguish the explicit 1.1.1.2 root 268: references to these registers from pseudos that happened to be 1.1 root 269: assigned to them. 270: 271: If we have eliminated the frame pointer or arg pointer, we will 272: be using it as a normal register, for example as a spill register. 273: In such cases, we might be accessing it in a mode that is not 1.1.1.4 root 274: Pmode and therefore cannot use the pre-allocated rtx. 1.1 root 275: 1.1.1.4 root 276: Also don't do this when we are making new REGs in reload, 277: since we don't want to get confused with the real pointers. */ 278: 279: if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode 280: && ! reload_in_progress) 1.1 root 281: return frame_pointer_rtx; 282: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 1.1.1.4 root 283: if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode 284: && ! reload_in_progress) 1.1 root 285: return arg_pointer_rtx; 286: #endif 1.1.1.4 root 287: if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode 288: && ! reload_in_progress) 1.1 root 289: return stack_pointer_rtx; 290: else 291: { 292: rt_val = rtx_alloc (code); 293: rt_val->mode = mode; 294: REGNO (rt_val) = regno; 295: return rt_val; 296: } 297: } 298: else 299: { 300: rt_val = rtx_alloc (code); /* Allocate the storage space. */ 301: rt_val->mode = mode; /* Store the machine mode... */ 302: 303: fmt = GET_RTX_FORMAT (code); /* Find the right format... */ 304: for (i = 0; i < GET_RTX_LENGTH (code); i++) 305: { 306: switch (*fmt++) 307: { 308: case '0': /* Unused field. */ 309: break; 310: 311: case 'i': /* An integer? */ 312: XINT (rt_val, i) = va_arg (p, int); 313: break; 314: 1.1.1.4 root 315: case 'w': /* A wide integer? */ 316: XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); 317: break; 318: 1.1 root 319: case 's': /* A string? */ 320: XSTR (rt_val, i) = va_arg (p, char *); 321: break; 322: 323: case 'e': /* An expression? */ 324: case 'u': /* An insn? Same except when printing. */ 325: XEXP (rt_val, i) = va_arg (p, rtx); 326: break; 327: 328: case 'E': /* An RTX vector? */ 329: XVEC (rt_val, i) = va_arg (p, rtvec); 330: break; 331: 332: default: 1.1.1.5 ! root 333: abort (); 1.1 root 334: } 335: } 336: } 337: va_end (p); 338: return rt_val; /* Return the new RTX... */ 339: } 340: 341: /* gen_rtvec (n, [rt1, ..., rtn]) 342: ** 343: ** This routine creates an rtvec and stores within it the 344: ** pointers to rtx's which are its arguments. 345: */ 346: 347: /*VARARGS1*/ 348: rtvec 349: gen_rtvec (va_alist) 350: va_dcl 351: { 352: int n, i; 353: va_list p; 354: rtx *vector; 355: 356: va_start (p); 357: n = va_arg (p, int); 358: 359: if (n == 0) 360: return NULL_RTVEC; /* Don't allocate an empty rtvec... */ 361: 362: vector = (rtx *) alloca (n * sizeof (rtx)); 363: for (i = 0; i < n; i++) 364: vector[i] = va_arg (p, rtx); 365: va_end (p); 366: 367: return gen_rtvec_v (n, vector); 368: } 369: 370: rtvec 371: gen_rtvec_v (n, argp) 372: int n; 373: rtx *argp; 374: { 375: register int i; 376: register rtvec rt_val; 377: 378: if (n == 0) 379: return NULL_RTVEC; /* Don't allocate an empty rtvec... */ 380: 381: rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ 382: 383: for (i = 0; i < n; i++) 384: rt_val->elem[i].rtx = *argp++; 385: 386: return rt_val; 387: } 388: 389: /* Generate a REG rtx for a new pseudo register of mode MODE. 390: This pseudo is assigned the next sequential register number. */ 391: 392: rtx 393: gen_reg_rtx (mode) 394: enum machine_mode mode; 395: { 396: register rtx val; 397: 398: /* Don't let anything called by or after reload create new registers 399: (actually, registers can't be created after flow, but this is a good 400: approximation). */ 401: 402: if (reload_in_progress || reload_completed) 403: abort (); 404: 405: /* Make sure regno_pointer_flag and regno_reg_rtx are large 406: enough to have an element for this pseudo reg number. */ 407: 408: if (reg_rtx_no == regno_pointer_flag_length) 409: { 410: rtx *new1; 411: char *new = 412: (char *) oballoc (regno_pointer_flag_length * 2); 413: bzero (new, regno_pointer_flag_length * 2); 414: bcopy (regno_pointer_flag, new, regno_pointer_flag_length); 415: regno_pointer_flag = new; 416: 417: new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx)); 418: bzero (new1, regno_pointer_flag_length * 2 * sizeof (rtx)); 419: bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); 420: regno_reg_rtx = new1; 421: 422: regno_pointer_flag_length *= 2; 423: } 424: 425: val = gen_rtx (REG, mode, reg_rtx_no); 426: regno_reg_rtx[reg_rtx_no++] = val; 427: return val; 428: } 429: 430: /* Identify REG as a probable pointer register. */ 431: 432: void 433: mark_reg_pointer (reg) 434: rtx reg; 435: { 436: REGNO_POINTER_FLAG (REGNO (reg)) = 1; 437: } 438: 439: /* Return 1 plus largest pseudo reg number used in the current function. */ 440: 441: int 442: max_reg_num () 443: { 444: return reg_rtx_no; 445: } 446: 447: /* Return 1 + the largest label number used so far in the current function. */ 448: 449: int 450: max_label_num () 451: { 452: if (last_label_num && label_num == base_label_num) 453: return last_label_num; 454: return label_num; 455: } 456: 457: /* Return first label number used in this function (if any were used). */ 458: 459: int 460: get_first_label_num () 461: { 462: return first_label_num; 463: } 464: 465: /* Return a value representing some low-order bits of X, where the number 466: of low-order bits is given by MODE. Note that no conversion is done 467: between floating-point and fixed-point values, rather, the bit 468: representation is returned. 469: 470: This function handles the cases in common between gen_lowpart, below, 471: and two variants in cse.c and combine.c. These are the cases that can 472: be safely handled at all points in the compilation. 473: 474: If this is not a case we can handle, return 0. */ 475: 476: rtx 477: gen_lowpart_common (mode, x) 478: enum machine_mode mode; 479: register rtx x; 480: { 481: int word = 0; 482: 483: if (GET_MODE (x) == mode) 484: return x; 485: 486: /* MODE must occupy no more words than the mode of X. */ 487: if (GET_MODE (x) != VOIDmode 488: && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD 489: > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) 490: / UNITS_PER_WORD))) 491: return 0; 492: 493: if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) 494: word = ((GET_MODE_SIZE (GET_MODE (x)) 495: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) 496: / UNITS_PER_WORD); 497: 498: if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) 1.1.1.4 root 499: && (GET_MODE_CLASS (mode) == MODE_INT 500: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) 1.1 root 501: { 502: /* If we are getting the low-order part of something that has been 503: sign- or zero-extended, we can either just use the object being 504: extended or make a narrower extension. If we want an even smaller 505: piece than the size of the object being extended, call ourselves 506: recursively. 507: 508: This case is used mostly by combine and cse. */ 509: 510: if (GET_MODE (XEXP (x, 0)) == mode) 511: return XEXP (x, 0); 512: else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) 513: return gen_lowpart_common (mode, XEXP (x, 0)); 514: else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) 515: return gen_rtx (GET_CODE (x), mode, XEXP (x, 0)); 516: } 517: else if (GET_CODE (x) == SUBREG 518: && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 519: || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) 520: return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 521: ? SUBREG_REG (x) 522: : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x))); 523: else if (GET_CODE (x) == REG) 524: { 525: /* If the register is not valid for MODE, return 0. If we don't 526: do this, there is no way to fix up the resulting REG later. */ 527: if (REGNO (x) < FIRST_PSEUDO_REGISTER 528: && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode)) 529: return 0; 530: else if (REGNO (x) < FIRST_PSEUDO_REGISTER 531: /* integrate.c can't handle parts of a return value register. */ 532: && (! REG_FUNCTION_VALUE_P (x) 1.1.1.4 root 533: || ! rtx_equal_function_value_matters) 534: /* We want to keep the stack, frame, and arg pointers 535: special. */ 536: && REGNO (x) != FRAME_POINTER_REGNUM 537: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 538: && REGNO (x) != ARG_POINTER_REGNUM 539: #endif 540: && REGNO (x) != STACK_POINTER_REGNUM) 1.1 root 541: return gen_rtx (REG, mode, REGNO (x) + word); 542: else 543: return gen_rtx (SUBREG, mode, x, word); 544: } 545: 546: /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits 547: from the low-order part of the constant. */ 1.1.1.4 root 548: else if ((GET_MODE_CLASS (mode) == MODE_INT 549: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) 550: && GET_MODE (x) == VOIDmode 1.1 root 551: && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) 1.1.1.3 root 552: { 553: /* If MODE is twice the host word size, X is already the desired 554: representation. Otherwise, if MODE is wider than a word, we can't 555: do this. If MODE is exactly a word, return just one CONST_INT. 556: If MODE is smaller than a word, clear the bits that don't belong 557: in our mode, unless they and our sign bit are all one. So we get 558: either a reasonable negative value or a reasonable unsigned value 559: for this mode. */ 560: 1.1.1.4 root 561: if (GET_MODE_BITSIZE (mode) == 2 * HOST_BITS_PER_WIDE_INT) 1.1.1.3 root 562: return x; 1.1.1.4 root 563: else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) 1.1.1.3 root 564: return 0; 1.1.1.4 root 565: else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) 1.1.1.3 root 566: return (GET_CODE (x) == CONST_INT ? x 1.1.1.4 root 567: : GEN_INT (CONST_DOUBLE_LOW (x))); 1.1.1.3 root 568: else 569: { 570: /* MODE must be narrower than HOST_BITS_PER_INT. */ 571: int width = GET_MODE_BITSIZE (mode); 1.1.1.4 root 572: HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) 573: : CONST_DOUBLE_LOW (x)); 1.1.1.3 root 574: 1.1.1.4 root 575: if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 576: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 577: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1.1.3 root 578: 579: return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x 1.1.1.4 root 580: : GEN_INT (val)); 1.1.1.3 root 581: } 582: } 583: 584: /* If X is an integral constant but we want it in floating-point, it 585: must be the case that we have a union of an integer and a floating-point 586: value. If the machine-parameters allow it, simulate that union here 587: and return the result. The two-word and single-word cases are 588: different. */ 589: 590: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 591: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 592: || flag_pretend_float) 593: && GET_MODE_CLASS (mode) == MODE_FLOAT 594: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 595: && GET_CODE (x) == CONST_INT 1.1.1.4 root 596: && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) 1.1.1.5 ! root 597: #ifdef REAL_ARITHMETIC ! 598: { ! 599: REAL_VALUE_TYPE r; ! 600: HOST_WIDE_INT i; ! 601: ! 602: i = INTVAL (x); ! 603: r = REAL_VALUE_FROM_TARGET_SINGLE (i); ! 604: return immed_real_const_1 (r, mode); ! 605: } ! 606: #else 1.1.1.3 root 607: { 1.1.1.4 root 608: union {HOST_WIDE_INT i; float d; } u; 1.1.1.3 root 609: 610: u.i = INTVAL (x); 611: return immed_real_const_1 (u.d, mode); 612: } 1.1.1.5 ! root 613: #endif 1.1.1.3 root 614: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 615: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 616: || flag_pretend_float) 617: && GET_MODE_CLASS (mode) == MODE_FLOAT 618: && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD 619: && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) 620: && GET_MODE (x) == VOIDmode 1.1.1.4 root 621: && (sizeof (double) * HOST_BITS_PER_CHAR 622: == 2 * HOST_BITS_PER_WIDE_INT)) 1.1.1.5 ! root 623: #ifdef REAL_ARITHMETIC ! 624: { ! 625: REAL_VALUE_TYPE r; ! 626: HOST_WIDE_INT i[2]; ! 627: HOST_WIDE_INT low, high; ! 628: ! 629: if (GET_CODE (x) == CONST_INT) ! 630: low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); ! 631: else ! 632: low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); ! 633: ! 634: /* TARGET_DOUBLE takes the addressing order of the target machine. */ ! 635: #ifdef WORDS_BIG_ENDIAN ! 636: i[0] = high, i[1] = low; ! 637: #else ! 638: i[0] = low, i[1] = high; ! 639: #endif ! 640: ! 641: r = REAL_VALUE_FROM_TARGET_DOUBLE (i); ! 642: return immed_real_const_1 (r, mode); ! 643: } ! 644: #else 1.1.1.3 root 645: { 1.1.1.4 root 646: union {HOST_WIDE_INT i[2]; double d; } u; 647: HOST_WIDE_INT low, high; 1.1.1.3 root 648: 649: if (GET_CODE (x) == CONST_INT) 1.1.1.4 root 650: low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); 1.1.1.3 root 651: else 652: low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); 653: 654: #ifdef HOST_WORDS_BIG_ENDIAN 655: u.i[0] = high, u.i[1] = low; 656: #else 657: u.i[0] = low, u.i[1] = high; 658: #endif 659: 660: return immed_real_const_1 (u.d, mode); 661: } 1.1.1.5 ! root 662: #endif 1.1.1.3 root 663: /* Similarly, if this is converting a floating-point value into a 664: single-word integer. Only do this is the host and target parameters are 665: compatible. */ 666: 667: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 668: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 669: || flag_pretend_float) 1.1.1.4 root 670: && (GET_MODE_CLASS (mode) == MODE_INT 671: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) 1.1.1.3 root 672: && GET_CODE (x) == CONST_DOUBLE 673: && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT 674: && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) 675: return operand_subword (x, 0, 0, GET_MODE (x)); 676: 677: /* Similarly, if this is converting a floating-point value into a 678: two-word integer, we can do this one word at a time and make an 679: integer. Only do this is the host and target parameters are 680: compatible. */ 681: 682: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 683: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 684: || flag_pretend_float) 1.1.1.4 root 685: && (GET_MODE_CLASS (mode) == MODE_INT 686: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) 1.1.1.3 root 687: && GET_CODE (x) == CONST_DOUBLE 688: && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT 689: && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) 690: { 691: rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x)); 692: rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); 693: 694: if (lowpart && GET_CODE (lowpart) == CONST_INT 695: && highpart && GET_CODE (highpart) == CONST_INT) 696: return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); 697: } 1.1 root 698: 699: /* Otherwise, we can't do this. */ 700: return 0; 701: } 702: 1.1.1.4 root 703: /* Return the real part (which has mode MODE) of a complex value X. 704: This always comes at the low address in memory. */ 705: 706: rtx 707: gen_realpart (mode, x) 708: enum machine_mode mode; 709: register rtx x; 710: { 711: if (WORDS_BIG_ENDIAN) 712: return gen_highpart (mode, x); 713: else 714: return gen_lowpart (mode, x); 715: } 716: 717: /* Return the imaginary part (which has mode MODE) of a complex value X. 718: This always comes at the high address in memory. */ 719: 720: rtx 721: gen_imagpart (mode, x) 722: enum machine_mode mode; 723: register rtx x; 724: { 725: if (WORDS_BIG_ENDIAN) 726: return gen_lowpart (mode, x); 727: else 728: return gen_highpart (mode, x); 729: } 730: 1.1 root 731: /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, 732: return an rtx (MEM, SUBREG, or CONST_INT) that refers to the 733: least-significant part of X. 734: MODE specifies how big a part of X to return; 735: it usually should not be larger than a word. 736: If X is a MEM whose address is a QUEUED, the value may be so also. */ 737: 738: rtx 739: gen_lowpart (mode, x) 740: enum machine_mode mode; 741: register rtx x; 742: { 743: rtx result = gen_lowpart_common (mode, x); 744: 745: if (result) 746: return result; 747: else if (GET_CODE (x) == MEM) 748: { 749: /* The only additional case we can do is MEM. */ 750: register int offset = 0; 751: if (WORDS_BIG_ENDIAN) 752: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) 753: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); 754: 755: if (BYTES_BIG_ENDIAN) 756: /* Adjust the address so that the address-after-the-data 757: is unchanged. */ 758: offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) 759: - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); 760: 761: return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); 762: } 763: else 764: abort (); 765: } 766: 1.1.1.4 root 767: /* Like `gen_lowpart', but refer to the most significant part. 768: This is used to access the imaginary part of a complex number. */ 769: 770: rtx 771: gen_highpart (mode, x) 772: enum machine_mode mode; 773: register rtx x; 774: { 775: /* This case loses if X is a subreg. To catch bugs early, 776: complain if an invalid MODE is used even in other cases. */ 777: if (GET_MODE_SIZE (mode) > UNITS_PER_WORD 778: && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) 779: abort (); 780: if (GET_CODE (x) == CONST_DOUBLE 1.1.1.5 ! root 781: #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) 1.1.1.4 root 782: && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT 783: #endif 784: ) 785: return gen_rtx (CONST_INT, VOIDmode, 786: CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); 787: else if (GET_CODE (x) == CONST_INT) 788: return const0_rtx; 789: else if (GET_CODE (x) == MEM) 790: { 791: register int offset = 0; 792: #if !WORDS_BIG_ENDIAN 793: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) 794: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); 795: #endif 796: #if !BYTES_BIG_ENDIAN 797: if (GET_MODE_SIZE (mode) < UNITS_PER_WORD) 798: offset -= (GET_MODE_SIZE (mode) 799: - MIN (UNITS_PER_WORD, 800: GET_MODE_SIZE (GET_MODE (x)))); 801: #endif 802: return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); 803: } 804: else if (GET_CODE (x) == SUBREG) 805: { 806: /* The only time this should occur is when we are looking at a 807: multi-word item with a SUBREG whose mode is the same as that of the 808: item. It isn't clear what we would do if it wasn't. */ 809: if (SUBREG_WORD (x) != 0) 810: abort (); 811: return gen_highpart (mode, SUBREG_REG (x)); 812: } 813: else if (GET_CODE (x) == REG) 814: { 815: int word = 0; 816: 817: #if !WORDS_BIG_ENDIAN 818: if (GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) 819: word = ((GET_MODE_SIZE (GET_MODE (x)) 820: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) 821: / UNITS_PER_WORD); 822: #endif 823: if (REGNO (x) < FIRST_PSEUDO_REGISTER 824: /* We want to keep the stack, frame, and arg pointers special. */ 825: && REGNO (x) != FRAME_POINTER_REGNUM 826: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 827: && REGNO (x) != ARG_POINTER_REGNUM 828: #endif 829: && REGNO (x) != STACK_POINTER_REGNUM) 830: return gen_rtx (REG, mode, REGNO (x) + word); 831: else 832: return gen_rtx (SUBREG, mode, x, word); 833: } 834: else 835: abort (); 836: } 837: 1.1 root 838: /* Return 1 iff X, assumed to be a SUBREG, 839: refers to the least significant part of its containing reg. 840: If X is not a SUBREG, always return 1 (it is its own low part!). */ 841: 842: int 843: subreg_lowpart_p (x) 844: rtx x; 845: { 846: if (GET_CODE (x) != SUBREG) 847: return 1; 848: 849: if (WORDS_BIG_ENDIAN 850: && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) 851: return (SUBREG_WORD (x) 852: == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) 853: - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) 854: / UNITS_PER_WORD)); 855: 856: return SUBREG_WORD (x) == 0; 857: } 858: 859: /* Return subword I of operand OP. 860: The word number, I, is interpreted as the word number starting at the 861: low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, 862: otherwise it is the high-order word. 863: 864: If we cannot extract the required word, we return zero. Otherwise, an 865: rtx corresponding to the requested word will be returned. 866: 867: VALIDATE_ADDRESS is nonzero if the address should be validated. Before 868: reload has completed, a valid address will always be returned. After 869: reload, if a valid address cannot be returned, we return zero. 870: 871: If VALIDATE_ADDRESS is zero, we simply form the required address; validating 872: it is the responsibility of the caller. 873: 874: MODE is the mode of OP in case it is a CONST_INT. */ 875: 876: rtx 877: operand_subword (op, i, validate_address, mode) 878: rtx op; 879: int i; 880: int validate_address; 881: enum machine_mode mode; 882: { 1.1.1.4 root 883: HOST_WIDE_INT val; 884: int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; 1.1 root 885: 886: if (mode == VOIDmode) 887: mode = GET_MODE (op); 888: 889: if (mode == VOIDmode) 890: abort (); 891: 892: /* If OP is narrower than a word or if we want a word outside OP, fail. */ 893: if (mode != BLKmode 894: && (GET_MODE_SIZE (mode) < UNITS_PER_WORD 895: || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) 896: return 0; 897: 898: /* If OP is already an integer word, return it. */ 899: if (GET_MODE_CLASS (mode) == MODE_INT 900: && GET_MODE_SIZE (mode) == UNITS_PER_WORD) 901: return op; 902: 903: /* If OP is a REG or SUBREG, we can handle it very simply. */ 904: if (GET_CODE (op) == REG) 905: { 906: /* If the register is not valid for MODE, return 0. If we don't 907: do this, there is no way to fix up the resulting REG later. */ 908: if (REGNO (op) < FIRST_PSEUDO_REGISTER 909: && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) 910: return 0; 911: else if (REGNO (op) >= FIRST_PSEUDO_REGISTER 912: || (REG_FUNCTION_VALUE_P (op) 1.1.1.4 root 913: && rtx_equal_function_value_matters) 914: /* We want to keep the stack, frame, and arg pointers 915: special. */ 916: || REGNO (op) == FRAME_POINTER_REGNUM 917: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 918: || REGNO (op) == ARG_POINTER_REGNUM 919: #endif 920: || REGNO (op) == STACK_POINTER_REGNUM) 1.1 root 921: return gen_rtx (SUBREG, word_mode, op, i); 922: else 923: return gen_rtx (REG, word_mode, REGNO (op) + i); 924: } 925: else if (GET_CODE (op) == SUBREG) 926: return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); 927: 928: /* Form a new MEM at the requested address. */ 929: if (GET_CODE (op) == MEM) 930: { 931: rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); 932: rtx new; 933: 934: if (validate_address) 935: { 936: if (reload_completed) 937: { 938: if (! strict_memory_address_p (word_mode, addr)) 939: return 0; 940: } 941: else 942: addr = memory_address (word_mode, addr); 943: } 944: 945: new = gen_rtx (MEM, word_mode, addr); 946: 947: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); 948: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); 949: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); 950: 951: return new; 952: } 953: 954: /* The only remaining cases are when OP is a constant. If the host and 955: target floating formats are the same, handling two-word floating 1.1.1.5 ! root 956: constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} ! 957: are defined as returning 32 bit and 64-bit values, respectively, ! 958: and not values of BITS_PER_WORD and 2 * BITS_PER_WORD bits. */ ! 959: #ifdef REAL_ARITHMETIC ! 960: if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) ! 961: && GET_MODE_CLASS (mode) == MODE_FLOAT ! 962: && GET_MODE_BITSIZE (mode) == 64 ! 963: && GET_CODE (op) == CONST_DOUBLE) ! 964: { ! 965: HOST_WIDE_INT k[2]; ! 966: REAL_VALUE_TYPE rv; ! 967: ! 968: REAL_VALUE_FROM_CONST_DOUBLE (rv, op); ! 969: REAL_VALUE_TO_TARGET_DOUBLE (rv, k); ! 970: ! 971: /* We handle 32-bit and 64-bit host words here. Note that the order in ! 972: which the words are written depends on the word endianness. ! 973: ! 974: ??? This is a potential portability problem and should ! 975: be fixed at some point. */ ! 976: if (HOST_BITS_PER_WIDE_INT == 32) ! 977: return GEN_INT (k[i]); ! 978: else if (HOST_BITS_PER_WIDE_INT == 64 && i == 0) ! 979: return GEN_INT ((k[! WORDS_BIG_ENDIAN] << (HOST_BITS_PER_WIDE_INT / 2)) ! 980: | k[WORDS_BIG_ENDIAN]); ! 981: else ! 982: abort (); ! 983: } ! 984: #else /* no REAL_ARITHMETIC */ 1.1 root 985: if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 986: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1 root 987: || flag_pretend_float) 988: && GET_MODE_CLASS (mode) == MODE_FLOAT 989: && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD 990: && GET_CODE (op) == CONST_DOUBLE) 1.1.1.4 root 991: { 992: /* The constant is stored in the host's word-ordering, 993: but we want to access it in the target's word-ordering. Some 994: compilers don't like a conditional inside macro args, so we have two 995: copies of the return. */ 1.1.1.3 root 996: #ifdef HOST_WORDS_BIG_ENDIAN 1.1.1.4 root 997: return GEN_INT (i == WORDS_BIG_ENDIAN 998: ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); 1.1.1.3 root 999: #else 1.1.1.4 root 1000: return GEN_INT (i != WORDS_BIG_ENDIAN 1001: ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); 1.1.1.3 root 1002: #endif 1.1.1.4 root 1003: } 1.1.1.5 ! root 1004: #endif /* no REAL_ARITHMETIC */ 1.1 root 1005: 1006: /* Single word float is a little harder, since single- and double-word 1007: values often do not have the same high-order bits. We have already 1008: verified that we want the only defined word of the single-word value. */ 1.1.1.5 ! root 1009: #ifdef REAL_ARITHMETIC ! 1010: if ((HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) ! 1011: && GET_MODE_CLASS (mode) == MODE_FLOAT ! 1012: && GET_MODE_BITSIZE (mode) == 32 ! 1013: && GET_CODE (op) == CONST_DOUBLE) ! 1014: { ! 1015: HOST_WIDE_INT l; ! 1016: REAL_VALUE_TYPE rv; ! 1017: ! 1018: REAL_VALUE_FROM_CONST_DOUBLE (rv, op); ! 1019: REAL_VALUE_TO_TARGET_SINGLE (rv, l); ! 1020: return GEN_INT (l); ! 1021: } ! 1022: #else 1.1 root 1023: if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 1024: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1 root 1025: || flag_pretend_float) 1026: && GET_MODE_CLASS (mode) == MODE_FLOAT 1027: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 1028: && GET_CODE (op) == CONST_DOUBLE) 1029: { 1030: double d; 1.1.1.4 root 1031: union {float f; HOST_WIDE_INT i; } u; 1.1 root 1032: 1033: REAL_VALUE_FROM_CONST_DOUBLE (d, op); 1034: 1035: u.f = d; 1.1.1.4 root 1036: return GEN_INT (u.i); 1.1 root 1037: } 1.1.1.5 ! root 1038: #endif /* no REAL_ARITHMETIC */ 1.1 root 1039: 1040: /* The only remaining cases that we can handle are integers. 1041: Convert to proper endianness now since these cases need it. 1042: At this point, i == 0 means the low-order word. 1043: 1.1.1.5 ! root 1044: We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT ! 1045: in general. However, if OP is (const_int 0), we can just return ! 1046: it for any word. */ ! 1047: ! 1048: if (op == const0_rtx) ! 1049: return op; 1.1 root 1050: 1051: if (GET_MODE_CLASS (mode) != MODE_INT 1.1.1.5 ! root 1052: || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) ! 1053: || BITS_PER_WORD > HOST_BITS_PER_INT) 1.1 root 1054: return 0; 1055: 1056: if (WORDS_BIG_ENDIAN) 1057: i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; 1058: 1059: /* Find out which word on the host machine this value is in and get 1060: it from the constant. */ 1061: val = (i / size_ratio == 0 1062: ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) 1063: : (GET_CODE (op) == CONST_INT 1064: ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); 1065: 1066: /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ 1.1.1.4 root 1067: if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) 1.1 root 1068: val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) 1.1.1.4 root 1069: & (((HOST_WIDE_INT) 1 1070: << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); 1.1 root 1071: 1.1.1.4 root 1072: return GEN_INT (val); 1.1 root 1073: } 1074: 1075: /* Similar to `operand_subword', but never return 0. If we can't extract 1076: the required subword, put OP into a register and try again. If that fails, 1077: abort. We always validate the address in this case. It is not valid 1078: to call this function after reload; it is mostly meant for RTL 1079: generation. 1080: 1081: MODE is the mode of OP, in case it is CONST_INT. */ 1082: 1083: rtx 1084: operand_subword_force (op, i, mode) 1085: rtx op; 1086: int i; 1087: enum machine_mode mode; 1088: { 1089: rtx result = operand_subword (op, i, 1, mode); 1090: 1091: if (result) 1092: return result; 1093: 1094: if (mode != BLKmode && mode != VOIDmode) 1095: op = force_reg (mode, op); 1096: 1097: result = operand_subword (op, i, 1, mode); 1098: if (result == 0) 1099: abort (); 1100: 1101: return result; 1102: } 1103: 1104: /* Given a compare instruction, swap the operands. 1105: A test instruction is changed into a compare of 0 against the operand. */ 1106: 1107: void 1108: reverse_comparison (insn) 1109: rtx insn; 1110: { 1111: rtx body = PATTERN (insn); 1112: rtx comp; 1113: 1114: if (GET_CODE (body) == SET) 1115: comp = SET_SRC (body); 1116: else 1117: comp = SET_SRC (XVECEXP (body, 0, 0)); 1118: 1119: if (GET_CODE (comp) == COMPARE) 1120: { 1121: rtx op0 = XEXP (comp, 0); 1122: rtx op1 = XEXP (comp, 1); 1123: XEXP (comp, 0) = op1; 1124: XEXP (comp, 1) = op0; 1125: } 1126: else 1127: { 1128: rtx new = gen_rtx (COMPARE, VOIDmode, 1129: CONST0_RTX (GET_MODE (comp)), comp); 1130: if (GET_CODE (body) == SET) 1131: SET_SRC (body) = new; 1132: else 1133: SET_SRC (XVECEXP (body, 0, 0)) = new; 1134: } 1135: } 1136: 1137: /* Return a memory reference like MEMREF, but with its mode changed 1138: to MODE and its address changed to ADDR. 1139: (VOIDmode means don't change the mode. 1140: NULL for ADDR means don't change the address.) */ 1141: 1142: rtx 1143: change_address (memref, mode, addr) 1144: rtx memref; 1145: enum machine_mode mode; 1146: rtx addr; 1147: { 1148: rtx new; 1149: 1150: if (GET_CODE (memref) != MEM) 1151: abort (); 1152: if (mode == VOIDmode) 1153: mode = GET_MODE (memref); 1154: if (addr == 0) 1155: addr = XEXP (memref, 0); 1156: 1157: /* If reload is in progress or has completed, ADDR must be valid. 1158: Otherwise, we can call memory_address to make it valid. */ 1159: if (reload_completed || reload_in_progress) 1160: { 1161: if (! memory_address_p (mode, addr)) 1162: abort (); 1163: } 1164: else 1165: addr = memory_address (mode, addr); 1166: 1167: new = gen_rtx (MEM, mode, addr); 1168: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); 1169: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); 1170: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); 1171: return new; 1172: } 1173: 1174: /* Return a newly created CODE_LABEL rtx with a unique label number. */ 1175: 1176: rtx 1177: gen_label_rtx () 1178: { 1.1.1.4 root 1179: register rtx label = gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, 1180: label_num++, NULL_PTR); 1.1 root 1181: LABEL_NUSES (label) = 0; 1182: return label; 1183: } 1184: 1185: /* For procedure integration. */ 1186: 1187: /* Return a newly created INLINE_HEADER rtx. Should allocate this 1188: from a permanent obstack when the opportunity arises. */ 1189: 1190: rtx 1191: gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, 1192: last_labelno, max_parm_regnum, max_regnum, args_size, 1193: pops_args, stack_slots, function_flags, 1194: outgoing_args_size, original_arg_vector, 1195: original_decl_initial) 1196: rtx first_insn, first_parm_insn; 1197: int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; 1198: int pops_args; 1199: rtx stack_slots; 1200: int function_flags; 1201: int outgoing_args_size; 1202: rtvec original_arg_vector; 1203: rtx original_decl_initial; 1204: { 1205: rtx header = gen_rtx (INLINE_HEADER, VOIDmode, 1.1.1.4 root 1206: cur_insn_uid++, NULL_RTX, 1.1 root 1207: first_insn, first_parm_insn, 1208: first_labelno, last_labelno, 1209: max_parm_regnum, max_regnum, args_size, pops_args, 1210: stack_slots, function_flags, outgoing_args_size, 1211: original_arg_vector, original_decl_initial); 1212: return header; 1213: } 1214: 1215: /* Install new pointers to the first and last insns in the chain. 1216: Used for an inline-procedure after copying the insn chain. */ 1217: 1218: void 1219: set_new_first_and_last_insn (first, last) 1220: rtx first, last; 1221: { 1222: first_insn = first; 1223: last_insn = last; 1224: } 1225: 1226: /* Set the range of label numbers found in the current function. 1227: This is used when belatedly compiling an inline function. */ 1228: 1229: void 1230: set_new_first_and_last_label_num (first, last) 1231: int first, last; 1232: { 1233: base_label_num = label_num; 1234: first_label_num = first; 1235: last_label_num = last; 1236: } 1237: 1238: /* Save all variables describing the current status into the structure *P. 1239: This is used before starting a nested function. */ 1240: 1241: void 1242: save_emit_status (p) 1243: struct function *p; 1244: { 1245: p->reg_rtx_no = reg_rtx_no; 1246: p->first_label_num = first_label_num; 1247: p->first_insn = first_insn; 1248: p->last_insn = last_insn; 1249: p->sequence_stack = sequence_stack; 1250: p->cur_insn_uid = cur_insn_uid; 1251: p->last_linenum = last_linenum; 1252: p->last_filename = last_filename; 1253: p->regno_pointer_flag = regno_pointer_flag; 1254: p->regno_pointer_flag_length = regno_pointer_flag_length; 1255: p->regno_reg_rtx = regno_reg_rtx; 1256: } 1257: 1258: /* Restore all variables describing the current status from the structure *P. 1259: This is used after a nested function. */ 1260: 1261: void 1262: restore_emit_status (p) 1263: struct function *p; 1264: { 1265: int i; 1266: 1267: reg_rtx_no = p->reg_rtx_no; 1268: first_label_num = p->first_label_num; 1269: first_insn = p->first_insn; 1270: last_insn = p->last_insn; 1271: sequence_stack = p->sequence_stack; 1272: cur_insn_uid = p->cur_insn_uid; 1273: last_linenum = p->last_linenum; 1274: last_filename = p->last_filename; 1275: regno_pointer_flag = p->regno_pointer_flag; 1276: regno_pointer_flag_length = p->regno_pointer_flag_length; 1277: regno_reg_rtx = p->regno_reg_rtx; 1278: 1279: /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */ 1280: sequence_element_free_list = 0; 1281: for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) 1282: sequence_result[i] = 0; 1283: } 1284: 1285: /* Go through all the RTL insn bodies and copy any invalid shared structure. 1286: It does not work to do this twice, because the mark bits set here 1287: are not cleared afterwards. */ 1288: 1289: void 1290: unshare_all_rtl (insn) 1291: register rtx insn; 1292: { 1293: for (; insn; insn = NEXT_INSN (insn)) 1294: if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN 1295: || GET_CODE (insn) == CALL_INSN) 1296: { 1297: PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); 1298: REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); 1299: LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); 1300: } 1301: 1302: /* Make sure the addresses of stack slots found outside the insn chain 1303: (such as, in DECL_RTL of a variable) are not shared 1304: with the insn chain. 1305: 1306: This special care is necessary when the stack slot MEM does not 1307: actually appear in the insn chain. If it does appear, its address 1308: is unshared from all else at that point. */ 1309: 1310: copy_rtx_if_shared (stack_slot_list); 1311: } 1312: 1313: /* Mark ORIG as in use, and return a copy of it if it was already in use. 1314: Recursively does the same for subexpressions. */ 1315: 1316: rtx 1317: copy_rtx_if_shared (orig) 1318: rtx orig; 1319: { 1320: register rtx x = orig; 1321: register int i; 1322: register enum rtx_code code; 1323: register char *format_ptr; 1324: int copied = 0; 1325: 1326: if (x == 0) 1327: return 0; 1328: 1329: code = GET_CODE (x); 1330: 1331: /* These types may be freely shared. */ 1332: 1333: switch (code) 1334: { 1335: case REG: 1336: case QUEUED: 1337: case CONST_INT: 1338: case CONST_DOUBLE: 1339: case SYMBOL_REF: 1340: case CODE_LABEL: 1341: case PC: 1342: case CC0: 1343: case SCRATCH: 1344: /* SCRATCH must be shared because they represent distinct values. */ 1345: return x; 1346: 1.1.1.5 ! root 1347: case CONST: ! 1348: /* CONST can be shared if it contains a SYMBOL_REF. If it contains ! 1349: a LABEL_REF, it isn't sharable. */ ! 1350: if (GET_CODE (XEXP (x, 0)) == PLUS ! 1351: && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF ! 1352: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) ! 1353: return x; ! 1354: break; ! 1355: 1.1 root 1356: case INSN: 1357: case JUMP_INSN: 1358: case CALL_INSN: 1359: case NOTE: 1360: case LABEL_REF: 1361: case BARRIER: 1362: /* The chain of insns is not being copied. */ 1363: return x; 1364: 1365: case MEM: 1366: /* A MEM is allowed to be shared if its address is constant 1367: or is a constant plus one of the special registers. */ 1368: if (CONSTANT_ADDRESS_P (XEXP (x, 0)) 1369: || XEXP (x, 0) == virtual_stack_vars_rtx 1370: || XEXP (x, 0) == virtual_incoming_args_rtx) 1371: return x; 1372: 1373: if (GET_CODE (XEXP (x, 0)) == PLUS 1374: && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx 1375: || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) 1376: && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) 1377: { 1378: /* This MEM can appear in more than one place, 1379: but its address better not be shared with anything else. */ 1380: if (! x->used) 1381: XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); 1382: x->used = 1; 1383: return x; 1384: } 1385: } 1386: 1387: /* This rtx may not be shared. If it has already been seen, 1388: replace it with a copy of itself. */ 1389: 1390: if (x->used) 1391: { 1392: register rtx copy; 1393: 1394: copy = rtx_alloc (code); 1395: bcopy (x, copy, (sizeof (*copy) - sizeof (copy->fld) 1396: + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); 1397: x = copy; 1398: copied = 1; 1399: } 1400: x->used = 1; 1401: 1402: /* Now scan the subexpressions recursively. 1403: We can store any replaced subexpressions directly into X 1404: since we know X is not shared! Any vectors in X 1405: must be copied if X was copied. */ 1406: 1407: format_ptr = GET_RTX_FORMAT (code); 1408: 1409: for (i = 0; i < GET_RTX_LENGTH (code); i++) 1410: { 1411: switch (*format_ptr++) 1412: { 1413: case 'e': 1414: XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); 1415: break; 1416: 1417: case 'E': 1418: if (XVEC (x, i) != NULL) 1419: { 1420: register int j; 1421: 1422: if (copied) 1423: XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0)); 1424: for (j = 0; j < XVECLEN (x, i); j++) 1425: XVECEXP (x, i, j) 1426: = copy_rtx_if_shared (XVECEXP (x, i, j)); 1427: } 1428: break; 1429: } 1430: } 1431: return x; 1432: } 1433: 1434: /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used 1435: to look for shared sub-parts. */ 1436: 1437: void 1438: reset_used_flags (x) 1439: rtx x; 1440: { 1441: register int i, j; 1442: register enum rtx_code code; 1443: register char *format_ptr; 1444: int copied = 0; 1445: 1446: if (x == 0) 1447: return; 1448: 1449: code = GET_CODE (x); 1450: 1451: /* These types may be freely shared so we needn't do any reseting 1452: for them. */ 1453: 1454: switch (code) 1455: { 1456: case REG: 1457: case QUEUED: 1458: case CONST_INT: 1459: case CONST_DOUBLE: 1460: case SYMBOL_REF: 1461: case CODE_LABEL: 1462: case PC: 1463: case CC0: 1464: return; 1465: 1466: case INSN: 1467: case JUMP_INSN: 1468: case CALL_INSN: 1469: case NOTE: 1470: case LABEL_REF: 1471: case BARRIER: 1472: /* The chain of insns is not being copied. */ 1473: return; 1474: } 1475: 1476: x->used = 0; 1477: 1478: format_ptr = GET_RTX_FORMAT (code); 1479: for (i = 0; i < GET_RTX_LENGTH (code); i++) 1480: { 1481: switch (*format_ptr++) 1482: { 1483: case 'e': 1484: reset_used_flags (XEXP (x, i)); 1485: break; 1486: 1487: case 'E': 1488: for (j = 0; j < XVECLEN (x, i); j++) 1489: reset_used_flags (XVECEXP (x, i, j)); 1490: break; 1491: } 1492: } 1493: } 1494: 1495: /* Copy X if necessary so that it won't be altered by changes in OTHER. 1496: Return X or the rtx for the pseudo reg the value of X was copied into. 1497: OTHER must be valid as a SET_DEST. */ 1498: 1499: rtx 1500: make_safe_from (x, other) 1501: rtx x, other; 1502: { 1503: while (1) 1504: switch (GET_CODE (other)) 1505: { 1506: case SUBREG: 1507: other = SUBREG_REG (other); 1508: break; 1509: case STRICT_LOW_PART: 1510: case SIGN_EXTEND: 1511: case ZERO_EXTEND: 1512: other = XEXP (other, 0); 1513: break; 1514: default: 1515: goto done; 1516: } 1517: done: 1518: if ((GET_CODE (other) == MEM 1519: && ! CONSTANT_P (x) 1520: && GET_CODE (x) != REG 1521: && GET_CODE (x) != SUBREG) 1522: || (GET_CODE (other) == REG 1523: && (REGNO (other) < FIRST_PSEUDO_REGISTER 1524: || reg_mentioned_p (other, x)))) 1525: { 1526: rtx temp = gen_reg_rtx (GET_MODE (x)); 1527: emit_move_insn (temp, x); 1528: return temp; 1529: } 1530: return x; 1531: } 1532: 1533: /* Emission of insns (adding them to the doubly-linked list). */ 1534: 1535: /* Return the first insn of the current sequence or current function. */ 1536: 1537: rtx 1538: get_insns () 1539: { 1540: return first_insn; 1541: } 1542: 1543: /* Return the last insn emitted in current sequence or current function. */ 1544: 1545: rtx 1546: get_last_insn () 1547: { 1548: return last_insn; 1549: } 1550: 1551: /* Specify a new insn as the last in the chain. */ 1552: 1553: void 1554: set_last_insn (insn) 1555: rtx insn; 1556: { 1557: if (NEXT_INSN (insn) != 0) 1558: abort (); 1559: last_insn = insn; 1560: } 1561: 1562: /* Return the last insn emitted, even if it is in a sequence now pushed. */ 1563: 1564: rtx 1565: get_last_insn_anywhere () 1566: { 1567: struct sequence_stack *stack; 1568: if (last_insn) 1569: return last_insn; 1570: for (stack = sequence_stack; stack; stack = stack->next) 1571: if (stack->last != 0) 1572: return stack->last; 1573: return 0; 1574: } 1575: 1576: /* Return a number larger than any instruction's uid in this function. */ 1577: 1578: int 1579: get_max_uid () 1580: { 1581: return cur_insn_uid; 1582: } 1583: 1584: /* Return the next insn. If it is a SEQUENCE, return the first insn 1585: of the sequence. */ 1586: 1587: rtx 1588: next_insn (insn) 1589: rtx insn; 1590: { 1591: if (insn) 1592: { 1593: insn = NEXT_INSN (insn); 1594: if (insn && GET_CODE (insn) == INSN 1595: && GET_CODE (PATTERN (insn)) == SEQUENCE) 1596: insn = XVECEXP (PATTERN (insn), 0, 0); 1597: } 1598: 1599: return insn; 1600: } 1601: 1602: /* Return the previous insn. If it is a SEQUENCE, return the last insn 1603: of the sequence. */ 1604: 1605: rtx 1606: previous_insn (insn) 1607: rtx insn; 1608: { 1609: if (insn) 1610: { 1611: insn = PREV_INSN (insn); 1612: if (insn && GET_CODE (insn) == INSN 1613: && GET_CODE (PATTERN (insn)) == SEQUENCE) 1614: insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); 1615: } 1616: 1617: return insn; 1618: } 1619: 1620: /* Return the next insn after INSN that is not a NOTE. This routine does not 1621: look inside SEQUENCEs. */ 1622: 1623: rtx 1624: next_nonnote_insn (insn) 1625: rtx insn; 1626: { 1627: while (insn) 1628: { 1629: insn = NEXT_INSN (insn); 1630: if (insn == 0 || GET_CODE (insn) != NOTE) 1631: break; 1632: } 1633: 1634: return insn; 1635: } 1636: 1637: /* Return the previous insn before INSN that is not a NOTE. This routine does 1638: not look inside SEQUENCEs. */ 1639: 1640: rtx 1641: prev_nonnote_insn (insn) 1642: rtx insn; 1643: { 1644: while (insn) 1645: { 1646: insn = PREV_INSN (insn); 1647: if (insn == 0 || GET_CODE (insn) != NOTE) 1648: break; 1649: } 1650: 1651: return insn; 1652: } 1653: 1654: /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; 1655: or 0, if there is none. This routine does not look inside 1656: SEQUENCEs. */ 1657: 1658: rtx 1659: next_real_insn (insn) 1660: rtx insn; 1661: { 1662: while (insn) 1663: { 1664: insn = NEXT_INSN (insn); 1665: if (insn == 0 || GET_CODE (insn) == INSN 1666: || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) 1667: break; 1668: } 1669: 1670: return insn; 1671: } 1672: 1673: /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; 1674: or 0, if there is none. This routine does not look inside 1675: SEQUENCEs. */ 1676: 1677: rtx 1678: prev_real_insn (insn) 1679: rtx insn; 1680: { 1681: while (insn) 1682: { 1683: insn = PREV_INSN (insn); 1684: if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN 1685: || GET_CODE (insn) == JUMP_INSN) 1686: break; 1687: } 1688: 1689: return insn; 1690: } 1691: 1692: /* Find the next insn after INSN that really does something. This routine 1693: does not look inside SEQUENCEs. Until reload has completed, this is the 1694: same as next_real_insn. */ 1695: 1696: rtx 1697: next_active_insn (insn) 1698: rtx insn; 1699: { 1700: while (insn) 1701: { 1702: insn = NEXT_INSN (insn); 1703: if (insn == 0 1704: || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN 1705: || (GET_CODE (insn) == INSN 1706: && (! reload_completed 1707: || (GET_CODE (PATTERN (insn)) != USE 1708: && GET_CODE (PATTERN (insn)) != CLOBBER)))) 1709: break; 1710: } 1711: 1712: return insn; 1713: } 1714: 1715: /* Find the last insn before INSN that really does something. This routine 1716: does not look inside SEQUENCEs. Until reload has completed, this is the 1717: same as prev_real_insn. */ 1718: 1719: rtx 1720: prev_active_insn (insn) 1721: rtx insn; 1722: { 1723: while (insn) 1724: { 1725: insn = PREV_INSN (insn); 1726: if (insn == 0 1727: || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN 1728: || (GET_CODE (insn) == INSN 1729: && (! reload_completed 1730: || (GET_CODE (PATTERN (insn)) != USE 1731: && GET_CODE (PATTERN (insn)) != CLOBBER)))) 1732: break; 1733: } 1734: 1735: return insn; 1736: } 1737: 1738: /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ 1739: 1740: rtx 1741: next_label (insn) 1742: rtx insn; 1743: { 1744: while (insn) 1745: { 1746: insn = NEXT_INSN (insn); 1747: if (insn == 0 || GET_CODE (insn) == CODE_LABEL) 1748: break; 1749: } 1750: 1751: return insn; 1752: } 1753: 1754: /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ 1755: 1756: rtx 1757: prev_label (insn) 1758: rtx insn; 1759: { 1760: while (insn) 1761: { 1762: insn = PREV_INSN (insn); 1763: if (insn == 0 || GET_CODE (insn) == CODE_LABEL) 1764: break; 1765: } 1766: 1767: return insn; 1768: } 1769: 1770: #ifdef HAVE_cc0 1.1.1.3 root 1771: /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER 1772: and REG_CC_USER notes so we can find it. */ 1773: 1774: void 1775: link_cc0_insns (insn) 1776: rtx insn; 1777: { 1778: rtx user = next_nonnote_insn (insn); 1779: 1780: if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) 1781: user = XVECEXP (PATTERN (user), 0, 0); 1782: 1783: REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn, 1784: REG_NOTES (user)); 1785: REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn)); 1786: } 1787: 1.1 root 1788: /* Return the next insn that uses CC0 after INSN, which is assumed to 1789: set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter 1790: applied to the result of this function should yield INSN). 1791: 1792: Normally, this is simply the next insn. However, if a REG_CC_USER note 1793: is present, it contains the insn that uses CC0. 1794: 1795: Return 0 if we can't find the insn. */ 1796: 1797: rtx 1798: next_cc0_user (insn) 1799: rtx insn; 1800: { 1.1.1.4 root 1801: rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); 1.1 root 1802: 1803: if (note) 1804: return XEXP (note, 0); 1805: 1806: insn = next_nonnote_insn (insn); 1807: if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) 1808: insn = XVECEXP (PATTERN (insn), 0, 0); 1809: 1810: if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' 1811: && reg_mentioned_p (cc0_rtx, PATTERN (insn))) 1812: return insn; 1813: 1814: return 0; 1815: } 1816: 1817: /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER 1818: note, it is the previous insn. */ 1819: 1820: rtx 1821: prev_cc0_setter (insn) 1822: rtx insn; 1823: { 1.1.1.4 root 1824: rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 1.1 root 1825: rtx link; 1826: 1827: if (note) 1828: return XEXP (note, 0); 1829: 1830: insn = prev_nonnote_insn (insn); 1831: if (! sets_cc0_p (PATTERN (insn))) 1832: abort (); 1833: 1834: return insn; 1835: } 1836: #endif 1837: 1838: /* Try splitting insns that can be split for better scheduling. 1839: PAT is the pattern which might split. 1840: TRIAL is the insn providing PAT. 1841: BACKWARDS is non-zero if we are scanning insns from last to first. 1842: 1843: If this routine succeeds in splitting, it returns the first or last 1844: replacement insn depending on the value of BACKWARDS. Otherwise, it 1845: returns TRIAL. If the insn to be returned can be split, it will be. */ 1846: 1847: rtx 1848: try_split (pat, trial, backwards) 1849: rtx pat, trial; 1850: int backwards; 1851: { 1852: rtx before = PREV_INSN (trial); 1853: rtx after = NEXT_INSN (trial); 1854: rtx seq = split_insns (pat, trial); 1855: int has_barrier = 0; 1856: rtx tem; 1857: 1858: /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. 1859: We may need to handle this specially. */ 1860: if (after && GET_CODE (after) == BARRIER) 1861: { 1862: has_barrier = 1; 1863: after = NEXT_INSN (after); 1864: } 1865: 1866: if (seq) 1867: { 1868: /* SEQ can either be a SEQUENCE or the pattern of a single insn. 1869: The latter case will normally arise only when being done so that 1870: it, in turn, will be split (SFmode on the 29k is an example). */ 1871: if (GET_CODE (seq) == SEQUENCE) 1872: { 1873: /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in 1874: SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, 1875: increment the usage count so we don't delete the label. */ 1876: int i; 1877: 1878: if (GET_CODE (trial) == JUMP_INSN) 1879: for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) 1880: if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) 1881: { 1882: JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); 1883: 1884: if (JUMP_LABEL (trial)) 1885: LABEL_NUSES (JUMP_LABEL (trial))++; 1886: } 1887: 1888: tem = emit_insn_after (seq, before); 1889: 1890: delete_insn (trial); 1891: if (has_barrier) 1892: emit_barrier_after (tem); 1893: } 1894: /* Avoid infinite loop if the result matches the original pattern. */ 1895: else if (rtx_equal_p (seq, pat)) 1896: return trial; 1897: else 1898: { 1899: PATTERN (trial) = seq; 1900: INSN_CODE (trial) = -1; 1901: } 1902: 1903: /* Set TEM to the insn we should return. */ 1904: tem = backwards ? prev_active_insn (after) : next_active_insn (before); 1905: return try_split (PATTERN (tem), tem, backwards); 1906: } 1907: 1908: return trial; 1909: } 1910: 1911: /* Make and return an INSN rtx, initializing all its slots. 1.1.1.4 root 1912: Store PATTERN in the pattern slots. */ 1.1 root 1913: 1914: rtx 1.1.1.4 root 1915: make_insn_raw (pattern) 1.1 root 1916: rtx pattern; 1917: { 1918: register rtx insn; 1919: 1.1.1.5 ! root 1920: insn = rtx_alloc (INSN); ! 1921: INSN_UID (insn) = cur_insn_uid++; 1.1 root 1922: 1923: PATTERN (insn) = pattern; 1924: INSN_CODE (insn) = -1; 1.1.1.5 ! root 1925: LOG_LINKS (insn) = NULL; ! 1926: REG_NOTES (insn) = NULL; 1.1 root 1927: 1928: return insn; 1929: } 1930: 1931: /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ 1932: 1933: static rtx 1.1.1.4 root 1934: make_jump_insn_raw (pattern) 1.1 root 1935: rtx pattern; 1936: { 1937: register rtx insn; 1938: 1.1.1.4 root 1939: insn = rtx_alloc (JUMP_INSN); 1.1.1.5 ! root 1940: INSN_UID (insn) = cur_insn_uid++; 1.1 root 1941: 1942: PATTERN (insn) = pattern; 1943: INSN_CODE (insn) = -1; 1.1.1.5 ! root 1944: LOG_LINKS (insn) = NULL; ! 1945: REG_NOTES (insn) = NULL; ! 1946: JUMP_LABEL (insn) = NULL; 1.1 root 1947: 1948: return insn; 1949: } 1950: 1951: /* Add INSN to the end of the doubly-linked list. 1952: INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ 1953: 1954: void 1955: add_insn (insn) 1956: register rtx insn; 1957: { 1958: PREV_INSN (insn) = last_insn; 1959: NEXT_INSN (insn) = 0; 1960: 1961: if (NULL != last_insn) 1962: NEXT_INSN (last_insn) = insn; 1963: 1964: if (NULL == first_insn) 1965: first_insn = insn; 1966: 1967: last_insn = insn; 1968: } 1969: 1970: /* Add INSN into the doubly-linked list after insn AFTER. This should be the 1971: only function called to insert an insn once delay slots have been filled 1972: since only it knows how to update a SEQUENCE. */ 1973: 1974: void 1975: add_insn_after (insn, after) 1976: rtx insn, after; 1977: { 1978: rtx next = NEXT_INSN (after); 1979: 1980: NEXT_INSN (insn) = next; 1981: PREV_INSN (insn) = after; 1982: 1983: if (next) 1984: { 1985: PREV_INSN (next) = insn; 1986: if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) 1987: PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; 1988: } 1989: else if (last_insn == after) 1990: last_insn = insn; 1991: else 1992: { 1993: struct sequence_stack *stack = sequence_stack; 1994: /* Scan all pending sequences too. */ 1995: for (; stack; stack = stack->next) 1996: if (after == stack->last) 1997: stack->last = insn; 1998: } 1999: 2000: NEXT_INSN (after) = insn; 2001: if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) 2002: { 2003: rtx sequence = PATTERN (after); 2004: NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; 2005: } 2006: } 2007: 2008: /* Delete all insns made since FROM. 2009: FROM becomes the new last instruction. */ 2010: 2011: void 2012: delete_insns_since (from) 2013: rtx from; 2014: { 2015: if (from == 0) 2016: first_insn = 0; 2017: else 2018: NEXT_INSN (from) = 0; 2019: last_insn = from; 2020: } 2021: 2022: /* Move a consecutive bunch of insns to a different place in the chain. 2023: The insns to be moved are those between FROM and TO. 2024: They are moved to a new position after the insn AFTER. 2025: AFTER must not be FROM or TO or any insn in between. 2026: 2027: This function does not know about SEQUENCEs and hence should not be 2028: called after delay-slot filling has been done. */ 2029: 2030: void 2031: reorder_insns (from, to, after) 2032: rtx from, to, after; 2033: { 2034: /* Splice this bunch out of where it is now. */ 2035: if (PREV_INSN (from)) 2036: NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); 2037: if (NEXT_INSN (to)) 2038: PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); 2039: if (last_insn == to) 2040: last_insn = PREV_INSN (from); 2041: if (first_insn == from) 2042: first_insn = NEXT_INSN (to); 2043: 2044: /* Make the new neighbors point to it and it to them. */ 2045: if (NEXT_INSN (after)) 2046: PREV_INSN (NEXT_INSN (after)) = to; 2047: 2048: NEXT_INSN (to) = NEXT_INSN (after); 2049: PREV_INSN (from) = after; 2050: NEXT_INSN (after) = from; 2051: if (after == last_insn) 2052: last_insn = to; 2053: } 2054: 2055: /* Return the line note insn preceding INSN. */ 2056: 2057: static rtx 2058: find_line_note (insn) 2059: rtx insn; 2060: { 2061: if (no_line_numbers) 2062: return 0; 2063: 2064: for (; insn; insn = PREV_INSN (insn)) 2065: if (GET_CODE (insn) == NOTE 2066: && NOTE_LINE_NUMBER (insn) >= 0) 2067: break; 2068: 2069: return insn; 2070: } 2071: 2072: /* Like reorder_insns, but inserts line notes to preserve the line numbers 2073: of the moved insns when debugging. This may insert a note between AFTER 2074: and FROM, and another one after TO. */ 2075: 2076: void 2077: reorder_insns_with_line_notes (from, to, after) 2078: rtx from, to, after; 2079: { 2080: rtx from_line = find_line_note (from); 2081: rtx after_line = find_line_note (after); 2082: 2083: reorder_insns (from, to, after); 2084: 2085: if (from_line == after_line) 2086: return; 2087: 2088: if (from_line) 2089: emit_line_note_after (NOTE_SOURCE_FILE (from_line), 2090: NOTE_LINE_NUMBER (from_line), 2091: after); 2092: if (after_line) 2093: emit_line_note_after (NOTE_SOURCE_FILE (after_line), 2094: NOTE_LINE_NUMBER (after_line), 2095: to); 2096: } 2097: 2098: /* Emit an insn of given code and pattern 2099: at a specified place within the doubly-linked list. */ 2100: 2101: /* Make an instruction with body PATTERN 2102: and output it before the instruction BEFORE. */ 2103: 2104: rtx 2105: emit_insn_before (pattern, before) 2106: register rtx pattern, before; 2107: { 2108: register rtx insn = before; 2109: 2110: if (GET_CODE (pattern) == SEQUENCE) 2111: { 2112: register int i; 2113: 2114: for (i = 0; i < XVECLEN (pattern, 0); i++) 2115: { 2116: insn = XVECEXP (pattern, 0, i); 2117: add_insn_after (insn, PREV_INSN (before)); 2118: } 2119: if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) 2120: sequence_result[XVECLEN (pattern, 0)] = pattern; 2121: } 2122: else 2123: { 1.1.1.4 root 2124: insn = make_insn_raw (pattern); 1.1 root 2125: add_insn_after (insn, PREV_INSN (before)); 2126: } 2127: 2128: return insn; 2129: } 2130: 2131: /* Make an instruction with body PATTERN and code JUMP_INSN 2132: and output it before the instruction BEFORE. */ 2133: 2134: rtx 2135: emit_jump_insn_before (pattern, before) 2136: register rtx pattern, before; 2137: { 2138: register rtx insn; 2139: 2140: if (GET_CODE (pattern) == SEQUENCE) 2141: insn = emit_insn_before (pattern, before); 2142: else 2143: { 1.1.1.5 ! root 2144: insn = make_jump_insn_raw (pattern); 1.1 root 2145: add_insn_after (insn, PREV_INSN (before)); 2146: } 2147: 2148: return insn; 2149: } 2150: 2151: /* Make an instruction with body PATTERN and code CALL_INSN 2152: and output it before the instruction BEFORE. */ 2153: 2154: rtx 2155: emit_call_insn_before (pattern, before) 2156: register rtx pattern, before; 2157: { 2158: rtx insn = emit_insn_before (pattern, before); 2159: PUT_CODE (insn, CALL_INSN); 2160: return insn; 2161: } 2162: 2163: /* Make an insn of code BARRIER 2164: and output it before the insn AFTER. */ 2165: 2166: rtx 2167: emit_barrier_before (before) 2168: register rtx before; 2169: { 2170: register rtx insn = rtx_alloc (BARRIER); 2171: 2172: INSN_UID (insn) = cur_insn_uid++; 2173: 2174: add_insn_after (insn, PREV_INSN (before)); 2175: return insn; 2176: } 2177: 2178: /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ 2179: 2180: rtx 2181: emit_note_before (subtype, before) 2182: int subtype; 2183: rtx before; 2184: { 2185: register rtx note = rtx_alloc (NOTE); 2186: INSN_UID (note) = cur_insn_uid++; 2187: NOTE_SOURCE_FILE (note) = 0; 2188: NOTE_LINE_NUMBER (note) = subtype; 2189: 2190: add_insn_after (note, PREV_INSN (before)); 2191: return note; 2192: } 2193: 2194: /* Make an insn of code INSN with body PATTERN 2195: and output it after the insn AFTER. */ 2196: 2197: rtx 2198: emit_insn_after (pattern, after) 2199: register rtx pattern, after; 2200: { 2201: register rtx insn = after; 2202: 2203: if (GET_CODE (pattern) == SEQUENCE) 2204: { 2205: register int i; 2206: 2207: for (i = 0; i < XVECLEN (pattern, 0); i++) 2208: { 2209: insn = XVECEXP (pattern, 0, i); 2210: add_insn_after (insn, after); 2211: after = insn; 2212: } 2213: if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) 2214: sequence_result[XVECLEN (pattern, 0)] = pattern; 2215: } 2216: else 2217: { 1.1.1.4 root 2218: insn = make_insn_raw (pattern); 1.1 root 2219: add_insn_after (insn, after); 2220: } 2221: 2222: return insn; 2223: } 2224: 1.1.1.4 root 2225: /* Similar to emit_insn_after, except that line notes are to be inserted so 2226: as to act as if this insn were at FROM. */ 2227: 2228: void 2229: emit_insn_after_with_line_notes (pattern, after, from) 2230: rtx pattern, after, from; 2231: { 2232: rtx from_line = find_line_note (from); 2233: rtx after_line = find_line_note (after); 2234: rtx insn = emit_insn_after (pattern, after); 2235: 2236: if (from_line) 2237: emit_line_note_after (NOTE_SOURCE_FILE (from_line), 2238: NOTE_LINE_NUMBER (from_line), 2239: after); 2240: 2241: if (after_line) 2242: emit_line_note_after (NOTE_SOURCE_FILE (after_line), 2243: NOTE_LINE_NUMBER (after_line), 2244: insn); 2245: } 2246: 1.1 root 2247: /* Make an insn of code JUMP_INSN with body PATTERN 2248: and output it after the insn AFTER. */ 2249: 2250: rtx 2251: emit_jump_insn_after (pattern, after) 2252: register rtx pattern, after; 2253: { 2254: register rtx insn; 2255: 2256: if (GET_CODE (pattern) == SEQUENCE) 2257: insn = emit_insn_after (pattern, after); 2258: else 2259: { 1.1.1.5 ! root 2260: insn = make_jump_insn_raw (pattern); 1.1 root 2261: add_insn_after (insn, after); 2262: } 2263: 2264: return insn; 2265: } 2266: 2267: /* Make an insn of code BARRIER 2268: and output it after the insn AFTER. */ 2269: 2270: rtx 2271: emit_barrier_after (after) 2272: register rtx after; 2273: { 2274: register rtx insn = rtx_alloc (BARRIER); 2275: 2276: INSN_UID (insn) = cur_insn_uid++; 2277: 2278: add_insn_after (insn, after); 2279: return insn; 2280: } 2281: 2282: /* Emit the label LABEL after the insn AFTER. */ 2283: 2284: rtx 2285: emit_label_after (label, after) 2286: rtx label, after; 2287: { 2288: /* This can be called twice for the same label 2289: as a result of the confusion that follows a syntax error! 2290: So make it harmless. */ 2291: if (INSN_UID (label) == 0) 2292: { 2293: INSN_UID (label) = cur_insn_uid++; 2294: add_insn_after (label, after); 2295: } 2296: 2297: return label; 2298: } 2299: 2300: /* Emit a note of subtype SUBTYPE after the insn AFTER. */ 2301: 2302: rtx 2303: emit_note_after (subtype, after) 2304: int subtype; 2305: rtx after; 2306: { 2307: register rtx note = rtx_alloc (NOTE); 2308: INSN_UID (note) = cur_insn_uid++; 2309: NOTE_SOURCE_FILE (note) = 0; 2310: NOTE_LINE_NUMBER (note) = subtype; 2311: add_insn_after (note, after); 2312: return note; 2313: } 2314: 2315: /* Emit a line note for FILE and LINE after the insn AFTER. */ 2316: 2317: rtx 2318: emit_line_note_after (file, line, after) 2319: char *file; 2320: int line; 2321: rtx after; 2322: { 2323: register rtx note; 2324: 2325: if (no_line_numbers && line > 0) 2326: { 2327: cur_insn_uid++; 2328: return 0; 2329: } 2330: 2331: note = rtx_alloc (NOTE); 2332: INSN_UID (note) = cur_insn_uid++; 2333: NOTE_SOURCE_FILE (note) = file; 2334: NOTE_LINE_NUMBER (note) = line; 2335: add_insn_after (note, after); 2336: return note; 2337: } 2338: 2339: /* Make an insn of code INSN with pattern PATTERN 2340: and add it to the end of the doubly-linked list. 2341: If PATTERN is a SEQUENCE, take the elements of it 2342: and emit an insn for each element. 2343: 2344: Returns the last insn emitted. */ 2345: 2346: rtx 2347: emit_insn (pattern) 2348: rtx pattern; 2349: { 2350: rtx insn = last_insn; 2351: 2352: if (GET_CODE (pattern) == SEQUENCE) 2353: { 2354: register int i; 2355: 2356: for (i = 0; i < XVECLEN (pattern, 0); i++) 2357: { 2358: insn = XVECEXP (pattern, 0, i); 2359: add_insn (insn); 2360: } 2361: if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) 2362: sequence_result[XVECLEN (pattern, 0)] = pattern; 2363: } 2364: else 2365: { 1.1.1.4 root 2366: insn = make_insn_raw (pattern); 1.1 root 2367: add_insn (insn); 2368: } 2369: 2370: return insn; 2371: } 2372: 2373: /* Emit the insns in a chain starting with INSN. 2374: Return the last insn emitted. */ 2375: 2376: rtx 2377: emit_insns (insn) 2378: rtx insn; 2379: { 2380: rtx last = 0; 2381: 2382: while (insn) 2383: { 2384: rtx next = NEXT_INSN (insn); 2385: add_insn (insn); 2386: last = insn; 2387: insn = next; 2388: } 2389: 2390: return last; 2391: } 2392: 2393: /* Emit the insns in a chain starting with INSN and place them in front of 2394: the insn BEFORE. Return the last insn emitted. */ 2395: 2396: rtx 2397: emit_insns_before (insn, before) 2398: rtx insn; 2399: rtx before; 2400: { 2401: rtx last = 0; 2402: 2403: while (insn) 2404: { 2405: rtx next = NEXT_INSN (insn); 2406: add_insn_after (insn, PREV_INSN (before)); 2407: last = insn; 2408: insn = next; 2409: } 2410: 2411: return last; 2412: } 2413: 1.1.1.4 root 2414: /* Emit the insns in a chain starting with FIRST and place them in back of 2415: the insn AFTER. Return the last insn emitted. */ 2416: 2417: rtx 2418: emit_insns_after (first, after) 2419: register rtx first; 2420: register rtx after; 2421: { 2422: register rtx last; 2423: register rtx after_after; 2424: 2425: if (!after) 2426: abort (); 2427: 2428: if (!first) 2429: return first; 2430: 2431: for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) 2432: continue; 2433: 2434: after_after = NEXT_INSN (after); 2435: 2436: NEXT_INSN (after) = first; 2437: PREV_INSN (first) = after; 2438: NEXT_INSN (last) = after_after; 2439: if (after_after) 2440: PREV_INSN (after_after) = last; 2441: 2442: if (after == last_insn) 2443: last_insn = last; 2444: return last; 2445: } 2446: 1.1 root 2447: /* Make an insn of code JUMP_INSN with pattern PATTERN 2448: and add it to the end of the doubly-linked list. */ 2449: 2450: rtx 2451: emit_jump_insn (pattern) 2452: rtx pattern; 2453: { 2454: if (GET_CODE (pattern) == SEQUENCE) 2455: return emit_insn (pattern); 2456: else 2457: { 1.1.1.5 ! root 2458: register rtx insn = make_jump_insn_raw (pattern); 1.1 root 2459: add_insn (insn); 2460: return insn; 2461: } 2462: } 2463: 2464: /* Make an insn of code CALL_INSN with pattern PATTERN 2465: and add it to the end of the doubly-linked list. */ 2466: 2467: rtx 2468: emit_call_insn (pattern) 2469: rtx pattern; 2470: { 2471: if (GET_CODE (pattern) == SEQUENCE) 2472: return emit_insn (pattern); 2473: else 2474: { 1.1.1.4 root 2475: register rtx insn = make_insn_raw (pattern); 1.1 root 2476: add_insn (insn); 2477: PUT_CODE (insn, CALL_INSN); 2478: return insn; 2479: } 2480: } 2481: 2482: /* Add the label LABEL to the end of the doubly-linked list. */ 2483: 2484: rtx 2485: emit_label (label) 2486: rtx label; 2487: { 2488: /* This can be called twice for the same label 2489: as a result of the confusion that follows a syntax error! 2490: So make it harmless. */ 2491: if (INSN_UID (label) == 0) 2492: { 2493: INSN_UID (label) = cur_insn_uid++; 2494: add_insn (label); 2495: } 2496: return label; 2497: } 2498: 2499: /* Make an insn of code BARRIER 2500: and add it to the end of the doubly-linked list. */ 2501: 2502: rtx 2503: emit_barrier () 2504: { 2505: register rtx barrier = rtx_alloc (BARRIER); 2506: INSN_UID (barrier) = cur_insn_uid++; 2507: add_insn (barrier); 2508: return barrier; 2509: } 2510: 2511: /* Make an insn of code NOTE 2512: with data-fields specified by FILE and LINE 2513: and add it to the end of the doubly-linked list, 2514: but only if line-numbers are desired for debugging info. */ 2515: 2516: rtx 2517: emit_line_note (file, line) 2518: char *file; 2519: int line; 2520: { 2521: emit_filename = file; 2522: emit_lineno = line; 2523: 2524: #if 0 2525: if (no_line_numbers) 2526: return 0; 2527: #endif 2528: 2529: return emit_note (file, line); 2530: } 2531: 2532: /* Make an insn of code NOTE 2533: with data-fields specified by FILE and LINE 2534: and add it to the end of the doubly-linked list. 2535: If it is a line-number NOTE, omit it if it matches the previous one. */ 2536: 2537: rtx 2538: emit_note (file, line) 2539: char *file; 2540: int line; 2541: { 2542: register rtx note; 2543: 2544: if (line > 0) 2545: { 2546: if (file && last_filename && !strcmp (file, last_filename) 2547: && line == last_linenum) 2548: return 0; 2549: last_filename = file; 2550: last_linenum = line; 2551: } 2552: 2553: if (no_line_numbers && line > 0) 2554: { 2555: cur_insn_uid++; 2556: return 0; 2557: } 2558: 2559: note = rtx_alloc (NOTE); 2560: INSN_UID (note) = cur_insn_uid++; 2561: NOTE_SOURCE_FILE (note) = file; 2562: NOTE_LINE_NUMBER (note) = line; 2563: add_insn (note); 2564: return note; 2565: } 2566: 2567: /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ 2568: 2569: rtx 2570: emit_line_note_force (file, line) 2571: char *file; 2572: int line; 2573: { 2574: last_linenum = -1; 2575: return emit_line_note (file, line); 2576: } 2577: 2578: /* Cause next statement to emit a line note even if the line number 2579: has not changed. This is used at the beginning of a function. */ 2580: 2581: void 2582: force_next_line_note () 2583: { 2584: last_linenum = -1; 2585: } 2586: 2587: /* Return an indication of which type of insn should have X as a body. 2588: The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ 2589: 2590: enum rtx_code 2591: classify_insn (x) 2592: rtx x; 2593: { 2594: if (GET_CODE (x) == CODE_LABEL) 2595: return CODE_LABEL; 2596: if (GET_CODE (x) == CALL) 2597: return CALL_INSN; 2598: if (GET_CODE (x) == RETURN) 2599: return JUMP_INSN; 2600: if (GET_CODE (x) == SET) 2601: { 2602: if (SET_DEST (x) == pc_rtx) 2603: return JUMP_INSN; 2604: else if (GET_CODE (SET_SRC (x)) == CALL) 2605: return CALL_INSN; 2606: else 2607: return INSN; 2608: } 2609: if (GET_CODE (x) == PARALLEL) 2610: { 2611: register int j; 2612: for (j = XVECLEN (x, 0) - 1; j >= 0; j--) 2613: if (GET_CODE (XVECEXP (x, 0, j)) == CALL) 2614: return CALL_INSN; 2615: else if (GET_CODE (XVECEXP (x, 0, j)) == SET 2616: && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) 2617: return JUMP_INSN; 2618: else if (GET_CODE (XVECEXP (x, 0, j)) == SET 2619: && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) 2620: return CALL_INSN; 2621: } 2622: return INSN; 2623: } 2624: 2625: /* Emit the rtl pattern X as an appropriate kind of insn. 2626: If X is a label, it is simply added into the insn chain. */ 2627: 2628: rtx 2629: emit (x) 2630: rtx x; 2631: { 2632: enum rtx_code code = classify_insn (x); 2633: 2634: if (code == CODE_LABEL) 2635: return emit_label (x); 2636: else if (code == INSN) 2637: return emit_insn (x); 2638: else if (code == JUMP_INSN) 2639: { 2640: register rtx insn = emit_jump_insn (x); 2641: if (simplejump_p (insn) || GET_CODE (x) == RETURN) 2642: return emit_barrier (); 2643: return insn; 2644: } 2645: else if (code == CALL_INSN) 2646: return emit_call_insn (x); 2647: else 2648: abort (); 2649: } 2650: 2651: /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ 2652: 2653: void 2654: start_sequence () 2655: { 2656: struct sequence_stack *tem; 2657: 2658: if (sequence_element_free_list) 2659: { 2660: /* Reuse a previously-saved struct sequence_stack. */ 2661: tem = sequence_element_free_list; 2662: sequence_element_free_list = tem->next; 2663: } 2664: else 2665: tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); 2666: 2667: tem->next = sequence_stack; 2668: tem->first = first_insn; 2669: tem->last = last_insn; 2670: 2671: sequence_stack = tem; 2672: 2673: first_insn = 0; 2674: last_insn = 0; 2675: } 2676: 2677: /* Set up the insn chain starting with FIRST 2678: as the current sequence, saving the previously current one. */ 2679: 2680: void 2681: push_to_sequence (first) 2682: rtx first; 2683: { 2684: rtx last; 2685: 2686: start_sequence (); 2687: 2688: for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); 2689: 2690: first_insn = first; 2691: last_insn = last; 2692: } 2693: 1.1.1.5 ! root 2694: /* Set up the outer-level insn chain ! 2695: as the current sequence, saving the previously current one. */ ! 2696: ! 2697: void ! 2698: push_topmost_sequence () ! 2699: { ! 2700: struct sequence_stack *stack, *top; ! 2701: ! 2702: start_sequence (); ! 2703: ! 2704: for (stack = sequence_stack; stack; stack = stack->next) ! 2705: top = stack; ! 2706: ! 2707: first_insn = top->first; ! 2708: last_insn = top->last; ! 2709: } ! 2710: ! 2711: /* After emitting to the outer-level insn chain, update the outer-level ! 2712: insn chain, and restore the previous saved state. */ ! 2713: ! 2714: void ! 2715: pop_topmost_sequence () ! 2716: { ! 2717: struct sequence_stack *stack, *top; ! 2718: ! 2719: for (stack = sequence_stack; stack; stack = stack->next) ! 2720: top = stack; ! 2721: ! 2722: top->first = first_insn; ! 2723: top->last = last_insn; ! 2724: ! 2725: end_sequence (); ! 2726: } ! 2727: 1.1 root 2728: /* After emitting to a sequence, restore previous saved state. 2729: 2730: To get the contents of the sequence just made, 2731: you must call `gen_sequence' *before* calling here. */ 2732: 2733: void 2734: end_sequence () 2735: { 2736: struct sequence_stack *tem = sequence_stack; 2737: 2738: first_insn = tem->first; 2739: last_insn = tem->last; 2740: sequence_stack = tem->next; 2741: 2742: tem->next = sequence_element_free_list; 2743: sequence_element_free_list = tem; 2744: } 2745: 2746: /* Return 1 if currently emitting into a sequence. */ 2747: 2748: int 2749: in_sequence_p () 2750: { 2751: return sequence_stack != 0; 2752: } 2753: 2754: /* Generate a SEQUENCE rtx containing the insns already emitted 2755: to the current sequence. 2756: 2757: This is how the gen_... function from a DEFINE_EXPAND 2758: constructs the SEQUENCE that it returns. */ 2759: 2760: rtx 2761: gen_sequence () 2762: { 2763: rtx result; 2764: rtx tem; 2765: rtvec newvec; 2766: int i; 2767: int len; 2768: 2769: /* Count the insns in the chain. */ 2770: len = 0; 2771: for (tem = first_insn; tem; tem = NEXT_INSN (tem)) 2772: len++; 2773: 2774: /* If only one insn, return its pattern rather than a SEQUENCE. 2775: (Now that we cache SEQUENCE expressions, it isn't worth special-casing 2776: the case of an empty list.) */ 2777: if (len == 1 2778: && (GET_CODE (first_insn) == INSN 2779: || GET_CODE (first_insn) == JUMP_INSN 2780: || GET_CODE (first_insn) == CALL_INSN)) 2781: return PATTERN (first_insn); 2782: 2783: /* Put them in a vector. See if we already have a SEQUENCE of the 2784: appropriate length around. */ 2785: if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) 2786: sequence_result[len] = 0; 2787: else 2788: { 2789: /* Ensure that this rtl goes in saveable_obstack, since we may be 2790: caching it. */ 1.1.1.5 ! root 2791: push_obstacks_nochange (); ! 2792: rtl_in_saveable_obstack (); 1.1 root 2793: result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len)); 1.1.1.5 ! root 2794: pop_obstacks (); 1.1 root 2795: } 2796: 2797: for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) 2798: XVECEXP (result, 0, i) = tem; 2799: 2800: return result; 2801: } 2802: 2803: /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag 2804: according to the chain of insns starting with FIRST. 2805: 2806: Also set cur_insn_uid to exceed the largest uid in that chain. 2807: 2808: This is used when an inline function's rtl is saved 2809: and passed to rest_of_compilation later. */ 2810: 2811: static void restore_reg_data_1 (); 2812: 2813: void 2814: restore_reg_data (first) 2815: rtx first; 2816: { 2817: register rtx insn; 2818: int i; 2819: register int max_uid = 0; 2820: 2821: for (insn = first; insn; insn = NEXT_INSN (insn)) 2822: { 2823: if (INSN_UID (insn) >= max_uid) 2824: max_uid = INSN_UID (insn); 2825: 2826: switch (GET_CODE (insn)) 2827: { 2828: case NOTE: 2829: case CODE_LABEL: 2830: case BARRIER: 2831: break; 2832: 2833: case JUMP_INSN: 2834: case CALL_INSN: 2835: case INSN: 2836: restore_reg_data_1 (PATTERN (insn)); 2837: break; 2838: } 2839: } 2840: 2841: /* Don't duplicate the uids already in use. */ 2842: cur_insn_uid = max_uid + 1; 2843: 2844: /* If any regs are missing, make them up. 2845: 2846: ??? word_mode is not necessarily the right mode. Most likely these REGs 2847: are never used. At some point this should be checked. */ 2848: 2849: for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++) 2850: if (regno_reg_rtx[i] == 0) 2851: regno_reg_rtx[i] = gen_rtx (REG, word_mode, i); 2852: } 2853: 2854: static void 2855: restore_reg_data_1 (orig) 2856: rtx orig; 2857: { 2858: register rtx x = orig; 2859: register int i; 2860: register enum rtx_code code; 2861: register char *format_ptr; 2862: 2863: code = GET_CODE (x); 2864: 2865: switch (code) 2866: { 2867: case QUEUED: 2868: case CONST_INT: 2869: case CONST_DOUBLE: 2870: case SYMBOL_REF: 2871: case CODE_LABEL: 2872: case PC: 2873: case CC0: 2874: case LABEL_REF: 2875: return; 2876: 2877: case REG: 2878: if (REGNO (x) >= FIRST_PSEUDO_REGISTER) 2879: { 2880: /* Make sure regno_pointer_flag and regno_reg_rtx are large 2881: enough to have an element for this pseudo reg number. */ 2882: if (REGNO (x) >= reg_rtx_no) 2883: { 2884: reg_rtx_no = REGNO (x); 2885: 2886: if (reg_rtx_no >= regno_pointer_flag_length) 2887: { 2888: int newlen = MAX (regno_pointer_flag_length * 2, 2889: reg_rtx_no + 30); 2890: rtx *new1; 2891: char *new = (char *) oballoc (newlen); 2892: bzero (new, newlen); 2893: bcopy (regno_pointer_flag, new, regno_pointer_flag_length); 2894: 2895: new1 = (rtx *) oballoc (newlen * sizeof (rtx)); 2896: bzero (new1, newlen * sizeof (rtx)); 2897: bcopy (regno_reg_rtx, new1, regno_pointer_flag_length * sizeof (rtx)); 2898: 2899: regno_pointer_flag = new; 2900: regno_reg_rtx = new1; 2901: regno_pointer_flag_length = newlen; 2902: } 2903: reg_rtx_no ++; 2904: } 2905: regno_reg_rtx[REGNO (x)] = x; 2906: } 2907: return; 2908: 2909: case MEM: 2910: if (GET_CODE (XEXP (x, 0)) == REG) 2911: mark_reg_pointer (XEXP (x, 0)); 2912: restore_reg_data_1 (XEXP (x, 0)); 2913: return; 2914: } 2915: 2916: /* Now scan the subexpressions recursively. */ 2917: 2918: format_ptr = GET_RTX_FORMAT (code); 2919: 2920: for (i = 0; i < GET_RTX_LENGTH (code); i++) 2921: { 2922: switch (*format_ptr++) 2923: { 2924: case 'e': 2925: restore_reg_data_1 (XEXP (x, i)); 2926: break; 2927: 2928: case 'E': 2929: if (XVEC (x, i) != NULL) 2930: { 2931: register int j; 2932: 2933: for (j = 0; j < XVECLEN (x, i); j++) 2934: restore_reg_data_1 (XVECEXP (x, i, j)); 2935: } 2936: break; 2937: } 2938: } 2939: } 2940: 2941: /* Initialize data structures and variables in this file 2942: before generating rtl for each function. */ 2943: 2944: void 2945: init_emit () 2946: { 2947: int i; 2948: 2949: first_insn = NULL; 2950: last_insn = NULL; 2951: cur_insn_uid = 1; 2952: reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; 2953: last_linenum = 0; 2954: last_filename = 0; 2955: first_label_num = label_num; 2956: last_label_num = 0; 1.1.1.5 ! root 2957: sequence_stack = NULL; 1.1 root 2958: 2959: /* Clear the start_sequence/gen_sequence cache. */ 2960: sequence_element_free_list = 0; 2961: for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) 2962: sequence_result[i] = 0; 2963: 2964: /* Init the tables that describe all the pseudo regs. */ 2965: 2966: regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; 2967: 2968: regno_pointer_flag 2969: = (char *) oballoc (regno_pointer_flag_length); 2970: bzero (regno_pointer_flag, regno_pointer_flag_length); 2971: 2972: regno_reg_rtx 2973: = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); 2974: bzero (regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); 2975: 2976: /* Put copies of all the virtual register rtx into regno_reg_rtx. */ 2977: regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; 2978: regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; 2979: regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; 2980: regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; 1.1.1.4 root 2981: 2982: /* Indicate that the virtual registers and stack locations are 2983: all pointers. */ 2984: REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; 2985: REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; 2986: REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; 2987: 2988: REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; 2989: REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; 2990: REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; 2991: REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; 1.1.1.5 ! root 2992: ! 2993: #ifdef INIT_EXPANDERS ! 2994: INIT_EXPANDERS; ! 2995: #endif 1.1 root 2996: } 2997: 2998: /* Create some permanent unique rtl objects shared between all functions. 2999: LINE_NUMBERS is nonzero if line numbers are to be generated. */ 3000: 3001: void 3002: init_emit_once (line_numbers) 3003: int line_numbers; 3004: { 3005: int i; 3006: enum machine_mode mode; 3007: 3008: no_line_numbers = ! line_numbers; 3009: 3010: sequence_stack = NULL; 3011: 3012: /* Create the unique rtx's for certain rtx codes and operand values. */ 3013: 3014: pc_rtx = gen_rtx (PC, VOIDmode); 3015: cc0_rtx = gen_rtx (CC0, VOIDmode); 3016: 3017: /* Don't use gen_rtx here since gen_rtx in this case 3018: tries to use these variables. */ 3019: for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) 3020: { 3021: const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT); 3022: PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); 3023: INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; 3024: } 3025: 3026: /* These four calls obtain some of the rtx expressions made above. */ 1.1.1.4 root 3027: const0_rtx = GEN_INT (0); 3028: const1_rtx = GEN_INT (1); 3029: const2_rtx = GEN_INT (2); 3030: constm1_rtx = GEN_INT (-1); 1.1 root 3031: 3032: /* This will usually be one of the above constants, but may be a new rtx. */ 1.1.1.4 root 3033: const_true_rtx = GEN_INT (STORE_FLAG_VALUE); 1.1 root 3034: 1.1.1.5 ! root 3035: dconst0 = REAL_VALUE_ATOF ("0", DFmode); ! 3036: dconst1 = REAL_VALUE_ATOF ("1", DFmode); ! 3037: dconst2 = REAL_VALUE_ATOF ("2", DFmode); ! 3038: dconstm1 = REAL_VALUE_ATOF ("-1", DFmode); 1.1 root 3039: 3040: for (i = 0; i <= 2; i++) 3041: { 3042: for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; 3043: mode = GET_MODE_WIDER_MODE (mode)) 3044: { 3045: rtx tem = rtx_alloc (CONST_DOUBLE); 3046: union real_extract u; 3047: 3048: bzero (&u, sizeof u); /* Zero any holes in a structure. */ 3049: u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; 3050: 3051: bcopy (&u, &CONST_DOUBLE_LOW (tem), sizeof u); 3052: CONST_DOUBLE_MEM (tem) = cc0_rtx; 3053: PUT_MODE (tem, mode); 3054: 3055: const_tiny_rtx[i][(int) mode] = tem; 3056: } 3057: 1.1.1.4 root 3058: const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); 1.1 root 3059: 3060: for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; 3061: mode = GET_MODE_WIDER_MODE (mode)) 1.1.1.4 root 3062: const_tiny_rtx[i][(int) mode] = GEN_INT (i); 1.1.1.5 ! root 3063: ! 3064: for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); ! 3065: mode != VOIDmode; ! 3066: mode = GET_MODE_WIDER_MODE (mode)) ! 3067: const_tiny_rtx[i][(int) mode] = GEN_INT (i); 1.1 root 3068: } 3069: 1.1.1.4 root 3070: for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; 3071: mode = GET_MODE_WIDER_MODE (mode)) 3072: const_tiny_rtx[0][(int) mode] = const0_rtx; 3073: 1.1 root 3074: stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); 3075: frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM); 3076: 3077: if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) 3078: arg_pointer_rtx = frame_pointer_rtx; 3079: else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM) 3080: arg_pointer_rtx = stack_pointer_rtx; 3081: else 3082: arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM); 3083: 3084: /* Create the virtual registers. Do so here since the following objects 3085: might reference them. */ 3086: 3087: virtual_incoming_args_rtx = gen_rtx (REG, Pmode, 3088: VIRTUAL_INCOMING_ARGS_REGNUM); 3089: virtual_stack_vars_rtx = gen_rtx (REG, Pmode, 3090: VIRTUAL_STACK_VARS_REGNUM); 3091: virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode, 3092: VIRTUAL_STACK_DYNAMIC_REGNUM); 3093: virtual_outgoing_args_rtx = gen_rtx (REG, Pmode, 3094: VIRTUAL_OUTGOING_ARGS_REGNUM); 3095: 3096: #ifdef STRUCT_VALUE 3097: struct_value_rtx = STRUCT_VALUE; 3098: #else 3099: struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM); 3100: #endif 3101: 3102: #ifdef STRUCT_VALUE_INCOMING 3103: struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; 3104: #else 3105: #ifdef STRUCT_VALUE_INCOMING_REGNUM 3106: struct_value_incoming_rtx 3107: = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM); 3108: #else 3109: struct_value_incoming_rtx = struct_value_rtx; 3110: #endif 3111: #endif 3112: 3113: #ifdef STATIC_CHAIN_REGNUM 3114: static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); 3115: 3116: #ifdef STATIC_CHAIN_INCOMING_REGNUM 3117: if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) 3118: static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM); 3119: else 3120: #endif 3121: static_chain_incoming_rtx = static_chain_rtx; 3122: #endif 3123: 3124: #ifdef STATIC_CHAIN 3125: static_chain_rtx = STATIC_CHAIN; 3126: 3127: #ifdef STATIC_CHAIN_INCOMING 3128: static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; 3129: #else 3130: static_chain_incoming_rtx = static_chain_rtx; 3131: #endif 3132: #endif 3133: 3134: #ifdef PIC_OFFSET_TABLE_REGNUM 3135: pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM); 3136: #endif 3137: }
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