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1.1 root 1: /* Emit RTL for the GNU C-Compiler expander. 1.1.1.7 ! root 2: Copyright (C) 1987, 1988, 1992, 1993, 1994 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: /* Middle-to-low level generation of rtx code and insns. 22: 23: This file contains the functions `gen_rtx', `gen_reg_rtx' 24: and `gen_label_rtx' that are the usual ways of creating rtl 25: expressions for most purposes. 26: 27: It also has the functions for creating insns and linking 28: them in the doubly-linked chain. 29: 30: The patterns of the insns are created by machine-dependent 31: routines in insn-emit.c, which is generated automatically from 32: the machine description. These routines use `gen_rtx' to make 33: the individual rtx's of the pattern; what is machine dependent 34: is the kind of rtx's they make and what arguments they use. */ 35: 36: #include "config.h" 1.1.1.7 ! root 37: #ifdef __STDC__ ! 38: #include <stdarg.h> ! 39: #else ! 40: #include <varargs.h> ! 41: #endif 1.1 root 42: #include "rtl.h" 1.1.1.6 root 43: #include "tree.h" 1.1 root 44: #include "flags.h" 45: #include "function.h" 46: #include "expr.h" 47: #include "regs.h" 48: #include "insn-config.h" 49: #include "real.h" 1.1.1.6 root 50: #include "obstack.h" 51: 52: #include "bytecode.h" 53: #include "machmode.h" 54: #include "bc-opcode.h" 55: #include "bc-typecd.h" 56: #include "bc-optab.h" 57: #include "bc-emit.h" 58: 1.1.1.4 root 59: #include <stdio.h> 1.1 root 60: 1.1.1.6 root 61: 62: /* Opcode names */ 63: #ifdef BCDEBUG_PRINT_CODE 64: char *opcode_name[] = 65: { 66: #include "bc-opname.h" 67: 68: "***END***" 69: }; 70: #endif 71: 72: 73: /* Commonly used modes. */ 74: 75: enum machine_mode byte_mode; /* Mode whose width is BITS_PER_UNIT */ 76: enum machine_mode word_mode; /* Mode whose width is BITS_PER_WORD */ 77: 1.1 root 78: /* This is reset to LAST_VIRTUAL_REGISTER + 1 at the start of each function. 79: After rtl generation, it is 1 plus the largest register number used. */ 80: 81: int reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; 82: 83: /* This is *not* reset after each function. It gives each CODE_LABEL 84: in the entire compilation a unique label number. */ 85: 86: static int label_num = 1; 87: 88: /* Lowest label number in current function. */ 89: 90: static int first_label_num; 91: 92: /* Highest label number in current function. 93: Zero means use the value of label_num instead. 94: This is nonzero only when belatedly compiling an inline function. */ 95: 96: static int last_label_num; 97: 98: /* Value label_num had when set_new_first_and_last_label_number was called. 99: If label_num has not changed since then, last_label_num is valid. */ 100: 101: static int base_label_num; 102: 103: /* Nonzero means do not generate NOTEs for source line numbers. */ 104: 105: static int no_line_numbers; 106: 107: /* Commonly used rtx's, so that we only need space for one copy. 108: These are initialized once for the entire compilation. 109: All of these except perhaps the floating-point CONST_DOUBLEs 110: are unique; no other rtx-object will be equal to any of these. */ 111: 112: rtx pc_rtx; /* (PC) */ 113: rtx cc0_rtx; /* (CC0) */ 114: rtx cc1_rtx; /* (CC1) (not actually used nowadays) */ 115: rtx const0_rtx; /* (CONST_INT 0) */ 116: rtx const1_rtx; /* (CONST_INT 1) */ 117: rtx const2_rtx; /* (CONST_INT 2) */ 118: rtx constm1_rtx; /* (CONST_INT -1) */ 119: rtx const_true_rtx; /* (CONST_INT STORE_FLAG_VALUE) */ 120: 121: /* We record floating-point CONST_DOUBLEs in each floating-point mode for 122: the values of 0, 1, and 2. For the integer entries and VOIDmode, we 123: record a copy of const[012]_rtx. */ 124: 125: rtx const_tiny_rtx[3][(int) MAX_MACHINE_MODE]; 126: 127: REAL_VALUE_TYPE dconst0; 128: REAL_VALUE_TYPE dconst1; 129: REAL_VALUE_TYPE dconst2; 130: REAL_VALUE_TYPE dconstm1; 131: 132: /* All references to the following fixed hard registers go through 133: these unique rtl objects. On machines where the frame-pointer and 134: arg-pointer are the same register, they use the same unique object. 135: 136: After register allocation, other rtl objects which used to be pseudo-regs 137: may be clobbered to refer to the frame-pointer register. 138: But references that were originally to the frame-pointer can be 139: distinguished from the others because they contain frame_pointer_rtx. 140: 1.1.1.6 root 141: When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little 142: tricky: until register elimination has taken place hard_frame_pointer_rtx 143: should be used if it is being set, and frame_pointer_rtx otherwise. After 144: register elimination hard_frame_pointer_rtx should always be used. 145: On machines where the two registers are same (most) then these are the 146: same. 147: 1.1 root 148: In an inline procedure, the stack and frame pointer rtxs may not be 149: used for anything else. */ 150: rtx stack_pointer_rtx; /* (REG:Pmode STACK_POINTER_REGNUM) */ 151: rtx frame_pointer_rtx; /* (REG:Pmode FRAME_POINTER_REGNUM) */ 1.1.1.6 root 152: rtx hard_frame_pointer_rtx; /* (REG:Pmode HARD_FRAME_POINTER_REGNUM) */ 1.1 root 153: rtx arg_pointer_rtx; /* (REG:Pmode ARG_POINTER_REGNUM) */ 154: rtx struct_value_rtx; /* (REG:Pmode STRUCT_VALUE_REGNUM) */ 155: rtx struct_value_incoming_rtx; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */ 156: rtx static_chain_rtx; /* (REG:Pmode STATIC_CHAIN_REGNUM) */ 157: rtx static_chain_incoming_rtx; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */ 158: rtx pic_offset_table_rtx; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */ 159: 160: rtx virtual_incoming_args_rtx; /* (REG:Pmode VIRTUAL_INCOMING_ARGS_REGNUM) */ 161: rtx virtual_stack_vars_rtx; /* (REG:Pmode VIRTUAL_STACK_VARS_REGNUM) */ 162: rtx virtual_stack_dynamic_rtx; /* (REG:Pmode VIRTUAL_STACK_DYNAMIC_REGNUM) */ 163: rtx virtual_outgoing_args_rtx; /* (REG:Pmode VIRTUAL_OUTGOING_ARGS_REGNUM) */ 164: 165: /* We make one copy of (const_int C) where C is in 166: [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] 167: to save space during the compilation and simplify comparisons of 168: integers. */ 169: 170: #define MAX_SAVED_CONST_INT 64 171: 172: static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; 173: 174: /* The ends of the doubly-linked chain of rtl for the current function. 175: Both are reset to null at the start of rtl generation for the function. 176: 1.1.1.6 root 177: start_sequence saves both of these on `sequence_stack' along with 178: `sequence_rtl_expr' and then starts a new, nested sequence of insns. */ 1.1 root 179: 180: static rtx first_insn = NULL; 181: static rtx last_insn = NULL; 182: 1.1.1.6 root 183: /* RTL_EXPR within which the current sequence will be placed. Use to 184: prevent reuse of any temporaries within the sequence until after the 185: RTL_EXPR is emitted. */ 186: 187: tree sequence_rtl_expr = NULL; 188: 1.1 root 189: /* INSN_UID for next insn emitted. 190: Reset to 1 for each function compiled. */ 191: 192: static int cur_insn_uid = 1; 193: 194: /* Line number and source file of the last line-number NOTE emitted. 195: This is used to avoid generating duplicates. */ 196: 197: static int last_linenum = 0; 198: static char *last_filename = 0; 199: 200: /* A vector indexed by pseudo reg number. The allocated length 201: of this vector is regno_pointer_flag_length. Since this 202: vector is needed during the expansion phase when the total 203: number of registers in the function is not yet known, 204: it is copied and made bigger when necessary. */ 205: 206: char *regno_pointer_flag; 207: int regno_pointer_flag_length; 208: 209: /* Indexed by pseudo register number, gives the rtx for that pseudo. 210: Allocated in parallel with regno_pointer_flag. */ 211: 212: rtx *regno_reg_rtx; 213: 214: /* Stack of pending (incomplete) sequences saved by `start_sequence'. 215: Each element describes one pending sequence. 216: The main insn-chain is saved in the last element of the chain, 217: unless the chain is empty. */ 218: 219: struct sequence_stack *sequence_stack; 220: 221: /* start_sequence and gen_sequence can make a lot of rtx expressions which are 222: shortly thrown away. We use two mechanisms to prevent this waste: 223: 224: First, we keep a list of the expressions used to represent the sequence 225: stack in sequence_element_free_list. 226: 227: Second, for sizes up to 5 elements, we keep a SEQUENCE and its associated 228: rtvec for use by gen_sequence. One entry for each size is sufficient 229: because most cases are calls to gen_sequence followed by immediately 230: emitting the SEQUENCE. Reuse is safe since emitting a sequence is 231: destructive on the insn in it anyway and hence can't be redone. 232: 233: We do not bother to save this cached data over nested function calls. 234: Instead, we just reinitialize them. */ 235: 236: #define SEQUENCE_RESULT_SIZE 5 237: 238: static struct sequence_stack *sequence_element_free_list; 239: static rtx sequence_result[SEQUENCE_RESULT_SIZE]; 240: 241: extern int rtx_equal_function_value_matters; 242: 243: /* Filename and line number of last line-number note, 244: whether we actually emitted it or not. */ 245: extern char *emit_filename; 246: extern int emit_lineno; 247: 248: rtx change_address (); 249: void init_emit (); 250: 1.1.1.6 root 251: extern struct obstack *rtl_obstack; 252: 253: extern int stack_depth; 254: extern int max_stack_depth; 255: 1.1 root 256: /* rtx gen_rtx (code, mode, [element1, ..., elementn]) 257: ** 258: ** This routine generates an RTX of the size specified by 259: ** <code>, which is an RTX code. The RTX structure is initialized 260: ** from the arguments <element1> through <elementn>, which are 261: ** interpreted according to the specific RTX type's format. The 262: ** special machine mode associated with the rtx (if any) is specified 263: ** in <mode>. 264: ** 1.1.1.5 root 265: ** gen_rtx can be invoked in a way which resembles the lisp-like 1.1 root 266: ** rtx it will generate. For example, the following rtx structure: 267: ** 268: ** (plus:QI (mem:QI (reg:SI 1)) 269: ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3)))) 270: ** 271: ** ...would be generated by the following C code: 272: ** 273: ** gen_rtx (PLUS, QImode, 274: ** gen_rtx (MEM, QImode, 275: ** gen_rtx (REG, SImode, 1)), 276: ** gen_rtx (MEM, QImode, 277: ** gen_rtx (PLUS, SImode, 278: ** gen_rtx (REG, SImode, 2), 279: ** gen_rtx (REG, SImode, 3)))), 280: */ 281: 282: /*VARARGS2*/ 283: rtx 1.1.1.7 ! root 284: gen_rtx VPROTO((enum rtx_code code, enum machine_mode mode, ...)) 1.1 root 285: { 1.1.1.7 ! root 286: #ifndef __STDC__ 1.1 root 287: enum rtx_code code; 288: enum machine_mode mode; 1.1.1.7 ! root 289: #endif ! 290: va_list p; 1.1 root 291: register int i; /* Array indices... */ 292: register char *fmt; /* Current rtx's format... */ 293: register rtx rt_val; /* RTX to return to caller... */ 294: 1.1.1.7 ! root 295: VA_START (p, mode); ! 296: ! 297: #ifndef __STDC__ 1.1 root 298: code = va_arg (p, enum rtx_code); 299: mode = va_arg (p, enum machine_mode); 1.1.1.7 ! root 300: #endif 1.1 root 301: 302: if (code == CONST_INT) 303: { 1.1.1.4 root 304: HOST_WIDE_INT arg = va_arg (p, HOST_WIDE_INT); 1.1 root 305: 306: if (arg >= - MAX_SAVED_CONST_INT && arg <= MAX_SAVED_CONST_INT) 307: return const_int_rtx[arg + MAX_SAVED_CONST_INT]; 308: 309: if (const_true_rtx && arg == STORE_FLAG_VALUE) 310: return const_true_rtx; 311: 312: rt_val = rtx_alloc (code); 313: INTVAL (rt_val) = arg; 314: } 315: else if (code == REG) 316: { 317: int regno = va_arg (p, int); 318: 319: /* In case the MD file explicitly references the frame pointer, have 320: all such references point to the same frame pointer. This is used 321: during frame pointer elimination to distinguish the explicit 1.1.1.2 root 322: references to these registers from pseudos that happened to be 1.1 root 323: assigned to them. 324: 325: If we have eliminated the frame pointer or arg pointer, we will 326: be using it as a normal register, for example as a spill register. 327: In such cases, we might be accessing it in a mode that is not 1.1.1.4 root 328: Pmode and therefore cannot use the pre-allocated rtx. 1.1 root 329: 1.1.1.4 root 330: Also don't do this when we are making new REGs in reload, 331: since we don't want to get confused with the real pointers. */ 332: 333: if (frame_pointer_rtx && regno == FRAME_POINTER_REGNUM && mode == Pmode 334: && ! reload_in_progress) 1.1 root 335: return frame_pointer_rtx; 1.1.1.6 root 336: #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 337: if (hard_frame_pointer_rtx && regno == HARD_FRAME_POINTER_REGNUM 338: && mode == Pmode && ! reload_in_progress) 339: return hard_frame_pointer_rtx; 340: #endif 341: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 1.1.1.4 root 342: if (arg_pointer_rtx && regno == ARG_POINTER_REGNUM && mode == Pmode 343: && ! reload_in_progress) 1.1 root 344: return arg_pointer_rtx; 345: #endif 1.1.1.4 root 346: if (stack_pointer_rtx && regno == STACK_POINTER_REGNUM && mode == Pmode 347: && ! reload_in_progress) 1.1 root 348: return stack_pointer_rtx; 349: else 350: { 351: rt_val = rtx_alloc (code); 352: rt_val->mode = mode; 353: REGNO (rt_val) = regno; 354: return rt_val; 355: } 356: } 357: else 358: { 359: rt_val = rtx_alloc (code); /* Allocate the storage space. */ 360: rt_val->mode = mode; /* Store the machine mode... */ 361: 362: fmt = GET_RTX_FORMAT (code); /* Find the right format... */ 363: for (i = 0; i < GET_RTX_LENGTH (code); i++) 364: { 365: switch (*fmt++) 366: { 367: case '0': /* Unused field. */ 368: break; 369: 370: case 'i': /* An integer? */ 371: XINT (rt_val, i) = va_arg (p, int); 372: break; 373: 1.1.1.4 root 374: case 'w': /* A wide integer? */ 375: XWINT (rt_val, i) = va_arg (p, HOST_WIDE_INT); 376: break; 377: 1.1 root 378: case 's': /* A string? */ 379: XSTR (rt_val, i) = va_arg (p, char *); 380: break; 381: 382: case 'e': /* An expression? */ 383: case 'u': /* An insn? Same except when printing. */ 384: XEXP (rt_val, i) = va_arg (p, rtx); 385: break; 386: 387: case 'E': /* An RTX vector? */ 388: XVEC (rt_val, i) = va_arg (p, rtvec); 389: break; 390: 391: default: 1.1.1.5 root 392: abort (); 1.1 root 393: } 394: } 395: } 396: va_end (p); 397: return rt_val; /* Return the new RTX... */ 398: } 399: 400: /* gen_rtvec (n, [rt1, ..., rtn]) 401: ** 402: ** This routine creates an rtvec and stores within it the 403: ** pointers to rtx's which are its arguments. 404: */ 405: 406: /*VARARGS1*/ 407: rtvec 1.1.1.7 ! root 408: gen_rtvec VPROTO((int n, ...)) 1.1 root 409: { 1.1.1.7 ! root 410: #ifndef __STDC__ ! 411: int n; ! 412: #endif ! 413: int i; 1.1 root 414: va_list p; 415: rtx *vector; 416: 1.1.1.7 ! root 417: VA_START (p, n); ! 418: ! 419: #ifndef __STDC__ 1.1 root 420: n = va_arg (p, int); 1.1.1.7 ! root 421: #endif 1.1 root 422: 423: if (n == 0) 424: return NULL_RTVEC; /* Don't allocate an empty rtvec... */ 425: 426: vector = (rtx *) alloca (n * sizeof (rtx)); 1.1.1.7 ! root 427: 1.1 root 428: for (i = 0; i < n; i++) 429: vector[i] = va_arg (p, rtx); 430: va_end (p); 431: 432: return gen_rtvec_v (n, vector); 433: } 434: 435: rtvec 436: gen_rtvec_v (n, argp) 437: int n; 438: rtx *argp; 439: { 440: register int i; 441: register rtvec rt_val; 442: 443: if (n == 0) 444: return NULL_RTVEC; /* Don't allocate an empty rtvec... */ 445: 446: rt_val = rtvec_alloc (n); /* Allocate an rtvec... */ 447: 448: for (i = 0; i < n; i++) 449: rt_val->elem[i].rtx = *argp++; 450: 451: return rt_val; 452: } 453: 454: /* Generate a REG rtx for a new pseudo register of mode MODE. 455: This pseudo is assigned the next sequential register number. */ 456: 457: rtx 458: gen_reg_rtx (mode) 459: enum machine_mode mode; 460: { 461: register rtx val; 462: 463: /* Don't let anything called by or after reload create new registers 464: (actually, registers can't be created after flow, but this is a good 465: approximation). */ 466: 467: if (reload_in_progress || reload_completed) 468: abort (); 469: 1.1.1.6 root 470: if (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT 471: || GET_MODE_CLASS (mode) == MODE_COMPLEX_INT) 472: { 473: /* For complex modes, don't make a single pseudo. 474: Instead, make a CONCAT of two pseudos. 475: This allows noncontiguous allocation of the real and imaginary parts, 476: which makes much better code. Besides, allocating DCmode 477: pseudos overstrains reload on some machines like the 386. */ 478: rtx realpart, imagpart; 479: int size = GET_MODE_UNIT_SIZE (mode); 480: enum machine_mode partmode 481: = mode_for_size (size * BITS_PER_UNIT, 482: (GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT 483: ? MODE_FLOAT : MODE_INT), 484: 0); 485: 486: realpart = gen_reg_rtx (partmode); 487: imagpart = gen_reg_rtx (partmode); 488: return gen_rtx (CONCAT, mode, realpart, imagpart); 489: } 490: 1.1 root 491: /* Make sure regno_pointer_flag and regno_reg_rtx are large 492: enough to have an element for this pseudo reg number. */ 493: 494: if (reg_rtx_no == regno_pointer_flag_length) 495: { 496: rtx *new1; 497: char *new = 498: (char *) oballoc (regno_pointer_flag_length * 2); 499: bcopy (regno_pointer_flag, new, regno_pointer_flag_length); 1.1.1.7 ! root 500: bzero (&new[regno_pointer_flag_length], regno_pointer_flag_length); 1.1 root 501: regno_pointer_flag = new; 502: 503: new1 = (rtx *) oballoc (regno_pointer_flag_length * 2 * sizeof (rtx)); 1.1.1.7 ! root 504: bcopy ((char *) regno_reg_rtx, (char *) new1, ! 505: regno_pointer_flag_length * sizeof (rtx)); ! 506: bzero ((char *) &new1[regno_pointer_flag_length], ! 507: regno_pointer_flag_length * sizeof (rtx)); 1.1 root 508: regno_reg_rtx = new1; 509: 510: regno_pointer_flag_length *= 2; 511: } 512: 513: val = gen_rtx (REG, mode, reg_rtx_no); 514: regno_reg_rtx[reg_rtx_no++] = val; 515: return val; 516: } 517: 518: /* Identify REG as a probable pointer register. */ 519: 520: void 521: mark_reg_pointer (reg) 522: rtx reg; 523: { 524: REGNO_POINTER_FLAG (REGNO (reg)) = 1; 525: } 526: 527: /* Return 1 plus largest pseudo reg number used in the current function. */ 528: 529: int 530: max_reg_num () 531: { 532: return reg_rtx_no; 533: } 534: 535: /* Return 1 + the largest label number used so far in the current function. */ 536: 537: int 538: max_label_num () 539: { 540: if (last_label_num && label_num == base_label_num) 541: return last_label_num; 542: return label_num; 543: } 544: 545: /* Return first label number used in this function (if any were used). */ 546: 547: int 548: get_first_label_num () 549: { 550: return first_label_num; 551: } 552: 553: /* Return a value representing some low-order bits of X, where the number 554: of low-order bits is given by MODE. Note that no conversion is done 555: between floating-point and fixed-point values, rather, the bit 556: representation is returned. 557: 558: This function handles the cases in common between gen_lowpart, below, 559: and two variants in cse.c and combine.c. These are the cases that can 560: be safely handled at all points in the compilation. 561: 562: If this is not a case we can handle, return 0. */ 563: 564: rtx 565: gen_lowpart_common (mode, x) 566: enum machine_mode mode; 567: register rtx x; 568: { 569: int word = 0; 570: 571: if (GET_MODE (x) == mode) 572: return x; 573: 574: /* MODE must occupy no more words than the mode of X. */ 575: if (GET_MODE (x) != VOIDmode 576: && ((GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD 577: > ((GET_MODE_SIZE (GET_MODE (x)) + (UNITS_PER_WORD - 1)) 578: / UNITS_PER_WORD))) 579: return 0; 580: 581: if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) 582: word = ((GET_MODE_SIZE (GET_MODE (x)) 583: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) 584: / UNITS_PER_WORD); 585: 586: if ((GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) 1.1.1.4 root 587: && (GET_MODE_CLASS (mode) == MODE_INT 588: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT)) 1.1 root 589: { 590: /* If we are getting the low-order part of something that has been 591: sign- or zero-extended, we can either just use the object being 592: extended or make a narrower extension. If we want an even smaller 593: piece than the size of the object being extended, call ourselves 594: recursively. 595: 596: This case is used mostly by combine and cse. */ 597: 598: if (GET_MODE (XEXP (x, 0)) == mode) 599: return XEXP (x, 0); 600: else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (XEXP (x, 0)))) 601: return gen_lowpart_common (mode, XEXP (x, 0)); 602: else if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (x))) 603: return gen_rtx (GET_CODE (x), mode, XEXP (x, 0)); 604: } 605: else if (GET_CODE (x) == SUBREG 606: && (GET_MODE_SIZE (mode) <= UNITS_PER_WORD 607: || GET_MODE_SIZE (mode) == GET_MODE_UNIT_SIZE (GET_MODE (x)))) 608: return (GET_MODE (SUBREG_REG (x)) == mode && SUBREG_WORD (x) == 0 609: ? SUBREG_REG (x) 610: : gen_rtx (SUBREG, mode, SUBREG_REG (x), SUBREG_WORD (x))); 611: else if (GET_CODE (x) == REG) 612: { 613: /* If the register is not valid for MODE, return 0. If we don't 1.1.1.6 root 614: do this, there is no way to fix up the resulting REG later. 615: But we do do this if the current REG is not valid for its 616: mode. This latter is a kludge, but is required due to the 617: way that parameters are passed on some machines, most 618: notably Sparc. */ 1.1 root 619: if (REGNO (x) < FIRST_PSEUDO_REGISTER 1.1.1.6 root 620: && ! HARD_REGNO_MODE_OK (REGNO (x) + word, mode) 621: && HARD_REGNO_MODE_OK (REGNO (x), GET_MODE (x))) 1.1 root 622: return 0; 623: else if (REGNO (x) < FIRST_PSEUDO_REGISTER 624: /* integrate.c can't handle parts of a return value register. */ 625: && (! REG_FUNCTION_VALUE_P (x) 1.1.1.4 root 626: || ! rtx_equal_function_value_matters) 627: /* We want to keep the stack, frame, and arg pointers 628: special. */ 1.1.1.7 ! root 629: && x != frame_pointer_rtx 1.1.1.4 root 630: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 1.1.1.7 ! root 631: && x != arg_pointer_rtx 1.1.1.4 root 632: #endif 1.1.1.7 ! root 633: && x != stack_pointer_rtx) 1.1 root 634: return gen_rtx (REG, mode, REGNO (x) + word); 635: else 636: return gen_rtx (SUBREG, mode, x, word); 637: } 638: /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits 639: from the low-order part of the constant. */ 1.1.1.4 root 640: else if ((GET_MODE_CLASS (mode) == MODE_INT 641: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) 642: && GET_MODE (x) == VOIDmode 1.1 root 643: && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE)) 1.1.1.3 root 644: { 645: /* If MODE is twice the host word size, X is already the desired 646: representation. Otherwise, if MODE is wider than a word, we can't 647: do this. If MODE is exactly a word, return just one CONST_INT. 648: If MODE is smaller than a word, clear the bits that don't belong 649: in our mode, unless they and our sign bit are all one. So we get 650: either a reasonable negative value or a reasonable unsigned value 651: for this mode. */ 652: 1.1.1.7 ! root 653: if (GET_MODE_BITSIZE (mode) >= 2 * HOST_BITS_PER_WIDE_INT) 1.1.1.3 root 654: return x; 1.1.1.4 root 655: else if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT) 1.1.1.3 root 656: return 0; 1.1.1.4 root 657: else if (GET_MODE_BITSIZE (mode) == HOST_BITS_PER_WIDE_INT) 1.1.1.3 root 658: return (GET_CODE (x) == CONST_INT ? x 1.1.1.4 root 659: : GEN_INT (CONST_DOUBLE_LOW (x))); 1.1.1.3 root 660: else 661: { 662: /* MODE must be narrower than HOST_BITS_PER_INT. */ 663: int width = GET_MODE_BITSIZE (mode); 1.1.1.4 root 664: HOST_WIDE_INT val = (GET_CODE (x) == CONST_INT ? INTVAL (x) 665: : CONST_DOUBLE_LOW (x)); 1.1.1.3 root 666: 1.1.1.4 root 667: if (((val & ((HOST_WIDE_INT) (-1) << (width - 1))) 668: != ((HOST_WIDE_INT) (-1) << (width - 1)))) 669: val &= ((HOST_WIDE_INT) 1 << width) - 1; 1.1.1.3 root 670: 671: return (GET_CODE (x) == CONST_INT && INTVAL (x) == val ? x 1.1.1.4 root 672: : GEN_INT (val)); 1.1.1.3 root 673: } 674: } 675: 676: /* If X is an integral constant but we want it in floating-point, it 677: must be the case that we have a union of an integer and a floating-point 678: value. If the machine-parameters allow it, simulate that union here 679: and return the result. The two-word and single-word cases are 680: different. */ 681: 682: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 683: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 684: || flag_pretend_float) 685: && GET_MODE_CLASS (mode) == MODE_FLOAT 686: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 687: && GET_CODE (x) == CONST_INT 1.1.1.4 root 688: && sizeof (float) * HOST_BITS_PER_CHAR == HOST_BITS_PER_WIDE_INT) 1.1.1.5 root 689: #ifdef REAL_ARITHMETIC 690: { 691: REAL_VALUE_TYPE r; 692: HOST_WIDE_INT i; 693: 694: i = INTVAL (x); 695: r = REAL_VALUE_FROM_TARGET_SINGLE (i); 1.1.1.7 ! root 696: return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); 1.1.1.5 root 697: } 698: #else 1.1.1.3 root 699: { 1.1.1.4 root 700: union {HOST_WIDE_INT i; float d; } u; 1.1.1.3 root 701: 702: u.i = INTVAL (x); 1.1.1.7 ! root 703: return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); 1.1.1.3 root 704: } 1.1.1.5 root 705: #endif 1.1.1.3 root 706: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 707: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 708: || flag_pretend_float) 709: && GET_MODE_CLASS (mode) == MODE_FLOAT 710: && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD 711: && (GET_CODE (x) == CONST_INT || GET_CODE (x) == CONST_DOUBLE) 712: && GET_MODE (x) == VOIDmode 1.1.1.4 root 713: && (sizeof (double) * HOST_BITS_PER_CHAR 714: == 2 * HOST_BITS_PER_WIDE_INT)) 1.1.1.5 root 715: #ifdef REAL_ARITHMETIC 716: { 717: REAL_VALUE_TYPE r; 718: HOST_WIDE_INT i[2]; 719: HOST_WIDE_INT low, high; 720: 721: if (GET_CODE (x) == CONST_INT) 722: low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); 723: else 724: low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); 725: 1.1.1.7 ! root 726: /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the ! 727: target machine. */ ! 728: if (WORDS_BIG_ENDIAN) ! 729: i[0] = high, i[1] = low; ! 730: else ! 731: i[0] = low, i[1] = high; 1.1.1.5 root 732: 733: r = REAL_VALUE_FROM_TARGET_DOUBLE (i); 1.1.1.7 ! root 734: return CONST_DOUBLE_FROM_REAL_VALUE (r, mode); 1.1.1.5 root 735: } 736: #else 1.1.1.3 root 737: { 1.1.1.4 root 738: union {HOST_WIDE_INT i[2]; double d; } u; 739: HOST_WIDE_INT low, high; 1.1.1.3 root 740: 741: if (GET_CODE (x) == CONST_INT) 1.1.1.4 root 742: low = INTVAL (x), high = low >> (HOST_BITS_PER_WIDE_INT -1); 1.1.1.3 root 743: else 744: low = CONST_DOUBLE_LOW (x), high = CONST_DOUBLE_HIGH (x); 745: 746: #ifdef HOST_WORDS_BIG_ENDIAN 747: u.i[0] = high, u.i[1] = low; 748: #else 749: u.i[0] = low, u.i[1] = high; 750: #endif 751: 1.1.1.7 ! root 752: return CONST_DOUBLE_FROM_REAL_VALUE (u.d, mode); 1.1.1.3 root 753: } 1.1.1.5 root 754: #endif 1.1.1.3 root 755: /* Similarly, if this is converting a floating-point value into a 756: single-word integer. Only do this is the host and target parameters are 757: compatible. */ 758: 759: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 760: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 761: || flag_pretend_float) 1.1.1.4 root 762: && (GET_MODE_CLASS (mode) == MODE_INT 763: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) 1.1.1.3 root 764: && GET_CODE (x) == CONST_DOUBLE 765: && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT 766: && GET_MODE_BITSIZE (mode) == BITS_PER_WORD) 767: return operand_subword (x, 0, 0, GET_MODE (x)); 768: 769: /* Similarly, if this is converting a floating-point value into a 770: two-word integer, we can do this one word at a time and make an 771: integer. Only do this is the host and target parameters are 772: compatible. */ 773: 774: else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 775: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1.1.3 root 776: || flag_pretend_float) 1.1.1.4 root 777: && (GET_MODE_CLASS (mode) == MODE_INT 778: || GET_MODE_CLASS (mode) == MODE_PARTIAL_INT) 1.1.1.3 root 779: && GET_CODE (x) == CONST_DOUBLE 780: && GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT 781: && GET_MODE_BITSIZE (mode) == 2 * BITS_PER_WORD) 782: { 783: rtx lowpart = operand_subword (x, WORDS_BIG_ENDIAN, 0, GET_MODE (x)); 784: rtx highpart = operand_subword (x, ! WORDS_BIG_ENDIAN, 0, GET_MODE (x)); 785: 786: if (lowpart && GET_CODE (lowpart) == CONST_INT 787: && highpart && GET_CODE (highpart) == CONST_INT) 788: return immed_double_const (INTVAL (lowpart), INTVAL (highpart), mode); 789: } 1.1 root 790: 791: /* Otherwise, we can't do this. */ 792: return 0; 793: } 794: 1.1.1.4 root 795: /* Return the real part (which has mode MODE) of a complex value X. 796: This always comes at the low address in memory. */ 797: 798: rtx 799: gen_realpart (mode, x) 800: enum machine_mode mode; 801: register rtx x; 802: { 1.1.1.7 ! root 803: if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) ! 804: return XEXP (x, 0); ! 805: else if (WORDS_BIG_ENDIAN) 1.1.1.4 root 806: return gen_highpart (mode, x); 807: else 808: return gen_lowpart (mode, x); 809: } 810: 811: /* Return the imaginary part (which has mode MODE) of a complex value X. 812: This always comes at the high address in memory. */ 813: 814: rtx 815: gen_imagpart (mode, x) 816: enum machine_mode mode; 817: register rtx x; 818: { 1.1.1.7 ! root 819: if (GET_CODE (x) == CONCAT && GET_MODE (XEXP (x, 0)) == mode) ! 820: return XEXP (x, 1); ! 821: else if (WORDS_BIG_ENDIAN) 1.1.1.4 root 822: return gen_lowpart (mode, x); 823: else 824: return gen_highpart (mode, x); 825: } 1.1.1.7 ! root 826: ! 827: /* Return 1 iff X, assumed to be a SUBREG, ! 828: refers to the real part of the complex value in its containing reg. ! 829: Complex values are always stored with the real part in the first word, ! 830: regardless of WORDS_BIG_ENDIAN. */ ! 831: ! 832: int ! 833: subreg_realpart_p (x) ! 834: rtx x; ! 835: { ! 836: if (GET_CODE (x) != SUBREG) ! 837: abort (); ! 838: ! 839: return SUBREG_WORD (x) == 0; ! 840: } 1.1.1.4 root 841: 1.1 root 842: /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value, 843: return an rtx (MEM, SUBREG, or CONST_INT) that refers to the 844: least-significant part of X. 845: MODE specifies how big a part of X to return; 846: it usually should not be larger than a word. 847: If X is a MEM whose address is a QUEUED, the value may be so also. */ 848: 849: rtx 850: gen_lowpart (mode, x) 851: enum machine_mode mode; 852: register rtx x; 853: { 854: rtx result = gen_lowpart_common (mode, x); 855: 856: if (result) 857: return result; 858: else if (GET_CODE (x) == MEM) 859: { 860: /* The only additional case we can do is MEM. */ 861: register int offset = 0; 862: if (WORDS_BIG_ENDIAN) 863: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) 864: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); 865: 866: if (BYTES_BIG_ENDIAN) 867: /* Adjust the address so that the address-after-the-data 868: is unchanged. */ 869: offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) 870: - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x)))); 871: 872: return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); 873: } 874: else 875: abort (); 876: } 877: 1.1.1.4 root 878: /* Like `gen_lowpart', but refer to the most significant part. 879: This is used to access the imaginary part of a complex number. */ 880: 881: rtx 882: gen_highpart (mode, x) 883: enum machine_mode mode; 884: register rtx x; 885: { 886: /* This case loses if X is a subreg. To catch bugs early, 887: complain if an invalid MODE is used even in other cases. */ 888: if (GET_MODE_SIZE (mode) > UNITS_PER_WORD 889: && GET_MODE_SIZE (mode) != GET_MODE_UNIT_SIZE (GET_MODE (x))) 890: abort (); 891: if (GET_CODE (x) == CONST_DOUBLE 1.1.1.5 root 892: #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE)) 1.1.1.4 root 893: && GET_MODE_CLASS (GET_MODE (x)) != MODE_FLOAT 894: #endif 895: ) 896: return gen_rtx (CONST_INT, VOIDmode, 897: CONST_DOUBLE_HIGH (x) & GET_MODE_MASK (mode)); 898: else if (GET_CODE (x) == CONST_INT) 899: return const0_rtx; 900: else if (GET_CODE (x) == MEM) 901: { 902: register int offset = 0; 1.1.1.7 ! root 903: if (! WORDS_BIG_ENDIAN) ! 904: offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD) ! 905: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); ! 906: ! 907: if (! BYTES_BIG_ENDIAN ! 908: && GET_MODE_SIZE (mode) < UNITS_PER_WORD) 1.1.1.4 root 909: offset -= (GET_MODE_SIZE (mode) 910: - MIN (UNITS_PER_WORD, 911: GET_MODE_SIZE (GET_MODE (x)))); 1.1.1.7 ! root 912: 1.1.1.4 root 913: return change_address (x, mode, plus_constant (XEXP (x, 0), offset)); 914: } 915: else if (GET_CODE (x) == SUBREG) 916: { 917: /* The only time this should occur is when we are looking at a 918: multi-word item with a SUBREG whose mode is the same as that of the 919: item. It isn't clear what we would do if it wasn't. */ 920: if (SUBREG_WORD (x) != 0) 921: abort (); 922: return gen_highpart (mode, SUBREG_REG (x)); 923: } 924: else if (GET_CODE (x) == REG) 925: { 926: int word = 0; 927: 1.1.1.7 ! root 928: if (! WORDS_BIG_ENDIAN ! 929: && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD) 1.1.1.4 root 930: word = ((GET_MODE_SIZE (GET_MODE (x)) 931: - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)) 932: / UNITS_PER_WORD); 1.1.1.7 ! root 933: 1.1.1.4 root 934: if (REGNO (x) < FIRST_PSEUDO_REGISTER 1.1.1.6 root 935: /* integrate.c can't handle parts of a return value register. */ 936: && (! REG_FUNCTION_VALUE_P (x) 937: || ! rtx_equal_function_value_matters) 1.1.1.4 root 938: /* We want to keep the stack, frame, and arg pointers special. */ 1.1.1.7 ! root 939: && x != frame_pointer_rtx 1.1.1.4 root 940: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 1.1.1.7 ! root 941: && x != arg_pointer_rtx 1.1.1.4 root 942: #endif 1.1.1.7 ! root 943: && x != stack_pointer_rtx) 1.1.1.4 root 944: return gen_rtx (REG, mode, REGNO (x) + word); 945: else 946: return gen_rtx (SUBREG, mode, x, word); 947: } 948: else 949: abort (); 950: } 951: 1.1 root 952: /* Return 1 iff X, assumed to be a SUBREG, 953: refers to the least significant part of its containing reg. 954: If X is not a SUBREG, always return 1 (it is its own low part!). */ 955: 956: int 957: subreg_lowpart_p (x) 958: rtx x; 959: { 960: if (GET_CODE (x) != SUBREG) 961: return 1; 962: 963: if (WORDS_BIG_ENDIAN 964: && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) > UNITS_PER_WORD) 965: return (SUBREG_WORD (x) 966: == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))) 967: - MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)) 968: / UNITS_PER_WORD)); 969: 970: return SUBREG_WORD (x) == 0; 971: } 972: 973: /* Return subword I of operand OP. 974: The word number, I, is interpreted as the word number starting at the 975: low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN, 976: otherwise it is the high-order word. 977: 978: If we cannot extract the required word, we return zero. Otherwise, an 979: rtx corresponding to the requested word will be returned. 980: 981: VALIDATE_ADDRESS is nonzero if the address should be validated. Before 982: reload has completed, a valid address will always be returned. After 983: reload, if a valid address cannot be returned, we return zero. 984: 985: If VALIDATE_ADDRESS is zero, we simply form the required address; validating 986: it is the responsibility of the caller. 987: 988: MODE is the mode of OP in case it is a CONST_INT. */ 989: 990: rtx 991: operand_subword (op, i, validate_address, mode) 992: rtx op; 993: int i; 994: int validate_address; 995: enum machine_mode mode; 996: { 1.1.1.4 root 997: HOST_WIDE_INT val; 998: int size_ratio = HOST_BITS_PER_WIDE_INT / BITS_PER_WORD; 1.1 root 999: 1000: if (mode == VOIDmode) 1001: mode = GET_MODE (op); 1002: 1003: if (mode == VOIDmode) 1004: abort (); 1005: 1006: /* If OP is narrower than a word or if we want a word outside OP, fail. */ 1007: if (mode != BLKmode 1008: && (GET_MODE_SIZE (mode) < UNITS_PER_WORD 1009: || (i + 1) * UNITS_PER_WORD > GET_MODE_SIZE (mode))) 1010: return 0; 1011: 1012: /* If OP is already an integer word, return it. */ 1013: if (GET_MODE_CLASS (mode) == MODE_INT 1014: && GET_MODE_SIZE (mode) == UNITS_PER_WORD) 1015: return op; 1016: 1017: /* If OP is a REG or SUBREG, we can handle it very simply. */ 1018: if (GET_CODE (op) == REG) 1019: { 1020: /* If the register is not valid for MODE, return 0. If we don't 1021: do this, there is no way to fix up the resulting REG later. */ 1022: if (REGNO (op) < FIRST_PSEUDO_REGISTER 1023: && ! HARD_REGNO_MODE_OK (REGNO (op) + i, word_mode)) 1024: return 0; 1025: else if (REGNO (op) >= FIRST_PSEUDO_REGISTER 1026: || (REG_FUNCTION_VALUE_P (op) 1.1.1.4 root 1027: && rtx_equal_function_value_matters) 1028: /* We want to keep the stack, frame, and arg pointers 1029: special. */ 1.1.1.7 ! root 1030: || op == frame_pointer_rtx 1.1.1.4 root 1031: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 1.1.1.7 ! root 1032: || op == arg_pointer_rtx 1.1.1.4 root 1033: #endif 1.1.1.7 ! root 1034: || op == stack_pointer_rtx) 1.1 root 1035: return gen_rtx (SUBREG, word_mode, op, i); 1036: else 1037: return gen_rtx (REG, word_mode, REGNO (op) + i); 1038: } 1039: else if (GET_CODE (op) == SUBREG) 1040: return gen_rtx (SUBREG, word_mode, SUBREG_REG (op), i + SUBREG_WORD (op)); 1.1.1.6 root 1041: else if (GET_CODE (op) == CONCAT) 1042: { 1043: int partwords = GET_MODE_UNIT_SIZE (GET_MODE (op)) / UNITS_PER_WORD; 1044: if (i < partwords) 1045: return operand_subword (XEXP (op, 0), i, validate_address, mode); 1046: return operand_subword (XEXP (op, 1), i - partwords, 1047: validate_address, mode); 1048: } 1.1 root 1049: 1050: /* Form a new MEM at the requested address. */ 1051: if (GET_CODE (op) == MEM) 1052: { 1053: rtx addr = plus_constant (XEXP (op, 0), i * UNITS_PER_WORD); 1054: rtx new; 1055: 1056: if (validate_address) 1057: { 1058: if (reload_completed) 1059: { 1060: if (! strict_memory_address_p (word_mode, addr)) 1061: return 0; 1062: } 1063: else 1064: addr = memory_address (word_mode, addr); 1065: } 1066: 1067: new = gen_rtx (MEM, word_mode, addr); 1068: 1069: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (op); 1070: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (op); 1071: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (op); 1072: 1073: return new; 1074: } 1075: 1076: /* The only remaining cases are when OP is a constant. If the host and 1077: target floating formats are the same, handling two-word floating 1.1.1.5 root 1078: constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE} 1.1.1.7 ! root 1079: are defined as returning one or two 32 bit values, respectively, ! 1080: and not values of BITS_PER_WORD bits. */ 1.1.1.5 root 1081: #ifdef REAL_ARITHMETIC 1.1.1.7 ! root 1082: /* The output is some bits, the width of the target machine's word. ! 1083: A wider-word host can surely hold them in a CONST_INT. A narrower-word ! 1084: host can't. */ ! 1085: if (HOST_BITS_PER_WIDE_INT >= BITS_PER_WORD 1.1.1.5 root 1086: && GET_MODE_CLASS (mode) == MODE_FLOAT 1087: && GET_MODE_BITSIZE (mode) == 64 1088: && GET_CODE (op) == CONST_DOUBLE) 1089: { 1.1.1.7 ! root 1090: long k[2]; 1.1.1.5 root 1091: REAL_VALUE_TYPE rv; 1092: 1093: REAL_VALUE_FROM_CONST_DOUBLE (rv, op); 1094: REAL_VALUE_TO_TARGET_DOUBLE (rv, k); 1095: 1.1.1.7 ! root 1096: /* We handle 32-bit and >= 64-bit words here. Note that the order in 1.1.1.5 root 1097: which the words are written depends on the word endianness. 1098: 1099: ??? This is a potential portability problem and should 1100: be fixed at some point. */ 1.1.1.7 ! root 1101: if (BITS_PER_WORD == 32) ! 1102: return GEN_INT ((HOST_WIDE_INT) k[i]); ! 1103: #if HOST_BITS_PER_WIDE_INT > 32 ! 1104: else if (BITS_PER_WORD >= 64 && i == 0) ! 1105: return GEN_INT ((((HOST_WIDE_INT) k[! WORDS_BIG_ENDIAN]) << 32) ! 1106: | (HOST_WIDE_INT) k[WORDS_BIG_ENDIAN]); ! 1107: #endif 1.1.1.5 root 1108: else 1109: abort (); 1110: } 1111: #else /* no REAL_ARITHMETIC */ 1.1 root 1112: if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 1113: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1 root 1114: || flag_pretend_float) 1115: && GET_MODE_CLASS (mode) == MODE_FLOAT 1116: && GET_MODE_SIZE (mode) == 2 * UNITS_PER_WORD 1117: && GET_CODE (op) == CONST_DOUBLE) 1.1.1.4 root 1118: { 1119: /* The constant is stored in the host's word-ordering, 1120: but we want to access it in the target's word-ordering. Some 1121: compilers don't like a conditional inside macro args, so we have two 1122: copies of the return. */ 1.1.1.3 root 1123: #ifdef HOST_WORDS_BIG_ENDIAN 1.1.1.4 root 1124: return GEN_INT (i == WORDS_BIG_ENDIAN 1125: ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); 1.1.1.3 root 1126: #else 1.1.1.4 root 1127: return GEN_INT (i != WORDS_BIG_ENDIAN 1128: ? CONST_DOUBLE_HIGH (op) : CONST_DOUBLE_LOW (op)); 1.1.1.3 root 1129: #endif 1.1.1.4 root 1130: } 1.1.1.5 root 1131: #endif /* no REAL_ARITHMETIC */ 1.1 root 1132: 1133: /* Single word float is a little harder, since single- and double-word 1134: values often do not have the same high-order bits. We have already 1135: verified that we want the only defined word of the single-word value. */ 1.1.1.5 root 1136: #ifdef REAL_ARITHMETIC 1.1.1.7 ! root 1137: if (GET_MODE_CLASS (mode) == MODE_FLOAT 1.1.1.5 root 1138: && GET_MODE_BITSIZE (mode) == 32 1139: && GET_CODE (op) == CONST_DOUBLE) 1140: { 1.1.1.7 ! root 1141: long l; 1.1.1.5 root 1142: REAL_VALUE_TYPE rv; 1143: 1144: REAL_VALUE_FROM_CONST_DOUBLE (rv, op); 1145: REAL_VALUE_TO_TARGET_SINGLE (rv, l); 1.1.1.7 ! root 1146: return GEN_INT ((HOST_WIDE_INT) l); 1.1.1.5 root 1147: } 1148: #else 1.1 root 1149: if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT 1.1.1.4 root 1150: && HOST_BITS_PER_WIDE_INT == BITS_PER_WORD) 1.1 root 1151: || flag_pretend_float) 1152: && GET_MODE_CLASS (mode) == MODE_FLOAT 1153: && GET_MODE_SIZE (mode) == UNITS_PER_WORD 1154: && GET_CODE (op) == CONST_DOUBLE) 1155: { 1156: double d; 1.1.1.4 root 1157: union {float f; HOST_WIDE_INT i; } u; 1.1 root 1158: 1159: REAL_VALUE_FROM_CONST_DOUBLE (d, op); 1160: 1161: u.f = d; 1.1.1.4 root 1162: return GEN_INT (u.i); 1.1 root 1163: } 1.1.1.5 root 1164: #endif /* no REAL_ARITHMETIC */ 1.1 root 1165: 1166: /* The only remaining cases that we can handle are integers. 1167: Convert to proper endianness now since these cases need it. 1168: At this point, i == 0 means the low-order word. 1169: 1.1.1.5 root 1170: We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT 1171: in general. However, if OP is (const_int 0), we can just return 1172: it for any word. */ 1173: 1174: if (op == const0_rtx) 1175: return op; 1.1 root 1176: 1177: if (GET_MODE_CLASS (mode) != MODE_INT 1.1.1.5 root 1178: || (GET_CODE (op) != CONST_INT && GET_CODE (op) != CONST_DOUBLE) 1.1.1.7 ! root 1179: || BITS_PER_WORD > HOST_BITS_PER_WIDE_INT) 1.1 root 1180: return 0; 1181: 1182: if (WORDS_BIG_ENDIAN) 1183: i = GET_MODE_SIZE (mode) / UNITS_PER_WORD - 1 - i; 1184: 1185: /* Find out which word on the host machine this value is in and get 1186: it from the constant. */ 1187: val = (i / size_ratio == 0 1188: ? (GET_CODE (op) == CONST_INT ? INTVAL (op) : CONST_DOUBLE_LOW (op)) 1189: : (GET_CODE (op) == CONST_INT 1190: ? (INTVAL (op) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op))); 1191: 1192: /* If BITS_PER_WORD is smaller than an int, get the appropriate bits. */ 1.1.1.4 root 1193: if (BITS_PER_WORD < HOST_BITS_PER_WIDE_INT) 1.1 root 1194: val = ((val >> ((i % size_ratio) * BITS_PER_WORD)) 1.1.1.4 root 1195: & (((HOST_WIDE_INT) 1 1196: << (BITS_PER_WORD % HOST_BITS_PER_WIDE_INT)) - 1)); 1.1 root 1197: 1.1.1.4 root 1198: return GEN_INT (val); 1.1 root 1199: } 1200: 1201: /* Similar to `operand_subword', but never return 0. If we can't extract 1202: the required subword, put OP into a register and try again. If that fails, 1203: abort. We always validate the address in this case. It is not valid 1204: to call this function after reload; it is mostly meant for RTL 1205: generation. 1206: 1207: MODE is the mode of OP, in case it is CONST_INT. */ 1208: 1209: rtx 1210: operand_subword_force (op, i, mode) 1211: rtx op; 1212: int i; 1213: enum machine_mode mode; 1214: { 1215: rtx result = operand_subword (op, i, 1, mode); 1216: 1217: if (result) 1218: return result; 1219: 1220: if (mode != BLKmode && mode != VOIDmode) 1221: op = force_reg (mode, op); 1222: 1223: result = operand_subword (op, i, 1, mode); 1224: if (result == 0) 1225: abort (); 1226: 1227: return result; 1228: } 1229: 1230: /* Given a compare instruction, swap the operands. 1231: A test instruction is changed into a compare of 0 against the operand. */ 1232: 1233: void 1234: reverse_comparison (insn) 1235: rtx insn; 1236: { 1237: rtx body = PATTERN (insn); 1238: rtx comp; 1239: 1240: if (GET_CODE (body) == SET) 1241: comp = SET_SRC (body); 1242: else 1243: comp = SET_SRC (XVECEXP (body, 0, 0)); 1244: 1245: if (GET_CODE (comp) == COMPARE) 1246: { 1247: rtx op0 = XEXP (comp, 0); 1248: rtx op1 = XEXP (comp, 1); 1249: XEXP (comp, 0) = op1; 1250: XEXP (comp, 1) = op0; 1251: } 1252: else 1253: { 1254: rtx new = gen_rtx (COMPARE, VOIDmode, 1255: CONST0_RTX (GET_MODE (comp)), comp); 1256: if (GET_CODE (body) == SET) 1257: SET_SRC (body) = new; 1258: else 1259: SET_SRC (XVECEXP (body, 0, 0)) = new; 1260: } 1261: } 1262: 1263: /* Return a memory reference like MEMREF, but with its mode changed 1264: to MODE and its address changed to ADDR. 1265: (VOIDmode means don't change the mode. 1266: NULL for ADDR means don't change the address.) */ 1267: 1268: rtx 1269: change_address (memref, mode, addr) 1270: rtx memref; 1271: enum machine_mode mode; 1272: rtx addr; 1273: { 1274: rtx new; 1275: 1276: if (GET_CODE (memref) != MEM) 1277: abort (); 1278: if (mode == VOIDmode) 1279: mode = GET_MODE (memref); 1280: if (addr == 0) 1281: addr = XEXP (memref, 0); 1282: 1283: /* If reload is in progress or has completed, ADDR must be valid. 1284: Otherwise, we can call memory_address to make it valid. */ 1285: if (reload_completed || reload_in_progress) 1286: { 1287: if (! memory_address_p (mode, addr)) 1288: abort (); 1289: } 1290: else 1291: addr = memory_address (mode, addr); 1292: 1293: new = gen_rtx (MEM, mode, addr); 1294: MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); 1295: RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); 1296: MEM_IN_STRUCT_P (new) = MEM_IN_STRUCT_P (memref); 1297: return new; 1298: } 1299: 1300: /* Return a newly created CODE_LABEL rtx with a unique label number. */ 1301: 1302: rtx 1303: gen_label_rtx () 1304: { 1.1.1.6 root 1305: register rtx label; 1306: 1307: label = (output_bytecode 1308: ? gen_rtx (CODE_LABEL, VOIDmode, NULL, bc_get_bytecode_label ()) 1309: : gen_rtx (CODE_LABEL, VOIDmode, 0, 0, 0, label_num++, NULL_PTR)); 1310: 1.1 root 1311: LABEL_NUSES (label) = 0; 1312: return label; 1313: } 1314: 1315: /* For procedure integration. */ 1316: 1317: /* Return a newly created INLINE_HEADER rtx. Should allocate this 1318: from a permanent obstack when the opportunity arises. */ 1319: 1320: rtx 1321: gen_inline_header_rtx (first_insn, first_parm_insn, first_labelno, 1322: last_labelno, max_parm_regnum, max_regnum, args_size, 1323: pops_args, stack_slots, function_flags, 1324: outgoing_args_size, original_arg_vector, 1325: original_decl_initial) 1326: rtx first_insn, first_parm_insn; 1327: int first_labelno, last_labelno, max_parm_regnum, max_regnum, args_size; 1328: int pops_args; 1329: rtx stack_slots; 1330: int function_flags; 1331: int outgoing_args_size; 1332: rtvec original_arg_vector; 1333: rtx original_decl_initial; 1334: { 1335: rtx header = gen_rtx (INLINE_HEADER, VOIDmode, 1.1.1.4 root 1336: cur_insn_uid++, NULL_RTX, 1.1 root 1337: first_insn, first_parm_insn, 1338: first_labelno, last_labelno, 1339: max_parm_regnum, max_regnum, args_size, pops_args, 1340: stack_slots, function_flags, outgoing_args_size, 1341: original_arg_vector, original_decl_initial); 1342: return header; 1343: } 1344: 1345: /* Install new pointers to the first and last insns in the chain. 1346: Used for an inline-procedure after copying the insn chain. */ 1347: 1348: void 1349: set_new_first_and_last_insn (first, last) 1350: rtx first, last; 1351: { 1352: first_insn = first; 1353: last_insn = last; 1354: } 1355: 1356: /* Set the range of label numbers found in the current function. 1357: This is used when belatedly compiling an inline function. */ 1358: 1359: void 1360: set_new_first_and_last_label_num (first, last) 1361: int first, last; 1362: { 1363: base_label_num = label_num; 1364: first_label_num = first; 1365: last_label_num = last; 1366: } 1367: 1368: /* Save all variables describing the current status into the structure *P. 1369: This is used before starting a nested function. */ 1370: 1371: void 1372: save_emit_status (p) 1373: struct function *p; 1374: { 1375: p->reg_rtx_no = reg_rtx_no; 1376: p->first_label_num = first_label_num; 1377: p->first_insn = first_insn; 1378: p->last_insn = last_insn; 1.1.1.6 root 1379: p->sequence_rtl_expr = sequence_rtl_expr; 1.1 root 1380: p->sequence_stack = sequence_stack; 1381: p->cur_insn_uid = cur_insn_uid; 1382: p->last_linenum = last_linenum; 1383: p->last_filename = last_filename; 1384: p->regno_pointer_flag = regno_pointer_flag; 1385: p->regno_pointer_flag_length = regno_pointer_flag_length; 1386: p->regno_reg_rtx = regno_reg_rtx; 1387: } 1388: 1389: /* Restore all variables describing the current status from the structure *P. 1390: This is used after a nested function. */ 1391: 1392: void 1393: restore_emit_status (p) 1394: struct function *p; 1395: { 1396: int i; 1397: 1398: reg_rtx_no = p->reg_rtx_no; 1399: first_label_num = p->first_label_num; 1.1.1.6 root 1400: last_label_num = 0; 1.1 root 1401: first_insn = p->first_insn; 1402: last_insn = p->last_insn; 1.1.1.6 root 1403: sequence_rtl_expr = p->sequence_rtl_expr; 1.1 root 1404: sequence_stack = p->sequence_stack; 1405: cur_insn_uid = p->cur_insn_uid; 1406: last_linenum = p->last_linenum; 1407: last_filename = p->last_filename; 1408: regno_pointer_flag = p->regno_pointer_flag; 1409: regno_pointer_flag_length = p->regno_pointer_flag_length; 1410: regno_reg_rtx = p->regno_reg_rtx; 1411: 1412: /* Clear our cache of rtx expressions for start_sequence and gen_sequence. */ 1413: sequence_element_free_list = 0; 1414: for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) 1415: sequence_result[i] = 0; 1416: } 1417: 1418: /* Go through all the RTL insn bodies and copy any invalid shared structure. 1419: It does not work to do this twice, because the mark bits set here 1420: are not cleared afterwards. */ 1421: 1422: void 1423: unshare_all_rtl (insn) 1424: register rtx insn; 1425: { 1426: for (; insn; insn = NEXT_INSN (insn)) 1427: if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN 1428: || GET_CODE (insn) == CALL_INSN) 1429: { 1430: PATTERN (insn) = copy_rtx_if_shared (PATTERN (insn)); 1431: REG_NOTES (insn) = copy_rtx_if_shared (REG_NOTES (insn)); 1432: LOG_LINKS (insn) = copy_rtx_if_shared (LOG_LINKS (insn)); 1433: } 1434: 1435: /* Make sure the addresses of stack slots found outside the insn chain 1436: (such as, in DECL_RTL of a variable) are not shared 1437: with the insn chain. 1438: 1439: This special care is necessary when the stack slot MEM does not 1440: actually appear in the insn chain. If it does appear, its address 1441: is unshared from all else at that point. */ 1442: 1443: copy_rtx_if_shared (stack_slot_list); 1444: } 1445: 1446: /* Mark ORIG as in use, and return a copy of it if it was already in use. 1447: Recursively does the same for subexpressions. */ 1448: 1449: rtx 1450: copy_rtx_if_shared (orig) 1451: rtx orig; 1452: { 1453: register rtx x = orig; 1454: register int i; 1455: register enum rtx_code code; 1456: register char *format_ptr; 1457: int copied = 0; 1458: 1459: if (x == 0) 1460: return 0; 1461: 1462: code = GET_CODE (x); 1463: 1464: /* These types may be freely shared. */ 1465: 1466: switch (code) 1467: { 1468: case REG: 1469: case QUEUED: 1470: case CONST_INT: 1471: case CONST_DOUBLE: 1472: case SYMBOL_REF: 1473: case CODE_LABEL: 1474: case PC: 1475: case CC0: 1476: case SCRATCH: 1477: /* SCRATCH must be shared because they represent distinct values. */ 1478: return x; 1479: 1.1.1.5 root 1480: case CONST: 1481: /* CONST can be shared if it contains a SYMBOL_REF. If it contains 1482: a LABEL_REF, it isn't sharable. */ 1483: if (GET_CODE (XEXP (x, 0)) == PLUS 1484: && GET_CODE (XEXP (XEXP (x, 0), 0)) == SYMBOL_REF 1485: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT) 1486: return x; 1487: break; 1488: 1.1 root 1489: case INSN: 1490: case JUMP_INSN: 1491: case CALL_INSN: 1492: case NOTE: 1493: case BARRIER: 1494: /* The chain of insns is not being copied. */ 1495: return x; 1496: 1497: case MEM: 1498: /* A MEM is allowed to be shared if its address is constant 1499: or is a constant plus one of the special registers. */ 1500: if (CONSTANT_ADDRESS_P (XEXP (x, 0)) 1501: || XEXP (x, 0) == virtual_stack_vars_rtx 1502: || XEXP (x, 0) == virtual_incoming_args_rtx) 1503: return x; 1504: 1505: if (GET_CODE (XEXP (x, 0)) == PLUS 1506: && (XEXP (XEXP (x, 0), 0) == virtual_stack_vars_rtx 1507: || XEXP (XEXP (x, 0), 0) == virtual_incoming_args_rtx) 1508: && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1))) 1509: { 1510: /* This MEM can appear in more than one place, 1511: but its address better not be shared with anything else. */ 1512: if (! x->used) 1513: XEXP (x, 0) = copy_rtx_if_shared (XEXP (x, 0)); 1514: x->used = 1; 1515: return x; 1516: } 1517: } 1518: 1519: /* This rtx may not be shared. If it has already been seen, 1520: replace it with a copy of itself. */ 1521: 1522: if (x->used) 1523: { 1524: register rtx copy; 1525: 1526: copy = rtx_alloc (code); 1.1.1.7 ! root 1527: bcopy ((char *) x, (char *) copy, ! 1528: (sizeof (*copy) - sizeof (copy->fld) ! 1529: + sizeof (copy->fld[0]) * GET_RTX_LENGTH (code))); 1.1 root 1530: x = copy; 1531: copied = 1; 1532: } 1533: x->used = 1; 1534: 1535: /* Now scan the subexpressions recursively. 1536: We can store any replaced subexpressions directly into X 1537: since we know X is not shared! Any vectors in X 1538: must be copied if X was copied. */ 1539: 1540: format_ptr = GET_RTX_FORMAT (code); 1541: 1542: for (i = 0; i < GET_RTX_LENGTH (code); i++) 1543: { 1544: switch (*format_ptr++) 1545: { 1546: case 'e': 1547: XEXP (x, i) = copy_rtx_if_shared (XEXP (x, i)); 1548: break; 1549: 1550: case 'E': 1551: if (XVEC (x, i) != NULL) 1552: { 1553: register int j; 1.1.1.6 root 1554: int len = XVECLEN (x, i); 1.1 root 1555: 1.1.1.6 root 1556: if (copied && len > 0) 1557: XVEC (x, i) = gen_rtvec_v (len, &XVECEXP (x, i, 0)); 1558: for (j = 0; j < len; j++) 1559: XVECEXP (x, i, j) = copy_rtx_if_shared (XVECEXP (x, i, j)); 1.1 root 1560: } 1561: break; 1562: } 1563: } 1564: return x; 1565: } 1566: 1567: /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used 1568: to look for shared sub-parts. */ 1569: 1570: void 1571: reset_used_flags (x) 1572: rtx x; 1573: { 1574: register int i, j; 1575: register enum rtx_code code; 1576: register char *format_ptr; 1577: 1578: if (x == 0) 1579: return; 1580: 1581: code = GET_CODE (x); 1582: 1583: /* These types may be freely shared so we needn't do any reseting 1584: for them. */ 1585: 1586: switch (code) 1587: { 1588: case REG: 1589: case QUEUED: 1590: case CONST_INT: 1591: case CONST_DOUBLE: 1592: case SYMBOL_REF: 1593: case CODE_LABEL: 1594: case PC: 1595: case CC0: 1596: return; 1597: 1598: case INSN: 1599: case JUMP_INSN: 1600: case CALL_INSN: 1601: case NOTE: 1602: case LABEL_REF: 1603: case BARRIER: 1604: /* The chain of insns is not being copied. */ 1605: return; 1606: } 1607: 1608: x->used = 0; 1609: 1610: format_ptr = GET_RTX_FORMAT (code); 1611: for (i = 0; i < GET_RTX_LENGTH (code); i++) 1612: { 1613: switch (*format_ptr++) 1614: { 1615: case 'e': 1616: reset_used_flags (XEXP (x, i)); 1617: break; 1618: 1619: case 'E': 1620: for (j = 0; j < XVECLEN (x, i); j++) 1621: reset_used_flags (XVECEXP (x, i, j)); 1622: break; 1623: } 1624: } 1625: } 1626: 1627: /* Copy X if necessary so that it won't be altered by changes in OTHER. 1628: Return X or the rtx for the pseudo reg the value of X was copied into. 1629: OTHER must be valid as a SET_DEST. */ 1630: 1631: rtx 1632: make_safe_from (x, other) 1633: rtx x, other; 1634: { 1635: while (1) 1636: switch (GET_CODE (other)) 1637: { 1638: case SUBREG: 1639: other = SUBREG_REG (other); 1640: break; 1641: case STRICT_LOW_PART: 1642: case SIGN_EXTEND: 1643: case ZERO_EXTEND: 1644: other = XEXP (other, 0); 1645: break; 1646: default: 1647: goto done; 1648: } 1649: done: 1650: if ((GET_CODE (other) == MEM 1651: && ! CONSTANT_P (x) 1652: && GET_CODE (x) != REG 1653: && GET_CODE (x) != SUBREG) 1654: || (GET_CODE (other) == REG 1655: && (REGNO (other) < FIRST_PSEUDO_REGISTER 1656: || reg_mentioned_p (other, x)))) 1657: { 1658: rtx temp = gen_reg_rtx (GET_MODE (x)); 1659: emit_move_insn (temp, x); 1660: return temp; 1661: } 1662: return x; 1663: } 1664: 1665: /* Emission of insns (adding them to the doubly-linked list). */ 1666: 1667: /* Return the first insn of the current sequence or current function. */ 1668: 1669: rtx 1670: get_insns () 1671: { 1672: return first_insn; 1673: } 1674: 1675: /* Return the last insn emitted in current sequence or current function. */ 1676: 1677: rtx 1678: get_last_insn () 1679: { 1680: return last_insn; 1681: } 1682: 1683: /* Specify a new insn as the last in the chain. */ 1684: 1685: void 1686: set_last_insn (insn) 1687: rtx insn; 1688: { 1689: if (NEXT_INSN (insn) != 0) 1690: abort (); 1691: last_insn = insn; 1692: } 1693: 1694: /* Return the last insn emitted, even if it is in a sequence now pushed. */ 1695: 1696: rtx 1697: get_last_insn_anywhere () 1698: { 1699: struct sequence_stack *stack; 1700: if (last_insn) 1701: return last_insn; 1702: for (stack = sequence_stack; stack; stack = stack->next) 1703: if (stack->last != 0) 1704: return stack->last; 1705: return 0; 1706: } 1707: 1708: /* Return a number larger than any instruction's uid in this function. */ 1709: 1710: int 1711: get_max_uid () 1712: { 1713: return cur_insn_uid; 1714: } 1715: 1716: /* Return the next insn. If it is a SEQUENCE, return the first insn 1717: of the sequence. */ 1718: 1719: rtx 1720: next_insn (insn) 1721: rtx insn; 1722: { 1723: if (insn) 1724: { 1725: insn = NEXT_INSN (insn); 1726: if (insn && GET_CODE (insn) == INSN 1727: && GET_CODE (PATTERN (insn)) == SEQUENCE) 1728: insn = XVECEXP (PATTERN (insn), 0, 0); 1729: } 1730: 1731: return insn; 1732: } 1733: 1734: /* Return the previous insn. If it is a SEQUENCE, return the last insn 1735: of the sequence. */ 1736: 1737: rtx 1738: previous_insn (insn) 1739: rtx insn; 1740: { 1741: if (insn) 1742: { 1743: insn = PREV_INSN (insn); 1744: if (insn && GET_CODE (insn) == INSN 1745: && GET_CODE (PATTERN (insn)) == SEQUENCE) 1746: insn = XVECEXP (PATTERN (insn), 0, XVECLEN (PATTERN (insn), 0) - 1); 1747: } 1748: 1749: return insn; 1750: } 1751: 1752: /* Return the next insn after INSN that is not a NOTE. This routine does not 1753: look inside SEQUENCEs. */ 1754: 1755: rtx 1756: next_nonnote_insn (insn) 1757: rtx insn; 1758: { 1759: while (insn) 1760: { 1761: insn = NEXT_INSN (insn); 1762: if (insn == 0 || GET_CODE (insn) != NOTE) 1763: break; 1764: } 1765: 1766: return insn; 1767: } 1768: 1769: /* Return the previous insn before INSN that is not a NOTE. This routine does 1770: not look inside SEQUENCEs. */ 1771: 1772: rtx 1773: prev_nonnote_insn (insn) 1774: rtx insn; 1775: { 1776: while (insn) 1777: { 1778: insn = PREV_INSN (insn); 1779: if (insn == 0 || GET_CODE (insn) != NOTE) 1780: break; 1781: } 1782: 1783: return insn; 1784: } 1785: 1786: /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN; 1787: or 0, if there is none. This routine does not look inside 1788: SEQUENCEs. */ 1789: 1790: rtx 1791: next_real_insn (insn) 1792: rtx insn; 1793: { 1794: while (insn) 1795: { 1796: insn = NEXT_INSN (insn); 1797: if (insn == 0 || GET_CODE (insn) == INSN 1798: || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN) 1799: break; 1800: } 1801: 1802: return insn; 1803: } 1804: 1805: /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN; 1806: or 0, if there is none. This routine does not look inside 1807: SEQUENCEs. */ 1808: 1809: rtx 1810: prev_real_insn (insn) 1811: rtx insn; 1812: { 1813: while (insn) 1814: { 1815: insn = PREV_INSN (insn); 1816: if (insn == 0 || GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN 1817: || GET_CODE (insn) == JUMP_INSN) 1818: break; 1819: } 1820: 1821: return insn; 1822: } 1823: 1824: /* Find the next insn after INSN that really does something. This routine 1825: does not look inside SEQUENCEs. Until reload has completed, this is the 1826: same as next_real_insn. */ 1827: 1828: rtx 1829: next_active_insn (insn) 1830: rtx insn; 1831: { 1832: while (insn) 1833: { 1834: insn = NEXT_INSN (insn); 1835: if (insn == 0 1836: || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN 1837: || (GET_CODE (insn) == INSN 1838: && (! reload_completed 1839: || (GET_CODE (PATTERN (insn)) != USE 1840: && GET_CODE (PATTERN (insn)) != CLOBBER)))) 1841: break; 1842: } 1843: 1844: return insn; 1845: } 1846: 1847: /* Find the last insn before INSN that really does something. This routine 1848: does not look inside SEQUENCEs. Until reload has completed, this is the 1849: same as prev_real_insn. */ 1850: 1851: rtx 1852: prev_active_insn (insn) 1853: rtx insn; 1854: { 1855: while (insn) 1856: { 1857: insn = PREV_INSN (insn); 1858: if (insn == 0 1859: || GET_CODE (insn) == CALL_INSN || GET_CODE (insn) == JUMP_INSN 1860: || (GET_CODE (insn) == INSN 1861: && (! reload_completed 1862: || (GET_CODE (PATTERN (insn)) != USE 1863: && GET_CODE (PATTERN (insn)) != CLOBBER)))) 1864: break; 1865: } 1866: 1867: return insn; 1868: } 1869: 1870: /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */ 1871: 1872: rtx 1873: next_label (insn) 1874: rtx insn; 1875: { 1876: while (insn) 1877: { 1878: insn = NEXT_INSN (insn); 1879: if (insn == 0 || GET_CODE (insn) == CODE_LABEL) 1880: break; 1881: } 1882: 1883: return insn; 1884: } 1885: 1886: /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */ 1887: 1888: rtx 1889: prev_label (insn) 1890: rtx insn; 1891: { 1892: while (insn) 1893: { 1894: insn = PREV_INSN (insn); 1895: if (insn == 0 || GET_CODE (insn) == CODE_LABEL) 1896: break; 1897: } 1898: 1899: return insn; 1900: } 1901: 1902: #ifdef HAVE_cc0 1.1.1.3 root 1903: /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER 1904: and REG_CC_USER notes so we can find it. */ 1905: 1906: void 1907: link_cc0_insns (insn) 1908: rtx insn; 1909: { 1910: rtx user = next_nonnote_insn (insn); 1911: 1912: if (GET_CODE (user) == INSN && GET_CODE (PATTERN (user)) == SEQUENCE) 1913: user = XVECEXP (PATTERN (user), 0, 0); 1914: 1915: REG_NOTES (user) = gen_rtx (INSN_LIST, REG_CC_SETTER, insn, 1916: REG_NOTES (user)); 1917: REG_NOTES (insn) = gen_rtx (INSN_LIST, REG_CC_USER, user, REG_NOTES (insn)); 1918: } 1919: 1.1 root 1920: /* Return the next insn that uses CC0 after INSN, which is assumed to 1921: set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter 1922: applied to the result of this function should yield INSN). 1923: 1924: Normally, this is simply the next insn. However, if a REG_CC_USER note 1925: is present, it contains the insn that uses CC0. 1926: 1927: Return 0 if we can't find the insn. */ 1928: 1929: rtx 1930: next_cc0_user (insn) 1931: rtx insn; 1932: { 1.1.1.4 root 1933: rtx note = find_reg_note (insn, REG_CC_USER, NULL_RTX); 1.1 root 1934: 1935: if (note) 1936: return XEXP (note, 0); 1937: 1938: insn = next_nonnote_insn (insn); 1939: if (insn && GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) 1940: insn = XVECEXP (PATTERN (insn), 0, 0); 1941: 1942: if (insn && GET_RTX_CLASS (GET_CODE (insn)) == 'i' 1943: && reg_mentioned_p (cc0_rtx, PATTERN (insn))) 1944: return insn; 1945: 1946: return 0; 1947: } 1948: 1949: /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER 1950: note, it is the previous insn. */ 1951: 1952: rtx 1953: prev_cc0_setter (insn) 1954: rtx insn; 1955: { 1.1.1.4 root 1956: rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 1.1 root 1957: rtx link; 1958: 1959: if (note) 1960: return XEXP (note, 0); 1961: 1962: insn = prev_nonnote_insn (insn); 1963: if (! sets_cc0_p (PATTERN (insn))) 1964: abort (); 1965: 1966: return insn; 1967: } 1968: #endif 1969: 1970: /* Try splitting insns that can be split for better scheduling. 1971: PAT is the pattern which might split. 1972: TRIAL is the insn providing PAT. 1.1.1.7 ! root 1973: LAST is non-zero if we should return the last insn of the sequence produced. 1.1 root 1974: 1975: If this routine succeeds in splitting, it returns the first or last 1.1.1.7 ! root 1976: replacement insn depending on the value of LAST. Otherwise, it 1.1 root 1977: returns TRIAL. If the insn to be returned can be split, it will be. */ 1978: 1979: rtx 1.1.1.7 ! root 1980: try_split (pat, trial, last) 1.1 root 1981: rtx pat, trial; 1.1.1.7 ! root 1982: int last; 1.1 root 1983: { 1984: rtx before = PREV_INSN (trial); 1985: rtx after = NEXT_INSN (trial); 1986: rtx seq = split_insns (pat, trial); 1987: int has_barrier = 0; 1988: rtx tem; 1989: 1990: /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER. 1991: We may need to handle this specially. */ 1992: if (after && GET_CODE (after) == BARRIER) 1993: { 1994: has_barrier = 1; 1995: after = NEXT_INSN (after); 1996: } 1997: 1998: if (seq) 1999: { 2000: /* SEQ can either be a SEQUENCE or the pattern of a single insn. 2001: The latter case will normally arise only when being done so that 2002: it, in turn, will be split (SFmode on the 29k is an example). */ 2003: if (GET_CODE (seq) == SEQUENCE) 2004: { 2005: /* If we are splitting a JUMP_INSN, look for the JUMP_INSN in 2006: SEQ and copy our JUMP_LABEL to it. If JUMP_LABEL is non-zero, 2007: increment the usage count so we don't delete the label. */ 2008: int i; 2009: 2010: if (GET_CODE (trial) == JUMP_INSN) 2011: for (i = XVECLEN (seq, 0) - 1; i >= 0; i--) 2012: if (GET_CODE (XVECEXP (seq, 0, i)) == JUMP_INSN) 2013: { 2014: JUMP_LABEL (XVECEXP (seq, 0, i)) = JUMP_LABEL (trial); 2015: 2016: if (JUMP_LABEL (trial)) 2017: LABEL_NUSES (JUMP_LABEL (trial))++; 2018: } 2019: 2020: tem = emit_insn_after (seq, before); 2021: 2022: delete_insn (trial); 2023: if (has_barrier) 2024: emit_barrier_after (tem); 1.1.1.7 ! root 2025: ! 2026: /* Recursively call try_split for each new insn created; by the ! 2027: time control returns here that insn will be fully split, so ! 2028: set LAST and continue from the insn after the one returned. ! 2029: We can't use next_active_insn here since AFTER may be a note. ! 2030: Ignore deleted insns, which can be occur if not optimizing. */ ! 2031: for (tem = NEXT_INSN (before); tem != after; ! 2032: tem = NEXT_INSN (tem)) ! 2033: if (! INSN_DELETED_P (tem)) ! 2034: tem = try_split (PATTERN (tem), tem, 1); 1.1 root 2035: } 2036: /* Avoid infinite loop if the result matches the original pattern. */ 2037: else if (rtx_equal_p (seq, pat)) 2038: return trial; 2039: else 2040: { 2041: PATTERN (trial) = seq; 2042: INSN_CODE (trial) = -1; 1.1.1.7 ! root 2043: try_split (seq, trial, last); 1.1 root 2044: } 2045: 1.1.1.7 ! root 2046: /* Return either the first or the last insn, depending on which was ! 2047: requested. */ ! 2048: return last ? prev_active_insn (after) : next_active_insn (before); 1.1 root 2049: } 2050: 2051: return trial; 2052: } 2053: 2054: /* Make and return an INSN rtx, initializing all its slots. 1.1.1.4 root 2055: Store PATTERN in the pattern slots. */ 1.1 root 2056: 2057: rtx 1.1.1.4 root 2058: make_insn_raw (pattern) 1.1 root 2059: rtx pattern; 2060: { 2061: register rtx insn; 2062: 1.1.1.5 root 2063: insn = rtx_alloc (INSN); 2064: INSN_UID (insn) = cur_insn_uid++; 1.1 root 2065: 2066: PATTERN (insn) = pattern; 2067: INSN_CODE (insn) = -1; 1.1.1.5 root 2068: LOG_LINKS (insn) = NULL; 2069: REG_NOTES (insn) = NULL; 1.1 root 2070: 2071: return insn; 2072: } 2073: 2074: /* Like `make_insn' but make a JUMP_INSN instead of an insn. */ 2075: 2076: static rtx 1.1.1.4 root 2077: make_jump_insn_raw (pattern) 1.1 root 2078: rtx pattern; 2079: { 2080: register rtx insn; 2081: 1.1.1.4 root 2082: insn = rtx_alloc (JUMP_INSN); 1.1.1.5 root 2083: INSN_UID (insn) = cur_insn_uid++; 1.1 root 2084: 2085: PATTERN (insn) = pattern; 2086: INSN_CODE (insn) = -1; 1.1.1.5 root 2087: LOG_LINKS (insn) = NULL; 2088: REG_NOTES (insn) = NULL; 2089: JUMP_LABEL (insn) = NULL; 1.1 root 2090: 2091: return insn; 2092: } 1.1.1.7 ! root 2093: ! 2094: /* Like `make_insn' but make a CALL_INSN instead of an insn. */ ! 2095: ! 2096: static rtx ! 2097: make_call_insn_raw (pattern) ! 2098: rtx pattern; ! 2099: { ! 2100: register rtx insn; ! 2101: ! 2102: insn = rtx_alloc (CALL_INSN); ! 2103: INSN_UID (insn) = cur_insn_uid++; ! 2104: ! 2105: PATTERN (insn) = pattern; ! 2106: INSN_CODE (insn) = -1; ! 2107: LOG_LINKS (insn) = NULL; ! 2108: REG_NOTES (insn) = NULL; ! 2109: CALL_INSN_FUNCTION_USAGE (insn) = NULL; ! 2110: ! 2111: return insn; ! 2112: } 1.1 root 2113: 2114: /* Add INSN to the end of the doubly-linked list. 2115: INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */ 2116: 2117: void 2118: add_insn (insn) 2119: register rtx insn; 2120: { 2121: PREV_INSN (insn) = last_insn; 2122: NEXT_INSN (insn) = 0; 2123: 2124: if (NULL != last_insn) 2125: NEXT_INSN (last_insn) = insn; 2126: 2127: if (NULL == first_insn) 2128: first_insn = insn; 2129: 2130: last_insn = insn; 2131: } 2132: 1.1.1.7 ! root 2133: /* Add INSN into the doubly-linked list after insn AFTER. This and ! 2134: the next should be the only functions called to insert an insn once ! 2135: delay slots have been filled since only they know how to update a ! 2136: SEQUENCE. */ 1.1 root 2137: 2138: void 2139: add_insn_after (insn, after) 2140: rtx insn, after; 2141: { 2142: rtx next = NEXT_INSN (after); 2143: 1.1.1.7 ! root 2144: if (optimize && INSN_DELETED_P (after)) ! 2145: abort (); ! 2146: 1.1 root 2147: NEXT_INSN (insn) = next; 2148: PREV_INSN (insn) = after; 2149: 2150: if (next) 2151: { 2152: PREV_INSN (next) = insn; 2153: if (GET_CODE (next) == INSN && GET_CODE (PATTERN (next)) == SEQUENCE) 2154: PREV_INSN (XVECEXP (PATTERN (next), 0, 0)) = insn; 2155: } 2156: else if (last_insn == after) 2157: last_insn = insn; 2158: else 2159: { 2160: struct sequence_stack *stack = sequence_stack; 2161: /* Scan all pending sequences too. */ 2162: for (; stack; stack = stack->next) 2163: if (after == stack->last) 1.1.1.7 ! root 2164: { ! 2165: stack->last = insn; ! 2166: break; ! 2167: } ! 2168: ! 2169: if (stack == 0) ! 2170: abort (); 1.1 root 2171: } 2172: 2173: NEXT_INSN (after) = insn; 2174: if (GET_CODE (after) == INSN && GET_CODE (PATTERN (after)) == SEQUENCE) 2175: { 2176: rtx sequence = PATTERN (after); 2177: NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; 2178: } 2179: } 2180: 1.1.1.7 ! root 2181: /* Add INSN into the doubly-linked list before insn BEFORE. This and ! 2182: the previous should be the only functions called to insert an insn once ! 2183: delay slots have been filled since only they know how to update a ! 2184: SEQUENCE. */ ! 2185: ! 2186: void ! 2187: add_insn_before (insn, before) ! 2188: rtx insn, before; ! 2189: { ! 2190: rtx prev = PREV_INSN (before); ! 2191: ! 2192: if (optimize && INSN_DELETED_P (before)) ! 2193: abort (); ! 2194: ! 2195: PREV_INSN (insn) = prev; ! 2196: NEXT_INSN (insn) = before; ! 2197: ! 2198: if (prev) ! 2199: { ! 2200: NEXT_INSN (prev) = insn; ! 2201: if (GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SEQUENCE) ! 2202: { ! 2203: rtx sequence = PATTERN (prev); ! 2204: NEXT_INSN (XVECEXP (sequence, 0, XVECLEN (sequence, 0) - 1)) = insn; ! 2205: } ! 2206: } ! 2207: else if (first_insn == before) ! 2208: first_insn = insn; ! 2209: else ! 2210: { ! 2211: struct sequence_stack *stack = sequence_stack; ! 2212: /* Scan all pending sequences too. */ ! 2213: for (; stack; stack = stack->next) ! 2214: if (before == stack->first) ! 2215: { ! 2216: stack->first = insn; ! 2217: break; ! 2218: } ! 2219: ! 2220: if (stack == 0) ! 2221: abort (); ! 2222: } ! 2223: ! 2224: PREV_INSN (before) = insn; ! 2225: if (GET_CODE (before) == INSN && GET_CODE (PATTERN (before)) == SEQUENCE) ! 2226: PREV_INSN (XVECEXP (PATTERN (before), 0, 0)) = insn; ! 2227: } ! 2228: 1.1 root 2229: /* Delete all insns made since FROM. 2230: FROM becomes the new last instruction. */ 2231: 2232: void 2233: delete_insns_since (from) 2234: rtx from; 2235: { 2236: if (from == 0) 2237: first_insn = 0; 2238: else 2239: NEXT_INSN (from) = 0; 2240: last_insn = from; 2241: } 2242: 1.1.1.7 ! root 2243: /* This function is deprecated, please use sequences instead. ! 2244: ! 2245: Move a consecutive bunch of insns to a different place in the chain. 1.1 root 2246: The insns to be moved are those between FROM and TO. 2247: They are moved to a new position after the insn AFTER. 2248: AFTER must not be FROM or TO or any insn in between. 2249: 2250: This function does not know about SEQUENCEs and hence should not be 2251: called after delay-slot filling has been done. */ 2252: 2253: void 2254: reorder_insns (from, to, after) 2255: rtx from, to, after; 2256: { 2257: /* Splice this bunch out of where it is now. */ 2258: if (PREV_INSN (from)) 2259: NEXT_INSN (PREV_INSN (from)) = NEXT_INSN (to); 2260: if (NEXT_INSN (to)) 2261: PREV_INSN (NEXT_INSN (to)) = PREV_INSN (from); 2262: if (last_insn == to) 2263: last_insn = PREV_INSN (from); 2264: if (first_insn == from) 2265: first_insn = NEXT_INSN (to); 2266: 2267: /* Make the new neighbors point to it and it to them. */ 2268: if (NEXT_INSN (after)) 2269: PREV_INSN (NEXT_INSN (after)) = to; 2270: 2271: NEXT_INSN (to) = NEXT_INSN (after); 2272: PREV_INSN (from) = after; 2273: NEXT_INSN (after) = from; 2274: if (after == last_insn) 2275: last_insn = to; 2276: } 2277: 2278: /* Return the line note insn preceding INSN. */ 2279: 2280: static rtx 2281: find_line_note (insn) 2282: rtx insn; 2283: { 2284: if (no_line_numbers) 2285: return 0; 2286: 2287: for (; insn; insn = PREV_INSN (insn)) 2288: if (GET_CODE (insn) == NOTE 2289: && NOTE_LINE_NUMBER (insn) >= 0) 2290: break; 2291: 2292: return insn; 2293: } 2294: 2295: /* Like reorder_insns, but inserts line notes to preserve the line numbers 2296: of the moved insns when debugging. This may insert a note between AFTER 2297: and FROM, and another one after TO. */ 2298: 2299: void 2300: reorder_insns_with_line_notes (from, to, after) 2301: rtx from, to, after; 2302: { 2303: rtx from_line = find_line_note (from); 2304: rtx after_line = find_line_note (after); 2305: 2306: reorder_insns (from, to, after); 2307: 2308: if (from_line == after_line) 2309: return; 2310: 2311: if (from_line) 2312: emit_line_note_after (NOTE_SOURCE_FILE (from_line), 2313: NOTE_LINE_NUMBER (from_line), 2314: after); 2315: if (after_line) 2316: emit_line_note_after (NOTE_SOURCE_FILE (after_line), 2317: NOTE_LINE_NUMBER (after_line), 2318: to); 2319: } 2320: 2321: /* Emit an insn of given code and pattern 2322: at a specified place within the doubly-linked list. */ 2323: 2324: /* Make an instruction with body PATTERN 2325: and output it before the instruction BEFORE. */ 2326: 2327: rtx 2328: emit_insn_before (pattern, before) 2329: register rtx pattern, before; 2330: { 2331: register rtx insn = before; 2332: 2333: if (GET_CODE (pattern) == SEQUENCE) 2334: { 2335: register int i; 2336: 2337: for (i = 0; i < XVECLEN (pattern, 0); i++) 2338: { 2339: insn = XVECEXP (pattern, 0, i); 1.1.1.7 ! root 2340: add_insn_before (insn, before); 1.1 root 2341: } 2342: if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) 2343: sequence_result[XVECLEN (pattern, 0)] = pattern; 2344: } 2345: else 2346: { 1.1.1.4 root 2347: insn = make_insn_raw (pattern); 1.1.1.7 ! root 2348: add_insn_before (insn, before); 1.1 root 2349: } 2350: 2351: return insn; 2352: } 2353: 2354: /* Make an instruction with body PATTERN and code JUMP_INSN 2355: and output it before the instruction BEFORE. */ 2356: 2357: rtx 2358: emit_jump_insn_before (pattern, before) 2359: register rtx pattern, before; 2360: { 2361: register rtx insn; 2362: 2363: if (GET_CODE (pattern) == SEQUENCE) 2364: insn = emit_insn_before (pattern, before); 2365: else 2366: { 1.1.1.5 root 2367: insn = make_jump_insn_raw (pattern); 1.1.1.7 ! root 2368: add_insn_before (insn, before); 1.1 root 2369: } 2370: 2371: return insn; 2372: } 2373: 2374: /* Make an instruction with body PATTERN and code CALL_INSN 2375: and output it before the instruction BEFORE. */ 2376: 2377: rtx 2378: emit_call_insn_before (pattern, before) 2379: register rtx pattern, before; 2380: { 1.1.1.7 ! root 2381: register rtx insn; ! 2382: ! 2383: if (GET_CODE (pattern) == SEQUENCE) ! 2384: insn = emit_insn_before (pattern, before); ! 2385: else ! 2386: { ! 2387: insn = make_call_insn_raw (pattern); ! 2388: add_insn_before (insn, before); ! 2389: PUT_CODE (insn, CALL_INSN); ! 2390: } ! 2391: 1.1 root 2392: return insn; 2393: } 2394: 2395: /* Make an insn of code BARRIER 2396: and output it before the insn AFTER. */ 2397: 2398: rtx 2399: emit_barrier_before (before) 2400: register rtx before; 2401: { 2402: register rtx insn = rtx_alloc (BARRIER); 2403: 2404: INSN_UID (insn) = cur_insn_uid++; 2405: 1.1.1.7 ! root 2406: add_insn_before (insn, before); 1.1 root 2407: return insn; 2408: } 2409: 2410: /* Emit a note of subtype SUBTYPE before the insn BEFORE. */ 2411: 2412: rtx 2413: emit_note_before (subtype, before) 2414: int subtype; 2415: rtx before; 2416: { 2417: register rtx note = rtx_alloc (NOTE); 2418: INSN_UID (note) = cur_insn_uid++; 2419: NOTE_SOURCE_FILE (note) = 0; 2420: NOTE_LINE_NUMBER (note) = subtype; 2421: 1.1.1.7 ! root 2422: add_insn_before (note, before); 1.1 root 2423: return note; 2424: } 2425: 2426: /* Make an insn of code INSN with body PATTERN 2427: and output it after the insn AFTER. */ 2428: 2429: rtx 2430: emit_insn_after (pattern, after) 2431: register rtx pattern, after; 2432: { 2433: register rtx insn = after; 2434: 2435: if (GET_CODE (pattern) == SEQUENCE) 2436: { 2437: register int i; 2438: 2439: for (i = 0; i < XVECLEN (pattern, 0); i++) 2440: { 2441: insn = XVECEXP (pattern, 0, i); 2442: add_insn_after (insn, after); 2443: after = insn; 2444: } 2445: if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) 2446: sequence_result[XVECLEN (pattern, 0)] = pattern; 2447: } 2448: else 2449: { 1.1.1.4 root 2450: insn = make_insn_raw (pattern); 1.1 root 2451: add_insn_after (insn, after); 2452: } 2453: 2454: return insn; 2455: } 2456: 1.1.1.4 root 2457: /* Similar to emit_insn_after, except that line notes are to be inserted so 2458: as to act as if this insn were at FROM. */ 2459: 2460: void 2461: emit_insn_after_with_line_notes (pattern, after, from) 2462: rtx pattern, after, from; 2463: { 2464: rtx from_line = find_line_note (from); 2465: rtx after_line = find_line_note (after); 2466: rtx insn = emit_insn_after (pattern, after); 2467: 2468: if (from_line) 2469: emit_line_note_after (NOTE_SOURCE_FILE (from_line), 2470: NOTE_LINE_NUMBER (from_line), 2471: after); 2472: 2473: if (after_line) 2474: emit_line_note_after (NOTE_SOURCE_FILE (after_line), 2475: NOTE_LINE_NUMBER (after_line), 2476: insn); 2477: } 2478: 1.1 root 2479: /* Make an insn of code JUMP_INSN with body PATTERN 2480: and output it after the insn AFTER. */ 2481: 2482: rtx 2483: emit_jump_insn_after (pattern, after) 2484: register rtx pattern, after; 2485: { 2486: register rtx insn; 2487: 2488: if (GET_CODE (pattern) == SEQUENCE) 2489: insn = emit_insn_after (pattern, after); 2490: else 2491: { 1.1.1.5 root 2492: insn = make_jump_insn_raw (pattern); 1.1 root 2493: add_insn_after (insn, after); 2494: } 2495: 2496: return insn; 2497: } 2498: 2499: /* Make an insn of code BARRIER 2500: and output it after the insn AFTER. */ 2501: 2502: rtx 2503: emit_barrier_after (after) 2504: register rtx after; 2505: { 2506: register rtx insn = rtx_alloc (BARRIER); 2507: 2508: INSN_UID (insn) = cur_insn_uid++; 2509: 2510: add_insn_after (insn, after); 2511: return insn; 2512: } 2513: 2514: /* Emit the label LABEL after the insn AFTER. */ 2515: 2516: rtx 2517: emit_label_after (label, after) 2518: rtx label, after; 2519: { 2520: /* This can be called twice for the same label 2521: as a result of the confusion that follows a syntax error! 2522: So make it harmless. */ 2523: if (INSN_UID (label) == 0) 2524: { 2525: INSN_UID (label) = cur_insn_uid++; 2526: add_insn_after (label, after); 2527: } 2528: 2529: return label; 2530: } 2531: 2532: /* Emit a note of subtype SUBTYPE after the insn AFTER. */ 2533: 2534: rtx 2535: emit_note_after (subtype, after) 2536: int subtype; 2537: rtx after; 2538: { 2539: register rtx note = rtx_alloc (NOTE); 2540: INSN_UID (note) = cur_insn_uid++; 2541: NOTE_SOURCE_FILE (note) = 0; 2542: NOTE_LINE_NUMBER (note) = subtype; 2543: add_insn_after (note, after); 2544: return note; 2545: } 2546: 2547: /* Emit a line note for FILE and LINE after the insn AFTER. */ 2548: 2549: rtx 2550: emit_line_note_after (file, line, after) 2551: char *file; 2552: int line; 2553: rtx after; 2554: { 2555: register rtx note; 2556: 2557: if (no_line_numbers && line > 0) 2558: { 2559: cur_insn_uid++; 2560: return 0; 2561: } 2562: 2563: note = rtx_alloc (NOTE); 2564: INSN_UID (note) = cur_insn_uid++; 2565: NOTE_SOURCE_FILE (note) = file; 2566: NOTE_LINE_NUMBER (note) = line; 2567: add_insn_after (note, after); 2568: return note; 2569: } 2570: 2571: /* Make an insn of code INSN with pattern PATTERN 2572: and add it to the end of the doubly-linked list. 2573: If PATTERN is a SEQUENCE, take the elements of it 2574: and emit an insn for each element. 2575: 2576: Returns the last insn emitted. */ 2577: 2578: rtx 2579: emit_insn (pattern) 2580: rtx pattern; 2581: { 2582: rtx insn = last_insn; 2583: 2584: if (GET_CODE (pattern) == SEQUENCE) 2585: { 2586: register int i; 2587: 2588: for (i = 0; i < XVECLEN (pattern, 0); i++) 2589: { 2590: insn = XVECEXP (pattern, 0, i); 2591: add_insn (insn); 2592: } 2593: if (XVECLEN (pattern, 0) < SEQUENCE_RESULT_SIZE) 2594: sequence_result[XVECLEN (pattern, 0)] = pattern; 2595: } 2596: else 2597: { 1.1.1.4 root 2598: insn = make_insn_raw (pattern); 1.1 root 2599: add_insn (insn); 2600: } 2601: 2602: return insn; 2603: } 2604: 2605: /* Emit the insns in a chain starting with INSN. 2606: Return the last insn emitted. */ 2607: 2608: rtx 2609: emit_insns (insn) 2610: rtx insn; 2611: { 2612: rtx last = 0; 2613: 2614: while (insn) 2615: { 2616: rtx next = NEXT_INSN (insn); 2617: add_insn (insn); 2618: last = insn; 2619: insn = next; 2620: } 2621: 2622: return last; 2623: } 2624: 2625: /* Emit the insns in a chain starting with INSN and place them in front of 2626: the insn BEFORE. Return the last insn emitted. */ 2627: 2628: rtx 2629: emit_insns_before (insn, before) 2630: rtx insn; 2631: rtx before; 2632: { 2633: rtx last = 0; 2634: 2635: while (insn) 2636: { 2637: rtx next = NEXT_INSN (insn); 1.1.1.7 ! root 2638: add_insn_before (insn, before); 1.1 root 2639: last = insn; 2640: insn = next; 2641: } 2642: 2643: return last; 2644: } 2645: 1.1.1.4 root 2646: /* Emit the insns in a chain starting with FIRST and place them in back of 2647: the insn AFTER. Return the last insn emitted. */ 2648: 2649: rtx 2650: emit_insns_after (first, after) 2651: register rtx first; 2652: register rtx after; 2653: { 2654: register rtx last; 2655: register rtx after_after; 2656: 2657: if (!after) 2658: abort (); 2659: 2660: if (!first) 2661: return first; 2662: 2663: for (last = first; NEXT_INSN (last); last = NEXT_INSN (last)) 2664: continue; 2665: 2666: after_after = NEXT_INSN (after); 2667: 2668: NEXT_INSN (after) = first; 2669: PREV_INSN (first) = after; 2670: NEXT_INSN (last) = after_after; 2671: if (after_after) 2672: PREV_INSN (after_after) = last; 2673: 2674: if (after == last_insn) 2675: last_insn = last; 2676: return last; 2677: } 2678: 1.1 root 2679: /* Make an insn of code JUMP_INSN with pattern PATTERN 2680: and add it to the end of the doubly-linked list. */ 2681: 2682: rtx 2683: emit_jump_insn (pattern) 2684: rtx pattern; 2685: { 2686: if (GET_CODE (pattern) == SEQUENCE) 2687: return emit_insn (pattern); 2688: else 2689: { 1.1.1.5 root 2690: register rtx insn = make_jump_insn_raw (pattern); 1.1 root 2691: add_insn (insn); 2692: return insn; 2693: } 2694: } 2695: 2696: /* Make an insn of code CALL_INSN with pattern PATTERN 2697: and add it to the end of the doubly-linked list. */ 2698: 2699: rtx 2700: emit_call_insn (pattern) 2701: rtx pattern; 2702: { 2703: if (GET_CODE (pattern) == SEQUENCE) 2704: return emit_insn (pattern); 2705: else 2706: { 1.1.1.7 ! root 2707: register rtx insn = make_call_insn_raw (pattern); 1.1 root 2708: add_insn (insn); 2709: PUT_CODE (insn, CALL_INSN); 2710: return insn; 2711: } 2712: } 2713: 2714: /* Add the label LABEL to the end of the doubly-linked list. */ 2715: 2716: rtx 2717: emit_label (label) 2718: rtx label; 2719: { 2720: /* This can be called twice for the same label 2721: as a result of the confusion that follows a syntax error! 2722: So make it harmless. */ 2723: if (INSN_UID (label) == 0) 2724: { 2725: INSN_UID (label) = cur_insn_uid++; 2726: add_insn (label); 2727: } 2728: return label; 2729: } 2730: 2731: /* Make an insn of code BARRIER 2732: and add it to the end of the doubly-linked list. */ 2733: 2734: rtx 2735: emit_barrier () 2736: { 2737: register rtx barrier = rtx_alloc (BARRIER); 2738: INSN_UID (barrier) = cur_insn_uid++; 2739: add_insn (barrier); 2740: return barrier; 2741: } 2742: 2743: /* Make an insn of code NOTE 2744: with data-fields specified by FILE and LINE 2745: and add it to the end of the doubly-linked list, 2746: but only if line-numbers are desired for debugging info. */ 2747: 2748: rtx 2749: emit_line_note (file, line) 2750: char *file; 2751: int line; 2752: { 1.1.1.6 root 2753: if (output_bytecode) 2754: { 2755: /* FIXME: for now we do nothing, but eventually we will have to deal with 2756: debugging information. */ 2757: return 0; 2758: } 2759: 1.1 root 2760: emit_filename = file; 2761: emit_lineno = line; 2762: 2763: #if 0 2764: if (no_line_numbers) 2765: return 0; 2766: #endif 2767: 2768: return emit_note (file, line); 2769: } 2770: 2771: /* Make an insn of code NOTE 2772: with data-fields specified by FILE and LINE 2773: and add it to the end of the doubly-linked list. 2774: If it is a line-number NOTE, omit it if it matches the previous one. */ 2775: 2776: rtx 2777: emit_note (file, line) 2778: char *file; 2779: int line; 2780: { 2781: register rtx note; 2782: 2783: if (line > 0) 2784: { 2785: if (file && last_filename && !strcmp (file, last_filename) 2786: && line == last_linenum) 2787: return 0; 2788: last_filename = file; 2789: last_linenum = line; 2790: } 2791: 2792: if (no_line_numbers && line > 0) 2793: { 2794: cur_insn_uid++; 2795: return 0; 2796: } 2797: 2798: note = rtx_alloc (NOTE); 2799: INSN_UID (note) = cur_insn_uid++; 2800: NOTE_SOURCE_FILE (note) = file; 2801: NOTE_LINE_NUMBER (note) = line; 2802: add_insn (note); 2803: return note; 2804: } 2805: 2806: /* Emit a NOTE, and don't omit it even if LINE it the previous note. */ 2807: 2808: rtx 2809: emit_line_note_force (file, line) 2810: char *file; 2811: int line; 2812: { 2813: last_linenum = -1; 2814: return emit_line_note (file, line); 2815: } 2816: 2817: /* Cause next statement to emit a line note even if the line number 2818: has not changed. This is used at the beginning of a function. */ 2819: 2820: void 2821: force_next_line_note () 2822: { 2823: last_linenum = -1; 2824: } 2825: 2826: /* Return an indication of which type of insn should have X as a body. 2827: The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */ 2828: 2829: enum rtx_code 2830: classify_insn (x) 2831: rtx x; 2832: { 2833: if (GET_CODE (x) == CODE_LABEL) 2834: return CODE_LABEL; 2835: if (GET_CODE (x) == CALL) 2836: return CALL_INSN; 2837: if (GET_CODE (x) == RETURN) 2838: return JUMP_INSN; 2839: if (GET_CODE (x) == SET) 2840: { 2841: if (SET_DEST (x) == pc_rtx) 2842: return JUMP_INSN; 2843: else if (GET_CODE (SET_SRC (x)) == CALL) 2844: return CALL_INSN; 2845: else 2846: return INSN; 2847: } 2848: if (GET_CODE (x) == PARALLEL) 2849: { 2850: register int j; 2851: for (j = XVECLEN (x, 0) - 1; j >= 0; j--) 2852: if (GET_CODE (XVECEXP (x, 0, j)) == CALL) 2853: return CALL_INSN; 2854: else if (GET_CODE (XVECEXP (x, 0, j)) == SET 2855: && SET_DEST (XVECEXP (x, 0, j)) == pc_rtx) 2856: return JUMP_INSN; 2857: else if (GET_CODE (XVECEXP (x, 0, j)) == SET 2858: && GET_CODE (SET_SRC (XVECEXP (x, 0, j))) == CALL) 2859: return CALL_INSN; 2860: } 2861: return INSN; 2862: } 2863: 2864: /* Emit the rtl pattern X as an appropriate kind of insn. 2865: If X is a label, it is simply added into the insn chain. */ 2866: 2867: rtx 2868: emit (x) 2869: rtx x; 2870: { 2871: enum rtx_code code = classify_insn (x); 2872: 2873: if (code == CODE_LABEL) 2874: return emit_label (x); 2875: else if (code == INSN) 2876: return emit_insn (x); 2877: else if (code == JUMP_INSN) 2878: { 2879: register rtx insn = emit_jump_insn (x); 2880: if (simplejump_p (insn) || GET_CODE (x) == RETURN) 2881: return emit_barrier (); 2882: return insn; 2883: } 2884: else if (code == CALL_INSN) 2885: return emit_call_insn (x); 2886: else 2887: abort (); 2888: } 2889: 2890: /* Begin emitting insns to a sequence which can be packaged in an RTL_EXPR. */ 2891: 2892: void 2893: start_sequence () 2894: { 2895: struct sequence_stack *tem; 2896: 2897: if (sequence_element_free_list) 2898: { 2899: /* Reuse a previously-saved struct sequence_stack. */ 2900: tem = sequence_element_free_list; 2901: sequence_element_free_list = tem->next; 2902: } 2903: else 2904: tem = (struct sequence_stack *) permalloc (sizeof (struct sequence_stack)); 2905: 2906: tem->next = sequence_stack; 2907: tem->first = first_insn; 2908: tem->last = last_insn; 1.1.1.6 root 2909: tem->sequence_rtl_expr = sequence_rtl_expr; 1.1 root 2910: 2911: sequence_stack = tem; 2912: 2913: first_insn = 0; 2914: last_insn = 0; 2915: } 2916: 1.1.1.6 root 2917: /* Similarly, but indicate that this sequence will be placed in 2918: T, an RTL_EXPR. */ 2919: 2920: void 2921: start_sequence_for_rtl_expr (t) 2922: tree t; 2923: { 2924: start_sequence (); 2925: 2926: sequence_rtl_expr = t; 2927: } 2928: 1.1 root 2929: /* Set up the insn chain starting with FIRST 2930: as the current sequence, saving the previously current one. */ 2931: 2932: void 2933: push_to_sequence (first) 2934: rtx first; 2935: { 2936: rtx last; 2937: 2938: start_sequence (); 2939: 2940: for (last = first; last && NEXT_INSN (last); last = NEXT_INSN (last)); 2941: 2942: first_insn = first; 2943: last_insn = last; 2944: } 2945: 1.1.1.5 root 2946: /* Set up the outer-level insn chain 2947: as the current sequence, saving the previously current one. */ 2948: 2949: void 2950: push_topmost_sequence () 2951: { 2952: struct sequence_stack *stack, *top; 2953: 2954: start_sequence (); 2955: 2956: for (stack = sequence_stack; stack; stack = stack->next) 2957: top = stack; 2958: 2959: first_insn = top->first; 2960: last_insn = top->last; 1.1.1.6 root 2961: sequence_rtl_expr = top->sequence_rtl_expr; 1.1.1.5 root 2962: } 2963: 2964: /* After emitting to the outer-level insn chain, update the outer-level 2965: insn chain, and restore the previous saved state. */ 2966: 2967: void 2968: pop_topmost_sequence () 2969: { 2970: struct sequence_stack *stack, *top; 2971: 2972: for (stack = sequence_stack; stack; stack = stack->next) 2973: top = stack; 2974: 2975: top->first = first_insn; 2976: top->last = last_insn; 1.1.1.6 root 2977: /* ??? Why don't we save sequence_rtl_expr here? */ 1.1.1.5 root 2978: 2979: end_sequence (); 2980: } 2981: 1.1 root 2982: /* After emitting to a sequence, restore previous saved state. 2983: 2984: To get the contents of the sequence just made, 2985: you must call `gen_sequence' *before* calling here. */ 2986: 2987: void 2988: end_sequence () 2989: { 2990: struct sequence_stack *tem = sequence_stack; 2991: 2992: first_insn = tem->first; 2993: last_insn = tem->last; 1.1.1.6 root 2994: sequence_rtl_expr = tem->sequence_rtl_expr; 1.1 root 2995: sequence_stack = tem->next; 2996: 2997: tem->next = sequence_element_free_list; 2998: sequence_element_free_list = tem; 2999: } 3000: 3001: /* Return 1 if currently emitting into a sequence. */ 3002: 3003: int 3004: in_sequence_p () 3005: { 3006: return sequence_stack != 0; 3007: } 3008: 3009: /* Generate a SEQUENCE rtx containing the insns already emitted 3010: to the current sequence. 3011: 3012: This is how the gen_... function from a DEFINE_EXPAND 3013: constructs the SEQUENCE that it returns. */ 3014: 3015: rtx 3016: gen_sequence () 3017: { 3018: rtx result; 3019: rtx tem; 3020: int i; 3021: int len; 3022: 3023: /* Count the insns in the chain. */ 3024: len = 0; 3025: for (tem = first_insn; tem; tem = NEXT_INSN (tem)) 3026: len++; 3027: 3028: /* If only one insn, return its pattern rather than a SEQUENCE. 3029: (Now that we cache SEQUENCE expressions, it isn't worth special-casing 3030: the case of an empty list.) */ 3031: if (len == 1 3032: && (GET_CODE (first_insn) == INSN 3033: || GET_CODE (first_insn) == JUMP_INSN 3034: || GET_CODE (first_insn) == CALL_INSN)) 3035: return PATTERN (first_insn); 3036: 3037: /* Put them in a vector. See if we already have a SEQUENCE of the 3038: appropriate length around. */ 3039: if (len < SEQUENCE_RESULT_SIZE && (result = sequence_result[len]) != 0) 3040: sequence_result[len] = 0; 3041: else 3042: { 3043: /* Ensure that this rtl goes in saveable_obstack, since we may be 3044: caching it. */ 1.1.1.5 root 3045: push_obstacks_nochange (); 3046: rtl_in_saveable_obstack (); 1.1 root 3047: result = gen_rtx (SEQUENCE, VOIDmode, rtvec_alloc (len)); 1.1.1.5 root 3048: pop_obstacks (); 1.1 root 3049: } 3050: 3051: for (i = 0, tem = first_insn; tem; tem = NEXT_INSN (tem), i++) 3052: XVECEXP (result, 0, i) = tem; 3053: 3054: return result; 3055: } 3056: 3057: /* Set up regno_reg_rtx, reg_rtx_no and regno_pointer_flag 3058: according to the chain of insns starting with FIRST. 3059: 3060: Also set cur_insn_uid to exceed the largest uid in that chain. 3061: 3062: This is used when an inline function's rtl is saved 3063: and passed to rest_of_compilation later. */ 3064: 3065: static void restore_reg_data_1 (); 3066: 3067: void 3068: restore_reg_data (first) 3069: rtx first; 3070: { 3071: register rtx insn; 3072: int i; 3073: register int max_uid = 0; 3074: 3075: for (insn = first; insn; insn = NEXT_INSN (insn)) 3076: { 3077: if (INSN_UID (insn) >= max_uid) 3078: max_uid = INSN_UID (insn); 3079: 3080: switch (GET_CODE (insn)) 3081: { 3082: case NOTE: 3083: case CODE_LABEL: 3084: case BARRIER: 3085: break; 3086: 3087: case JUMP_INSN: 3088: case CALL_INSN: 3089: case INSN: 3090: restore_reg_data_1 (PATTERN (insn)); 3091: break; 3092: } 3093: } 3094: 3095: /* Don't duplicate the uids already in use. */ 3096: cur_insn_uid = max_uid + 1; 3097: 3098: /* If any regs are missing, make them up. 3099: 3100: ??? word_mode is not necessarily the right mode. Most likely these REGs 3101: are never used. At some point this should be checked. */ 3102: 3103: for (i = FIRST_PSEUDO_REGISTER; i < reg_rtx_no; i++) 3104: if (regno_reg_rtx[i] == 0) 3105: regno_reg_rtx[i] = gen_rtx (REG, word_mode, i); 3106: } 3107: 3108: static void 3109: restore_reg_data_1 (orig) 3110: rtx orig; 3111: { 3112: register rtx x = orig; 3113: register int i; 3114: register enum rtx_code code; 3115: register char *format_ptr; 3116: 3117: code = GET_CODE (x); 3118: 3119: switch (code) 3120: { 3121: case QUEUED: 3122: case CONST_INT: 3123: case CONST_DOUBLE: 3124: case SYMBOL_REF: 3125: case CODE_LABEL: 3126: case PC: 3127: case CC0: 3128: case LABEL_REF: 3129: return; 3130: 3131: case REG: 3132: if (REGNO (x) >= FIRST_PSEUDO_REGISTER) 3133: { 3134: /* Make sure regno_pointer_flag and regno_reg_rtx are large 3135: enough to have an element for this pseudo reg number. */ 3136: if (REGNO (x) >= reg_rtx_no) 3137: { 3138: reg_rtx_no = REGNO (x); 3139: 3140: if (reg_rtx_no >= regno_pointer_flag_length) 3141: { 3142: int newlen = MAX (regno_pointer_flag_length * 2, 3143: reg_rtx_no + 30); 3144: rtx *new1; 3145: char *new = (char *) oballoc (newlen); 3146: bzero (new, newlen); 3147: bcopy (regno_pointer_flag, new, regno_pointer_flag_length); 3148: 3149: new1 = (rtx *) oballoc (newlen * sizeof (rtx)); 1.1.1.7 ! root 3150: bzero ((char *) new1, newlen * sizeof (rtx)); ! 3151: bcopy ((char *) regno_reg_rtx, (char *) new1, ! 3152: regno_pointer_flag_length * sizeof (rtx)); 1.1 root 3153: 3154: regno_pointer_flag = new; 3155: regno_reg_rtx = new1; 3156: regno_pointer_flag_length = newlen; 3157: } 3158: reg_rtx_no ++; 3159: } 3160: regno_reg_rtx[REGNO (x)] = x; 3161: } 3162: return; 3163: 3164: case MEM: 3165: if (GET_CODE (XEXP (x, 0)) == REG) 3166: mark_reg_pointer (XEXP (x, 0)); 3167: restore_reg_data_1 (XEXP (x, 0)); 3168: return; 3169: } 3170: 3171: /* Now scan the subexpressions recursively. */ 3172: 3173: format_ptr = GET_RTX_FORMAT (code); 3174: 3175: for (i = 0; i < GET_RTX_LENGTH (code); i++) 3176: { 3177: switch (*format_ptr++) 3178: { 3179: case 'e': 3180: restore_reg_data_1 (XEXP (x, i)); 3181: break; 3182: 3183: case 'E': 3184: if (XVEC (x, i) != NULL) 3185: { 3186: register int j; 3187: 3188: for (j = 0; j < XVECLEN (x, i); j++) 3189: restore_reg_data_1 (XVECEXP (x, i, j)); 3190: } 3191: break; 3192: } 3193: } 3194: } 3195: 3196: /* Initialize data structures and variables in this file 3197: before generating rtl for each function. */ 3198: 3199: void 3200: init_emit () 3201: { 3202: int i; 3203: 3204: first_insn = NULL; 3205: last_insn = NULL; 1.1.1.6 root 3206: sequence_rtl_expr = NULL; 1.1 root 3207: cur_insn_uid = 1; 3208: reg_rtx_no = LAST_VIRTUAL_REGISTER + 1; 3209: last_linenum = 0; 3210: last_filename = 0; 3211: first_label_num = label_num; 3212: last_label_num = 0; 1.1.1.5 root 3213: sequence_stack = NULL; 1.1 root 3214: 3215: /* Clear the start_sequence/gen_sequence cache. */ 3216: sequence_element_free_list = 0; 3217: for (i = 0; i < SEQUENCE_RESULT_SIZE; i++) 3218: sequence_result[i] = 0; 3219: 3220: /* Init the tables that describe all the pseudo regs. */ 3221: 3222: regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; 3223: 3224: regno_pointer_flag 3225: = (char *) oballoc (regno_pointer_flag_length); 3226: bzero (regno_pointer_flag, regno_pointer_flag_length); 3227: 3228: regno_reg_rtx 3229: = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); 1.1.1.7 ! root 3230: bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); 1.1 root 3231: 3232: /* Put copies of all the virtual register rtx into regno_reg_rtx. */ 3233: regno_reg_rtx[VIRTUAL_INCOMING_ARGS_REGNUM] = virtual_incoming_args_rtx; 3234: regno_reg_rtx[VIRTUAL_STACK_VARS_REGNUM] = virtual_stack_vars_rtx; 3235: regno_reg_rtx[VIRTUAL_STACK_DYNAMIC_REGNUM] = virtual_stack_dynamic_rtx; 3236: regno_reg_rtx[VIRTUAL_OUTGOING_ARGS_REGNUM] = virtual_outgoing_args_rtx; 1.1.1.4 root 3237: 3238: /* Indicate that the virtual registers and stack locations are 3239: all pointers. */ 3240: REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1; 3241: REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1; 3242: REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1; 3243: 3244: REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1; 3245: REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1; 3246: REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1; 3247: REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1; 1.1.1.5 root 3248: 3249: #ifdef INIT_EXPANDERS 3250: INIT_EXPANDERS; 3251: #endif 1.1 root 3252: } 3253: 3254: /* Create some permanent unique rtl objects shared between all functions. 3255: LINE_NUMBERS is nonzero if line numbers are to be generated. */ 3256: 3257: void 3258: init_emit_once (line_numbers) 3259: int line_numbers; 3260: { 3261: int i; 3262: enum machine_mode mode; 3263: 3264: no_line_numbers = ! line_numbers; 3265: 3266: sequence_stack = NULL; 3267: 1.1.1.6 root 3268: /* Compute the word and byte modes. */ 3269: 3270: byte_mode = VOIDmode; 3271: word_mode = VOIDmode; 3272: 3273: for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; 3274: mode = GET_MODE_WIDER_MODE (mode)) 3275: { 3276: if (GET_MODE_BITSIZE (mode) == BITS_PER_UNIT 3277: && byte_mode == VOIDmode) 3278: byte_mode = mode; 3279: 3280: if (GET_MODE_BITSIZE (mode) == BITS_PER_WORD 3281: && word_mode == VOIDmode) 3282: word_mode = mode; 3283: } 3284: 1.1 root 3285: /* Create the unique rtx's for certain rtx codes and operand values. */ 3286: 3287: pc_rtx = gen_rtx (PC, VOIDmode); 3288: cc0_rtx = gen_rtx (CC0, VOIDmode); 3289: 3290: /* Don't use gen_rtx here since gen_rtx in this case 3291: tries to use these variables. */ 3292: for (i = - MAX_SAVED_CONST_INT; i <= MAX_SAVED_CONST_INT; i++) 3293: { 3294: const_int_rtx[i + MAX_SAVED_CONST_INT] = rtx_alloc (CONST_INT); 3295: PUT_MODE (const_int_rtx[i + MAX_SAVED_CONST_INT], VOIDmode); 3296: INTVAL (const_int_rtx[i + MAX_SAVED_CONST_INT]) = i; 3297: } 3298: 3299: /* These four calls obtain some of the rtx expressions made above. */ 1.1.1.4 root 3300: const0_rtx = GEN_INT (0); 3301: const1_rtx = GEN_INT (1); 3302: const2_rtx = GEN_INT (2); 3303: constm1_rtx = GEN_INT (-1); 1.1 root 3304: 3305: /* This will usually be one of the above constants, but may be a new rtx. */ 1.1.1.4 root 3306: const_true_rtx = GEN_INT (STORE_FLAG_VALUE); 1.1 root 3307: 1.1.1.5 root 3308: dconst0 = REAL_VALUE_ATOF ("0", DFmode); 3309: dconst1 = REAL_VALUE_ATOF ("1", DFmode); 3310: dconst2 = REAL_VALUE_ATOF ("2", DFmode); 3311: dconstm1 = REAL_VALUE_ATOF ("-1", DFmode); 1.1 root 3312: 3313: for (i = 0; i <= 2; i++) 3314: { 3315: for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; 3316: mode = GET_MODE_WIDER_MODE (mode)) 3317: { 3318: rtx tem = rtx_alloc (CONST_DOUBLE); 3319: union real_extract u; 3320: 1.1.1.7 ! root 3321: bzero ((char *) &u, sizeof u); /* Zero any holes in a structure. */ 1.1 root 3322: u.d = i == 0 ? dconst0 : i == 1 ? dconst1 : dconst2; 3323: 1.1.1.7 ! root 3324: bcopy ((char *) &u, (char *) &CONST_DOUBLE_LOW (tem), sizeof u); 1.1 root 3325: CONST_DOUBLE_MEM (tem) = cc0_rtx; 3326: PUT_MODE (tem, mode); 3327: 3328: const_tiny_rtx[i][(int) mode] = tem; 3329: } 3330: 1.1.1.4 root 3331: const_tiny_rtx[i][(int) VOIDmode] = GEN_INT (i); 1.1 root 3332: 3333: for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode; 3334: mode = GET_MODE_WIDER_MODE (mode)) 1.1.1.4 root 3335: const_tiny_rtx[i][(int) mode] = GEN_INT (i); 1.1.1.5 root 3336: 3337: for (mode = GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT); 3338: mode != VOIDmode; 3339: mode = GET_MODE_WIDER_MODE (mode)) 3340: const_tiny_rtx[i][(int) mode] = GEN_INT (i); 1.1 root 3341: } 3342: 1.1.1.4 root 3343: for (mode = GET_CLASS_NARROWEST_MODE (MODE_CC); mode != VOIDmode; 3344: mode = GET_MODE_WIDER_MODE (mode)) 3345: const_tiny_rtx[0][(int) mode] = const0_rtx; 3346: 1.1 root 3347: stack_pointer_rtx = gen_rtx (REG, Pmode, STACK_POINTER_REGNUM); 3348: frame_pointer_rtx = gen_rtx (REG, Pmode, FRAME_POINTER_REGNUM); 3349: 1.1.1.6 root 3350: if (HARD_FRAME_POINTER_REGNUM == FRAME_POINTER_REGNUM) 3351: hard_frame_pointer_rtx = frame_pointer_rtx; 3352: else 3353: hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM); 3354: 1.1 root 3355: if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) 3356: arg_pointer_rtx = frame_pointer_rtx; 1.1.1.6 root 3357: else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) 3358: arg_pointer_rtx = hard_frame_pointer_rtx; 1.1 root 3359: else if (STACK_POINTER_REGNUM == ARG_POINTER_REGNUM) 3360: arg_pointer_rtx = stack_pointer_rtx; 3361: else 3362: arg_pointer_rtx = gen_rtx (REG, Pmode, ARG_POINTER_REGNUM); 3363: 3364: /* Create the virtual registers. Do so here since the following objects 3365: might reference them. */ 3366: 3367: virtual_incoming_args_rtx = gen_rtx (REG, Pmode, 3368: VIRTUAL_INCOMING_ARGS_REGNUM); 3369: virtual_stack_vars_rtx = gen_rtx (REG, Pmode, 3370: VIRTUAL_STACK_VARS_REGNUM); 3371: virtual_stack_dynamic_rtx = gen_rtx (REG, Pmode, 3372: VIRTUAL_STACK_DYNAMIC_REGNUM); 3373: virtual_outgoing_args_rtx = gen_rtx (REG, Pmode, 3374: VIRTUAL_OUTGOING_ARGS_REGNUM); 3375: 3376: #ifdef STRUCT_VALUE 3377: struct_value_rtx = STRUCT_VALUE; 3378: #else 3379: struct_value_rtx = gen_rtx (REG, Pmode, STRUCT_VALUE_REGNUM); 3380: #endif 3381: 3382: #ifdef STRUCT_VALUE_INCOMING 3383: struct_value_incoming_rtx = STRUCT_VALUE_INCOMING; 3384: #else 3385: #ifdef STRUCT_VALUE_INCOMING_REGNUM 3386: struct_value_incoming_rtx 3387: = gen_rtx (REG, Pmode, STRUCT_VALUE_INCOMING_REGNUM); 3388: #else 3389: struct_value_incoming_rtx = struct_value_rtx; 3390: #endif 3391: #endif 3392: 3393: #ifdef STATIC_CHAIN_REGNUM 3394: static_chain_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_REGNUM); 3395: 3396: #ifdef STATIC_CHAIN_INCOMING_REGNUM 3397: if (STATIC_CHAIN_INCOMING_REGNUM != STATIC_CHAIN_REGNUM) 3398: static_chain_incoming_rtx = gen_rtx (REG, Pmode, STATIC_CHAIN_INCOMING_REGNUM); 3399: else 3400: #endif 3401: static_chain_incoming_rtx = static_chain_rtx; 3402: #endif 3403: 3404: #ifdef STATIC_CHAIN 3405: static_chain_rtx = STATIC_CHAIN; 3406: 3407: #ifdef STATIC_CHAIN_INCOMING 3408: static_chain_incoming_rtx = STATIC_CHAIN_INCOMING; 3409: #else 3410: static_chain_incoming_rtx = static_chain_rtx; 3411: #endif 3412: #endif 3413: 3414: #ifdef PIC_OFFSET_TABLE_REGNUM 3415: pic_offset_table_rtx = gen_rtx (REG, Pmode, PIC_OFFSET_TABLE_REGNUM); 3416: #endif 3417: }
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