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1.1 root 1: /* Definitions for code generation pass of GNU compiler.
2: Copyright (C) 1987 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is distributed in the hope that it will be useful,
7: but WITHOUT ANY WARRANTY. No author or distributor
8: accepts responsibility to anyone for the consequences of using it
9: or for whether it serves any particular purpose or works at all,
10: unless he says so in writing. Refer to the GNU CC General Public
11: License for full details.
12:
13: Everyone is granted permission to copy, modify and redistribute
14: GNU CC, but only under the conditions described in the
15: GNU CC General Public License. A copy of this license is
16: supposed to have been given to you along with GNU CC so you
17: can know your rights and responsibilities. It should be in a
18: file named COPYING. Among other things, the copyright notice
19: and this notice must be preserved on all copies. */
20:
21:
22: /* Macros to access the slots of a QUEUED rtx.
23: Here rather than in rtl.h because only the expansion pass
24: should ever encounter a QUEUED. */
25:
26: /* The variable for which an increment is queued. */
27: #define QUEUED_VAR(P) FORMAT_e (P, 0)
28: /* If the increment has been emitted, this is the insn
29: that does the increment. It is zero before the increment is emitted. */
30: #define QUEUED_INSN(P) FORMAT_e (P, 1)
31: /* If a pre-increment copy has been generated, this is the copy
32: (it is a temporary reg). Zero if no copy made yet. */
33: #define QUEUED_COPY(P) FORMAT_e (P, 2)
34: /* This is the body to use for the insn to do the increment.
35: It is used to emit the increment. */
36: #define QUEUED_BODY(P) FORMAT_e (P, 3)
37: /* Next QUEUED in the queue. */
38: #define QUEUED_NEXT(P) FORMAT_e (P, 4)
39:
40: /* If this is nonzero, we do not bother generating VOLATILE
41: around volatile memory references, and we are willing to
42: output indirect addresses. If cse is to follow, we reject
43: indirect addresses so a useful potential cse is generated;
44: if it is used only once, instruction combination will produce
45: the same indirect address eventually. */
46: extern int cse_not_expected;
47:
48: /* Optabs are tables saying how to generate insn bodies
49: for various machine modes and numbers of operands.
50: Each optab applies to one operation.
51: For example, add_optab applies to addition.
52:
53: The insn_code slot is the enum insn_code that says how to
54: generate an insn for this operation on a particular machine mode.
55: It is CODE_FOR_nothing if there is no such insn on the target machine.
56:
57: The `lib_call' slot is the name of the library function that
58: can be used to perform the operation.
59:
60: A few optabs, such as move_optab and cmp_optab, are used
61: by special code. */
62:
63: /* Everything that uses expr.h needs to define enum insn_code
64: but we don't list it in the Makefile dependencies just for that. */
65: #include "insn-codes.h"
66:
67: typedef struct optab
68: {
69: enum insn_code insn_code;
70: char *lib_call;
71: } optab [NUM_MACHINE_MODES];
72:
73: /* Given an enum insn_code, access the function to construct
74: the body of that kind of insn. */
75: #define GEN_FCN(CODE) (*insn_gen_function[(int) (CODE)])
76: extern rtx (*insn_gen_function[]) ();
77:
78: extern optab add_optab;
79: extern optab sub_optab;
80: extern optab smul_optab; /* Signed multiply */
81: extern optab umul_optab; /* Unsigned multiply */
82: extern optab smul_widen_optab; /* Signed multiply with result
83: one machine mode wider than args */
84: extern optab umul_widen_optab;
85: extern optab sdiv_optab; /* Signed divide */
86: extern optab sdivmod_optab; /* Signed divide-and-remainder in one */
87: extern optab udiv_optab;
88: extern optab udivmod_optab;
89: extern optab smod_optab; /* Signed remainder */
90: extern optab umod_optab;
91: extern optab flodiv_optab; /* Optab for floating divide. */
92: extern optab and_optab; /* Logical and */
93: extern optab andcb_optab; /* Logical and with complement of 2nd arg */
94: extern optab ior_optab; /* Logical or */
95: extern optab xor_optab; /* Logical xor */
96: extern optab ashl_optab; /* Arithmetic shift left */
97: extern optab ashr_optab; /* Arithmetic shift right */
98: extern optab lshl_optab; /* Logical shift left */
99: extern optab lshr_optab; /* Logical shift right */
100: extern optab rotl_optab; /* Rotate left */
101: extern optab rotr_optab; /* Rotate right */
102:
103: extern optab mov_optab; /* Move instruction. */
104: extern optab movstrict_optab; /* Move, preserving high part of register. */
105:
106: extern optab cmp_optab; /* Compare insn; two operands. */
107: extern optab tst_optab; /* tst insn; compare one operand against 0 */
108:
109: /* Unary operations */
110: extern optab neg_optab; /* Negation */
111: extern optab abs_optab; /* Abs value */
112: extern optab one_cmpl_optab; /* Bitwise not */
113:
114: /* Passed to expand_binop and expand_unop to say which options to try to use
115: if the requested operation can't be open-coded on the requisite mode.
116: Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using a library call.
117: Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try using a wider mode. */
118:
119: enum optab_methods
120: {
121: OPTAB_DIRECT,
122: OPTAB_LIB,
123: OPTAB_WIDEN,
124: OPTAB_LIB_WIDEN,
125: };
126:
127: /* Nonzero means load memory operands into registers before doing
128: arithmetic on them. Gives better cse but slower compilation. */
129:
130: extern int force_mem;
131:
132: /* Nonzero for -optforceaddr: load memory address into a register
133: before reference to it. This makes better cse but slower compilation. */
134:
135: extern int force_addr;
136:
137: typedef rtx (*rtxfun) ();
138:
139: /* Expand a binary operation given optab and rtx operands. */
140: rtx expand_binop ();
141:
142: /* Expand a unary arithmetic operation given optab rtx operand. */
143: rtx expand_unop ();
144:
145: /* Initialize the tables that control conversion between fixed and
146: floating values. */
147: void init_fixtab ();
148: void init_floattab ();
149:
150: /* Say whether a certain floating machine mode can be converted to a certain
151: fixed machine mode. */
152: rtxfun can_fix_p ();
153: /* Similar for converting a fixed machine mode to a floating one. */
154: rtxfun can_float_p ();
155:
156: /* Generate code for a FIX_EXPR. */
157: void expand_fix ();
158:
159: /* Generate code for a FLOAT_EXPR. */
160: void expand_float ();
161:
162: /* Create but don't emit one rtl instruction to add one rtx into another.
163: Modes must match.
164: Likewise for subtraction and for just copying.
165: These do not call protect_from_queue; caller must do so. */
166: rtx gen_add2_insn ();
167: rtx gen_sub2_insn ();
168: rtx gen_move_insn ();
169:
170: /* Emit one rtl instruction to store zero in specified rtx. */
171: void emit_clr_insn ();
172:
173: /* Emit one rtl insn to store 1 in specified rtx assuming it contains 0. */
174: void emit_0_to_1_insn ();
175:
176: /* Emit one rtl insn to compare two rtx's. */
177: void emit_cmp_insn ();
178:
179: /* Emit some rtl insns to move data between rtx's, converting machine modes.
180: Both modes must be floating or both fixed. */
181: void convert_move ();
182:
183: /* Convert an rtx to specified machine mode and return the result. */
184: rtx convert_to_mode ();
185:
186: /* Emit code to push some arguments and call a library routine,
187: storing the value in a specified place. Calling sequence is
188: complicated. */
189: void emit_library_call ();
190:
191: /* Given an rtx that may include add and multiply operations,
192: generate them as insns and return a pseudo-reg containing the value.
193: Useful after calling expand_expr with 1 as sum_ok. */
194: rtx force_operand ();
195:
196: /* Return an rtx for the size in bytes of the value of an expr. */
197: rtx expr_size ();
198:
199: /* Return an rtx for the sum of an rtx and an integer. */
200: rtx plus_constant ();
201:
202: rtx lookup_static_chain ();
203:
204: /* Return an rtx like arg but sans any constant terms.
205: Returns the original rtx if it has no constant terms.
206: The constant terms are added and stored via a second arg. */
207: rtx eliminate_constant_term ();
208:
209: /* Convert arg to a valid memory address for specified machine mode,
210: by emitting insns to perform arithmetic if nec. */
211: rtx memory_address ();
212:
213: rtx low_half ();
214: rtx high_half ();
215:
216: /* Return 1 if two rtx's are equivalent in structure and elements. */
217: int rtx_equal_p ();
218:
219: /* Given rtx, return new rtx whose address won't be affected by
220: any side effects. It has been copied to a new temporary reg. */
221: rtx stabilize ();
222:
223: /* Given an rtx, copy all regs it refers to into new temps
224: and return a modified copy that refers to the new temps. */
225: rtx copy_all_regs ();
226:
227: /* Copy given rtx to a new temp reg and return that. */
228: rtx copy_to_reg ();
229:
230: /* Copy given rtx to given temp reg and return that. */
231: rtx copy_to_suggested_reg ();
232:
233: /* Return given rtx, copied into a new temp reg if it was in memory. */
234: rtx force_not_mem ();
235:
236: /* Remove some bytes from the stack. An rtx says how many. */
237: void adjust_stack ();
238:
239: /* Add some bytes to the stack. An rtx says how many. */
240: void anti_adjust_stack ();
241:
242: /* Emit code to copy function value to a new temp reg and return that reg. */
243: rtx function_value ();
244:
245: /* Return an rtx that refers to the value returned by a function
246: in its original home. This becomes invalid if any more code is emitted. */
247: rtx hard_function_value ();
248:
249: /* Emit code to copy function value to a specified place. */
250: void copy_function_value ();
251:
252: rtx store_bit_field ();
253: rtx store_fixed_bit_field ();
254: rtx extract_bit_field ();
255: rtx extract_fixed_bit_field ();
256: rtx expand_shift ();
257: rtx expand_bit_and ();
258: rtx expand_mult ();
259: rtx expand_divmod ();
260: rtx get_structure_value_addr ();
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