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1.1 root 1: /* Definitions for code generation pass of GNU compiler.
2: Copyright (C) 1987 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is distributed in the hope that it will be useful,
7: but WITHOUT ANY WARRANTY. No author or distributor
8: accepts responsibility to anyone for the consequences of using it
9: or for whether it serves any particular purpose or works at all,
10: unless he says so in writing. Refer to the GNU CC General Public
11: License for full details.
12:
13: Everyone is granted permission to copy, modify and redistribute
14: GNU CC, but only under the conditions described in the
15: GNU CC General Public License. A copy of this license is
16: supposed to have been given to you along with GNU CC so you
17: can know your rights and responsibilities. It should be in a
18: file named COPYING. Among other things, the copyright notice
19: and this notice must be preserved on all copies. */
20:
21:
22: /* Macros to access the slots of a QUEUED rtx.
23: Here rather than in rtl.h because only the expansion pass
24: should ever encounter a QUEUED. */
25:
26: /* The variable for which an increment is queued. */
1.1.1.2 root 27: #define QUEUED_VAR(P) XEXP (P, 0)
1.1 root 28: /* If the increment has been emitted, this is the insn
29: that does the increment. It is zero before the increment is emitted. */
1.1.1.2 root 30: #define QUEUED_INSN(P) XEXP (P, 1)
1.1 root 31: /* If a pre-increment copy has been generated, this is the copy
32: (it is a temporary reg). Zero if no copy made yet. */
1.1.1.2 root 33: #define QUEUED_COPY(P) XEXP (P, 2)
1.1 root 34: /* This is the body to use for the insn to do the increment.
35: It is used to emit the increment. */
1.1.1.2 root 36: #define QUEUED_BODY(P) XEXP (P, 3)
1.1 root 37: /* Next QUEUED in the queue. */
1.1.1.2 root 38: #define QUEUED_NEXT(P) XEXP (P, 4)
39:
40: /* This is the 4th arg to `expand_expr'.
41: EXPAND_SUM means it is ok to return a PLUS rtx or MULT rtx.
42: EXPND_CONST_ADDRESS means it is ok to return a MEM whose address
43: is a constant that is not a legitimate address. */
44: enum expand_modifier {EXPAND_NORMAL, EXPAND_SUM, EXPAND_CONST_ADDRESS};
1.1 root 45:
46: /* If this is nonzero, we do not bother generating VOLATILE
47: around volatile memory references, and we are willing to
48: output indirect addresses. If cse is to follow, we reject
49: indirect addresses so a useful potential cse is generated;
50: if it is used only once, instruction combination will produce
51: the same indirect address eventually. */
52: extern int cse_not_expected;
53:
1.1.1.4 root 54: /* List (chain of EXPR_LISTs) of pseudo-regs of SAVE_EXPRs.
55: So we can mark them all live at the end of the function, if stupid. */
56: extern rtx save_expr_regs;
1.1.1.5 root 57:
1.1.1.2 root 58: #ifdef TREE_CODE /* Don't lose if tree.h not included. */
59: /* Structure to record the size of a sequence of arguments
60: as the sum of a tree-expression and a constant. */
61:
62: struct args_size
63: {
64: int constant;
65: tree var;
66: };
67: #endif
68:
69: /* Add the value of the tree INC to the `struct args_size' TO. */
70:
71: #define ADD_PARM_SIZE(TO, INC) \
72: { tree inc = (INC); \
73: if (TREE_CODE (inc) == INTEGER_CST) \
74: (TO).constant += TREE_INT_CST_LOW (inc); \
75: else if ((TO).var == 0) \
76: (TO).var = inc; \
77: else \
78: (TO).var = genop (PLUS_EXPR, (TO).var, inc); }
79:
1.1.1.5 root 80: #define SUB_PARM_SIZE(TO, DEC) \
81: { tree dec = (DEC); \
82: if (TREE_CODE (dec) == INTEGER_CST) \
83: (TO).constant -= TREE_INT_CST_LOW (dec); \
84: else if ((TO).var == 0) \
85: (TO).var = genop (MINUS_EXPR, integer_zero_node, dec); \
86: else \
87: (TO).var = genop (MINUS_EXPR, (TO).var, dec); }
88:
1.1.1.2 root 89: /* Convert the implicit sum in a `struct args_size' into an rtx. */
90: #define ARGS_SIZE_RTX(SIZE) \
91: ((SIZE).var == 0 ? gen_rtx (CONST_INT, VOIDmode, (SIZE).constant) \
92: : plus_constant (expand_expr ((SIZE).var, 0, VOIDmode, 0), \
93: (SIZE).constant))
1.1.1.5 root 94:
95: /* Supply a default definition for FUNCTION_ARG_PADDING:
96: usually pad upward, but pad short args downward on big-endian machines. */
97:
98: enum direction {none, upward, downward}; /* Value has this type. */
99:
100: #ifndef FUNCTION_ARG_PADDING
101: #ifdef BYTES_BIG_ENDIAN
102: #define FUNCTION_ARG_PADDING(mode, size) \
103: (((mode) == BLKmode \
104: ? (GET_CODE (size) == CONST_INT \
105: && INTVAL (size) < PARM_BOUNDARY / BITS_PER_UNIT) \
106: : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) \
107: ? downward : upward)
108: #else
109: #define FUNCTION_ARG_PADDING(mode, size) upward
110: #endif
111: #endif
1.1.1.2 root 112:
1.1 root 113: /* Optabs are tables saying how to generate insn bodies
114: for various machine modes and numbers of operands.
115: Each optab applies to one operation.
116: For example, add_optab applies to addition.
117:
118: The insn_code slot is the enum insn_code that says how to
119: generate an insn for this operation on a particular machine mode.
120: It is CODE_FOR_nothing if there is no such insn on the target machine.
121:
122: The `lib_call' slot is the name of the library function that
123: can be used to perform the operation.
124:
125: A few optabs, such as move_optab and cmp_optab, are used
126: by special code. */
127:
128: /* Everything that uses expr.h needs to define enum insn_code
129: but we don't list it in the Makefile dependencies just for that. */
130: #include "insn-codes.h"
131:
132: typedef struct optab
133: {
1.1.1.2 root 134: enum rtx_code code;
135: struct {
136: enum insn_code insn_code;
137: char *lib_call;
138: } handlers [NUM_MACHINE_MODES];
139: } * optab;
1.1 root 140:
141: /* Given an enum insn_code, access the function to construct
142: the body of that kind of insn. */
143: #define GEN_FCN(CODE) (*insn_gen_function[(int) (CODE)])
144: extern rtx (*insn_gen_function[]) ();
145:
146: extern optab add_optab;
147: extern optab sub_optab;
148: extern optab smul_optab; /* Signed multiply */
149: extern optab umul_optab; /* Unsigned multiply */
150: extern optab smul_widen_optab; /* Signed multiply with result
151: one machine mode wider than args */
152: extern optab umul_widen_optab;
153: extern optab sdiv_optab; /* Signed divide */
154: extern optab sdivmod_optab; /* Signed divide-and-remainder in one */
155: extern optab udiv_optab;
156: extern optab udivmod_optab;
157: extern optab smod_optab; /* Signed remainder */
158: extern optab umod_optab;
159: extern optab flodiv_optab; /* Optab for floating divide. */
1.1.1.2 root 160: extern optab ftrunc_optab; /* Convert float to integer in float fmt */
1.1 root 161: extern optab and_optab; /* Logical and */
162: extern optab andcb_optab; /* Logical and with complement of 2nd arg */
163: extern optab ior_optab; /* Logical or */
164: extern optab xor_optab; /* Logical xor */
165: extern optab ashl_optab; /* Arithmetic shift left */
166: extern optab ashr_optab; /* Arithmetic shift right */
167: extern optab lshl_optab; /* Logical shift left */
168: extern optab lshr_optab; /* Logical shift right */
169: extern optab rotl_optab; /* Rotate left */
170: extern optab rotr_optab; /* Rotate right */
171:
172: extern optab mov_optab; /* Move instruction. */
173: extern optab movstrict_optab; /* Move, preserving high part of register. */
174:
175: extern optab cmp_optab; /* Compare insn; two operands. */
176: extern optab tst_optab; /* tst insn; compare one operand against 0 */
177:
178: /* Unary operations */
179: extern optab neg_optab; /* Negation */
180: extern optab abs_optab; /* Abs value */
181: extern optab one_cmpl_optab; /* Bitwise not */
1.1.1.2 root 182: extern optab ffs_optab; /* Find first bit set */
1.1 root 183:
184: /* Passed to expand_binop and expand_unop to say which options to try to use
185: if the requested operation can't be open-coded on the requisite mode.
186: Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using a library call.
187: Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try using a wider mode. */
188:
189: enum optab_methods
190: {
191: OPTAB_DIRECT,
192: OPTAB_LIB,
193: OPTAB_WIDEN,
194: OPTAB_LIB_WIDEN,
195: };
196:
197: typedef rtx (*rtxfun) ();
198:
1.1.1.7 ! root 199: /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
! 200: gives the gen_function to make a branch to test that condition. */
! 201:
! 202: extern rtxfun bcc_gen_fctn[NUM_RTX_CODE];
! 203:
! 204: /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
! 205: gives the gen_function to make a store-condition insn
! 206: to test that condition. */
! 207:
! 208: extern rtxfun setcc_gen_fctn[NUM_RTX_CODE];
! 209:
1.1 root 210: /* Expand a binary operation given optab and rtx operands. */
211: rtx expand_binop ();
212:
213: /* Expand a unary arithmetic operation given optab rtx operand. */
214: rtx expand_unop ();
215:
1.1.1.6 root 216: /* Arguments MODE, RTX: return an rtx for the negation of that value.
217: May emit insns. */
218: rtx negate_rtx ();
219:
1.1 root 220: /* Initialize the tables that control conversion between fixed and
221: floating values. */
222: void init_fixtab ();
223: void init_floattab ();
224:
225: /* Generate code for a FIX_EXPR. */
226: void expand_fix ();
227:
228: /* Generate code for a FLOAT_EXPR. */
229: void expand_float ();
230:
231: /* Create but don't emit one rtl instruction to add one rtx into another.
232: Modes must match.
233: Likewise for subtraction and for just copying.
234: These do not call protect_from_queue; caller must do so. */
235: rtx gen_add2_insn ();
236: rtx gen_sub2_insn ();
237: rtx gen_move_insn ();
238:
239: /* Emit one rtl instruction to store zero in specified rtx. */
240: void emit_clr_insn ();
241:
242: /* Emit one rtl insn to store 1 in specified rtx assuming it contains 0. */
243: void emit_0_to_1_insn ();
244:
245: /* Emit one rtl insn to compare two rtx's. */
246: void emit_cmp_insn ();
247:
248: /* Emit some rtl insns to move data between rtx's, converting machine modes.
249: Both modes must be floating or both fixed. */
250: void convert_move ();
251:
252: /* Convert an rtx to specified machine mode and return the result. */
253: rtx convert_to_mode ();
254:
255: /* Emit code to push some arguments and call a library routine,
256: storing the value in a specified place. Calling sequence is
257: complicated. */
258: void emit_library_call ();
259:
260: /* Given an rtx that may include add and multiply operations,
261: generate them as insns and return a pseudo-reg containing the value.
262: Useful after calling expand_expr with 1 as sum_ok. */
263: rtx force_operand ();
264:
265: /* Return an rtx for the size in bytes of the value of an expr. */
266: rtx expr_size ();
267:
268: /* Return an rtx for the sum of an rtx and an integer. */
269: rtx plus_constant ();
270:
271: rtx lookup_static_chain ();
272:
273: /* Return an rtx like arg but sans any constant terms.
274: Returns the original rtx if it has no constant terms.
275: The constant terms are added and stored via a second arg. */
276: rtx eliminate_constant_term ();
277:
278: /* Convert arg to a valid memory address for specified machine mode,
279: by emitting insns to perform arithmetic if nec. */
280: rtx memory_address ();
281:
1.1.1.3 root 282: /* Like `memory_address' but pretent `flag_force_addr' is 0. */
283: rtx memory_address_noforce ();
284:
1.1.1.2 root 285: /* Return a memory reference like MEMREF, but with its mode changed
286: to MODE and its address changed to ADDR.
287: (VOIDmode means don't change the mode.
288: NULL for ADDR means don't change the address.) */
289: rtx change_address ();
1.1 root 290:
291: /* Return 1 if two rtx's are equivalent in structure and elements. */
292: int rtx_equal_p ();
293:
294: /* Given rtx, return new rtx whose address won't be affected by
295: any side effects. It has been copied to a new temporary reg. */
296: rtx stabilize ();
297:
298: /* Given an rtx, copy all regs it refers to into new temps
299: and return a modified copy that refers to the new temps. */
300: rtx copy_all_regs ();
301:
302: /* Copy given rtx to a new temp reg and return that. */
303: rtx copy_to_reg ();
304:
1.1.1.2 root 305: /* Like copy_to_reg but always make the reg Pmode. */
306: rtx copy_addr_to_reg ();
307:
308: /* Like copy_to_reg but always make the reg the specified mode MODE. */
309: rtx copy_to_mode_reg ();
310:
1.1 root 311: /* Copy given rtx to given temp reg and return that. */
312: rtx copy_to_suggested_reg ();
313:
1.1.1.2 root 314: /* Copy a value to a register if it isn't already a register.
315: Args are mode (in case value is a constant) and the value. */
316: rtx force_reg ();
317:
1.1 root 318: /* Return given rtx, copied into a new temp reg if it was in memory. */
319: rtx force_not_mem ();
320:
321: /* Remove some bytes from the stack. An rtx says how many. */
322: void adjust_stack ();
323:
324: /* Add some bytes to the stack. An rtx says how many. */
325: void anti_adjust_stack ();
326:
327: /* Emit code to copy function value to a new temp reg and return that reg. */
328: rtx function_value ();
329:
330: /* Return an rtx that refers to the value returned by a function
331: in its original home. This becomes invalid if any more code is emitted. */
332: rtx hard_function_value ();
333:
1.1.1.2 root 334: /* Return an rtx that refers to the value returned by a library call
335: in its original home. This becomes invalid if any more code is emitted. */
336: rtx hard_libcall_value ();
337:
1.1 root 338: /* Emit code to copy function value to a specified place. */
339: void copy_function_value ();
340:
1.1.1.2 root 341: /* Given an rtx, return an rtx for a value rounded up to a multiple
342: of STACK_BOUNDARY / BITS_PER_UNIT. */
343: rtx round_push ();
344:
1.1 root 345: rtx store_bit_field ();
346: rtx extract_bit_field ();
347: rtx expand_shift ();
348: rtx expand_bit_and ();
349: rtx expand_mult ();
350: rtx expand_divmod ();
351: rtx get_structure_value_addr ();
1.1.1.2 root 352: rtx expand_stmt_expr ();
353:
354: void jumpifnot ();
355: void jumpif ();
356: void do_jump ();
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