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1.1 root 1: /* Definitions for code generation pass of GNU compiler.
2: Copyright (C) 1987 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
1.1.1.8 ! root 6: GNU CC is free software; you can redistribute it and/or modify
! 7: it under the terms of the GNU General Public License as published by
! 8: the Free Software Foundation; either version 1, or (at your option)
! 9: any later version.
! 10:
1.1 root 11: GNU CC is distributed in the hope that it will be useful,
1.1.1.8 ! root 12: but WITHOUT ANY WARRANTY; without even the implied warranty of
! 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
! 14: GNU General Public License for more details.
! 15:
! 16: You should have received a copy of the GNU General Public License
! 17: along with GNU CC; see the file COPYING. If not, write to
! 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
1.1 root 19:
20:
21: /* Macros to access the slots of a QUEUED rtx.
22: Here rather than in rtl.h because only the expansion pass
23: should ever encounter a QUEUED. */
24:
25: /* The variable for which an increment is queued. */
1.1.1.2 root 26: #define QUEUED_VAR(P) XEXP (P, 0)
1.1 root 27: /* If the increment has been emitted, this is the insn
28: that does the increment. It is zero before the increment is emitted. */
1.1.1.2 root 29: #define QUEUED_INSN(P) XEXP (P, 1)
1.1 root 30: /* If a pre-increment copy has been generated, this is the copy
31: (it is a temporary reg). Zero if no copy made yet. */
1.1.1.2 root 32: #define QUEUED_COPY(P) XEXP (P, 2)
1.1 root 33: /* This is the body to use for the insn to do the increment.
34: It is used to emit the increment. */
1.1.1.2 root 35: #define QUEUED_BODY(P) XEXP (P, 3)
1.1 root 36: /* Next QUEUED in the queue. */
1.1.1.2 root 37: #define QUEUED_NEXT(P) XEXP (P, 4)
38:
39: /* This is the 4th arg to `expand_expr'.
40: EXPAND_SUM means it is ok to return a PLUS rtx or MULT rtx.
41: EXPND_CONST_ADDRESS means it is ok to return a MEM whose address
42: is a constant that is not a legitimate address. */
43: enum expand_modifier {EXPAND_NORMAL, EXPAND_SUM, EXPAND_CONST_ADDRESS};
1.1 root 44:
45: /* If this is nonzero, we do not bother generating VOLATILE
46: around volatile memory references, and we are willing to
47: output indirect addresses. If cse is to follow, we reject
48: indirect addresses so a useful potential cse is generated;
49: if it is used only once, instruction combination will produce
50: the same indirect address eventually. */
51: extern int cse_not_expected;
52:
1.1.1.4 root 53: /* List (chain of EXPR_LISTs) of pseudo-regs of SAVE_EXPRs.
54: So we can mark them all live at the end of the function, if stupid. */
55: extern rtx save_expr_regs;
1.1.1.5 root 56:
1.1.1.2 root 57: #ifdef TREE_CODE /* Don't lose if tree.h not included. */
58: /* Structure to record the size of a sequence of arguments
59: as the sum of a tree-expression and a constant. */
60:
61: struct args_size
62: {
63: int constant;
64: tree var;
65: };
66: #endif
67:
68: /* Add the value of the tree INC to the `struct args_size' TO. */
69:
70: #define ADD_PARM_SIZE(TO, INC) \
71: { tree inc = (INC); \
72: if (TREE_CODE (inc) == INTEGER_CST) \
73: (TO).constant += TREE_INT_CST_LOW (inc); \
74: else if ((TO).var == 0) \
75: (TO).var = inc; \
76: else \
77: (TO).var = genop (PLUS_EXPR, (TO).var, inc); }
78:
1.1.1.5 root 79: #define SUB_PARM_SIZE(TO, DEC) \
80: { tree dec = (DEC); \
81: if (TREE_CODE (dec) == INTEGER_CST) \
82: (TO).constant -= TREE_INT_CST_LOW (dec); \
83: else if ((TO).var == 0) \
84: (TO).var = genop (MINUS_EXPR, integer_zero_node, dec); \
85: else \
86: (TO).var = genop (MINUS_EXPR, (TO).var, dec); }
87:
1.1.1.2 root 88: /* Convert the implicit sum in a `struct args_size' into an rtx. */
89: #define ARGS_SIZE_RTX(SIZE) \
90: ((SIZE).var == 0 ? gen_rtx (CONST_INT, VOIDmode, (SIZE).constant) \
91: : plus_constant (expand_expr ((SIZE).var, 0, VOIDmode, 0), \
92: (SIZE).constant))
1.1.1.5 root 93:
94: /* Supply a default definition for FUNCTION_ARG_PADDING:
95: usually pad upward, but pad short args downward on big-endian machines. */
96:
97: enum direction {none, upward, downward}; /* Value has this type. */
98:
99: #ifndef FUNCTION_ARG_PADDING
100: #ifdef BYTES_BIG_ENDIAN
101: #define FUNCTION_ARG_PADDING(mode, size) \
102: (((mode) == BLKmode \
103: ? (GET_CODE (size) == CONST_INT \
104: && INTVAL (size) < PARM_BOUNDARY / BITS_PER_UNIT) \
105: : GET_MODE_BITSIZE (mode) < PARM_BOUNDARY) \
106: ? downward : upward)
107: #else
108: #define FUNCTION_ARG_PADDING(mode, size) upward
109: #endif
110: #endif
1.1.1.2 root 111:
1.1 root 112: /* Optabs are tables saying how to generate insn bodies
113: for various machine modes and numbers of operands.
114: Each optab applies to one operation.
115: For example, add_optab applies to addition.
116:
117: The insn_code slot is the enum insn_code that says how to
118: generate an insn for this operation on a particular machine mode.
119: It is CODE_FOR_nothing if there is no such insn on the target machine.
120:
121: The `lib_call' slot is the name of the library function that
122: can be used to perform the operation.
123:
124: A few optabs, such as move_optab and cmp_optab, are used
125: by special code. */
126:
127: /* Everything that uses expr.h needs to define enum insn_code
128: but we don't list it in the Makefile dependencies just for that. */
129: #include "insn-codes.h"
130:
131: typedef struct optab
132: {
1.1.1.2 root 133: enum rtx_code code;
134: struct {
135: enum insn_code insn_code;
136: char *lib_call;
137: } handlers [NUM_MACHINE_MODES];
138: } * optab;
1.1 root 139:
140: /* Given an enum insn_code, access the function to construct
141: the body of that kind of insn. */
142: #define GEN_FCN(CODE) (*insn_gen_function[(int) (CODE)])
143: extern rtx (*insn_gen_function[]) ();
144:
145: extern optab add_optab;
146: extern optab sub_optab;
147: extern optab smul_optab; /* Signed multiply */
148: extern optab umul_optab; /* Unsigned multiply */
149: extern optab smul_widen_optab; /* Signed multiply with result
150: one machine mode wider than args */
151: extern optab umul_widen_optab;
152: extern optab sdiv_optab; /* Signed divide */
153: extern optab sdivmod_optab; /* Signed divide-and-remainder in one */
154: extern optab udiv_optab;
155: extern optab udivmod_optab;
156: extern optab smod_optab; /* Signed remainder */
157: extern optab umod_optab;
158: extern optab flodiv_optab; /* Optab for floating divide. */
1.1.1.2 root 159: extern optab ftrunc_optab; /* Convert float to integer in float fmt */
1.1 root 160: extern optab and_optab; /* Logical and */
161: extern optab andcb_optab; /* Logical and with complement of 2nd arg */
162: extern optab ior_optab; /* Logical or */
163: extern optab xor_optab; /* Logical xor */
164: extern optab ashl_optab; /* Arithmetic shift left */
165: extern optab ashr_optab; /* Arithmetic shift right */
166: extern optab lshl_optab; /* Logical shift left */
167: extern optab lshr_optab; /* Logical shift right */
168: extern optab rotl_optab; /* Rotate left */
169: extern optab rotr_optab; /* Rotate right */
170:
171: extern optab mov_optab; /* Move instruction. */
172: extern optab movstrict_optab; /* Move, preserving high part of register. */
173:
174: extern optab cmp_optab; /* Compare insn; two operands. */
175: extern optab tst_optab; /* tst insn; compare one operand against 0 */
176:
177: /* Unary operations */
178: extern optab neg_optab; /* Negation */
179: extern optab abs_optab; /* Abs value */
180: extern optab one_cmpl_optab; /* Bitwise not */
1.1.1.2 root 181: extern optab ffs_optab; /* Find first bit set */
1.1 root 182:
183: /* Passed to expand_binop and expand_unop to say which options to try to use
184: if the requested operation can't be open-coded on the requisite mode.
185: Either OPTAB_LIB or OPTAB_LIB_WIDEN says try using a library call.
186: Either OPTAB_WIDEN or OPTAB_LIB_WIDEN says try using a wider mode. */
187:
188: enum optab_methods
189: {
190: OPTAB_DIRECT,
191: OPTAB_LIB,
192: OPTAB_WIDEN,
193: OPTAB_LIB_WIDEN,
194: };
195:
196: typedef rtx (*rtxfun) ();
197:
1.1.1.7 root 198: /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
199: gives the gen_function to make a branch to test that condition. */
200:
201: extern rtxfun bcc_gen_fctn[NUM_RTX_CODE];
202:
203: /* Indexed by the rtx-code for a conditional (eg. EQ, LT,...)
204: gives the gen_function to make a store-condition insn
205: to test that condition. */
206:
207: extern rtxfun setcc_gen_fctn[NUM_RTX_CODE];
208:
1.1 root 209: /* Expand a binary operation given optab and rtx operands. */
210: rtx expand_binop ();
211:
1.1.1.8 ! root 212: /* Expand a binary operation with both signed and unsigned forms. */
! 213: rtx sign_expand_binop ();
! 214:
1.1 root 215: /* Expand a unary arithmetic operation given optab rtx operand. */
216: rtx expand_unop ();
217:
1.1.1.6 root 218: /* Arguments MODE, RTX: return an rtx for the negation of that value.
219: May emit insns. */
220: rtx negate_rtx ();
221:
1.1 root 222: /* Initialize the tables that control conversion between fixed and
223: floating values. */
224: void init_fixtab ();
225: void init_floattab ();
226:
227: /* Generate code for a FIX_EXPR. */
228: void expand_fix ();
229:
230: /* Generate code for a FLOAT_EXPR. */
231: void expand_float ();
232:
233: /* Create but don't emit one rtl instruction to add one rtx into another.
234: Modes must match.
235: Likewise for subtraction and for just copying.
236: These do not call protect_from_queue; caller must do so. */
237: rtx gen_add2_insn ();
238: rtx gen_sub2_insn ();
239: rtx gen_move_insn ();
240:
241: /* Emit one rtl instruction to store zero in specified rtx. */
242: void emit_clr_insn ();
243:
244: /* Emit one rtl insn to store 1 in specified rtx assuming it contains 0. */
245: void emit_0_to_1_insn ();
246:
247: /* Emit one rtl insn to compare two rtx's. */
248: void emit_cmp_insn ();
249:
250: /* Emit some rtl insns to move data between rtx's, converting machine modes.
251: Both modes must be floating or both fixed. */
252: void convert_move ();
253:
254: /* Convert an rtx to specified machine mode and return the result. */
255: rtx convert_to_mode ();
256:
257: /* Emit code to push some arguments and call a library routine,
258: storing the value in a specified place. Calling sequence is
259: complicated. */
260: void emit_library_call ();
261:
262: /* Given an rtx that may include add and multiply operations,
263: generate them as insns and return a pseudo-reg containing the value.
264: Useful after calling expand_expr with 1 as sum_ok. */
265: rtx force_operand ();
266:
267: /* Return an rtx for the size in bytes of the value of an expr. */
268: rtx expr_size ();
269:
270: /* Return an rtx for the sum of an rtx and an integer. */
271: rtx plus_constant ();
272:
273: rtx lookup_static_chain ();
274:
275: /* Return an rtx like arg but sans any constant terms.
276: Returns the original rtx if it has no constant terms.
277: The constant terms are added and stored via a second arg. */
278: rtx eliminate_constant_term ();
279:
280: /* Convert arg to a valid memory address for specified machine mode,
281: by emitting insns to perform arithmetic if nec. */
282: rtx memory_address ();
283:
1.1.1.3 root 284: /* Like `memory_address' but pretent `flag_force_addr' is 0. */
285: rtx memory_address_noforce ();
286:
1.1.1.2 root 287: /* Return a memory reference like MEMREF, but with its mode changed
288: to MODE and its address changed to ADDR.
289: (VOIDmode means don't change the mode.
290: NULL for ADDR means don't change the address.) */
291: rtx change_address ();
1.1 root 292:
293: /* Return 1 if two rtx's are equivalent in structure and elements. */
294: int rtx_equal_p ();
295:
296: /* Given rtx, return new rtx whose address won't be affected by
297: any side effects. It has been copied to a new temporary reg. */
298: rtx stabilize ();
299:
300: /* Given an rtx, copy all regs it refers to into new temps
301: and return a modified copy that refers to the new temps. */
302: rtx copy_all_regs ();
303:
304: /* Copy given rtx to a new temp reg and return that. */
305: rtx copy_to_reg ();
306:
1.1.1.2 root 307: /* Like copy_to_reg but always make the reg Pmode. */
308: rtx copy_addr_to_reg ();
309:
310: /* Like copy_to_reg but always make the reg the specified mode MODE. */
311: rtx copy_to_mode_reg ();
312:
1.1 root 313: /* Copy given rtx to given temp reg and return that. */
314: rtx copy_to_suggested_reg ();
315:
1.1.1.2 root 316: /* Copy a value to a register if it isn't already a register.
317: Args are mode (in case value is a constant) and the value. */
318: rtx force_reg ();
319:
1.1 root 320: /* Return given rtx, copied into a new temp reg if it was in memory. */
321: rtx force_not_mem ();
322:
323: /* Remove some bytes from the stack. An rtx says how many. */
324: void adjust_stack ();
325:
326: /* Add some bytes to the stack. An rtx says how many. */
327: void anti_adjust_stack ();
328:
329: /* Emit code to copy function value to a new temp reg and return that reg. */
330: rtx function_value ();
331:
332: /* Return an rtx that refers to the value returned by a function
333: in its original home. This becomes invalid if any more code is emitted. */
334: rtx hard_function_value ();
335:
1.1.1.2 root 336: /* Return an rtx that refers to the value returned by a library call
337: in its original home. This becomes invalid if any more code is emitted. */
338: rtx hard_libcall_value ();
339:
1.1 root 340: /* Emit code to copy function value to a specified place. */
341: void copy_function_value ();
342:
1.1.1.2 root 343: /* Given an rtx, return an rtx for a value rounded up to a multiple
344: of STACK_BOUNDARY / BITS_PER_UNIT. */
345: rtx round_push ();
346:
1.1 root 347: rtx store_bit_field ();
348: rtx extract_bit_field ();
349: rtx expand_shift ();
350: rtx expand_bit_and ();
351: rtx expand_mult ();
352: rtx expand_divmod ();
353: rtx get_structure_value_addr ();
1.1.1.2 root 354: rtx expand_stmt_expr ();
355:
356: void jumpifnot ();
357: void jumpif ();
358: void do_jump ();
1.1.1.8 ! root 359:
! 360: rtx assemble_static_space ();
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