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1.1 root 1: /* Data flow analysis for GNU compiler.
1.1.1.2 root 2: Copyright (C) 1987, 1988 Free Software Foundation, Inc.
1.1 root 3:
4: This file is part of GNU CC.
5:
6: GNU CC is distributed in the hope that it will be useful,
7: but WITHOUT ANY WARRANTY. No author or distributor
8: accepts responsibility to anyone for the consequences of using it
9: or for whether it serves any particular purpose or works at all,
10: unless he says so in writing. Refer to the GNU CC General Public
11: License for full details.
12:
13: Everyone is granted permission to copy, modify and redistribute
14: GNU CC, but only under the conditions described in the
15: GNU CC General Public License. A copy of this license is
16: supposed to have been given to you along with GNU CC so you
17: can know your rights and responsibilities. It should be in a
18: file named COPYING. Among other things, the copyright notice
19: and this notice must be preserved on all copies. */
20:
21:
22: /* This file contains the data flow analysis pass of the compiler.
23: It computes data flow information
24: which tells combine_instructions which insns to consider combining
25: and controls register allocation.
26:
27: Additional data flow information that is too bulky to record
28: is generated during the analysis, and is used at that time to
29: create autoincrement and autodecrement addressing.
30:
31: The first step is dividing the function into basic blocks.
32: find_basic_blocks does this. Then life_analysis determines
33: where each register is live and where it is dead.
34:
35: ** find_basic_blocks **
36:
37: find_basic_blocks divides the current function's rtl
38: into basic blocks. It records the beginnings and ends of the
39: basic blocks in the vectors basic_block_head and basic_block_end,
40: and the number of blocks in n_basic_blocks.
41:
42: find_basic_blocks also finds any unreachable loops
43: and deletes them.
44:
45: ** life_analysis **
46:
47: life_analysis is called immediately after find_basic_blocks.
48: It uses the basic block information to determine where each
49: hard or pseudo register is live.
50:
51: ** live-register info **
52:
53: The information about where each register is live is in two parts:
54: the REG_NOTES of insns, and the vector basic_block_live_at_start.
55:
56: basic_block_live_at_start has an element for each basic block,
57: and the element is a bit-vector with a bit for each hard or pseudo
58: register. The bit is 1 if the register is live at the beginning
59: of the basic block.
60:
61: To each insn's REG_NOTES is added an element for each register
62: that is live before the insn or set by the insn, but is dead
63: after the insn.
64:
65: To determine which registers are live after any insn, one can
66: start from the beginning of the basic block and scan insns, noting
67: which registers are set by each insn and which die there.
68:
69: ** Other actions of life_analysis **
70:
71: life_analysis sets up the LOG_LINKS fields of insns because the
72: information needed to do so is readily available.
73:
74: life_analysis deletes insns whose only effect is to store a value
75: that is never used.
76:
77: life_analysis notices cases where a reference to a register as
78: a memory address can be combined with a preceding or following
79: incrementation or decrementation of the register. The separate
80: instruction to increment or decrement is deleted and the address
81: is changed to a POST_INC or similar rtx.
82:
83: Each time an incrementing or decrementing address is created,
84: a REG_INC element is added to the insn's REG_NOTES list.
85:
86: life_analysis fills in certain vectors containing information about
87: register usage: reg_n_refs, reg_n_deaths, reg_n_sets,
88: reg_live_length, reg_crosses_call and reg_basic_block. */
89:
90: #include <stdio.h>
91: #include "config.h"
92: #include "rtl.h"
93: #include "basic-block.h"
94: #include "regs.h"
1.1.1.2 root 95: #include "hard-reg-set.h"
96: #include "flags.h"
1.1 root 97:
98: /* Get the basic block number of an insn.
99: This info should not be expected to remain available
100: after the end of life_analysis. */
101:
102: #define BLOCK_NUM(INSN) uid_block_number[INSN_UID (INSN)]
103:
104: /* This is where the BLOCK_NUM values are really stored.
105: This is set up by find_basic_blocks and used there and in life_analysis,
106: and then freed. */
107:
108: static short *uid_block_number;
109:
1.1.1.2 root 110: /* INSN_VOLATILE (insn) is 1 if the insn refers to anything volatile. */
111:
112: #define INSN_VOLATILE(INSN) uid_volatile[INSN_UID (INSN)]
113: static char *uid_volatile;
114:
1.1 root 115: /* Number of basic blocks in the current function. */
116:
117: int n_basic_blocks;
118:
119: /* Maximum register number used in this function, plus one. */
120:
121: int max_regno;
122:
123: /* Indexed by n, gives number of basic block that (REG n) is used in.
124: Or gives -2 if (REG n) is used in more than one basic block.
125: Or -1 if it has not yet been seen so no basic block is known.
126: This information remains valid for the rest of the compilation
127: of the current function; it is used to control register allocation. */
128:
1.1.1.4 root 129: #define REG_BLOCK_UNKNOWN -1
130: #define REG_BLOCK_GLOBAL -2
1.1 root 131: short *reg_basic_block;
132:
133: /* Indexed by n, gives number of times (REG n) is used or set, each
134: weighted by its loop-depth.
135: This information remains valid for the rest of the compilation
136: of the current function; it is used to control register allocation. */
137:
138: short *reg_n_refs;
139:
140: /* Indexed by n, gives number of times (REG n) is set.
141: This information remains valid for the rest of the compilation
142: of the current function; it is used to control register allocation. */
143:
144: short *reg_n_sets;
145:
146: /* Indexed by N, gives number of places register N dies.
147: This information remains valid for the rest of the compilation
148: of the current function; it is used to control register allocation. */
149:
150: short *reg_n_deaths;
151:
152: /* Indexed by N, gives 1 if that reg is live across any CALL_INSNs.
153: This information remains valid for the rest of the compilation
154: of the current function; it is used to control register allocation. */
155:
156: char *reg_crosses_call;
157:
158: /* Total number of instructions at which (REG n) is live.
159: The larger this is, the less priority (REG n) gets for
160: allocation in a real register.
161: This information remains valid for the rest of the compilation
1.1.1.2 root 162: of the current function; it is used to control register allocation.
163:
164: local-alloc.c may alter this number to change the priority.
165:
166: Negative values are special.
167: -1 is used to mark a pseudo reg which has a constant or memory equivalent
168: and is used infrequently enough that it should not get a hard register.
169: -2 is used to mark a pseudo reg for a parameter, when a frame pointer
170: is not required. global-alloc.c makes an allocno for this but does
171: not try to assign a hard register to it. */
1.1 root 172:
173: int *reg_live_length;
174:
175: /* Element N is the next insn that uses (hard or pseudo) register number N
176: within the current basic block; or zero, if there is no such insn.
177: This is valid only during the final backward scan in propagate_block. */
178:
179: static rtx *reg_next_use;
180:
181: /* Size of a regset for the current function,
182: in (1) bytes and (2) elements. */
183:
184: int regset_bytes;
185: int regset_size;
186:
187: /* Element N is first insn in basic block N.
188: This info lasts until we finish compiling the function. */
189:
190: rtx *basic_block_head;
191:
192: /* Element N is last insn in basic block N.
193: This info lasts until we finish compiling the function. */
194:
195: rtx *basic_block_end;
196:
197: /* Element N is a regset describing the registers live
198: at the start of basic block N.
199: This info lasts until we finish compiling the function. */
200:
201: regset *basic_block_live_at_start;
202:
1.1.1.2 root 203: /* Regset of regs live when calls to `setjmp'-like functions happen. */
204:
205: regset regs_live_at_setjmp;
206:
1.1 root 207: /* Element N is nonzero if control can drop into basic block N
208: from the preceding basic block. Freed after life_analysis. */
209:
1.1.1.2 root 210: static char *basic_block_drops_in;
1.1 root 211:
212: /* Element N is depth within loops of basic block number N.
213: Freed after life_analysis. */
214:
1.1.1.2 root 215: static short *basic_block_loop_depth;
1.1 root 216:
217: /* Element N nonzero if basic block N can actually be reached.
218: Vector exists only during find_basic_blocks. */
219:
1.1.1.2 root 220: static char *block_live_static;
1.1 root 221:
222: /* Depth within loops of basic block being scanned for lifetime analysis,
223: plus one. This is the weight attached to references to registers. */
224:
1.1.1.2 root 225: static int loop_depth;
226:
227: /* Define AUTO_INC_DEC if machine has any kind of incrementing
228: or decrementing addressing. */
229:
230: #ifdef HAVE_PRE_DECREMENT
231: #define AUTO_INC_DEC
232: #endif
233:
234: #ifdef HAVE_PRE_INCREMENT
235: #define AUTO_INC_DEC
236: #endif
237:
238: #ifdef HAVE_POST_DECREMENT
239: #define AUTO_INC_DEC
240: #endif
241:
242: #ifdef HAVE_POST_INCREMENT
243: #define AUTO_INC_DEC
244: #endif
1.1 root 245:
246: /* Forward declarations */
247: static void find_basic_blocks ();
248: static void life_analysis ();
249: static void mark_label_ref ();
250: void allocate_for_life_analysis (); /* Used also in stupid_life_analysis */
251: static void init_regset_vector ();
252: static void propagate_block ();
253: static void mark_set_regs ();
254: static void mark_used_regs ();
255: static int insn_dead_p ();
256: static int try_pre_increment ();
257: static int try_pre_increment_1 ();
258: static rtx find_use_as_address ();
1.1.1.2 root 259: static int volatile_refs_p ();
260: void dump_flow_info ();
1.1 root 261:
262: /* Find basic blocks of the current function and perform data flow analysis.
263: F is the first insn of the function and NREGS the number of register numbers
264: in use. */
265:
266: void
267: flow_analysis (f, nregs, file)
268: rtx f;
269: int nregs;
270: FILE *file;
271: {
272: register rtx insn;
273: register int i;
274: register int max_uid = 0;
275:
276: /* Count the basic blocks. Also find maximum insn uid value used. */
277:
278: {
279: register RTX_CODE prev_code = JUMP_INSN;
280: register RTX_CODE code;
281:
282: for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
283: {
284: code = GET_CODE (insn);
285: if (INSN_UID (insn) > max_uid)
286: max_uid = INSN_UID (insn);
287: if (code == CODE_LABEL
288: || (prev_code != INSN && prev_code != CALL_INSN
289: && prev_code != CODE_LABEL
290: && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
291: i++;
292: if (code != NOTE)
293: prev_code = code;
294: }
295: }
296:
297: /* Allocate some tables that last till end of compiling this function
298: and some needed only in find_basic_blocks and life_analysis. */
299:
300: n_basic_blocks = i;
301: basic_block_head = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
302: basic_block_end = (rtx *) oballoc (n_basic_blocks * sizeof (rtx));
303: basic_block_drops_in = (char *) alloca (n_basic_blocks);
304: basic_block_loop_depth = (short *) alloca (n_basic_blocks * sizeof (short));
305: uid_block_number = (short *) alloca ((max_uid + 1) * sizeof (short));
1.1.1.2 root 306: uid_volatile = (char *) alloca (max_uid + 1);
307: bzero (uid_volatile, max_uid + 1);
1.1 root 308:
309: find_basic_blocks (f);
310: life_analysis (f, nregs);
311: if (file)
312: dump_flow_info (file);
313:
314: basic_block_drops_in = 0;
315: uid_block_number = 0;
316: basic_block_loop_depth = 0;
317: }
318:
319: /* Find all basic blocks of the function whose first insn is F.
320: Store the correct data in the tables that describe the basic blocks,
321: set up the chains of references for each CODE_LABEL, and
322: delete any entire basic blocks that cannot be reached. */
323:
324: static void
325: find_basic_blocks (f)
326: rtx f;
327: {
328: register rtx insn;
329: register int i;
330:
331: /* Initialize the ref chain of each label to 0. */
332: /* Record where all the blocks start and end and their depth in loops. */
333: /* For each insn, record the block it is in. */
334:
335: {
336: register RTX_CODE prev_code = JUMP_INSN;
337: register RTX_CODE code;
338: int depth = 1;
339:
340: for (insn = f, i = -1; insn; insn = NEXT_INSN (insn))
341: {
342: code = GET_CODE (insn);
343: if (code == NOTE)
344: {
345: if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
346: depth++;
347: else if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END)
348: depth--;
349: }
350: else if (code == CODE_LABEL
351: || (prev_code != INSN && prev_code != CALL_INSN
352: && prev_code != CODE_LABEL
353: && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
354: {
355: basic_block_head[++i] = insn;
356: basic_block_end[i] = insn;
357: basic_block_loop_depth[i] = depth;
358: if (code == CODE_LABEL)
359: LABEL_REFS (insn) = insn;
360: }
361: else if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
362: basic_block_end[i] = insn;
363: BLOCK_NUM (insn) = i;
364: if (code != NOTE)
365: prev_code = code;
366: }
1.1.1.4 root 367: if (i + 1 != n_basic_blocks)
368: abort ();
1.1 root 369: }
370:
371: /* Record which basic blocks control can drop in to. */
372:
373: {
374: register int i;
375: for (i = 0; i < n_basic_blocks; i++)
376: {
377: register rtx insn = PREV_INSN (basic_block_head[i]);
1.1.1.2 root 378: /* TEMP1 is used to avoid a bug in Sequent's compiler. */
379: register int temp1;
1.1 root 380: while (insn && GET_CODE (insn) == NOTE)
381: insn = PREV_INSN (insn);
1.1.1.2 root 382: temp1 = insn && GET_CODE (insn) != BARRIER;
383: basic_block_drops_in[i] = temp1;
1.1 root 384: }
385: }
386:
387: /* Now find which basic blocks can actually be reached
388: and put all jump insns' LABEL_REFS onto the ref-chains
389: of their target labels. */
390:
391: if (n_basic_blocks > 0)
392: {
393: register char *block_live = (char *) alloca (n_basic_blocks);
394: register char *block_marked = (char *) alloca (n_basic_blocks);
395: int something_marked = 1;
396:
397: /* Initialize with just block 0 reachable and no blocks marked. */
398:
399: bzero (block_live, n_basic_blocks);
400: bzero (block_marked, n_basic_blocks);
401: block_live[0] = 1;
402: block_live_static = block_live;
403:
404: /* Pass over all blocks, marking each block that is reachable
405: and has not yet been marked.
406: Keep doing this until, in one pass, no blocks have been marked.
407: Then blocks_live and blocks_marked are identical and correct.
408: In addition, all jumps actually reachable have been marked. */
409:
410: while (something_marked)
411: {
412: something_marked = 0;
413: for (i = 0; i < n_basic_blocks; i++)
414: if (block_live[i] && !block_marked[i])
415: {
416: block_marked[i] = 1;
417: something_marked = 1;
418: if (i + 1 < n_basic_blocks && basic_block_drops_in[i + 1])
419: block_live[i + 1] = 1;
420: insn = basic_block_end[i];
421: if (GET_CODE (insn) == JUMP_INSN)
422: mark_label_ref (PATTERN (insn), insn, 0);
423: }
424: }
425:
426: /* Now delete the code for any basic blocks that can't be reached.
427: They can occur because jump_optimize does not recognize
428: unreachable loops as unreachable. */
429:
430: for (i = 0; i < n_basic_blocks; i++)
431: if (!block_live[i])
432: {
433: insn = basic_block_head[i];
434: while (1)
435: {
1.1.1.2 root 436: if (GET_CODE (insn) == BARRIER)
437: abort ();
1.1 root 438: if (GET_CODE (insn) != NOTE)
439: {
440: PUT_CODE (insn, NOTE);
441: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
442: NOTE_SOURCE_FILE (insn) = 0;
443: }
444: if (insn == basic_block_end[i])
1.1.1.2 root 445: {
446: /* BARRIERs are between basic blocks, not part of one.
447: Delete a BARRIER if the preceding jump is deleted.
448: We cannot alter a BARRIER into a NOTE
449: because it is too short; but we can really delete
450: it because it is not part of a basic block. */
451: if (NEXT_INSN (insn) != 0
452: && GET_CODE (NEXT_INSN (insn)) == BARRIER)
453: delete_insn (NEXT_INSN (insn));
454: break;
455: }
1.1 root 456: insn = NEXT_INSN (insn);
457: }
458: /* Each time we delete some basic blocks,
459: see if there is a jump around them that is
460: being turned into a no-op. If so, delete it. */
461:
462: if (block_live[i - 1])
463: {
464: register int j;
465: for (j = i; j < n_basic_blocks; j++)
466: if (block_live[j])
467: {
468: insn = basic_block_end[i - 1];
469: if (GET_CODE (insn) == JUMP_INSN
470: && JUMP_LABEL (insn) != 0
1.1.1.2 root 471: && INSN_UID (JUMP_LABEL (insn)) != 0
1.1 root 472: && BLOCK_NUM (JUMP_LABEL (insn)) == j)
473: {
474: PUT_CODE (insn, NOTE);
475: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
476: NOTE_SOURCE_FILE (insn) = 0;
1.1.1.2 root 477: if (GET_CODE (NEXT_INSN (insn)) != BARRIER)
478: abort ();
479: delete_insn (NEXT_INSN (insn));
1.1 root 480: }
481: break;
482: }
483: }
484: }
485: }
486: }
487:
488: /* Check expression X for label references;
489: if one is found, add INSN to the label's chain of references.
490:
491: CHECKDUP means check for and avoid creating duplicate references
492: from the same insn. Such duplicates do no serious harm but
493: can slow life analysis. CHECKDUP is set only when duplicates
494: are likely. */
495:
496: static void
497: mark_label_ref (x, insn, checkdup)
498: rtx x, insn;
499: int checkdup;
500: {
501: register RTX_CODE code = GET_CODE (x);
502: register int i;
503: register char *fmt;
504:
505: if (code == LABEL_REF)
506: {
507: register rtx label = XEXP (x, 0);
508: register rtx y;
509: if (GET_CODE (label) != CODE_LABEL)
1.1.1.4 root 510: abort ();
1.1.1.2 root 511: /* If the label was never emitted, this insn is junk,
512: but avoid a crash trying to refer to BLOCK_NUM (label).
513: This can happen as a result of a syntax error
514: and a diagnostic has already been printed. */
515: if (INSN_UID (label) == 0)
516: return;
1.1 root 517: CONTAINING_INSN (x) = insn;
518: /* if CHECKDUP is set, check for duplicate ref from same insn
519: and don't insert. */
520: if (checkdup)
521: for (y = LABEL_REFS (label); y != label; y = LABEL_NEXTREF (y))
522: if (CONTAINING_INSN (y) == insn)
523: return;
524: LABEL_NEXTREF (x) = LABEL_REFS (label);
525: LABEL_REFS (label) = x;
526: block_live_static[BLOCK_NUM (label)] = 1;
527: return;
528: }
529:
530: fmt = GET_RTX_FORMAT (code);
531: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
532: {
533: if (fmt[i] == 'e')
534: mark_label_ref (XEXP (x, i), insn, 0);
535: if (fmt[i] == 'E')
536: {
537: register int j;
538: for (j = 0; j < XVECLEN (x, i); j++)
539: mark_label_ref (XVECEXP (x, i, j), insn, 1);
540: }
541: }
542: }
543:
544: /* Determine the which registers are live at the start of each
545: basic block of the function whose first insn is F.
546: NREGS is the number of registers used in F.
547: We allocate the vector basic_block_live_at_start
548: and the regsets that it points to, and fill them with the data.
549: regset_size and regset_bytes are also set here. */
550:
551: static void
552: life_analysis (f, nregs)
553: rtx f;
554: int nregs;
555: {
556: register regset tem;
557: int first_pass;
558: int changed;
559: /* For each basic block, a bitmask of regs
560: live on exit from the block. */
561: regset *basic_block_live_at_end;
562: /* For each basic block, a bitmask of regs
563: live on entry to a successor-block of this block.
564: If this does not match basic_block_live_at_end,
565: that must be updated, and the block must be rescanned. */
566: regset *basic_block_new_live_at_end;
567: /* For each basic block, a bitmask of regs
568: whose liveness at the end of the basic block
569: can make a difference in which regs are live on entry to the block.
570: These are the regs that are set within the basic block,
571: possibly excluding those that are used after they are set. */
572: regset *basic_block_significant;
573: register int i;
1.1.1.2 root 574: rtx insn;
1.1 root 575:
576: max_regno = nregs;
577:
578: bzero (regs_ever_live, sizeof regs_ever_live);
579:
580: /* Allocate and zero out many data structures
581: that will record the data from lifetime analysis. */
582:
583: allocate_for_life_analysis ();
584:
585: reg_next_use = (rtx *) alloca (nregs * sizeof (rtx));
586: bzero (reg_next_use, nregs * sizeof (rtx));
587:
588: /* Set up several regset-vectors used internally within this function.
589: Their meanings are documented above, with their declarations. */
590:
591: basic_block_live_at_end = (regset *) alloca (n_basic_blocks * sizeof (regset));
592: tem = (regset) alloca (n_basic_blocks * regset_bytes);
593: bzero (tem, n_basic_blocks * regset_bytes);
594: init_regset_vector (basic_block_live_at_end, tem, n_basic_blocks, regset_bytes);
595:
596: basic_block_new_live_at_end = (regset *) alloca (n_basic_blocks * sizeof (regset));
597: tem = (regset) alloca (n_basic_blocks * regset_bytes);
598: bzero (tem, n_basic_blocks * regset_bytes);
599: init_regset_vector (basic_block_new_live_at_end, tem, n_basic_blocks, regset_bytes);
600:
601: basic_block_significant = (regset *) alloca (n_basic_blocks * sizeof (regset));
602: tem = (regset) alloca (n_basic_blocks * regset_bytes);
603: bzero (tem, n_basic_blocks * regset_bytes);
604: init_regset_vector (basic_block_significant, tem, n_basic_blocks, regset_bytes);
605:
1.1.1.4 root 606: /* Record which insns refer to any volatile memory
607: or for any reason can't be deleted just because they are dead stores. */
1.1.1.2 root 608:
609: for (insn = f; insn; insn = NEXT_INSN (insn))
1.1.1.4 root 610: {
611: enum rtx_code code1 = GET_CODE (insn);
612: if (code1 == CALL_INSN)
613: INSN_VOLATILE (insn) = 1;
614: else if (code1 == INSN || code1 == JUMP_INSN)
615: {
616: if (GET_CODE (PATTERN (insn)) != USE)
617: INSN_VOLATILE (insn) = volatile_refs_p (PATTERN (insn));
618: }
619: }
1.1.1.2 root 620:
621: if (n_basic_blocks > 0)
622: #ifdef EXIT_IGNORE_STACK
623: if (! (EXIT_IGNORE_STACK) || ! frame_pointer_needed)
624: #endif
625: {
626: /* If exiting needs the right stack value,
627: consider the stack pointer live at the end of the function. */
628: basic_block_live_at_end[n_basic_blocks - 1]
629: [STACK_POINTER_REGNUM / REGSET_ELT_BITS]
630: |= 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
631: basic_block_new_live_at_end[n_basic_blocks - 1]
632: [STACK_POINTER_REGNUM / REGSET_ELT_BITS]
633: |= 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
634: }
635:
1.1 root 636: /* Propagate life info through the basic blocks
637: around the graph of basic blocks.
638:
639: This is a relaxation process: each time a new register
640: is live at the end of the basic block, we must scan the block
641: to determine which registers are, as a consequence, live at the beginning
642: of that block. These registers must then be marked live at the ends
643: of all the blocks that can transfer control to that block.
644: The process continues until it reaches a fixed point. */
645:
646: first_pass = 1;
647: changed = 1;
648: while (changed)
649: {
650: changed = 0;
651: for (i = n_basic_blocks - 1; i >= 0; i--)
652: {
653: int consider = first_pass;
654: int must_rescan = first_pass;
655: register int j;
656:
657: /* Set CONSIDER if this block needs thinking about at all
658: (that is, if the regs live now at the end of it
659: are not the same as were live at the end of it when
660: we last thought about it).
661: Set must_rescan if it needs to be thought about
662: instruction by instruction (that is, if any additional
663: reg that is live at the end now but was not live there before
664: is one of the significant regs of this basic block). */
665:
666: for (j = 0; j < regset_size; j++)
667: {
668: register int x = basic_block_new_live_at_end[i][j]
669: & ~basic_block_live_at_end[i][j];
670: if (x)
671: consider = 1;
672: if (x & basic_block_significant[i][j])
673: {
674: must_rescan = 1;
675: consider = 1;
676: break;
677: }
678: }
679:
680: if (! consider)
681: continue;
682:
683: /* The live_at_start of this block may be changing,
684: so another pass will be required after this one. */
685: changed = 1;
686:
687: if (! must_rescan)
688: {
689: /* No complete rescan needed;
690: just record those variables newly known live at end
691: as live at start as well. */
692: for (j = 0; j < regset_size; j++)
693: {
694: register int x = basic_block_new_live_at_end[i][j]
695: & ~basic_block_live_at_end[i][j];
696: basic_block_live_at_start[i][j] |= x;
697: basic_block_live_at_end[i][j] |= x;
698: }
699: }
700: else
701: {
702: /* Update the basic_block_live_at_start
703: by propagation backwards through the block. */
704: bcopy (basic_block_new_live_at_end[i],
705: basic_block_live_at_end[i], regset_bytes);
706: bcopy (basic_block_live_at_end[i],
707: basic_block_live_at_start[i], regset_bytes);
708: propagate_block (basic_block_live_at_start[i],
709: basic_block_head[i], basic_block_end[i], 0,
710: first_pass ? basic_block_significant[i] : 0,
711: i);
712: }
713:
714: {
715: register rtx jump, head;
716: /* Update the basic_block_new_live_at_end's of the block
717: that falls through into this one (if any). */
718: head = basic_block_head[i];
719: jump = PREV_INSN (head);
720: if (basic_block_drops_in[i])
721: {
722: register from_block = BLOCK_NUM (jump);
723: register int j;
724: for (j = 0; j < regset_size; j++)
725: basic_block_new_live_at_end[from_block][j]
726: |= basic_block_live_at_start[i][j];
727: }
728: /* Update the basic_block_new_live_at_end's of
729: all the blocks that jump to this one. */
730: if (GET_CODE (head) == CODE_LABEL)
731: for (jump = LABEL_REFS (head);
732: jump != head;
733: jump = LABEL_NEXTREF (jump))
734: {
735: register from_block = BLOCK_NUM (CONTAINING_INSN (jump));
736: register int j;
737: for (j = 0; j < regset_size; j++)
738: basic_block_new_live_at_end[from_block][j]
739: |= basic_block_live_at_start[i][j];
740: }
741: }
742: }
743: first_pass = 0;
744: }
745:
1.1.1.5 ! root 746: #if 0 /* This seems unnecessary; life at start of function shouldn't
! 747: mean that the reg is live in more than one basic block. */
! 748:
1.1.1.2 root 749: /* Process the regs live at the beginning of the function.
750: Mark them as not local to any one basic block. */
751:
752: if (n_basic_blocks > 0)
753: for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
754: if (basic_block_live_at_start[0][i / REGSET_ELT_BITS]
755: & (1 << (i % REGSET_ELT_BITS)))
1.1.1.4 root 756: reg_basic_block[i] = REG_BLOCK_GLOBAL;
1.1.1.5 ! root 757: #endif
1.1.1.2 root 758:
1.1 root 759: /* Now the life information is accurate.
760: Make one more pass over each basic block
761: to delete dead stores, create autoincrement addressing
762: and record how many times each register is used, is set, or dies.
763:
764: To save time, we operate directly in basic_block_live_at_end[i],
765: thus destroying it (in fact, converting it into a copy of
766: basic_block_live_at_start[i]). This is ok now because
767: basic_block_live_at_end[i] is no longer used past this point. */
768:
769: for (i = 0; i < n_basic_blocks; i++)
770: {
771: propagate_block (basic_block_live_at_end[i],
772: basic_block_head[i], basic_block_end[i], 1, 0, i);
773: }
774: }
775:
776: /* Subroutines of life analysis. */
777:
778: /* Allocate the permanent data structures that represent the results
779: of life analysis. Not static since used also for stupid life analysis. */
780:
781: void
782: allocate_for_life_analysis ()
783: {
784: register int i;
785: register regset tem;
786:
787: regset_size = ((max_regno + REGSET_ELT_BITS - 1) / REGSET_ELT_BITS);
788: regset_bytes = regset_size * sizeof (*(regset)0);
789:
790: reg_n_refs = (short *) oballoc (max_regno * sizeof (short));
791: bzero (reg_n_refs, max_regno * sizeof (short));
792:
793: reg_n_sets = (short *) oballoc (max_regno * sizeof (short));
794: bzero (reg_n_sets, max_regno * sizeof (short));
795:
796: reg_n_deaths = (short *) oballoc (max_regno * sizeof (short));
797: bzero (reg_n_deaths, max_regno * sizeof (short));
798:
799: reg_live_length = (int *) oballoc (max_regno * sizeof (int));
800: bzero (reg_live_length, max_regno * sizeof (int));
801:
802: reg_crosses_call = (char *) oballoc (max_regno);
803: bzero (reg_crosses_call, max_regno);
804:
805: reg_basic_block = (short *) oballoc (max_regno * sizeof (short));
806: for (i = 0; i < max_regno; i++)
1.1.1.4 root 807: reg_basic_block[i] = REG_BLOCK_UNKNOWN;
1.1 root 808:
809: basic_block_live_at_start = (regset *) oballoc (n_basic_blocks * sizeof (regset));
810: tem = (regset) oballoc (n_basic_blocks * regset_bytes);
811: bzero (tem, n_basic_blocks * regset_bytes);
812: init_regset_vector (basic_block_live_at_start, tem, n_basic_blocks, regset_bytes);
1.1.1.2 root 813:
814: regs_live_at_setjmp = (regset) oballoc (regset_bytes);
815: bzero (regs_live_at_setjmp, regset_bytes);
1.1 root 816: }
817:
818: /* Make each element of VECTOR point at a regset,
819: taking the space for all those regsets from SPACE.
820: SPACE is of type regset, but it is really as long as NELTS regsets.
821: BYTES_PER_ELT is the number of bytes in one regset. */
822:
823: static void
824: init_regset_vector (vector, space, nelts, bytes_per_elt)
825: regset *vector;
826: regset space;
827: int nelts;
828: int bytes_per_elt;
829: {
830: register int i;
831: register regset p = space;
832:
833: for (i = 0; i < nelts; i++)
834: {
835: vector[i] = p;
836: p += bytes_per_elt / sizeof (*p);
837: }
838: }
839:
840: /* Compute the registers live at the beginning of a basic block
841: from those live at the end.
842:
843: When called, OLD contains those live at the end.
844: On return, it contains those live at the beginning.
845: FIRST and LAST are the first and last insns of the basic block.
846:
847: FINAL is nonzero if we are doing the final pass which is not
848: for computing the life info (since that has already been done)
849: but for acting on it. On this pass, we delete dead stores,
850: set up the logical links and dead-variables lists of instructions,
851: and merge instructions for autoincrement and autodecrement addresses.
852:
853: SIGNIFICANT is nonzero only the first time for each basic block.
854: If it is nonzero, it points to a regset in which we store
855: a 1 for each register that is set within the block.
856:
857: BNUM is the number of the basic block. */
858:
859: static void
860: propagate_block (old, first, last, final, significant, bnum)
861: register regset old;
862: rtx first;
863: rtx last;
864: int final;
865: regset significant;
866: int bnum;
867: {
868: register rtx insn;
869: rtx prev;
870: regset live;
871: regset dead;
872:
873: /* The following variables are used only if FINAL is nonzero. */
874: /* This vector gets one element for each reg that has been live
875: at any point in the basic block that has been scanned so far.
876: SOMETIMES_MAX says how many elements are in use so far.
877: In each element, OFFSET is the byte-number within a regset
878: for the register described by the element, and BIT is a mask
879: for that register's bit within the byte. */
880: register struct foo { short offset; short bit; } *regs_sometimes_live;
881: int sometimes_max = 0;
882: /* This regset has 1 for each reg that we have seen live so far.
883: It and REGS_SOMETIMES_LIVE are updated together. */
884: regset maxlive;
885:
886: loop_depth = basic_block_loop_depth[bnum];
887:
888: dead = (regset) alloca (regset_bytes);
889: live = (regset) alloca (regset_bytes);
890:
891: if (final)
892: {
893: register int i, offset, bit;
894:
895: maxlive = (regset) alloca (regset_bytes);
896: bcopy (old, maxlive, regset_bytes);
897: regs_sometimes_live
898: = (struct foo *) alloca (max_regno * sizeof (struct foo));
899:
900: /* Process the regs live at the end of the block.
901: Enter them in MAXLIVE and REGS_SOMETIMES_LIVE.
902: Also mark them as not local to any one basic block. */
903:
904: for (offset = 0, i = 0; offset < regset_size; offset++)
905: for (bit = 1; bit; bit <<= 1, i++)
906: {
907: if (i == max_regno)
908: break;
909: if (old[offset] & bit)
910: {
1.1.1.4 root 911: reg_basic_block[i] = REG_BLOCK_GLOBAL;
1.1 root 912: regs_sometimes_live[sometimes_max].offset = offset;
913: regs_sometimes_live[sometimes_max].bit = i % REGSET_ELT_BITS;
914: sometimes_max++;
915: }
916: }
917: }
918:
919: /* Scan the block an insn at a time from end to beginning. */
920:
921: for (insn = last; ; insn = prev)
922: {
923: prev = PREV_INSN (insn);
924:
1.1.1.2 root 925: /* If this is a call to `setjmp' et al,
926: warn if any non-volatile datum is live. */
927:
928: if (final && GET_CODE (insn) == NOTE
929: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_SETJMP)
930: {
931: int i;
932: for (i = 0; i < regset_size; i++)
933: regs_live_at_setjmp[i] |= old[i];
1.1 root 934: }
935:
936: /* Update the life-status of regs for this insn.
937: First DEAD gets which regs are set in this insn
938: then LIVE gets which regs are used in this insn.
939: Then the regs live before the insn
940: are those live after, with DEAD regs turned off,
941: and then LIVE regs turned on. */
942:
943: if (GET_CODE (insn) == INSN
944: || GET_CODE (insn) == JUMP_INSN
945: || GET_CODE (insn) == CALL_INSN)
946: {
947: register int i;
1.1.1.2 root 948: rtx note = find_reg_note (insn, REG_RETVAL, 0);
949:
1.1 root 950: /* If an instruction consists of just dead store(s) on final pass,
951: "delete" it by turning it into a NOTE of type NOTE_INSN_DELETED.
952: We could really delete it with delete_insn, but that
953: can cause trouble for first or last insn in a basic block. */
1.1.1.2 root 954: if (final && insn_dead_p (PATTERN (insn), old, 1)
955: /* Don't delete something that refers to volatile storage! */
956: && ! INSN_VOLATILE (insn))
1.1 root 957: {
958: PUT_CODE (insn, NOTE);
959: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
960: NOTE_SOURCE_FILE (insn) = 0;
1.1.1.2 root 961: /* If this insn is copying the return value from a library call,
962: delete the entire library call. */
963: if (note)
964: {
965: rtx first = XEXP (note, 0);
966: rtx prev = insn;
967: while (first->volatil)
968: first = NEXT_INSN (first);
969: while (prev != first)
970: {
971: prev = PREV_INSN (prev);
972: PUT_CODE (prev, NOTE);
973: NOTE_LINE_NUMBER (prev) = NOTE_INSN_DELETED;
974: NOTE_SOURCE_FILE (prev) = 0;
975: }
976: }
1.1 root 977: goto flushed;
978: }
1.1.1.2 root 979:
980: for (i = 0; i < regset_size; i++)
1.1 root 981: {
1.1.1.2 root 982: dead[i] = 0; /* Faster than bzero here */
983: live[i] = 0; /* since regset_size is usually small */
984: }
1.1 root 985:
1.1.1.2 root 986: /* See if this is an increment or decrement that can be
987: merged into a following memory address. */
988: #ifdef AUTO_INC_DEC
989: {
990: register rtx x = PATTERN (insn);
991: /* Does this instruction increment or decrement a register? */
992: if (final && GET_CODE (x) == SET
993: && GET_CODE (SET_DEST (x)) == REG
994: && (GET_CODE (SET_SRC (x)) == PLUS
995: || GET_CODE (SET_SRC (x)) == MINUS)
996: && XEXP (SET_SRC (x), 0) == SET_DEST (x)
997: && GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
998: /* Ok, look for a following memory ref we can combine with.
999: If one is found, change the memory ref to a PRE_INC
1000: or PRE_DEC, cancel this insn, and return 1.
1001: Return 0 if nothing has been done. */
1002: && try_pre_increment_1 (insn))
1003: goto flushed;
1004: }
1005: #endif /* AUTO_INC_DEC */
1.1 root 1006:
1.1.1.2 root 1007: /* If this is not the final pass, and this insn is copying the
1008: value of a library call and it's dead, don't scan the
1009: insns that perform the library call, so that the call's
1010: arguments are not marked live. */
1011: if (note && insn_dead_p (PATTERN (insn), old, 1))
1.1.1.3 root 1012: {
1.1.1.4 root 1013: /* Mark the dest reg as `significant'. */
1014: mark_set_regs (old, dead, PATTERN (insn), 0, significant);
1015:
1.1.1.3 root 1016: insn = XEXP (note, 0);
1017: prev = PREV_INSN (insn);
1018: }
1.1.1.4 root 1019: else if (SET_DEST (PATTERN (insn)) == stack_pointer_rtx
1020: && GET_CODE (SET_SRC (PATTERN (insn))) == PLUS
1021: && XEXP (SET_SRC (PATTERN (insn)), 0) == stack_pointer_rtx
1022: && GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == CONST_INT)
1023: /* These insns, if not dead stores, have no effect on life. */
1024: ;
1.1.1.2 root 1025: else
1026: {
1027: /* LIVE gets the regs used in INSN; DEAD gets those set by it. */
1.1 root 1028: mark_set_regs (old, dead, PATTERN (insn), final ? insn : 0,
1029: significant);
1.1.1.2 root 1030: mark_used_regs (old, live, PATTERN (insn), final, insn);
1.1 root 1031:
1032: /* Update OLD for the registers used or set. */
1033: for (i = 0; i < regset_size; i++)
1034: {
1035: old[i] &= ~dead[i];
1036: old[i] |= live[i];
1037: }
1038:
1.1.1.2 root 1039: if (GET_CODE (insn) == CALL_INSN)
1040: {
1041: register int i;
1042:
1043: /* Each call clobbers all call-clobbered regs.
1044: Note that the function-value reg is one of these, and
1045: mark_set_regs has already had a chance to handle it. */
1046: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1047: if (call_used_regs[i])
1048: old[i / REGSET_ELT_BITS]
1049: &= ~(1 << (i % REGSET_ELT_BITS));
1050:
1051: /* The stack ptr is used (honorarily) by a CALL insn. */
1052: old[STACK_POINTER_REGNUM / REGSET_ELT_BITS]
1053: |= (1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS));
1054:
1055: if (final)
1056: {
1057: /* Any regs live at the time of a call instruction
1058: must not go in a register clobbered by calls.
1059: Find all regs now live and record this for them. */
1060:
1061: register struct foo *p = regs_sometimes_live;
1062:
1063: for (i = 0; i < sometimes_max; i++, p++)
1064: {
1065: if (old[p->offset]
1066: & (1 << p->bit))
1067: reg_crosses_call[p->offset * REGSET_ELT_BITS + p->bit] = 1;
1068: }
1069: }
1070: }
1071: }
1072:
1073: /* On final pass, add any additional sometimes-live regs
1074: into MAXLIVE and REGS_SOMETIMES_LIVE.
1075: Also update counts of how many insns each reg is live at. */
1.1 root 1076:
1.1.1.2 root 1077: if (final)
1078: {
1079: for (i = 0; i < regset_size; i++)
1.1 root 1080: {
1.1.1.2 root 1081: register int diff = live[i] & ~maxlive[i];
1.1 root 1082:
1.1.1.2 root 1083: if (diff)
1084: {
1085: register int regno;
1086: maxlive[i] |= diff;
1087: for (regno = 0; diff && regno < REGSET_ELT_BITS; regno++)
1088: if (diff & (1 << regno))
1089: {
1090: regs_sometimes_live[sometimes_max].offset = i;
1091: regs_sometimes_live[sometimes_max].bit = regno;
1092: diff &= ~ (1 << regno);
1093: sometimes_max++;
1094: }
1095: }
1096: }
1.1 root 1097:
1.1.1.2 root 1098: {
1099: register struct foo *p = regs_sometimes_live;
1100: for (i = 0; i < sometimes_max; i++, p++)
1.1 root 1101: {
1.1.1.2 root 1102: if (old[p->offset] & (1 << p->bit))
1103: reg_live_length[p->offset * REGSET_ELT_BITS + p->bit]++;
1.1 root 1104: }
1.1.1.2 root 1105: }
1.1 root 1106: }
1107: }
1.1.1.2 root 1108: flushed: ;
1.1 root 1109: if (insn == first)
1110: break;
1111: }
1112: }
1113:
1114: /* Return 1 if X (the body of an insn, or part of it) is just dead stores
1115: (SET expressions whose destinations are registers dead after the insn).
1116: NEEDED is the regset that says which regs are alive after the insn. */
1117:
1118: static int
1.1.1.2 root 1119: insn_dead_p (x, needed, strict_low_ok)
1.1 root 1120: rtx x;
1121: regset needed;
1.1.1.2 root 1122: int strict_low_ok;
1.1 root 1123: {
1124: register RTX_CODE code = GET_CODE (x);
1.1.1.2 root 1125: #if 0
1.1 root 1126: /* Make sure insns to set the stack pointer are never deleted. */
1127: needed[STACK_POINTER_REGNUM / REGSET_ELT_BITS]
1128: |= 1 << (STACK_POINTER_REGNUM % REGSET_ELT_BITS);
1.1.1.2 root 1129: #endif
1130:
1131: /* If setting something that's a reg or part of one,
1132: see if that register's altered value will be live. */
1133:
1134: if (code == SET)
1.1 root 1135: {
1.1.1.2 root 1136: register rtx r = SET_DEST (x);
1.1.1.4 root 1137: /* A SET that makes space on the stack cannot be dead.
1138: Even if this function never uses this stack pointer value,
1139: signal handlers do! */
1140: if (r == stack_pointer_rtx
1141: #ifdef STACK_GROWS_DOWNWARD
1142: && GET_CODE (SET_SRC (x)) == MINUS
1143: #else
1144: && GET_CODE (SET_SRC (x)) == PLUS
1145: #endif
1146: && XEXP (SET_SRC (x), 0) == r)
1147: return 0;
1.1.1.2 root 1148: /* A SET that is a subroutine call cannot be dead. */
1149: if (GET_CODE (SET_SRC (x)) == CALL)
1150: return 0;
1151: while (GET_CODE (r) == SUBREG
1152: || (strict_low_ok && GET_CODE (r) == STRICT_LOW_PART)
1153: || GET_CODE (r) == ZERO_EXTRACT
1154: || GET_CODE (r) == SIGN_EXTRACT)
1155: r = SUBREG_REG (r);
1156: if (GET_CODE (r) == REG)
1157: {
1158: register int regno = REGNO (r);
1159: register int offset = regno / REGSET_ELT_BITS;
1160: register int bit = 1 << (regno % REGSET_ELT_BITS);
1161: return (needed[offset] & bit) == 0;
1162: }
1.1 root 1163: }
1.1.1.2 root 1164: /* If performing several activities,
1165: insn is dead if each activity is individually dead.
1166: Also, CLOBBERs and USEs can be ignored; a CLOBBER or USE
1167: that's inside a PARALLEL doesn't make the insn worth keeping. */
1168: else if (code == PARALLEL)
1.1 root 1169: {
1170: register int i = XVECLEN (x, 0);
1171: for (i--; i >= 0; i--)
1.1.1.2 root 1172: {
1173: rtx elt = XVECEXP (x, 0, i);
1174: if (!insn_dead_p (elt, needed, strict_low_ok)
1175: && GET_CODE (elt) != CLOBBER
1176: && GET_CODE (elt) != USE)
1177: return 0;
1178: }
1.1 root 1179: return 1;
1180: }
1.1.1.2 root 1181: /* We do not check CLOBBER or USE here.
1182: An insn consisting of just a CLOBBER or just a USE
1183: should not be deleted. */
1.1 root 1184: return 0;
1185: }
1186:
1.1.1.2 root 1187: /* Return 1 if register REGNO was used before it was set.
1188: In other words, if it is live at function entry. */
1.1 root 1189:
1.1.1.2 root 1190: int
1191: regno_uninitialized (regno)
1.1 root 1192: int regno;
1193: {
1.1.1.2 root 1194: return (basic_block_live_at_start[0][regno / REGSET_ELT_BITS]
1195: & (1 << (regno % REGSET_ELT_BITS)));
1196: }
1197:
1198: /* 1 if register REGNO was alive at a place where `setjmp' was called
1199: and was set more than once. Such regs may be clobbered by `longjmp'. */
1200:
1201: int
1202: regno_clobbered_at_setjmp (regno)
1203: int regno;
1204: {
1205: return (reg_n_sets[regno] > 1
1206: && (regs_live_at_setjmp[regno / REGSET_ELT_BITS]
1207: & (1 << (regno % REGSET_ELT_BITS))));
1.1 root 1208: }
1209:
1210: /* Process the registers that are set within X.
1211: Their bits are set to 1 in the regset DEAD,
1212: because they are dead prior to this insn.
1213:
1214: If INSN is nonzero, it is the insn being processed
1215: and the fact that it is nonzero implies this is the FINAL pass
1216: in propagate_block. In this case, various info about register
1217: usage is stored, LOG_LINKS fields of insns are set up. */
1218:
1219: static void mark_set_1 ();
1220:
1221: static void
1222: mark_set_regs (needed, dead, x, insn, significant)
1223: regset needed;
1224: regset dead;
1225: rtx x;
1226: rtx insn;
1227: regset significant;
1228: {
1229: register RTX_CODE code = GET_CODE (x);
1230:
1231: if (code == SET || code == CLOBBER)
1232: mark_set_1 (needed, dead, x, insn, significant);
1233: else if (code == PARALLEL)
1234: {
1235: register int i;
1236: for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
1237: {
1238: code = GET_CODE (XVECEXP (x, 0, i));
1239: if (code == SET || code == CLOBBER)
1240: mark_set_1 (needed, dead, XVECEXP (x, 0, i), insn, significant);
1241: }
1242: }
1243: }
1244:
1245: /* Process a single SET rtx, X. */
1246:
1247: static void
1248: mark_set_1 (needed, dead, x, insn, significant)
1249: regset needed;
1250: regset dead;
1251: rtx x;
1252: rtx insn;
1253: regset significant;
1254: {
1255: register int regno;
1256: register rtx reg = SET_DEST (x);
1257:
1.1.1.2 root 1258: if (reg == 0)
1259: return;
1260:
1.1 root 1261: if (GET_CODE (reg) == SUBREG)
1262: {
1263: /* Modifying just one hardware register
1264: of a multi-register value does not count as "setting"
1265: for live-dead analysis. Parts of the previous value
1266: might still be significant below this insn. */
1267: if (REG_SIZE (SUBREG_REG (reg)) > REG_SIZE (reg))
1268: return;
1269:
1270: reg = SUBREG_REG (reg);
1271: }
1272:
1273: if (GET_CODE (reg) == REG
1274: && (regno = REGNO (reg), regno != FRAME_POINTER_REGNUM)
1.1.1.2 root 1275: && regno != ARG_POINTER_REGNUM)
1276: /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
1.1 root 1277: {
1278: register int offset = regno / REGSET_ELT_BITS;
1279: register int bit = 1 << (regno % REGSET_ELT_BITS);
1.1.1.2 root 1280: int is_needed = 0;
1281:
1.1 root 1282: /* Mark the reg being set as dead before this insn. */
1283: dead[offset] |= bit;
1284: /* Mark it as a significant register for this basic block. */
1285: if (significant)
1286: significant[offset] |= bit;
1.1.1.2 root 1287: /* A hard reg in a wide mode may really be multiple registers.
1288: If so, mark all of them just like the first. */
1289: if (regno < FIRST_PSEUDO_REGISTER)
1290: {
1.1.1.4 root 1291: int n;
1292:
1293: /* Nothing below is needed for the stack pointer; get out asap.
1294: Eg, log links aren't needed, since combine won't use them. */
1295: if (regno == STACK_POINTER_REGNUM)
1296: return;
1297:
1298: n = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1.1.1.2 root 1299: while (--n > 0)
1300: {
1301: dead[(regno + n) / REGSET_ELT_BITS]
1302: |= 1 << ((regno + n) % REGSET_ELT_BITS);
1303: if (significant)
1304: significant[(regno + n) / REGSET_ELT_BITS]
1305: |= 1 << ((regno + n) % REGSET_ELT_BITS);
1306: is_needed |= (needed[(regno + n) / REGSET_ELT_BITS]
1307: & 1 << ((regno + n) % REGSET_ELT_BITS));
1308: }
1309: }
1.1 root 1310: /* Additional data to record if this is the final pass. */
1311: if (insn)
1312: {
1313: register rtx y = reg_next_use[regno];
1314: register int blocknum = BLOCK_NUM (insn);
1315:
1316: /* If this is a hard reg, record this function uses the reg. */
1317:
1318: if (regno < FIRST_PSEUDO_REGISTER)
1319: {
1320: register int i;
1321: i = HARD_REGNO_NREGS (regno, GET_MODE (reg));
1322: do
1323: regs_ever_live[regno + --i] = 1;
1324: while (i > 0);
1.1.1.4 root 1325:
1326: if (! ((needed[offset] & bit) || is_needed))
1327: {
1328: /* Note that dead stores have already been deleted if poss.
1329: If we get here, we have found a dead store that cannot
1330: be eliminated (because the insn does something useful).
1331: Indicate this by marking the reg set as dying here. */
1332: REG_NOTES (insn)
1333: = gen_rtx (EXPR_LIST, REG_DEAD,
1334: reg, REG_NOTES (insn));
1335: reg_n_deaths[REGNO (reg)]++;
1336: }
1337: return;
1.1 root 1338: }
1339:
1340: /* Keep track of which basic blocks each reg appears in. */
1341:
1.1.1.4 root 1342: if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN)
1.1 root 1343: reg_basic_block[regno] = blocknum;
1344: else if (reg_basic_block[regno] != blocknum)
1.1.1.4 root 1345: reg_basic_block[regno] = REG_BLOCK_GLOBAL;
1.1 root 1346:
1347: /* Count (weighted) references, stores, etc. */
1348: reg_n_refs[regno] += loop_depth;
1349: reg_n_sets[regno]++;
1.1.1.2 root 1350: /* The next use is no longer "next", since a store intervenes. */
1351: reg_next_use[regno] = 0;
1.1 root 1352: /* The insns where a reg is live are normally counted elsewhere,
1353: but we want the count to include the insn where the reg is set,
1354: and the normal counting mechanism would not count it. */
1355: reg_live_length[regno]++;
1.1.1.2 root 1356: if ((needed[offset] & bit) || is_needed)
1.1 root 1357: {
1358: /* Make a logical link from the next following insn
1359: that uses this register, back to this insn.
1360: The following insns have already been processed. */
1361: if (y && (BLOCK_NUM (y) == blocknum))
1362: LOG_LINKS (y)
1363: = gen_rtx (INSN_LIST, VOIDmode, insn, LOG_LINKS (y));
1364: }
1365: else
1366: {
1367: /* Note that dead stores have already been deleted when possible
1368: If we get here, we have found a dead store that cannot
1369: be eliminated (because the same insn does something useful).
1370: Indicate this by marking the reg being set as dying here. */
1371: REG_NOTES (insn)
1372: = gen_rtx (EXPR_LIST, REG_DEAD,
1373: reg, REG_NOTES (insn));
1.1.1.3 root 1374: reg_n_deaths[REGNO (reg)]++;
1.1 root 1375: }
1376: }
1377: }
1378: }
1379:
1380: /* Scan expression X and store a 1-bit in LIVE for each reg it uses.
1381: This is done assuming the registers needed from X
1382: are those that have 1-bits in NEEDED.
1383:
1.1.1.2 root 1384: On the final pass, FINAL is 1. This means try for autoincrement
1385: and count the uses and deaths of each pseudo-reg.
1386:
1387: INSN is the containing instruction. */
1.1 root 1388:
1389: static void
1.1.1.2 root 1390: mark_used_regs (needed, live, x, final, insn)
1.1 root 1391: regset needed;
1392: regset live;
1393: rtx x;
1394: rtx insn;
1.1.1.2 root 1395: int final;
1.1 root 1396: {
1397: register RTX_CODE code;
1398: register int regno;
1399:
1400: retry:
1401: code = GET_CODE (x);
1402: switch (code)
1403: {
1404: case LABEL_REF:
1405: case SYMBOL_REF:
1406: case CONST_INT:
1407: case CONST:
1.1.1.4 root 1408: case CONST_DOUBLE:
1.1 root 1409: case CC0:
1410: case PC:
1411: case CLOBBER:
1.1.1.4 root 1412: case ADDR_VEC:
1413: case ADDR_DIFF_VEC:
1414: case ASM_INPUT:
1.1 root 1415: return;
1416:
1417: #if defined (HAVE_POST_INCREMENT) || defined (HAVE_POST_DECREMENT)
1418: case MEM:
1419: /* Here we detect use of an index register which might
1420: be good for postincrement or postdecrement. */
1.1.1.2 root 1421: if (final)
1.1 root 1422: {
1423: rtx addr = XEXP (x, 0);
1424: register int size = GET_MODE_SIZE (GET_MODE (x));
1425:
1426: if (GET_CODE (addr) == REG)
1427: {
1428: register rtx y;
1429: regno = REGNO (addr);
1430: /* Is the next use an increment that might make auto-increment? */
1431: y = reg_next_use[regno];
1432: if (y && GET_CODE (PATTERN (y)) == SET
1433: && BLOCK_NUM (y) == BLOCK_NUM (insn)
1434: /* Can't add side effects to jumps; if reg is spilled and
1435: reloaded, there's no way to store back the altered value. */
1436: && GET_CODE (insn) != JUMP_INSN
1437: && (y = SET_SRC (PATTERN (y)),
1438: (0
1439: #ifdef HAVE_POST_INCREMENT
1440: || GET_CODE (y) == PLUS
1441: #endif
1442: #ifdef HAVE_POST_DECREMENT
1443: || GET_CODE (y) == MINUS
1444: #endif
1445: )
1446: && XEXP (y, 0) == addr
1447: && GET_CODE (XEXP (y, 1)) == CONST_INT
1.1.1.2 root 1448: && INTVAL (XEXP (y, 1)) == size)
1449: && dead_or_set_p (reg_next_use[regno], addr))
1.1 root 1450: {
1.1.1.2 root 1451: rtx use = find_use_as_address (PATTERN (insn), addr, 0);
1.1 root 1452:
1453: /* Make sure this register appears only once in this insn. */
1454: if (use != 0 && use != (rtx) 1)
1455: {
1456: /* We have found a suitable auto-increment:
1457: do POST_INC around the register here,
1458: and patch out the increment instruction that follows. */
1459: XEXP (x, 0)
1460: = gen_rtx (GET_CODE (y) == PLUS ? POST_INC : POST_DEC,
1461: Pmode, addr);
1462: /* Record that this insn has an implicit side effect. */
1463: REG_NOTES (insn)
1464: = gen_rtx (EXPR_LIST, REG_INC, addr, REG_NOTES (insn));
1465:
1.1.1.2 root 1466: /* Modify the old increment-insn to simply copy
1467: the already-incremented value of our register. */
1.1 root 1468: y = reg_next_use[regno];
1.1.1.2 root 1469: SET_SRC (PATTERN (y)) = addr;
1470:
1471: /* If that makes it a no-op (copying the register
1472: into itself) then change it to a simpler no-op
1473: so it won't appear to be a "use" and a "set"
1474: of this register. */
1475: if (SET_DEST (PATTERN (y)) == addr)
1476: PATTERN (y) = gen_rtx (USE, VOIDmode, const0_rtx);
1477:
1478: /* Count an extra reference to the reg for the increment.
1479: When a reg is incremented.
1.1 root 1480: spilling it is worse, so we want to make that
1481: less likely. */
1482: reg_n_refs[regno] += loop_depth;
1.1.1.2 root 1483: /* Count the increment as a setting of the register,
1484: even though it isn't a SET in rtl. */
1485: reg_n_sets[regno]++;
1.1 root 1486: }
1487: }
1488: }
1489: }
1490: break;
1491: #endif /* HAVE_POST_INCREMENT or HAVE_POST_DECREMENT */
1492:
1493: case REG:
1494: /* See a register other than being set
1495: => mark it as needed. */
1496:
1497: regno = REGNO (x);
1498: if (regno != FRAME_POINTER_REGNUM
1.1.1.2 root 1499: && regno != ARG_POINTER_REGNUM)
1500: /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
1.1 root 1501: {
1502: register int offset = regno / REGSET_ELT_BITS;
1503: register int bit = 1 << (regno % REGSET_ELT_BITS);
1.1.1.2 root 1504: int is_needed = 0;
1505:
1.1 root 1506: live[offset] |= bit;
1.1.1.2 root 1507: /* A hard reg in a wide mode may really be multiple registers.
1508: If so, mark all of them just like the first. */
1509: if (regno < FIRST_PSEUDO_REGISTER)
1510: {
1.1.1.4 root 1511: int n;
1512:
1513: /* For stack ptr, nothing below here can be necessary,
1514: so waste no more time. */
1515: if (regno == STACK_POINTER_REGNUM)
1516: return;
1517:
1518: n = HARD_REGNO_NREGS (regno, GET_MODE (x));
1.1.1.2 root 1519: while (--n > 0)
1520: {
1521: live[(regno + n) / REGSET_ELT_BITS]
1522: |= 1 << ((regno + n) % REGSET_ELT_BITS);
1523: is_needed |= (needed[(regno + n) / REGSET_ELT_BITS]
1524: & 1 << ((regno + n) % REGSET_ELT_BITS));
1525: }
1526: }
1527: if (final)
1.1 root 1528: {
1529: if (regno < FIRST_PSEUDO_REGISTER)
1530: {
1.1.1.4 root 1531: /* If a hard reg is being used,
1532: record that this function does use it. */
1533:
1.1 root 1534: register int i;
1535: i = HARD_REGNO_NREGS (regno, GET_MODE (x));
1536: do
1537: regs_ever_live[regno + --i] = 1;
1538: while (i > 0);
1539: }
1.1.1.4 root 1540: else
1541: {
1542: /* Keep track of which basic block each reg appears in. */
1.1 root 1543:
1.1.1.4 root 1544: register int blocknum = BLOCK_NUM (insn);
1.1 root 1545:
1.1.1.4 root 1546: if (reg_basic_block[regno] == REG_BLOCK_UNKNOWN)
1547: reg_basic_block[regno] = blocknum;
1548: else if (reg_basic_block[regno] != blocknum)
1549: reg_basic_block[regno] = REG_BLOCK_GLOBAL;
1.1 root 1550:
1.1.1.4 root 1551: /* Record where each reg is used, so when the reg
1552: is set we know the next insn that uses it. */
1.1 root 1553:
1.1.1.4 root 1554: reg_next_use[regno] = insn;
1.1 root 1555:
1.1.1.4 root 1556: /* Count (weighted) number of uses of each reg. */
1.1 root 1557:
1.1.1.4 root 1558: reg_n_refs[regno] += loop_depth;
1559: }
1.1 root 1560: /* Record and count the insns in which a reg dies.
1561: If it is used in this insn and was dead below the insn
1562: then it dies in this insn. */
1563:
1.1.1.2 root 1564: if (!(needed[offset] & bit) && !is_needed
1565: && ! find_regno_note (insn, REG_DEAD, regno))
1.1 root 1566: {
1567: REG_NOTES (insn)
1568: = gen_rtx (EXPR_LIST, REG_DEAD, x, REG_NOTES (insn));
1569: reg_n_deaths[regno]++;
1570: }
1571: }
1572: }
1573: return;
1574:
1575: case SET:
1576: {
1.1.1.2 root 1577: register rtx testreg = SET_DEST (x);
1578: int mark_dest = 0;
1.1 root 1579:
1.1.1.2 root 1580: /* Storing in STRICT_LOW_PART is like storing in a reg
1581: in that this SET might be dead, so ignore it in TESTREG.
1582: but in some other ways it is like using the reg. */
1583: /* Storing in a SUBREG or a bit field is like storing the entire
1584: register in that if the register's value is not used
1585: then this SET is not needed. */
1586: while (GET_CODE (testreg) == STRICT_LOW_PART
1587: || GET_CODE (testreg) == ZERO_EXTRACT
1588: || GET_CODE (testreg) == SIGN_EXTRACT
1589: || GET_CODE (testreg) == SUBREG)
1590: {
1591: /* Modifying a single register in an alternate mode
1592: does not use any of the old value. But these other
1593: ways of storing in a register do use the old value. */
1594: if (GET_CODE (testreg) == SUBREG
1595: && !(REG_SIZE (SUBREG_REG (testreg)) > REG_SIZE (testreg)))
1596: ;
1597: else
1598: mark_dest = 1;
1599:
1600: testreg = XEXP (testreg, 0);
1601: }
1.1 root 1602:
1603: /* If this is a store into a register,
1604: recursively scan the only value being stored,
1605: and only if the register's value is live after this insn.
1606: If the value being computed here would never be used
1607: then the values it uses don't need to be computed either. */
1608:
1.1.1.2 root 1609: if (GET_CODE (testreg) == REG
1610: && (regno = REGNO (testreg), regno != FRAME_POINTER_REGNUM)
1611: && regno != ARG_POINTER_REGNUM)
1612: /* && regno != STACK_POINTER_REGNUM) -- let's try without this. */
1.1 root 1613: {
1614: register int offset = regno / REGSET_ELT_BITS;
1615: register int bit = 1 << (regno % REGSET_ELT_BITS);
1.1.1.2 root 1616: if ((needed[offset] & bit)
1617: /* If insn refers to volatile, we mustn't delete it,
1618: so its inputs are all needed. */
1619: || INSN_VOLATILE (insn))
1620: {
1621: mark_used_regs (needed, live, SET_SRC (x), final, insn);
1622: if (mark_dest)
1623: mark_used_regs (needed, live, SET_DEST (x), final, insn);
1624: }
1.1 root 1625: return;
1626: }
1627: }
1628: break;
1629: }
1630:
1631: /* Recursively scan the operands of this expression. */
1632:
1633: {
1634: register char *fmt = GET_RTX_FORMAT (code);
1635: register int i;
1636:
1637: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1638: {
1639: if (fmt[i] == 'e')
1640: {
1641: /* Tail recursive case: save a function call level. */
1642: if (i == 0)
1643: {
1644: x = XEXP (x, 0);
1645: goto retry;
1646: }
1.1.1.2 root 1647: mark_used_regs (needed, live, XEXP (x, i), final, insn);
1.1 root 1648: }
1.1.1.4 root 1649: else if (fmt[i] == 'E')
1.1 root 1650: {
1651: register int j;
1652: for (j = 0; j < XVECLEN (x, i); j++)
1.1.1.2 root 1653: mark_used_regs (needed, live, XVECEXP (x, i, j), final, insn);
1.1 root 1654: }
1655: }
1656: }
1657: }
1658:
1.1.1.2 root 1659: /* Nonzero if X contains any volatile memory references
1660: or volatile ASM_OPERANDS expressions. */
1661:
1662: static int
1663: volatile_refs_p (x)
1664: rtx x;
1665: {
1666: register RTX_CODE code;
1667:
1668: code = GET_CODE (x);
1669: switch (code)
1670: {
1671: case LABEL_REF:
1672: case SYMBOL_REF:
1673: case CONST_INT:
1674: case CONST:
1.1.1.4 root 1675: case CONST_DOUBLE:
1.1.1.2 root 1676: case CC0:
1677: case PC:
1678: case REG:
1.1.1.4 root 1679: case CLOBBER:
1680: case ASM_INPUT:
1681: case ADDR_VEC:
1682: case ADDR_DIFF_VEC:
1.1.1.2 root 1683: return 0;
1684:
1685: case CALL:
1686: return 1;
1687:
1688: case MEM:
1689: case ASM_OPERANDS:
1690: if (x->volatil)
1691: return 1;
1692: }
1693:
1694: /* Recursively scan the operands of this expression. */
1695:
1696: {
1697: register char *fmt = GET_RTX_FORMAT (code);
1698: register int i;
1699:
1700: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1701: {
1702: if (fmt[i] == 'e')
1703: {
1704: if (volatile_refs_p (XEXP (x, i)))
1705: return 1;
1706: }
1707: if (fmt[i] == 'E')
1708: {
1709: register int j;
1710: for (j = 0; j < XVECLEN (x, i); j++)
1711: if (volatile_refs_p (XVECEXP (x, i, j)))
1712: return 1;
1713: }
1714: }
1715: }
1716: return 0;
1717: }
1718:
1719: #ifdef AUTO_INC_DEC
1.1 root 1720:
1721: static int
1722: try_pre_increment_1 (insn)
1723: rtx insn;
1724: {
1725: /* Find the next use of this reg. If in same basic block,
1726: make it do pre-increment or pre-decrement if appropriate. */
1727: rtx x = PATTERN (insn);
1728: int amount = ((GET_CODE (SET_SRC (x)) == PLUS ? 1 : -1)
1729: * INTVAL (XEXP (SET_SRC (x), 1)));
1730: int regno = REGNO (SET_DEST (x));
1731: rtx y = reg_next_use[regno];
1732: if (y != 0
1733: && BLOCK_NUM (y) == BLOCK_NUM (insn)
1734: && try_pre_increment (y, SET_DEST (PATTERN (insn)),
1735: amount))
1736: {
1737: /* We have found a suitable auto-increment
1738: and already changed insn Y to do it.
1739: So flush this increment-instruction. */
1740: PUT_CODE (insn, NOTE);
1741: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1742: NOTE_SOURCE_FILE (insn) = 0;
1743: /* Count a reference to this reg for the increment
1744: insn we are deleting. When a reg is incremented.
1745: spilling it is worse, so we want to make that
1746: less likely. */
1747: reg_n_refs[regno] += loop_depth;
1.1.1.2 root 1748: reg_n_sets[regno]++;
1.1 root 1749: return 1;
1750: }
1751: return 0;
1752: }
1753:
1754: /* Try to change INSN so that it does pre-increment or pre-decrement
1755: addressing on register REG in order to add AMOUNT to REG.
1756: AMOUNT is negative for pre-decrement.
1757: Returns 1 if the change could be made.
1758: This checks all about the validity of the result of modifying INSN. */
1759:
1760: static int
1761: try_pre_increment (insn, reg, amount)
1762: rtx insn, reg;
1763: int amount;
1764: {
1765: register rtx use;
1766:
1.1.1.2 root 1767: /* Nonzero if we can try to make a pre-increment or pre-decrement.
1768: For example, addl $4,r1; movl (r1),... can become movl +(r1),... */
1769: int pre_ok = 0;
1770: /* Nonzero if we can try to make a post-increment or post-decrement.
1771: For example, addl $4,r1; movl -4(r1),... can become movl (r1)+,...
1772: It is possible for both PRE_OK and POST_OK to be nonzero if the machine
1773: supports both pre-inc and post-inc, or both pre-dec and post-dec. */
1774: int post_ok = 0;
1775:
1776: /* Nonzero if the opportunity actually requires post-inc or post-dec. */
1777: int do_post = 0;
1778:
1779: /* From the sign of increment, see which possibilities are conceivable
1780: on this target machine. */
1781: #ifdef HAVE_PRE_INCREMENT
1.1 root 1782: if (amount > 0)
1.1.1.2 root 1783: pre_ok = 1;
1.1 root 1784: #endif
1.1.1.2 root 1785: #ifdef HAVE_POST_INCREMENT
1786: if (amount > 0)
1787: post_ok = 1;
1.1 root 1788: #endif
1789:
1.1.1.2 root 1790: #ifdef HAVE_PRE_DECREMENT
1.1 root 1791: if (amount < 0)
1.1.1.2 root 1792: pre_ok = 1;
1793: #endif
1794: #ifdef HAVE_POST_DECREMENT
1795: if (amount < 0)
1796: post_ok = 1;
1.1 root 1797: #endif
1798:
1.1.1.2 root 1799: if (! (pre_ok || post_ok))
1800: return 0;
1801:
1.1 root 1802: /* It is not safe to add a side effect to a jump insn
1803: because if the incremented register is spilled and must be reloaded
1804: there would be no way to store the incremented value back in memory. */
1805:
1806: if (GET_CODE (insn) == JUMP_INSN)
1807: return 0;
1808:
1.1.1.2 root 1809: use = 0;
1810: if (pre_ok)
1811: use = find_use_as_address (PATTERN (insn), reg, 0);
1812: if (post_ok && (use == 0 || use == (rtx) 1))
1813: {
1814: use = find_use_as_address (PATTERN (insn), reg, -amount);
1815: do_post = 1;
1816: }
1.1 root 1817:
1818: if (use == 0 || use == (rtx) 1)
1819: return 0;
1820:
1821: if (GET_MODE_SIZE (GET_MODE (use)) != (amount > 0 ? amount : - amount))
1822: return 0;
1823:
1.1.1.2 root 1824: XEXP (use, 0) = gen_rtx (amount > 0
1825: ? (do_post ? POST_INC : PRE_INC)
1826: : (do_post ? POST_DEC : PRE_DEC),
1.1 root 1827: Pmode, reg);
1828:
1829: /* Record that this insn now has an implicit side effect on X. */
1830: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_INC, reg, REG_NOTES (insn));
1831: return 1;
1832: }
1833:
1.1.1.2 root 1834: #endif /* AUTO_INC_DEC */
1835:
1.1 root 1836: /* Find the place in the rtx X where REG is used as a memory address.
1837: Return the MEM rtx that so uses it.
1.1.1.2 root 1838: If PLUSCONST is nonzero, search instead for a memory address equivalent to
1839: (plus REG (const_int PLUSCONST)).
1840:
1841: If such an address does not appear, return 0.
1842: If REG appears more than once, or is used other than in such an address,
1.1 root 1843: return (rtx)1. */
1844:
1845: static rtx
1.1.1.2 root 1846: find_use_as_address (x, reg, plusconst)
1.1 root 1847: register rtx x;
1848: rtx reg;
1.1.1.2 root 1849: int plusconst;
1.1 root 1850: {
1851: enum rtx_code code = GET_CODE (x);
1852: char *fmt = GET_RTX_FORMAT (code);
1853: register int i;
1854: register rtx value = 0;
1855: register rtx tem;
1856:
1.1.1.2 root 1857: if (code == MEM && XEXP (x, 0) == reg && plusconst == 0)
1.1 root 1858: return x;
1859:
1.1.1.2 root 1860: if (code == MEM && GET_CODE (XEXP (x, 0)) == PLUS
1861: && XEXP (XEXP (x, 0), 0) == reg
1862: && GET_CODE (XEXP (XEXP (x, 0), 1)) == CONST_INT
1863: && INTVAL (XEXP (XEXP (x, 0), 1)) == plusconst)
1864: return x;
1865:
1866: if (code == SIGN_EXTRACT || code == ZERO_EXTRACT)
1867: {
1868: /* If REG occurs inside a MEM used in a bit-field reference,
1869: that is unacceptable. */
1870: if (find_use_as_address (XEXP (x, 0), reg, 0) != 0)
1871: return (rtx) 1;
1872: }
1873:
1.1 root 1874: if (x == reg)
1875: return (rtx) 1;
1876:
1877: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1878: {
1879: if (fmt[i] == 'e')
1880: {
1.1.1.2 root 1881: tem = find_use_as_address (XEXP (x, i), reg, plusconst);
1.1 root 1882: if (value == 0)
1883: value = tem;
1884: else if (tem != 0)
1885: return (rtx) 1;
1886: }
1887: if (fmt[i] == 'E')
1888: {
1889: register int j;
1890: for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1891: {
1.1.1.2 root 1892: tem = find_use_as_address (XVECEXP (x, i, j), reg, plusconst);
1.1 root 1893: if (value == 0)
1894: value = tem;
1895: else if (tem != 0)
1896: return (rtx) 1;
1897: }
1898: }
1899: }
1900:
1901: return value;
1902: }
1903:
1904: /* Write information about registers and basic blocks into FILE.
1905: This is part of making a debugging dump. */
1906:
1.1.1.2 root 1907: void
1.1 root 1908: dump_flow_info (file)
1909: FILE *file;
1910: {
1911: register int i;
1912: static char *reg_class_names[] = REG_CLASS_NAMES;
1913:
1914: fprintf (file, "%d registers.\n", max_regno);
1915:
1916: for (i = FIRST_PSEUDO_REGISTER; i < max_regno; i++)
1917: if (reg_n_refs[i])
1918: {
1919: enum reg_class class;
1920: fprintf (file, "\nRegister %d used %d times across %d insns",
1921: i, reg_n_refs[i], reg_live_length[i]);
1922: if (reg_basic_block[i] >= 0)
1923: fprintf (file, " in block %d", reg_basic_block[i]);
1924: if (reg_n_deaths[i] != 1)
1925: fprintf (file, "; dies in %d places", reg_n_deaths[i]);
1926: if (reg_crosses_call[i])
1927: fprintf (file, "; crosses calls");
1928: if (PSEUDO_REGNO_BYTES (i) != UNITS_PER_WORD)
1929: fprintf (file, "; %d bytes", PSEUDO_REGNO_BYTES (i));
1930: class = reg_preferred_class (i);
1931: if (class != GENERAL_REGS)
1.1.1.2 root 1932: {
1933: if (reg_preferred_or_nothing (i))
1934: fprintf (file, "; %s or none", reg_class_names[(int) class]);
1935: else
1936: fprintf (file, "; pref %s", reg_class_names[(int) class]);
1937: }
1.1 root 1938: if (REGNO_POINTER_FLAG (i))
1939: fprintf (file, "; pointer");
1940: fprintf (file, ".\n");
1941: }
1942: fprintf (file, "\n%d basic blocks.\n", n_basic_blocks);
1943: for (i = 0; i < n_basic_blocks; i++)
1944: {
1945: register rtx head, jump;
1946: register int regno;
1947: fprintf (file, "\nBasic block %d: first insn %d, last %d.\n",
1948: i,
1949: INSN_UID (basic_block_head[i]),
1950: INSN_UID (basic_block_end[i]));
1951: /* The control flow graph's storage is freed
1952: now when flow_analysis returns.
1953: Don't try to print it if it is gone. */
1954: if (basic_block_drops_in)
1955: {
1956: fprintf (file, "Reached from blocks: ");
1957: head = basic_block_head[i];
1958: if (GET_CODE (head) == CODE_LABEL)
1959: for (jump = LABEL_REFS (head);
1960: jump != head;
1961: jump = LABEL_NEXTREF (jump))
1962: {
1963: register from_block = BLOCK_NUM (CONTAINING_INSN (jump));
1964: fprintf (file, " %d", from_block);
1965: }
1966: if (basic_block_drops_in[i])
1967: fprintf (file, " previous");
1968: }
1969: fprintf (file, "\nRegisters live at start:");
1970: for (regno = 0; regno < max_regno; regno++)
1971: {
1972: register int offset = regno / REGSET_ELT_BITS;
1973: register int bit = 1 << (regno % REGSET_ELT_BITS);
1974: if (basic_block_live_at_start[i][offset] & bit)
1975: fprintf (file, " %d", regno);
1976: }
1977: fprintf (file, "\n");
1978: }
1979: fprintf (file, "\n");
1980: }
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