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1.1.1.4 ! root 1: This is Info file gcc.info, produced by Makeinfo-1.49 from the input 1.1 root 2: file gcc.texi. 3: 4: This file documents the use and the internals of the GNU compiler. 5: 6: Copyright (C) 1988, 1989, 1992 Free Software Foundation, Inc. 7: 1.1.1.3 root 8: Permission is granted to make and distribute verbatim copies of this 9: manual provided the copyright notice and this permission notice are 10: preserved on all copies. 1.1 root 11: 12: Permission is granted to copy and distribute modified versions of 13: this manual under the conditions for verbatim copying, provided also 1.1.1.4 ! root 14: that the sections entitled "GNU General Public License" and "Protect ! 15: Your Freedom--Fight `Look And Feel'" are included exactly as in the ! 16: original, and provided that the entire resulting derived work is ! 17: distributed under the terms of a permission notice identical to this ! 18: one. 1.1 root 19: 20: Permission is granted to copy and distribute translations of this 21: manual into another language, under the above conditions for modified 1.1.1.3 root 22: versions, except that the sections entitled "GNU General Public 1.1.1.4 ! root 23: License" and "Protect Your Freedom--Fight `Look And Feel'", and this ! 24: permission notice, may be included in translations approved by the Free ! 25: Software Foundation instead of in the original English. 1.1.1.3 root 26: 27: 1.1.1.4 ! root 28: File: gcc.info, Node: Conversions, Next: RTL Declarations, Prev: Bit Fields, Up: RTL 1.1.1.3 root 29: 1.1.1.4 ! root 30: Conversions ! 31: =========== 1.1.1.3 root 32: 1.1.1.4 ! root 33: All conversions between machine modes must be represented by ! 34: explicit conversion operations. For example, an expression which is ! 35: the sum of a byte and a full word cannot be written as `(plus:SI ! 36: (reg:QI 34) (reg:SI 80))' because the `plus' operation requires two ! 37: operands of the same machine mode. Therefore, the byte-sized operand is ! 38: enclosed in a conversion operation, as in ! 39: ! 40: (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80)) ! 41: ! 42: The conversion operation is not a mere placeholder, because there ! 43: may be more than one way of converting from a given starting mode to ! 44: the desired final mode. The conversion operation code says how to do ! 45: it. ! 46: ! 47: For all conversion operations, X must not be `VOIDmode' because the ! 48: mode in which to do the conversion would not be known. The conversion ! 49: must either be done at compile-time or X must be placed into a register. ! 50: ! 51: `(sign_extend:M X)' ! 52: Represents the result of sign-extending the value X to machine ! 53: mode M. M must be a fixed-point mode and X a fixed-point value of ! 54: a mode narrower than M. ! 55: ! 56: `(zero_extend:M X)' ! 57: Represents the result of zero-extending the value X to machine ! 58: mode M. M must be a fixed-point mode and X a fixed-point value of ! 59: a mode narrower than M. ! 60: ! 61: `(float_extend:M X)' ! 62: Represents the result of extending the value X to machine mode M. ! 63: M must be a floating point mode and X a floating point value of a ! 64: mode narrower than M. ! 65: ! 66: `(truncate:M X)' ! 67: Represents the result of truncating the value X to machine mode M. ! 68: M must be a fixed-point mode and X a fixed-point value of a mode ! 69: wider than M. ! 70: ! 71: `(float_truncate:M X)' ! 72: Represents the result of truncating the value X to machine mode M. ! 73: M must be a floating point mode and X a floating point value of a ! 74: mode wider than M. ! 75: ! 76: `(float:M X)' ! 77: Represents the result of converting fixed point value X, regarded ! 78: as signed, to floating point mode M. ! 79: ! 80: `(unsigned_float:M X)' ! 81: Represents the result of converting fixed point value X, regarded ! 82: as unsigned, to floating point mode M. ! 83: ! 84: `(fix:M X)' ! 85: When M is a fixed point mode, represents the result of converting ! 86: floating point value X to mode M, regarded as signed. How ! 87: rounding is done is not specified, so this operation may be used ! 88: validly in compiling C code only for integer-valued operands. ! 89: ! 90: `(unsigned_fix:M X)' ! 91: Represents the result of converting floating point value X to ! 92: fixed point mode M, regarded as unsigned. How rounding is done is ! 93: not specified. ! 94: ! 95: `(fix:M X)' ! 96: When M is a floating point mode, represents the result of ! 97: converting floating point value X (valid for mode M) to an ! 98: integer, still represented in floating point mode M, by rounding ! 99: towards zero. 1.1.1.3 root 100: 101: 1.1.1.4 ! root 102: File: gcc.info, Node: RTL Declarations, Next: Side Effects, Prev: Conversions, Up: RTL 1.1.1.3 root 103: 1.1.1.4 ! root 104: Declarations ! 105: ============ 1.1.1.3 root 106: 1.1.1.4 ! root 107: Declaration expression codes do not represent arithmetic operations ! 108: but rather state assertions about their operands. 1.1.1.3 root 109: 1.1.1.4 ! root 110: `(strict_low_part (subreg:M (reg:N R) 0))' ! 111: This expression code is used in only one context: as the ! 112: destination operand of a `set' expression. In addition, the ! 113: operand of this expression must be a non-paradoxical `subreg' ! 114: expression. 1.1.1.3 root 115: 1.1.1.4 ! root 116: The presence of `strict_low_part' says that the part of the ! 117: register which is meaningful in mode N, but is not part of mode M, ! 118: is not to be altered. Normally, an assignment to such a subreg is ! 119: allowed to have undefined effects on the rest of the register when ! 120: M is less than a word. 1.1.1.3 root 121: 122: 1.1.1.4 ! root 123: File: gcc.info, Node: Side Effects, Next: Incdec, Prev: RTL Declarations, Up: RTL 1.1.1.3 root 124: 1.1.1.4 ! root 125: Side Effect Expressions ! 126: ======================= 1.1.1.3 root 127: 1.1.1.4 ! root 128: The expression codes described so far represent values, not actions. ! 129: But machine instructions never produce values; they are meaningful only ! 130: for their side effects on the state of the machine. Special expression ! 131: codes are used to represent side effects. ! 132: ! 133: The body of an instruction is always one of these side effect codes; ! 134: the codes described above, which represent values, appear only as the ! 135: operands of these. ! 136: ! 137: `(set LVAL X)' ! 138: Represents the action of storing the value of X into the place ! 139: represented by LVAL. LVAL must be an expression representing a ! 140: place that can be stored in: `reg' (or `subreg' or ! 141: `strict_low_part'), `mem', `pc' or `cc0'. ! 142: ! 143: If LVAL is a `reg', `subreg' or `mem', it has a machine mode; then ! 144: X must be valid for that mode. ! 145: ! 146: If LVAL is a `reg' whose machine mode is less than the full width ! 147: of the register, then it means that the part of the register ! 148: specified by the machine mode is given the specified value and the ! 149: rest of the register receives an undefined value. Likewise, if ! 150: LVAL is a `subreg' whose machine mode is narrower than the mode of ! 151: the register, the rest of the register can be changed in an ! 152: undefined way. ! 153: ! 154: If LVAL is a `strict_low_part' of a `subreg', then the part of the ! 155: register specified by the machine mode of the `subreg' is given ! 156: the value X and the rest of the register is not changed. ! 157: ! 158: If LVAL is `(cc0)', it has no machine mode, and X may be either a ! 159: `compare' expression or a value that may have any mode. The latter ! 160: case represents a "test" instruction. The expression `(set (cc0) ! 161: (reg:M N))' is equivalent to `(set (cc0) (compare (reg:M N) ! 162: (const_int 0)))'. Use the former expression to save space during ! 163: the compilation. ! 164: ! 165: If LVAL is `(pc)', we have a jump instruction, and the ! 166: possibilities for X are very limited. It may be a `label_ref' ! 167: expression (unconditional jump). It may be an `if_then_else' ! 168: (conditional jump), in which case either the second or the third ! 169: operand must be `(pc)' (for the case which does not jump) and the ! 170: other of the two must be a `label_ref' (for the case which does ! 171: jump). X may also be a `mem' or `(plus:SI (pc) Y)', where Y may ! 172: be a `reg' or a `mem'; these unusual patterns are used to ! 173: represent jumps through branch tables. ! 174: ! 175: If LVAL is neither `(cc0)' nor `(pc)', the mode of LVAL must not ! 176: be `VOIDmode' and the mode of X must be valid for the mode of LVAL. ! 177: ! 178: LVAL is customarily accessed with the `SET_DEST' macro and X with ! 179: the `SET_SRC' macro. ! 180: ! 181: `(return)' ! 182: As the sole expression in a pattern, represents a return from the ! 183: current function, on machines where this can be done with one ! 184: instruction, such as Vaxes. On machines where a multi-instruction ! 185: "epilogue" must be executed in order to return from the function, ! 186: returning is done by jumping to a label which precedes the ! 187: epilogue, and the `return' expression code is never used. ! 188: ! 189: Inside an `if_then_else' expression, represents the value to be ! 190: placed in `pc' to return to the caller. ! 191: ! 192: Note that an insn pattern of `(return)' is logically equivalent to ! 193: `(set (pc) (return))', but the latter form is never used. ! 194: ! 195: `(call FUNCTION NARGS)' ! 196: Represents a function call. FUNCTION is a `mem' expression whose ! 197: address is the address of the function to be called. NARGS is an ! 198: expression which can be used for two purposes: on some machines it ! 199: represents the number of bytes of stack argument; on others, it ! 200: represents the number of argument registers. ! 201: ! 202: Each machine has a standard machine mode which FUNCTION must have. ! 203: The machine description defines macro `FUNCTION_MODE' to expand ! 204: into the requisite mode name. The purpose of this mode is to ! 205: specify what kind of addressing is allowed, on machines where the ! 206: allowed kinds of addressing depend on the machine mode being ! 207: addressed. ! 208: ! 209: `(clobber X)' ! 210: Represents the storing or possible storing of an unpredictable, ! 211: undescribed value into X, which must be a `reg', `scratch' or ! 212: `mem' expression. ! 213: ! 214: One place this is used is in string instructions that store ! 215: standard values into particular hard registers. It may not be ! 216: worth the trouble to describe the values that are stored, but it ! 217: is essential to inform the compiler that the registers will be ! 218: altered, lest it attempt to keep data in them across the string ! 219: instruction. 1.1.1.3 root 220: 1.1.1.4 ! root 221: If X is `(mem:BLK (const_int 0))', it means that all memory ! 222: locations must be presumed clobbered. 1.1.1.3 root 223: 1.1.1.4 ! root 224: Note that the machine description classifies certain hard ! 225: registers as "call-clobbered". All function call instructions are ! 226: assumed by default to clobber these registers, so there is no need ! 227: to use `clobber' expressions to indicate this fact. Also, each ! 228: function call is assumed to have the potential to alter any memory ! 229: location, unless the function is declared `const'. ! 230: ! 231: If the last group of expressions in a `parallel' are each a ! 232: `clobber' expression whose arguments are `reg' or `match_scratch' ! 233: (*note RTL Template::.) expressions, the combiner phase can add ! 234: the appropriate `clobber' expressions to an insn it has ! 235: constructed when doing so will cause a pattern to be matched. ! 236: ! 237: This feature can be used, for example, on a machine that whose ! 238: multiply and add instructions don't use an MQ register but which ! 239: has an add-accumulate instruction that does clobber the MQ ! 240: register. Similarly, a combined instruction might require a ! 241: temporary register while the constituent instructions might not. ! 242: ! 243: When a `clobber' expression for a register appears inside a ! 244: `parallel' with other side effects, the register allocator ! 245: guarantees that the register is unoccupied both before and after ! 246: that insn. However, the reload phase may allocate a register used ! 247: for one of the inputs unless the `&' constraint is specified for ! 248: the selected alternative (*note Modifiers::.). You can clobber ! 249: either a specific hard register, a pseudo register, or a `scratch' ! 250: expression; in the latter two cases, GNU CC will allocate a hard ! 251: register that is available there for use as a temporary. ! 252: ! 253: For instructions that require a temporary register, you should use ! 254: `scratch' instead of a pseudo-register because this will allow the ! 255: combiner phase to add the `clobber' when required. You do this by ! 256: coding (`clobber' (`match_scratch' ...)). If you do clobber a ! 257: pseudo register, use one which appears nowhere else--generate a ! 258: new one each time. Otherwise, you may confuse CSE. ! 259: ! 260: There is one other known use for clobbering a pseudo register in a ! 261: `parallel': when one of the input operands of the insn is also ! 262: clobbered by the insn. In this case, using the same pseudo ! 263: register in the clobber and elsewhere in the insn produces the ! 264: expected results. ! 265: ! 266: `(use X)' ! 267: Represents the use of the value of X. It indicates that the value ! 268: in X at this point in the program is needed, even though it may ! 269: not be apparent why this is so. Therefore, the compiler will not ! 270: attempt to delete previous instructions whose only effect is to ! 271: store a value in X. X must be a `reg' expression. ! 272: ! 273: During the delayed branch scheduling phase, X may be an insn. This ! 274: indicates that X previously was located at this place in the code ! 275: and its data dependencies need to be taken into account. These ! 276: `use' insns will be deleted before the delayed branch scheduling ! 277: phase exits. ! 278: ! 279: `(parallel [X0 X1 ...])' ! 280: Represents several side effects performed in parallel. The square ! 281: brackets stand for a vector; the operand of `parallel' is a vector ! 282: of expressions. X0, X1 and so on are individual side effect ! 283: expressions--expressions of code `set', `call', `return', ! 284: `clobber' or `use'. ! 285: ! 286: "In parallel" means that first all the values used in the ! 287: individual side-effects are computed, and second all the actual ! 288: side-effects are performed. For example, ! 289: ! 290: (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1))) ! 291: (set (mem:SI (reg:SI 1)) (reg:SI 1))]) ! 292: ! 293: says unambiguously that the values of hard register 1 and the ! 294: memory location addressed by it are interchanged. In both places ! 295: where `(reg:SI 1)' appears as a memory address it refers to the ! 296: value in register 1 *before* the execution of the insn. ! 297: ! 298: It follows that it is *incorrect* to use `parallel' and expect the ! 299: result of one `set' to be available for the next one. For example, ! 300: people sometimes attempt to represent a jump-if-zero instruction ! 301: this way: ! 302: ! 303: (parallel [(set (cc0) (reg:SI 34)) ! 304: (set (pc) (if_then_else ! 305: (eq (cc0) (const_int 0)) ! 306: (label_ref ...) ! 307: (pc)))]) ! 308: ! 309: But this is incorrect, because it says that the jump condition ! 310: depends on the condition code value *before* this instruction, not ! 311: on the new value that is set by this instruction. ! 312: ! 313: Peephole optimization, which takes place together with final ! 314: assembly code output, can produce insns whose patterns consist of ! 315: a `parallel' whose elements are the operands needed to output the ! 316: resulting assembler code--often `reg', `mem' or constant ! 317: expressions. This would not be well-formed RTL at any other stage ! 318: in compilation, but it is ok then because no further optimization ! 319: remains to be done. However, the definition of the macro ! 320: `NOTICE_UPDATE_CC', if any, must deal with such insns if you ! 321: define any peephole optimizations. ! 322: ! 323: `(sequence [INSNS ...])' ! 324: Represents a sequence of insns. Each of the INSNS that appears in ! 325: the vector is suitable for appearing in the chain of insns, so it ! 326: must be an `insn', `jump_insn', `call_insn', `code_label', ! 327: `barrier' or `note'. ! 328: ! 329: A `sequence' RTX is never placed in an actual insn during RTL ! 330: generation. It represents the sequence of insns that result from a ! 331: `define_expand' *before* those insns are passed to `emit_insn' to ! 332: insert them in the chain of insns. When actually inserted, the ! 333: individual sub-insns are separated out and the `sequence' is ! 334: forgotten. ! 335: ! 336: After delay-slot scheduling is completed, an insn and all the ! 337: insns that reside in its delay slots are grouped together into a ! 338: `sequence'. The insn requiring the delay slot is the first insn in ! 339: the vector; subsequent insns are to be placed in the delay slot. ! 340: ! 341: `INSN_ANNULLED_BRANCH_P' is set on an insn in a delay slot to ! 342: indicate that a branch insn should be used that will conditionally ! 343: annul the effect of the insns in the delay slots. In such a case, ! 344: `INSN_FROM_TARGET_P' indicates that the insn is from the target of ! 345: the branch and should be executed only if the branch is taken; ! 346: otherwise the insn should be executed only if the branch is not ! 347: taken. *Note Delay Slots::. ! 348: ! 349: These expression codes appear in place of a side effect, as the body ! 350: of an insn, though strictly speaking they do not always describe side ! 351: effects as such: ! 352: ! 353: `(asm_input S)' ! 354: Represents literal assembler code as described by the string S. ! 355: ! 356: `(unspec [OPERANDS ...] INDEX)' ! 357: `(unspec_volatile [OPERANDS ...] INDEX)' ! 358: Represents a machine-specific operation on OPERANDS. INDEX ! 359: selects between multiple machine-specific operations. ! 360: `unspec_volatile' is used for volatile operations and operations ! 361: that may trap; `unspec' is used for other operations. ! 362: ! 363: These codes may appear inside a `pattern' of an insn, inside a ! 364: `parallel', or inside an expression. ! 365: ! 366: `(addr_vec:M [LR0 LR1 ...])' ! 367: Represents a table of jump addresses. The vector elements LR0, ! 368: etc., are `label_ref' expressions. The mode M specifies how much ! 369: space is given to each address; normally M would be `Pmode'. ! 370: ! 371: `(addr_diff_vec:M BASE [LR0 LR1 ...])' ! 372: Represents a table of jump addresses expressed as offsets from ! 373: BASE. The vector elements LR0, etc., are `label_ref' expressions ! 374: and so is BASE. The mode M specifies how much space is given to ! 375: each address-difference. 1.1 root 376: 377: 1.1.1.4 ! root 378: File: gcc.info, Node: Incdec, Next: Assembler, Prev: Side Effects, Up: RTL 1.1.1.2 root 379: 1.1.1.4 ! root 380: Embedded Side-Effects on Addresses ! 381: ================================== 1.1.1.2 root 382: 1.1.1.4 ! root 383: Four special side-effect expression codes appear as memory addresses. 1.1.1.2 root 384: 1.1.1.4 ! root 385: `(pre_dec:M X)' ! 386: Represents the side effect of decrementing X by a standard amount ! 387: and represents also the value that X has after being decremented. ! 388: X must be a `reg' or `mem', but most machines allow only a `reg'. ! 389: M must be the machine mode for pointers on the machine in use. ! 390: The amount X is decremented by is the length in bytes of the ! 391: machine mode of the containing memory reference of which this ! 392: expression serves as the address. Here is an example of its use: ! 393: ! 394: (mem:DF (pre_dec:SI (reg:SI 39))) ! 395: ! 396: This says to decrement pseudo register 39 by the length of a ! 397: `DFmode' value and use the result to address a `DFmode' value. ! 398: ! 399: `(pre_inc:M X)' ! 400: Similar, but specifies incrementing X instead of decrementing it. ! 401: ! 402: `(post_dec:M X)' ! 403: Represents the same side effect as `pre_dec' but a different ! 404: value. The value represented here is the value X has before being ! 405: decremented. ! 406: ! 407: `(post_inc:M X)' ! 408: Similar, but specifies incrementing X instead of decrementing it. ! 409: ! 410: These embedded side effect expressions must be used with care. ! 411: Instruction patterns may not use them. Until the `flow' pass of the ! 412: compiler, they may occur only to represent pushes onto the stack. The ! 413: `flow' pass finds cases where registers are incremented or decremented ! 414: in one instruction and used as an address shortly before or after; ! 415: these cases are then transformed to use pre- or post-increment or ! 416: -decrement. ! 417: ! 418: If a register used as the operand of these expressions is used in ! 419: another address in an insn, the original value of the register is used. ! 420: Uses of the register outside of an address are not permitted within the ! 421: same insn as a use in an embedded side effect expression because such ! 422: insns behave differently on different machines and hence must be treated ! 423: as ambiguous and disallowed. ! 424: ! 425: An instruction that can be represented with an embedded side effect ! 426: could also be represented using `parallel' containing an additional ! 427: `set' to describe how the address register is altered. This is not ! 428: done because machines that allow these operations at all typically ! 429: allow them wherever a memory address is called for. Describing them as ! 430: additional parallel stores would require doubling the number of entries ! 431: in the machine description. 1.1.1.2 root 432: 433: 1.1.1.4 ! root 434: File: gcc.info, Node: Assembler, Next: Insns, Prev: IncDec, Up: RTL 1.1.1.2 root 435: 1.1.1.4 ! root 436: Assembler Instructions as Expressions ! 437: ===================================== 1.1.1.2 root 438: 1.1.1.4 ! root 439: The RTX code `asm_operands' represents a value produced by a ! 440: user-specified assembler instruction. It is used to represent an `asm' ! 441: statement with arguments. An `asm' statement with a single output ! 442: operand, like this: ! 443: ! 444: asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z)); ! 445: ! 446: is represented using a single `asm_operands' RTX which represents the ! 447: value that is stored in `outputvar': ! 448: ! 449: (set RTX-FOR-OUTPUTVAR ! 450: (asm_operands "foo %1,%2,%0" "a" 0 ! 451: [RTX-FOR-ADDITION-RESULT RTX-FOR-*Z] ! 452: [(asm_input:M1 "g") ! 453: (asm_input:M2 "di")])) ! 454: ! 455: Here the operands of the `asm_operands' RTX are the assembler template ! 456: string, the output-operand's constraint, the index-number of the output ! 457: operand among the output operands specified, a vector of input operand ! 458: RTX's, and a vector of input-operand modes and constraints. The mode ! 459: M1 is the mode of the sum `x+y'; M2 is that of `*z'. ! 460: ! 461: When an `asm' statement has multiple output values, its insn has ! 462: several such `set' RTX's inside of a `parallel'. Each `set' contains a ! 463: `asm_operands'; all of these share the same assembler template and ! 464: vectors, but each contains the constraint for the respective output ! 465: operand. They are also distinguished by the output-operand index ! 466: number, which is 0, 1, ... for successive output operands. 1.1.1.2 root 467: 468: 1.1.1.4 ! root 469: File: gcc.info, Node: Insns, Next: Calls, Prev: Assembler, Up: RTL 1.1.1.2 root 470: 1.1.1.4 ! root 471: Insns ! 472: ===== 1.1.1.2 root 473: 1.1.1.4 ! root 474: The RTL representation of the code for a function is a doubly-linked ! 475: chain of objects called "insns". Insns are expressions with special ! 476: codes that are used for no other purpose. Some insns are actual ! 477: instructions; others represent dispatch tables for `switch' statements; ! 478: others represent labels to jump to or various sorts of declarative ! 479: information. ! 480: ! 481: In addition to its own specific data, each insn must have a unique ! 482: id-number that distinguishes it from all other insns in the current ! 483: function (after delayed branch scheduling, copies of an insn with the ! 484: same id-number may be present in multiple places in a function, but ! 485: these copies will always be identical and will only appear inside a ! 486: `sequence'), and chain pointers to the preceding and following insns. ! 487: These three fields occupy the same position in every insn, independent ! 488: of the expression code of the insn. They could be accessed with `XEXP' ! 489: and `XINT', but instead three special macros are always used: ! 490: ! 491: `INSN_UID (I)' ! 492: Accesses the unique id of insn I. ! 493: ! 494: `PREV_INSN (I)' ! 495: Accesses the chain pointer to the insn preceding I. If I is the ! 496: first insn, this is a null pointer. ! 497: ! 498: `NEXT_INSN (I)' ! 499: Accesses the chain pointer to the insn following I. If I is the ! 500: last insn, this is a null pointer. ! 501: ! 502: The first insn in the chain is obtained by calling `get_insns'; the ! 503: last insn is the result of calling `get_last_insn'. Within the chain ! 504: delimited by these insns, the `NEXT_INSN' and `PREV_INSN' pointers must ! 505: always correspond: if INSN is not the first insn, ! 506: ! 507: NEXT_INSN (PREV_INSN (INSN)) == INSN ! 508: ! 509: is always true and if INSN is not the last insn, ! 510: ! 511: PREV_INSN (NEXT_INSN (INSN)) == INSN ! 512: ! 513: is always true. ! 514: ! 515: After delay slot scheduling, some of the insns in the chain might be ! 516: `sequence' expressions, which contain a vector of insns. The value of ! 517: `NEXT_INSN' in all but the last of these insns is the next insn in the ! 518: vector; the value of `NEXT_INSN' of the last insn in the vector is the ! 519: same as the value of `NEXT_INSN' for the `sequence' in which it is ! 520: contained. Similar rules apply for `PREV_INSN'. ! 521: ! 522: This means that the above invariants are not necessarily true for ! 523: insns inside `sequence' expressions. Specifically, if INSN is the ! 524: first insn in a `sequence', `NEXT_INSN (PREV_INSN (INSN))' is the insn ! 525: containing the `sequence' expression, as is the value of `PREV_INSN ! 526: (NEXT_INSN (INSN))' is INSN is the last insn in the `sequence' ! 527: expression. You can use these expressions to find the containing ! 528: `sequence' expression. ! 529: ! 530: Every insn has one of the following six expression codes: ! 531: ! 532: `insn' ! 533: The expression code `insn' is used for instructions that do not ! 534: jump and do not do function calls. `sequence' expressions are ! 535: always contained in insns with code `insn' even if one of those ! 536: insns should jump or do function calls. ! 537: ! 538: Insns with code `insn' have four additional fields beyond the three ! 539: mandatory ones listed above. These four are described in a table ! 540: below. ! 541: ! 542: `jump_insn' ! 543: The expression code `jump_insn' is used for instructions that may ! 544: jump (or, more generally, may contain `label_ref' expressions). If ! 545: there is an instruction to return from the current function, it is ! 546: recorded as a `jump_insn'. ! 547: ! 548: `jump_insn' insns have the same extra fields as `insn' insns, ! 549: accessed in the same way and in addition contains a field ! 550: `JUMP_LABEL' which is defined once jump optimization has completed. ! 551: ! 552: For simple conditional and unconditional jumps, this field ! 553: contains the `code_label' to which this insn will (possibly ! 554: conditionally) branch. In a more complex jump, `JUMP_LABEL' ! 555: records one of the labels that the insn refers to; the only way to ! 556: find the others is to scan the entire body of the insn. ! 557: ! 558: Return insns count as jumps, but since they do not refer to any ! 559: labels, they have zero in the `JUMP_LABEL' field. ! 560: ! 561: `call_insn' ! 562: The expression code `call_insn' is used for instructions that may ! 563: do function calls. It is important to distinguish these ! 564: instructions because they imply that certain registers and memory ! 565: locations may be altered unpredictably. ! 566: ! 567: A `call_insn' insn may be preceded by insns that contain a single ! 568: `use' expression and be followed by insns the contain a single ! 569: `clobber' expression. If so, these `use' and `clobber' ! 570: expressions are treated as being part of the function call. There ! 571: must not even be a `note' between the `call_insn' and the `use' or ! 572: `clobber' insns for this special treatment to take place. This is ! 573: somewhat of a kludge and will be removed in a later version of GNU ! 574: CC. ! 575: ! 576: `call_insn' insns have the same extra fields as `insn' insns, ! 577: accessed in the same way. ! 578: ! 579: `code_label' ! 580: A `code_label' insn represents a label that a jump insn can jump ! 581: to. It contains two special fields of data in addition to the ! 582: three standard ones. `CODE_LABEL_NUMBER' is used to hold the ! 583: "label number", a number that identifies this label uniquely among ! 584: all the labels in the compilation (not just in the current ! 585: function). Ultimately, the label is represented in the assembler ! 586: output as an assembler label, usually of the form `LN' where N is ! 587: the label number. ! 588: ! 589: When a `code_label' appears in an RTL expression, it normally ! 590: appears within a `label_ref' which represents the address of the ! 591: label, as a number. ! 592: ! 593: The field `LABEL_NUSES' is only defined once the jump optimization ! 594: phase is completed and contains the number of times this label is ! 595: referenced in the current function. ! 596: ! 597: `barrier' ! 598: Barriers are placed in the instruction stream when control cannot ! 599: flow past them. They are placed after unconditional jump ! 600: instructions to indicate that the jumps are unconditional and ! 601: after calls to `volatile' functions, which do not return (e.g., ! 602: `exit'). They contain no information beyond the three standard ! 603: fields. ! 604: ! 605: `note' ! 606: `note' insns are used to represent additional debugging and ! 607: declarative information. They contain two nonstandard fields, an ! 608: integer which is accessed with the macro `NOTE_LINE_NUMBER' and a ! 609: string accessed with `NOTE_SOURCE_FILE'. ! 610: ! 611: If `NOTE_LINE_NUMBER' is positive, the note represents the ! 612: position of a source line and `NOTE_SOURCE_FILE' is the source ! 613: file name that the line came from. These notes control generation ! 614: of line number data in the assembler output. ! 615: ! 616: Otherwise, `NOTE_LINE_NUMBER' is not really a line number but a ! 617: code with one of the following values (and `NOTE_SOURCE_FILE' must ! 618: contain a null pointer): ! 619: ! 620: `NOTE_INSN_DELETED' ! 621: Such a note is completely ignorable. Some passes of the ! 622: compiler delete insns by altering them into notes of this ! 623: kind. ! 624: ! 625: `NOTE_INSN_BLOCK_BEG' ! 626: `NOTE_INSN_BLOCK_END' ! 627: These types of notes indicate the position of the beginning ! 628: and end of a level of scoping of variable names. They ! 629: control the output of debugging information. ! 630: ! 631: `NOTE_INSN_LOOP_BEG' ! 632: `NOTE_INSN_LOOP_END' ! 633: These types of notes indicate the position of the beginning ! 634: and end of a `while' or `for' loop. They enable the loop ! 635: optimizer to find loops quickly. ! 636: ! 637: `NOTE_INSN_LOOP_CONT' ! 638: Appears at the place in a loop that `continue' statements ! 639: jump to. ! 640: ! 641: `NOTE_INSN_LOOP_VTOP' ! 642: This note indicates the place in a loop where the exit test ! 643: begins for those loops in which the exit test has been ! 644: duplicated. This position becomes another virtual start of ! 645: the loop when considering loop invariants. ! 646: ! 647: `NOTE_INSN_FUNCTION_END' ! 648: Appears near the end of the function body, just before the ! 649: label that `return' statements jump to (on machine where a ! 650: single instruction does not suffice for returning). This ! 651: note may be deleted by jump optimization. ! 652: ! 653: `NOTE_INSN_SETJMP' ! 654: Appears following each call to `setjmp' or a related function. ! 655: ! 656: These codes are printed symbolically when they appear in debugging ! 657: dumps. ! 658: ! 659: The machine mode of an insn is normally `VOIDmode', but some phases ! 660: use the mode for various purposes; for example, the reload pass sets it ! 661: to `HImode' if the insn needs reloading but not register elimination ! 662: and `QImode' if both are required. The common subexpression ! 663: elimination pass sets the mode of an insn to `QImode' when it is the ! 664: first insn in a block that has already been processed. ! 665: ! 666: Here is a table of the extra fields of `insn', `jump_insn' and ! 667: `call_insn' insns: ! 668: ! 669: `PATTERN (I)' ! 670: An expression for the side effect performed by this insn. This ! 671: must be one of the following codes: `set', `call', `use', ! 672: `clobber', `return', `asm_input', `asm_output', `addr_vec', ! 673: `addr_diff_vec', `trap_if', `unspec', `unspec_volatile', ! 674: `parallel', or `sequence'. If it is a `parallel', each element of ! 675: the `parallel' must be one these codes, except that `parallel' ! 676: expressions cannot be nested and `addr_vec' and `addr_diff_vec' ! 677: are not permitted inside a `parallel' expression. ! 678: ! 679: `INSN_CODE (I)' ! 680: An integer that says which pattern in the machine description ! 681: matches this insn, or -1 if the matching has not yet been ! 682: attempted. ! 683: ! 684: Such matching is never attempted and this field remains -1 on an ! 685: insn whose pattern consists of a single `use', `clobber', ! 686: `asm_input', `addr_vec' or `addr_diff_vec' expression. ! 687: ! 688: Matching is also never attempted on insns that result from an `asm' ! 689: statement. These contain at least one `asm_operands' expression. ! 690: The function `asm_noperands' returns a non-negative value for such ! 691: insns. ! 692: ! 693: In the debugging output, this field is printed as a number ! 694: followed by a symbolic representation that locates the pattern in ! 695: the `md' file as some small positive or negative offset from a ! 696: named pattern. ! 697: ! 698: `LOG_LINKS (I)' ! 699: A list (chain of `insn_list' expressions) giving information about ! 700: dependencies between instructions within a basic block. Neither a ! 701: jump nor a label may come between the related insns. ! 702: ! 703: `REG_NOTES (I)' ! 704: A list (chain of `expr_list' and `insn_list' expressions) giving ! 705: miscellaneous information about the insn. It is often information ! 706: pertaining to the registers used in this insn. ! 707: ! 708: The `LOG_LINKS' field of an insn is a chain of `insn_list' ! 709: expressions. Each of these has two operands: the first is an insn, and ! 710: the second is another `insn_list' expression (the next one in the ! 711: chain). The last `insn_list' in the chain has a null pointer as second ! 712: operand. The significant thing about the chain is which insns appear ! 713: in it (as first operands of `insn_list' expressions). Their order is ! 714: not significant. ! 715: ! 716: This list is originally set up by the flow analysis pass; it is a ! 717: null pointer until then. Flow only adds links for those data ! 718: dependencies which can be used for instruction combination. For each ! 719: insn, the flow analysis pass adds a link to insns which store into ! 720: registers values that are used for the first time in this insn. The ! 721: instruction scheduling pass adds extra links so that every dependence ! 722: will be represented. Links represent data dependencies, ! 723: antidependencies and output dependencies; the machine mode of the link ! 724: distinguishes these three types: antidependencies have mode ! 725: `REG_DEP_ANTI', output dependencies have mode `REG_DEP_OUTPUT', and ! 726: data dependencies have mode `VOIDmode'. ! 727: ! 728: The `REG_NOTES' field of an insn is a chain similar to the ! 729: `LOG_LINKS' field but it includes `expr_list' expressions in addition ! 730: to `insn_list' expressions. There are several kinds of register notes, ! 731: which are distinguished by the machine mode, which in a register note ! 732: is really understood as being an `enum reg_note'. The first operand OP ! 733: of the note is data whose meaning depends on the kind of note. ! 734: ! 735: The macro `REG_NOTE_KIND (X)' returns the kind of register note. ! 736: Its counterpart, the macro `PUT_REG_NOTE_KIND (X, NEWKIND)' sets the ! 737: register note type of X to be NEWKIND. ! 738: ! 739: Register notes are of three classes: They may say something about an ! 740: input to an insn, they may say something about an output of an insn, or ! 741: they may create a linkage between two insns. There are also a set of ! 742: values that are only used in `LOG_LINKS'. ! 743: ! 744: These register notes annotate inputs to an insn: ! 745: ! 746: `REG_DEAD' ! 747: The value in OP dies in this insn; that is to say, altering the ! 748: value immediately after this insn would not affect the future ! 749: behavior of the program. ! 750: ! 751: This does not necessarily mean that the register OP has no useful ! 752: value after this insn since it may also be an output of the insn. ! 753: In such a case, however, a `REG_DEAD' note would be redundant and ! 754: is usually not present until after the reload pass, but no code ! 755: relies on this fact. ! 756: ! 757: `REG_INC' ! 758: The register OP is incremented (or decremented; at this level ! 759: there is no distinction) by an embedded side effect inside this ! 760: insn. This means it appears in a `post_inc', `pre_inc', `post_dec' ! 761: or `pre_dec' expression. ! 762: ! 763: `REG_NONNEG' ! 764: The register OP is known to have a nonnegative value when this ! 765: insn is reached. This is used so that decrement and branch until ! 766: zero instructions, such as the m68k dbra, can be matched. ! 767: ! 768: The `REG_NONNEG' note is added to insns only if the machine ! 769: description contains a pattern named ! 770: `decrement_and_branch_until_zero'. ! 771: ! 772: `REG_NO_CONFLICT' ! 773: This insn does not cause a conflict between OP and the item being ! 774: set by this insn even though it might appear that it does. In ! 775: other words, if the destination register and OP could otherwise be ! 776: assigned the same register, this insn does not prevent that ! 777: assignment. ! 778: ! 779: Insns with this note are usually part of a block that begins with a ! 780: `clobber' insn specifying a multi-word pseudo register (which will ! 781: be the output of the block), a group of insns that each set one ! 782: word of the value and have the `REG_NO_CONFLICT' note attached, ! 783: and a final insn that copies the output to itself with an attached ! 784: `REG_EQUAL' note giving the expression being computed. This block ! 785: is encapsulated with `REG_LIBCALL' and `REG_RETVAL' notes on the ! 786: first and last insns, respectively. ! 787: ! 788: `REG_LABEL' ! 789: This insn uses OP, a `code_label', but is not a `jump_insn'. The ! 790: presence of this note allows jump optimization to be aware that OP ! 791: is, in fact, being used. ! 792: ! 793: The following notes describe attributes of outputs of an insn: ! 794: ! 795: `REG_EQUIV' ! 796: `REG_EQUAL' ! 797: This note is only valid on an insn that sets only one register and ! 798: indicates that that register will be equal to OP at run time; the ! 799: scope of this equivalence differs between the two types of notes. ! 800: The value which the insn explicitly copies into the register may ! 801: look different from OP, but they will be equal at run time. If the ! 802: output of the single `set' is a `strict_low_part' expression, the ! 803: note refers to the register that is contained in `SUBREG_REG' of ! 804: the `subreg' expression. ! 805: ! 806: For `REG_EQUIV', the register is equivalent to OP throughout the ! 807: entire function, and could validly be replaced in all its ! 808: occurrences by OP. ("Validly" here refers to the data flow of the ! 809: program; simple replacement may make some insns invalid.) For ! 810: example, when a constant is loaded into a register that is never ! 811: assigned any other value, this kind of note is used. ! 812: ! 813: When a parameter is copied into a pseudo-register at entry to a ! 814: function, a note of this kind records that the register is ! 815: equivalent to the stack slot where the parameter was passed. ! 816: Although in this case the register may be set by other insns, it ! 817: is still valid to replace the register by the stack slot ! 818: throughout the function. ! 819: ! 820: In the case of `REG_EQUAL', the register that is set by this insn ! 821: will be equal to OP at run time at the end of this insn but not ! 822: necessarily elsewhere in the function. In this case, OP is ! 823: typically an arithmetic expression. For example, when a sequence ! 824: of insns such as a library call is used to perform an arithmetic ! 825: operation, this kind of note is attached to the insn that produces ! 826: or copies the final value. ! 827: ! 828: These two notes are used in different ways by the compiler passes. ! 829: `REG_EQUAL' is used by passes prior to register allocation (such as ! 830: common subexpression elimination and loop optimization) to tell ! 831: them how to think of that value. `REG_EQUIV' notes are used by ! 832: register allocation to indicate that there is an available ! 833: substitute expression (either a constant or a `mem' expression for ! 834: the location of a parameter on the stack) that may be used in ! 835: place of a register if insufficient registers are available. ! 836: ! 837: Except for stack homes for parameters, which are indicated by a ! 838: `REG_EQUIV' note and are not useful to the early optimization ! 839: passes and pseudo registers that are equivalent to a memory ! 840: location throughout there entire life, which is not detected until ! 841: later in the compilation, all equivalences are initially indicated ! 842: by an attached `REG_EQUAL' note. In the early stages of register ! 843: allocation, a `REG_EQUAL' note is changed into a `REG_EQUIV' note ! 844: if OP is a constant and the insn represents the only set of its ! 845: destination register. ! 846: ! 847: Thus, compiler passes prior to register allocation need only check ! 848: for `REG_EQUAL' notes and passes subsequent to register allocation ! 849: need only check for `REG_EQUIV' notes. ! 850: ! 851: `REG_UNUSED' ! 852: The register OP being set by this insn will not be used in a ! 853: subsequent insn. This differs from a `REG_DEAD' note, which ! 854: indicates that the value in an input will not be used subsequently. ! 855: These two notes are independent; both may be present for the same ! 856: register. 1.1.1.2 root 857: 1.1.1.4 ! root 858: `REG_WAS_0' ! 859: The single output of this insn contained zero before this insn. OP ! 860: is the insn that set it to zero. You can rely on this note if it ! 861: is present and OP has not been deleted or turned into a `note'; ! 862: its absence implies nothing. ! 863: ! 864: These notes describe linkages between insns. They occur in pairs: ! 865: one insn has one of a pair of notes that points to a second insn, which ! 866: has the inverse note pointing back to the first insn. ! 867: ! 868: `REG_RETVAL' ! 869: This insn copies the value of a multi-insn sequence (for example, a ! 870: library call), and OP is the first insn of the sequence (for a ! 871: library call, the first insn that was generated to set up the ! 872: arguments for the library call). ! 873: ! 874: Loop optimization uses this note to treat such a sequence as a ! 875: single operation for code motion purposes and flow analysis uses ! 876: this note to delete such sequences whose results are dead. ! 877: ! 878: A `REG_EQUAL' note will also usually be attached to this insn to ! 879: provide the expression being computed by the sequence. ! 880: ! 881: `REG_LIBCALL' ! 882: This is the inverse of `REG_RETVAL': it is placed on the first ! 883: insn of a multi-insn sequence, and it points to the last one. ! 884: ! 885: `REG_CC_SETTER' ! 886: `REG_CC_USER' ! 887: On machines that use `cc0', the insns which set and use `cc0' set ! 888: and use `cc0' are adjacent. However, when branch delay slot ! 889: filling is done, this may no longer be true. In this case a ! 890: `REG_CC_USER' note will be placed on the insn setting `cc0' to ! 891: point to the insn using `cc0' and a `REG_CC_SETTER' note will be ! 892: placed on the insn using `cc0' to point to the insn setting `cc0'. ! 893: ! 894: These values are only used in the `LOG_LINKS' field, and indicate ! 895: the type of dependency that each link represents. Links which indicate ! 896: a data dependence (a read after write dependence) do not use any code, ! 897: they simply have mode `VOIDmode', and are printed without any ! 898: descriptive text. ! 899: ! 900: `REG_DEP_ANTI' ! 901: This indicates an anti dependence (a write after read dependence). ! 902: ! 903: `REG_DEP_OUTPUT' ! 904: This indicates an output dependence (a write after write ! 905: dependence). ! 906: ! 907: For convenience, the machine mode in an `insn_list' or `expr_list' ! 908: is printed using these symbolic codes in debugging dumps. ! 909: ! 910: The only difference between the expression codes `insn_list' and ! 911: `expr_list' is that the first operand of an `insn_list' is assumed to ! 912: be an insn and is printed in debugging dumps as the insn's unique id; ! 913: the first operand of an `expr_list' is printed in the ordinary way as ! 914: an expression. 1.1.1.2 root 915: 916: 1.1.1.4 ! root 917: File: gcc.info, Node: Calls, Next: Sharing, Prev: Insns, Up: RTL 1.1.1.2 root 918: 1.1.1.4 ! root 919: RTL Representation of Function-Call Insns ! 920: ========================================= 1.1.1.2 root 921: 1.1.1.4 ! root 922: Insns that call subroutines have the RTL expression code `call_insn'. ! 923: These insns must satisfy special rules, and their bodies must use a ! 924: special RTL expression code, `call'. ! 925: ! 926: A `call' expression has two operands, as follows: ! 927: ! 928: (call (mem:FM ADDR) NBYTES) ! 929: ! 930: Here NBYTES is an operand that represents the number of bytes of ! 931: argument data being passed to the subroutine, FM is a machine mode ! 932: (which must equal as the definition of the `FUNCTION_MODE' macro in the ! 933: machine description) and ADDR represents the address of the subroutine. ! 934: ! 935: For a subroutine that returns no value, the `call' expression as ! 936: shown above is the entire body of the insn, except that the insn might ! 937: also contain `use' or `clobber' expressions. ! 938: ! 939: For a subroutine that returns a value whose mode is not `BLKmode', ! 940: the value is returned in a hard register. If this register's number is ! 941: R, then the body of the call insn looks like this: ! 942: ! 943: (set (reg:M R) ! 944: (call (mem:FM ADDR) NBYTES)) ! 945: ! 946: This RTL expression makes it clear (to the optimizer passes) that the ! 947: appropriate register receives a useful value in this insn. ! 948: ! 949: When a subroutine returns a `BLKmode' value, it is handled by ! 950: passing to the subroutine the address of a place to store the value. So ! 951: the call insn itself does not "return" any value, and it has the same ! 952: RTL form as a call that returns nothing. ! 953: ! 954: On some machines, the call instruction itself clobbers some register, ! 955: for example to contain the return address. `call_insn' insns on these ! 956: machines should have a body which is a `parallel' that contains both ! 957: the `call' expression and `clobber' expressions that indicate which ! 958: registers are destroyed. Similarly, if the call instruction requires ! 959: some register other than the stack pointer that is not explicitly ! 960: mentioned it its RTL, a `use' subexpression should mention that ! 961: register. ! 962: ! 963: Functions that are called are assumed to modify all registers listed ! 964: in the configuration macro `CALL_USED_REGISTERS' (*note Register ! 965: Basics::.) and, with the exception of `const' functions and library ! 966: calls, to modify all of memory. ! 967: ! 968: Insns containing just `use' expressions directly precede the ! 969: `call_insn' insn to indicate which registers contain inputs to the ! 970: function. Similarly, if registers other than those in ! 971: `CALL_USED_REGISTERS' are clobbered by the called function, insns ! 972: containing a single `clobber' follow immediately after the call to ! 973: indicate which registers. 1.1.1.2 root 974: 1.1.1.4 ! root 975: ! 976: File: gcc.info, Node: Sharing, Prev: Calls, Up: RTL 1.1.1.2 root 977: 1.1.1.4 ! root 978: Structure Sharing Assumptions ! 979: ============================= ! 980: ! 981: The compiler assumes that certain kinds of RTL expressions are ! 982: unique; there do not exist two distinct objects representing the same ! 983: value. In other cases, it makes an opposite assumption: that no RTL ! 984: expression object of a certain kind appears in more than one place in ! 985: the containing structure. ! 986: ! 987: These assumptions refer to a single function; except for the RTL ! 988: objects that describe global variables and external functions, and a ! 989: few standard objects such as small integer constants, no RTL objects ! 990: are common to two functions. ! 991: ! 992: * Each pseudo-register has only a single `reg' object to represent ! 993: it, and therefore only a single machine mode. ! 994: ! 995: * For any symbolic label, there is only one `symbol_ref' object ! 996: referring to it. ! 997: ! 998: * There is only one `const_int' expression with value 0, only one ! 999: with value 1, and only one with value -1. Some other integer ! 1000: values are also stored uniquely. ! 1001: ! 1002: * There is only one `pc' expression. ! 1003: ! 1004: * There is only one `cc0' expression. ! 1005: ! 1006: * There is only one `const_double' expression with value 0 for each ! 1007: floating point mode. Likewise for values 1 and 2. ! 1008: ! 1009: * No `label_ref' or `scratch' appears in more than one place in the ! 1010: RTL structure; in other words, it is safe to do a tree-walk of all ! 1011: the insns in the function and assume that each time a `label_ref' ! 1012: or `scratch' is seen it is distinct from all others that are seen. ! 1013: ! 1014: * Only one `mem' object is normally created for each static variable ! 1015: or stack slot, so these objects are frequently shared in all the ! 1016: places they appear. However, separate but equal objects for these ! 1017: variables are occasionally made. ! 1018: ! 1019: * When a single `asm' statement has multiple output operands, a ! 1020: distinct `asm_operands' expression is made for each output operand. ! 1021: However, these all share the vector which contains the sequence of ! 1022: input operands. This sharing is used later on to test whether two ! 1023: `asm_operands' expressions come from the same statement, so all ! 1024: optimizations must carefully preserve the sharing if they copy the ! 1025: vector at all. ! 1026: ! 1027: * No RTL object appears in more than one place in the RTL structure ! 1028: except as described above. Many passes of the compiler rely on ! 1029: this by assuming that they can modify RTL objects in place without ! 1030: unwanted side-effects on other insns. ! 1031: ! 1032: * During initial RTL generation, shared structure is freely ! 1033: introduced. After all the RTL for a function has been generated, ! 1034: all shared structure is copied by `unshare_all_rtl' in ! 1035: `emit-rtl.c', after which the above rules are guaranteed to be ! 1036: followed. ! 1037: ! 1038: * During the combiner pass, shared structure within an insn can exist ! 1039: temporarily. However, the shared structure is copied before the ! 1040: combiner is finished with the insn. This is done by calling ! 1041: `copy_rtx_if_shared', which is a subroutine of `unshare_all_rtl'. 1.1.1.2 root 1042: 1043: 1.1.1.4 ! root 1044: File: gcc.info, Node: Machine Desc, Next: Target Macros, Prev: RTL, Up: Top ! 1045: ! 1046: Machine Descriptions ! 1047: ******************** 1.1.1.2 root 1048: 1.1.1.4 ! root 1049: A machine description has two parts: a file of instruction patterns ! 1050: (`.md' file) and a C header file of macro definitions. ! 1051: ! 1052: The `.md' file for a target machine contains a pattern for each ! 1053: instruction that the target machine supports (or at least each ! 1054: instruction that is worth telling the compiler about). It may also ! 1055: contain comments. A semicolon causes the rest of the line to be a ! 1056: comment, unless the semicolon is inside a quoted string. ! 1057: ! 1058: See the next chapter for information on the C header file. ! 1059: ! 1060: * Menu: 1.1.1.2 root 1061: 1.1.1.4 ! root 1062: * Patterns:: How to write instruction patterns. ! 1063: * Example:: An explained example of a `define_insn' pattern. ! 1064: * RTL Template:: The RTL template defines what insns match a pattern. ! 1065: * Output Template:: The output template says how to make assembler code ! 1066: from such an insn. ! 1067: * Output Statement:: For more generality, write C code to output ! 1068: the assembler code. ! 1069: * Constraints:: When not all operands are general operands. ! 1070: * Standard Names:: Names mark patterns to use for code generation. ! 1071: * Pattern Ordering:: When the order of patterns makes a difference. ! 1072: * Dependent Patterns:: Having one pattern may make you need another. ! 1073: * Jump Patterns:: Special considerations for patterns for jump insns. ! 1074: * Insn Canonicalizations::Canonicalization of Instructions ! 1075: * Peephole Definitions::Defining machine-specific peephole optimizations. ! 1076: * Expander Definitions::Generating a sequence of several RTL insns ! 1077: for a standard operation. ! 1078: * Insn Splitting:: Splitting Instructions into Multiple Instructions ! 1079: * Insn Attributes:: Specifying the value of attributes for generated insns. 1.1.1.2 root 1080: 1.1 root 1081:
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