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1.1.1.7 ! root 1: This is Info file gcc.info, produced by Makeinfo-1.55 from the input 1.1 root 2: file gcc.texi. 3: 4: This file documents the use and the internals of the GNU compiler. 5: 1.1.1.5 root 6: Published by the Free Software Foundation 675 Massachusetts Avenue 7: Cambridge, MA 02139 USA 8: 1.1.1.7 ! root 9: Copyright (C) 1988, 1989, 1992, 1993, 1994 Free Software Foundation, ! 10: Inc. 1.1 root 11: 1.1.1.3 root 12: Permission is granted to make and distribute verbatim copies of this 13: manual provided the copyright notice and this permission notice are 14: preserved on all copies. 1.1 root 15: 16: Permission is granted to copy and distribute modified versions of 17: this manual under the conditions for verbatim copying, provided also 1.1.1.7 ! root 18: that the sections entitled "GNU General Public License," "Funding for ! 19: Free Software," and "Protect Your Freedom--Fight `Look And Feel'" are ! 20: included exactly as in the original, and provided that the entire ! 21: resulting derived work is distributed under the terms of a permission ! 22: notice identical to this one. 1.1 root 23: 24: Permission is granted to copy and distribute translations of this 25: manual into another language, under the above conditions for modified 1.1.1.3 root 26: versions, except that the sections entitled "GNU General Public 1.1.1.7 ! root 27: License," "Funding for Free Software," and "Protect Your Freedom--Fight ! 28: `Look And Feel'", and this permission notice, may be included in ! 29: translations approved by the Free Software Foundation instead of in the ! 30: original English. 1.1.1.3 root 31: 32: 1.1.1.7 ! root 33: File: gcc.info, Node: Output Statement, Next: Constraints, Prev: Output Template, Up: Machine Desc 1.1.1.3 root 34: 1.1.1.7 ! root 35: C Statements for Assembler Output ! 36: ================================= 1.1.1.4 root 37: 1.1.1.7 ! root 38: Often a single fixed template string cannot produce correct and ! 39: efficient assembler code for all the cases that are recognized by a ! 40: single instruction pattern. For example, the opcodes may depend on the ! 41: kinds of operands; or some unfortunate combinations of operands may ! 42: require extra machine instructions. ! 43: ! 44: If the output control string starts with a `@', then it is actually ! 45: a series of templates, each on a separate line. (Blank lines and ! 46: leading spaces and tabs are ignored.) The templates correspond to the ! 47: pattern's constraint alternatives (*note Multi-Alternative::.). For ! 48: example, if a target machine has a two-address add instruction `addr' ! 49: to add into a register and another `addm' to add a register to memory, ! 50: you might write this pattern: ! 51: ! 52: (define_insn "addsi3" ! 53: [(set (match_operand:SI 0 "general_operand" "=r,m") ! 54: (plus:SI (match_operand:SI 1 "general_operand" "0,0") ! 55: (match_operand:SI 2 "general_operand" "g,r")))] ! 56: "" ! 57: "@ ! 58: addr %2,%0 ! 59: addm %2,%0") ! 60: ! 61: If the output control string starts with a `*', then it is not an ! 62: output template but rather a piece of C program that should compute a ! 63: template. It should execute a `return' statement to return the ! 64: template-string you want. Most such templates use C string literals, ! 65: which require doublequote characters to delimit them. To include these ! 66: doublequote characters in the string, prefix each one with `\'. ! 67: ! 68: The operands may be found in the array `operands', whose C data type ! 69: is `rtx []'. ! 70: ! 71: It is very common to select different ways of generating assembler ! 72: code based on whether an immediate operand is within a certain range. ! 73: Be careful when doing this, because the result of `INTVAL' is an ! 74: integer on the host machine. If the host machine has more bits in an ! 75: `int' than the target machine has in the mode in which the constant ! 76: will be used, then some of the bits you get from `INTVAL' will be ! 77: superfluous. For proper results, you must carefully disregard the ! 78: values of those bits. ! 79: ! 80: It is possible to output an assembler instruction and then go on to ! 81: output or compute more of them, using the subroutine `output_asm_insn'. ! 82: This receives two arguments: a template-string and a vector of ! 83: operands. The vector may be `operands', or it may be another array of ! 84: `rtx' that you declare locally and initialize yourself. ! 85: ! 86: When an insn pattern has multiple alternatives in its constraints, ! 87: often the appearance of the assembler code is determined mostly by ! 88: which alternative was matched. When this is so, the C code can test ! 89: the variable `which_alternative', which is the ordinal number of the ! 90: alternative that was actually satisfied (0 for the first, 1 for the ! 91: second alternative, etc.). ! 92: ! 93: For example, suppose there are two opcodes for storing zero, `clrreg' ! 94: for registers and `clrmem' for memory locations. Here is how a pattern ! 95: could use `which_alternative' to choose between them: 1.1.1.6 root 96: 1.1.1.7 ! root 97: (define_insn "" ! 98: [(set (match_operand:SI 0 "general_operand" "=r,m") ! 99: (const_int 0))] ! 100: "" ! 101: "* ! 102: return (which_alternative == 0 ! 103: ? \"clrreg %0\" : \"clrmem %0\"); ! 104: ") ! 105: ! 106: The example above, where the assembler code to generate was *solely* ! 107: determined by the alternative, could also have been specified as ! 108: follows, having the output control string start with a `@': 1.1.1.6 root 109: 1.1.1.7 ! root 110: (define_insn "" ! 111: [(set (match_operand:SI 0 "general_operand" "=r,m") ! 112: (const_int 0))] ! 113: "" ! 114: "@ ! 115: clrreg %0 ! 116: clrmem %0") 1.1.1.3 root 117: 118: 1.1.1.7 ! root 119: File: gcc.info, Node: Constraints, Next: Standard Names, Prev: Output Statement, Up: Machine Desc 1.1.1.5 root 120: 1.1.1.7 ! root 121: Operand Constraints ! 122: =================== 1.1.1.3 root 123: 1.1.1.7 ! root 124: Each `match_operand' in an instruction pattern can specify a ! 125: constraint for the type of operands allowed. Constraints can say ! 126: whether an operand may be in a register, and which kinds of register; ! 127: whether the operand can be a memory reference, and which kinds of ! 128: address; whether the operand may be an immediate constant, and which ! 129: possible values it may have. Constraints can also require two operands ! 130: to match. ! 131: ! 132: * Menu: ! 133: ! 134: * Simple Constraints:: Basic use of constraints. ! 135: * Multi-Alternative:: When an insn has two alternative constraint-patterns. ! 136: * Class Preferences:: Constraints guide which hard register to put things in. ! 137: * Modifiers:: More precise control over effects of constraints. ! 138: * Machine Constraints:: Existing constraints for some particular machines. ! 139: * No Constraints:: Describing a clean machine without constraints. 1.1.1.4 root 140: 141: 1.1.1.7 ! root 142: File: gcc.info, Node: Simple Constraints, Next: Multi-Alternative, Up: Constraints ! 143: ! 144: Simple Constraints ! 145: ------------------ 1.1.1.5 root 146: 1.1.1.7 ! root 147: The simplest kind of constraint is a string full of letters, each of ! 148: which describes one kind of operand that is permitted. Here are the ! 149: letters that are allowed: ! 150: ! 151: `m' ! 152: A memory operand is allowed, with any kind of address that the ! 153: machine supports in general. ! 154: ! 155: `o' ! 156: A memory operand is allowed, but only if the address is ! 157: "offsettable". This means that adding a small integer (actually, ! 158: the width in bytes of the operand, as determined by its machine ! 159: mode) may be added to the address and the result is also a valid ! 160: memory address. ! 161: ! 162: For example, an address which is constant is offsettable; so is an ! 163: address that is the sum of a register and a constant (as long as a ! 164: slightly larger constant is also within the range of ! 165: address-offsets supported by the machine); but an autoincrement or ! 166: autodecrement address is not offsettable. More complicated ! 167: indirect/indexed addresses may or may not be offsettable depending ! 168: on the other addressing modes that the machine supports. ! 169: ! 170: Note that in an output operand which can be matched by another ! 171: operand, the constraint letter `o' is valid only when accompanied ! 172: by both `<' (if the target machine has predecrement addressing) ! 173: and `>' (if the target machine has preincrement addressing). ! 174: ! 175: `V' ! 176: A memory operand that is not offsettable. In other words, ! 177: anything that would fit the `m' constraint but not the `o' ! 178: constraint. ! 179: ! 180: `<' ! 181: A memory operand with autodecrement addressing (either ! 182: predecrement or postdecrement) is allowed. ! 183: ! 184: `>' ! 185: A memory operand with autoincrement addressing (either ! 186: preincrement or postincrement) is allowed. ! 187: ! 188: `r' ! 189: A register operand is allowed provided that it is in a general ! 190: register. ! 191: ! 192: `d', `a', `f', ... ! 193: Other letters can be defined in machine-dependent fashion to stand ! 194: for particular classes of registers. `d', `a' and `f' are defined ! 195: on the 68000/68020 to stand for data, address and floating point ! 196: registers. ! 197: ! 198: `i' ! 199: An immediate integer operand (one with constant value) is allowed. ! 200: This includes symbolic constants whose values will be known only at ! 201: assembly time. ! 202: ! 203: `n' ! 204: An immediate integer operand with a known numeric value is allowed. ! 205: Many systems cannot support assembly-time constants for operands ! 206: less than a word wide. Constraints for these operands should use ! 207: `n' rather than `i'. ! 208: ! 209: `I', `J', `K', ... `P' ! 210: Other letters in the range `I' through `P' may be defined in a ! 211: machine-dependent fashion to permit immediate integer operands with ! 212: explicit integer values in specified ranges. For example, on the ! 213: 68000, `I' is defined to stand for the range of values 1 to 8. ! 214: This is the range permitted as a shift count in the shift ! 215: instructions. ! 216: ! 217: `E' ! 218: An immediate floating operand (expression code `const_double') is ! 219: allowed, but only if the target floating point format is the same ! 220: as that of the host machine (on which the compiler is running). ! 221: ! 222: `F' ! 223: An immediate floating operand (expression code `const_double') is ! 224: allowed. ! 225: ! 226: `G', `H' ! 227: `G' and `H' may be defined in a machine-dependent fashion to ! 228: permit immediate floating operands in particular ranges of values. ! 229: ! 230: `s' ! 231: An immediate integer operand whose value is not an explicit ! 232: integer is allowed. ! 233: ! 234: This might appear strange; if an insn allows a constant operand ! 235: with a value not known at compile time, it certainly must allow ! 236: any known value. So why use `s' instead of `i'? Sometimes it ! 237: allows better code to be generated. ! 238: ! 239: For example, on the 68000 in a fullword instruction it is possible ! 240: to use an immediate operand; but if the immediate value is between ! 241: -128 and 127, better code results from loading the value into a ! 242: register and using the register. This is because the load into ! 243: the register can be done with a `moveq' instruction. We arrange ! 244: for this to happen by defining the letter `K' to mean "any integer ! 245: outside the range -128 to 127", and then specifying `Ks' in the ! 246: operand constraints. ! 247: ! 248: `g' ! 249: Any register, memory or immediate integer operand is allowed, ! 250: except for registers that are not general registers. ! 251: ! 252: `X' ! 253: Any operand whatsoever is allowed, even if it does not satisfy ! 254: `general_operand'. This is normally used in the constraint of a ! 255: `match_scratch' when certain alternatives will not actually ! 256: require a scratch register. ! 257: ! 258: `0', `1', `2', ... `9' ! 259: An operand that matches the specified operand number is allowed. ! 260: If a digit is used together with letters within the same ! 261: alternative, the digit should come last. ! 262: ! 263: This is called a "matching constraint" and what it really means is ! 264: that the assembler has only a single operand that fills two roles ! 265: considered separate in the RTL insn. For example, an add insn has ! 266: two input operands and one output operand in the RTL, but on most ! 267: CISC machines an add instruction really has only two operands, one ! 268: of them an input-output operand: ! 269: ! 270: addl #35,r12 ! 271: ! 272: Matching constraints are used in these circumstances. More ! 273: precisely, the two operands that match must include one input-only ! 274: operand and one output-only operand. Moreover, the digit must be a ! 275: smaller number than the number of the operand that uses it in the ! 276: constraint. ! 277: ! 278: For operands to match in a particular case usually means that they ! 279: are identical-looking RTL expressions. But in a few special cases ! 280: specific kinds of dissimilarity are allowed. For example, `*x' as ! 281: an input operand will match `*x++' as an output operand. For ! 282: proper results in such cases, the output template should always ! 283: use the output-operand's number when printing the operand. ! 284: ! 285: `p' ! 286: An operand that is a valid memory address is allowed. This is for ! 287: "load address" and "push address" instructions. ! 288: ! 289: `p' in the constraint must be accompanied by `address_operand' as ! 290: the predicate in the `match_operand'. This predicate interprets ! 291: the mode specified in the `match_operand' as the mode of the memory ! 292: reference for which the address would be valid. ! 293: ! 294: `Q', `R', `S', ... `U' ! 295: Letters in the range `Q' through `U' may be defined in a ! 296: machine-dependent fashion to stand for arbitrary operand types. ! 297: The machine description macro `EXTRA_CONSTRAINT' is passed the ! 298: operand as its first argument and the constraint letter as its ! 299: second operand. ! 300: ! 301: A typical use for this would be to distinguish certain types of ! 302: memory references that affect other insn operands. ! 303: ! 304: Do not define these constraint letters to accept register ! 305: references (`reg'); the reload pass does not expect this and would ! 306: not handle it properly. ! 307: ! 308: In order to have valid assembler code, each operand must satisfy its ! 309: constraint. But a failure to do so does not prevent the pattern from ! 310: applying to an insn. Instead, it directs the compiler to modify the ! 311: code so that the constraint will be satisfied. Usually this is done by ! 312: copying an operand into a register. ! 313: ! 314: Contrast, therefore, the two instruction patterns that follow: ! 315: ! 316: (define_insn "" ! 317: [(set (match_operand:SI 0 "general_operand" "=r") ! 318: (plus:SI (match_dup 0) ! 319: (match_operand:SI 1 "general_operand" "r")))] ! 320: "" ! 321: "...") 1.1.1.3 root 322: 1.1.1.7 ! root 323: which has two operands, one of which must appear in two places, and 1.1.1.4 root 324: 1.1.1.6 root 325: (define_insn "" 1.1.1.7 ! root 326: [(set (match_operand:SI 0 "general_operand" "=r") ! 327: (plus:SI (match_operand:SI 1 "general_operand" "0") ! 328: (match_operand:SI 2 "general_operand" "r")))] ! 329: "" 1.1.1.6 root 330: "...") 1.1.1.5 root 331: 1.1.1.7 ! root 332: which has three operands, two of which are required by a constraint to ! 333: be identical. If we are considering an insn of the form ! 334: ! 335: (insn N PREV NEXT ! 336: (set (reg:SI 3) ! 337: (plus:SI (reg:SI 6) (reg:SI 109))) ! 338: ...) ! 339: ! 340: the first pattern would not apply at all, because this insn does not ! 341: contain two identical subexpressions in the right place. The pattern ! 342: would say, "That does not look like an add instruction; try other ! 343: patterns." The second pattern would say, "Yes, that's an add ! 344: instruction, but there is something wrong with it." It would direct ! 345: the reload pass of the compiler to generate additional insns to make ! 346: the constraint true. The results might look like this: 1.1.1.5 root 347: 1.1.1.7 ! root 348: (insn N2 PREV N ! 349: (set (reg:SI 3) (reg:SI 6)) ! 350: ...) 1.1.1.5 root 351: 1.1.1.7 ! root 352: (insn N N2 NEXT ! 353: (set (reg:SI 3) ! 354: (plus:SI (reg:SI 3) (reg:SI 109))) ! 355: ...) 1.1.1.5 root 356: 1.1.1.7 ! root 357: It is up to you to make sure that each operand, in each pattern, has ! 358: constraints that can handle any RTL expression that could be present for ! 359: that operand. (When multiple alternatives are in use, each pattern ! 360: must, for each possible combination of operand expressions, have at ! 361: least one alternative which can handle that combination of operands.) ! 362: The constraints don't need to *allow* any possible operand--when this is ! 363: the case, they do not constrain--but they must at least point the way to ! 364: reloading any possible operand so that it will fit. ! 365: ! 366: * If the constraint accepts whatever operands the predicate permits, ! 367: there is no problem: reloading is never necessary for this operand. ! 368: ! 369: For example, an operand whose constraints permit everything except ! 370: registers is safe provided its predicate rejects registers. ! 371: ! 372: An operand whose predicate accepts only constant values is safe ! 373: provided its constraints include the letter `i'. If any possible ! 374: constant value is accepted, then nothing less than `i' will do; if ! 375: the predicate is more selective, then the constraints may also be ! 376: more selective. ! 377: ! 378: * Any operand expression can be reloaded by copying it into a ! 379: register. So if an operand's constraints allow some kind of ! 380: register, it is certain to be safe. It need not permit all ! 381: classes of registers; the compiler knows how to copy a register ! 382: into another register of the proper class in order to make an ! 383: instruction valid. ! 384: ! 385: * A nonoffsettable memory reference can be reloaded by copying the ! 386: address into a register. So if the constraint uses the letter ! 387: `o', all memory references are taken care of. ! 388: ! 389: * A constant operand can be reloaded by allocating space in memory to ! 390: hold it as preinitialized data. Then the memory reference can be ! 391: used in place of the constant. So if the constraint uses the ! 392: letters `o' or `m', constant operands are not a problem. ! 393: ! 394: * If the constraint permits a constant and a pseudo register used in ! 395: an insn was not allocated to a hard register and is equivalent to ! 396: a constant, the register will be replaced with the constant. If ! 397: the predicate does not permit a constant and the insn is ! 398: re-recognized for some reason, the compiler will crash. Thus the ! 399: predicate must always recognize any objects allowed by the ! 400: constraint. ! 401: ! 402: If the operand's predicate can recognize registers, but the ! 403: constraint does not permit them, it can make the compiler crash. When ! 404: this operand happens to be a register, the reload pass will be stymied, ! 405: because it does not know how to copy a register temporarily into memory. 1.1.1.3 root 406: 407: 1.1.1.7 ! root 408: File: gcc.info, Node: Multi-Alternative, Next: Class Preferences, Prev: Simple Constraints, Up: Constraints 1.1.1.5 root 409: 1.1.1.7 ! root 410: Multiple Alternative Constraints ! 411: -------------------------------- 1.1.1.5 root 412: 1.1.1.7 ! root 413: Sometimes a single instruction has multiple alternative sets of ! 414: possible operands. For example, on the 68000, a logical-or instruction ! 415: can combine register or an immediate value into memory, or it can ! 416: combine any kind of operand into a register; but it cannot combine one ! 417: memory location into another. ! 418: ! 419: These constraints are represented as multiple alternatives. An ! 420: alternative can be described by a series of letters for each operand. ! 421: The overall constraint for an operand is made from the letters for this ! 422: operand from the first alternative, a comma, the letters for this ! 423: operand from the second alternative, a comma, and so on until the last ! 424: alternative. Here is how it is done for fullword logical-or on the ! 425: 68000: ! 426: ! 427: (define_insn "iorsi3" ! 428: [(set (match_operand:SI 0 "general_operand" "=m,d") ! 429: (ior:SI (match_operand:SI 1 "general_operand" "%0,0") ! 430: (match_operand:SI 2 "general_operand" "dKs,dmKs")))] ! 431: ...) 1.1.1.5 root 432: 1.1.1.7 ! root 433: The first alternative has `m' (memory) for operand 0, `0' for ! 434: operand 1 (meaning it must match operand 0), and `dKs' for operand 2. ! 435: The second alternative has `d' (data register) for operand 0, `0' for ! 436: operand 1, and `dmKs' for operand 2. The `=' and `%' in the ! 437: constraints apply to all the alternatives; their meaning is explained ! 438: in the next section (*note Class Preferences::.). ! 439: ! 440: If all the operands fit any one alternative, the instruction is ! 441: valid. Otherwise, for each alternative, the compiler counts how many ! 442: instructions must be added to copy the operands so that that ! 443: alternative applies. The alternative requiring the least copying is ! 444: chosen. If two alternatives need the same amount of copying, the one ! 445: that comes first is chosen. These choices can be altered with the `?' ! 446: and `!' characters: ! 447: ! 448: `?' ! 449: Disparage slightly the alternative that the `?' appears in, as a ! 450: choice when no alternative applies exactly. The compiler regards ! 451: this alternative as one unit more costly for each `?' that appears ! 452: in it. ! 453: ! 454: `!' ! 455: Disparage severely the alternative that the `!' appears in. This ! 456: alternative can still be used if it fits without reloading, but if ! 457: reloading is needed, some other alternative will be used. ! 458: ! 459: When an insn pattern has multiple alternatives in its constraints, ! 460: often the appearance of the assembler code is determined mostly by which ! 461: alternative was matched. When this is so, the C code for writing the ! 462: assembler code can use the variable `which_alternative', which is the ! 463: ordinal number of the alternative that was actually satisfied (0 for ! 464: the first, 1 for the second alternative, etc.). *Note Output ! 465: Statement::. ! 466: ! 467: ! 468: File: gcc.info, Node: Class Preferences, Next: Modifiers, Prev: Multi-Alternative, Up: Constraints ! 469: ! 470: Register Class Preferences ! 471: -------------------------- 1.1.1.3 root 472: 1.1.1.7 ! root 473: The operand constraints have another function: they enable the ! 474: compiler to decide which kind of hardware register a pseudo register is ! 475: best allocated to. The compiler examines the constraints that apply to ! 476: the insns that use the pseudo register, looking for the ! 477: machine-dependent letters such as `d' and `a' that specify classes of ! 478: registers. The pseudo register is put in whichever class gets the most ! 479: "votes". The constraint letters `g' and `r' also vote: they vote in ! 480: favor of a general register. The machine description says which ! 481: registers are considered general. ! 482: ! 483: Of course, on some machines all registers are equivalent, and no ! 484: register classes are defined. Then none of this complexity is relevant. 1.1.1.3 root 485: 1.1.1.4 root 486: 1.1.1.7 ! root 487: File: gcc.info, Node: Modifiers, Next: Machine Constraints, Prev: Class Preferences, Up: Constraints ! 488: ! 489: Constraint Modifier Characters ! 490: ------------------------------ ! 491: ! 492: Here are constraint modifier characters. 1.1.1.5 root 493: 1.1.1.7 ! root 494: `=' ! 495: Means that this operand is write-only for this instruction: the ! 496: previous value is discarded and replaced by output data. ! 497: ! 498: `+' ! 499: Means that this operand is both read and written by the ! 500: instruction. 1.1.1.5 root 501: 1.1.1.7 ! root 502: When the compiler fixes up the operands to satisfy the constraints, ! 503: it needs to know which operands are inputs to the instruction and ! 504: which are outputs from it. `=' identifies an output; `+' ! 505: identifies an operand that is both input and output; all other ! 506: operands are assumed to be input only. ! 507: ! 508: `&' ! 509: Means (in a particular alternative) that this operand is written ! 510: before the instruction is finished using the input operands. ! 511: Therefore, this operand may not lie in a register that is used as ! 512: an input operand or as part of any memory address. ! 513: ! 514: `&' applies only to the alternative in which it is written. In ! 515: constraints with multiple alternatives, sometimes one alternative ! 516: requires `&' while others do not. See, for example, the `movdf' ! 517: insn of the 68000. ! 518: ! 519: `&' does not obviate the need to write `='. ! 520: ! 521: `%' ! 522: Declares the instruction to be commutative for this operand and the ! 523: following operand. This means that the compiler may interchange ! 524: the two operands if that is the cheapest way to make all operands ! 525: fit the constraints. This is often used in patterns for addition ! 526: instructions that really have only two operands: the result must ! 527: go in one of the arguments. Here for example, is how the 68000 ! 528: halfword-add instruction is defined: ! 529: ! 530: (define_insn "addhi3" ! 531: [(set (match_operand:HI 0 "general_operand" "=m,r") ! 532: (plus:HI (match_operand:HI 1 "general_operand" "%0,0") ! 533: (match_operand:HI 2 "general_operand" "di,g")))] ! 534: ...) ! 535: ! 536: `#' ! 537: Says that all following characters, up to the next comma, are to be ! 538: ignored as a constraint. They are significant only for choosing ! 539: register preferences. ! 540: ! 541: `*' ! 542: Says that the following character should be ignored when choosing ! 543: register preferences. `*' has no effect on the meaning of the ! 544: constraint as a constraint, and no effect on reloading. ! 545: ! 546: Here is an example: the 68000 has an instruction to sign-extend a ! 547: halfword in a data register, and can also sign-extend a value by ! 548: copying it into an address register. While either kind of ! 549: register is acceptable, the constraints on an address-register ! 550: destination are less strict, so it is best if register allocation ! 551: makes an address register its goal. Therefore, `*' is used so ! 552: that the `d' constraint letter (for data register) is ignored when ! 553: computing register preferences. ! 554: ! 555: (define_insn "extendhisi2" ! 556: [(set (match_operand:SI 0 "general_operand" "=*d,a") ! 557: (sign_extend:SI ! 558: (match_operand:HI 1 "general_operand" "0,g")))] ! 559: ...) 1.1.1.3 root 560: 1.1.1.5 root 561: 1.1.1.7 ! root 562: File: gcc.info, Node: Machine Constraints, Next: No Constraints, Prev: Modifiers, Up: Constraints 1.1.1.3 root 563: 1.1.1.7 ! root 564: Constraints for Particular Machines ! 565: ----------------------------------- 1.1.1.3 root 566: 1.1.1.7 ! root 567: Whenever possible, you should use the general-purpose constraint ! 568: letters in `asm' arguments, since they will convey meaning more readily ! 569: to people reading your code. Failing that, use the constraint letters ! 570: that usually have very similar meanings across architectures. The most ! 571: commonly used constraints are `m' and `r' (for memory and ! 572: general-purpose registers respectively; *note Simple Constraints::.), ! 573: and `I', usually the letter indicating the most common ! 574: immediate-constant format. 1.1.1.3 root 575: 1.1.1.7 ! root 576: For each machine architecture, the `config/MACHINE.h' file defines ! 577: additional constraints. These constraints are used by the compiler ! 578: itself for instruction generation, as well as for `asm' statements; ! 579: therefore, some of the constraints are not particularly interesting for ! 580: `asm'. The constraints are defined through these macros: ! 581: ! 582: `REG_CLASS_FROM_LETTER' ! 583: Register class constraints (usually lower case). ! 584: ! 585: `CONST_OK_FOR_LETTER_P' ! 586: Immediate constant constraints, for non-floating point constants of ! 587: word size or smaller precision (usually upper case). ! 588: ! 589: `CONST_DOUBLE_OK_FOR_LETTER_P' ! 590: Immediate constant constraints, for all floating point constants ! 591: and for constants of greater than word size precision (usually ! 592: upper case). ! 593: ! 594: `EXTRA_CONSTRAINT' ! 595: Special cases of registers or memory. This macro is not required, ! 596: and is only defined for some machines. ! 597: ! 598: Inspecting these macro definitions in the compiler source for your ! 599: machine is the best way to be certain you have the right constraints. ! 600: However, here is a summary of the machine-dependent constraints ! 601: available on some particular machines. ! 602: ! 603: *ARM family--`arm.h'* ! 604: `f' ! 605: Floating-point register ! 606: ! 607: `F' ! 608: One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0, ! 609: 4.0, 5.0 or 10.0 ! 610: ! 611: `G' ! 612: Floating-point constant that would satisfy the constraint `F' ! 613: if it were negated ! 614: ! 615: `I' ! 616: Integer that is valid as an immediate operand in a data ! 617: processing instruction. That is, an integer in the range 0 ! 618: to 255 rotated by a multiple of 2 ! 619: ! 620: `J' ! 621: Integer in the range -4095 to 4095 ! 622: ! 623: `K' ! 624: Integer that satisfies constraint `I' when inverted (ones ! 625: complement) ! 626: ! 627: `L' ! 628: Integer that satisfies constraint `I' when negated (twos ! 629: complement) ! 630: ! 631: `M' ! 632: Integer in the range 0 to 32 ! 633: ! 634: `Q' ! 635: A memory reference where the exact address is in a single ! 636: register (``m'' is preferable for `asm' statements) ! 637: ! 638: `R' ! 639: An item in the constant pool ! 640: ! 641: `S' ! 642: A symbol in the text segment of the current file ! 643: ! 644: *AMD 29000 family--`a29k.h'* ! 645: `l' ! 646: Local register 0 ! 647: ! 648: `b' ! 649: Byte Pointer (`BP') register ! 650: ! 651: `q' ! 652: `Q' register ! 653: ! 654: `h' ! 655: Special purpose register ! 656: ! 657: `A' ! 658: First accumulator register ! 659: ! 660: `a' ! 661: Other accumulator register ! 662: ! 663: `f' ! 664: Floating point register ! 665: ! 666: `I' ! 667: Constant greater than 0, less than 0x100 ! 668: ! 669: `J' ! 670: Constant greater than 0, less than 0x10000 ! 671: ! 672: `K' ! 673: Constant whose high 24 bits are on (1) ! 674: ! 675: `L' ! 676: 16 bit constant whose high 8 bits are on (1) ! 677: ! 678: `M' ! 679: 32 bit constant whose high 16 bits are on (1) ! 680: ! 681: `N' ! 682: 32 bit negative constant that fits in 8 bits ! 683: ! 684: `O' ! 685: The constant 0x80000000 or, on the 29050, any 32 bit constant ! 686: whose low 16 bits are 0. ! 687: ! 688: `P' ! 689: 16 bit negative constant that fits in 8 bits ! 690: ! 691: `G' ! 692: `H' ! 693: A floating point constant (in `asm' statements, use the ! 694: machine independent `E' or `F' instead) ! 695: ! 696: *IBM RS6000--`rs6000.h'* ! 697: `b' ! 698: Address base register ! 699: ! 700: `f' ! 701: Floating point register ! 702: ! 703: `h' ! 704: `MQ', `CTR', or `LINK' register ! 705: ! 706: `q' ! 707: `MQ' register ! 708: ! 709: `c' ! 710: `CTR' register ! 711: ! 712: `l' ! 713: `LINK' register ! 714: ! 715: `x' ! 716: `CR' register (condition register) number 0 ! 717: ! 718: `y' ! 719: `CR' register (condition register) ! 720: ! 721: `I' ! 722: Signed 16 bit constant ! 723: ! 724: `J' ! 725: Constant whose low 16 bits are 0 ! 726: ! 727: `K' ! 728: Constant whose high 16 bits are 0 ! 729: ! 730: `L' ! 731: Constant suitable as a mask operand ! 732: ! 733: `M' ! 734: Constant larger than 31 ! 735: ! 736: `N' ! 737: Exact power of 2 ! 738: ! 739: `O' ! 740: Zero ! 741: ! 742: `P' ! 743: Constant whose negation is a signed 16 bit constant ! 744: ! 745: `G' ! 746: Floating point constant that can be loaded into a register ! 747: with one instruction per word ! 748: ! 749: `Q' ! 750: Memory operand that is an offset from a register (`m' is ! 751: preferable for `asm' statements) ! 752: ! 753: *Intel 386--`i386.h'* ! 754: `q' ! 755: `a', `b', `c', or `d' register ! 756: ! 757: `A' ! 758: `a', or `d' register (for 64-bit ints) ! 759: ! 760: `f' ! 761: Floating point register ! 762: ! 763: `t' ! 764: First (top of stack) floating point register ! 765: ! 766: `u' ! 767: Second floating point register ! 768: ! 769: `a' ! 770: `a' register ! 771: ! 772: `b' ! 773: `b' register ! 774: ! 775: `c' ! 776: `c' register ! 777: ! 778: `d' ! 779: `d' register ! 780: ! 781: `D' ! 782: `di' register ! 783: ! 784: `S' ! 785: `si' register ! 786: ! 787: `I' ! 788: Constant in range 0 to 31 (for 32 bit shifts) ! 789: ! 790: `J' ! 791: Constant in range 0 to 63 (for 64 bit shifts) ! 792: ! 793: `K' ! 794: `0xff' ! 795: ! 796: `L' ! 797: `0xffff' ! 798: ! 799: `M' ! 800: 0, 1, 2, or 3 (shifts for `lea' instruction) ! 801: ! 802: `G' ! 803: Standard 80387 floating point constant ! 804: ! 805: *Intel 960--`i960.h'* ! 806: `f' ! 807: Floating point register (`fp0' to `fp3') ! 808: ! 809: `l' ! 810: Local register (`r0' to `r15') ! 811: ! 812: `b' ! 813: Global register (`g0' to `g15') ! 814: ! 815: `d' ! 816: Any local or global register ! 817: ! 818: `I' ! 819: Integers from 0 to 31 ! 820: ! 821: `J' ! 822: 0 ! 823: ! 824: `K' ! 825: Integers from -31 to 0 ! 826: ! 827: `G' ! 828: Floating point 0 ! 829: ! 830: `H' ! 831: Floating point 1 ! 832: ! 833: *MIPS--`mips.h'* ! 834: `d' ! 835: General-purpose integer register ! 836: ! 837: `f' ! 838: Floating-point register (if available) ! 839: ! 840: `h' ! 841: `Hi' register ! 842: ! 843: `l' ! 844: `Lo' register ! 845: ! 846: `x' ! 847: `Hi' or `Lo' register ! 848: ! 849: `y' ! 850: General-purpose integer register ! 851: ! 852: `z' ! 853: Floating-point status register ! 854: ! 855: `I' ! 856: Signed 16 bit constant (for arithmetic instructions) ! 857: ! 858: `J' ! 859: Zero ! 860: ! 861: `K' ! 862: Zero-extended 16-bit constant (for logic instructions) ! 863: ! 864: `L' ! 865: Constant with low 16 bits zero (can be loaded with `lui') ! 866: ! 867: `M' ! 868: 32 bit constant which requires two instructions to load (a ! 869: constant which is not `I', `K', or `L') ! 870: ! 871: `N' ! 872: Negative 16 bit constant ! 873: ! 874: `O' ! 875: Exact power of two ! 876: ! 877: `P' ! 878: Positive 16 bit constant ! 879: ! 880: `G' ! 881: Floating point zero ! 882: ! 883: `Q' ! 884: Memory reference that can be loaded with more than one ! 885: instruction (`m' is preferable for `asm' statements) ! 886: ! 887: `R' ! 888: Memory reference that can be loaded with one instruction (`m' ! 889: is preferable for `asm' statements) ! 890: ! 891: `S' ! 892: Memory reference in external OSF/rose PIC format (`m' is ! 893: preferable for `asm' statements) ! 894: ! 895: *Motorola 680x0--`m68k.h'* ! 896: `a' ! 897: Address register ! 898: ! 899: `d' ! 900: Data register ! 901: ! 902: `f' ! 903: 68881 floating-point register, if available ! 904: ! 905: `x' ! 906: Sun FPA (floating-point) register, if available ! 907: ! 908: `y' ! 909: First 16 Sun FPA registers, if available ! 910: ! 911: `I' ! 912: Integer in the range 1 to 8 ! 913: ! 914: `J' ! 915: 16 bit signed number ! 916: ! 917: `K' ! 918: Signed number whose magnitude is greater than 0x80 ! 919: ! 920: `L' ! 921: Integer in the range -8 to -1 ! 922: ! 923: `G' ! 924: Floating point constant that is not a 68881 constant ! 925: ! 926: `H' ! 927: Floating point constant that can be used by Sun FPA ! 928: ! 929: *SPARC--`sparc.h'* ! 930: `f' ! 931: Floating-point register ! 932: ! 933: `I' ! 934: Signed 13 bit constant ! 935: ! 936: `J' ! 937: Zero ! 938: ! 939: `K' ! 940: 32 bit constant with the low 12 bits clear (a constant that ! 941: can be loaded with the `sethi' instruction) ! 942: ! 943: `G' ! 944: Floating-point zero ! 945: ! 946: `H' ! 947: Signed 13 bit constant, sign-extended to 32 or 64 bits ! 948: ! 949: `Q' ! 950: Memory reference that can be loaded with one instruction ! 951: (`m' is more appropriate for `asm' statements) ! 952: ! 953: `S' ! 954: Constant, or memory address ! 955: ! 956: `T' ! 957: Memory address aligned to an 8-byte boundary ! 958: ! 959: `U' ! 960: Even register ! 961: ! 962: ! 963: File: gcc.info, Node: No Constraints, Prev: Machine Constraints, Up: Constraints ! 964: ! 965: Not Using Constraints ! 966: --------------------- ! 967: ! 968: Some machines are so clean that operand constraints are not ! 969: required. For example, on the Vax, an operand valid in one context is ! 970: valid in any other context. On such a machine, every operand ! 971: constraint would be `g', excepting only operands of "load address" ! 972: instructions which are written as if they referred to a memory ! 973: location's contents but actual refer to its address. They would have ! 974: constraint `p'. ! 975: ! 976: For such machines, instead of writing `g' and `p' for all the ! 977: constraints, you can choose to write a description with empty ! 978: constraints. Then you write `""' for the constraint in every ! 979: `match_operand'. Address operands are identified by writing an ! 980: `address' expression around the `match_operand', not by their ! 981: constraints. ! 982: ! 983: When the machine description has just empty constraints, certain ! 984: parts of compilation are skipped, making the compiler faster. However, ! 985: few machines actually do not need constraints; all machine descriptions ! 986: now in existence use constraints. 1.1 root 987:
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