--- gcc/gcc.info-18 2018/04/24 17:56:54 1.1 +++ gcc/gcc.info-18 2018/04/24 18:42:19 1.1.1.7 @@ -1,9 +1,13 @@ -This is Info file gcc.info, produced by Makeinfo-1.47 from the input -file gcc.texi. +This is Info file gcc.info, produced by Makeinfo version 1.67 from the +input file gcc.texi. This file documents the use and the internals of the GNU compiler. - Copyright (C) 1988, 1989, 1992 Free Software Foundation, Inc. + Published by the Free Software Foundation 59 Temple Place - Suite 330 +Boston, MA 02111-1307 USA + + Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995 Free Software +Foundation, Inc. Permission is granted to make and distribute verbatim copies of this manual provided the copyright notice and this permission notice are @@ -11,1648 +15,1043 @@ preserved on all copies. Permission is granted to copy and distribute modified versions of this manual under the conditions for verbatim copying, provided also -that the sections entitled "GNU General Public License" and "Boycott" -are included exactly as in the original, and provided that the entire +that the sections entitled "GNU General Public License," "Funding for +Free Software," and "Protect Your Freedom--Fight `Look And Feel'" are +included exactly as in the original, and provided that the entire resulting derived work is distributed under the terms of a permission notice identical to this one. Permission is granted to copy and distribute translations of this manual into another language, under the above conditions for modified versions, except that the sections entitled "GNU General Public -License" and "Boycott", and this permission notice, may be included in +License," "Funding for Free Software," and "Protect Your Freedom--Fight +`Look And Feel'", and this permission notice, may be included in translations approved by the Free Software Foundation instead of in the original English.  -File: gcc.info, Node: Index, Prev: Config, Up: Top +File: gcc.info, Node: Expander Definitions, Next: Insn Splitting, Prev: Peephole Definitions, Up: Machine Desc + +Defining RTL Sequences for Code Generation +========================================== + + On some target machines, some standard pattern names for RTL +generation cannot be handled with single insn, but a sequence of RTL +insns can represent them. For these target machines, you can write a +`define_expand' to specify how to generate the sequence of RTL. + + A `define_expand' is an RTL expression that looks almost like a +`define_insn'; but, unlike the latter, a `define_expand' is used only +for RTL generation and it can produce more than one RTL insn. + + A `define_expand' RTX has four operands: + + * The name. Each `define_expand' must have a name, since the only + use for it is to refer to it by name. + + * The RTL template. This is just like the RTL template for a + `define_peephole' in that it is a vector of RTL expressions each + being one insn. + + * The condition, a string containing a C expression. This + expression is used to express how the availability of this pattern + depends on subclasses of target machine, selected by command-line + options when GNU CC is run. This is just like the condition of a + `define_insn' that has a standard name. Therefore, the condition + (if present) may not depend on the data in the insn being matched, + but only the target-machine-type flags. The compiler needs to + test these conditions during initialization in order to learn + exactly which named instructions are available in a particular run. + + * The preparation statements, a string containing zero or more C + statements which are to be executed before RTL code is generated + from the RTL template. + + Usually these statements prepare temporary registers for use as + internal operands in the RTL template, but they can also generate + RTL insns directly by calling routines such as `emit_insn', etc. + Any such insns precede the ones that come from the RTL template. + + Every RTL insn emitted by a `define_expand' must match some +`define_insn' in the machine description. Otherwise, the compiler will +crash when trying to generate code for the insn or trying to optimize +it. + + The RTL template, in addition to controlling generation of RTL insns, +also describes the operands that need to be specified when this pattern +is used. In particular, it gives a predicate for each operand. + + A true operand, which needs to be specified in order to generate RTL +from the pattern, should be described with a `match_operand' in its +first occurrence in the RTL template. This enters information on the +operand's predicate into the tables that record such things. GNU CC +uses the information to preload the operand into a register if that is +required for valid RTL code. If the operand is referred to more than +once, subsequent references should use `match_dup'. + + The RTL template may also refer to internal "operands" which are +temporary registers or labels used only within the sequence made by the +`define_expand'. Internal operands are substituted into the RTL +template with `match_dup', never with `match_operand'. The values of +the internal operands are not passed in as arguments by the compiler +when it requests use of this pattern. Instead, they are computed +within the pattern, in the preparation statements. These statements +compute the values and store them into the appropriate elements of +`operands' so that `match_dup' can find them. + + There are two special macros defined for use in the preparation +statements: `DONE' and `FAIL'. Use them with a following semicolon, as +a statement. + +`DONE' + Use the `DONE' macro to end RTL generation for the pattern. The + only RTL insns resulting from the pattern on this occasion will be + those already emitted by explicit calls to `emit_insn' within the + preparation statements; the RTL template will not be generated. + +`FAIL' + Make the pattern fail on this occasion. When a pattern fails, it + means that the pattern was not truly available. The calling + routines in the compiler will try other strategies for code + generation using other patterns. + + Failure is currently supported only for binary (addition, + multiplication, shifting, etc.) and bitfield (`extv', `extzv', and + `insv') operations. + + Here is an example, the definition of left-shift for the SPUR chip: + + (define_expand "ashlsi3" + [(set (match_operand:SI 0 "register_operand" "") + (ashift:SI + + (match_operand:SI 1 "register_operand" "") + (match_operand:SI 2 "nonmemory_operand" "")))] + "" + " + + { + if (GET_CODE (operands[2]) != CONST_INT + || (unsigned) INTVAL (operands[2]) > 3) + FAIL; + }") + +This example uses `define_expand' so that it can generate an RTL insn +for shifting when the shift-count is in the supported range of 0 to 3 +but fail in other cases where machine insns aren't available. When it +fails, the compiler tries another strategy using different patterns +(such as, a library call). + + If the compiler were able to handle nontrivial condition-strings in +patterns with names, then it would be possible to use a `define_insn' +in that case. Here is another case (zero-extension on the 68000) which +makes more use of the power of `define_expand': + + (define_expand "zero_extendhisi2" + [(set (match_operand:SI 0 "general_operand" "") + (const_int 0)) + (set (strict_low_part + (subreg:HI + (match_dup 0) + 0)) + (match_operand:HI 1 "general_operand" ""))] + "" + "operands[1] = make_safe_from (operands[1], operands[0]);") + +Here two RTL insns are generated, one to clear the entire output operand +and the other to copy the input operand into its low half. This +sequence is incorrect if the input operand refers to [the old value of] +the output operand, so the preparation statement makes sure this isn't +so. The function `make_safe_from' copies the `operands[1]' into a +temporary register if it refers to `operands[0]'. It does this by +emitting another RTL insn. + + Finally, a third example shows the use of an internal operand. +Zero-extension on the SPUR chip is done by `and'-ing the result against +a halfword mask. But this mask cannot be represented by a `const_int' +because the constant value is too large to be legitimate on this +machine. So it must be copied into a register with `force_reg' and +then the register used in the `and'. + + (define_expand "zero_extendhisi2" + [(set (match_operand:SI 0 "register_operand" "") + (and:SI (subreg:SI + (match_operand:HI 1 "register_operand" "") + 0) + (match_dup 2)))] + "" + "operands[2] + = force_reg (SImode, gen_rtx (CONST_INT, + VOIDmode, 65535)); ") + + *Note:* If the `define_expand' is used to serve a standard binary or +unary arithmetic operation or a bitfield operation, then the last insn +it generates must not be a `code_label', `barrier' or `note'. It must +be an `insn', `jump_insn' or `call_insn'. If you don't need a real insn +at the end, emit an insn to copy the result of the operation into +itself. Such an insn will generate no code, but it can avoid problems +in the compiler. + + +File: gcc.info, Node: Insn Splitting, Next: Insn Attributes, Prev: Expander Definitions, Up: Machine Desc + +Defining How to Split Instructions +================================== + + There are two cases where you should specify how to split a pattern +into multiple insns. On machines that have instructions requiring delay +slots (*note Delay Slots::.) or that have instructions whose output is +not available for multiple cycles (*note Function Units::.), the +compiler phases that optimize these cases need to be able to move insns +into one-instruction delay slots. However, some insns may generate +more than one machine instruction. These insns cannot be placed into a +delay slot. + + Often you can rewrite the single insn as a list of individual insns, +each corresponding to one machine instruction. The disadvantage of +doing so is that it will cause the compilation to be slower and require +more space. If the resulting insns are too complex, it may also +suppress some optimizations. The compiler splits the insn if there is a +reason to believe that it might improve instruction or delay slot +scheduling. + + The insn combiner phase also splits putative insns. If three insns +are merged into one insn with a complex expression that cannot be +matched by some `define_insn' pattern, the combiner phase attempts to +split the complex pattern into two insns that are recognized. Usually +it can break the complex pattern into two patterns by splitting out some +subexpression. However, in some other cases, such as performing an +addition of a large constant in two insns on a RISC machine, the way to +split the addition into two insns is machine-dependent. + + The `define_split' definition tells the compiler how to split a +complex insn into several simpler insns. It looks like this: + + (define_split + [INSN-PATTERN] + "CONDITION" + [NEW-INSN-PATTERN-1 + NEW-INSN-PATTERN-2 + ...] + "PREPARATION STATEMENTS") + + INSN-PATTERN is a pattern that needs to be split and CONDITION is +the final condition to be tested, as in a `define_insn'. When an insn +matching INSN-PATTERN and satisfying CONDITION is found, it is replaced +in the insn list with the insns given by NEW-INSN-PATTERN-1, +NEW-INSN-PATTERN-2, etc. + + The PREPARATION STATEMENTS are similar to those statements that are +specified for `define_expand' (*note Expander Definitions::.) and are +executed before the new RTL is generated to prepare for the generated +code or emit some insns whose pattern is not fixed. Unlike those in +`define_expand', however, these statements must not generate any new +pseudo-registers. Once reload has completed, they also must not +allocate any space in the stack frame. + + Patterns are matched against INSN-PATTERN in two different +circumstances. If an insn needs to be split for delay slot scheduling +or insn scheduling, the insn is already known to be valid, which means +that it must have been matched by some `define_insn' and, if +`reload_completed' is non-zero, is known to satisfy the constraints of +that `define_insn'. In that case, the new insn patterns must also be +insns that are matched by some `define_insn' and, if `reload_completed' +is non-zero, must also satisfy the constraints of those definitions. + + As an example of this usage of `define_split', consider the following +example from `a29k.md', which splits a `sign_extend' from `HImode' to +`SImode' into a pair of shift insns: + + (define_split + [(set (match_operand:SI 0 "gen_reg_operand" "") + (sign_extend:SI (match_operand:HI 1 "gen_reg_operand" "")))] + "" + [(set (match_dup 0) + (ashift:SI (match_dup 1) + (const_int 16))) + (set (match_dup 0) + (ashiftrt:SI (match_dup 0) + (const_int 16)))] + " + { operands[1] = gen_lowpart (SImode, operands[1]); }") + + When the combiner phase tries to split an insn pattern, it is always +the case that the pattern is *not* matched by any `define_insn'. The +combiner pass first tries to split a single `set' expression and then +the same `set' expression inside a `parallel', but followed by a +`clobber' of a pseudo-reg to use as a scratch register. In these +cases, the combiner expects exactly two new insn patterns to be +generated. It will verify that these patterns match some `define_insn' +definitions, so you need not do this test in the `define_split' (of +course, there is no point in writing a `define_split' that will never +produce insns that match). + + Here is an example of this use of `define_split', taken from +`rs6000.md': + + (define_split + [(set (match_operand:SI 0 "gen_reg_operand" "") + (plus:SI (match_operand:SI 1 "gen_reg_operand" "") + (match_operand:SI 2 "non_add_cint_operand" "")))] + "" + [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3))) + (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))] + " + { + int low = INTVAL (operands[2]) & 0xffff; + int high = (unsigned) INTVAL (operands[2]) >> 16; + + if (low & 0x8000) + high++, low |= 0xffff0000; + + operands[3] = gen_rtx (CONST_INT, VOIDmode, high << 16); + operands[4] = gen_rtx (CONST_INT, VOIDmode, low); + }") + + Here the predicate `non_add_cint_operand' matches any `const_int' +that is *not* a valid operand of a single add insn. The add with the +smaller displacement is written so that it can be substituted into the +address of a subsequent operation. + + An example that uses a scratch register, from the same file, +generates an equality comparison of a register and a large constant: + + (define_split + [(set (match_operand:CC 0 "cc_reg_operand" "") + (compare:CC (match_operand:SI 1 "gen_reg_operand" "") + (match_operand:SI 2 "non_short_cint_operand" ""))) + (clobber (match_operand:SI 3 "gen_reg_operand" ""))] + "find_single_use (operands[0], insn, 0) + && (GET_CODE (*find_single_use (operands[0], insn, 0)) == EQ + || GET_CODE (*find_single_use (operands[0], insn, 0)) == NE)" + [(set (match_dup 3) (xor:SI (match_dup 1) (match_dup 4))) + (set (match_dup 0) (compare:CC (match_dup 3) (match_dup 5)))] + " + { + /* Get the constant we are comparing against, C, and see what it + looks like sign-extended to 16 bits. Then see what constant + could be XOR'ed with C to get the sign-extended value. */ + + int c = INTVAL (operands[2]); + int sextc = (c << 16) >> 16; + int xorv = c ^ sextc; + + operands[4] = gen_rtx (CONST_INT, VOIDmode, xorv); + operands[5] = gen_rtx (CONST_INT, VOIDmode, sextc); + }") + + To avoid confusion, don't write a single `define_split' that accepts +some insns that match some `define_insn' as well as some insns that +don't. Instead, write two separate `define_split' definitions, one for +the insns that are valid and one for the insns that are not valid. + + +File: gcc.info, Node: Insn Attributes, Prev: Insn Splitting, Up: Machine Desc + +Instruction Attributes +====================== -Index -***** + In addition to describing the instruction supported by the target +machine, the `md' file also defines a group of "attributes" and a set of +values for each. Every generated insn is assigned a value for each +attribute. One possible attribute would be the effect that the insn +has on the machine's condition code. This attribute can then be used +by `NOTICE_UPDATE_CC' to track the condition codes. * Menu: -* #pragma: Misc. -* $: Dollar Signs. -* ': Incompatibilities. -* (nil): RTL Objects. -* 3b1 installation: 3b1 Install. -* ?: side effect: Conditionals. -* #pragma, reason for not using: Function Attributes. -* * in template: Output Statement. -* ?: extensions: Conditionals. -* ?: extensions: Lvalues. -* ACCUMULATE_OUTGOING_ARGS and stack frames: Function Entry. -* ARG_POINTER_REGNUM and virtual registers: Regs and Memory. -* BITS_BIG_ENDIAN, effect on sign_extract: Bit Fields. -* BLKmode, and function return values: Calls. -* ENCODE_SECTION_INFO and address validation: Addressing Modes. -* ENCODE_SECTION_INFO usage: Instruction Output. -* FIRST_PARM_OFFSET and virtual registers: Regs and Memory. -* FRAME_GROWS_DOWNWARD and virtual registers: Regs and Memory. -* FRAME_POINTER_REGNUM and virtual registers: Regs and Memory. -* FUNCTION_EPILOGUE and trampolines: Trampolines. -* FUNCTION_PROLOGUE and trampolines: Trampolines. -* HImode, in insn: Insns. -* MUST_PASS_IN_STACK, and FUNCTION_ARG: Register Arguments. -* PUSH_ROUNDING, interaction with STACK_BOUNDARY: Storage Layout. -* QImode, in insn: Insns. -* REG_PARM_STACK_SPACE, and FUNCTION_ARG: Register Arguments. -* STACK_DYNAMIC_OFFSET and virtual registers: Regs and Memory. -* STACK_POINTER_OFFSET and virtual registers: Regs and Memory. -* STACK_POINTER_REGNUM and virtual registers: Regs and Memory. -* STARTING_FRAME_OFFSET and virtual registers: Regs and Memory. -* SYMBOL_REF_FLAG, in ENCODE_SECTION_INFO: Sections. -* WORDS_BIG_ENDIAN, effect on subreg: Regs and Memory. -* absM2 instruction pattern: Standard Names. -* abs and attributes: Expressions. -* addM3 instruction pattern: Standard Names. -* addr_diff_vec, length of: Insn Lengths. -* addr_vec, length of: Insn Lengths. -* allocate_stack instruction pattern: Standard Names. -* alloca and SunOs: Installation. -* alloca vs variable-length arrays: Variable Length. -* alloca, for SunOs: Sun Install. -* alloca, for Unos: Unos Install. -* andM3 instruction pattern: Standard Names. -* and and attributes: Expressions. -* and, canonicalization of: Insn Canonicalizations. -* ashiftrt and attributes: Expressions. -* ashift and attributes: Expressions. -* ashlM3 instruction pattern: Standard Names. -* ashrM3 instruction pattern: Standard Names. -* asm_operands, RTL sharing: Sharing. -* asm_operands, usage: Assembler. -* asm expressions: Extended Asm. -* bCOND instruction pattern: Standard Names. -* bcopy, implicit usage: Library Calls. -* bzero, implicit usage: Library Calls. -* call_insn and /u: Flags. -* call_pop instruction pattern: Standard Names. -* call_value_pop instruction pattern: Standard Names. -* call_value instruction pattern: Standard Names. -* call instruction pattern: Standard Names. -* call usage: Calls. -* casesi instruction pattern: Standard Names. -* cc0, RTL sharing: Sharing. -* cmpM instruction pattern: Standard Names. -* cmpstrM instruction pattern: Standard Names. -* code_label and /i: Flags. -* compare, canonicalization of: Insn Canonicalizations. -* cond and attributes: Expressions. -* const_double, RTL sharing: Sharing. -* const_int and attribute tests: Expressions. -* const_int and attributes: Expressions. -* const_int, RTL sharing: Sharing. -* const_string and attributes: Expressions. -* const applied to function: Function Attributes. -* define_insn example: Example. -* divM3 instruction pattern: Standard Names. -* divmodM4 instruction pattern: Standard Names. -* div and attributes: Expressions. -* eq and attributes: Expressions. -* extendMN instruction pattern: Standard Names. -* extv instruction pattern: Standard Names. -* extzv instruction pattern: Standard Names. -* ffsM2 instruction pattern: Standard Names. -* fixMN2 instruction pattern: Standard Names. -* fix_truncMN2 instruction pattern: Standard Names. -* fixunsMN2 instruction pattern: Standard Names. -* fixuns_truncMN2 instruction pattern: Standard Names. -* floatMN2 instruction pattern: Standard Names. -* floatunsMN2 instruction pattern: Standard Names. -* float as function value type: Incompatibilities. -* fscanf, and constant strings: Incompatibilities. -* ftruncM2 instruction pattern: Standard Names. -* genflags, crash on Sun 4: Installation Problems. -* geu and attributes: Expressions. -* ge and attributes: Expressions. -* gprof: Debugging Options. -* gtu and attributes: Expressions. -* gt and attributes: Expressions. -* if_then_else and attributes: Expressions. -* if_then_else usage: Side Effects. -* in_struct, in code_label: Flags. -* in_struct, in insn: Flags. -* in_struct, in insn: Flags. -* in_struct, in label_ref: Flags. -* in_struct, in mem: Flags. -* in_struct, in reg: Flags. -* indirect_jump instruction pattern: Standard Names. -* insn and /i: Flags. -* insn and /s: Flags. -* insn and /u: Flags. -* insv instruction pattern: Standard Names. -* integrated, in insn: Flags. -* integrated, in reg: Flags. -* iorM3 instruction pattern: Standard Names. -* ior and attributes: Expressions. -* ior, canonicalization of: Insn Canonicalizations. -* label_ref and /s: Flags. -* label_ref, RTL sharing: Sharing. -* leu and attributes: Expressions. -* le and attributes: Expressions. -* load_multiple instruction pattern: Standard Names. -* long long data types: Long Long. -* longjmp and automatic variables: Interface. -* longjmp and automatic variables: Dialect Options. -* longjmp incompatibilities: Incompatibilities. -* longjmp warnings: Warning Options. -* lshiftrt and attributes: Expressions. -* lshift and attributes: Expressions. -* lshlM3 instruction pattern: Standard Names. -* lshrM3 instruction pattern: Standard Names. -* lt and attributes: Expressions. -* main and the exit status: VMS Misc. -* match_dup and attributes: Insn Lengths. -* match_operand and attributes: Expressions. -* maxM3 instruction pattern: Standard Names. -* memcpy, implicit usage: Library Calls. -* memset, implicit usage: Library Calls. -* mem and /s: Flags. -* mem and /u: Flags. -* mem and /v: Flags. -* mem, RTL sharing: Sharing. -* minM3 instruction pattern: Standard Names. -* minus and attributes: Expressions. -* minus, canonicalization of: Insn Canonicalizations. -* mktemp, and constant strings: Incompatibilities. -* modM3 instruction pattern: Standard Names. -* mod and attributes: Expressions. -* movM instruction pattern: Standard Names. -* movstrM instruction pattern: Standard Names. -* movstrictM instruction pattern: Standard Names. -* mulM3 instruction pattern: Standard Names. -* mulhisi3 instruction pattern: Standard Names. -* mulqihi3 instruction pattern: Standard Names. -* mulsidi3 instruction pattern: Standard Names. -* mult and attributes: Expressions. -* mult, canonicalization of: Insn Canonicalizations. -* negM2 instruction pattern: Standard Names. -* neg and attributes: Expressions. -* neg, canonicalization of: Insn Canonicalizations. -* ne and attributes: Expressions. -* nop instruction pattern: Standard Names. -* not and attributes: Expressions. -* not, canonicalization of: Insn Canonicalizations. -* one_cmplM2 instruction pattern: Standard Names. -* pc and attributes: Insn Lengths. -* pc, RTL sharing: Sharing. -* plus and attributes: Expressions. -* plus, canonicalization of: Insn Canonicalizations. -* prof: Debugging Options. -* qsort, and global register variables: Global Reg Vars. -* reg and /i: Flags. -* reg and /s: Flags. -* reg and /u: Flags. -* reg and /v: Flags. -* reg, RTL sharing: Sharing. -* reload_in instruction pattern: Standard Names. -* reload_out instruction pattern: Standard Names. -* restore_stack_block instruction pattern: Standard Names. -* restore_stack_function instruction pattern: Standard Names. -* restore_stack_nonlocal instruction pattern: Standard Names. -* return instruction pattern: Standard Names. -* rotlM3 instruction pattern: Standard Names. -* rotrM3 instruction pattern: Standard Names. -* sCOND instruction pattern: Standard Names. -* save_stack_block instruction pattern: Standard Names. -* save_stack_function instruction pattern: Standard Names. -* save_stack_nonlocal instruction pattern: Standard Names. -* scanf, and constant strings: Incompatibilities. -* scratch, RTL sharing: Sharing. -* setjmp incompatibilities: Incompatibilities. -* sign_extract, canonicalization of: Insn Canonicalizations. -* sqrtM2 instruction pattern: Standard Names. -* sscanf, and constant strings: Incompatibilities. -* subM3 instruction pattern: Standard Names. -* subreg, in strict_low_part: RTL Declarations. -* subreg, special reload handling: Regs and Memory. -* symbol_ref and /u: Flags. -* symbol_ref and /v: Flags. -* symbol_ref, RTL sharing: Sharing. -* tablejump instruction pattern: Standard Names. -* tcov: Debugging Options. -* truncMN instruction pattern: Standard Names. -* tstM instruction pattern: Standard Names. -* udivM3 instruction pattern: Standard Names. -* udivmodM4 instruction pattern: Standard Names. -* umaxM3 instruction pattern: Standard Names. -* uminM3 instruction pattern: Standard Names. -* umodM3 instruction pattern: Standard Names. -* umulhisi3 instruction pattern: Standard Names. -* umulqihi3 instruction pattern: Standard Names. -* umulsidi3 instruction pattern: Standard Names. -* unchanging, in call_insn: Flags. -* unchanging, in insn: Flags. -* unchanging, in reg and mem: Flags. -* unchanging, in symbol_ref: Flags. -* used, in symbol_ref: Flags. -* volatile applied to function: Function Attributes. -* volatil, in insn: Flags. -* volatil, in mem: Flags. -* volatil, in reg: Flags. -* volatil, in symbol_ref: Flags. -* xorM3 instruction pattern: Standard Names. -* xor, canonicalization of: Insn Canonicalizations. -* zero_extendMN instruction pattern: Standard Names. -* zero_extract, canonicalization of: Insn Canonicalizations. -* VAXCRTL: VMS Misc. -* libgcc.a: Library Calls. -* stdarg.h and RT PC: RT Options. -* stdarg.h and register arguments: Register Arguments. -* tm.h macros: Target Macros. -* varargs.h and RT PC: RT Options. -* xm-MACHINE.h: Config. -* ! in constraint: Multi-Alternative. -* # in constraint: Modifiers. -* % in constraint: Modifiers. -* % in template: Output Template. -* & in constraint: Modifiers. -* * in constraint: Modifiers. -* + in constraint: Modifiers. -* /i in RTL dump: Flags. -* /s in RTL dump: Flags. -* /s in RTL dump: Flags. -* /u in RTL dump: Flags. -* /v in RTL dump: Flags. -* 0 in constraint: Simple Constraints. -* < in constraint: Simple Constraints. -* = in constraint: Modifiers. -* > in constraint: Simple Constraints. -* ? in constraint: Multi-Alternative. -* E in constraint: Simple Constraints. -* F in constraint: Simple Constraints. -* G in constraint: Simple Constraints. -* H in constraint: Simple Constraints. -* I in constraint: Simple Constraints. -* Q, in constraint: Simple Constraints. -* V in constraint: Simple Constraints. -* X in constraint: Simple Constraints. -* _ in variables in macros: Naming Types. -* d in constraint: Simple Constraints. -* g in constraint: Simple Constraints. -* i in constraint: Simple Constraints. -* m in constraint: Simple Constraints. -* n in constraint: Simple Constraints. -* o in constraint: Simple Constraints. -* p in constraint: Simple Constraints. -* r in constraint: Simple Constraints. -* store_multiple instruction pattern: Standard Names. -* s in constraint: Simple Constraints. -* ACCUMULATE_OUTGOING_ARGS: Stack Arguments. -* ADDITIONAL_REGISTER_NAMES: Instruction Output. -* ADDRESS_COST: Costs. -* ADJUST_INSN_LENGTH: Insn Lengths. -* ALLOCATE_TRAMPOLINE: Trampolines. -* ALL_REGS: Register Classes. -* AMD29K options: AMD29K Options. -* ANSI support: Dialect Options. -* ARGS_GROW_DOWNWARD: Frame Layout. -* ARG_POINTER_REGNUM: Frame Registers. -* ASM_APP_OFF: File Framework. -* ASM_APP_ON: File Framework. -* ASM_BYTE_OP: Data Output. -* ASM_CLOSE_PAREN: Data Output. -* ASM_COMMENT_START: File Framework. -* ASM_DECLARE_FUNCTION_NAME: Label Output. -* ASM_DECLARE_FUNCTION_SIZE: Label Output. -* ASM_DECLARE_OBJECT_NAME: Label Output. -* ASM_FILE_END: File Framework. -* ASM_FILE_START: File Framework. -* ASM_FINAL_SPEC: Driver. -* ASM_FORMAT_PRIVATE_NAME: Label Output. -* ASM_GENERATE_INTERNAL_LABEL: Label Output. -* ASM_GLOBALIZE_LABEL: Label Output. -* ASM_IDENTIFY_GCC: File Framework. -* ASM_NO_SKIP_IN_TEXT: Alignment Output. -* ASM_OPEN_PAREN: Data Output. -* ASM_OUTPUT_ADDR_DIFF_ELT: Dispatch Tables. -* ASM_OUTPUT_ADDR_VEC_ELT: Dispatch Tables. -* ASM_OUTPUT_ALIGN: Alignment Output. -* ASM_OUTPUT_ALIGNED_COMMON: Uninitialized Data. -* ASM_OUTPUT_ALIGNED_LOCAL: Uninitialized Data. -* ASM_OUTPUT_ALIGN_CODE: Alignment Output. -* ASM_OUTPUT_ASCII: Data Output. -* ASM_OUTPUT_BYTE: Data Output. -* ASM_OUTPUT_CASE_END: Dispatch Tables. -* ASM_OUTPUT_CASE_LABEL: Dispatch Tables. -* ASM_OUTPUT_CHAR: Data Output. -* ASM_OUTPUT_COMMON: Uninitialized Data. -* ASM_OUTPUT_CONSTRUCTOR: Constructor Output. -* ASM_OUTPUT_DESTRUCTOR: Constructor Output. -* ASM_OUTPUT_DOUBLE: Data Output. -* ASM_OUTPUT_DOUBLE_INT: Data Output. -* ASM_OUTPUT_EXTERNAL: Label Output. -* ASM_OUTPUT_EXTERNAL_LIBCALL: Label Output. -* ASM_OUTPUT_FLOAT: Data Output. -* ASM_OUTPUT_IDENT: File Framework. -* ASM_OUTPUT_INT: Data Output. -* ASM_OUTPUT_INTERNAL_LABEL: Label Output. -* ASM_OUTPUT_LABEL: Label Output. -* ASM_OUTPUT_LABELREF: Label Output. -* ASM_OUTPUT_LABELREF_AS_INT: Label Output. -* ASM_OUTPUT_LOCAL: Uninitialized Data. -* ASM_OUTPUT_LONG_DOUBLE: Data Output. -* ASM_OUTPUT_LOOP_ALIGN: Alignment Output. -* ASM_OUTPUT_OPCODE: Instruction Output. -* ASM_OUTPUT_POOL_PROLOGUE: Data Output. -* ASM_OUTPUT_QUADRUPLE_INT: Data Output. -* ASM_OUTPUT_REG_POP: Instruction Output. -* ASM_OUTPUT_REG_PUSH: Instruction Output. -* ASM_OUTPUT_SHARED_COMMON: Uninitialized Data. -* ASM_OUTPUT_SHARED_LOCAL: Uninitialized Data. -* ASM_OUTPUT_SHORT: Data Output. -* ASM_OUTPUT_SKIP: Alignment Output. -* ASM_OUTPUT_SOURCE_FILENAME: File Framework. -* ASM_OUTPUT_SOURCE_LINE: File Framework. -* ASM_OUTPUT_SPECIAL_POOL_ENTRY: Data Output. -* ASM_SPEC: Driver. -* ASM_STABD_OP: DBX Options. -* ASM_STABN_OP: DBX Options. -* ASM_STABS_OP: DBX Options. -* Alliant: Interoperation. -* BASE_REG_CLASS: Register Classes. -* BIGGEST_ALIGNMENT: Storage Layout. -* BIGGEST_FIELD_ALIGNMENT: Storage Layout. -* BITFIELD_NBYTES_LIMITED: Storage Layout. -* BITS_BIG_ENDIAN: Storage Layout. -* BITS_PER_UNIT: Storage Layout. -* BITS_PER_WORD: Storage Layout. -* BLKmode: Machine Modes. -* BLOCK_PROFILER: Profiling. -* BRANCH_COST: Costs. -* BYTES_BIG_ENDIAN: Storage Layout. -* BYTE_LOADS_ZERO_EXTEND: Misc. -* Bison parser generator: Installation. -* C language extensions: Extensions. -* C language, traditional: Dialect Options. -* C statements for assembler output: Output Statement. -* CALLER_SAVE_PROFITABLE: Caller Saves. -* CALL_USED_REGISTERS: Register Basics. -* CAN_ELIMINATE: Elimination. -* CASE_DROPS_THROUGH: Misc. -* CASE_VECTOR_MODE: Misc. -* CASE_VECTOR_PC_RELATIVE: Misc. -* CC1PLUS_SPEC: Driver. -* CC1_SPEC: Driver. -* CC_STATUS_MDEP: Condition Code. -* CC_STATUS_MDEP_INIT: Condition Code. -* CCmode: Machine Modes. -* CHAR_TYPE_SIZE: Type Layout. -* CHECK_FLOAT_VALUE: Storage Layout. -* CLASS_MAX_NREGS: Register Classes. -* CODE_LABEL_NUMBER: Insns. -* COMPILER_PATH: Environment Variables. -* CONDITIONAL_REGISTER_USAGE: Register Basics. -* CONST0_RTX: Constants. -* CONST1_RTX: Constants. -* CONST2_RTX: Constants. -* CONSTANT_ADDRESS_P: Addressing Modes. -* CONSTANT_ALIGNMENT: Storage Layout. -* CONSTANT_P: Addressing Modes. -* CONSTANT_POOL_ADDRESS_P: Flags. -* CONST_CALL_P: Flags. -* CONST_COSTS: Costs. -* CONST_DOUBLE_CHAIN: Constants. -* CONST_DOUBLE_LOW: Constants. -* CONST_DOUBLE_MEM: Constants. -* CONST_DOUBLE_OK_FOR_LETTER_P: Register Classes. -* CONST_OK_FOR_LETTER_P: Register Classes. -* COSTS_N_INSNS: Costs. -* CPLUS_INCLUDE_PATH: Environment Variables. -* CPP_PREDEFINES: Run-time Target. -* CPP_SPEC: Driver. -* CUMULATIVE_ARGS: Register Arguments. -* C_INCLUDE_PATH: Environment Variables. -* Convex options: Convex Options. -* DATA_ALIGNMENT: Storage Layout. -* DATA_SECTION_ASM_OP: Sections. -* DBR_OUTPUT_SEQEND: Instruction Output. -* DBX: Interoperation. -* DBX_CONTIN_CHAR: DBX Options. -* DBX_CONTIN_LENGTH: DBX Options. -* DBX_DEBUGGING_INFO: DBX Options. -* DBX_FUNCTION_FIRST: DBX Options. -* DBX_LBRAC_FIRST: DBX Options. -* DBX_MEMPARM_STABS_LETTER: DBX Options. -* DBX_NO_XREFS: DBX Options. -* DBX_OUTPUT_ENUM: DBX Hooks. -* DBX_OUTPUT_FUNCTION_END: DBX Hooks. -* DBX_OUTPUT_LBRAC: DBX Hooks. -* DBX_OUTPUT_MAIN_SOURCE_DIRECTORY: File Names and DBX. -* DBX_OUTPUT_MAIN_SOURCE_FILENAME: File Names and DBX. -* DBX_OUTPUT_MAIN_SOURCE_FILE_END: File Names and DBX. -* DBX_OUTPUT_RBRAC: DBX Hooks. -* DBX_OUTPUT_SOURCE_FILENAME: File Names and DBX. -* DBX_OUTPUT_STANDARD_TYPES: DBX Hooks. -* DBX_REGISTER_NUMBER: All Debuggers. -* DBX_REGPARM_STABS_CODE: DBX Options. -* DBX_REGPARM_STABS_LETTER: DBX Options. -* DBX_STATIC_CONST_VAR_CODE: DBX Options. -* DBX_STATIC_STAB_DATA_SECTION: DBX Options. -* DBX_TYPE_DECL_STABS_CODE: DBX Options. -* DBX_WORKING_DIRECTORY: File Names and DBX. -* DCmode: Machine Modes. -* DEBUGGER_ARG_OFFSET: All Debuggers. -* DEBUGGER_AUTO_OFFSET: All Debuggers. -* DEBUG_SYMS_TEXT: DBX Options. -* DEFAULT_CALLER_SAVES: Caller Saves. -* DEFAULT_GDB_EXTENSIONS: DBX Options. -* DEFAULT_MAIN_RETURN: Misc. -* DEFAULT_SHORT_ENUMS: Type Layout. -* DEFAULT_SIGNED_CHAR: Type Layout. -* DELAY_SLOTS_FOR_EPILOGUE: Function Entry. -* DEPENDENCIES_OUTPUT: Environment Variables. -* DFmode: Machine Modes. -* DIVDI3_LIBCALL: Library Calls. -* DIVSI3_LIBCALL: Library Calls. -* DImode: Machine Modes. -* DOLLARS_IN_IDENTIFIERS: Misc. -* DONE: Expander Definitions. -* DONT_REDUCE_ADDR: Costs. -* DOUBLE_TYPE_SIZE: Type Layout. -* DWARF_DEBUGGING_INFO: SDB and DWARF. -* DYNAMIC_CHAIN_ADDRESS: Frame Layout. -* De Morgan's law: Insn Canonicalizations. -* Dependent Patterns: Dependent Patterns. -* EASY_DIV_EXPR: Misc. -* ELIGIBLE_FOR_EPILOGUE_DELAY: Function Entry. -* ELIMINABLE_REGS: Elimination. -* EMPTY_FIELD_BOUNDARY: Storage Layout. -* ENCODE_SECTION_INFO: Sections. -* ENDFILE_SPEC: Driver. -* EXECUTABLE_SUFFIX: Config. -* EXIT_BODY: Misc. -* EXIT_IGNORE_STACK: Function Entry. -* EXPAND_BUILTIN_SAVEREGS: Varargs. -* EXTRA_CC_MODES: Condition Code. -* EXTRA_CC_NAMES: Condition Code. -* EXTRA_CONSTRAINT: Register Classes. -* EXTRA_SECTIONS: Sections. -* EXTRA_SECTION_FUNCTIONS: Sections. -* FAIL: Expander Definitions. -* FAILURE_EXIT_CODE: Config. -* FINALIZE_PIC: PIC. -* FINAL_PRESCAN_INSN: Instruction Output. -* FINAL_REG_PARM_STACK_SPACE: Stack Arguments. -* FIRST_INSN_ADDRESS: Insn Lengths. -* FIRST_PARM_OFFSET: Frame Layout. -* FIRST_PSEUDO_REGISTER: Register Basics. -* FIRST_STACK_REG: Stack Registers. -* FIRST_VIRTUAL_REGISTER: Regs and Memory. -* FIXED_REGISTERS: Register Basics. -* FIXUNS_TRUNC_LIKE_FIX_TRUNC: Misc. -* FLOATIFY: Library Calls. -* FLOAT_ARG_TYPE: Library Calls. -* FLOAT_TYPE_SIZE: Type Layout. -* FLOAT_VALUE_TYPE: Library Calls. -* FRAME_GROWS_DOWNWARD: Frame Layout. -* FRAME_POINTER_REGNUM: Frame Registers. -* FRAME_POINTER_REQUIRED: Elimination. -* FUNCTION_ARG: Register Arguments. -* FUNCTION_ARG_ADVANCE: Register Arguments. -* FUNCTION_ARG_BOUNDARY: Register Arguments. -* FUNCTION_ARG_PADDING: Register Arguments. -* FUNCTION_ARG_PARTIAL_NREGS: Register Arguments. -* FUNCTION_ARG_PASS_BY_REFERENCE: Register Arguments. -* FUNCTION_ARG_REGNO_P: Register Arguments. -* FUNCTION_BLOCK_PROFILER: Profiling. -* FUNCTION_BOUNDARY: Storage Layout. -* FUNCTION_CONVERSION_BUG: Config. -* FUNCTION_EPILOGUE: Function Entry. -* FUNCTION_INCOMING_ARG: Register Arguments. -* FUNCTION_MODE: Misc. -* FUNCTION_OUTGOING_VALUE: Scalar Return. -* FUNCTION_PROFILER: Profiling. -* FUNCTION_PROLOGUE: Function Entry. -* FUNCTION_VALUE: Scalar Return. -* FUNCTION_VALUE_REGNO_P: Scalar Return. -* GCC_EXEC_PREFIX: Environment Variables. -* GENERAL_REGS: Register Classes. -* GET_CLASS_NARROWEST_MODE: Machine Modes. -* GET_CODE: RTL Objects. -* GET_MODE: Machine Modes. -* GET_MODE_ALIGNMENT: Machine Modes. -* GET_MODE_BITSIZE: Machine Modes. -* GET_MODE_CLASS: Machine Modes. -* GET_MODE_MASK: Machine Modes. -* GET_MODE_NAME: Machine Modes. -* GET_MODE_NUNITS: Machine Modes. -* GET_MODE_SIZE: Machine Modes. -* GET_MODE_UNIT_SIZE: Machine Modes. -* GET_MODE_WIDER_MODE: Machine Modes. -* GET_RTX_CLASS: Accessors. -* GET_RTX_FORMAT: Accessors. -* GET_RTX_LENGTH: Accessors. -* GLOBALDEF: Global Declarations. -* GLOBALREF: Global Declarations. -* GLOBALVALUEDEF: Global Declarations. -* GLOBALVALUEREF: Global Declarations. -* GNU CC and portability: Portability. -* GNU CC command options: Invoking GCC. -* GNU extensions to the C language: Extensions. -* GO_IF_LEGITIMATE_ADDRESS: Addressing Modes. -* GO_IF_MODE_DEPENDENT_ADDRESS: Addressing Modes. -* HANDLE_PRAGMA: Misc. -* HARD_REGNO_MODE_OK: Values in Registers. -* HARD_REGNO_NREGS: Values in Registers. -* HAVE_ATEXIT: Misc. -* HAVE_POST_DECREMENT: Addressing Modes. -* HAVE_POST_INCREMENT: Addressing Modes. -* HAVE_PRE_DECREMENT: Addressing Modes. -* HAVE_PRE_INCREMENT: Addressing Modes. -* HAVE_PUTENV: Config. -* HAVE_VPRINTF: Config. -* HImode: Machine Modes. -* HOST_BITS_PER_CHAR: Config. -* HOST_BITS_PER_INT: Config. -* HOST_BITS_PER_LONG: Config. -* HOST_BITS_PER_SHORT: Config. -* HOST_FLOAT_FORMAT: Config. -* HOST_WORDS_BIG_ENDIAN: Config. -* IBM RS/6000 Options: RS/6000 Options. -* IBM RT PC: Interoperation. -* IBM RT options: RT Options. -* IEEE_FLOAT_FORMAT: Storage Layout. -* IMMEDIATE_PREFIX: Instruction Output. -* IMPLICIT_FIX_EXPR: Misc. -* INCLUDE_DEFAULTS: Driver. -* INDEX_REG_CLASS: Register Classes. -* INITIALIZE_TRAMPOLINE: Trampolines. -* INITIAL_ELIMINATION_OFFSET: Elimination. -* INITIAL_FRAME_POINTER_OFFSET: Elimination. -* INIT_CUMULATIVE_ARGS: Register Arguments. -* INIT_CUMULATIVE_INCOMING_ARGS: Register Arguments. -* INIT_SECTION_ASM_OP: Sections. -* INSN_ANNULLED_BRANCH_P: Flags. -* INSN_CACHE_DEPTH: Trampolines. -* INSN_CACHE_LINE_WIDTH: Trampolines. -* INSN_CACHE_SIZE: Trampolines. -* INSN_CLOBBERS_REGNO_P: Obsolete Register Macros. -* INSN_CODE: Insns. -* INSN_DELETED_P: Flags. -* INSN_FROM_TARGET_P: Flags. -* INSN_UID: Insns. -* INTEGRATE_THRESHOLD: Misc. -* INTIFY: Library Calls. -* INT_TYPE_SIZE: Type Layout. -* Intel 386 Options: i386 Options. -* Interdependence of Patterns: Dependent Patterns. -* JUMP_LABEL: Insns. -* JUMP_TABLES_IN_TEXT_SECTION: Sections. -* LABEL_NUSES: Insns. -* LABEL_OUTSIDE_LOOP_P: Flags. -* LABEL_PRESERVE_P: Flags. -* LAST_STACK_REG: Stack Registers. -* LAST_VIRTUAL_REGISTER: Regs and Memory. -* LEAF_REGISTERS: Leaf Functions. -* LEAF_REG_REMAP: Leaf Functions. -* LEGITIMATE_CONSTANT_P: Addressing Modes. -* LEGITIMATE_PIC_OPERAND_P: Addressing Modes. -* LEGITIMIZE_ADDRESS: Addressing Modes. -* LIBCALL_VALUE: Scalar Return. -* LIBGCC_NEEDS_DOUBLE: Library Calls. -* LIBRARY_PATH: Environment Variables. -* LIB_SPEC: Driver. -* LIMIT_RELOAD_CLASS: Register Classes. -* LINK_LIBGCC_SPECIAL: Driver. -* LINK_SPEC: Driver. -* LOCAL_INCLUDE_DIR: Driver. -* LOCAL_LABEL_PREFIX: Instruction Output. -* LOG_LINKS: Insns. -* LONGJMP_RESTORE_FROM_STACK: Elimination. -* LONG_DOUBLE_TYPE_SIZE: Type Layout. -* LONG_LONG_TYPE_SIZE: Type Layout. -* LONG_TYPE_SIZE: Type Layout. -* Libraries: Link Options. -* M680x0 options: M680x0 Options. -* M88k options: M88K Options. -* MAX_BITS_PER_WORD: Storage Layout. -* MAX_FIXED_MODE_SIZE: Storage Layout. -* MAX_OFILE_ALIGNMENT: Storage Layout. -* MAX_REGS_PER_ADDRESS: Addressing Modes. -* MAYBE_REG_PARM_STACK_SPACE: Stack Arguments. -* MD_EXEC_PREFIX: Driver. -* MD_STARTFILE_PREFIX: Driver. -* MD_STARTFILE_PREFIX_1: Driver. -* MEMORY_MOVE_COST: Costs. -* MEM_IN_STRUCT_P: Flags. -* MEM_VOLATILE_P: Flags. -* MIPS options: MIPS Options. -* MODDI3_LIBCALL: Library Calls. -* MODES_TIEABLE_P: Values in Registers. -* MODE_CC: Machine Modes. -* MODE_COMPLEX_FLOAT: Machine Modes. -* MODE_COMPLEX_INT: Machine Modes. -* MODE_FLOAT: Machine Modes. -* MODE_FUNCTION: Machine Modes. -* MODE_INT: Machine Modes. -* MODE_PARTIAL_INT: Machine Modes. -* MODE_RANDOM: Machine Modes. -* MODSI3_LIBCALL: Library Calls. -* MOVE_MAX: Misc. -* MOVE_RATIO: Costs. -* MULDI3_LIBCALL: Library Calls. -* MULSI3_LIBCALL: Library Calls. -* MULTIBYTE_CHARS: Config. -* NEXT_INSN: Insns. -* NEXT_OBJC_RUNTIME: Library Calls. -* NON_SAVING_SETJMP: Register Basics. -* NOTE_INSN_BLOCK_BEG: Insns. -* NOTE_INSN_BLOCK_END: Insns. -* NOTE_INSN_DELETED: Insns. -* NOTE_INSN_FUNCTION_END: Insns. -* NOTE_INSN_LOOP_BEG: Insns. -* NOTE_INSN_LOOP_CONT: Insns. -* NOTE_INSN_LOOP_END: Insns. -* NOTE_INSN_LOOP_VTOP: Insns. -* NOTE_INSN_SETJMP: Insns. -* NOTE_LINE_NUMBER: Insns. -* NOTE_SOURCE_FILE: Insns. -* NOTICE_UPDATE_CC: Condition Code. -* NO_DOLLAR_IN_LABEL: Misc. -* NO_FUNCTION_CSE: Costs. -* NO_RECURSIVE_FUNCTION_CSE: Costs. -* NO_REGS: Register Classes. -* NO_STAB_H: Config. -* NO_SYS_SIGLIST: Config. -* NUM_MACHINE_MODES: Machine Modes. -* N_REG_CLASSES: Register Classes. -* OBJC_GEN_METHOD_LABEL: Label Output. -* OBJC_INCLUDE_PATH: Environment Variables. -* OBJC_INT_SELECTORS: Type Layout. -* OBJC_PROLOGUE: File Framework. -* OBJC_SELECTORS_WITHOUT_LABELS: Type Layout. -* OBJECT_FORMAT_COFF: Constructor Output. -* OBJECT_FORMAT_ROSE: Constructor Output. -* OBSTACK_CHUNK_ALLOC: Config. -* OBSTACK_CHUNK_FREE: Config. -* OBSTACK_CHUNK_SIZE: Config. -* OCS (88k): M88K Options. -* ONLY_INT_FIELDS: Config. -* OPTIMIZATION_OPTIONS: Run-time Target. -* ORDER_REGS_FOR_LOCAL_ALLOC: Allocation Order. -* OUTGOING_REG_PARM_STACK_SPACE: Stack Arguments. -* OVERLAPPING_REGNO_P: Obsolete Register Macros. -* OVERRIDE_OPTIONS: Run-time Target. -* Ordering of Patterns: Pattern Ordering. -* PARM_BOUNDARY: Storage Layout. -* PATTERN: Insns. -* PCC_BITFIELD_TYPE_MATTERS: Storage Layout. -* PCC_STATIC_STRUCT_RETURN: Aggregate Return. -* PDImode: Machine Modes. -* PIC: PIC. -* PIC_OFFSET_TABLE_REGNUM: PIC. -* POINTER_SIZE: Storage Layout. -* PREDICATE_CODES: Misc. -* PREFERRED_RELOAD_CLASS: Register Classes. -* PRESERVE_DEATH_INFO_REGNO_P: Obsolete Register Macros. -* PREV_INSN: Insns. -* PRINT_OPERAND: Instruction Output. -* PRINT_OPERAND_ADDRESS: Instruction Output. -* PRINT_OPERAND_PUNCT_VALID_P: Instruction Output. -* PROFILE_BEFORE_PROLOGUE: Profiling. -* PROMOTE_PROTOTYPES: Stack Arguments. -* PSImode: Machine Modes. -* PTRDIFF_TYPE: Type Layout. -* PUSH_ROUNDING: Stack Arguments. -* PUT_CODE: RTL Objects. -* PUT_MODE: Machine Modes. -* PUT_REG_NOTE_KIND: Insns. -* PUT_SDB_...: SDB and DWARF. -* Pattern Ordering: Pattern Ordering. -* Pmode: Misc. -* QImode: Machine Modes. -* READONLY_DATA_SECTION: Sections. -* REAL_ARITHMETIC: Cross-compilation. -* REAL_INFINITY: Cross-compilation. -* REAL_NM_FILE_NAME: Constructor Output. -* REAL_VALUES_EQUAL: Cross-compilation. -* REAL_VALUES_LESS: Cross-compilation. -* REAL_VALUE_ATOF: Cross-compilation. -* REAL_VALUE_FIX: Cross-compilation. -* REAL_VALUE_FIX_TRUNCATE: Cross-compilation. -* REAL_VALUE_FROM_INT: Cross-compilation. -* REAL_VALUE_ISINF: Cross-compilation. -* REAL_VALUE_ISNAN: Cross-compilation. -* REAL_VALUE_LDEXP: Cross-compilation. -* REAL_VALUE_NEGATE: Cross-compilation. -* REAL_VALUE_TO_INT: Cross-compilation. -* REAL_VALUE_TRUNCATE: Cross-compilation. -* REAL_VALUE_TYPE: Cross-compilation. -* REAL_VALUE_UNSIGNED_FIX: Cross-compilation. -* REAL_VALUE_UNSIGNED_FIX_TRUNCATE: Cross-compilation. -* REGISTER_MOVE_COST: Costs. -* REGISTER_NAMES: Instruction Output. -* REGISTER_PREFIX: Instruction Output. -* REGNO_OK_FOR_BASE_P: Register Classes. -* REGNO_OK_FOR_INDEX_P: Register Classes. -* REGNO_REG_CLASS: Register Classes. -* REG_ALLOC_ORDER: Allocation Order. -* REG_CC_SETTER: Insns. -* REG_CC_USER: Insns. -* REG_CLASS_CONTENTS: Register Classes. -* REG_CLASS_FROM_LETTER: Register Classes. -* REG_CLASS_NAMES: Register Classes. -* REG_DEAD: Insns. -* REG_DEP_ANTI: Insns. -* REG_DEP_OUTPUT: Insns. -* REG_EQUAL: Insns. -* REG_EQUIV: Insns. -* REG_FUNCTION_VALUE_P: Flags. -* REG_INC: Insns. -* REG_LABEL: Insns. -* REG_LEAF_ALLOC_ORDER: Leaf Functions. -* REG_LIBCALL: Insns. -* REG_LOOP_TEST_P: Flags. -* REG_NONNEG: Insns. -* REG_NOTES: Insns. -* REG_NOTE_KIND: Insns. -* REG_NO_CONFLICT: Insns. -* REG_OK_FOR_BASE_P: Addressing Modes. -* REG_OK_FOR_INDEX_P: Addressing Modes. -* REG_OK_STRICT: Addressing Modes. -* REG_PARM_STACK_SPACE: Stack Arguments. -* REG_RETVAL: Insns. -* REG_UNUSED: Insns. -* REG_USERVAR_P: Flags. -* REG_WAS_0: Insns. -* RELATIVE_PREFIX_NOT_LINKDIR: Driver. -* RETURN_IN_MEMORY: Aggregate Return. -* RETURN_POPS_ARGS: Stack Arguments. -* ROUND_TYPE_ALIGN: Storage Layout. -* ROUND_TYPE_SIZE: Storage Layout. -* RS/6000 Options: RS/6000 Options. -* RT PC: Interoperation. -* RT options: RT Options. -* RTL addition: Arithmetic. -* RTL comparison: Arithmetic. -* RTL comparison operations: Comparisons. -* RTL constant expression types: Constants. -* RTL constants: Constants. -* RTL declarations: RTL Declarations. -* RTL difference: Arithmetic. -* RTL expression: RTL Objects. -* RTL expressions for arithmetic: Arithmetic. -* RTL format: Accessors. -* RTL format characters: Accessors. -* RTL function-call insns: Calls. -* RTL generation: Passes. -* RTL insn template: RTL Template. -* RTL integers: RTL Objects. -* RTL memory expressions: Regs and Memory. -* RTL object types: RTL Objects. -* RTL postdecrement: Incdec. -* RTL postincrement: Incdec. -* RTL predecrement: Incdec. -* RTL preincrement: Incdec. -* RTL register expressions: Regs and Memory. -* RTL representation: RTL. -* RTL side effect expressions: Side Effects. -* RTL strings: RTL Objects. -* RTL structure sharing assumptions: Sharing. -* RTL subtraction: Arithmetic. -* RTL sum: Arithmetic. -* RTL vectors: RTL Objects. -* RTX (See RTL): RTL Objects. -* RTX_COSTS: Costs. -* RTX_INTEGRATED_P: Flags. -* RTX_UNCHANGING_P: Flags. -* Register Transfer Language (RTL): RTL. -* SCCS_DIRECTIVE: Misc. -* SCHED_GROUP_P: Flags. -* SCmode: Machine Modes. -* SDB_ALLOW_FORWARD_REFERENCES: SDB and DWARF. -* SDB_ALLOW_UNKNOWN_REFERENCES: SDB and DWARF. -* SDB_DEBUGGING_INFO: SDB and DWARF. -* SDB_DELIM: SDB and DWARF. -* SDB_GENERATE_FAKE: SDB and DWARF. -* SECONDARY_INPUT_RELOAD_CLASS: Register Classes. -* SECONDARY_OUTPUT_RELOAD_CLASS: Register Classes. -* SECONDARY_RELOAD_CLASS: Register Classes. -* SELECT_CC_MODE: Condition Code. -* SELECT_RTX_SECTION: Sections. -* SELECT_SECTION: Sections. -* SETUP_INCOMING_VARARGS: Varargs. -* SET_DEST: Side Effects. -* SET_SRC: Side Effects. -* SFmode: Machine Modes. -* SHARED_SECTION_ASM_OP: Sections. -* SHIFT_COUNT_TRUNCATED: Misc. -* SHORT_TYPE_SIZE: Type Layout. -* SIGNED_CHAR_SPEC: Driver. -* SIZE_TYPE: Type Layout. -* SImode: Machine Modes. -* SLOW_BYTE_ACCESS: Costs. -* SLOW_UNALIGNED_ACCESS: Costs. -* SLOW_ZERO_EXTEND: Costs. -* SMALL_REGISTER_CLASSES: Register Classes. -* SPARC options: Sparc Options. -* STACK_BOUNDARY: Storage Layout. -* STACK_DYNAMIC_OFFSET: Frame Layout. -* STACK_GROWS_DOWNWARD: Frame Layout. -* STACK_PARMS_IN_REG_PARM_AREA: Stack Arguments. -* STACK_POINTER_OFFSET: Frame Layout. -* STACK_POINTER_REGNUM: Frame Registers. -* STACK_REGS: Stack Registers. -* STANDARD_EXEC_PREFIX: Driver. -* STANDARD_INCLUDE_DIR: Driver. -* STANDARD_STARTFILE_PREFIX: Driver. -* STARTFILE_SPEC: Driver. -* STARTING_FRAME_OFFSET: Frame Layout. -* STATIC_CHAIN: Frame Registers. -* STATIC_CHAIN_INCOMING: Frame Registers. -* STATIC_CHAIN_INCOMING_REGNUM: Frame Registers. -* STATIC_CHAIN_REGNUM: Frame Registers. -* STDC_VALUE: Run-time Target. -* STORE_FLAG_VALUE: Misc. -* STRICT_ALIGNMENT: Storage Layout. -* STRUCTURE_SIZE_BOUNDARY: Storage Layout. -* STRUCT_VALUE: Aggregate Return. -* STRUCT_VALUE_INCOMING: Aggregate Return. -* STRUCT_VALUE_INCOMING_REGNUM: Aggregate Return. -* STRUCT_VALUE_REGNUM: Aggregate Return. -* SUBREG_REG: Regs and Memory. -* SUBREG_WORD: Regs and Memory. -* SUCCESS_EXIT_CODE: Config. -* SVr4: M88K Options. -* SWITCHES_NEED_SPACES: Driver. -* SWITCH_TAKES_ARG: Driver. -* SYMBOL_REF_FLAG: Flags. -* SYMBOL_REF_USED: Flags. -* SYSTEM_INCLUDE_DIR: Driver. -* Sun installation: Sun Install. -* TARGET_BELL: Type Layout. -* TARGET_BS: Type Layout. -* TARGET_CR: Type Layout. -* TARGET_FF: Type Layout. -* TARGET_FLOAT_FORMAT: Storage Layout. -* TARGET_MEM_FUNCTIONS: Library Calls. -* TARGET_NEWLINE: Type Layout. -* TARGET_OPTIONS: Run-time Target. -* TARGET_SWITCHES: Run-time Target. -* TARGET_TAB: Type Layout. -* TARGET_VERSION: Run-time Target. -* TARGET_VT: Type Layout. -* TCmode: Machine Modes. -* TEXT_SECTION_ASM_OP: Sections. -* TFmode: Machine Modes. -* TImode: Machine Modes. -* TMPDIR: Environment Variables. -* TRADITIONAL_RETURN_FLOAT: Scalar Return. -* TRAMPOLINE_ALIGNMENT: Trampolines. -* TRAMPOLINE_SIZE: Trampolines. -* TRAMPOLINE_TEMPLATE: Trampolines. -* TRANSFER_FROM_TRAMPOLINE: Trampolines. -* TRULY_NOOP_TRUNCATION: Misc. -* UDIVDI3_LIBCALL: Library Calls. -* UDIVSI3_LIBCALL: Library Calls. -* UMODDI3_LIBCALL: Library Calls. -* UMODSI3_LIBCALL: Library Calls. -* UNITS_PER_WORD: Storage Layout. -* UNKNOWN_FLOAT_FORMAT: Storage Layout. -* USER_LABEL_PREFIX: Instruction Output. -* USE_C_ALLOCA: Config. -* USG: Config. -* Ultrix calling convention: Interoperation. -* Unos installation: Unos Install. -* VAX options: VAX Options. -* VAX_FLOAT_FORMAT: Storage Layout. -* VIRTUAL_INCOMING_ARGS_REGNUM: Regs and Memory. -* VIRTUAL_OUTGOING_ARGS_REGNUM: Regs and Memory. -* VIRTUAL_STACK_DYNAMIC_REGNUM: Regs and Memory. -* VIRTUAL_STACK_VARS_REGNUM: Regs and Memory. -* VMS: Config. -* VMS and case sensitivity: VMS Misc. -* VMS and include files: Include Files and VMS. -* VMS installation: VMS Install. -* VOIDmode: Machine Modes. -* Vax calling convention: Interoperation. -* WCHAR_TYPE: Type Layout. -* WCHAR_TYPE_SIZE: Type Layout. -* WORDS_BIG_ENDIAN: Storage Layout. -* WORD_SWITCH_TAKES_ARG: Driver. -* XCOFF_DEBUGGING_INFO: DBX Options. -* XCmode: Machine Modes. -* XEXP: Accessors. -* XFmode: Machine Modes. -* XINT: Accessors. -* XSTR: Accessors. -* XVEC: Accessors. -* XVECEXP: Accessors. -* XVECLEN: Accessors. -* \: Output Template. -* __bb_init_func: Profiling. -* __builtin_args_info: Varargs. -* __builtin_classify_type: Varargs. -* __builtin_next_arg: Varargs. -* __builtin_saveregs: Varargs. -* abort: Portability. -* abs: Arithmetic. -* absolute value: Arithmetic. -* access to operands: Accessors. -* accessors: Accessors. -* addr_diff_vec: Side Effects. -* addr_vec: Side Effects. -* address: RTL Template. -* address constraints: Simple Constraints. -* address of a label: Labels as Values. -* address_operand: Simple Constraints. -* addressing modes: Addressing Modes. -* aggregates as return values: Aggregate Return. -* alignment: Alignment. -* alternate keywords: Alternate Keywords. -* analysis, data flow: Passes. -* and: Arithmetic. -* apostrophes: Incompatibilities. -* arg_pointer_rtx: Frame Registers. -* argument passing: Interface. -* arguments in frame (88k): M88K Options. -* arguments in registers: Register Arguments. -* arguments on stack: Stack Arguments. -* arithmetic libraries: Interface. -* arithmetic shift: Arithmetic. -* arithmetic simplifications: Passes. -* arithmetic, in RTL: Arithmetic. -* arrays of length zero: Zero Length. -* arrays of variable length: Variable Length. -* arrays, non-lvalue: Subscripting. -* ashift: Arithmetic. -* ashiftrt: Arithmetic. -* asm_fprintf: Instruction Output. -* asm_input: Side Effects. -* asm_noperands: Insns. -* assemble_name: Label Output. -* assembler format: File Framework. -* assembler instructions: Extended Asm. -* assembler instructions in RTL: Assembler. -* assembler names for identifiers: Asm Labels. -* assembler syntax, 88k: M88K Options. -* assembly code, invalid: Bug Criteria. -* assigning attribute values to insns: Tagging Insns. -* asterisk in template: Output Statement. -* atof: Cross-compilation. -* attr: Tagging Insns. -* attribute expressions: Expressions. -* attribute of variables: Variable Attributes. -* attribute specifications: Attr Example. -* attribute specifications example: Attr Example. -* attributes, defining: Defining Attributes. -* autoincrement addressing, availability: Portability. -* autoincrement/decrement addressing: Simple Constraints. -* autoincrement/decrement analysis: Passes. -* backslash: Output Template. -* backtrace for bug reports: Bug Reporting. -* barrier: Insns. -* basic blocks: Passes. -* bcmp: Config. -* bit fields: Bit Fields. -* bit shift overflow (88k): M88K Options. -* bitwise complement: Arithmetic. -* bitwise exclusive-or: Arithmetic. -* bitwise inclusive-or: Arithmetic. -* bitwise logical-and: Arithmetic. -* break_out_memory_refs: Addressing Modes. -* bug criteria: Bug Criteria. -* bug report mailing lists: Bug Lists. -* bugs: Bugs. -* bugs, known: Trouble. -* byte_mode: Machine Modes. -* bzero: Config. -* call: Side Effects. -* call-clobbered register: Register Basics. -* call-saved register: Register Basics. -* call-used register: Register Basics. -* call_insn: Insns. -* call_used_regs: Register Basics. -* calling conventions: Stack and Calling. -* calling functions in RTL: Calls. -* canonicalization of instructions: Insn Canonicalizations. -* case labels in initializers: Labeled Elements. -* case ranges: Case Ranges. -* case sensitivity and VMS: VMS Misc. -* cast to a union: Cast to Union. -* casts as lvalues: Lvalues. -* cc0: Regs and Memory. -* cc0_rtx: Regs and Memory. -* cc_status: Condition Code. -* change_address: Standard Names. -* class definitions, register: Register Classes. -* class preference constraints: Class Preferences. -* classes of RTX codes: Accessors. -* clobber: Side Effects. -* code generation RTL sequences: Expander Definitions. -* code generation conventions: Code Gen Options. -* code motion: Passes. -* code_label: Insns. -* codes, RTL expression: RTL Objects. -* combiner pass: Regs and Memory. -* command options: Invoking GCC. -* common subexpression elimination: Passes. -* compare: Arithmetic. -* compilation in a separate directory: Other Dir. -* compiler bugs, reporting: Bug Reporting. -* compiler passes and files: Passes. -* compiler version, specifying: Target Options. -* complement, bitwise: Arithmetic. -* compound expressions as lvalues: Lvalues. -* computed gotos: Labels as Values. -* computing the length of an insn: Insn Lengths. -* cond: Comparisons. -* condition code register: Regs and Memory. -* condition code status: Condition Code. -* condition codes: Comparisons. -* conditional expressions as lvalues: Lvalues. -* conditional expressions, extensions: Conditionals. -* conditions, in patterns: Patterns. -* configuration file: Config. -* conflicting types: Disappointments. -* const0_rtx: Constants. -* const1_rtx: Constants. -* const2_rtx: Constants. -* const_double: Constants. -* const_int: Constants. -* const_string: Constants. -* const_true_rtx: Constants. -* constant attributes: Constant Attributes. -* constant folding: Passes. -* constant folding and floating point: Cross-compilation. -* constant propagation: Passes. -* constants in constraints: Simple Constraints. -* constm1_rtx: Constants. -* constraint modifier characters: Modifiers. -* constraint, matching: Simple Constraints. -* constraints: Constraints. -* constructor expressions: Constructors. -* constructors, output of: Constructor Output. -* contributors: Contributors. -* controlling register usage: Register Basics. -* controlling the compilation driver: Driver. -* conventions, run-time: Interface. -* conversions: Conversions. -* copy_rtx_if_shared: Sharing. -* core dump: Bug Criteria. -* costs of instructions: Costs. -* cross compilation and floating point: Cross-compilation. -* cross compiling: Target Options. -* cross-compiler, installation: Cross-Compiler. -* cross-jumping: Passes. -* current_function_epilogue_delay_list: Function Entry. -* current_function_outgoing_args_size: Stack Arguments. -* current_function_pops_args: Function Entry. -* current_function_pretend_args_size: Function Entry. -* data flow analysis: Passes. -* data_section: Sections. -* dbr_sequence_length: Instruction Output. -* dead code: Passes. -* dead_or_set_p: Peephole Definitions. -* deallocating variable length arrays: Variable Length. -* death notes: Obsolete Register Macros. -* debug_rtx: Bug Reporting. -* debugging information generation: Passes. -* debugging information options: Debugging Options. -* debugging, 88k OCS: M88K Options. -* declaration scope: Incompatibilities. -* declarations inside expressions: Statement Exprs. -* declarations, RTL: RTL Declarations. -* declaring attributes of functions: Function Attributes. -* define_asm_attributes: Tagging Insns. -* define_attr: Defining Attributes. -* define_delay: Delay Slots. -* define_expand: Expander Definitions. -* define_function_unit: Function Units. -* define_insn: Patterns. -* define_peephole: Expander Definitions. -* define_split: Insn Splitting. -* defining RTL sequences for code generation: Expander Definitions. -* defining attributes and their values: Defining Attributes. -* defining jump instruction patterns: Jump Patterns. -* defining peephole optimizers: Peephole Definitions. -* delay slots, defining: Delay Slots. -* delayed branch scheduling: Passes. -* dependencies for make as output: Environment Variables. -* dependencies, make: Preprocessor Options. -* destructors, output of: Constructor Output. -* dialect options: Dialect Options. -* digits in constraint: Simple Constraints. -* directory options: Directory Options. -* disabling certain registers: Register Basics. -* dispatch table: Dispatch Tables. -* div: Arithmetic. -* divide instruction, 88k: M88K Options. -* division: Arithmetic. -* division: Arithmetic. -* division: Arithmetic. -* dollar signs in identifier names: Dollar Signs. -* double-word arithmetic: Long Long. -* downward funargs: Nested Functions. -* driver: Driver. -* empty constraints: No Constraints. -* endianness: Portability. -* enum machine_mode: Machine Modes. -* enum reg_class: Register Classes. -* environment variables: Environment Variables. -* epilogue: Function Entry. -* eq: Comparisons. -* eq_attr: Expressions. -* equal: Comparisons. -* error: Storage Layout. -* exclamation point: Multi-Alternative. -* exclusive-or, bitwise: Arithmetic. -* exit status and VMS: VMS Misc. -* expander definitions: Expander Definitions. -* explicit register variables: Explicit Reg Vars. -* expr_list: Insns. -* expression codes: RTL Objects. -* expressions containing statements: Statement Exprs. -* expressions, compound, as lvalues: Lvalues. -* expressions, conditional, as lvalues: Lvalues. -* expressions, constructor: Constructors. -* extended asm: Extended Asm. -* extensible constraints: Simple Constraints. -* extensions, ?:: Lvalues. -* extensions, ?:: Conditionals. -* extensions, C language: Extensions. -* extern int target_flags: Run-time Target. -* external declaration scope: Incompatibilities. -* fatal signal: Bug Criteria. -* features, optional, in system conventions: Run-time Target. -* ffs: Arithmetic. -* file name suffix: Overall Options. -* file names: Link Options. -* files and passes of the compiler: Passes. -* final pass: Passes. -* final_scan_insn: Function Entry. -* final_sequence: Instruction Output. -* fix: Conversions. -* fix: Conversions. -* fixed register: Register Basics. -* fixed_regs: Register Basics. -* flags in RTL expression: Flags. -* float: Conversions. -* float_extend: Conversions. -* float_truncate: Conversions. -* floating point format and cross compilation: Cross-compilation. -* force_reg: Standard Names. -* frame layout: Frame Layout. -* frame_pointer_needed: Function Entry. -* frame_pointer_rtx: Frame Registers. -* function attributes: Function Attributes. -* function call conventions: Interface. -* function entry and exit: Function Entry. -* function pointers, arithmetic: Pointer Arith. -* function prototype declarations: Function Prototypes. -* function units, for scheduling: Function Units. -* function, size of pointer to: Pointer Arith. -* function-call insns: Calls. -* functions that have no side effects: Function Attributes. -* functions that never return: Function Attributes. -* functions, leaf: Leaf Functions. -* ge: Comparisons. -* gencodes: Passes. -* genconfig: Passes. -* general_operand: RTL Template. -* generalized lvalues: Lvalues. -* generating assembler output: Output Statement. -* generating insns: RTL Template. -* genflags: Passes. -* get_attr: Expressions. -* get_attr_length: Insn Lengths. -* get_frame_size: Elimination. -* get_insns: Insns. -* get_last_insn: Insns. -* geu: Comparisons. -* global offset table: Code Gen Options. -* global register after longjmp: Global Reg Vars. -* global register allocation: Passes. -* global register variables: Global Reg Vars. -* goto with computed label: Labels as Values. -* gp-relative references (MIPS): MIPS Options. -* greater than: Comparisons. -* greater than: Comparisons. -* greater than: Comparisons. -* grouping options: Invoking GCC. -* gt: Comparisons. -* gtu: Comparisons. -* hard registers: Regs and Memory. -* hardware models and configurations, specifying: Submodel Options. -* header files and VMS: Include Files and VMS. -* high: Constants. -* i386 Options: i386 Options. -* identifier names, dollar signs in: Dollar Signs. -* identifiers, names in assembler code: Asm Labels. -* identifying source, compiler (88k): M88K Options. -* if_then_else: Comparisons. -* immediate_operand: RTL Template. -* in_data: Sections. -* in_struct: Flags. -* in_text: Sections. -* include files and VMS: Include Files and VMS. -* inclusive-or, bitwise: Arithmetic. -* incompatibilities of GNU CC: Incompatibilities. -* increment operators: Bug Criteria. -* initialization routines: Constructor Output. -* initializations in expressions: Constructors. -* initializers with labeled elements: Labeled Elements. -* initializers, non-constant: Initializers. -* inline functions: Inline. -* inline functions, omission of: Inline. -* inline, automatic: Passes. -* insn: Insns. -* insn attributes: Insn Attributes. -* insn canonicalization: Insn Canonicalizations. -* insn lengths, computing: Insn Lengths. -* insn splitting: Insn Splitting. -* insn-attr.h: Defining Attributes. -* insn_list: Insns. -* insns: Insns. -* insns, generating: RTL Template. -* insns, recognizing: RTL Template. -* installation trouble: Trouble. -* installing GNU CC: Installation. -* installing GNU CC on Unos: Unos Install. -* installing GNU CC on VMS: VMS Install. -* installing GNU CC on the 3b1: 3b1 Install. -* installing GNU CC on the Sun: Sun Install. -* instruction attributes: Insn Attributes. -* instruction combination: Passes. -* instruction patterns: Patterns. -* instruction recognizer: Passes. -* instruction scheduling: Passes. -* instruction scheduling: Passes. -* instruction splitting: Insn Splitting. -* integrated: Flags. -* integrating function code: Inline. -* interfacing to GNU CC output: Interface. -* introduction: Top. -* invalid assembly code: Bug Criteria. -* invalid input: Bug Criteria. -* ior: Arithmetic. -* isinf: Cross-compilation. -* isnan: Cross-compilation. -* jump instruction patterns: Jump Patterns. -* jump instructions and set: Side Effects. -* jump optimization: Passes. -* jump threading: Passes. -* jump_insn: Insns. -* keywords, alternate: Alternate Keywords. -* known causes of trouble: Trouble. -* label_ref: Constants. -* labeled elements in initializers: Labeled Elements. -* labels as values: Labels as Values. -* language dialect options: Dialect Options. -* large bit shifts (88k): M88K Options. -* large return values: Aggregate Return. -* ldexp: Cross-compilation. -* le: Comparisons. -* leaf functions: Leaf Functions. -* leaf_function: Leaf Functions. -* leaf_function_p: Standard Names. -* left rotate: Arithmetic. -* left shift: Arithmetic. -* left shift: Arithmetic. -* length-zero arrays: Zero Length. -* less than: Comparisons. -* less than or equal: Comparisons. -* leu: Comparisons. -* library subroutine names: Library Calls. -* link options: Link Options. -* lo_sum: Arithmetic. -* load address instruction: Simple Constraints. -* local labels: Local Labels. -* local register allocation: Passes. -* local variables in macros: Naming Types. -* local variables, specifying registers: Local Reg Vars. -* logical shift: Arithmetic. -* logical-and, bitwise: Arithmetic. -* longjmp: Global Reg Vars. -* loop optimization: Passes. -* lshift: Arithmetic. -* lshiftrt: Arithmetic. -* lt: Comparisons. -* ltu: Comparisons. -* lvalues, generalized: Lvalues. -* machine dependent options: Submodel Options. -* machine description macros: Target Macros. -* machine descriptions: Machine Desc. -* machine mode conversions: Conversions. -* machine modes: Machine Modes. -* macro with variable arguments: Macro Varargs. -* macros containing asm: Extended Asm. -* macros, inline alternative: Inline. -* macros, local labels: Local Labels. -* macros, local variables in: Naming Types. -* macros, statements in expressions: Statement Exprs. -* macros, target description: Target Macros. -* macros, types of arguments: Typeof. -* make: Preprocessor Options. -* make_safe_from: Expander Definitions. -* match_dup: RTL Template. -* match_operand: RTL Template. -* match_operator: RTL Template. -* match_parallel: RTL Template. -* match_scratch: RTL Template. -* matching constraint: Simple Constraints. -* matching operands: Output Template. -* math libraries: Interface. -* math, in RTL: Arithmetic. -* mcount: Profiling. -* mem: Regs and Memory. -* memory reference, nonoffsettable: Simple Constraints. -* memory references in constraints: Simple Constraints. -* messages, warning: Warning Options. -* middle-operands, omitted: Conditionals. -* minus: Arithmetic. -* mod: Arithmetic. -* mode classes: Machine Modes. -* modifiers in constraints: Modifiers. -* mult: Arithmetic. -* multiple alternative constraints: Multi-Alternative. -* multiplication: Arithmetic. -* multiprecision arithmetic: Long Long. -* name augmentation: VMS Misc. -* named patterns and conditions: Patterns. -* names used in assembler code: Asm Labels. -* names, pattern: Standard Names. -* naming types: Naming Types. -* ne: Comparisons. -* neg: Arithmetic. -* nested functions: Nested Functions. -* nested functions, trampolines for: Trampolines. -* next_cc0_user: Jump Patterns. -* nil: RTL Objects. -* no constraints: No Constraints. -* no-op move instructions: Passes. -* non-constant initializers: Initializers. -* non-static inline function: Inline. -* nongcc_SI_type: Library Calls. -* nonoffsettable memory reference: Simple Constraints. -* not: Arithmetic. -* not equal: Comparisons. -* not using constraints: No Constraints. -* note: Insns. -* obstack_free: 3b1 Install. -* offsettable address: Simple Constraints. -* old-style function definitions: Function Prototypes. -* omitted middle-operands: Conditionals. -* open coding: Inline. -* operand access: Accessors. -* operand constraints: Constraints. -* operand substitution: Output Template. -* operands: Patterns. -* optimize options: Optimize Options. -* optional hardware or system features: Run-time Target. -* options to control warnings: Warning Options. -* options, GNU CC command: Invoking GCC. -* options, code generation: Code Gen Options. -* options, debugging: Debugging Options. -* options, dialect: Dialect Options. -* options, directory search: Directory Options. -* options, grouping: Invoking GCC. -* options, linking: Link Options. -* options, optimization: Optimize Options. -* options, order: Invoking GCC. -* options, preprocessor: Preprocessor Options. -* order of options: Invoking GCC. -* order of register allocation: Allocation Order. -* other directory, compilation in: Other Dir. -* output file option: Overall Options. -* output of assembler code: File Framework. -* output statements: Output Statement. -* output templates: Output Template. -* output_addr_const: Data Output. -* output_asm_insn: Output Statement. -* overflow while constant folding: Cross-compilation. -* parallel: Side Effects. -* parameter forward declaration: Variable Length. -* parameters, miscellaneous: Misc. -* parser generator, Bison: Installation. -* parsing pass: Passes. -* passes and files of the compiler: Passes. -* passing arguments: Interface. -* pattern conditions: Patterns. -* pattern names: Standard Names. -* patterns: Patterns. -* pc: Regs and Memory. -* pc_rtx: Regs and Memory. -* peephole optimization: Passes. -* peephole optimization, RTL representation: Side Effects. -* peephole optimizer definitions: Peephole Definitions. -* percent sign: Output Template. -* perform_...: Library Calls. -* plus: Arithmetic. -* pointer arguments: Function Attributes. -* portability: Portability. -* position independent code: PIC. -* post_dec: Incdec. -* post_inc: Incdec. -* pragma: Misc. -* pragma, reason for not using: Function Attributes. -* pre_dec: Incdec. -* pre_inc: Incdec. -* predefined macros: Run-time Target. -* preprocessor options: Preprocessor Options. -* prev_cc0_setter: Jump Patterns. -* prev_nonnote_insn: Peephole Definitions. -* product: Arithmetic. -* profiling, code generation: Profiling. -* program counter: Regs and Memory. -* prologue: Function Entry. -* promotion of formal parameters: Function Prototypes. -* pseudo registers: Regs and Memory. -* push address instruction: Simple Constraints. -* putenv: Config. -* question mark: Multi-Alternative. -* quotient: Arithmetic. -* r0-relative references (88k): M88K Options. -* ranges in case statements: Case Ranges. -* read-only strings: Incompatibilities. -* recog_operand: Instruction Output. -* recognizing insns: RTL Template. -* reg: Regs and Memory. -* reg_names: Instruction Output. -* register allocation: Passes. -* register allocation order: Allocation Order. -* register allocation, stupid: Passes. -* register class definitions: Register Classes. -* register class preference constraints: Class Preferences. -* register class preference pass: Passes. -* register pairs: Values in Registers. -* register positions in frame (88k): M88K Options. -* register positions in frame (88k): M88K Options. -* register usage: Registers. -* register use analysis: Passes. -* register variable after longjmp: Global Reg Vars. -* register-to-stack conversion: Passes. -* register_operand: RTL Template. -* registers: Extended Asm. -* registers arguments: Register Arguments. -* registers for local variables: Local Reg Vars. -* registers in constraints: Simple Constraints. -* registers, global allocation: Explicit Reg Vars. -* registers, global variables in: Global Reg Vars. -* regs_ever_live: Function Entry. -* relative costs: Costs. -* reload pass: Regs and Memory. -* reload_completed: Standard Names. -* reload_in_progress: Standard Names. -* reloading: Passes. -* remainder: Arithmetic. -* reporting bugs: Bugs. -* representation of RTL: RTL. -* rest argument (in macro): Macro Varargs. -* rest_of_compilation: Passes. -* rest_of_decl_compilation: Passes. -* return: Side Effects. -* return value of main: VMS Misc. -* return values in registers: Scalar Return. -* returning aggregate values: Aggregate Return. -* returning structures and unions: Interface. -* right rotate: Arithmetic. -* right shift: Arithmetic. -* rotate: Arithmetic. -* rotate: Arithmetic. -* rotatert: Arithmetic. -* run-time conventions: Interface. -* run-time options: Code Gen Options. -* run-time target specification: Run-time Target. -* saveable_obstack: Addressing Modes. -* scalars, returned as values: Scalar Return. -* scheduling, delayed branch: Passes. -* scheduling, instruction: Passes. -* scheduling, instruction: Passes. -* scope of a variable length array: Variable Length. -* scope of declaration: Disappointments. -* scope of external declarations: Incompatibilities. -* scratch: Regs and Memory. -* scratch operands: Regs and Memory. -* search path: Directory Options. -* separate directory, compilation in: Other Dir. -* sequence: Side Effects. -* set: Side Effects. -* set_attr: Tagging Insns. -* set_attr_alternative: Tagging Insns. -* setjmp: Global Reg Vars. -* shared VMS run time system: VMS Misc. -* shared strings: Incompatibilities. -* sharing of RTL components: Sharing. -* shift: Arithmetic. -* side effect in ?:: Conditionals. -* side effects, macro argument: Statement Exprs. -* sign_extend: Conversions. -* sign_extract: Bit Fields. -* signed division: Arithmetic. -* signed maximum: Arithmetic. -* signed minimum: Arithmetic. -* simple constraints: Simple Constraints. -* simplifications, arithmetic: Passes. -* sizeof: Typeof. -* smaller data references (88k): M88K Options. -* smaller data references (MIPS): MIPS Options. -* smax: Arithmetic. -* smin: Arithmetic. -* specified registers: Explicit Reg Vars. -* specifying compiler version and target machine: Target Options. -* specifying hardware config: Submodel Options. -* specifying machine version: Target Options. -* specifying registers for local variables: Local Reg Vars. -* speed of instructions: Costs. -* splitting instructions: Insn Splitting. -* sqrt: Arithmetic. -* square root: Arithmetic. -* stack arguments: Stack Arguments. -* stack frame layout: Frame Layout. -* stack_pointer_rtx: Frame Registers. -* stage1: Installation. -* standard pattern names: Standard Names. -* statements inside expressions: Statement Exprs. -* storage layout: Storage Layout. -* strcpy: Storage Layout. -* strength-reduction: Passes. -* strict_low_part: RTL Declarations. -* string constants: Incompatibilities. -* structure passing (88k): M88K Options. -* structure value address: Aggregate Return. -* structures: Incompatibilities. -* structures, constructor expression: Constructors. -* structures, returning: Interface. -* stupid register allocation: Passes. -* submodel options: Submodel Options. -* subreg: Regs and Memory. -* subscripting: Subscripting. -* subscripting and function values: Subscripting. -* suppressing warnings: Warning Options. -* symbol_ref: Constants. -* symbolic label: Sharing. -* syntax checking: Warning Options. -* sys_siglist: Config. -* tagging insns: Tagging Insns. -* tail recursion optimization: Passes. -* target description macros: Target Macros. -* target machine, specifying: Target Options. -* target options: Target Options. -* target specifications: Run-time Target. -* target-parameter-dependent code: Passes. -* termination routines: Constructor Output. -* text_section: Sections. -* thunks: Nested Functions. -* top level of compiler: Passes. -* traditional C language: Dialect Options. -* trampolines for nested functions: Trampolines. -* truncate: Conversions. -* type alignment: Alignment. -* typedef names as function parameters: Incompatibilities. -* typeof: Typeof. -* udiv: Arithmetic. -* umax: Arithmetic. -* umin: Arithmetic. -* umod: Arithmetic. -* unchanging: Flags. -* undefined behavior: Bug Criteria. -* undefined function value: Bug Criteria. -* underscores in variables in macros: Naming Types. -* underscores, avoiding (88k): M88K Options. -* union, casting to a: Cast to Union. -* unions: Incompatibilities. -* unions, returning: Interface. -* unreachable code: Passes. -* unshare_all_rtl: Sharing. -* unsigned division: Arithmetic. -* unsigned greater than: Comparisons. -* unsigned greater than: Comparisons. -* unsigned less than: Comparisons. -* unsigned less than: Comparisons. -* unsigned minimum and maximum: Arithmetic. -* unsigned_fix: Conversions. -* unsigned_float: Conversions. -* unspec: Side Effects. -* unspec_volatile: Side Effects. -* use: Side Effects. -* used: Flags. -* value after longjmp: Global Reg Vars. -* values, returned by functions: Scalar Return. -* varargs implementation: Varargs. -* variable alignment: Alignment. -* variable attributes: Variable Attributes. -* variable number of arguments: Macro Varargs. -* variable-length array scope: Variable Length. -* variable-length arrays: Variable Length. -* variables in specified registers: Explicit Reg Vars. -* variables, local, in macros: Naming Types. -* void pointers, arithmetic: Pointer Arith. -* void, size of pointer to: Pointer Arith. -* volatil: Flags. -* volatile memory references: Flags. -* voting between constraint alternatives: Class Preferences. -* vprintf: Config. -* warning messages: Warning Options. -* which_alternative: Output Statement. -* whitespace: Incompatibilities. -* word_mode: Machine Modes. -* xor: Arithmetic. -* zero division on 88k: M88K Options. -* zero-length arrays: Zero Length. -* zero_extend: Conversions. -* zero_extract: Bit Fields. +* Defining Attributes:: Specifying attributes and their values. +* Expressions:: Valid expressions for attribute values. +* Tagging Insns:: Assigning attribute values to insns. +* Attr Example:: An example of assigning attributes. +* Insn Lengths:: Computing the length of insns. +* Constant Attributes:: Defining attributes that are constant. +* Delay Slots:: Defining delay slots required for a machine. +* Function Units:: Specifying information for insn scheduling. + + +File: gcc.info, Node: Defining Attributes, Next: Expressions, Up: Insn Attributes + +Defining Attributes and their Values +------------------------------------ + + The `define_attr' expression is used to define each attribute +required by the target machine. It looks like: + + (define_attr NAME LIST-OF-VALUES DEFAULT) + + NAME is a string specifying the name of the attribute being defined. + + LIST-OF-VALUES is either a string that specifies a comma-separated +list of values that can be assigned to the attribute, or a null string +to indicate that the attribute takes numeric values. + + DEFAULT is an attribute expression that gives the value of this +attribute for insns that match patterns whose definition does not +include an explicit value for this attribute. *Note Attr Example::, +for more information on the handling of defaults. *Note Constant +Attributes::, for information on attributes that do not depend on any +particular insn. + + For each defined attribute, a number of definitions are written to +the `insn-attr.h' file. For cases where an explicit set of values is +specified for an attribute, the following are defined: + + * A `#define' is written for the symbol `HAVE_ATTR_NAME'. + + * An enumeral class is defined for `attr_NAME' with elements of the + form `UPPER-NAME_UPPER-VALUE' where the attribute name and value + are first converted to upper case. + + * A function `get_attr_NAME' is defined that is passed an insn and + returns the attribute value for that insn. + + For example, if the following is present in the `md' file: + + (define_attr "type" "branch,fp,load,store,arith" ...) + +the following lines will be written to the file `insn-attr.h'. + + #define HAVE_ATTR_type + enum attr_type {TYPE_BRANCH, TYPE_FP, TYPE_LOAD, + TYPE_STORE, TYPE_ARITH}; + extern enum attr_type get_attr_type (); + + If the attribute takes numeric values, no `enum' type will be +defined and the function to obtain the attribute's value will return +`int'. + + +File: gcc.info, Node: Expressions, Next: Tagging Insns, Prev: Defining Attributes, Up: Insn Attributes + +Attribute Expressions +--------------------- + + RTL expressions used to define attributes use the codes described +above plus a few specific to attribute definitions, to be discussed +below. Attribute value expressions must have one of the following +forms: + +`(const_int I)' + The integer I specifies the value of a numeric attribute. I must + be non-negative. + + The value of a numeric attribute can be specified either with a + `const_int' or as an integer represented as a string in + `const_string', `eq_attr' (see below), and `set_attr' (*note + Tagging Insns::.) expressions. + +`(const_string VALUE)' + The string VALUE specifies a constant attribute value. If VALUE + is specified as `"*"', it means that the default value of the + attribute is to be used for the insn containing this expression. + `"*"' obviously cannot be used in the DEFAULT expression of a + `define_attr'. + + If the attribute whose value is being specified is numeric, VALUE + must be a string containing a non-negative integer (normally + `const_int' would be used in this case). Otherwise, it must + contain one of the valid values for the attribute. + +`(if_then_else TEST TRUE-VALUE FALSE-VALUE)' + TEST specifies an attribute test, whose format is defined below. + The value of this expression is TRUE-VALUE if TEST is true, + otherwise it is FALSE-VALUE. + +`(cond [TEST1 VALUE1 ...] DEFAULT)' + The first operand of this expression is a vector containing an even + number of expressions and consisting of pairs of TEST and VALUE + expressions. The value of the `cond' expression is that of the + VALUE corresponding to the first true TEST expression. If none of + the TEST expressions are true, the value of the `cond' expression + is that of the DEFAULT expression. + + TEST expressions can have one of the following forms: + +`(const_int I)' + This test is true if I is non-zero and false otherwise. + +`(not TEST)' +`(ior TEST1 TEST2)' +`(and TEST1 TEST2)' + These tests are true if the indicated logical function is true. + +`(match_operand:M N PRED CONSTRAINTS)' + This test is true if operand N of the insn whose attribute value + is being determined has mode M (this part of the test is ignored + if M is `VOIDmode') and the function specified by the string PRED + returns a non-zero value when passed operand N and mode M (this + part of the test is ignored if PRED is the null string). + + The CONSTRAINTS operand is ignored and should be the null string. + +`(le ARITH1 ARITH2)' +`(leu ARITH1 ARITH2)' +`(lt ARITH1 ARITH2)' +`(ltu ARITH1 ARITH2)' +`(gt ARITH1 ARITH2)' +`(gtu ARITH1 ARITH2)' +`(ge ARITH1 ARITH2)' +`(geu ARITH1 ARITH2)' +`(ne ARITH1 ARITH2)' +`(eq ARITH1 ARITH2)' + These tests are true if the indicated comparison of the two + arithmetic expressions is true. Arithmetic expressions are formed + with `plus', `minus', `mult', `div', `mod', `abs', `neg', `and', + `ior', `xor', `not', `ashift', `lshiftrt', and `ashiftrt' + expressions. + + `const_int' and `symbol_ref' are always valid terms (*note Insn + Lengths::.,for additional forms). `symbol_ref' is a string + denoting a C expression that yields an `int' when evaluated by the + `get_attr_...' routine. It should normally be a global variable. + +`(eq_attr NAME VALUE)' + NAME is a string specifying the name of an attribute. + + VALUE is a string that is either a valid value for attribute NAME, + a comma-separated list of values, or `!' followed by a value or + list. If VALUE does not begin with a `!', this test is true if + the value of the NAME attribute of the current insn is in the list + specified by VALUE. If VALUE begins with a `!', this test is true + if the attribute's value is *not* in the specified list. + + For example, + + (eq_attr "type" "load,store") + + is equivalent to + + (ior (eq_attr "type" "load") (eq_attr "type" "store")) + + If NAME specifies an attribute of `alternative', it refers to the + value of the compiler variable `which_alternative' (*note Output + Statement::.) and the values must be small integers. For example, + + (eq_attr "alternative" "2,3") + + is equivalent to + + (ior (eq (symbol_ref "which_alternative") (const_int 2)) + (eq (symbol_ref "which_alternative") (const_int 3))) + + Note that, for most attributes, an `eq_attr' test is simplified in + cases where the value of the attribute being tested is known for + all insns matching a particular pattern. This is by far the most + common case. + +`(attr_flag NAME)' + The value of an `attr_flag' expression is true if the flag + specified by NAME is true for the `insn' currently being scheduled. + + NAME is a string specifying one of a fixed set of flags to test. + Test the flags `forward' and `backward' to determine the direction + of a conditional branch. Test the flags `very_likely', `likely', + `very_unlikely', and `unlikely' to determine if a conditional + branch is expected to be taken. + + If the `very_likely' flag is true, then the `likely' flag is also + true. Likewise for the `very_unlikely' and `unlikely' flags. + + This example describes a conditional branch delay slot which can + be nullified for forward branches that are taken (annul-true) or + for backward branches which are not taken (annul-false). + + (define_delay (eq_attr "type" "cbranch") + [(eq_attr "in_branch_delay" "true") + (and (eq_attr "in_branch_delay" "true") + (attr_flag "forward")) + (and (eq_attr "in_branch_delay" "true") + (attr_flag "backward"))]) + + The `forward' and `backward' flags are false if the current `insn' + being scheduled is not a conditional branch. + + The `very_likely' and `likely' flags are true if the `insn' being + scheduled is not a conditional branch. The The `very_unlikely' + and `unlikely' flags are false if the `insn' being scheduled is + not a conditional branch. + + `attr_flag' is only used during delay slot scheduling and has no + meaning to other passes of the compiler. + + +File: gcc.info, Node: Tagging Insns, Next: Attr Example, Prev: Expressions, Up: Insn Attributes + +Assigning Attribute Values to Insns +----------------------------------- + + The value assigned to an attribute of an insn is primarily +determined by which pattern is matched by that insn (or which +`define_peephole' generated it). Every `define_insn' and +`define_peephole' can have an optional last argument to specify the +values of attributes for matching insns. The value of any attribute +not specified in a particular insn is set to the default value for that +attribute, as specified in its `define_attr'. Extensive use of default +values for attributes permits the specification of the values for only +one or two attributes in the definition of most insn patterns, as seen +in the example in the next section. + + The optional last argument of `define_insn' and `define_peephole' is +a vector of expressions, each of which defines the value for a single +attribute. The most general way of assigning an attribute's value is +to use a `set' expression whose first operand is an `attr' expression +giving the name of the attribute being set. The second operand of the +`set' is an attribute expression (*note Expressions::.) giving the +value of the attribute. + + When the attribute value depends on the `alternative' attribute +(i.e., which is the applicable alternative in the constraint of the +insn), the `set_attr_alternative' expression can be used. It allows +the specification of a vector of attribute expressions, one for each +alternative. + + When the generality of arbitrary attribute expressions is not +required, the simpler `set_attr' expression can be used, which allows +specifying a string giving either a single attribute value or a list of +attribute values, one for each alternative. + + The form of each of the above specifications is shown below. In +each case, NAME is a string specifying the attribute to be set. + +`(set_attr NAME VALUE-STRING)' + VALUE-STRING is either a string giving the desired attribute value, + or a string containing a comma-separated list giving the values for + succeeding alternatives. The number of elements must match the + number of alternatives in the constraint of the insn pattern. + + Note that it may be useful to specify `*' for some alternative, in + which case the attribute will assume its default value for insns + matching that alternative. + +`(set_attr_alternative NAME [VALUE1 VALUE2 ...])' + Depending on the alternative of the insn, the value will be one of + the specified values. This is a shorthand for using a `cond' with + tests on the `alternative' attribute. + +`(set (attr NAME) VALUE)' + The first operand of this `set' must be the special RTL expression + `attr', whose sole operand is a string giving the name of the + attribute being set. VALUE is the value of the attribute. + + The following shows three different ways of representing the same +attribute value specification: + + (set_attr "type" "load,store,arith") + + (set_attr_alternative "type" + [(const_string "load") (const_string "store") + (const_string "arith")]) + + (set (attr "type") + (cond [(eq_attr "alternative" "1") (const_string "load") + (eq_attr "alternative" "2") (const_string "store")] + (const_string "arith"))) + + The `define_asm_attributes' expression provides a mechanism to +specify the attributes assigned to insns produced from an `asm' +statement. It has the form: + + (define_asm_attributes [ATTR-SETS]) + +where ATTR-SETS is specified the same as for both the `define_insn' and +the `define_peephole' expressions. + + These values will typically be the "worst case" attribute values. +For example, they might indicate that the condition code will be +clobbered. + + A specification for a `length' attribute is handled specially. The +way to compute the length of an `asm' insn is to multiply the length +specified in the expression `define_asm_attributes' by the number of +machine instructions specified in the `asm' statement, determined by +counting the number of semicolons and newlines in the string. +Therefore, the value of the `length' attribute specified in a +`define_asm_attributes' should be the maximum possible length of a +single machine instruction. + + +File: gcc.info, Node: Attr Example, Next: Insn Lengths, Prev: Tagging Insns, Up: Insn Attributes + +Example of Attribute Specifications +----------------------------------- + + The judicious use of defaulting is important in the efficient use of +insn attributes. Typically, insns are divided into "types" and an +attribute, customarily called `type', is used to represent this value. +This attribute is normally used only to define the default value for +other attributes. An example will clarify this usage. + + Assume we have a RISC machine with a condition code and in which only +full-word operations are performed in registers. Let us assume that we +can divide all insns into loads, stores, (integer) arithmetic +operations, floating point operations, and branches. + + Here we will concern ourselves with determining the effect of an +insn on the condition code and will limit ourselves to the following +possible effects: The condition code can be set unpredictably +(clobbered), not be changed, be set to agree with the results of the +operation, or only changed if the item previously set into the +condition code has been modified. + + Here is part of a sample `md' file for such a machine: + + (define_attr "type" "load,store,arith,fp,branch" (const_string "arith")) + + (define_attr "cc" "clobber,unchanged,set,change0" + (cond [(eq_attr "type" "load") + (const_string "change0") + (eq_attr "type" "store,branch") + (const_string "unchanged") + (eq_attr "type" "arith") + (if_then_else (match_operand:SI 0 "" "") + (const_string "set") + (const_string "clobber"))] + (const_string "clobber"))) + + (define_insn "" + [(set (match_operand:SI 0 "general_operand" "=r,r,m") + (match_operand:SI 1 "general_operand" "r,m,r"))] + "" + "@ + move %0,%1 + load %0,%1 + store %0,%1" + [(set_attr "type" "arith,load,store")]) + + Note that we assume in the above example that arithmetic operations +performed on quantities smaller than a machine word clobber the +condition code since they will set the condition code to a value +corresponding to the full-word result. + + +File: gcc.info, Node: Insn Lengths, Next: Constant Attributes, Prev: Attr Example, Up: Insn Attributes + +Computing the Length of an Insn +------------------------------- + + For many machines, multiple types of branch instructions are +provided, each for different length branch displacements. In most +cases, the assembler will choose the correct instruction to use. +However, when the assembler cannot do so, GCC can when a special +attribute, the `length' attribute, is defined. This attribute must be +defined to have numeric values by specifying a null string in its +`define_attr'. + + In the case of the `length' attribute, two additional forms of +arithmetic terms are allowed in test expressions: + +`(match_dup N)' + This refers to the address of operand N of the current insn, which + must be a `label_ref'. + +`(pc)' + This refers to the address of the *current* insn. It might have + been more consistent with other usage to make this the address of + the *next* insn but this would be confusing because the length of + the current insn is to be computed. + + For normal insns, the length will be determined by value of the +`length' attribute. In the case of `addr_vec' and `addr_diff_vec' insn +patterns, the length is computed as the number of vectors multiplied by +the size of each vector. + + Lengths are measured in addressable storage units (bytes). + + The following macros can be used to refine the length computation: + +`FIRST_INSN_ADDRESS' + When the `length' insn attribute is used, this macro specifies the + value to be assigned to the address of the first insn in a + function. If not specified, 0 is used. + +`ADJUST_INSN_LENGTH (INSN, LENGTH)' + If defined, modifies the length assigned to instruction INSN as a + function of the context in which it is used. LENGTH is an lvalue + that contains the initially computed length of the insn and should + be updated with the correct length of the insn. If updating is + required, INSN must not be a varying-length insn. + + This macro will normally not be required. A case in which it is + required is the ROMP. On this machine, the size of an `addr_vec' + insn must be increased by two to compensate for the fact that + alignment may be required. + + The routine that returns `get_attr_length' (the value of the +`length' attribute) can be used by the output routine to determine the +form of the branch instruction to be written, as the example below +illustrates. + + As an example of the specification of variable-length branches, +consider the IBM 360. If we adopt the convention that a register will +be set to the starting address of a function, we can jump to labels +within 4k of the start using a four-byte instruction. Otherwise, we +need a six-byte sequence to load the address from memory and then +branch to it. + + On such a machine, a pattern for a branch instruction might be +specified as follows: + + (define_insn "jump" + [(set (pc) + (label_ref (match_operand 0 "" "")))] + "" + "* + { + return (get_attr_length (insn) == 4 + ? \"b %l0\" : \"l r15,=a(%l0); br r15\"); + }" + [(set (attr "length") (if_then_else (lt (match_dup 0) (const_int 4096)) + (const_int 4) + (const_int 6)))]) + + +File: gcc.info, Node: Constant Attributes, Next: Delay Slots, Prev: Insn Lengths, Up: Insn Attributes + +Constant Attributes +------------------- + + A special form of `define_attr', where the expression for the +default value is a `const' expression, indicates an attribute that is +constant for a given run of the compiler. Constant attributes may be +used to specify which variety of processor is used. For example, + + (define_attr "cpu" "m88100,m88110,m88000" + (const + (cond [(symbol_ref "TARGET_88100") (const_string "m88100") + (symbol_ref "TARGET_88110") (const_string "m88110")] + (const_string "m88000")))) + + (define_attr "memory" "fast,slow" + (const + (if_then_else (symbol_ref "TARGET_FAST_MEM") + (const_string "fast") + (const_string "slow")))) + + The routine generated for constant attributes has no parameters as it +does not depend on any particular insn. RTL expressions used to define +the value of a constant attribute may use the `symbol_ref' form, but +may not use either the `match_operand' form or `eq_attr' forms +involving insn attributes. + + +File: gcc.info, Node: Delay Slots, Next: Function Units, Prev: Constant Attributes, Up: Insn Attributes + +Delay Slot Scheduling +--------------------- + + The insn attribute mechanism can be used to specify the requirements +for delay slots, if any, on a target machine. An instruction is said to +require a "delay slot" if some instructions that are physically after +the instruction are executed as if they were located before it. +Classic examples are branch and call instructions, which often execute +the following instruction before the branch or call is performed. + + On some machines, conditional branch instructions can optionally +"annul" instructions in the delay slot. This means that the +instruction will not be executed for certain branch outcomes. Both +instructions that annul if the branch is true and instructions that +annul if the branch is false are supported. + + Delay slot scheduling differs from instruction scheduling in that +determining whether an instruction needs a delay slot is dependent only +on the type of instruction being generated, not on data flow between the +instructions. See the next section for a discussion of data-dependent +instruction scheduling. + + The requirement of an insn needing one or more delay slots is +indicated via the `define_delay' expression. It has the following form: + + (define_delay TEST + [DELAY-1 ANNUL-TRUE-1 ANNUL-FALSE-1 + DELAY-2 ANNUL-TRUE-2 ANNUL-FALSE-2 + ...]) + + TEST is an attribute test that indicates whether this `define_delay' +applies to a particular insn. If so, the number of required delay +slots is determined by the length of the vector specified as the second +argument. An insn placed in delay slot N must satisfy attribute test +DELAY-N. ANNUL-TRUE-N is an attribute test that specifies which insns +may be annulled if the branch is true. Similarly, ANNUL-FALSE-N +specifies which insns in the delay slot may be annulled if the branch +is false. If annulling is not supported for that delay slot, `(nil)' +should be coded. + + For example, in the common case where branch and call insns require +a single delay slot, which may contain any insn other than a branch or +call, the following would be placed in the `md' file: + + (define_delay (eq_attr "type" "branch,call") + [(eq_attr "type" "!branch,call") (nil) (nil)]) + + Multiple `define_delay' expressions may be specified. In this case, +each such expression specifies different delay slot requirements and +there must be no insn for which tests in two `define_delay' expressions +are both true. + + For example, if we have a machine that requires one delay slot for +branches but two for calls, no delay slot can contain a branch or call +insn, and any valid insn in the delay slot for the branch can be +annulled if the branch is true, we might represent this as follows: + + (define_delay (eq_attr "type" "branch") + [(eq_attr "type" "!branch,call") + (eq_attr "type" "!branch,call") + (nil)]) + + (define_delay (eq_attr "type" "call") + [(eq_attr "type" "!branch,call") (nil) (nil) + (eq_attr "type" "!branch,call") (nil) (nil)]) + + +File: gcc.info, Node: Function Units, Prev: Delay Slots, Up: Insn Attributes + +Specifying Function Units +------------------------- + + On most RISC machines, there are instructions whose results are not +available for a specific number of cycles. Common cases are +instructions that load data from memory. On many machines, a pipeline +stall will result if the data is referenced too soon after the load +instruction. + + In addition, many newer microprocessors have multiple function +units, usually one for integer and one for floating point, and often +will incur pipeline stalls when a result that is needed is not yet +ready. + + The descriptions in this section allow the specification of how much +time must elapse between the execution of an instruction and the time +when its result is used. It also allows specification of when the +execution of an instruction will delay execution of similar instructions +due to function unit conflicts. + + For the purposes of the specifications in this section, a machine is +divided into "function units", each of which execute a specific class +of instructions in first-in-first-out order. Function units that +accept one instruction each cycle and allow a result to be used in the +succeeding instruction (usually via forwarding) need not be specified. +Classic RISC microprocessors will normally have a single function unit, +which we can call `memory'. The newer "superscalar" processors will +often have function units for floating point operations, usually at +least a floating point adder and multiplier. + + Each usage of a function units by a class of insns is specified with +a `define_function_unit' expression, which looks like this: + + (define_function_unit NAME MULTIPLICITY SIMULTANEITY + TEST READY-DELAY ISSUE-DELAY + [CONFLICT-LIST]) + + NAME is a string giving the name of the function unit. + + MULTIPLICITY is an integer specifying the number of identical units +in the processor. If more than one unit is specified, they will be +scheduled independently. Only truly independent units should be +counted; a pipelined unit should be specified as a single unit. (The +only common example of a machine that has multiple function units for a +single instruction class that are truly independent and not pipelined +are the two multiply and two increment units of the CDC 6600.) + + SIMULTANEITY specifies the maximum number of insns that can be +executing in each instance of the function unit simultaneously or zero +if the unit is pipelined and has no limit. + + All `define_function_unit' definitions referring to function unit +NAME must have the same name and values for MULTIPLICITY and +SIMULTANEITY. + + TEST is an attribute test that selects the insns we are describing +in this definition. Note that an insn may use more than one function +unit and a function unit may be specified in more than one +`define_function_unit'. + + READY-DELAY is an integer that specifies the number of cycles after +which the result of the instruction can be used without introducing any +stalls. + + ISSUE-DELAY is an integer that specifies the number of cycles after +the instruction matching the TEST expression begins using this unit +until a subsequent instruction can begin. A cost of N indicates an N-1 +cycle delay. A subsequent instruction may also be delayed if an +earlier instruction has a longer READY-DELAY value. This blocking +effect is computed using the SIMULTANEITY, READY-DELAY, ISSUE-DELAY, +and CONFLICT-LIST terms. For a normal non-pipelined function unit, +SIMULTANEITY is one, the unit is taken to block for the READY-DELAY +cycles of the executing insn, and smaller values of ISSUE-DELAY are +ignored. + + CONFLICT-LIST is an optional list giving detailed conflict costs for +this unit. If specified, it is a list of condition test expressions to +be applied to insns chosen to execute in NAME following the particular +insn matching TEST that is already executing in NAME. For each insn in +the list, ISSUE-DELAY specifies the conflict cost; for insns not in the +list, the cost is zero. If not specified, CONFLICT-LIST defaults to +all instructions that use the function unit. + + Typical uses of this vector are where a floating point function unit +can pipeline either single- or double-precision operations, but not +both, or where a memory unit can pipeline loads, but not stores, etc. + + As an example, consider a classic RISC machine where the result of a +load instruction is not available for two cycles (a single "delay" +instruction is required) and where only one load instruction can be +executed simultaneously. This would be specified as: + + (define_function_unit "memory" 1 1 (eq_attr "type" "load") 2 0) + + For the case of a floating point function unit that can pipeline +either single or double precision, but not both, the following could be +specified: + + (define_function_unit + "fp" 1 0 (eq_attr "type" "sp_fp") 4 4 [(eq_attr "type" "dp_fp")]) + (define_function_unit + "fp" 1 0 (eq_attr "type" "dp_fp") 4 4 [(eq_attr "type" "sp_fp")]) + + *Note:* The scheduler attempts to avoid function unit conflicts and +uses all the specifications in the `define_function_unit' expression. +It has recently come to our attention that these specifications may not +allow modeling of some of the newer "superscalar" processors that have +insns using multiple pipelined units. These insns will cause a +potential conflict for the second unit used during their execution and +there is no way of representing that conflict. We welcome any examples +of how function unit conflicts work in such processors and suggestions +for their representation. + + +File: gcc.info, Node: Target Macros, Next: Config, Prev: Machine Desc, Up: Top + +Target Description Macros +************************* + + In addition to the file `MACHINE.md', a machine description includes +a C header file conventionally given the name `MACHINE.h'. This header +file defines numerous macros that convey the information about the +target machine that does not fit into the scheme of the `.md' file. +The file `tm.h' should be a link to `MACHINE.h'. The header file +`config.h' includes `tm.h' and most compiler source files include +`config.h'. + +* Menu: +* Driver:: Controlling how the driver runs the compilation passes. +* Run-time Target:: Defining `-m' options like `-m68000' and `-m68020'. +* Storage Layout:: Defining sizes and alignments of data. +* Type Layout:: Defining sizes and properties of basic user data types. +* Registers:: Naming and describing the hardware registers. +* Register Classes:: Defining the classes of hardware registers. +* Stack and Calling:: Defining which way the stack grows and by how much. +* Varargs:: Defining the varargs macros. +* Trampolines:: Code set up at run time to enter a nested function. +* Library Calls:: Controlling how library routines are implicitly called. +* Addressing Modes:: Defining addressing modes valid for memory operands. +* Condition Code:: Defining how insns update the condition code. +* Costs:: Defining relative costs of different operations. +* Sections:: Dividing storage into text, data, and other sections. +* PIC:: Macros for position independent code. +* Assembler Format:: Defining how to write insns and pseudo-ops to output. +* Debugging Info:: Defining the format of debugging output. +* Cross-compilation:: Handling floating point for cross-compilers. +* Misc:: Everything else.