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1.1.1.7 ! root 1: This is Info file gcc.info, produced by Makeinfo-1.55 from the input 1.1 root 2: file gcc.texi. 3: 4: This file documents the use and the internals of the GNU compiler. 5: 1.1.1.5 root 6: Published by the Free Software Foundation 675 Massachusetts Avenue 7: Cambridge, MA 02139 USA 8: 1.1.1.7 ! root 9: Copyright (C) 1988, 1989, 1992, 1993, 1994 Free Software Foundation, ! 10: Inc. 1.1 root 11: 1.1.1.3 root 12: Permission is granted to make and distribute verbatim copies of this 13: manual provided the copyright notice and this permission notice are 14: preserved on all copies. 1.1 root 15: 16: Permission is granted to copy and distribute modified versions of 17: this manual under the conditions for verbatim copying, provided also 1.1.1.7 ! root 18: that the sections entitled "GNU General Public License," "Funding for ! 19: Free Software," and "Protect Your Freedom--Fight `Look And Feel'" are ! 20: included exactly as in the original, and provided that the entire ! 21: resulting derived work is distributed under the terms of a permission ! 22: notice identical to this one. 1.1 root 23: 24: Permission is granted to copy and distribute translations of this 25: manual into another language, under the above conditions for modified 1.1.1.3 root 26: versions, except that the sections entitled "GNU General Public 1.1.1.7 ! root 27: License," "Funding for Free Software," and "Protect Your Freedom--Fight ! 28: `Look And Feel'", and this permission notice, may be included in ! 29: translations approved by the Free Software Foundation instead of in the ! 30: original English. ! 31: ! 32: ! 33: File: gcc.info, Node: Convex Options, Next: AMD29K Options, Prev: SPARC Options, Up: Submodel Options ! 34: ! 35: Convex Options ! 36: -------------- ! 37: ! 38: These `-m' options are defined for Convex: ! 39: ! 40: `-mc1' ! 41: Generate output for C1. The code will run on any Convex machine. ! 42: The preprocessor symbol `__convex__c1__' is defined. ! 43: ! 44: `-mc2' ! 45: Generate output for C2. Uses instructions not available on C1. ! 46: Scheduling and other optimizations are chosen for max performance ! 47: on C2. The preprocessor symbol `__convex_c2__' is defined. ! 48: ! 49: `-mc32' ! 50: Generate output for C32xx. Uses instructions not available on C1. ! 51: Scheduling and other optimizations are chosen for max performance ! 52: on C32. The preprocessor symbol `__convex_c32__' is defined. ! 53: ! 54: `-mc34' ! 55: Generate output for C34xx. Uses instructions not available on C1. ! 56: Scheduling and other optimizations are chosen for max performance ! 57: on C34. The preprocessor symbol `__convex_c34__' is defined. ! 58: ! 59: `-mc38' ! 60: Generate output for C38xx. Uses instructions not available on C1. ! 61: Scheduling and other optimizations are chosen for max performance ! 62: on C38. The preprocessor symbol `__convex_c38__' is defined. ! 63: ! 64: `-margcount' ! 65: Generate code which puts an argument count in the word preceding ! 66: each argument list. This is compatible with regular CC, and a few ! 67: programs may need the argument count word. GDB and other ! 68: source-level debuggers do not need it; this info is in the symbol ! 69: table. ! 70: ! 71: `-mnoargcount' ! 72: Omit the argument count word. This is the default. ! 73: ! 74: `-mvolatile-cache' ! 75: Allow volatile references to be cached. This is the default. ! 76: ! 77: `-mvolatile-nocache' ! 78: Volatile references bypass the data cache, going all the way to ! 79: memory. This is only needed for multi-processor code that does ! 80: not use standard synchronization instructions. Making ! 81: non-volatile references to volatile locations will not necessarily ! 82: work. ! 83: ! 84: `-mlong32' ! 85: Type long is 32 bits, the same as type int. This is the default. ! 86: ! 87: `-mlong64' ! 88: Type long is 64 bits, the same as type long long. This option is ! 89: useless, because no library support exists for it. ! 90: ! 91: ! 92: File: gcc.info, Node: AMD29K Options, Next: ARM Options, Prev: Convex Options, Up: Submodel Options ! 93: ! 94: AMD29K Options ! 95: -------------- ! 96: ! 97: These `-m' options are defined for the AMD Am29000: ! 98: ! 99: `-mdw' ! 100: Generate code that assumes the `DW' bit is set, i.e., that byte and ! 101: halfword operations are directly supported by the hardware. This ! 102: is the default. ! 103: ! 104: `-mndw' ! 105: Generate code that assumes the `DW' bit is not set. ! 106: ! 107: `-mbw' ! 108: Generate code that assumes the system supports byte and halfword ! 109: write operations. This is the default. ! 110: ! 111: `-mnbw' ! 112: Generate code that assumes the systems does not support byte and ! 113: halfword write operations. `-mnbw' implies `-mndw'. ! 114: ! 115: `-msmall' ! 116: Use a small memory model that assumes that all function addresses ! 117: are either within a single 256 KB segment or at an absolute ! 118: address of less than 256k. This allows the `call' instruction to ! 119: be used instead of a `const', `consth', `calli' sequence. ! 120: ! 121: `-mnormal' ! 122: Use the normal memory model: Generate `call' instructions only when ! 123: calling functions in the same file and `calli' instructions ! 124: otherwise. This works if each file occupies less than 256 KB but ! 125: allows the entire executable to be larger than 256 KB. This is ! 126: the default. ! 127: ! 128: `-mlarge' ! 129: Always use `calli' instructions. Specify this option if you expect ! 130: a single file to compile into more than 256 KB of code. ! 131: ! 132: `-m29050' ! 133: Generate code for the Am29050. ! 134: ! 135: `-m29000' ! 136: Generate code for the Am29000. This is the default. ! 137: ! 138: `-mkernel-registers' ! 139: Generate references to registers `gr64-gr95' instead of to ! 140: registers `gr96-gr127'. This option can be used when compiling ! 141: kernel code that wants a set of global registers disjoint from ! 142: that used by user-mode code. ! 143: ! 144: Note that when this option is used, register names in `-f' flags ! 145: must use the normal, user-mode, names. ! 146: ! 147: `-muser-registers' ! 148: Use the normal set of global registers, `gr96-gr127'. This is the ! 149: default. ! 150: ! 151: `-mstack-check' ! 152: `-mno-stack-check' ! 153: Insert (or do not insert) a call to `__msp_check' after each stack ! 154: adjustment. This is often used for kernel code. ! 155: ! 156: `-mstorem-bug' ! 157: `-mno-storem-bug' ! 158: `-mstorem-bug' handles 29k processors which cannot handle the ! 159: separation of a mtsrim insn and a storem instruction (most 29000 ! 160: chips to date, but not the 29050). ! 161: ! 162: `-mno-reuse-arg-regs' ! 163: `-mreuse-arg-regs' ! 164: `-mno-reuse-arg-regs' tells the compiler to only use incoming ! 165: argument registers for copying out arguments. This helps detect ! 166: calling a function with fewer arguments than it was declared with. ! 167: ! 168: `-msoft-float' ! 169: Generate output containing library calls for floating point. ! 170: *Warning:* the requisite libraries are not part of GNU CC. ! 171: Normally the facilities of the machine's usual C compiler are ! 172: used, but this can't be done directly in cross-compilation. You ! 173: must make your own arrangements to provide suitable library ! 174: functions for cross-compilation. ! 175: ! 176: ! 177: File: gcc.info, Node: ARM Options, Next: M88K Options, Prev: AMD29K Options, Up: Submodel Options ! 178: ! 179: ARM Options ! 180: ----------- ! 181: ! 182: These `-m' options are defined for Advanced RISC Machines (ARM) ! 183: architectures: ! 184: ! 185: `-m2' ! 186: `-m3' ! 187: These options are identical. Generate code for the ARM2 and ARM3 ! 188: processors. This option is the default. You should also use this ! 189: option to generate code for ARM6 processors that are running with a ! 190: 26-bit program counter. ! 191: ! 192: `-m6' ! 193: Generate code for the ARM6 processor when running with a 32-bit ! 194: program counter. ! 195: ! 196: `-mapcs' ! 197: Generate a stack frame that is compliant with the ARM Proceedure ! 198: Call Standard for all functions, even if this is not strictly ! 199: necessary for correct execution of the code. ! 200: ! 201: `-mbsd' ! 202: This option only applies to RISC iX. Emulate the native BSD-mode ! 203: compiler. This is the default if `-ansi' is not specified. ! 204: ! 205: `-mxopen' ! 206: This option only applies to RISC iX. Emulate the native ! 207: X/Open-mode compiler. ! 208: ! 209: `-mno-symrename' ! 210: This option only applies to RISC iX. Do not run the assembler ! 211: post-processor, `symrename', after code has been assembled. ! 212: Normally it is necessary to modify some of the standard symbols in ! 213: preparation for linking with the RISC iX C library; this option ! 214: suppresses this pass. The post-processor is never run when the ! 215: compiler is built for cross-compilation. ! 216: ! 217: ! 218: File: gcc.info, Node: M88K Options, Next: RS/6000 and PowerPC Options, Prev: ARM Options, Up: Submodel Options ! 219: ! 220: M88K Options ! 221: ------------ ! 222: ! 223: These `-m' options are defined for Motorola 88k architectures: ! 224: ! 225: `-m88000' ! 226: Generate code that works well on both the m88100 and the m88110. ! 227: ! 228: `-m88100' ! 229: Generate code that works best for the m88100, but that also runs ! 230: on the m88110. ! 231: ! 232: `-m88110' ! 233: Generate code that works best for the m88110, and may not run on ! 234: the m88100. ! 235: ! 236: `-mbig-pic' ! 237: Obsolete option to be removed from the next revision. Use `-fPIC'. ! 238: ! 239: `-midentify-revision' ! 240: Include an `ident' directive in the assembler output recording the ! 241: source file name, compiler name and version, timestamp, and ! 242: compilation flags used. ! 243: ! 244: `-mno-underscores' ! 245: In assembler output, emit symbol names without adding an underscore ! 246: character at the beginning of each name. The default is to use an ! 247: underscore as prefix on each name. ! 248: ! 249: `-mocs-debug-info' ! 250: `-mno-ocs-debug-info' ! 251: Include (or omit) additional debugging information (about ! 252: registers used in each stack frame) as specified in the 88open ! 253: Object Compatibility Standard, "OCS". This extra information ! 254: allows debugging of code that has had the frame pointer ! 255: eliminated. The default for DG/UX, SVr4, and Delta 88 SVr3.2 is ! 256: to include this information; other 88k configurations omit this ! 257: information by default. ! 258: ! 259: `-mocs-frame-position' ! 260: When emitting COFF debugging information for automatic variables ! 261: and parameters stored on the stack, use the offset from the ! 262: canonical frame address, which is the stack pointer (register 31) ! 263: on entry to the function. The DG/UX, SVr4, Delta88 SVr3.2, and ! 264: BCS configurations use `-mocs-frame-position'; other 88k ! 265: configurations have the default `-mno-ocs-frame-position'. ! 266: ! 267: `-mno-ocs-frame-position' ! 268: When emitting COFF debugging information for automatic variables ! 269: and parameters stored on the stack, use the offset from the frame ! 270: pointer register (register 30). When this option is in effect, ! 271: the frame pointer is not eliminated when debugging information is ! 272: selected by the -g switch. ! 273: ! 274: `-moptimize-arg-area' ! 275: `-mno-optimize-arg-area' ! 276: Control how function arguments are stored in stack frames. ! 277: `-moptimize-arg-area' saves space by optimizing them, but this ! 278: conflicts with the 88open specifications. The opposite ! 279: alternative, `-mno-optimize-arg-area', agrees with 88open ! 280: standards. By default GNU CC does not optimize the argument area. ! 281: ! 282: `-mshort-data-NUM' ! 283: Generate smaller data references by making them relative to `r0', ! 284: which allows loading a value using a single instruction (rather ! 285: than the usual two). You control which data references are ! 286: affected by specifying NUM with this option. For example, if you ! 287: specify `-mshort-data-512', then the data references affected are ! 288: those involving displacements of less than 512 bytes. ! 289: `-mshort-data-NUM' is not effective for NUM greater than 64k. ! 290: ! 291: `-mserialize-volatile' ! 292: `-mno-serialize-volatile' ! 293: Do, or don't, generate code to guarantee sequential consistency of ! 294: volatile memory references. By default, consistency is guaranteed. ! 295: ! 296: The order of memory references made by the MC88110 processor does ! 297: not always match the order of the instructions requesting those ! 298: references. In particular, a load instruction may execute before ! 299: a preceding store instruction. Such reordering violates ! 300: sequential consistency of volatile memory references, when there ! 301: are multiple processors. When consistency must be guaranteed, ! 302: GNU C generates special instructions, as needed, to force ! 303: execution in the proper order. ! 304: ! 305: The MC88100 processor does not reorder memory references and so ! 306: always provides sequential consistency. However, by default, GNU ! 307: C generates the special instructions to guarantee consistency even ! 308: when you use `-m88100', so that the code may be run on an MC88110 ! 309: processor. If you intend to run your code only on the MC88100 ! 310: processor, you may use `-mno-serialize-volatile'. ! 311: ! 312: The extra code generated to guarantee consistency may affect the ! 313: performance of your application. If you know that you can safely ! 314: forgo this guarantee, you may use `-mno-serialize-volatile'. ! 315: ! 316: `-msvr4' ! 317: `-msvr3' ! 318: Turn on (`-msvr4') or off (`-msvr3') compiler extensions related ! 319: to System V release 4 (SVr4). This controls the following: ! 320: ! 321: 1. Which variant of the assembler syntax to emit. ! 322: ! 323: 2. `-msvr4' makes the C preprocessor recognize `#pragma weak' ! 324: that is used on System V release 4. ! 325: ! 326: 3. `-msvr4' makes GNU CC issue additional declaration directives ! 327: used in SVr4. ! 328: ! 329: `-msvr4' is the default for the m88k-motorola-sysv4 and ! 330: m88k-dg-dgux m88k configurations. `-msvr3' is the default for all ! 331: other m88k configurations. ! 332: ! 333: `-mversion-03.00' ! 334: This option is obsolete, and is ignored. ! 335: ! 336: `-mno-check-zero-division' ! 337: `-mcheck-zero-division' ! 338: Do, or don't, generate code to guarantee that integer division by ! 339: zero will be detected. By default, detection is guaranteed. ! 340: ! 341: Some models of the MC88100 processor fail to trap upon integer ! 342: division by zero under certain conditions. By default, when ! 343: compiling code that might be run on such a processor, GNU C ! 344: generates code that explicitly checks for zero-valued divisors and ! 345: traps with exception number 503 when one is detected. Use of ! 346: mno-check-zero-division suppresses such checking for code ! 347: generated to run on an MC88100 processor. ! 348: ! 349: GNU C assumes that the MC88110 processor correctly detects all ! 350: instances of integer division by zero. When `-m88110' is ! 351: specified, both `-mcheck-zero-division' and ! 352: `-mno-check-zero-division' are ignored, and no explicit checks for ! 353: zero-valued divisors are generated. ! 354: ! 355: `-muse-div-instruction' ! 356: Use the div instruction for signed integer division on the MC88100 ! 357: processor. By default, the div instruction is not used. ! 358: ! 359: On the MC88100 processor the signed integer division instruction ! 360: div) traps to the operating system on a negative operand. The ! 361: operating system transparently completes the operation, but at a ! 362: large cost in execution time. By default, when compiling code ! 363: that might be run on an MC88100 processor, GNU C emulates signed ! 364: integer division using the unsigned integer division instruction ! 365: divu), thereby avoiding the large penalty of a trap to the ! 366: operating system. Such emulation has its own, smaller, execution ! 367: cost in both time and space. To the extent that your code's ! 368: important signed integer division operations are performed on two ! 369: nonnegative operands, it may be desirable to use the div ! 370: instruction directly. ! 371: ! 372: On the MC88110 processor the div instruction (also known as the ! 373: divs instruction) processes negative operands without trapping to ! 374: the operating system. When `-m88110' is specified, ! 375: `-muse-div-instruction' is ignored, and the div instruction is used ! 376: for signed integer division. ! 377: ! 378: Note that the result of dividing INT_MIN by -1 is undefined. In ! 379: particular, the behavior of such a division with and without ! 380: `-muse-div-instruction' may differ. ! 381: ! 382: `-mtrap-large-shift' ! 383: `-mhandle-large-shift' ! 384: Include code to detect bit-shifts of more than 31 bits; ! 385: respectively, trap such shifts or emit code to handle them ! 386: properly. By default GNU CC makes no special provision for large ! 387: bit shifts. ! 388: ! 389: `-mwarn-passed-structs' ! 390: Warn when a function passes a struct as an argument or result. ! 391: Structure-passing conventions have changed during the evolution of ! 392: the C language, and are often the source of portability problems. ! 393: By default, GNU CC issues no such warning. 1.1.1.4 root 394: 395: 1.1.1.6 root 396: File: gcc.info, Node: RS/6000 and PowerPC Options, Next: RT Options, Prev: M88K Options, Up: Submodel Options 397: 398: IBM RS/6000 and PowerPC Options 399: ------------------------------- 400: 401: These `-m' options are defined for the IBM RS/6000 and PowerPC: 402: `-mpower' 403: `-mno-power' 404: `-mpower2' 405: `-mno-power2' 406: `-mpowerpc' 407: `-mno-powerpc' 1.1.1.7 ! root 408: `-mpowerpc-gpopt' ! 409: `-mno-powerpc-gpopt' ! 410: `-mpowerpc-gfxopt' ! 411: `-mno-powerpc-gfxopt' 1.1.1.6 root 412: GNU CC supports two related instruction set architectures for the 413: RS/6000 and PowerPC. The "POWER" instruction set are those 414: instructions supported by the `rios' chip set used in the original 415: RS/6000 systems and the "PowerPC" instruction set is the 416: architecture of the Motorola MPC6xx microprocessors. The PowerPC 417: architecture defines 64-bit instructions, but they are not 418: supported by any current processors. 419: 420: Neither architecture is a subset of the other. However there is a 421: large common subset of instructions supported by both. An MQ 422: register is included in processors supporting the POWER 423: architecture. 424: 425: You use these options to specify which instructions are available 426: on the processor you are using. The default value of these 427: options is determined when configuring GNU CC. Specifying the 428: `-mcpu=CPU_TYPE' overrides the specification of these options. We 429: recommend you use that option rather than these. 430: 431: The `-mpower' option allows GNU CC to generate instructions that 432: are found only in the POWER architecture and to use the MQ 433: register. Specifying `-mpower2' implies `-power' and also allows 434: GNU CC to generate instructions that are present in the POWER2 435: architecture but not the original POWER architecture. 436: 437: The `-mpowerpc' option allows GNU CC to generate instructions that 438: are found only in the 32-bit subset of the PowerPC architecture. 1.1.1.7 ! root 439: Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows ! 440: GNU CC to use the optional PowerPC architecture instructions in the ! 441: General Purpose group, including floating-point square root. ! 442: Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows ! 443: GNU CC to use the optional PowerPC architecture instructions in ! 444: the Graphics group, including floating-point select. 1.1.1.6 root 445: 446: If you specify both `-mno-power' and `-mno-powerpc', GNU CC will 447: use only the instructions in the common subset of both 1.1.1.7 ! root 448: architectures plus some special AIX common-mode calls, and will ! 449: not use the MQ register. Specifying both `-mpower' and `-mpowerpc' ! 450: permits GNU CC to use any instruction from either architecture and ! 451: to allow use of the MQ register; specify this for the Motorola ! 452: MPC601. 1.1.1.6 root 453: 454: `-mnew-mnemonics' 455: `-mold-mnemonics' 456: Select which mnemonics to use in the generated assembler code. 457: `-mnew-mnemonics' requests output that uses the assembler mnemonics 458: defined for the PowerPC architecture, while `-mold-mnemonics' 459: requests the assembler mnemonics defined for the POWER 460: architecture. Instructions defined in only one architecture have 461: only one mnemonic; GNU CC uses that mnemonic irrespective of which 462: of thse options is specified. 463: 464: PowerPC assemblers support both the old and new mnemonics, as will 465: later POWER assemblers. Current POWER assemblers only support the 466: old mnemonics. Specify `-mnew-mnemonics' if you have an assembler 467: that supports them, otherwise specify `-mold-mnemonics'. 468: 469: The default value of these options depends on how GNU CC was 470: configured. Specifing `-mcpu=CPU_TYPE' sometimes overrides the 1.1.1.7 ! root 471: value of these option. Unless you are building a cross-compiler, 1.1.1.6 root 472: you should normally not specify either `-mnew-mnemonics' or 473: `-mold-mnemonics', but should instead accept the default. 474: 475: `-mcpu=CPU_TYPE' 476: Set architecture type, register usage, choice of mnemonics, and 477: instruction scheduling parameters for machine type CPU_TYPE. By 478: default, CPU_TYPE is the target system defined when GNU CC was 479: configured. Supported values for CPU_TYPE are `rios1', `rios2', 1.1.1.7 ! root 480: `rsc', `601', `603', `604', `power', `powerpc', and `common'. ! 481: `-mcpu=power' and `-mcpu=powerpc' specify generic POWER and pure ! 482: PowerPC (i.e., not MPC601) architecture machine types, with an ! 483: appropriate, generic processor model assumed for scheduling ! 484: purposes. ! 485: ! 486: Specifying `-mcpu=rios1', `-mcpu=rios2', `-mcpu=rsc', or ! 487: `-mcpu=power' enables the `-mpower' option and disables the ! 488: `-mpowerpc' option; `-mcpu=601' enables both the `-mpower' and ! 489: `-mpowerpc' options; `-mcpu=603', `-mcpu=604', and `-mcpu=powerpc' ! 490: enable the `-mpowerpc' option and disable the `-mpower' option; ! 491: `-mcpu=common' disables both the `-mpower' and `-mpowerpc' options. 1.1.1.6 root 492: 493: To generate code that will operate on all members of the RS/6000 1.1.1.7 ! root 494: and PowerPC families, specify `-mcpu=common'. In that case, GNU CC ! 495: will use only the instructions in the common subset of both ! 496: architectures plus some special AIX common-mode calls, and will ! 497: not use the MQ register. GNU CC assumes a generic processor model ! 498: for scheduling purposes. ! 499: ! 500: Specifying `-mcpu=rios1', `-mcpu=rios2', `-mcpu=rsc', or ! 501: `-mcpu=power' also disables the `new-mnemonics' option. ! 502: Specifying `-mcpu=601', `-mcpu=603', `-mcpu=604', or ! 503: `-mcpu=powerpc' also enables the `new-mnemonics' option. 1.1.1.6 root 504: 1.1.1.7 ! root 505: `-mfull-toc' 1.1.1.6 root 506: `-mno-fp-in-toc' 1.1.1.7 ! root 507: `-mno-sum-in-toc' 1.1.1.6 root 508: `-mminimal-toc' 509: Modify generation of the TOC (Table Of Contents), which is created 1.1.1.7 ! root 510: for every executable file. The `-mfull-toc' option is selected by ! 511: default. In that case, GNU CC will allocate at least one TOC 1.1.1.6 root 512: entry for each unique non-automatic variable reference in your 513: program. GNU CC will also place floating-point constants in the 1.1.1.7 ! root 514: TOC. However, only 16,384 entries are available in the TOC. 1.1.1.6 root 515: 1.1.1.7 ! root 516: If you receive a linker error message that saying you have ! 517: overflowed the available TOC space, you can reduce the amount of ! 518: TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc' ! 519: options. `-mno-fp-in-toc' prevents GNU CC from putting ! 520: floating-point constants in the TOC and `-mno-sum-in-toc' forces ! 521: GNU CC to generate code to calculate the sum of an address and a ! 522: constant at run-time instead of putting that sum into the TOC. ! 523: You may specify one or both of these options. Each causes GNU CC ! 524: to produce very slightly slower and larger code at the expense of ! 525: conserving TOC space. ! 526: ! 527: If you still run out of space in the TOC even when you specify ! 528: both of these options, specify `-mminimal-toc' instead. This ! 529: option causes GNU CC to make only one TOC entry for every file. ! 530: When you specify this option, GNU CC will produce code that is ! 531: slower and larger but which uses extremely little TOC space. You ! 532: may wish to use this option only on files that contain less ! 533: frequently executed code. 1.1.1.6 root 534: 535: 536: File: gcc.info, Node: RT Options, Next: MIPS Options, Prev: RS/6000 and PowerPC Options, Up: Submodel Options 537: 538: IBM RT Options 539: -------------- 540: 541: These `-m' options are defined for the IBM RT PC: 542: 543: `-min-line-mul' 544: Use an in-line code sequence for integer multiplies. This is the 545: default. 546: 547: `-mcall-lib-mul' 548: Call `lmul$$' for integer multiples. 549: 550: `-mfull-fp-blocks' 551: Generate full-size floating point data blocks, including the 552: minimum amount of scratch space recommended by IBM. This is the 553: default. 554: 555: `-mminimum-fp-blocks' 556: Do not include extra scratch space in floating point data blocks. 557: This results in smaller code, but slower execution, since scratch 558: space must be allocated dynamically. 559: 560: `-mfp-arg-in-fpregs' 561: Use a calling sequence incompatible with the IBM calling 562: convention in which floating point arguments are passed in 563: floating point registers. Note that `varargs.h' and `stdargs.h' 564: will not work with floating point operands if this option is 565: specified. 566: 567: `-mfp-arg-in-gregs' 568: Use the normal calling convention for floating point arguments. 569: This is the default. 570: 571: `-mhc-struct-return' 572: Return structures of more than one word in memory, rather than in a 573: register. This provides compatibility with the MetaWare HighC (hc) 574: compiler. Use the option `-fpcc-struct-return' for compatibility 575: with the Portable C Compiler (pcc). 576: 577: `-mnohc-struct-return' 578: Return some structures of more than one word in registers, when 579: convenient. This is the default. For compatibility with the 580: IBM-supplied compilers, use the option `-fpcc-struct-return' or the 581: option `-mhc-struct-return'. 582: 583: 584: File: gcc.info, Node: MIPS Options, Next: i386 Options, Prev: RT Options, Up: Submodel Options 585: 586: MIPS Options 587: ------------ 588: 589: These `-m' options are defined for the MIPS family of computers: 590: 591: `-mcpu=CPU TYPE' 592: Assume the defaults for the machine type CPU TYPE when scheduling 1.1.1.7 ! root 593: instructions. The choices for CPU TYPE are `r2000', `r3000', ! 594: `r4000', `r4400', `r4600', and `r6000'. While picking a specific ! 595: CPU TYPE will schedule things appropriately for that particular ! 596: chip, the compiler will not generate any code that does not meet ! 597: level 1 of the MIPS ISA (instruction set architecture) without the ! 598: `-mips2' or `-mips3' switches being used. ! 599: ! 600: `-mips1' ! 601: Issue instructions from level 1 of the MIPS ISA. This is the ! 602: default. `r3000' is the default CPU TYPE at this ISA level. 1.1.1.6 root 603: 604: `-mips2' 605: Issue instructions from level 2 of the MIPS ISA (branch likely, 1.1.1.7 ! root 606: square root instructions). `r6000' is the default CPU TYPE at this ! 607: ISA level. 1.1.1.6 root 608: 609: `-mips3' 610: Issue instructions from level 3 of the MIPS ISA (64 bit 1.1.1.7 ! root 611: instructions). `r4000' is the default CPU TYPE at this ISA level. ! 612: This option does not change the sizes of any of the C data types. ! 613: ! 614: `-mfp32' ! 615: Assume that 32 32-bit floating point registers are available. ! 616: This is the default. ! 617: ! 618: `-mfp64' ! 619: Assume that 32 64-bit floating point registers are available. ! 620: This is the default when the `-mips3' option is used. ! 621: ! 622: `-mgp32' ! 623: Assume that 32 32-bit general purpose registers are available. ! 624: This is the default. ! 625: ! 626: `-mgp64' ! 627: Assume that 32 64-bit general purpose registers are available. ! 628: This is the default when the `-mips3' option is used. 1.1.1.6 root 629: 630: `-mint64' 1.1.1.7 ! root 631: Types long, int, and pointer are 64 bits. This works only if ! 632: `-mips3' is also specified. ! 633: 1.1.1.6 root 634: `-mlong64' 1.1.1.7 ! root 635: Types long and pointer are 64 bits, and type int is 32 bits. This ! 636: works only if `-mips3' is also specified. 1.1.1.6 root 637: 638: `-mmips-as' 639: Generate code for the MIPS assembler, and invoke `mips-tfile' to 640: add normal debug information. This is the default for all 641: platforms except for the OSF/1 reference platform, using the 642: OSF/rose object format. If the either of the `-gstabs' or 643: `-gstabs+' switches are used, the `mips-tfile' program will 644: encapsulate the stabs within MIPS ECOFF. 645: 646: `-mgas' 647: Generate code for the GNU assembler. This is the default on the 648: OSF/1 reference platform, using the OSF/rose object format. 649: 650: `-mrnames' 651: `-mno-rnames' 652: The `-mrnames' switch says to output code using the MIPS software 653: names for the registers, instead of the hardware names (ie, A0 1.1.1.7 ! root 654: instead of $4). The only known assembler that supports this option ! 655: is the Algorithmics assembler. 1.1.1.6 root 656: 657: `-mgpopt' 658: `-mno-gpopt' 659: The `-mgpopt' switch says to write all of the data declarations 660: before the instructions in the text section, this allows the MIPS 661: assembler to generate one word memory references instead of using 662: two words for short global or static data items. This is on by 663: default if optimization is selected. 664: 665: `-mstats' 666: `-mno-stats' 667: For each non-inline function processed, the `-mstats' switch 668: causes the compiler to emit one line to the standard error file to 669: print statistics about the program (number of registers saved, 670: stack size, etc.). 671: 672: `-mmemcpy' 673: `-mno-memcpy' 674: The `-mmemcpy' switch makes all block moves call the appropriate 675: string function (`memcpy' or `bcopy') instead of possibly 676: generating inline code. 677: 678: `-mmips-tfile' 679: `-mno-mips-tfile' 680: The `-mno-mips-tfile' switch causes the compiler not postprocess 681: the object file with the `mips-tfile' program, after the MIPS 682: assembler has generated it to add debug support. If `mips-tfile' 683: is not run, then no local variables will be available to the 684: debugger. In addition, `stage2' and `stage3' objects will have 685: the temporary file names passed to the assembler embedded in the 686: object file, which means the objects will not compare the same. 687: The `-mno-mips-tfile' switch should only be used when there are 688: bugs in the `mips-tfile' program that prevents compilation. 689: 690: `-msoft-float' 691: Generate output containing library calls for floating point. 692: *Warning:* the requisite libraries are not part of GNU CC. 693: Normally the facilities of the machine's usual C compiler are 694: used, but this can't be done directly in cross-compilation. You 695: must make your own arrangements to provide suitable library 696: functions for cross-compilation. 697: 698: `-mhard-float' 699: Generate output containing floating point instructions. This is 700: the default if you use the unmodified sources. 701: 702: `-mabicalls' 703: `-mno-abicalls' 704: Emit (or do not emit) the pseudo operations `.abicalls', 705: `.cpload', and `.cprestore' that some System V.4 ports use for 706: position independent code. 707: 708: `-mlong-calls' 1.1.1.7 ! root 709: `-mno-long-calls' 1.1.1.6 root 710: Do all calls with the `JALR' instruction, which requires loading 711: up a function's address into a register before the call. You need 712: to use this switch, if you call outside of the current 512 713: megabyte segment to functions that are not through pointers. 714: 715: `-mhalf-pic' 716: `-mno-half-pic' 717: Put pointers to extern references into the data section and load 718: them up, rather than put the references in the text section. 719: 1.1.1.7 ! root 720: `-membedded-pic' ! 721: `-mno-embedded-pic' ! 722: Generate PIC code suitable for some embedded systems. All calls ! 723: are made using PC relative address, and all data is addressed ! 724: using the $gp register. This requires GNU as and GNU ld which do ! 725: most of the work. ! 726: ! 727: `-membedded-data' ! 728: `-mno-embedded-data' ! 729: Allocate variables to the read-only data section first if ! 730: possible, then next in the small data section if possible, ! 731: otherwise in data. This gives slightly slower code than the ! 732: default, but reduces the amount of RAM required when executing, ! 733: and thus may be preferred for some embedded systems. ! 734: 1.1.1.6 root 735: `-G NUM' 736: Put global and static items less than or equal to NUM bytes into 737: the small data or bss sections instead of the normal data or bss 738: section. This allows the assembler to emit one word memory 739: reference instructions based on the global pointer (GP or $28), 740: instead of the normal two words used. By default, NUM is 8 when 741: the MIPS assembler is used, and 0 when the GNU assembler is used. 742: The `-G NUM' switch is also passed to the assembler and linker. 743: All modules should be compiled with the same `-G NUM' value. 744: 745: `-nocpp' 746: Tell the MIPS assembler to not run it's preprocessor over user 747: assembler files (with a `.s' suffix) when assembling them. 748: 749: These options are defined by the macro `TARGET_SWITCHES' in the 750: machine description. The default for the options is also defined by 751: that macro, which enables you to change the defaults. 752: 753: 754: File: gcc.info, Node: i386 Options, Next: HPPA Options, Prev: MIPS Options, Up: Submodel Options 755: 756: Intel 386 Options 757: ----------------- 758: 759: These `-m' options are defined for the i386 family of computers: 760: 761: `-m486' 762: `-mno-486' 763: Control whether or not code is optimized for a 486 instead of an 764: 386. Code generated for an 486 will run on a 386 and vice versa. 765: 1.1.1.7 ! root 766: `-mieee-fp' ! 767: `-m-no-ieee-fp' ! 768: Control whether or not the compiler uses IEEE floating point ! 769: comparisons. These handle correctly the case where the result of a ! 770: comparison is unordered. ! 771: 1.1.1.6 root 772: `-msoft-float' 773: Generate output containing library calls for floating point. 774: *Warning:* the requisite libraries are not part of GNU CC. 775: Normally the facilities of the machine's usual C compiler are 776: used, but this can't be done directly in cross-compilation. You 777: must make your own arrangements to provide suitable library 778: functions for cross-compilation. 779: 780: On machines where a function returns floating point results in the 781: 80387 register stack, some floating point opcodes may be emitted 782: even if `-msoft-float' is used. 783: 784: `-mno-fp-ret-in-387' 785: Do not use the FPU registers for return values of functions. 786: 787: The usual calling convention has functions return values of types 788: `float' and `double' in an FPU register, even if there is no FPU. 789: The idea is that the operating system should emulate an FPU. 790: 791: The option `-mno-fp-ret-in-387' causes such values to be returned 792: in ordinary CPU registers instead. 793: 1.1.1.7 ! root 794: `-mno-fancy-math-387' ! 795: Some 387 emulators do not support the `sin', `cos' and `sqrt' ! 796: instructions for the 387. Specify this option to avoid generating ! 797: those instructions. This option is the default on FreeBSD. As of ! 798: revision 2.6.1, these instructions are not generated unless you ! 799: also use the `-ffast-math' switch. ! 800: ! 801: `-msvr3-shlib' ! 802: `-mno-svr3-shlib' ! 803: Control whether GNU CC places uninitialized locals into `bss' or ! 804: `data'. `-msvr3-shlib' places these locals into `bss'. These ! 805: options are meaningful only on System V Release 3. ! 806: ! 807: `-mno-wide-multiply' ! 808: `-mwide-multiply' ! 809: Control whether GNU CC uses the `mul' and `imul' that produce 64 ! 810: bit results in `eax:edx' from 32 bit operands to do `long long' ! 811: multiplies and 32-bit division by constants. ! 812: ! 813: `-mreg-alloc=REGS' ! 814: Control the default allocation order of integer registers. The ! 815: string REGS is a series of letters specifing a register. The ! 816: supported letters are: `a' allocate EAX; `b' allocate EBX; `c' ! 817: allocate ECX; `d' allocate EDX; `S' allocate ESI; `D' allocate ! 818: EDI; `B' allocate EBP. ! 819: 1.1.1.6 root 820: 821: File: gcc.info, Node: HPPA Options, Next: Intel 960 Options, Prev: i386 Options, Up: Submodel Options 822: 823: HPPA Options 824: ------------ 825: 826: These `-m' options are defined for the HPPA family of computers: 827: 828: `-mpa-risc-1-0' 829: Generate code for a PA 1.0 processor. 830: 831: `-mpa-risc-1-1' 832: Generate code for a PA 1.1 processor. 833: 1.1.1.7 ! root 834: `-mjump-in-delay' ! 835: Fill delay slots of function calls with unconditional jump ! 836: instructions by modifying the return pointer for the function call ! 837: to be the target of the conditional jump. ! 838: 1.1.1.6 root 839: `-mlong-calls' 840: Generate code which allows calls to functions greater than 256k 841: away from the caller when the caller and callee are in the same 842: source file. Do not turn this option on unless code refuses to 843: link with "branch out of range errors" from the linker. 844: 845: `-mdisable-fpregs' 846: Prevent floating point registers from being used in any manner. 847: This is necessary for compiling kernels which perform lazy context 848: switching of floating point registers. If you use this option and 849: attempt to perform floating point operations, the compiler will 850: abort. 851: 852: `-mdisable-indexing' 853: Prevent the compiler from using indexing address modes. This 854: avoids some rather obscure problems when compiling MIG generated 855: code under MACH. 856: 1.1.1.7 ! root 857: `-mportable-runtime' ! 858: Use the portable calling conventions proposed by HP for ELF ! 859: systems. Note this option also enables `-mlong-calls'. ! 860: ! 861: `-mgas' ! 862: Enable the use of assembler directives only GAS understands. 1.1.1.6 root 863: 864: 865: File: gcc.info, Node: Intel 960 Options, Next: DEC Alpha Options, Prev: HPPA Options, Up: Submodel Options 866: 867: Intel 960 Options 868: ----------------- 869: 870: These `-m' options are defined for the Intel 960 implementations: 871: 872: `-mCPU TYPE' 873: Assume the defaults for the machine type CPU TYPE for some of the 874: other options, including instruction scheduling, floating point 875: support, and addressing modes. The choices for CPU TYPE are `ka', 876: `kb', `mc', `ca', `cf', `sa', and `sb'. The default is `kb'. 877: 878: `-mnumerics' 879: `-msoft-float' 880: The `-mnumerics' option indicates that the processor does support 881: floating-point instructions. The `-msoft-float' option indicates 882: that floating-point support should not be assumed. 883: 884: `-mleaf-procedures' 885: `-mno-leaf-procedures' 886: Do (or do not) attempt to alter leaf procedures to be callable 887: with the `bal' instruction as well as `call'. This will result in 888: more efficient code for explicit calls when the `bal' instruction 889: can be substituted by the assembler or linker, but less efficient 890: code in other cases, such as calls via function pointers, or using 891: a linker that doesn't support this optimization. 892: 893: `-mtail-call' 894: `-mno-tail-call' 895: Do (or do not) make additional attempts (beyond those of the 896: machine-independent portions of the compiler) to optimize 897: tail-recursive calls into branches. You may not want to do this 898: because the detection of cases where this is not valid is not 899: totally complete. The default is `-mno-tail-call'. 900: 901: `-mcomplex-addr' 902: `-mno-complex-addr' 903: Assume (or do not assume) that the use of a complex addressing 904: mode is a win on this implementation of the i960. Complex 905: addressing modes may not be worthwhile on the K-series, but they 906: definitely are on the C-series. The default is currently 907: `-mcomplex-addr' for all processors except the CB and CC. 908: 909: `-mcode-align' 910: `-mno-code-align' 911: Align code to 8-byte boundaries for faster fetching (or don't 912: bother). Currently turned on by default for C-series 913: implementations only. 914: 915: `-mic-compat' 916: `-mic2.0-compat' 917: `-mic3.0-compat' 918: Enable compatibility with iC960 v2.0 or v3.0. 919: 920: `-masm-compat' 921: `-mintel-asm' 922: Enable compatibility with the iC960 assembler. 923: 924: `-mstrict-align' 925: `-mno-strict-align' 926: Do not permit (do permit) unaligned accesses. 927: 928: `-mold-align' 929: Enable structure-alignment compatibility with Intel's gcc release 930: version 1.3 (based on gcc 1.37). Currently this is buggy in that 931: `#pragma align 1' is always assumed as well, and cannot be turned 932: off. 933: 934: 935: File: gcc.info, Node: DEC Alpha Options, Next: Clipper Options, Prev: Intel 960 Options, Up: Submodel Options 1.1.1.5 root 936: 937: DEC Alpha Options 938: ----------------- 939: 940: These `-m' options are defined for the DEC Alpha implementations: 941: 942: `-mno-soft-float' 943: `-msoft-float' 944: Use (do not use) the hardware floating-point instructions for 945: floating-point operations. When `-msoft-float' is specified, 946: functions in `libgcc1.c' will be used to perform floating-point 947: operations. Unless they are replaced by routines that emulate the 948: floating-point operations, or compiled in such a way as to call 949: such emulations routines, these routines will issue floating-point 950: operations. If you are compiling for an Alpha without 951: floating-point operations, you must ensure that the library is 952: built so as not to call them. 953: 954: Note that Alpha implementations without floating-point operations 955: are required to have floating-point registers. 956: 957: `-mfp-reg' 958: `-mno-fp-regs' 959: Generate code that uses (does not use) the floating-point register 960: set. `-mno-fp-regs' implies `-msoft-float'. If the floating-point 961: register set is not used, floating point operands are passed in 962: integer registers as if they were integers and floating-point 963: results are passed in $0 instead of $f0. This is a non-standard 964: calling sequence, so any function with a floating-point argument 965: or return value called by code compiled with `-mno-fp-regs' must 966: also be compiled with that option. 967: 968: A typical use of this option is building a kernel that does not 969: use, and hence need not save and restore, any floating-point 970: registers. 971: 972: 1.1.1.7 ! root 973: File: gcc.info, Node: Clipper Options, Next: H8/300 Options, Prev: DEC Alpha Options, Up: Submodel Options 1.1.1.6 root 974: 975: Clipper Options 976: --------------- 977: 978: These `-m' options are defined for the Clipper implementations: 979: 980: `-mc300' 981: Produce code for a C300 Clipper processor. This is the default. 982: 983: `-mc400' 984: Produce code for a C400 Clipper processor i.e. use floting point 985: registers f8..f15. 986: 987: 1.1.1.7 ! root 988: File: gcc.info, Node: H8/300 Options, Next: System V Options, Prev: Clipper Options, Up: Submodel Options ! 989: ! 990: H8/300 Options ! 991: -------------- ! 992: ! 993: These `-m' options are defined for the H8/300 implementations: ! 994: ! 995: `-mrelax' ! 996: Shorten some address references at link time, when possible; uses ! 997: the linker option `-relax'. *Note `ld' and the H8/300: ! 998: (ld.info)H8/300, for a fuller description. ! 999: ! 1000: `-mh' ! 1001: Generate code for the H8/300H. ! 1002: ! 1003: ! 1004: File: gcc.info, Node: System V Options, Prev: H8/300 Options, Up: Submodel Options 1.1.1.5 root 1005: 1006: Options for System V 1007: -------------------- 1008: 1009: These additional options are available on System V Release 4 for 1010: compatibility with other compilers on those systems: 1011: 1012: `-Qy' 1013: Identify the versions of each tool used by the compiler, in a 1014: `.ident' assembler directive in the output. 1015: 1016: `-Qn' 1017: Refrain from adding `.ident' directives to the output file (this is 1018: the default). 1019: 1020: `-YP,DIRS' 1021: Search the directories DIRS, and no others, for libraries 1022: specified with `-l'. 1023: 1024: `-Ym,DIR' 1025: Look in the directory DIR to find the M4 preprocessor. The 1026: assembler uses this option. 1027: 1028: 1029: File: gcc.info, Node: Code Gen Options, Next: Environment Variables, Prev: Submodel Options, Up: Invoking GCC 1030: 1031: Options for Code Generation Conventions 1032: ======================================= 1033: 1034: These machine-independent options control the interface conventions 1035: used in code generation. 1036: 1037: Most of them have both positive and negative forms; the negative form 1038: of `-ffoo' would be `-fno-foo'. In the table below, only one of the 1039: forms is listed--the one which is not the default. You can figure out 1040: the other form by either removing `no-' or adding it. 1041: 1042: `-fpcc-struct-return' 1043: Return "short" `struct' and `union' values in memory like longer 1044: ones, rather than in registers. This convention is less 1045: efficient, but it has the advantage of allowing intercallability 1046: between GNU CC-compiled files and files compiled with other 1047: compilers. 1048: 1049: The precise convention for returning structures in memory depends 1050: on the target configuration macros. 1051: 1052: Short structures and unions are those whose size and alignment 1053: match that of some integer type. 1054: 1055: `-freg-struct-return' 1056: Use the convention that `struct' and `union' values are returned 1057: in registers when possible. This is more efficient for small 1058: structures than `-fpcc-struct-return'. 1059: 1060: If you specify neither `-fpcc-struct-return' nor its contrary 1061: `-freg-struct-return', GNU CC defaults to whichever convention is 1062: standard for the target. If there is no standard convention, GNU 1063: CC defaults to `-fpcc-struct-return', except on targets where GNU 1064: CC is the principal compiler. In those cases, we can choose the 1065: standard, and we chose the more efficient register return 1066: alternative. 1067: 1068: `-fshort-enums' 1069: Allocate to an `enum' type only as many bytes as it needs for the 1070: declared range of possible values. Specifically, the `enum' type 1071: will be equivalent to the smallest integer type which has enough 1072: room. 1073: 1074: `-fshort-double' 1075: Use the same size for `double' as for `float'. 1076: 1077: `-fshared-data' 1078: Requests that the data and non-`const' variables of this 1079: compilation be shared data rather than private data. The 1080: distinction makes sense only on certain operating systems, where 1081: shared data is shared between processes running the same program, 1082: while private data exists in one copy per process. 1083: 1084: `-fno-common' 1085: Allocate even uninitialized global variables in the bss section of 1086: the object file, rather than generating them as common blocks. 1087: This has the effect that if the same variable is declared (without 1088: `extern') in two different compilations, you will get an error 1089: when you link them. The only reason this might be useful is if 1090: you wish to verify that the program will work on other systems 1091: which always work this way. 1092: 1093: `-fno-ident' 1094: Ignore the `#ident' directive. 1095: 1096: `-fno-gnu-linker' 1097: Do not output global initializations (such as C++ constructors and 1098: destructors) in the form used by the GNU linker (on systems where 1099: the GNU linker is the standard method of handling them). Use this 1100: option when you want to use a non-GNU linker, which also requires 1101: using the `collect2' program to make sure the system linker 1102: includes constructors and destructors. (`collect2' is included in 1103: the GNU CC distribution.) For systems which *must* use 1104: `collect2', the compiler driver `gcc' is configured to do this 1105: automatically. 1106: 1107: `-finhibit-size-directive' 1108: Don't output a `.size' assembler directive, or anything else that 1109: would cause trouble if the function is split in the middle, and the 1110: two halves are placed at locations far apart in memory. This 1111: option is used when compiling `crtstuff.c'; you should not need to 1112: use it for anything else. 1113: 1114: `-fverbose-asm' 1115: Put extra commentary information in the generated assembly code to 1116: make it more readable. This option is generally only of use to 1117: those who actually need to read the generated assembly code 1118: (perhaps while debugging the compiler itself). 1119: 1120: `-fvolatile' 1121: Consider all memory references through pointers to be volatile. 1122: 1123: `-fvolatile-global' 1124: Consider all memory references to extern and global data items to 1125: be volatile. 1126: 1127: `-fpic' 1128: Generate position-independent code (PIC) suitable for use in a 1129: shared library, if supported for the target machine. Such code 1130: accesses all constant addresses through a global offset table 1131: (GOT). If the GOT size for the linked executable exceeds a 1132: machine-specific maximum size, you get an error message from the 1133: linker indicating that `-fpic' does not work; in that case, 1134: recompile with `-fPIC' instead. (These maximums are 16k on the 1135: m88k, 8k on the Sparc, and 32k on the m68k and RS/6000. The 386 1136: has no such limit.) 1137: 1138: Position-independent code requires special support, and therefore 1139: works only on certain machines. For the 386, GNU CC supports PIC 1140: for System V but not for the Sun 386i. Code generated for the IBM 1141: RS/6000 is always position-independent. 1142: 1143: The GNU assembler does not fully support PIC. Currently, you must 1144: use some other assembler in order for PIC to work. We would 1145: welcome volunteers to upgrade GAS to handle this; the first part 1146: of the job is to figure out what the assembler must do differently. 1147: 1148: `-fPIC' 1149: If supported for the target machine, emit position-independent 1150: code, suitable for dynamic linking and avoiding any limit on the 1151: size of the global offset table. This option makes a difference 1152: on the m68k, m88k and the Sparc. 1153: 1154: Position-independent code requires special support, and therefore 1155: works only on certain machines. 1156: 1157: `-ffixed-REG' 1158: Treat the register named REG as a fixed register; generated code 1159: should never refer to it (except perhaps as a stack pointer, frame 1160: pointer or in some other fixed role). 1161: 1162: REG must be the name of a register. The register names accepted 1163: are machine-specific and are defined in the `REGISTER_NAMES' macro 1164: in the machine description macro file. 1165: 1166: This flag does not have a negative form, because it specifies a 1167: three-way choice. 1168: 1169: `-fcall-used-REG' 1170: Treat the register named REG as an allocatable register that is 1171: clobbered by function calls. It may be allocated for temporaries 1172: or variables that do not live across a call. Functions compiled 1173: this way will not save and restore the register REG. 1174: 1175: Use of this flag for a register that has a fixed pervasive role in 1176: the machine's execution model, such as the stack pointer or frame 1177: pointer, will produce disastrous results. 1178: 1179: This flag does not have a negative form, because it specifies a 1180: three-way choice. 1181: 1182: `-fcall-saved-REG' 1183: Treat the register named REG as an allocatable register saved by 1184: functions. It may be allocated even for temporaries or variables 1185: that live across a call. Functions compiled this way will save 1186: and restore the register REG if they use it. 1187: 1188: Use of this flag for a register that has a fixed pervasive role in 1189: the machine's execution model, such as the stack pointer or frame 1190: pointer, will produce disastrous results. 1191: 1192: A different sort of disaster will result from the use of this flag 1193: for a register in which function values may be returned. 1194: 1195: This flag does not have a negative form, because it specifies a 1196: three-way choice. 1197: 1198: `+e0' 1199: `+e1' 1200: Control whether virtual function definitions in classes are used to 1201: generate code, or only to define interfaces for their callers. 1202: (C++ only). 1203: 1204: These options are provided for compatibility with `cfront' 1.x 1205: usage; the recommended alternative GNU C++ usage is in flux. 1206: *Note Declarations and Definitions in One Header: C++ Interface. 1207: 1208: With `+e0', virtual function definitions in classes are declared 1209: `extern'; the declaration is used only as an interface 1210: specification, not to generate code for the virtual functions (in 1211: this compilation). 1212: 1213: With `+e1', G++ actually generates the code implementing virtual 1214: functions defined in the code, and makes them publicly visible. 1215:
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