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1.1 root 1: /* Generate code from to output assembler insns as recognized from rtl.
1.1.1.7 root 2: Copyright (C) 1987, 1988 Free Software Foundation, Inc.
1.1 root 3:
4: This file is part of GNU CC.
5:
1.1.1.7 root 6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 1, or (at your option)
9: any later version.
10:
1.1 root 11: GNU CC is distributed in the hope that it will be useful,
1.1.1.7 root 12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
1.1 root 19:
20:
21: /* This program reads the machine description for the compiler target machine
22: and produces a file containing three things:
23:
24: 1, An array of strings `insn_template' which is indexed by insn code number
25: and contains the template for output of that insn,
26:
27: 2. An array of ints `insn_n_operands' which is indexed by insn code number
28: and contains the number of distinct operands in the pattern for that insn,
29:
30: 3. An array of ints `insn_n_dups' which is indexed by insn code number
31: and contains the number of match_dup's that appear in the insn's pattern.
32: This says how many elements of `recog_dup_loc' are significant
33: after an insn has been recognized.
34:
1.1.1.2 root 35: 4. An array of arrays of operand constraint strings,
1.1 root 36: `insn_operand_constraint',
37: indexed first by insn code number and second by operand number,
38: containing the constraint for that operand.
1.1.1.2 root 39:
1.1 root 40: This array is generated only if register constraints appear in
41: match_operand rtx's.
42:
1.1.1.2 root 43: 5. An array of arrays of chars which indicate which operands of
1.1 root 44: which insn patterns appear within ADDRESS rtx's. This array is
45: called `insn_operand_address_p' and is generated only if there
46: are *no* register constraints in the match_operand rtx's.
47:
1.1.1.2 root 48: 6. An array of arrays of machine modes, `insn_operand_mode',
49: indexed first by insn code number and second by operand number,
50: containing the machine mode that that operand is supposed to have.
51: Also `insn_operand_strict_low', which is nonzero for operands
52: contained in a STRICT_LOW_PART.
53:
54: 7. An array of arrays of int-valued functions, `insn_operand_predicate',
55: indexed first by insn code number and second by operand number,
56: containing the match_operand predicate for this operand.
57:
58: 8. An array of functions `insn_gen_function' which, indexed
1.1 root 59: by insn code number, gives the function to generate a body
60: for that patter, given operands as arguments.
61:
1.1.1.2 root 62: 9. A function `output_insn_hairy' which is called with two arguments
1.1 root 63: (an insn code number and a vector of operand value rtx's)
64: and returns a template to use for output of that insn.
65: This is used only in the cases where the template is not constant.
66: These cases are specified by a * at the beginning of the template string
67: in the machine description. They are identified for the sake of
68: other parts of the compiler by a zero element in `insn_template'.
1.1.1.4 root 69:
70: 10. An array of structures, `insn_machine_info', that gives machine-specific
71: information about the insn.
1.1 root 72:
1.1.1.5 root 73: 11. An array of ints, `insn_n_alternatives', that gives the number
74: of alternatives in the constraints of each pattern.
75:
1.1 root 76: The code number of an insn is simply its position in the machine description;
77: code numbers are assigned sequentially to entries in the description,
78: starting with code number 0.
79:
80: Thus, the following entry in the machine description
81:
82: (define_insn "clrdf"
83: [(set (match_operand:DF 0 "general_operand" "")
84: (const_int 0))]
85: ""
86: "clrd %0")
87:
88: assuming it is the 25th entry present, would cause
1.1.1.2 root 89: insn_template[24] to be "clrd %0", and insn_n_operands[24] to be 1.
1.1 root 90: It would not make an case in output_insn_hairy because the template
91: given in the entry is a constant (it does not start with `*'). */
92:
93: #include <stdio.h>
1.1.1.2 root 94: #include "config.h"
1.1 root 95: #include "rtl.h"
1.1.1.2 root 96: #include "obstack.h"
1.1 root 97:
98: /* No instruction can have more operands than this.
99: Sorry for this arbitrary limit, but what machine will
100: have an instruction with this many operands? */
101:
102: #define MAX_MAX_OPERANDS 40
103:
104: struct obstack obstack;
1.1.1.2 root 105: struct obstack *rtl_obstack = &obstack;
1.1 root 106:
107: #define obstack_chunk_alloc xmalloc
108: #define obstack_chunk_free free
109: extern int xmalloc ();
110: extern void free ();
111:
112: void fatal ();
1.1.1.6 root 113: void error ();
1.1.1.2 root 114: void mybcopy ();
115: void mybzero ();
1.1 root 116:
117: /* insns in the machine description are assigned sequential code numbers
118: that are used by insn-recog.c (produced by genrecog) to communicate
119: to insn-output.c (produced by this program). */
120:
121: int next_code_number;
122:
123: /* Record in this chain all information that we will output,
124: associated with the code number of the insn. */
125:
126: struct data
127: {
128: int code_number;
129: char *name;
130: char *template; /* string such as "movl %1,%0" */
131: int n_operands; /* Number of operands this insn recognizes */
132: int n_dups; /* Number times match_dup appears in pattern */
1.1.1.5 root 133: int n_alternatives; /* Number of alternatives in each constraint */
1.1 root 134: struct data *next;
135: char *constraints[MAX_MAX_OPERANDS];
1.1.1.5 root 136: /* Number of alternatives in constraints of operand N. */
137: int op_n_alternatives[MAX_MAX_OPERANDS];
1.1.1.2 root 138: char *predicates[MAX_MAX_OPERANDS];
1.1 root 139: char address_p[MAX_MAX_OPERANDS];
140: enum machine_mode modes[MAX_MAX_OPERANDS];
1.1.1.2 root 141: char strict_low[MAX_MAX_OPERANDS];
142: char outfun; /* Nonzero means this has an output function */
1.1.1.4 root 143: char *machine_info; /* machine-specific info string. */
1.1 root 144: };
145:
146: /* This variable points to the first link in the chain. */
147:
148: struct data *insn_data;
149:
150: /* Pointer to the last link in the chain, so new elements
151: can be added at the end. */
152:
153: struct data *end_of_insn_data;
154:
155: /* Nonzero if any match_operand has a constraint string;
156: implies that REGISTER_CONSTRAINTS will be defined
157: for this machine description. */
158:
159: int have_constraints;
160:
161: void
162: output_prologue ()
163: {
164:
165: printf ("/* Generated automatically by the program `genoutput'\n\
166: from the machine description file `md'. */\n\n");
167:
168: printf ("#include \"config.h\"\n");
169: printf ("#include \"rtl.h\"\n");
170: printf ("#include \"regs.h\"\n");
1.1.1.8 ! root 171: printf ("#include \"hard-reg-set.h\"\n");
1.1.1.6 root 172: printf ("#include \"real.h\"\n");
1.1 root 173: printf ("#include \"conditions.h\"\n");
174: printf ("#include \"insn-flags.h\"\n");
175: printf ("#include \"insn-config.h\"\n\n");
176:
1.1.1.4 root 177: printf ("#ifndef __STDC__\n");
178: printf ("#define const\n");
179: printf ("#endif\n\n");
180:
181: printf ("#include \"output.h\"\n");
1.1 root 182: printf ("#include \"aux-output.c\"\n\n");
1.1.1.4 root 183:
184: /* Make sure there is at least a dummy definition of INSN_MACHINE_INFO. */
185: printf ("#ifndef INSN_MACHINE_INFO\n");
186: printf ("#define INSN_MACHINE_INFO struct dummy1 {int i;}\n");
187: printf ("#endif\n\n");
1.1 root 188: }
189:
190: void
191: output_epilogue ()
192: {
193: register struct data *d;
194:
1.1.1.4 root 195: printf ("\nchar * const insn_template[] =\n {\n");
1.1 root 196: for (d = insn_data; d; d = d->next)
197: {
198: if (d->template)
199: printf (" \"%s\",\n", d->template);
200: else
201: printf (" 0,\n");
202: }
203: printf (" };\n");
204:
1.1.1.4 root 205: printf ("\nchar *(*const insn_outfun[])() =\n {\n");
1.1.1.2 root 206: for (d = insn_data; d; d = d->next)
207: {
208: if (d->outfun)
1.1.1.3 root 209: printf (" output_%d,\n", d->code_number);
1.1.1.2 root 210: else
211: printf (" 0,\n");
212: }
213: printf (" };\n");
214:
1.1.1.4 root 215: printf ("\nrtx (*const insn_gen_function[]) () =\n {\n");
1.1 root 216: for (d = insn_data; d; d = d->next)
217: {
218: if (d->name)
219: printf (" gen_%s,\n", d->name);
220: else
221: printf (" 0,\n");
222: }
223: printf (" };\n");
224:
1.1.1.4 root 225: printf ("\nconst int insn_n_operands[] =\n {\n");
1.1 root 226: for (d = insn_data; d; d = d->next)
227: {
228: printf (" %d,\n", d->n_operands);
229: }
230: printf (" };\n");
231:
1.1.1.4 root 232: printf ("\nconst int insn_n_dups[] =\n {\n");
1.1 root 233: for (d = insn_data; d; d = d->next)
234: {
235: printf (" %d,\n", d->n_dups);
236: }
237: printf (" };\n");
238:
239: if (have_constraints)
240: {
1.1.1.4 root 241: printf ("\nchar *const insn_operand_constraint[][MAX_RECOG_OPERANDS] =\n {\n");
1.1 root 242: for (d = insn_data; d; d = d->next)
243: {
1.1.1.5 root 244: register int i, n = 0, start;
1.1 root 245: printf (" {");
1.1.1.5 root 246: /* Make sure all the operands have the same number of
247: alternatives in their constraints.
248: Let N be that number. */
249: for (start = 0; start < d->n_operands; start++)
250: if (d->op_n_alternatives[start] > 0)
251: {
252: if (n == 0)
253: n = d->op_n_alternatives[start];
254: else if (n != d->op_n_alternatives[start])
1.1.1.6 root 255: error ("wrong number of alternatives in operand %d of insn number %d",
1.1.1.5 root 256: start, d->code_number);
257: }
258: /* Record the insn's overall number of alternatives. */
259: d->n_alternatives = n;
260:
1.1 root 261: for (i = 0; i < d->n_operands; i++)
1.1.1.2 root 262: {
263: if (d->constraints[i] == 0)
264: printf (" \"\",");
265: else
266: printf (" \"%s\",", d->constraints[i]);
267: }
1.1 root 268: if (d->n_operands == 0)
269: printf (" 0");
270: printf (" },\n");
271: }
272: printf (" };\n");
273: }
274: else
275: {
1.1.1.4 root 276: printf ("\nconst char insn_operand_address_p[][MAX_RECOG_OPERANDS] =\n {\n");
1.1 root 277: for (d = insn_data; d; d = d->next)
278: {
279: register int i;
280: printf (" {");
281: for (i = 0; i < d->n_operands; i++)
282: printf (" %d,", d->address_p[i]);
283: if (d->n_operands == 0)
284: printf (" 0");
285: printf (" },\n");
286: }
287: printf (" };\n");
288: }
289:
1.1.1.4 root 290: printf ("\nconst enum machine_mode insn_operand_mode[][MAX_RECOG_OPERANDS] =\n {\n");
1.1 root 291: for (d = insn_data; d; d = d->next)
292: {
293: register int i;
294: printf (" {");
295: for (i = 0; i < d->n_operands; i++)
296: printf (" %smode,", GET_MODE_NAME (d->modes[i]));
297: if (d->n_operands == 0)
298: printf (" VOIDmode");
299: printf (" },\n");
300: }
301: printf (" };\n");
1.1.1.2 root 302:
1.1.1.4 root 303: printf ("\nconst char insn_operand_strict_low[][MAX_RECOG_OPERANDS] =\n {\n");
1.1.1.2 root 304: for (d = insn_data; d; d = d->next)
305: {
306: register int i;
307: printf (" {");
308: for (i = 0; i < d->n_operands; i++)
309: printf (" %d,", d->strict_low[i]);
310: if (d->n_operands == 0)
311: printf (" 0");
312: printf (" },\n");
313: }
314: printf (" };\n");
315:
1.1.1.4 root 316: printf ("\nint (*const insn_operand_predicate[][MAX_RECOG_OPERANDS])() =\n {\n");
1.1.1.2 root 317: for (d = insn_data; d; d = d->next)
318: {
319: register int i;
320: printf (" {");
321: for (i = 0; i < d->n_operands; i++)
322: printf (" %s,", ((d->predicates[i] && d->predicates[i][0])
323: ? d->predicates[i] : "0"));
324: if (d->n_operands == 0)
325: printf (" 0");
326: printf (" },\n");
327: }
328: printf (" };\n");
1.1.1.4 root 329:
330: printf ("\nconst INSN_MACHINE_INFO insn_machine_info[] =\n {\n");
331: for (d = insn_data; d; d = d->next)
332: {
333: if (d->machine_info)
334: printf (" {%s},\n", d->machine_info);
335: else
336: printf(" {0},\n");
337: }
338: printf(" };\n");
1.1.1.5 root 339:
340: printf ("\nconst int insn_n_alternatives[] =\n {\n");
341: for (d = insn_data; d; d = d->next)
342: {
343: if (d->n_alternatives)
344: printf (" %d,\n", d->n_alternatives);
345: else
346: printf(" 0,\n");
347: }
348: printf(" };\n");
1.1 root 349: }
350:
351: /* scan_operands (X) stores in max_opno the largest operand
352: number present in X, if that is larger than the previous
353: value of max_opno. It stores all the constraints in `constraints'
1.1.1.2 root 354: and all the machine modes in `modes'.
355:
356: THIS_ADDRESS_P is nonzero if the containing rtx was an ADDRESS.
357: THIS_STRICT_LOW is nonzero if the containing rtx was a STRICT_LOW_PART. */
1.1 root 358:
359: int max_opno;
360: int num_dups;
361: char *constraints[MAX_MAX_OPERANDS];
1.1.1.5 root 362: int op_n_alternatives[MAX_MAX_OPERANDS];
1.1.1.2 root 363: char *predicates[MAX_MAX_OPERANDS];
1.1 root 364: char address_p[MAX_MAX_OPERANDS];
365: enum machine_mode modes[MAX_MAX_OPERANDS];
1.1.1.2 root 366: char strict_low[MAX_MAX_OPERANDS];
1.1 root 367:
368: void
1.1.1.2 root 369: scan_operands (part, this_address_p, this_strict_low)
1.1 root 370: rtx part;
371: int this_address_p;
1.1.1.2 root 372: int this_strict_low;
1.1 root 373: {
374: register int i, j;
1.1.1.2 root 375: register RTX_CODE code;
1.1 root 376: register char *format_ptr;
377:
1.1.1.2 root 378: if (part == 0)
379: return;
380:
381: code = GET_CODE (part);
382:
1.1 root 383: if (code == MATCH_OPERAND)
384: {
1.1.1.2 root 385: int opno = XINT (part, 0);
386: if (opno > max_opno)
387: max_opno = opno;
388: if (max_opno >= MAX_MAX_OPERANDS)
1.1.1.6 root 389: error ("Too many operands (%d) in one instruction pattern.\n",
1.1 root 390: max_opno + 1);
1.1.1.2 root 391: modes[opno] = GET_MODE (part);
392: strict_low[opno] = this_strict_low;
393: predicates[opno] = XSTR (part, 1);
394: constraints[opno] = XSTR (part, 2);
1.1 root 395: if (XSTR (part, 2) != 0 && *XSTR (part, 2) != 0)
1.1.1.5 root 396: {
397: op_n_alternatives[opno] = n_occurrences (',', XSTR (part, 2)) + 1;
398: have_constraints = 1;
399: }
1.1.1.2 root 400: address_p[opno] = this_address_p;
1.1 root 401: return;
402: }
403:
1.1.1.5 root 404: if (code == MATCH_OPERATOR)
405: {
406: int opno = XINT (part, 0);
407: if (opno > max_opno)
408: max_opno = opno;
409: if (max_opno >= MAX_MAX_OPERANDS)
1.1.1.6 root 410: error ("Too many operands (%d) in one instruction pattern.\n",
1.1.1.5 root 411: max_opno + 1);
412: modes[opno] = GET_MODE (part);
413: strict_low[opno] = 0;
414: predicates[opno] = XSTR (part, 1);
415: constraints[opno] = 0;
416: address_p[opno] = 0;
417: for (i = 0; i < XVECLEN (part, 2); i++)
418: scan_operands (XVECEXP (part, 2, i), 0, 0);
419: return;
420: }
421:
1.1 root 422: if (code == MATCH_DUP)
423: {
424: ++num_dups;
425: return;
426: }
427:
428: if (code == ADDRESS)
429: {
1.1.1.2 root 430: scan_operands (XEXP (part, 0), 1, 0);
431: return;
432: }
433:
434: if (code == STRICT_LOW_PART)
435: {
436: scan_operands (XEXP (part, 0), 0, 1);
1.1 root 437: return;
438: }
439:
440: format_ptr = GET_RTX_FORMAT (GET_CODE (part));
441:
442: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (part)); i++)
443: switch (*format_ptr++)
444: {
445: case 'e':
1.1.1.2 root 446: scan_operands (XEXP (part, i), 0, 0);
1.1 root 447: break;
448: case 'E':
449: if (XVEC (part, i) != NULL)
450: for (j = 0; j < XVECLEN (part, i); j++)
1.1.1.2 root 451: scan_operands (XVECEXP (part, i, j), 0, 0);
1.1 root 452: break;
453: }
454: }
455:
1.1.1.2 root 456: /* Look at a define_insn just read. Assign its code number.
1.1 root 457: Record on insn_data the template and the number of arguments.
1.1.1.2 root 458: If the insn has a hairy output action, output a function for now. */
1.1 root 459:
460: void
461: gen_insn (insn)
462: rtx insn;
463: {
464: register struct data *d = (struct data *) xmalloc (sizeof (struct data));
465: register int i;
466:
467: d->code_number = next_code_number++;
468: if (XSTR (insn, 0)[0])
469: d->name = XSTR (insn, 0);
470: else
471: d->name = 0;
472:
473: /* Build up the list in the same order as the insns are seen
474: in the machine description. */
475: d->next = 0;
476: if (end_of_insn_data)
477: end_of_insn_data->next = d;
478: else
479: insn_data = d;
480:
481: end_of_insn_data = d;
482:
483: max_opno = -1;
484: num_dups = 0;
485:
1.1.1.2 root 486: mybzero (constraints, sizeof constraints);
1.1.1.5 root 487: mybzero (op_n_alternatives, sizeof op_n_alternatives);
1.1.1.2 root 488: mybzero (predicates, sizeof predicates);
489: mybzero (address_p, sizeof address_p);
490: mybzero (modes, sizeof modes);
491: mybzero (strict_low, sizeof strict_low);
1.1 root 492: for (i = 0; i < XVECLEN (insn, 1); i++)
1.1.1.2 root 493: scan_operands (XVECEXP (insn, 1, i), 0, 0);
1.1 root 494: d->n_operands = max_opno + 1;
495: d->n_dups = num_dups;
1.1.1.2 root 496: mybcopy (constraints, d->constraints, sizeof constraints);
1.1.1.5 root 497: mybcopy (op_n_alternatives, d->op_n_alternatives, sizeof op_n_alternatives);
1.1.1.2 root 498: mybcopy (predicates, d->predicates, sizeof predicates);
499: mybcopy (address_p, d->address_p, sizeof address_p);
500: mybcopy (modes, d->modes, sizeof modes);
501: mybcopy (strict_low, d->strict_low, sizeof strict_low);
1.1.1.4 root 502: d->machine_info = XSTR (insn, 4);
1.1 root 503:
504: /* We need to consider only the instructions whose assembler code template
505: starts with a *. These are the ones where the template is really
506: C code to run to decide on a template to use.
507: So for all others just return now. */
508:
509: if (XSTR (insn, 3)[0] != '*')
510: {
511: d->template = XSTR (insn, 3);
1.1.1.2 root 512: d->outfun = 0;
1.1 root 513: return;
514: }
515:
516: d->template = 0;
1.1.1.2 root 517: d->outfun = 1;
518:
519: printf ("\nchar *\n");
520: printf ("output_%d (operands, insn)\n", d->code_number);
521: printf (" rtx *operands;\n");
522: printf (" rtx insn;\n");
523: printf ("{\n");
524: /* The following is done in a funny way to get around problems in
525: VAX-11 "C" on VMS. It is the equivalent of:
526: printf ("%s\n", &(XSTR (insn, 3)[1])); */
527: {
528: register char *cp = &(XSTR (insn, 3)[1]);
529: while (*cp) putchar (*cp++);
530: putchar ('\n');
531: }
532: printf ("}\n");
1.1 root 533: }
534:
1.1.1.2 root 535: /* Look at a define_peephole just read. Assign its code number.
536: Record on insn_data the template and the number of arguments.
537: If the insn has a hairy output action, output it now. */
538:
539: void
540: gen_peephole (peep)
541: rtx peep;
542: {
543: register struct data *d = (struct data *) xmalloc (sizeof (struct data));
544: register int i;
545:
546: d->code_number = next_code_number++;
547: d->name = 0;
548:
549: /* Build up the list in the same order as the insns are seen
550: in the machine description. */
551: d->next = 0;
552: if (end_of_insn_data)
553: end_of_insn_data->next = d;
554: else
555: insn_data = d;
556:
557: end_of_insn_data = d;
558:
559: max_opno = -1;
560: mybzero (constraints, sizeof constraints);
1.1.1.5 root 561: mybzero (op_n_alternatives, sizeof op_n_alternatives);
1.1.1.2 root 562:
563: /* Get the number of operands by scanning all the
564: patterns of the peephole optimizer.
565: But ignore all the rest of the information thus obtained. */
566: for (i = 0; i < XVECLEN (peep, 0); i++)
567: scan_operands (XVECEXP (peep, 0, i), 0, 0);
568:
569: d->n_operands = max_opno + 1;
570: d->n_dups = 0;
571: mybcopy (constraints, d->constraints, sizeof constraints);
1.1.1.5 root 572: mybcopy (op_n_alternatives, d->op_n_alternatives, sizeof op_n_alternatives);
1.1.1.2 root 573: mybzero (d->predicates, sizeof predicates);
574: mybzero (d->address_p, sizeof address_p);
575: mybzero (d->modes, sizeof modes);
576: mybzero (d->strict_low, sizeof strict_low);
1.1.1.4 root 577: d->machine_info = XSTR (peep, 3);
1.1.1.2 root 578:
579: /* We need to consider only the instructions whose assembler code template
580: starts with a *. These are the ones where the template is really
581: C code to run to decide on a template to use.
582: So for all others just return now. */
583:
584: if (XSTR (peep, 2)[0] != '*')
585: {
586: d->template = XSTR (peep, 2);
587: d->outfun = 0;
588: return;
589: }
590:
591: d->template = 0;
592: d->outfun = 1;
593:
594: printf ("\nchar *\n");
595: printf ("output_%d (operands, insn)\n", d->code_number);
596: printf (" rtx *operands;\n");
597: printf (" rtx insn;\n");
598: printf ("{\n");
599: printf ("%s\n", &(XSTR (peep, 2)[1]));
600: printf ("}\n");
601: }
602:
603: /* Process a define_expand just read. Assign its code number,
604: only for the purposes of `insn_gen_function'. */
605:
606: void
607: gen_expand (insn)
608: rtx insn;
609: {
610: register struct data *d = (struct data *) xmalloc (sizeof (struct data));
611: register int i;
612:
613: d->code_number = next_code_number++;
614: if (XSTR (insn, 0)[0])
615: d->name = XSTR (insn, 0);
616: else
617: d->name = 0;
618:
619: /* Build up the list in the same order as the insns are seen
620: in the machine description. */
621: d->next = 0;
622: if (end_of_insn_data)
623: end_of_insn_data->next = d;
624: else
625: insn_data = d;
626:
627: end_of_insn_data = d;
628:
629: max_opno = -1;
630: num_dups = 0;
631:
632: /* Scan the operands to get the specified predicates and modes,
633: since expand_binop needs to know them. */
634:
635: mybzero (predicates, sizeof predicates);
636: mybzero (modes, sizeof modes);
637: if (XVEC (insn, 1))
638: for (i = 0; i < XVECLEN (insn, 1); i++)
639: scan_operands (XVECEXP (insn, 1, i), 0, 0);
640: d->n_operands = max_opno + 1;
641: mybcopy (predicates, d->predicates, sizeof predicates);
642: mybcopy (modes, d->modes, sizeof modes);
643:
644: mybzero (d->constraints, sizeof constraints);
1.1.1.5 root 645: mybzero (d->op_n_alternatives, sizeof op_n_alternatives);
1.1.1.2 root 646: mybzero (d->address_p, sizeof address_p);
647: mybzero (d->strict_low, sizeof strict_low);
648:
649: d->n_dups = 0;
650: d->template = 0;
651: d->outfun = 0;
1.1.1.4 root 652: d->machine_info = 0;
1.1.1.2 root 653: }
654:
655: int
1.1 root 656: xmalloc (size)
657: {
658: register int val = malloc (size);
659:
660: if (val == 0)
1.1.1.2 root 661: fatal ("virtual memory exhausted");
1.1 root 662: return val;
663: }
664:
665: int
666: xrealloc (ptr, size)
667: char *ptr;
668: int size;
669: {
670: int result = realloc (ptr, size);
671: if (!result)
1.1.1.2 root 672: fatal ("virtual memory exhausted");
1.1 root 673: return result;
674: }
675:
676: void
1.1.1.2 root 677: mybzero (b, length)
678: register char *b;
679: register int length;
680: {
681: while (length-- > 0)
682: *b++ = 0;
683: }
684:
685: void
686: mybcopy (b1, b2, length)
687: register char *b1;
688: register char *b2;
689: register int length;
690: {
691: while (length-- > 0)
692: *b2++ = *b1++;
693: }
694:
695: void
1.1 root 696: fatal (s, a1, a2)
697: {
1.1.1.2 root 698: fprintf (stderr, "genoutput: ");
1.1 root 699: fprintf (stderr, s, a1, a2);
700: fprintf (stderr, "\n");
1.1.1.2 root 701: exit (FATAL_EXIT_CODE);
1.1 root 702: }
1.1.1.6 root 703:
704: void
705: error (s, a1, a2)
706: {
707: fprintf (stderr, "genoutput: ");
708: fprintf (stderr, s, a1, a2);
709: fprintf (stderr, "\n");
710: }
1.1 root 711:
1.1.1.2 root 712: int
1.1 root 713: main (argc, argv)
714: int argc;
715: char **argv;
716: {
717: rtx desc;
718: FILE *infile;
719: extern rtx read_rtx ();
720: register int c;
721:
1.1.1.2 root 722: obstack_init (rtl_obstack);
1.1 root 723:
724: if (argc <= 1)
725: fatal ("No input file name.");
726:
727: infile = fopen (argv[1], "r");
728: if (infile == 0)
729: {
730: perror (argv[1]);
1.1.1.2 root 731: exit (FATAL_EXIT_CODE);
1.1 root 732: }
733:
734: init_rtl ();
735:
736: output_prologue ();
737: next_code_number = 0;
738: have_constraints = 0;
739:
740: /* Read the machine description. */
741:
742: while (1)
743: {
744: c = read_skip_spaces (infile);
745: if (c == EOF)
746: break;
747: ungetc (c, infile);
748:
749: desc = read_rtx (infile);
1.1.1.2 root 750: if (GET_CODE (desc) == DEFINE_INSN)
751: gen_insn (desc);
752: if (GET_CODE (desc) == DEFINE_PEEPHOLE)
753: gen_peephole (desc);
754: if (GET_CODE (desc) == DEFINE_EXPAND)
755: gen_expand (desc);
1.1 root 756: }
757:
758: output_epilogue ();
759:
1.1.1.2 root 760: fflush (stdout);
761: exit (ferror (stdout) != 0 ? FATAL_EXIT_CODE : SUCCESS_EXIT_CODE);
1.1 root 762: }
1.1.1.5 root 763:
764: int
765: n_occurrences (c, s)
766: char c;
767: char *s;
768: {
769: int n = 0;
770: while (*s)
771: n += (*s++ == c);
772: return n;
773: }
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