--- gcc/ginclude/va-mips.h	2018/04/24 18:23:46	1.1
+++ gcc/ginclude/va-mips.h	2018/04/24 18:31:30	1.1.1.2
@@ -7,7 +7,7 @@
 /* ---------------------------------------- */
 
 
-/* These macros implement varargs for GNU C--either traditional or ANSU.  */
+/* These macros implement varargs for GNU C--either traditional or ANSI.  */
 
 /* Define __gnuc_va_list.  */
 
@@ -29,7 +29,7 @@ typedef char * __gnuc_va_list;
 #define __va_ellipsis
 #endif
 
-#if __mips==3
+#ifdef __mips64
 #define __va_rounded_size(__TYPE)  \
   (((sizeof (__TYPE) + 8 - 1) / 8) * 8)
 #else
@@ -37,45 +37,57 @@ typedef char * __gnuc_va_list;
   (((sizeof (__TYPE) + sizeof (int) - 1) / sizeof (int)) * sizeof (int))
 #endif
 
+/* Get definitions for _MIPS_SIM_ABI64 etc.  */
+#ifdef _MIPS_SIM
+#include <sgidefs.h>
+#endif
+
 #ifdef _STDARG_H
 #define va_start(__AP, __LASTARG) \
   (__AP = (__gnuc_va_list) __builtin_next_arg (__LASTARG))
 
 #else
 #define va_alist  __builtin_va_alist
-#if __mips==3
+#ifdef __mips64
 /* This assumes that `long long int' is always a 64 bit type.  */
 #define va_dcl    long long int __builtin_va_alist; __va_ellipsis
 #else
 #define va_dcl    int __builtin_va_alist; __va_ellipsis
 #endif
+/* Need alternate code for _MIPS_SIM_ABI64.  */
+#if defined(_MIPS_SIM) && (_MIPS_SIM == _MIPS_SIM_ABI64)
+#define va_start(__AP)							\
+  (__AP = (__gnuc_va_list) __builtin_next_arg ()			\
+   + (__builtin_args_info (2) >= 8 ? -8 : 0))
+#else
 #define va_start(__AP)  __AP = (char *) &__builtin_va_alist
 #endif
+#endif
 
 #ifndef va_end
 void va_end (__gnuc_va_list);		/* Defined in libgcc.a */
 #endif
-#define va_end(__AP)
+#define va_end(__AP)	((void)0)
 
 /* We cast to void * and then to TYPE * because this avoids
    a warning about increasing the alignment requirement.  */
-/* The __mips==3 cases are reversed from the 32 bit cases, because the standard
+/* The __mips64 cases are reversed from the 32 bit cases, because the standard
    32 bit calling convention left-aligns all parameters smaller than a word,
-   whereas the __mips==3 calling convention does not (and hence they are
+   whereas the __mips64 calling convention does not (and hence they are
    right aligned).  */
-#if __mips==3
+#ifdef __mips64
 #ifdef __MIPSEB__
 #define va_arg(__AP, __type)                                    \
-  ((__type *) (void *) (__AP = (char *) ((((int)__AP + 8 - 1) & -8) \
+  ((__type *) (void *) (__AP = (char *) ((((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8) \
 					 + __va_rounded_size (__type))))[-1]
 #else
 #define va_arg(__AP, __type)                                    \
-  ((__AP = (char *) ((((int)__AP + 8 - 1) & -8)			\
+  ((__AP = (char *) ((((__PTRDIFF_TYPE__)__AP + 8 - 1) & -8)	\
 		     + __va_rounded_size (__type))),		\
    *(__type *) (void *) (__AP - __va_rounded_size (__type)))
 #endif
 
-#else /* not __mips==3 */
+#else /* not __mips64 */
 
 #ifdef __MIPSEB__
 /* For big-endian machines.  */