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1.1 root 1: /* Procedure integration for GNU CC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
1.1.1.12 root 7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
1.1 root 12: GNU CC is distributed in the hope that it will be useful,
1.1.1.12 root 13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
1.1 root 20:
21:
22: #include <stdio.h>
23:
24: #include "config.h"
25: #include "rtl.h"
26: #include "tree.h"
27: #include "flags.h"
28: #include "insn-flags.h"
29: #include "expr.h"
30:
31: #include "obstack.h"
32: #define obstack_chunk_alloc xmalloc
33: #define obstack_chunk_free free
34: extern int xmalloc ();
35: extern void free ();
36:
37: extern struct obstack permanent_obstack, maybepermanent_obstack;
38: extern struct obstack *rtl_obstack, *saveable_obstack, *current_obstack;
39:
1.1.1.14 root 40: extern rtx stack_slot_list;
41:
1.1 root 42: #define MIN(x,y) ((x < y) ? x : y)
43:
44: extern tree pushdecl ();
1.1.1.14 root 45: extern tree poplevel ();
1.1.1.5 root 46:
47: /* Default max number of insns a function can have and still be inline.
48: This is overridden on RISC machines. */
49: #ifndef INTEGRATE_THRESHOLD
50: #define INTEGRATE_THRESHOLD(DECL) \
1.1.1.14 root 51: (8 * (8 + list_length (DECL_ARGUMENTS (DECL))))
1.1.1.5 root 52: #endif
1.1 root 53:
54: /* This is the target of the inline function being expanded,
55: or NULL if there is none. */
56: static rtx inline_target;
57:
58: /* We must take special care not to disrupt life too severely
59: when performing procedure integration. One thing that that
60: involves is not creating illegitimate address which reload
61: cannot fix. Since we don't know what the frame pointer is
62: not capable of (in a machine independent way), we create
63: a pseudo-frame pointer which will have to do for now. */
64: static rtx inline_fp_rtx;
65:
66: /* Convert old frame-pointer offsets to new. Parameters which only
67: produce values (no addresses, and are never assigned), map directly
68: to the pseudo-reg of the incoming value. Parameters that are
69: assigned to but do not have their address taken are given a fresh
70: pseudo-register. Parameters that have their address take are
71: given a fresh stack-slot. */
72: static rtx *parm_map;
73:
74: /* ?? Should this be done here?? It is not right now.
75: Keep track of whether a given pseudo-register is the sum
76: of the frame pointer and a const_int (or zero). */
77: static char *fp_addr_p;
78:
79: /* For the local variables of the procdure being integrated that live
80: on the frame, FRAME_POINTER_DELTA says how much to change their
81: offsets by, so that they now live in the correct place on the
82: frame of the function being compiled. */
83: static int fp_delta;
84:
1.1.1.11 root 85: /* When an insn is being copied by copy_rtx_and_substitute,
86: this is nonzero if we have copied an ASM_OPERANDS.
87: In that case, it is the original input-operand vector.
88: Likewise in copy_for_inline. */
89: static rtvec orig_asm_operands_vector;
90:
91: /* When an insn is being copied by copy_rtx_and_substitute,
92: this is nonzero if we have copied an ASM_OPERANDS.
93: In that case, it is the copied input-operand vector.
94: Likewise in copy_for_inline. */
95: static rtvec copy_asm_operands_vector;
96:
1.1.1.14 root 97: /* Likewise, this is the copied constraints vector. */
98: static rtvec copy_asm_constraints_vector;
99:
1.1 root 100: /* Return a copy of an rtx (as needed), substituting pseudo-register,
101: labels, and frame-pointer offsets as necessary. */
102: static rtx copy_rtx_and_substitute ();
1.1.1.7 root 103: /* Variant, used for memory addresses that are not memory_address_p. */
104: static rtx copy_address ();
1.1 root 105:
1.1.1.14 root 106: /* Return the rtx corresponding to a given index in the stack arguments. */
107: static rtx access_parm_map ();
108:
1.1 root 109: static void copy_parm_decls ();
110: static void copy_decl_tree ();
111:
112: static rtx try_fold_cc0 ();
113:
114: /* We do some simple constant folding optimization. This optimization
115: really exists primarily to save time inlining a function. It
1.1.1.5 root 116: also helps users who ask for inline functions without -O. */
1.1 root 117: static rtx fold_out_const_cc0 ();
118:
119: /* Zero if the current function (whose FUNCTION_DECL is FNDECL)
120: is safe and reasonable to integrate into other functions.
121: Nonzero means value is a warning message with a single %s
122: for the function's name. */
123:
124: char *
125: function_cannot_inline_p (fndecl)
126: register tree fndecl;
127: {
128: register rtx insn;
129: tree last = tree_last (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1.1.1.5 root 130: int max_insns = INTEGRATE_THRESHOLD (fndecl);
1.1 root 131: register int ninsns = 0;
132: register tree parms;
133:
134: /* No inlines with varargs. `grokdeclarator' gives a warning
135: message about that if `inline' is specified. This code
136: it put in to catch the volunteers. */
137: if (last && TREE_VALUE (last) != void_type_node)
1.1.1.7 root 138: return "varargs function cannot be inline";
1.1 root 139:
1.1.1.15! root 140: if (current_function_calls_alloca)
! 141: return "function using alloca cannot be inline";
! 142:
1.1 root 143: /* If its not even close, don't even look. */
1.1.1.14 root 144: if (!TREE_INLINE (fndecl) && get_max_uid () > 3 * max_insns)
1.1.1.7 root 145: return "function too large to be inline";
1.1 root 146:
1.1.1.14 root 147: /* We can't inline functions that return structures
148: the old-fashioned PCC way, copying into a static block. */
149: #ifdef PCC_STATIC_STRUCT_RETURN
150: if (flag_pcc_struct_return
151: && (TYPE_MODE (TREE_TYPE (TREE_TYPE (fndecl))) == BLKmode
152: || RETURN_IN_MEMORY (TREE_TYPE (TREE_TYPE (fndecl)))))
1.1.1.13 root 153: return "inline functions not supported for this return value type";
1.1.1.11 root 154: #endif
155:
1.1 root 156: /* Don't inline functions which have BLKmode arguments.
157: Don't inline functions that take the address of
158: a parameter and do not specify a function prototype. */
159: for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
160: {
161: if (TYPE_MODE (TREE_TYPE (parms)) == BLKmode)
1.1.1.7 root 162: return "function with large aggregate parameter cannot be inline";
1.1 root 163: if (last == NULL_TREE && TREE_ADDRESSABLE (parms))
1.1.1.7 root 164: return "no prototype, and parameter address used; cannot be inline";
1.1.1.11 root 165: /* If an aggregate is thought of as "in memory"
166: then its components are referred to by narrower memory refs.
167: If the actual parameter is a reg, these refs can't be translated,
168: esp. since copy_rtx_and_substitute doesn't know whether it is
169: reading or writing. */
170: if ((TREE_CODE (TREE_TYPE (parms)) == RECORD_TYPE
171: || TREE_CODE (TREE_TYPE (parms)) == UNION_TYPE)
172: && GET_CODE (DECL_RTL (parms)) == MEM)
173: return "address of an aggregate parameter is used; cannot be inline";
1.1 root 174: }
175:
1.1.1.14 root 176: if (!TREE_INLINE (fndecl) && get_max_uid () > max_insns)
1.1 root 177: {
178: for (ninsns = 0, insn = get_first_nonparm_insn (); insn && ninsns < max_insns;
179: insn = NEXT_INSN (insn))
180: {
181: if (GET_CODE (insn) == INSN
182: || GET_CODE (insn) == JUMP_INSN
183: || GET_CODE (insn) == CALL_INSN)
184: ninsns++;
185: }
186:
187: if (ninsns >= max_insns)
1.1.1.7 root 188: return "function too large to be inline";
1.1 root 189: }
190:
191: return 0;
192: }
193:
194: /* Variables used within save_for_inline. */
195:
196: /* Mapping from old pesudo-register to new pseudo-registers.
197: The first element of this map is reg_map[FIRST_PSEUDO_REGISTER].
1.1.1.6 root 198: It is allocated in `save_for_inline' and `expand_inline_function',
1.1 root 199: and deallocated on exit from each of those routines. */
200: static rtx *reg_map;
201:
202: /* Mapping from old code-labels to new code-labels.
203: The first element of this map is label_map[min_labelno].
1.1.1.6 root 204: It is allocated in `save_for_inline' and `expand_inline_function',
1.1 root 205: and deallocated on exit from each of those routines. */
206: static rtx *label_map;
207:
1.1.1.6 root 208: /* Mapping from old insn uid's to copied insns.
209: It is allocated in `save_for_inline' and `expand_inline_function',
210: and deallocated on exit from each of those routines. */
211: static rtx *insn_map;
212:
1.1 root 213: /* Map pseudo reg number into the PARM_DECL for the parm living in the reg.
214: Zero for a reg that isn't a parm's home.
215: Only reg numbers less than max_parm_reg are mapped here. */
216: static tree *parmdecl_map;
217:
218: /* Keep track of first pseudo-register beyond those that are parms. */
219: static int max_parm_reg;
220:
1.1.1.7 root 221: /* Offset from arg ptr to the first parm of this inline function. */
222: static int first_parm_offset;
223:
1.1 root 224: /* On machines that perform a function return with a single
225: instruction, such as the VAX, these return insns must be
226: mapped into branch statements. */
227: extern rtx return_label;
228:
229: /* Copy an rtx for save_for_inline. */
230: static rtx copy_for_inline ();
231:
232: /* Make the insns and PARM_DECLs of the current function permanent
233: and record other information in DECL_SAVED_INSNS to allow inlining
234: of this function in subsequent calls. */
235:
236: void
237: save_for_inline (fndecl)
238: tree fndecl;
239: {
240: extern rtx *regno_reg_rtx; /* in emit-rtl.c. */
241: extern current_function_args_size;
242:
243: rtx first_insn, last_insn, insn;
244: rtx head, copy;
245: tree parms;
246: int max_labelno, min_labelno, i, len;
247: int max_reg;
1.1.1.6 root 248: int max_uid;
1.1 root 249:
250: /* Make and emit a return-label if we have not already done so. */
251:
252: if (return_label == 0)
253: {
254: return_label = gen_label_rtx ();
255: emit_label (return_label);
256: }
257:
258: /* Get some bounds on the labels and registers used. */
259:
260: max_labelno = max_label_num ();
261: min_labelno = get_first_label_num ();
262: max_parm_reg = max_parm_reg_num ();
263: max_reg = max_reg_num ();
264:
265: /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
266:
267: Set TREE_VOLATILE to 0 if the parm is in a register, otherwise 1.
268: Later we set TREE_READONLY to 0 if the parm is modified inside the fn. */
269:
270: parmdecl_map = (tree *) alloca (max_parm_reg * sizeof (tree));
1.1.1.3 root 271: bzero (parmdecl_map, max_parm_reg * sizeof (tree));
1.1 root 272:
273: for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
274: {
275: rtx p = DECL_RTL (parms);
276:
277: if (GET_CODE (p) == REG)
278: {
279: parmdecl_map[REGNO (p)] = parms;
280: TREE_VOLATILE (parms) = 0;
281: }
282: else
283: TREE_VOLATILE (parms) = 1;
284: TREE_READONLY (parms) = 1;
285: }
286:
287: /* The list of DECL_SAVES_INSNS, starts off with a header which
288: contains the following information:
289:
290: the first insn of the function (not including the insns that copy
291: parameters into registers).
292: the first label used by that function,
293: the last label used by that function,
294: and the total number of registers used. */
295:
296: head = gen_inline_header_rtx (NULL, NULL, min_labelno, max_labelno,
297: max_parm_reg, max_reg,
1.1.1.14 root 298: current_function_args_size, stack_slot_list);
1.1.1.6 root 299: max_uid = INSN_UID (head);
1.1 root 300:
301: /* We have now allocated all that needs to be allocated permanently
302: on the rtx obstack. Set our high-water mark, so that we
303: can free the rest of this when the time comes. */
304:
305: preserve_data ();
306:
307: /* Copy the chain insns of this function.
308: Install the copied chain as the insns of this function,
309: for continued compilation;
310: the original chain is recorded as the DECL_SAVED_INSNS
311: for inlining future calls. */
312:
313: /* If there are insns that copy parms from the stack into pseudo registers,
314: those insns are not copied. `expand_inline_function' must
315: emit the correct code to handle such things. */
316:
317: insn = get_insns ();
318: if (GET_CODE (insn) != NOTE)
319: abort ();
320: first_insn = rtx_alloc (NOTE);
321: NOTE_SOURCE_FILE (first_insn) = NOTE_SOURCE_FILE (insn);
322: NOTE_LINE_NUMBER (first_insn) = NOTE_LINE_NUMBER (insn);
323: INSN_UID (first_insn) = INSN_UID (insn);
324: PREV_INSN (first_insn) = NULL;
325: NEXT_INSN (first_insn) = NULL;
326: last_insn = first_insn;
327:
328: /* Each pseudo-reg in the old insn chain must have a unique rtx in the copy.
329: Make these new rtx's now, and install them in regno_reg_rtx, so they
330: will be the official pseudo-reg rtx's for the rest of compilation. */
331:
332: reg_map = (rtx *) alloca ((max_reg + 1) * sizeof (rtx));
333:
334: len = sizeof (struct rtx_def) + (GET_RTX_LENGTH (REG) - 1) * sizeof (rtunion);
335: for (i = max_reg - 1; i >= FIRST_PSEUDO_REGISTER; i--)
336: reg_map[i] = (rtx)obstack_copy (&maybepermanent_obstack, regno_reg_rtx[i], len);
337: bcopy (reg_map + FIRST_PSEUDO_REGISTER,
338: regno_reg_rtx + FIRST_PSEUDO_REGISTER,
1.1.1.7 root 339: (max_reg - FIRST_PSEUDO_REGISTER) * sizeof (rtx));
1.1 root 340:
341: /* Likewise each label rtx must have a unique rtx as its copy. */
342:
343: label_map = (rtx *)alloca ((max_labelno - min_labelno) * sizeof (rtx));
344: label_map -= min_labelno;
345:
346: for (i = min_labelno; i < max_labelno; i++)
347: label_map[i] = gen_label_rtx ();
348:
1.1.1.6 root 349: /* Record the mapping of old insns to copied insns. */
350:
351: insn_map = (rtx *) alloca (max_uid * sizeof (rtx));
352: bzero (insn_map, max_uid * sizeof (rtx));
353:
1.1 root 354: /* Now copy the chain of insns. */
355:
356: for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
357: {
1.1.1.11 root 358: orig_asm_operands_vector = 0;
359: copy_asm_operands_vector = 0;
360:
1.1 root 361: switch (GET_CODE (insn))
362: {
363: case NOTE:
1.1.1.15! root 364: /* No need to keep these. */
! 365: if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
1.1.1.7 root 366: continue;
367:
1.1 root 368: copy = rtx_alloc (NOTE);
369: NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
370: NOTE_LINE_NUMBER (copy) = NOTE_LINE_NUMBER (insn);
371: break;
372:
373: case INSN:
374: case CALL_INSN:
375: case JUMP_INSN:
376: copy = rtx_alloc (GET_CODE (insn));
377: PATTERN (copy) = copy_for_inline (PATTERN (insn));
378: INSN_CODE (copy) = -1;
379: LOG_LINKS (copy) = NULL;
380: REG_NOTES (copy) = copy_for_inline (REG_NOTES (insn));
1.1.1.14 root 381: RTX_INTEGRATED_P (copy) = RTX_INTEGRATED_P (insn);
1.1 root 382: break;
383:
384: case CODE_LABEL:
385: copy = label_map[CODE_LABEL_NUMBER (insn)];
386: break;
387:
388: case BARRIER:
389: copy = rtx_alloc (BARRIER);
390: break;
391:
392: default:
393: abort ();
394: }
395: INSN_UID (copy) = INSN_UID (insn);
1.1.1.6 root 396: insn_map[INSN_UID (insn)] = copy;
1.1 root 397: NEXT_INSN (last_insn) = copy;
398: PREV_INSN (copy) = last_insn;
399: last_insn = copy;
400: }
401:
402: NEXT_INSN (last_insn) = NULL;
403:
404: NEXT_INSN (head) = get_first_nonparm_insn ();
405: FIRST_PARM_INSN (head) = get_insns ();
406: DECL_SAVED_INSNS (fndecl) = head;
407: DECL_FRAME_SIZE (fndecl) = get_frame_size ();
408: TREE_INLINE (fndecl) = 1;
409:
410: parmdecl_map = 0;
411: label_map = 0;
412: reg_map = 0;
413: return_label = 0;
414:
415: set_new_first_and_last_insn (first_insn, last_insn);
416: }
417:
418: /* Copy the rtx ORIG recursively, replacing pseudo-regs and labels
419: according to `reg_map' and `label_map'.
420: All other kinds of rtx are copied except those that can never be
421: changed during compilation. */
422:
423: static rtx
424: copy_for_inline (orig)
425: rtx orig;
426: {
427: register rtx x = orig;
428: register int i;
429: register enum rtx_code code;
430: register char *format_ptr;
431:
432: if (x == 0)
433: return x;
434:
435: code = GET_CODE (x);
436:
437: /* These types may be freely shared. */
438:
439: switch (code)
440: {
441: case QUEUED:
442: case CONST_INT:
443: case CONST_DOUBLE:
444: case SYMBOL_REF:
445: case PC:
446: case CC0:
447: return x;
448:
1.1.1.11 root 449: case ASM_OPERANDS:
450: /* If a single asm insn contains multiple output operands
451: then it contains multiple ASM_OPERANDS rtx's that share operand 3.
452: We must make sure that the copied insn continues to share it. */
453: if (orig_asm_operands_vector == XVEC (orig, 3))
454: {
455: x = rtx_alloc (ASM_OPERANDS);
456: XSTR (x, 0) = XSTR (orig, 0);
457: XSTR (x, 1) = XSTR (orig, 1);
458: XINT (x, 2) = XINT (orig, 2);
459: XVEC (x, 3) = copy_asm_operands_vector;
1.1.1.14 root 460: XVEC (x, 4) = copy_asm_constraints_vector;
461: XSTR (x, 5) = XSTR (orig, 5);
462: XINT (x, 6) = XINT (orig, 6);
1.1.1.11 root 463: return x;
464: }
465: break;
466:
1.1 root 467: case MEM:
468: /* A MEM is allowed to be shared if its address is constant
469: or is a constant plus one of the special registers. */
470: if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
471: return x;
1.1.1.14 root 472: #if 0 /* This is turned off because it is possible for
473: unshare_all_rtl to copy the address, into memory that won't be saved.
474: Although the MEM can safely be shared, and won't be copied there,
475: the address itself cannot be shared, and may need to be copied. */
1.1 root 476: if (GET_CODE (XEXP (x, 0)) == PLUS
477: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
478: && (REGNO (XEXP (XEXP (x, 0), 0)) == FRAME_POINTER_REGNUM
479: || REGNO (XEXP (XEXP (x, 0), 0)) == ARG_POINTER_REGNUM)
480: && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1.1.1.14 root 481: #if 0
482: /* This statement was accidentally deleted in the remote past.
483: Reinsert it for 1.37. Don't take the risk now. */
484: return x;
485: #endif
1.1 root 486: if (GET_CODE (XEXP (x, 0)) == REG
487: && (REGNO (XEXP (x, 0)) == FRAME_POINTER_REGNUM
488: || REGNO (XEXP (x, 0)) == ARG_POINTER_REGNUM)
489: && CONSTANT_ADDRESS_P (XEXP (x, 1)))
490: return x;
1.1.1.14 root 491: #endif /* 0 */
1.1 root 492: break;
493:
494: case LABEL_REF:
495: {
496: /* Must point to the new insn. */
497: return gen_rtx (LABEL_REF, GET_MODE (orig),
498: label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))]);
499: }
500:
501: case REG:
502: if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
503: return reg_map [REGNO (x)];
504: else
505: return x;
506:
507: /* If a parm that gets modified lives in a pseudo-reg,
508: set its TREE_VOLATILE to prevent certain optimizations. */
509: case SET:
510: {
511: rtx dest = SET_DEST (x);
512:
513: if (GET_CODE (dest) == REG
514: && REGNO (dest) < max_parm_reg
1.1.1.3 root 515: && REGNO (dest) >= FIRST_PSEUDO_REGISTER
516: && parmdecl_map[REGNO (dest)] != 0)
1.1 root 517: TREE_READONLY (parmdecl_map[REGNO (dest)]) = 0;
518: }
519: break;
520: }
521:
522: /* Replace this rtx with a copy of itself. */
523:
524: x = rtx_alloc (code);
1.1.1.15! root 525: bcopy (orig, x, (sizeof (*x) - sizeof (x->fld)
! 526: + sizeof (x->fld[0]) * GET_RTX_LENGTH (code)));
1.1 root 527:
528: /* Now scan the subexpressions recursively.
529: We can store any replaced subexpressions directly into X
530: since we know X is not shared! Any vectors in X
531: must be copied if X was copied. */
532:
533: format_ptr = GET_RTX_FORMAT (code);
534:
535: for (i = 0; i < GET_RTX_LENGTH (code); i++)
536: {
537: switch (*format_ptr++)
538: {
539: case 'e':
540: XEXP (x, i) = copy_for_inline (XEXP (x, i));
541: break;
542:
1.1.1.6 root 543: case 'u':
544: /* Change any references to old-insns to point to the
545: corresponding copied insns. */
1.1.1.15! root 546: XEXP (x, i) = insn_map[INSN_UID (XEXP (x, i))];
! 547: break;
1.1.1.6 root 548:
1.1 root 549: case 'E':
1.1.1.6 root 550: if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
1.1 root 551: {
552: register int j;
553:
554: XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
555: for (j = 0; j < XVECLEN (x, i); j++)
556: XVECEXP (x, i, j)
557: = copy_for_inline (XVECEXP (x, i, j));
558: }
559: break;
560: }
561: }
1.1.1.11 root 562:
563: if (code == ASM_OPERANDS && orig_asm_operands_vector == 0)
564: {
565: orig_asm_operands_vector = XVEC (orig, 3);
566: copy_asm_operands_vector = XVEC (x, 3);
1.1.1.14 root 567: copy_asm_constraints_vector = XVEC (x, 4);
1.1.1.11 root 568: }
569:
1.1 root 570: return x;
571: }
572:
573: /* Integrate the procedure defined by FNDECL. Note that this function
574: may wind up calling itself. Since the static variables are not
575: reentrant, we do not assign them until after the possibility
576: or recursion is eliminated.
577:
578: If IGNORE is nonzero, do not produce a value.
579: Otherwise store the value in TARGET if it is nonzero and that is convenient.
580:
581: Value is:
582: (rtx)-1 if we could not substitute the function
583: 0 if we substituted it and it does not produce a value
584: else an rtx for where the value is stored. */
585:
586: rtx
587: expand_inline_function (fndecl, parms, target, ignore, type, structure_value_addr)
588: tree fndecl, parms;
589: rtx target;
590: int ignore;
591: tree type;
592: rtx structure_value_addr;
593: {
594: tree formal, actual;
595: rtx header = DECL_SAVED_INSNS (fndecl);
596: rtx insns = FIRST_FUNCTION_INSN (header);
1.1.1.15! root 597: rtx parm_insns = FIRST_PARM_INSN (header);
1.1.1.9 root 598: rtx insn;
1.1 root 599: int max_regno = MAX_REGNUM (header) + 1;
600: register int i;
601: int min_labelno = FIRST_LABELNO (header);
602: int max_labelno = LAST_LABELNO (header);
603: int nargs;
604: rtx *arg_vec;
1.1.1.9 root 605: rtx local_return_label = 0;
1.1 root 606: rtx follows_call = 0;
1.1.1.7 root 607: rtx this_struct_value_rtx = 0;
1.1 root 608:
609: if (max_regno < FIRST_PSEUDO_REGISTER)
1.1.1.3 root 610: abort ();
1.1 root 611:
612: nargs = list_length (DECL_ARGUMENTS (fndecl));
613:
614: /* We expect PARMS to have the right length; don't crash if not. */
615: if (list_length (parms) != nargs)
616: return (rtx)-1;
1.1.1.13 root 617: /* Also check that the parms type match. Since the appropriate
618: conversions or default promotions have already been applied,
619: the machine modes should match exactly. */
620: for (formal = DECL_ARGUMENTS (fndecl),
621: actual = parms;
622: formal;
623: formal = TREE_CHAIN (formal),
624: actual = TREE_CHAIN (actual))
625: {
626: tree arg = TREE_VALUE (actual);
627: enum machine_mode mode = TYPE_MODE (DECL_ARG_TYPE (formal));
628: if (mode != TYPE_MODE (TREE_TYPE (arg)))
629: return (rtx)-1;
630: /* If they are block mode, the types should match exactly. */
631: if (mode == BLKmode && TREE_TYPE (arg) != TREE_TYPE (formal))
632: return (rtx)-1;
633: }
1.1 root 634:
1.1.1.14 root 635: /* Make a binding contour to keep inline cleanups called at
636: outer function-scope level from looking like they are shadowing
637: parameter declarations. */
638: pushlevel (0);
639:
1.1 root 640: /* Make a fresh binding contour that we can easily remove. */
641: pushlevel (0);
642: expand_start_bindings (0);
1.1.1.15! root 643: if (GET_CODE (parm_insns) == NOTE
! 644: && NOTE_LINE_NUMBER (parm_insns) < 0)
! 645: emit_note (NOTE_SOURCE_FILE (parm_insns), NOTE_LINE_NUMBER (parm_insns));
1.1 root 646:
647: /* Get all the actual args as RTL, and store them in ARG_VEC. */
648:
649: arg_vec = (rtx *)alloca (nargs * sizeof (rtx));
650:
651: for (formal = DECL_ARGUMENTS (fndecl),
652: actual = parms,
653: i = 0;
654: formal;
655: formal = TREE_CHAIN (formal),
656: actual = TREE_CHAIN (actual),
657: i++)
658: {
1.1.1.14 root 659: /* Actual parameter, already converted to DECL_ARG_TYPE (formal). */
660: tree arg = TREE_VALUE (actual);
661: /* Mode of the value supplied. */
1.1.1.13 root 662: enum machine_mode tmode = TYPE_MODE (DECL_ARG_TYPE (formal));
1.1.1.14 root 663: /* Mode of the variable used within the function. */
1.1.1.13 root 664: enum machine_mode imode = TYPE_MODE (TREE_TYPE (formal));
1.1 root 665: rtx copy;
666:
1.1.1.7 root 667: emit_note (DECL_SOURCE_FILE (formal), DECL_SOURCE_LINE (formal));
1.1 root 668:
1.1.1.14 root 669: /* Make a place to hold the argument value, still in mode TMODE,
670: and put it in COPY. */
1.1 root 671: if (TREE_ADDRESSABLE (formal))
672: {
1.1.1.14 root 673: int size = int_size_in_bytes (DECL_ARG_TYPE (formal));
1.1 root 674: copy = assign_stack_local (tmode, size);
1.1.1.12 root 675: if (!memory_address_p (DECL_MODE (formal), XEXP (copy, 0)))
676: copy = change_address (copy, VOIDmode, copy_rtx (XEXP (copy, 0)));
1.1 root 677: store_expr (arg, copy, 0);
678: }
679: else if (! TREE_READONLY (formal)
680: || TREE_VOLATILE (formal))
681: {
682: /* If parm is modified or if it hasn't a pseudo reg,
683: we may not simply substitute the actual value;
684: copy it through a register. */
685: copy = gen_reg_rtx (tmode);
686: store_expr (arg, copy, 0);
687: }
688: else
689: {
690: copy = expand_expr (arg, 0, tmode, 0);
691:
692: /* We do not use CONSTANT_ADDRESS_P here because
693: the set of cases where that might make a difference
694: are a subset of the cases that arise even when
695: it is a CONSTANT_ADDRESS_P (i.e., fp_delta
696: gets into the act. */
697: if (GET_CODE (copy) != REG && ! CONSTANT_P (copy))
698: copy = copy_to_reg (copy);
699: }
1.1.1.13 root 700: /* If passed mode != nominal mode, COPY is now the passed mode.
701: Convert it to the nominal mode (i.e. truncate it). */
702: if (tmode != imode)
1.1.1.14 root 703: copy = convert_to_mode (imode, copy, 0);
1.1 root 704: arg_vec[i] = copy;
705: }
706:
707: copy_parm_decls (DECL_ARGUMENTS (fndecl), arg_vec);
708:
709: /* Perform postincrements before actually calling the function. */
710: emit_queue ();
711:
712: /* clean up stack so that variables might have smaller offsets. */
713: do_pending_stack_adjust ();
714:
715: /* Pass the function the address in which to return a structure value. */
716: if (structure_value_addr)
1.1.1.7 root 717: {
1.1.1.14 root 718: if (GET_CODE (structure_value_addr) == REG
719: && (struct_value_rtx == 0 || GET_CODE (struct_value_rtx) == MEM))
720: this_struct_value_rtx = structure_value_addr;
1.1.1.7 root 721: else
1.1.1.14 root 722: this_struct_value_rtx = copy_to_mode_reg (Pmode, structure_value_addr);
1.1.1.7 root 723: }
1.1 root 724:
725: /* Now prepare for copying the insns.
726: Set up reg_map, parm_map and label_map saying how to translate
727: the pseudo-registers, stack-parm references and labels when copying. */
728:
729: reg_map = (rtx *) alloca (max_regno * sizeof (rtx));
730: bzero (reg_map, max_regno * sizeof (rtx));
731:
1.1.1.15! root 732: parm_map = (rtx *)alloca ((FUNCTION_ARGS_SIZE (header) + UNITS_PER_WORD - 1)
! 733: / UNITS_PER_WORD * sizeof (rtx));
! 734: bzero (parm_map, ((FUNCTION_ARGS_SIZE (header) + UNITS_PER_WORD - 1)
! 735: / UNITS_PER_WORD * sizeof (rtx)));
1.1.1.14 root 736:
737: /* Note that expand_expr (called above) can clobber first_parm_offset. */
738: first_parm_offset = FIRST_PARM_OFFSET (fndecl);
739: parm_map -= first_parm_offset / UNITS_PER_WORD;
740:
1.1 root 741: if (DECL_ARGUMENTS (fndecl))
742: {
743: tree decl = DECL_ARGUMENTS (fndecl);
744:
745: for (formal = decl, i = 0; formal; formal = TREE_CHAIN (formal), i++)
746: {
747: /* Create an entry in PARM_MAP that says what pseudo register
748: is associated with an address we might compute. */
1.1.1.7 root 749: if (DECL_OFFSET (formal) >= 0)
750: {
751: /* This parameter has a home in the stack. */
752: parm_map[DECL_OFFSET (formal) / BITS_PER_WORD] = arg_vec[i];
753: }
754: else
755: {
756: /* Parameter that was passed in a register;
757: does it have a home on the stack (as a local)? */
758: rtx frtx = DECL_RTL (formal);
759: rtx offset = 0;
760: if (GET_CODE (frtx) == MEM)
761: {
762: frtx = XEXP (frtx, 0);
763: if (GET_CODE (frtx) == PLUS)
764: {
765: if (XEXP (frtx, 0) == frame_pointer_rtx
766: && GET_CODE (XEXP (frtx, 1)) == CONST_INT)
767: offset = XEXP (frtx, 1);
768: else if (XEXP (frtx, 1) == frame_pointer_rtx
769: && GET_CODE (XEXP (frtx, 0)) == CONST_INT)
770: offset = XEXP (frtx, 0);
1.1.1.14 root 771: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
772: /* If there is a separate arg pointer
773: and REG_PARM_STACK_SPACE is defined,
774: parms passed in regs can be copied
775: to slots reached via the arg pointer. */
776: if (XEXP (frtx, 0) == arg_pointer_rtx
777: && GET_CODE (XEXP (frtx, 1)) == CONST_INT)
778: offset = XEXP (frtx, 1);
779: else if (XEXP (frtx, 1) == arg_pointer_rtx
780: && GET_CODE (XEXP (frtx, 0)) == CONST_INT)
781: offset = XEXP (frtx, 0);
782: #endif
1.1.1.7 root 783: }
784: if (offset)
785: parm_map[INTVAL (offset) / UNITS_PER_WORD] = arg_vec[i];
1.1.1.14 root 786: else if (TREE_TYPE (formal) != error_mark_node)
787: abort ();
1.1.1.7 root 788: }
789: else if (GET_CODE (frtx) != REG)
790: abort ();
791: }
1.1 root 792: /* Create an entry in REG_MAP that says what rtx is associated
793: with a pseudo register from the function being inlined. */
794: if (GET_CODE (DECL_RTL (formal)) == REG)
795: reg_map[REGNO (DECL_RTL (formal))] = arg_vec[i];
796: }
1.1.1.14 root 797: }
1.1.1.7 root 798:
1.1.1.14 root 799: #if 0 /* This was turned off when it was written,
800: because expand_call was changed not to need it. */
801: /* Handle the case where our caller offers a register target
802: but the called function wants to return the value in memory. */
803: if (this_struct_value_rtx == 0
804: && aggregate_value_p (DECL_RESULT (fndecl)))
805: {
806: enum machine_mode mode1 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
807: this_struct_value_rtx
808: = assign_stack_local (mode1, GET_MODE_SIZE (mode1));
809: target = 0;
1.1 root 810: }
1.1.1.14 root 811: #endif
812:
813: /* Make certain that we can accept struct_value_{incoming_rtx,rtx},
814: and map it. */
815: if (this_struct_value_rtx == 0)
816: ;
817: else if (GET_CODE (struct_value_incoming_rtx) == REG)
818: reg_map[REGNO (XEXP (DECL_RTL (DECL_RESULT (fndecl)), 0))]
819: = this_struct_value_rtx;
820: else if (GET_CODE (struct_value_incoming_rtx) == MEM
821: && XEXP (XEXP (struct_value_incoming_rtx, 0), 0) == frame_pointer_rtx
822: && GET_CODE (XEXP (XEXP (struct_value_incoming_rtx, 0), 1)) == CONST_INT)
823: reg_map[REGNO (XEXP (DECL_RTL (DECL_RESULT (fndecl)), 0))]
824: = this_struct_value_rtx;
825: #if 0
826: parm_map[INTVAL (XEXP (XEXP (struct_value_incoming_rtx, 0), 1)) / UNITS_PER_WORD]
827: = this_struct_value_rtx;
828: #endif
1.1 root 829: else
1.1.1.14 root 830: abort ();
1.1 root 831:
832: label_map = (rtx *)alloca ((max_labelno - min_labelno) * sizeof (rtx));
833: label_map -= min_labelno;
834:
835: for (i = min_labelno; i < max_labelno; i++)
836: label_map[i] = gen_label_rtx ();
837:
1.1.1.6 root 838: /* As we copy insns, record the correspondence, so that inter-insn
839: references can be copied into isomorphic structure. */
840:
841: insn_map = (rtx *) alloca (INSN_UID (header) * sizeof (rtx));
842: bzero (insn_map, INSN_UID (header) * sizeof (rtx));
843:
1.1 root 844: /* Set up a target to translate the inline function's value-register. */
845:
1.1.1.14 root 846: if (this_struct_value_rtx != 0 || TYPE_MODE (type) == VOIDmode)
1.1 root 847: inline_target = 0;
848: else
1.1.1.3 root 849: {
850: /* Machine mode function was declared to return. */
851: enum machine_mode departing_mode = TYPE_MODE (type);
852: /* (Possibly wider) machine mode it actually computes
853: (for the sake of callers that fail to declare it right). */
854: enum machine_mode arriving_mode
1.1.1.10 root 855: = TYPE_MODE (DECL_RESULT_TYPE (fndecl));
1.1.1.3 root 856:
1.1.1.5 root 857: /* Don't use MEMs as direct targets because on some machines
858: substituting a MEM for a REG makes invalid insns.
859: Let the combiner substitute the MEM if that is valid. */
860: if (target && GET_CODE (target) == REG
861: && GET_MODE (target) == departing_mode)
1.1.1.3 root 862: inline_target = target;
863: else
864: inline_target = target = gen_reg_rtx (departing_mode);
865:
866: /* If function's value was promoted before return,
867: avoid machine mode mismatch when we substitute INLINE_TARGET.
868: But TARGET is what we will return to the caller. */
869: if (arriving_mode != departing_mode)
870: inline_target = gen_rtx (SUBREG, arriving_mode, target, 0);
871: }
1.1 root 872:
1.1.1.14 root 873: /* Make space in current function's stack frame
874: for the stack frame of the inline function.
875: Adjust all frame-pointer references by the difference
876: between the offset to this space
877: and the offset to the equivalent space in the inline
878: function's frame.
879: This difference equals the size of preexisting locals. */
1.1 root 880:
881: fp_delta = get_frame_size ();
882: #ifdef FRAME_GROWS_DOWNWARD
883: fp_delta = - fp_delta;
884: #endif
885:
886: inline_fp_rtx
887: = copy_to_mode_reg (Pmode,
888: plus_constant (frame_pointer_rtx, fp_delta));
889:
890: /* Now allocate the space for that to point at. */
891:
892: assign_stack_local (VOIDmode, DECL_FRAME_SIZE (fndecl));
893:
894: /* Now copy the insns one by one. */
895:
896: for (insn = insns; insn; insn = NEXT_INSN (insn))
897: {
898: rtx copy, pattern, next = 0;
899:
1.1.1.11 root 900: orig_asm_operands_vector = 0;
901: copy_asm_operands_vector = 0;
902:
1.1 root 903: switch (GET_CODE (insn))
904: {
905: case INSN:
906: pattern = PATTERN (insn);
907:
908: /* Special handling for the insn immediately after a CALL_INSN
909: that returned a value:
910: If it does copy the value, we must avoid the usual translation
911: of the return-register into INLINE_TARGET.
912: If it just USEs the value, the inline function expects it to
913: stay in the return-register and be returned,
914: so copy it into INLINE_TARGET. */
915:
916: if (follows_call
917: /* Allow a stack-adjust, handled normally, to come in between
918: the call and the value-copying insn. */
919: && ! (GET_CODE (pattern) == SET
920: && SET_DEST (pattern) == stack_pointer_rtx))
921: {
922: if (GET_CODE (pattern) == SET
923: && rtx_equal_p (SET_SRC (pattern), follows_call))
924: /* This insn copies the value: take special care to copy
925: that value to this insn's destination. */
926: {
927: copy = emit_insn (gen_rtx (SET, VOIDmode,
928: copy_rtx_and_substitute (SET_DEST (pattern)),
929: follows_call));
1.1.1.9 root 930: RTX_INTEGRATED_P (copy) = 1;
1.1 root 931: follows_call = 0;
932: break;
933: }
934: else if (GET_CODE (pattern) == USE
935: && rtx_equal_p (XEXP (pattern, 0), follows_call))
936: /* This insn does nothing but says the value is expected
937: to flow through to the inline function's return-value.
938: Make that happen, then ignore this insn. */
939: {
940: copy = emit_insn (gen_rtx (SET, VOIDmode, inline_target,
941: follows_call));
1.1.1.9 root 942: RTX_INTEGRATED_P (copy) = 1;
1.1 root 943: follows_call = 0;
944: break;
945: }
946: /* If it does neither, this value must be ignored. */
947: follows_call = 0;
948: }
949:
950: /* The (USE (REG n)) at return from the function should be ignored
951: since we are changing (REG n) into inline_target. */
1.1.1.6 root 952: copy = 0;
1.1 root 953: if (GET_CODE (pattern) == USE
954: && GET_CODE (XEXP (pattern, 0)) == REG
1.1.1.5 root 955: && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1.1 root 956: break;
1.1.1.14 root 957: /* Ignore setting a function value that we don't want to use. */
958: if (inline_target == 0
959: && GET_CODE (pattern) == SET
960: && GET_CODE (SET_DEST (pattern)) == REG
961: && REG_FUNCTION_VALUE_P (SET_DEST (pattern)))
962: break;
1.1 root 963:
964: /* Try to do some quick constant folding here.
965: This will save save execution time of the compiler,
966: as well time and space of the program if done here. */
967: if (GET_CODE (pattern) == SET
968: && SET_DEST (pattern) == cc0_rtx)
969: next = try_fold_cc0 (insn);
970:
971: if (next != 0)
972: {
973: insn = next;
974: }
975: else
976: {
1.1.1.14 root 977: rtx note = find_reg_note (insn, REG_EQUIV, 0);
978:
1.1 root 979: copy = emit_insn (copy_rtx_and_substitute (pattern));
1.1.1.9 root 980: RTX_INTEGRATED_P (copy) = 1;
1.1.1.14 root 981:
982: /* If we are copying an insn that loads a constant,
983: record the constantness. */
984: if (note)
985: REG_NOTES (copy)
986: = gen_rtx (EXPR_LIST, REG_EQUIV, XEXP (note, 0),
987: REG_NOTES (copy));
1.1 root 988: }
989: break;
990:
991: case JUMP_INSN:
992: follows_call = 0;
993: if (GET_CODE (PATTERN (insn)) == RETURN)
994: {
1.1.1.9 root 995: if (local_return_label == 0)
996: local_return_label = gen_label_rtx ();
997: emit_jump (local_return_label);
1.1 root 998: break;
999: }
1000: copy = emit_jump_insn (copy_rtx_and_substitute (PATTERN (insn)));
1.1.1.9 root 1001: RTX_INTEGRATED_P (copy) = 1;
1.1 root 1002: break;
1003:
1004: case CALL_INSN:
1.1.1.6 root 1005: #if 0
1006: /* This should no longer be necessary now that references
1007: to this function's return value are flagged to distinguish
1008: them from other references to the same hard register. */
1.1 root 1009: {
1010: rtx newbod;
1011: /* If the call's body is (set (reg...) (call...)),
1012: the register is a function return register, but DON'T
1013: translate it into INLINE_TARGET because it describes the
1014: called function, not the caller's return value. */
1015: if (GET_CODE (PATTERN (insn)) == SET)
1016: newbod = gen_rtx (SET, VOIDmode, SET_DEST (PATTERN (insn)),
1017: copy_rtx_and_substitute (SET_SRC (PATTERN (insn))));
1.1.1.6 root 1018: else if (GET_CODE (PATTERN (insn)) == PARALLEL
1019: && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
1020: {
1021: register int j;
1022: rtx newelem;
1023: newbod = gen_rtx (PARALLEL, VOIDmode,
1024: rtvec_alloc (XVECLEN (PATTERN (insn), 0)));
1025: newelem = gen_rtx (SET, VOIDmode,
1026: SET_DEST (XVECEXP (PATTERN (insn), 0, 0)),
1027: copy_rtx_and_substitute (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))));
1028: XVECEXP (newbod, 0, 0) = newelem;
1029: for (j = 1; j < XVECLEN (newbod, 0); j++)
1030: XVECEXP (newbod, 0, j)
1031: = copy_rtx_and_substitute (XVECEXP (PATTERN (insn), 0, j));
1032: }
1.1 root 1033: else
1034: newbod = copy_rtx_and_substitute (PATTERN (insn));
1035: copy = emit_call_insn (newbod);
1036: }
1.1.1.6 root 1037: #else /* 1 */
1038: copy = emit_call_insn (copy_rtx_and_substitute (PATTERN (insn)));
1039: #endif /* 1 */
1.1.1.9 root 1040: RTX_INTEGRATED_P (copy) = 1;
1.1 root 1041: /* Special handling needed for the following INSN depending on
1042: whether it copies the value from the fcn return reg. */
1043: if (GET_CODE (PATTERN (insn)) == SET)
1044: follows_call = SET_DEST (PATTERN (insn));
1.1.1.15! root 1045: else if (GET_CODE (PATTERN (insn)) == PARALLEL
! 1046: && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
! 1047: follows_call = SET_DEST (XVECEXP (PATTERN (insn), 0, 0));
1.1 root 1048: break;
1049:
1050: case CODE_LABEL:
1.1.1.6 root 1051: copy = emit_label (label_map[CODE_LABEL_NUMBER (insn)]);
1.1 root 1052: follows_call = 0;
1053: break;
1054:
1055: case BARRIER:
1.1.1.6 root 1056: copy = emit_barrier ();
1.1 root 1057: break;
1058:
1059: case NOTE:
1.1.1.14 root 1060: if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END
1061: && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_BEG)
1.1.1.7 root 1062: copy = emit_note (NOTE_SOURCE_FILE (insn), NOTE_LINE_NUMBER (insn));
1063: else
1064: copy = 0;
1.1 root 1065: break;
1066:
1067: default:
1068: abort ();
1069: break;
1070: }
1.1.1.6 root 1071:
1072: insn_map[INSN_UID (insn)] = copy;
1.1 root 1073: }
1074:
1.1.1.9 root 1075: if (local_return_label)
1076: emit_label (local_return_label);
1.1 root 1077:
1078: /* Make copies of the decls of the symbols in the inline function, so that
1079: the copies of the variables get declared in the current function. */
1080: copy_decl_tree (DECL_INITIAL (fndecl), 0);
1081:
1082: /* End the scope containing the copied formal parameter variables. */
1083:
1.1.1.10 root 1084: expand_end_bindings (getdecls (), 1, 1);
1.1 root 1085: poplevel (1, 1, 0);
1.1.1.14 root 1086: poplevel (0, 0, 0);
1.1 root 1087:
1.1.1.15! root 1088: emit_line_note (input_filename, lineno);
1.1 root 1089: reg_map = NULL;
1090: label_map = NULL;
1091:
1092: if (ignore || TYPE_MODE (type) == VOIDmode)
1093: return 0;
1094:
1095: if (structure_value_addr)
1096: {
1097: if (target)
1098: return target;
1.1.1.14 root 1099: return gen_rtx (MEM, TYPE_MODE (type),
1.1 root 1100: memory_address (BLKmode, structure_value_addr));
1101: }
1102:
1.1.1.3 root 1103: return target;
1.1 root 1104: }
1105:
1106: /* Given a chain of PARM_DECLs, ARGS, and a vector of RTL homes VEC,
1107: copy each decl into a VAR_DECL, push all of those decls
1108: and give each one the corresponding home. */
1109:
1110: static void
1111: copy_parm_decls (args, vec)
1112: tree args;
1113: rtx *vec;
1114: {
1115: register tree tail;
1116: register int i;
1117:
1118: for (tail = args, i = 0; tail; tail = TREE_CHAIN (tail), i++)
1119: {
1120: register tree decl = pushdecl (build_decl (VAR_DECL, DECL_NAME (tail),
1121: TREE_TYPE (tail)));
1.1.1.9 root 1122: /* These args would always appear unused, if not for this. */
1123: TREE_USED (decl) = 1;
1.1 root 1124: DECL_RTL (decl) = vec[i];
1125: }
1126: }
1127:
1128: /* Given a LET_STMT node, push decls and levels
1129: so as to construct in the current function a tree of contexts
1130: isomorphic to the one that is given. */
1131:
1132: static void
1133: copy_decl_tree (let, level)
1134: tree let;
1135: int level;
1136: {
1.1.1.14 root 1137: tree t, node;
1.1 root 1138:
1139: pushlevel (0);
1140:
1141: for (t = STMT_VARS (let); t; t = TREE_CHAIN (t))
1142: {
1143: tree d = build_decl (TREE_CODE (t), DECL_NAME (t), TREE_TYPE (t));
1144: DECL_SOURCE_LINE (d) = DECL_SOURCE_LINE (t);
1145: DECL_SOURCE_FILE (d) = DECL_SOURCE_FILE (t);
1146: if (DECL_RTL (t) != 0)
1.1.1.8 root 1147: {
1148: if (GET_CODE (DECL_RTL (t)) == MEM
1149: && CONSTANT_ADDRESS_P (XEXP (DECL_RTL (t), 0)))
1150: /* copy_rtx_and_substitute would call memory_address
1151: which would copy the address into a register.
1152: Then debugging-output wouldn't know how to handle it. */
1153: DECL_RTL (d) = DECL_RTL (t);
1154: else
1155: DECL_RTL (d) = copy_rtx_and_substitute (DECL_RTL (t));
1156: }
1.1 root 1157: TREE_EXTERNAL (d) = TREE_EXTERNAL (t);
1158: TREE_STATIC (d) = TREE_STATIC (t);
1159: TREE_PUBLIC (d) = TREE_PUBLIC (t);
1160: TREE_LITERAL (d) = TREE_LITERAL (t);
1161: TREE_ADDRESSABLE (d) = TREE_ADDRESSABLE (t);
1162: TREE_READONLY (d) = TREE_READONLY (t);
1163: TREE_VOLATILE (d) = TREE_VOLATILE (t);
1.1.1.9 root 1164: /* These args would always appear unused, if not for this. */
1165: TREE_USED (d) = 1;
1.1 root 1166: pushdecl (d);
1167: }
1168:
1.1.1.14 root 1169: for (t = STMT_SUBBLOCKS (let); t; t = TREE_CHAIN (t))
1.1 root 1170: copy_decl_tree (t, level + 1);
1171:
1.1.1.14 root 1172: node = poplevel (level > 0, 0, 0);
1173: if (node)
1174: TREE_USED (node) = TREE_USED (let);
1.1 root 1175: }
1176:
1177: /* Create a new copy of an rtx.
1178: Recursively copies the operands of the rtx,
1179: except for those few rtx codes that are sharable. */
1180:
1181: static rtx
1182: copy_rtx_and_substitute (orig)
1183: register rtx orig;
1184: {
1185: register rtx copy, temp;
1186: register int i, j;
1187: register RTX_CODE code;
1188: register enum machine_mode mode;
1189: register char *format_ptr;
1190: int regno;
1191:
1192: if (orig == 0)
1193: return 0;
1194:
1195: code = GET_CODE (orig);
1196: mode = GET_MODE (orig);
1197:
1198: switch (code)
1199: {
1200: case REG:
1201: /* If a frame-pointer register shows up, then we
1202: must `fix' the reference. If the stack pointer
1203: register shows up, it must be part of stack-adjustments
1204: (*not* because we eliminated the frame pointer!).
1205: Small hard registers are returned as-is. Pseudo-registers
1206: go through their `reg_map'. */
1207: regno = REGNO (orig);
1208: if (regno < FIRST_PSEUDO_REGISTER)
1209: {
1.1.1.14 root 1210: /* Some hard registers are also mapped,
1211: but others are not translated. */
1212: if (reg_map[regno] != 0)
1213: return reg_map[regno];
1.1.1.5 root 1214: if (REG_FUNCTION_VALUE_P (orig))
1.1.1.9 root 1215: {
1216: /* This is a reference to the function return value. If
1217: the function doesn't have a return value, error.
1218: If it does, it may not be the same mode as `inline_target'
1219: because SUBREG is not required for hard regs.
1220: If not, adjust mode of inline_target to fit the context. */
1221: if (inline_target == 0)
1222: abort ();
1223: if (mode == GET_MODE (inline_target))
1224: return inline_target;
1225: return gen_rtx (SUBREG, mode, inline_target, 0);
1226: }
1.1 root 1227: if (regno == FRAME_POINTER_REGNUM)
1228: return plus_constant (orig, fp_delta);
1229: return orig;
1230: }
1231: if (reg_map[regno] == NULL)
1232: reg_map[regno] = gen_reg_rtx (mode);
1233: return reg_map[regno];
1234:
1.1.1.14 root 1235: case SUBREG:
1236: copy = copy_rtx_and_substitute (SUBREG_REG (orig));
1237: /* SUBREG is ordinary, but don't make nested SUBREGs. */
1238: if (GET_CODE (copy) == SUBREG)
1239: return gen_rtx (SUBREG, GET_MODE (orig), SUBREG_REG (copy),
1240: SUBREG_WORD (orig) + SUBREG_WORD (copy));
1241: return gen_rtx (SUBREG, GET_MODE (orig), copy,
1242: SUBREG_WORD (orig));
1243:
1.1 root 1244: case CODE_LABEL:
1245: return label_map[CODE_LABEL_NUMBER (orig)];
1246:
1247: case LABEL_REF:
1248: copy = rtx_alloc (LABEL_REF);
1249: PUT_MODE (copy, mode);
1250: XEXP (copy, 0) = label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))];
1251: return copy;
1252:
1253: case PC:
1254: case CC0:
1255: case CONST_INT:
1256: case CONST_DOUBLE:
1257: case SYMBOL_REF:
1258: return orig;
1259:
1.1.1.11 root 1260: case ASM_OPERANDS:
1261: /* If a single asm insn contains multiple output operands
1262: then it contains multiple ASM_OPERANDS rtx's that share operand 3.
1263: We must make sure that the copied insn continues to share it. */
1264: if (orig_asm_operands_vector == XVEC (orig, 3))
1265: {
1266: copy = rtx_alloc (ASM_OPERANDS);
1267: XSTR (copy, 0) = XSTR (orig, 0);
1268: XSTR (copy, 1) = XSTR (orig, 1);
1269: XINT (copy, 2) = XINT (orig, 2);
1270: XVEC (copy, 3) = copy_asm_operands_vector;
1.1.1.14 root 1271: XVEC (copy, 4) = copy_asm_constraints_vector;
1272: XSTR (copy, 5) = XSTR (orig, 5);
1273: XINT (copy, 6) = XINT (orig, 6);
1.1.1.11 root 1274: return copy;
1275: }
1276: break;
1277:
1.1.1.5 root 1278: case CALL:
1279: /* This is given special treatment because the first
1280: operand of a CALL is a (MEM ...) which may get
1281: forced into a register for cse. This is undesirable
1282: if function-address cse isn't wanted or if we won't do cse. */
1283: #ifndef NO_FUNCTION_CSE
1284: if (! (optimize && ! flag_no_function_cse))
1285: #endif
1286: return gen_rtx (CALL, GET_MODE (orig),
1287: gen_rtx (MEM, GET_MODE (XEXP (orig, 0)),
1288: copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0))),
1289: copy_rtx_and_substitute (XEXP (orig, 1)));
1290: break;
1291:
1.1 root 1292: case PLUS:
1293: /* Note: the PLUS case is not nearly as careful as the MEM
1294: case in terms of preserving addresses. The reason for this
1295: is that it is expected that if a PLUS_EXPR turns out not
1296: to be a legitimate address, reload can fix that up, without
1297: doing major damage. However, a MEM rtx must preside
1298: over a legitimate address. The MEM case has lots of hair
1299: to deal with what happens when it sits on a PLUS... */
1300: /* Take care of the easy case quickly. */
1301: if (XEXP (orig, 0) == frame_pointer_rtx
1302: || XEXP (orig, 1) == frame_pointer_rtx
1303: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1304: && (XEXP (orig, 0) == arg_pointer_rtx
1305: || XEXP (orig, 1) == arg_pointer_rtx)))
1306: {
1.1.1.14 root 1307: rtx reg;
1.1 root 1308: if (XEXP (orig, 0) == frame_pointer_rtx
1309: || XEXP (orig, 0) == arg_pointer_rtx)
1.1.1.14 root 1310: reg = XEXP (orig, 0), copy = XEXP (orig, 1);
1.1 root 1311: else
1.1.1.14 root 1312: reg = XEXP (orig, 1), copy = XEXP (orig, 0);
1.1 root 1313:
1314: if (GET_CODE (copy) == CONST_INT)
1315: {
1316: int c = INTVAL (copy);
1317:
1.1.1.14 root 1318: if (reg == arg_pointer_rtx && c >= first_parm_offset)
1.1 root 1319: {
1.1.1.14 root 1320: copy = access_parm_map (c, VOIDmode);
1321: if (GET_CODE (copy) != MEM)
1322: /* Should not happen, because a parm we need to address
1323: should not be living in a register.
1324: (expand_inline_function copied it to a stack slot.) */
1325: abort ();
1.1 root 1326: return XEXP (copy, 0);
1327: }
1328: return gen_rtx (PLUS, mode,
1329: frame_pointer_rtx,
1330: gen_rtx (CONST_INT, SImode,
1331: c + fp_delta));
1332: }
1333: copy = copy_rtx_and_substitute (copy);
1.1.1.6 root 1334: temp = force_reg (mode, gen_rtx (PLUS, mode, frame_pointer_rtx, copy));
1.1 root 1335: return plus_constant (temp, fp_delta);
1336: }
1337: else if (reg_mentioned_p (frame_pointer_rtx, orig)
1338: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1339: && reg_mentioned_p (arg_pointer_rtx, orig)))
1340: {
1341: /* If we have a complex sum which has a frame pointer
1342: in it, and it was a legitimate address, then
1343: keep it that way. */
1344: if (memory_address_p (mode, orig))
1345: {
1346: if (GET_CODE (XEXP (orig, 0)) == CONST_INT)
1347: {
1348: copy = copy_rtx_and_substitute (XEXP (orig, 1));
1349: temp = plus_constant (copy, INTVAL (XEXP (orig, 0)));
1350: }
1351: else if (GET_CODE (XEXP (orig, 1)) == CONST_INT)
1352: {
1353: copy = copy_rtx_and_substitute (XEXP (orig, 0));
1354: temp = plus_constant (copy, INTVAL (XEXP (orig, 1)));
1355: }
1356: else
1357: {
1358: temp = gen_rtx (PLUS, GET_MODE (orig),
1359: copy_rtx_and_substitute (XEXP (orig, 0)),
1360: copy_rtx_and_substitute (XEXP (orig, 1)));
1361: }
1362: temp = memory_address (mode, temp);
1363: }
1364: else
1365: temp = gen_rtx (PLUS, GET_MODE (orig),
1366: copy_rtx_and_substitute (XEXP (orig, 0)),
1367: copy_rtx_and_substitute (XEXP (orig, 1)));
1368: }
1369: else
1370: temp = gen_rtx (PLUS, GET_MODE (orig),
1371: copy_rtx_and_substitute (XEXP (orig, 0)),
1372: copy_rtx_and_substitute (XEXP (orig, 1)));
1373:
1374: return temp;
1.1.1.7 root 1375:
1.1 root 1376: case MEM:
1377: /* Take care of easiest case here. */
1378: copy = XEXP (orig, 0);
1379: if (copy == frame_pointer_rtx || copy == arg_pointer_rtx)
1380: return gen_rtx (MEM, mode,
1381: plus_constant (frame_pointer_rtx, fp_delta));
1.1.1.6 root 1382:
1383: /* Allow a pushing-address even if that is not valid as an
1384: ordinary memory address. It indicates we are inlining a special
1.1.1.9 root 1385: push-insn. These must be copied; otherwise unshare_all_rtl
1386: might clobber them to point at temporary rtl of this function. */
1.1.1.6 root 1387: #ifdef STACK_GROWS_DOWNWARD
1388: if (GET_CODE (copy) == PRE_DEC && XEXP (copy, 0) == stack_pointer_rtx)
1.1.1.9 root 1389: return gen_rtx (MEM, mode, copy_rtx_and_substitute (copy));
1.1.1.6 root 1390: #else
1391: if (GET_CODE (copy) == PRE_INC && XEXP (copy, 0) == stack_pointer_rtx)
1.1.1.9 root 1392: return gen_rtx (MEM, mode, copy_rtx_and_substitute (copy));
1.1.1.6 root 1393: #endif
1394:
1.1.1.7 root 1395: /* If this is some other sort of address that isn't generally valid,
1396: break out all the registers referred to. */
1397: if (! memory_address_p (mode, copy))
1398: return gen_rtx (MEM, mode, copy_address (copy));
1399:
1.1 root 1400: if (GET_CODE (copy) == PLUS)
1401: {
1402: if (XEXP (copy, 0) == frame_pointer_rtx
1403: || XEXP (copy, 1) == frame_pointer_rtx
1404: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1405: && (XEXP (copy, 0) == arg_pointer_rtx
1406: || XEXP (copy, 1) == arg_pointer_rtx)))
1407: {
1408: rtx reg;
1409: if (XEXP (copy, 0) == frame_pointer_rtx
1410: || XEXP (copy, 0) == arg_pointer_rtx)
1411: reg = XEXP (copy, 0), copy = XEXP (copy, 1);
1412: else
1413: reg = XEXP (copy, 1), copy = XEXP (copy, 0);
1414:
1415: if (GET_CODE (copy) == CONST_INT)
1416: {
1417: int c = INTVAL (copy);
1418:
1.1.1.7 root 1419: if (reg == arg_pointer_rtx && c >= first_parm_offset)
1.1.1.14 root 1420: return access_parm_map (c, mode);
1.1.1.11 root 1421:
1.1 root 1422: temp = gen_rtx (PLUS, Pmode,
1423: frame_pointer_rtx,
1424: gen_rtx (CONST_INT, SImode,
1425: c + fp_delta));
1426: if (! memory_address_p (Pmode, temp))
1427: return gen_rtx (MEM, mode, plus_constant (inline_fp_rtx, c));
1428: }
1429: copy = copy_rtx_and_substitute (copy);
1430: temp = gen_rtx (PLUS, Pmode, frame_pointer_rtx, copy);
1431: temp = plus_constant (temp, fp_delta);
1432: temp = memory_address (Pmode, temp);
1433: }
1434: else if (reg_mentioned_p (frame_pointer_rtx, copy)
1435: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1436: && reg_mentioned_p (arg_pointer_rtx, copy)))
1437: {
1438: if (GET_CODE (XEXP (copy, 0)) == CONST_INT)
1439: {
1440: temp = copy_rtx_and_substitute (XEXP (copy, 1));
1441: temp = plus_constant (temp, INTVAL (XEXP (copy, 0)));
1442: }
1443: else if (GET_CODE (XEXP (copy, 1)) == CONST_INT)
1444: {
1445: temp = copy_rtx_and_substitute (XEXP (copy, 0));
1446: temp = plus_constant (temp, INTVAL (XEXP (copy, 1)));
1447: }
1448: else
1449: {
1450: temp = gen_rtx (PLUS, GET_MODE (copy),
1451: copy_rtx_and_substitute (XEXP (copy, 0)),
1452: copy_rtx_and_substitute (XEXP (copy, 1)));
1453: }
1454: }
1455: else
1456: {
1457: if (GET_CODE (XEXP (copy, 1)) == CONST_INT)
1458: temp = plus_constant (copy_rtx_and_substitute (XEXP (copy, 0)),
1459: INTVAL (XEXP (copy, 1)));
1460: else if (GET_CODE (XEXP (copy, 0)) == CONST_INT)
1461: temp = plus_constant (copy_rtx_and_substitute (XEXP (copy, 1)),
1462: INTVAL (XEXP (copy, 0)));
1463: else
1464: {
1465: rtx left = copy_rtx_and_substitute (XEXP (copy, 0));
1466: rtx right = copy_rtx_and_substitute (XEXP (copy, 1));
1467:
1468: temp = gen_rtx (PLUS, GET_MODE (copy), left, right);
1469: }
1470: }
1471: }
1472: else
1473: temp = copy_rtx_and_substitute (copy);
1474:
1475: return change_address (orig, mode, temp);
1476:
1477: case RETURN:
1478: abort ();
1479: }
1480:
1481: copy = rtx_alloc (code);
1482: PUT_MODE (copy, mode);
1483: copy->in_struct = orig->in_struct;
1484: copy->volatil = orig->volatil;
1485: copy->unchanging = orig->unchanging;
1486:
1487: format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
1488:
1489: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
1490: {
1491: switch (*format_ptr++)
1492: {
1493: case '0':
1494: break;
1495:
1496: case 'e':
1497: XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i));
1498: break;
1499:
1.1.1.6 root 1500: case 'u':
1501: /* Change any references to old-insns to point to the
1502: corresponding copied insns. */
1.1.1.9 root 1503: XEXP (copy, i) = insn_map[INSN_UID (XEXP (orig, i))];
1504: break;
1.1.1.6 root 1505:
1.1 root 1506: case 'E':
1507: XVEC (copy, i) = XVEC (orig, i);
1.1.1.6 root 1508: if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
1.1 root 1509: {
1510: XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
1511: for (j = 0; j < XVECLEN (copy, i); j++)
1512: XVECEXP (copy, i, j) = copy_rtx_and_substitute (XVECEXP (orig, i, j));
1513: }
1514: break;
1515:
1516: case 'i':
1517: XINT (copy, i) = XINT (orig, i);
1518: break;
1519:
1520: case 's':
1521: XSTR (copy, i) = XSTR (orig, i);
1522: break;
1523:
1524: default:
1525: abort ();
1526: }
1527: }
1.1.1.11 root 1528:
1529: if (code == ASM_OPERANDS && orig_asm_operands_vector == 0)
1530: {
1531: orig_asm_operands_vector = XVEC (orig, 3);
1532: copy_asm_operands_vector = XVEC (copy, 3);
1.1.1.14 root 1533: copy_asm_constraints_vector = XVEC (copy, 4);
1534: }
1535:
1536: return copy;
1537: }
1538:
1539: /* Get the value corresponding to an address relative to the arg pointer
1540: at index RELADDRESS. MODE is the machine mode of the reference.
1541: MODE is used only when the value is a REG.
1542: Pass VOIDmode for MODE when the mode is not known;
1543: in such cases, you should make sure the value is a MEM. */
1544:
1545: static rtx
1546: access_parm_map (reladdress, mode)
1547: int reladdress;
1548: enum machine_mode mode;
1549: {
1550: /* Index in parm_map. */
1551: int index = reladdress / UNITS_PER_WORD;
1552: /* Offset of the data being referenced
1553: from the beginning of the value for that parm. */
1554: int offset = reladdress % UNITS_PER_WORD;
1555: rtx copy;
1556:
1557: /* If we are referring to the middle of a multiword parm,
1558: find the beginning of that parm.
1559: OFFSET gets the offset of the reference from
1560: the beginning of the parm. */
1561:
1562: while (parm_map[index] == 0)
1563: {
1564: index--;
1565: if (index < first_parm_offset / UNITS_PER_WORD)
1566: /* If this abort happens, it means we need
1567: to handle "decrementing" INDEX back far
1568: enough to start looking among the reg parms
1569: instead of the stack parms. What a mess! */
1570: abort ();
1571: offset += UNITS_PER_WORD;
1572: }
1573:
1574: copy = parm_map[index];
1575:
1576: #ifdef BYTES_BIG_ENDIAN
1577: /* Subtract from OFFSET the offset of where
1578: the actual parm value would start. */
1579: if (GET_MODE_SIZE (GET_MODE (copy)) < UNITS_PER_WORD)
1580: offset
1581: -= (UNITS_PER_WORD
1582: - GET_MODE_SIZE (GET_MODE (copy)));
1583: #endif
1584:
1585: /* For memory ref, adjust it by the desired offset. */
1586: if (GET_CODE (copy) == MEM)
1587: {
1588: if (offset != 0)
1589: return change_address (copy, mode,
1590: plus_constant (XEXP (copy, 0),
1591: offset));
1592: return copy;
1593: }
1594:
1595: if (GET_CODE (copy) != REG && GET_CODE (copy) != SUBREG
1596: && ! CONSTANT_P (copy))
1597: abort ();
1598: if (mode == VOIDmode)
1599: abort ();
1600:
1601: /* A REG cannot be offset by bytes, so use a subreg
1602: (which is possible only in certain cases). */
1603: if (GET_MODE (copy) != mode
1604: && GET_MODE (copy) != VOIDmode)
1605: {
1606: int word;
1607: /* Crash if the portion of the arg wanted
1608: is not the least significant.
1609: Functions with refs to other parts of a
1610: parameter should not be inline--
1611: see function_cannot_inline_p. */
1612: #ifdef BYTES_BIG_ENDIAN
1613: if (offset + GET_MODE_SIZE (mode)
1614: != GET_MODE_SIZE (GET_MODE (copy)))
1615: abort ();
1616: #else
1617: if (offset != 0)
1618: abort ();
1619: #endif
1620: word = 0;
1621: if (GET_CODE (copy) == SUBREG)
1622: word = SUBREG_WORD (copy), copy = SUBREG_REG (copy);
1623: if (CONSTANT_P (copy))
1624: copy = force_reg (GET_MODE (copy), copy);
1625: return gen_rtx (SUBREG, mode, copy, word);
1.1.1.11 root 1626: }
1627:
1.1 root 1628: return copy;
1629: }
1630:
1.1.1.7 root 1631: /* Like copy_rtx_and_substitute but produces different output, suitable
1632: for an ideosyncractic address that isn't memory_address_p.
1633: The output resembles the input except that REGs and MEMs are replaced
1634: with new psuedo registers. All the "real work" is done in separate
1635: insns which set up the values of these new registers. */
1636:
1637: static rtx
1638: copy_address (orig)
1639: register rtx orig;
1640: {
1.1.1.9 root 1641: register rtx copy;
1.1.1.7 root 1642: register int i, j;
1643: register RTX_CODE code;
1644: register enum machine_mode mode;
1645: register char *format_ptr;
1646:
1647: if (orig == 0)
1648: return 0;
1649:
1650: code = GET_CODE (orig);
1651: mode = GET_MODE (orig);
1652:
1653: switch (code)
1654: {
1655: case REG:
1.1.1.9 root 1656: if (REGNO (orig) != FRAME_POINTER_REGNUM)
1657: return copy_rtx_and_substitute (orig);
1658: return plus_constant (frame_pointer_rtx, fp_delta);
1659:
1660: case PLUS:
1661: if (GET_CODE (XEXP (orig, 0)) == REG
1662: && REGNO (XEXP (orig, 0)) == FRAME_POINTER_REGNUM)
1663: return plus_constant (orig, fp_delta);
1664: break;
1665:
1.1.1.7 root 1666: case MEM:
1.1.1.9 root 1667: return copy_to_reg (copy_rtx_and_substitute (orig));
1.1.1.7 root 1668:
1669: case CODE_LABEL:
1670: case LABEL_REF:
1.1.1.9 root 1671: return copy_rtx_and_substitute (orig);
1.1.1.7 root 1672:
1673: case PC:
1674: case CC0:
1675: case CONST_INT:
1676: case CONST_DOUBLE:
1677: case SYMBOL_REF:
1678: return orig;
1679: }
1680:
1681: copy = rtx_alloc (code);
1682: PUT_MODE (copy, mode);
1683: copy->in_struct = orig->in_struct;
1684: copy->volatil = orig->volatil;
1685: copy->unchanging = orig->unchanging;
1686:
1687: format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
1688:
1689: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
1690: {
1691: switch (*format_ptr++)
1692: {
1693: case '0':
1694: break;
1695:
1696: case 'e':
1697: XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i));
1698: break;
1699:
1700: case 'u':
1701: /* Change any references to old-insns to point to the
1702: corresponding copied insns. */
1.1.1.9 root 1703: XEXP (copy, i) = insn_map[INSN_UID (XEXP (orig, i))];
1704: break;
1.1.1.7 root 1705:
1706: case 'E':
1707: XVEC (copy, i) = XVEC (orig, i);
1708: if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
1709: {
1710: XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
1711: for (j = 0; j < XVECLEN (copy, i); j++)
1712: XVECEXP (copy, i, j) = copy_rtx_and_substitute (XVECEXP (orig, i, j));
1713: }
1714: break;
1715:
1716: case 'i':
1717: XINT (copy, i) = XINT (orig, i);
1718: break;
1719:
1720: case 's':
1721: XSTR (copy, i) = XSTR (orig, i);
1722: break;
1723:
1724: default:
1725: abort ();
1726: }
1727: }
1728: return copy;
1729: }
1730:
1.1 root 1731: /* Attempt to simplify INSN while copying it from an inline fn,
1732: assuming it is a SET that sets CC0.
1733:
1734: If we simplify it, we emit the appropriate insns and return
1735: the last insn that we have handled (since we may handle the insn
1736: that follows INSN as well as INSN itself).
1737:
1738: Otherwise we do nothing and return zero. */
1739:
1740: static rtx
1741: try_fold_cc0 (insn)
1742: rtx insn;
1743: {
1744: rtx cnst = copy_rtx_and_substitute (SET_SRC (PATTERN (insn)));
1745: rtx pat, copy;
1746:
1747: if (CONSTANT_P (cnst)
1748: /* @@ Cautious: Don't know how many of these tests we need. */
1749: && NEXT_INSN (insn)
1750: && GET_CODE (pat = PATTERN (NEXT_INSN (insn))) == SET
1751: && SET_DEST (pat) == pc_rtx
1752: && GET_CODE (pat = SET_SRC (pat)) == IF_THEN_ELSE
1753: && GET_RTX_LENGTH (GET_CODE (XEXP (pat, 0))) == 2)
1754: {
1755: rtx cnst2;
1756: rtx cond = XEXP (pat, 0);
1757:
1758: if ((XEXP (cond, 0) == cc0_rtx
1759: && CONSTANT_P (XEXP (cond, 1))
1760: && (cnst2 = XEXP (cond, 1)))
1761: || (XEXP (cond, 1) == cc0_rtx
1762: && CONSTANT_P (XEXP (cond, 0))
1763: && (cnst2 = XEXP (cond, 0))))
1764: {
1765: copy = fold_out_const_cc0 (cond, XEXP (pat, 1), XEXP (pat, 2),
1766: cnst, cnst2);
1767: if (copy)
1768: {
1769: if (GET_CODE (copy) == LABEL_REF)
1770: {
1771: /* We will branch unconditionally to
1772: the label specified by COPY.
1773: Eliminate dead code by running down the
1774: list of insn until we see a CODE_LABEL.
1775: If the CODE_LABEL is the one specified
1776: by COPY, we win, and can delete all code
1777: up to (but not necessarily including)
1778: that label. Otherwise only win a little:
1779: emit the branch insn, and continue expanding. */
1780: rtx tmp = NEXT_INSN (insn);
1781: while (tmp && GET_CODE (tmp) != CODE_LABEL)
1782: tmp = NEXT_INSN (tmp);
1783: if (! tmp)
1784: abort ();
1785: if (label_map[CODE_LABEL_NUMBER (tmp)] == XEXP (copy, 0))
1786: {
1787: /* Big win. */
1788: return PREV_INSN (tmp);
1789: }
1790: else
1791: {
1792: /* Small win. Emit the unconditional branch,
1793: followed by a BARRIER, so that jump optimization
1794: will know what to do. */
1795: emit_jump (copy);
1796: return NEXT_INSN (insn);
1797: }
1798: }
1799: else if (copy == pc_rtx)
1800: {
1801: /* Do not take the branch, just fall through.
1802: Jump optimize should handle the elimination of
1803: dead code if appropriate. */
1804: return NEXT_INSN (insn);
1805: }
1806: else
1807: abort ();
1808: }
1809: }
1810: }
1811: return 0;
1812: }
1813:
1814: /* If (COND_RTX CNST1 CNST2) yield a result we can treat
1815: as being constant, return THEN_RTX if the result is always
1816: non-zero, and return ELSE_RTX otherwise. */
1817: static rtx
1818: fold_out_const_cc0 (cond_rtx, then_rtx, else_rtx, cnst1, cnst2)
1819: rtx cond_rtx, then_rtx, else_rtx;
1820: rtx cnst1, cnst2;
1821: {
1822: int value1, value2;
1823: int int1 = GET_CODE (cnst1) == CONST_INT;
1824: int int2 = GET_CODE (cnst2) == CONST_INT;
1825: if (int1)
1826: value1 = INTVAL (cnst1);
1827: else
1828: value1 = 1;
1829: if (int2)
1830: value2 = INTVAL (cnst2);
1831: else
1832: value2 = 1;
1833:
1834: switch (GET_CODE (cond_rtx))
1835: {
1836: case NE:
1837: if (int1 && int2)
1838: if (value1 != value2)
1839: return copy_rtx_and_substitute (then_rtx);
1840: else
1841: return copy_rtx_and_substitute (else_rtx);
1842: if (value1 == 0 || value2 == 0)
1843: return copy_rtx_and_substitute (then_rtx);
1844: if (int1 == 0 && int2 == 0)
1845: if (rtx_equal_p (cnst1, cnst2))
1846: return copy_rtx_and_substitute (else_rtx);
1847: break;
1848: case EQ:
1849: if (int1 && int2)
1850: if (value1 == value2)
1851: return copy_rtx_and_substitute (then_rtx);
1852: else
1853: return copy_rtx_and_substitute (else_rtx);
1854: if (value1 == 0 || value2 == 0)
1855: return copy_rtx_and_substitute (else_rtx);
1856: if (int1 == 0 && int2 == 0)
1857: if (rtx_equal_p (cnst1, cnst2))
1858: return copy_rtx_and_substitute (then_rtx);
1859: break;
1860: case GE:
1861: if (int1 && int2)
1862: if (value1 >= value2)
1863: return copy_rtx_and_substitute (then_rtx);
1864: else
1865: return copy_rtx_and_substitute (else_rtx);
1866: if (value1 == 0)
1867: return copy_rtx_and_substitute (else_rtx);
1868: if (value2 == 0)
1869: return copy_rtx_and_substitute (then_rtx);
1870: break;
1871: case GT:
1872: if (int1 && int2)
1873: if (value1 > value2)
1874: return copy_rtx_and_substitute (then_rtx);
1875: else
1876: return copy_rtx_and_substitute (else_rtx);
1877: if (value1 == 0)
1878: return copy_rtx_and_substitute (else_rtx);
1879: if (value2 == 0)
1880: return copy_rtx_and_substitute (then_rtx);
1881: break;
1882: case LE:
1883: if (int1 && int2)
1884: if (value1 <= value2)
1885: return copy_rtx_and_substitute (then_rtx);
1886: else
1887: return copy_rtx_and_substitute (else_rtx);
1888: if (value1 == 0)
1889: return copy_rtx_and_substitute (then_rtx);
1890: if (value2 == 0)
1891: return copy_rtx_and_substitute (else_rtx);
1892: break;
1893: case LT:
1894: if (int1 && int2)
1895: if (value1 < value2)
1896: return copy_rtx_and_substitute (then_rtx);
1897: else
1898: return copy_rtx_and_substitute (else_rtx);
1899: if (value1 == 0)
1900: return copy_rtx_and_substitute (then_rtx);
1901: if (value2 == 0)
1902: return copy_rtx_and_substitute (else_rtx);
1903: break;
1904: case GEU:
1905: if (int1 && int2)
1906: if ((unsigned)value1 >= (unsigned)value2)
1907: return copy_rtx_and_substitute (then_rtx);
1908: else
1909: return copy_rtx_and_substitute (else_rtx);
1910: if (value1 == 0)
1911: return copy_rtx_and_substitute (else_rtx);
1912: if (value2 == 0)
1913: return copy_rtx_and_substitute (then_rtx);
1914: break;
1915: case GTU:
1916: if (int1 && int2)
1917: if ((unsigned)value1 > (unsigned)value2)
1918: return copy_rtx_and_substitute (then_rtx);
1919: else
1920: return copy_rtx_and_substitute (else_rtx);
1921: if (value1 == 0)
1922: return copy_rtx_and_substitute (else_rtx);
1923: if (value2 == 0)
1924: return copy_rtx_and_substitute (then_rtx);
1925: break;
1926: case LEU:
1927: if (int1 && int2)
1928: if ((unsigned)value1 <= (unsigned)value2)
1929: return copy_rtx_and_substitute (then_rtx);
1930: else
1931: return copy_rtx_and_substitute (else_rtx);
1932: if (value1 == 0)
1933: return copy_rtx_and_substitute (then_rtx);
1934: if (value2 == 0)
1935: return copy_rtx_and_substitute (else_rtx);
1936: break;
1937: case LTU:
1938: if (int1 && int2)
1939: if ((unsigned)value1 < (unsigned)value2)
1940: return copy_rtx_and_substitute (then_rtx);
1941: else
1942: return copy_rtx_and_substitute (else_rtx);
1943: if (value1 == 0)
1944: return copy_rtx_and_substitute (then_rtx);
1945: if (value2 == 0)
1946: return copy_rtx_and_substitute (else_rtx);
1947: break;
1948: }
1949: /* Could not hack it. */
1950: return 0;
1951: }
1952:
1953: /* Output the assembly language code for the function FNDECL
1954: from its DECL_SAVED_INSNS. Used for inline functions that are output
1955: at end of compilation instead of where they came in the source. */
1956:
1957: void
1958: output_inline_function (fndecl)
1959: tree fndecl;
1960: {
1961: rtx head = DECL_SAVED_INSNS (fndecl);
1962: rtx last;
1.1.1.14 root 1963: extern rtx stack_slot_list;
1.1 root 1964:
1965: temporary_allocation ();
1966:
1.1.1.4 root 1967: current_function_decl = fndecl;
1968:
1.1.1.14 root 1969: /* This call is only used to initialize global variables. */
1970: init_function_start (fndecl);
1.1 root 1971:
1972: /* Set stack frame size. */
1973: assign_stack_local (BLKmode, DECL_FRAME_SIZE (fndecl));
1974:
1975: restore_reg_data (FIRST_PARM_INSN (head));
1976:
1.1.1.14 root 1977: stack_slot_list = XEXP (head, 9);
1978:
1.1.1.10 root 1979: expand_function_end (DECL_SOURCE_FILE (fndecl), DECL_SOURCE_LINE (fndecl));
1.1 root 1980:
1981: for (last = head; NEXT_INSN (last); last = NEXT_INSN (last))
1982: ;
1983:
1984: set_new_first_and_last_insn (FIRST_PARM_INSN (head), last);
1985:
1986: /* Compile this function all the way down to assembly code. */
1987: rest_of_compilation (fndecl);
1988:
1.1.1.4 root 1989: current_function_decl = 0;
1990:
1.1 root 1991: permanent_allocation ();
1992: }
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