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1.1 root 1: /* Procedure integration for GNU CC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
1.1.1.12 root 7: GNU CC is free software; you can redistribute it and/or modify
8: it under the terms of the GNU General Public License as published by
9: the Free Software Foundation; either version 1, or (at your option)
10: any later version.
11:
1.1 root 12: GNU CC is distributed in the hope that it will be useful,
1.1.1.12 root 13: but WITHOUT ANY WARRANTY; without even the implied warranty of
14: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15: GNU General Public License for more details.
16:
17: You should have received a copy of the GNU General Public License
18: along with GNU CC; see the file COPYING. If not, write to
19: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
1.1 root 20:
21:
22: #include <stdio.h>
23:
24: #include "config.h"
25: #include "rtl.h"
26: #include "tree.h"
27: #include "flags.h"
28: #include "insn-flags.h"
29: #include "expr.h"
30:
31: #include "obstack.h"
32: #define obstack_chunk_alloc xmalloc
33: #define obstack_chunk_free free
34: extern int xmalloc ();
35: extern void free ();
36:
37: extern struct obstack permanent_obstack, maybepermanent_obstack;
38: extern struct obstack *rtl_obstack, *saveable_obstack, *current_obstack;
39:
1.1.1.14 root 40: extern rtx stack_slot_list;
41:
1.1 root 42: #define MIN(x,y) ((x < y) ? x : y)
43:
44: extern tree pushdecl ();
1.1.1.14 root 45: extern tree poplevel ();
1.1.1.5 root 46:
47: /* Default max number of insns a function can have and still be inline.
48: This is overridden on RISC machines. */
49: #ifndef INTEGRATE_THRESHOLD
50: #define INTEGRATE_THRESHOLD(DECL) \
1.1.1.14 root 51: (8 * (8 + list_length (DECL_ARGUMENTS (DECL))))
1.1.1.5 root 52: #endif
1.1 root 53:
54: /* This is the target of the inline function being expanded,
55: or NULL if there is none. */
56: static rtx inline_target;
57:
58: /* We must take special care not to disrupt life too severely
59: when performing procedure integration. One thing that that
60: involves is not creating illegitimate address which reload
61: cannot fix. Since we don't know what the frame pointer is
62: not capable of (in a machine independent way), we create
63: a pseudo-frame pointer which will have to do for now. */
64: static rtx inline_fp_rtx;
65:
66: /* Convert old frame-pointer offsets to new. Parameters which only
67: produce values (no addresses, and are never assigned), map directly
68: to the pseudo-reg of the incoming value. Parameters that are
69: assigned to but do not have their address taken are given a fresh
70: pseudo-register. Parameters that have their address take are
71: given a fresh stack-slot. */
72: static rtx *parm_map;
73:
74: /* ?? Should this be done here?? It is not right now.
75: Keep track of whether a given pseudo-register is the sum
76: of the frame pointer and a const_int (or zero). */
77: static char *fp_addr_p;
78:
79: /* For the local variables of the procdure being integrated that live
80: on the frame, FRAME_POINTER_DELTA says how much to change their
81: offsets by, so that they now live in the correct place on the
82: frame of the function being compiled. */
83: static int fp_delta;
84:
1.1.1.11 root 85: /* When an insn is being copied by copy_rtx_and_substitute,
86: this is nonzero if we have copied an ASM_OPERANDS.
87: In that case, it is the original input-operand vector.
88: Likewise in copy_for_inline. */
89: static rtvec orig_asm_operands_vector;
90:
91: /* When an insn is being copied by copy_rtx_and_substitute,
92: this is nonzero if we have copied an ASM_OPERANDS.
93: In that case, it is the copied input-operand vector.
94: Likewise in copy_for_inline. */
95: static rtvec copy_asm_operands_vector;
96:
1.1.1.14 root 97: /* Likewise, this is the copied constraints vector. */
98: static rtvec copy_asm_constraints_vector;
99:
1.1 root 100: /* Return a copy of an rtx (as needed), substituting pseudo-register,
101: labels, and frame-pointer offsets as necessary. */
102: static rtx copy_rtx_and_substitute ();
1.1.1.7 root 103: /* Variant, used for memory addresses that are not memory_address_p. */
104: static rtx copy_address ();
1.1 root 105:
1.1.1.14 root 106: /* Return the rtx corresponding to a given index in the stack arguments. */
107: static rtx access_parm_map ();
108:
1.1 root 109: static void copy_parm_decls ();
110: static void copy_decl_tree ();
111:
112: static rtx try_fold_cc0 ();
113:
114: /* We do some simple constant folding optimization. This optimization
115: really exists primarily to save time inlining a function. It
1.1.1.5 root 116: also helps users who ask for inline functions without -O. */
1.1 root 117: static rtx fold_out_const_cc0 ();
118:
119: /* Zero if the current function (whose FUNCTION_DECL is FNDECL)
120: is safe and reasonable to integrate into other functions.
121: Nonzero means value is a warning message with a single %s
122: for the function's name. */
123:
124: char *
125: function_cannot_inline_p (fndecl)
126: register tree fndecl;
127: {
128: register rtx insn;
129: tree last = tree_last (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1.1.1.5 root 130: int max_insns = INTEGRATE_THRESHOLD (fndecl);
1.1 root 131: register int ninsns = 0;
132: register tree parms;
133:
134: /* No inlines with varargs. `grokdeclarator' gives a warning
135: message about that if `inline' is specified. This code
136: it put in to catch the volunteers. */
137: if (last && TREE_VALUE (last) != void_type_node)
1.1.1.7 root 138: return "varargs function cannot be inline";
1.1 root 139:
1.1.1.15 root 140: if (current_function_calls_alloca)
141: return "function using alloca cannot be inline";
142:
1.1 root 143: /* If its not even close, don't even look. */
1.1.1.14 root 144: if (!TREE_INLINE (fndecl) && get_max_uid () > 3 * max_insns)
1.1.1.7 root 145: return "function too large to be inline";
1.1 root 146:
1.1.1.14 root 147: /* We can't inline functions that return structures
148: the old-fashioned PCC way, copying into a static block. */
149: #ifdef PCC_STATIC_STRUCT_RETURN
150: if (flag_pcc_struct_return
151: && (TYPE_MODE (TREE_TYPE (TREE_TYPE (fndecl))) == BLKmode
152: || RETURN_IN_MEMORY (TREE_TYPE (TREE_TYPE (fndecl)))))
1.1.1.13 root 153: return "inline functions not supported for this return value type";
1.1.1.11 root 154: #endif
155:
1.1 root 156: /* Don't inline functions which have BLKmode arguments.
157: Don't inline functions that take the address of
158: a parameter and do not specify a function prototype. */
159: for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
160: {
161: if (TYPE_MODE (TREE_TYPE (parms)) == BLKmode)
1.1.1.7 root 162: return "function with large aggregate parameter cannot be inline";
1.1 root 163: if (last == NULL_TREE && TREE_ADDRESSABLE (parms))
1.1.1.7 root 164: return "no prototype, and parameter address used; cannot be inline";
1.1.1.11 root 165: /* If an aggregate is thought of as "in memory"
166: then its components are referred to by narrower memory refs.
167: If the actual parameter is a reg, these refs can't be translated,
168: esp. since copy_rtx_and_substitute doesn't know whether it is
169: reading or writing. */
170: if ((TREE_CODE (TREE_TYPE (parms)) == RECORD_TYPE
171: || TREE_CODE (TREE_TYPE (parms)) == UNION_TYPE)
172: && GET_CODE (DECL_RTL (parms)) == MEM)
173: return "address of an aggregate parameter is used; cannot be inline";
1.1 root 174: }
175:
1.1.1.14 root 176: if (!TREE_INLINE (fndecl) && get_max_uid () > max_insns)
1.1 root 177: {
178: for (ninsns = 0, insn = get_first_nonparm_insn (); insn && ninsns < max_insns;
179: insn = NEXT_INSN (insn))
180: {
181: if (GET_CODE (insn) == INSN
182: || GET_CODE (insn) == JUMP_INSN
183: || GET_CODE (insn) == CALL_INSN)
184: ninsns++;
185: }
186:
187: if (ninsns >= max_insns)
1.1.1.7 root 188: return "function too large to be inline";
1.1 root 189: }
190:
191: return 0;
192: }
193:
194: /* Variables used within save_for_inline. */
195:
196: /* Mapping from old pesudo-register to new pseudo-registers.
197: The first element of this map is reg_map[FIRST_PSEUDO_REGISTER].
1.1.1.6 root 198: It is allocated in `save_for_inline' and `expand_inline_function',
1.1 root 199: and deallocated on exit from each of those routines. */
200: static rtx *reg_map;
201:
202: /* Mapping from old code-labels to new code-labels.
203: The first element of this map is label_map[min_labelno].
1.1.1.6 root 204: It is allocated in `save_for_inline' and `expand_inline_function',
1.1 root 205: and deallocated on exit from each of those routines. */
206: static rtx *label_map;
207:
1.1.1.6 root 208: /* Mapping from old insn uid's to copied insns.
209: It is allocated in `save_for_inline' and `expand_inline_function',
210: and deallocated on exit from each of those routines. */
211: static rtx *insn_map;
212:
1.1 root 213: /* Map pseudo reg number into the PARM_DECL for the parm living in the reg.
214: Zero for a reg that isn't a parm's home.
215: Only reg numbers less than max_parm_reg are mapped here. */
216: static tree *parmdecl_map;
217:
218: /* Keep track of first pseudo-register beyond those that are parms. */
219: static int max_parm_reg;
220:
1.1.1.7 root 221: /* Offset from arg ptr to the first parm of this inline function. */
222: static int first_parm_offset;
223:
1.1 root 224: /* On machines that perform a function return with a single
225: instruction, such as the VAX, these return insns must be
226: mapped into branch statements. */
227: extern rtx return_label;
228:
229: /* Copy an rtx for save_for_inline. */
230: static rtx copy_for_inline ();
231:
232: /* Make the insns and PARM_DECLs of the current function permanent
233: and record other information in DECL_SAVED_INSNS to allow inlining
234: of this function in subsequent calls. */
235:
236: void
237: save_for_inline (fndecl)
238: tree fndecl;
239: {
240: extern rtx *regno_reg_rtx; /* in emit-rtl.c. */
241: extern current_function_args_size;
242:
243: rtx first_insn, last_insn, insn;
244: rtx head, copy;
245: tree parms;
246: int max_labelno, min_labelno, i, len;
247: int max_reg;
1.1.1.6 root 248: int max_uid;
1.1 root 249:
250: /* Make and emit a return-label if we have not already done so. */
251:
252: if (return_label == 0)
253: {
254: return_label = gen_label_rtx ();
255: emit_label (return_label);
256: }
257:
258: /* Get some bounds on the labels and registers used. */
259:
260: max_labelno = max_label_num ();
261: min_labelno = get_first_label_num ();
262: max_parm_reg = max_parm_reg_num ();
263: max_reg = max_reg_num ();
264:
265: /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
266:
267: Set TREE_VOLATILE to 0 if the parm is in a register, otherwise 1.
268: Later we set TREE_READONLY to 0 if the parm is modified inside the fn. */
269:
270: parmdecl_map = (tree *) alloca (max_parm_reg * sizeof (tree));
1.1.1.3 root 271: bzero (parmdecl_map, max_parm_reg * sizeof (tree));
1.1 root 272:
273: for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
274: {
275: rtx p = DECL_RTL (parms);
276:
277: if (GET_CODE (p) == REG)
278: {
279: parmdecl_map[REGNO (p)] = parms;
280: TREE_VOLATILE (parms) = 0;
281: }
282: else
283: TREE_VOLATILE (parms) = 1;
284: TREE_READONLY (parms) = 1;
285: }
286:
287: /* The list of DECL_SAVES_INSNS, starts off with a header which
288: contains the following information:
289:
290: the first insn of the function (not including the insns that copy
291: parameters into registers).
292: the first label used by that function,
293: the last label used by that function,
294: and the total number of registers used. */
295:
296: head = gen_inline_header_rtx (NULL, NULL, min_labelno, max_labelno,
297: max_parm_reg, max_reg,
1.1.1.14 root 298: current_function_args_size, stack_slot_list);
1.1.1.6 root 299: max_uid = INSN_UID (head);
1.1 root 300:
301: /* We have now allocated all that needs to be allocated permanently
302: on the rtx obstack. Set our high-water mark, so that we
303: can free the rest of this when the time comes. */
304:
305: preserve_data ();
306:
307: /* Copy the chain insns of this function.
308: Install the copied chain as the insns of this function,
309: for continued compilation;
310: the original chain is recorded as the DECL_SAVED_INSNS
311: for inlining future calls. */
312:
313: /* If there are insns that copy parms from the stack into pseudo registers,
314: those insns are not copied. `expand_inline_function' must
315: emit the correct code to handle such things. */
316:
317: insn = get_insns ();
318: if (GET_CODE (insn) != NOTE)
319: abort ();
320: first_insn = rtx_alloc (NOTE);
321: NOTE_SOURCE_FILE (first_insn) = NOTE_SOURCE_FILE (insn);
322: NOTE_LINE_NUMBER (first_insn) = NOTE_LINE_NUMBER (insn);
323: INSN_UID (first_insn) = INSN_UID (insn);
324: PREV_INSN (first_insn) = NULL;
325: NEXT_INSN (first_insn) = NULL;
326: last_insn = first_insn;
327:
328: /* Each pseudo-reg in the old insn chain must have a unique rtx in the copy.
329: Make these new rtx's now, and install them in regno_reg_rtx, so they
330: will be the official pseudo-reg rtx's for the rest of compilation. */
331:
332: reg_map = (rtx *) alloca ((max_reg + 1) * sizeof (rtx));
333:
334: len = sizeof (struct rtx_def) + (GET_RTX_LENGTH (REG) - 1) * sizeof (rtunion);
335: for (i = max_reg - 1; i >= FIRST_PSEUDO_REGISTER; i--)
336: reg_map[i] = (rtx)obstack_copy (&maybepermanent_obstack, regno_reg_rtx[i], len);
337: bcopy (reg_map + FIRST_PSEUDO_REGISTER,
338: regno_reg_rtx + FIRST_PSEUDO_REGISTER,
1.1.1.7 root 339: (max_reg - FIRST_PSEUDO_REGISTER) * sizeof (rtx));
1.1 root 340:
341: /* Likewise each label rtx must have a unique rtx as its copy. */
342:
343: label_map = (rtx *)alloca ((max_labelno - min_labelno) * sizeof (rtx));
344: label_map -= min_labelno;
345:
346: for (i = min_labelno; i < max_labelno; i++)
347: label_map[i] = gen_label_rtx ();
348:
1.1.1.6 root 349: /* Record the mapping of old insns to copied insns. */
350:
351: insn_map = (rtx *) alloca (max_uid * sizeof (rtx));
352: bzero (insn_map, max_uid * sizeof (rtx));
353:
1.1 root 354: /* Now copy the chain of insns. */
355:
356: for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
357: {
1.1.1.11 root 358: orig_asm_operands_vector = 0;
359: copy_asm_operands_vector = 0;
360:
1.1 root 361: switch (GET_CODE (insn))
362: {
363: case NOTE:
1.1.1.15 root 364: /* No need to keep these. */
365: if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_DELETED)
1.1.1.7 root 366: continue;
367:
1.1 root 368: copy = rtx_alloc (NOTE);
369: NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
370: NOTE_LINE_NUMBER (copy) = NOTE_LINE_NUMBER (insn);
371: break;
372:
373: case INSN:
374: case CALL_INSN:
375: case JUMP_INSN:
376: copy = rtx_alloc (GET_CODE (insn));
377: PATTERN (copy) = copy_for_inline (PATTERN (insn));
378: INSN_CODE (copy) = -1;
379: LOG_LINKS (copy) = NULL;
1.1.1.14 root 380: RTX_INTEGRATED_P (copy) = RTX_INTEGRATED_P (insn);
1.1 root 381: break;
382:
383: case CODE_LABEL:
384: copy = label_map[CODE_LABEL_NUMBER (insn)];
385: break;
386:
387: case BARRIER:
388: copy = rtx_alloc (BARRIER);
389: break;
390:
391: default:
392: abort ();
393: }
394: INSN_UID (copy) = INSN_UID (insn);
1.1.1.6 root 395: insn_map[INSN_UID (insn)] = copy;
1.1 root 396: NEXT_INSN (last_insn) = copy;
397: PREV_INSN (copy) = last_insn;
398: last_insn = copy;
399: }
400:
1.1.1.16! root 401: /* Now copy the reg notes of the insns.
! 402: Do this now because there can be forward references. */
! 403: for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
! 404: if (GET_CODE (insn) == INSN || GET_CODE (insn) == JUMP_INSN
! 405: || GET_CODE (insn) == CALL_INSN)
! 406: {
! 407: rtx copy = insn_map[INSN_UID (insn)];
! 408: REG_NOTES (copy) = copy_for_inline (REG_NOTES (insn));
! 409: }
! 410:
1.1 root 411: NEXT_INSN (last_insn) = NULL;
412:
413: NEXT_INSN (head) = get_first_nonparm_insn ();
414: FIRST_PARM_INSN (head) = get_insns ();
415: DECL_SAVED_INSNS (fndecl) = head;
416: DECL_FRAME_SIZE (fndecl) = get_frame_size ();
417: TREE_INLINE (fndecl) = 1;
418:
419: parmdecl_map = 0;
420: label_map = 0;
421: reg_map = 0;
422: return_label = 0;
423:
424: set_new_first_and_last_insn (first_insn, last_insn);
425: }
426:
427: /* Copy the rtx ORIG recursively, replacing pseudo-regs and labels
428: according to `reg_map' and `label_map'.
429: All other kinds of rtx are copied except those that can never be
430: changed during compilation. */
431:
432: static rtx
433: copy_for_inline (orig)
434: rtx orig;
435: {
436: register rtx x = orig;
437: register int i;
438: register enum rtx_code code;
439: register char *format_ptr;
440:
441: if (x == 0)
442: return x;
443:
444: code = GET_CODE (x);
445:
446: /* These types may be freely shared. */
447:
448: switch (code)
449: {
450: case QUEUED:
451: case CONST_INT:
452: case CONST_DOUBLE:
453: case SYMBOL_REF:
454: case PC:
455: case CC0:
456: return x;
457:
1.1.1.11 root 458: case ASM_OPERANDS:
459: /* If a single asm insn contains multiple output operands
460: then it contains multiple ASM_OPERANDS rtx's that share operand 3.
461: We must make sure that the copied insn continues to share it. */
462: if (orig_asm_operands_vector == XVEC (orig, 3))
463: {
464: x = rtx_alloc (ASM_OPERANDS);
465: XSTR (x, 0) = XSTR (orig, 0);
466: XSTR (x, 1) = XSTR (orig, 1);
467: XINT (x, 2) = XINT (orig, 2);
468: XVEC (x, 3) = copy_asm_operands_vector;
1.1.1.14 root 469: XVEC (x, 4) = copy_asm_constraints_vector;
470: XSTR (x, 5) = XSTR (orig, 5);
471: XINT (x, 6) = XINT (orig, 6);
1.1.1.11 root 472: return x;
473: }
474: break;
475:
1.1 root 476: case MEM:
477: /* A MEM is allowed to be shared if its address is constant
478: or is a constant plus one of the special registers. */
479: if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
480: return x;
1.1.1.14 root 481: #if 0 /* This is turned off because it is possible for
482: unshare_all_rtl to copy the address, into memory that won't be saved.
483: Although the MEM can safely be shared, and won't be copied there,
484: the address itself cannot be shared, and may need to be copied. */
1.1 root 485: if (GET_CODE (XEXP (x, 0)) == PLUS
486: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
487: && (REGNO (XEXP (XEXP (x, 0), 0)) == FRAME_POINTER_REGNUM
488: || REGNO (XEXP (XEXP (x, 0), 0)) == ARG_POINTER_REGNUM)
489: && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
1.1.1.14 root 490: #if 0
491: /* This statement was accidentally deleted in the remote past.
492: Reinsert it for 1.37. Don't take the risk now. */
493: return x;
494: #endif
1.1 root 495: if (GET_CODE (XEXP (x, 0)) == REG
496: && (REGNO (XEXP (x, 0)) == FRAME_POINTER_REGNUM
497: || REGNO (XEXP (x, 0)) == ARG_POINTER_REGNUM)
498: && CONSTANT_ADDRESS_P (XEXP (x, 1)))
499: return x;
1.1.1.14 root 500: #endif /* 0 */
1.1 root 501: break;
502:
503: case LABEL_REF:
504: {
505: /* Must point to the new insn. */
506: return gen_rtx (LABEL_REF, GET_MODE (orig),
507: label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))]);
508: }
509:
510: case REG:
511: if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
512: return reg_map [REGNO (x)];
513: else
514: return x;
515:
516: /* If a parm that gets modified lives in a pseudo-reg,
517: set its TREE_VOLATILE to prevent certain optimizations. */
518: case SET:
519: {
520: rtx dest = SET_DEST (x);
521:
522: if (GET_CODE (dest) == REG
523: && REGNO (dest) < max_parm_reg
1.1.1.3 root 524: && REGNO (dest) >= FIRST_PSEUDO_REGISTER
525: && parmdecl_map[REGNO (dest)] != 0)
1.1 root 526: TREE_READONLY (parmdecl_map[REGNO (dest)]) = 0;
527: }
528: break;
529: }
530:
531: /* Replace this rtx with a copy of itself. */
532:
533: x = rtx_alloc (code);
1.1.1.15 root 534: bcopy (orig, x, (sizeof (*x) - sizeof (x->fld)
535: + sizeof (x->fld[0]) * GET_RTX_LENGTH (code)));
1.1 root 536:
537: /* Now scan the subexpressions recursively.
538: We can store any replaced subexpressions directly into X
539: since we know X is not shared! Any vectors in X
540: must be copied if X was copied. */
541:
542: format_ptr = GET_RTX_FORMAT (code);
543:
544: for (i = 0; i < GET_RTX_LENGTH (code); i++)
545: {
546: switch (*format_ptr++)
547: {
548: case 'e':
549: XEXP (x, i) = copy_for_inline (XEXP (x, i));
550: break;
551:
1.1.1.6 root 552: case 'u':
553: /* Change any references to old-insns to point to the
554: corresponding copied insns. */
1.1.1.15 root 555: XEXP (x, i) = insn_map[INSN_UID (XEXP (x, i))];
556: break;
1.1.1.6 root 557:
1.1 root 558: case 'E':
1.1.1.6 root 559: if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
1.1 root 560: {
561: register int j;
562:
563: XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
564: for (j = 0; j < XVECLEN (x, i); j++)
565: XVECEXP (x, i, j)
566: = copy_for_inline (XVECEXP (x, i, j));
567: }
568: break;
569: }
570: }
1.1.1.11 root 571:
572: if (code == ASM_OPERANDS && orig_asm_operands_vector == 0)
573: {
574: orig_asm_operands_vector = XVEC (orig, 3);
575: copy_asm_operands_vector = XVEC (x, 3);
1.1.1.14 root 576: copy_asm_constraints_vector = XVEC (x, 4);
1.1.1.11 root 577: }
578:
1.1 root 579: return x;
580: }
581:
582: /* Integrate the procedure defined by FNDECL. Note that this function
583: may wind up calling itself. Since the static variables are not
584: reentrant, we do not assign them until after the possibility
585: or recursion is eliminated.
586:
587: If IGNORE is nonzero, do not produce a value.
588: Otherwise store the value in TARGET if it is nonzero and that is convenient.
589:
590: Value is:
591: (rtx)-1 if we could not substitute the function
592: 0 if we substituted it and it does not produce a value
593: else an rtx for where the value is stored. */
594:
595: rtx
596: expand_inline_function (fndecl, parms, target, ignore, type, structure_value_addr)
597: tree fndecl, parms;
598: rtx target;
599: int ignore;
600: tree type;
601: rtx structure_value_addr;
602: {
603: tree formal, actual;
604: rtx header = DECL_SAVED_INSNS (fndecl);
605: rtx insns = FIRST_FUNCTION_INSN (header);
1.1.1.15 root 606: rtx parm_insns = FIRST_PARM_INSN (header);
1.1.1.9 root 607: rtx insn;
1.1 root 608: int max_regno = MAX_REGNUM (header) + 1;
609: register int i;
610: int min_labelno = FIRST_LABELNO (header);
611: int max_labelno = LAST_LABELNO (header);
612: int nargs;
613: rtx *arg_vec;
1.1.1.9 root 614: rtx local_return_label = 0;
1.1 root 615: rtx follows_call = 0;
1.1.1.7 root 616: rtx this_struct_value_rtx = 0;
1.1 root 617:
618: if (max_regno < FIRST_PSEUDO_REGISTER)
1.1.1.3 root 619: abort ();
1.1 root 620:
621: nargs = list_length (DECL_ARGUMENTS (fndecl));
622:
623: /* We expect PARMS to have the right length; don't crash if not. */
624: if (list_length (parms) != nargs)
625: return (rtx)-1;
1.1.1.13 root 626: /* Also check that the parms type match. Since the appropriate
627: conversions or default promotions have already been applied,
628: the machine modes should match exactly. */
629: for (formal = DECL_ARGUMENTS (fndecl),
630: actual = parms;
631: formal;
632: formal = TREE_CHAIN (formal),
633: actual = TREE_CHAIN (actual))
634: {
635: tree arg = TREE_VALUE (actual);
636: enum machine_mode mode = TYPE_MODE (DECL_ARG_TYPE (formal));
637: if (mode != TYPE_MODE (TREE_TYPE (arg)))
638: return (rtx)-1;
639: /* If they are block mode, the types should match exactly. */
640: if (mode == BLKmode && TREE_TYPE (arg) != TREE_TYPE (formal))
641: return (rtx)-1;
642: }
1.1 root 643:
1.1.1.14 root 644: /* Make a binding contour to keep inline cleanups called at
645: outer function-scope level from looking like they are shadowing
646: parameter declarations. */
647: pushlevel (0);
648:
1.1 root 649: /* Make a fresh binding contour that we can easily remove. */
650: pushlevel (0);
651: expand_start_bindings (0);
1.1.1.15 root 652: if (GET_CODE (parm_insns) == NOTE
653: && NOTE_LINE_NUMBER (parm_insns) < 0)
654: emit_note (NOTE_SOURCE_FILE (parm_insns), NOTE_LINE_NUMBER (parm_insns));
1.1 root 655:
656: /* Get all the actual args as RTL, and store them in ARG_VEC. */
657:
658: arg_vec = (rtx *)alloca (nargs * sizeof (rtx));
659:
660: for (formal = DECL_ARGUMENTS (fndecl),
661: actual = parms,
662: i = 0;
663: formal;
664: formal = TREE_CHAIN (formal),
665: actual = TREE_CHAIN (actual),
666: i++)
667: {
1.1.1.14 root 668: /* Actual parameter, already converted to DECL_ARG_TYPE (formal). */
669: tree arg = TREE_VALUE (actual);
670: /* Mode of the value supplied. */
1.1.1.13 root 671: enum machine_mode tmode = TYPE_MODE (DECL_ARG_TYPE (formal));
1.1.1.14 root 672: /* Mode of the variable used within the function. */
1.1.1.13 root 673: enum machine_mode imode = TYPE_MODE (TREE_TYPE (formal));
1.1 root 674: rtx copy;
675:
1.1.1.7 root 676: emit_note (DECL_SOURCE_FILE (formal), DECL_SOURCE_LINE (formal));
1.1 root 677:
1.1.1.14 root 678: /* Make a place to hold the argument value, still in mode TMODE,
679: and put it in COPY. */
1.1 root 680: if (TREE_ADDRESSABLE (formal))
681: {
1.1.1.14 root 682: int size = int_size_in_bytes (DECL_ARG_TYPE (formal));
1.1 root 683: copy = assign_stack_local (tmode, size);
1.1.1.12 root 684: if (!memory_address_p (DECL_MODE (formal), XEXP (copy, 0)))
685: copy = change_address (copy, VOIDmode, copy_rtx (XEXP (copy, 0)));
1.1 root 686: store_expr (arg, copy, 0);
687: }
688: else if (! TREE_READONLY (formal)
689: || TREE_VOLATILE (formal))
690: {
691: /* If parm is modified or if it hasn't a pseudo reg,
692: we may not simply substitute the actual value;
693: copy it through a register. */
694: copy = gen_reg_rtx (tmode);
695: store_expr (arg, copy, 0);
696: }
697: else
698: {
699: copy = expand_expr (arg, 0, tmode, 0);
700:
701: /* We do not use CONSTANT_ADDRESS_P here because
702: the set of cases where that might make a difference
703: are a subset of the cases that arise even when
704: it is a CONSTANT_ADDRESS_P (i.e., fp_delta
705: gets into the act. */
706: if (GET_CODE (copy) != REG && ! CONSTANT_P (copy))
707: copy = copy_to_reg (copy);
708: }
1.1.1.13 root 709: /* If passed mode != nominal mode, COPY is now the passed mode.
710: Convert it to the nominal mode (i.e. truncate it). */
711: if (tmode != imode)
1.1.1.14 root 712: copy = convert_to_mode (imode, copy, 0);
1.1 root 713: arg_vec[i] = copy;
714: }
715:
716: copy_parm_decls (DECL_ARGUMENTS (fndecl), arg_vec);
717:
718: /* Perform postincrements before actually calling the function. */
719: emit_queue ();
720:
721: /* clean up stack so that variables might have smaller offsets. */
722: do_pending_stack_adjust ();
723:
724: /* Pass the function the address in which to return a structure value. */
725: if (structure_value_addr)
1.1.1.7 root 726: {
1.1.1.14 root 727: if (GET_CODE (structure_value_addr) == REG
728: && (struct_value_rtx == 0 || GET_CODE (struct_value_rtx) == MEM))
729: this_struct_value_rtx = structure_value_addr;
1.1.1.7 root 730: else
1.1.1.14 root 731: this_struct_value_rtx = copy_to_mode_reg (Pmode, structure_value_addr);
1.1.1.7 root 732: }
1.1 root 733:
734: /* Now prepare for copying the insns.
735: Set up reg_map, parm_map and label_map saying how to translate
736: the pseudo-registers, stack-parm references and labels when copying. */
737:
738: reg_map = (rtx *) alloca (max_regno * sizeof (rtx));
739: bzero (reg_map, max_regno * sizeof (rtx));
740:
1.1.1.15 root 741: parm_map = (rtx *)alloca ((FUNCTION_ARGS_SIZE (header) + UNITS_PER_WORD - 1)
742: / UNITS_PER_WORD * sizeof (rtx));
743: bzero (parm_map, ((FUNCTION_ARGS_SIZE (header) + UNITS_PER_WORD - 1)
744: / UNITS_PER_WORD * sizeof (rtx)));
1.1.1.14 root 745:
746: /* Note that expand_expr (called above) can clobber first_parm_offset. */
747: first_parm_offset = FIRST_PARM_OFFSET (fndecl);
748: parm_map -= first_parm_offset / UNITS_PER_WORD;
749:
1.1 root 750: if (DECL_ARGUMENTS (fndecl))
751: {
752: tree decl = DECL_ARGUMENTS (fndecl);
753:
754: for (formal = decl, i = 0; formal; formal = TREE_CHAIN (formal), i++)
755: {
756: /* Create an entry in PARM_MAP that says what pseudo register
757: is associated with an address we might compute. */
1.1.1.7 root 758: if (DECL_OFFSET (formal) >= 0)
759: {
760: /* This parameter has a home in the stack. */
761: parm_map[DECL_OFFSET (formal) / BITS_PER_WORD] = arg_vec[i];
762: }
763: else
764: {
765: /* Parameter that was passed in a register;
766: does it have a home on the stack (as a local)? */
767: rtx frtx = DECL_RTL (formal);
768: rtx offset = 0;
769: if (GET_CODE (frtx) == MEM)
770: {
771: frtx = XEXP (frtx, 0);
772: if (GET_CODE (frtx) == PLUS)
773: {
774: if (XEXP (frtx, 0) == frame_pointer_rtx
775: && GET_CODE (XEXP (frtx, 1)) == CONST_INT)
776: offset = XEXP (frtx, 1);
777: else if (XEXP (frtx, 1) == frame_pointer_rtx
778: && GET_CODE (XEXP (frtx, 0)) == CONST_INT)
779: offset = XEXP (frtx, 0);
1.1.1.14 root 780: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
781: /* If there is a separate arg pointer
782: and REG_PARM_STACK_SPACE is defined,
783: parms passed in regs can be copied
784: to slots reached via the arg pointer. */
785: if (XEXP (frtx, 0) == arg_pointer_rtx
786: && GET_CODE (XEXP (frtx, 1)) == CONST_INT)
787: offset = XEXP (frtx, 1);
788: else if (XEXP (frtx, 1) == arg_pointer_rtx
789: && GET_CODE (XEXP (frtx, 0)) == CONST_INT)
790: offset = XEXP (frtx, 0);
791: #endif
1.1.1.7 root 792: }
793: if (offset)
794: parm_map[INTVAL (offset) / UNITS_PER_WORD] = arg_vec[i];
1.1.1.14 root 795: else if (TREE_TYPE (formal) != error_mark_node)
796: abort ();
1.1.1.7 root 797: }
798: else if (GET_CODE (frtx) != REG)
799: abort ();
800: }
1.1 root 801: /* Create an entry in REG_MAP that says what rtx is associated
802: with a pseudo register from the function being inlined. */
803: if (GET_CODE (DECL_RTL (formal)) == REG)
804: reg_map[REGNO (DECL_RTL (formal))] = arg_vec[i];
805: }
1.1.1.14 root 806: }
1.1.1.7 root 807:
1.1.1.14 root 808: #if 0 /* This was turned off when it was written,
809: because expand_call was changed not to need it. */
810: /* Handle the case where our caller offers a register target
811: but the called function wants to return the value in memory. */
812: if (this_struct_value_rtx == 0
813: && aggregate_value_p (DECL_RESULT (fndecl)))
814: {
815: enum machine_mode mode1 = GET_MODE (DECL_RTL (DECL_RESULT (fndecl)));
816: this_struct_value_rtx
817: = assign_stack_local (mode1, GET_MODE_SIZE (mode1));
818: target = 0;
1.1 root 819: }
1.1.1.14 root 820: #endif
821:
822: /* Make certain that we can accept struct_value_{incoming_rtx,rtx},
823: and map it. */
824: if (this_struct_value_rtx == 0)
825: ;
826: else if (GET_CODE (struct_value_incoming_rtx) == REG)
827: reg_map[REGNO (XEXP (DECL_RTL (DECL_RESULT (fndecl)), 0))]
828: = this_struct_value_rtx;
829: else if (GET_CODE (struct_value_incoming_rtx) == MEM
830: && XEXP (XEXP (struct_value_incoming_rtx, 0), 0) == frame_pointer_rtx
831: && GET_CODE (XEXP (XEXP (struct_value_incoming_rtx, 0), 1)) == CONST_INT)
832: reg_map[REGNO (XEXP (DECL_RTL (DECL_RESULT (fndecl)), 0))]
833: = this_struct_value_rtx;
834: #if 0
835: parm_map[INTVAL (XEXP (XEXP (struct_value_incoming_rtx, 0), 1)) / UNITS_PER_WORD]
836: = this_struct_value_rtx;
837: #endif
1.1 root 838: else
1.1.1.14 root 839: abort ();
1.1 root 840:
841: label_map = (rtx *)alloca ((max_labelno - min_labelno) * sizeof (rtx));
842: label_map -= min_labelno;
843:
844: for (i = min_labelno; i < max_labelno; i++)
845: label_map[i] = gen_label_rtx ();
846:
1.1.1.6 root 847: /* As we copy insns, record the correspondence, so that inter-insn
848: references can be copied into isomorphic structure. */
849:
850: insn_map = (rtx *) alloca (INSN_UID (header) * sizeof (rtx));
851: bzero (insn_map, INSN_UID (header) * sizeof (rtx));
852:
1.1 root 853: /* Set up a target to translate the inline function's value-register. */
854:
1.1.1.14 root 855: if (this_struct_value_rtx != 0 || TYPE_MODE (type) == VOIDmode)
1.1 root 856: inline_target = 0;
857: else
1.1.1.3 root 858: {
859: /* Machine mode function was declared to return. */
860: enum machine_mode departing_mode = TYPE_MODE (type);
861: /* (Possibly wider) machine mode it actually computes
862: (for the sake of callers that fail to declare it right). */
863: enum machine_mode arriving_mode
1.1.1.10 root 864: = TYPE_MODE (DECL_RESULT_TYPE (fndecl));
1.1.1.3 root 865:
1.1.1.5 root 866: /* Don't use MEMs as direct targets because on some machines
867: substituting a MEM for a REG makes invalid insns.
868: Let the combiner substitute the MEM if that is valid. */
869: if (target && GET_CODE (target) == REG
870: && GET_MODE (target) == departing_mode)
1.1.1.3 root 871: inline_target = target;
872: else
873: inline_target = target = gen_reg_rtx (departing_mode);
874:
875: /* If function's value was promoted before return,
876: avoid machine mode mismatch when we substitute INLINE_TARGET.
877: But TARGET is what we will return to the caller. */
878: if (arriving_mode != departing_mode)
879: inline_target = gen_rtx (SUBREG, arriving_mode, target, 0);
880: }
1.1 root 881:
1.1.1.14 root 882: /* Make space in current function's stack frame
883: for the stack frame of the inline function.
884: Adjust all frame-pointer references by the difference
885: between the offset to this space
886: and the offset to the equivalent space in the inline
887: function's frame.
888: This difference equals the size of preexisting locals. */
1.1 root 889:
890: fp_delta = get_frame_size ();
891: #ifdef FRAME_GROWS_DOWNWARD
892: fp_delta = - fp_delta;
893: #endif
894:
895: inline_fp_rtx
896: = copy_to_mode_reg (Pmode,
897: plus_constant (frame_pointer_rtx, fp_delta));
898:
899: /* Now allocate the space for that to point at. */
900:
901: assign_stack_local (VOIDmode, DECL_FRAME_SIZE (fndecl));
902:
903: /* Now copy the insns one by one. */
904:
905: for (insn = insns; insn; insn = NEXT_INSN (insn))
906: {
907: rtx copy, pattern, next = 0;
908:
1.1.1.11 root 909: orig_asm_operands_vector = 0;
910: copy_asm_operands_vector = 0;
911:
1.1 root 912: switch (GET_CODE (insn))
913: {
914: case INSN:
915: pattern = PATTERN (insn);
916:
917: /* Special handling for the insn immediately after a CALL_INSN
918: that returned a value:
919: If it does copy the value, we must avoid the usual translation
920: of the return-register into INLINE_TARGET.
921: If it just USEs the value, the inline function expects it to
922: stay in the return-register and be returned,
923: so copy it into INLINE_TARGET. */
924:
925: if (follows_call
926: /* Allow a stack-adjust, handled normally, to come in between
927: the call and the value-copying insn. */
928: && ! (GET_CODE (pattern) == SET
929: && SET_DEST (pattern) == stack_pointer_rtx))
930: {
931: if (GET_CODE (pattern) == SET
932: && rtx_equal_p (SET_SRC (pattern), follows_call))
933: /* This insn copies the value: take special care to copy
934: that value to this insn's destination. */
935: {
936: copy = emit_insn (gen_rtx (SET, VOIDmode,
937: copy_rtx_and_substitute (SET_DEST (pattern)),
938: follows_call));
1.1.1.9 root 939: RTX_INTEGRATED_P (copy) = 1;
1.1 root 940: follows_call = 0;
941: break;
942: }
943: else if (GET_CODE (pattern) == USE
944: && rtx_equal_p (XEXP (pattern, 0), follows_call))
945: /* This insn does nothing but says the value is expected
946: to flow through to the inline function's return-value.
947: Make that happen, then ignore this insn. */
948: {
949: copy = emit_insn (gen_rtx (SET, VOIDmode, inline_target,
950: follows_call));
1.1.1.9 root 951: RTX_INTEGRATED_P (copy) = 1;
1.1 root 952: follows_call = 0;
953: break;
954: }
955: /* If it does neither, this value must be ignored. */
956: follows_call = 0;
957: }
958:
959: /* The (USE (REG n)) at return from the function should be ignored
960: since we are changing (REG n) into inline_target. */
1.1.1.6 root 961: copy = 0;
1.1 root 962: if (GET_CODE (pattern) == USE
963: && GET_CODE (XEXP (pattern, 0)) == REG
1.1.1.5 root 964: && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1.1 root 965: break;
1.1.1.14 root 966: /* Ignore setting a function value that we don't want to use. */
967: if (inline_target == 0
968: && GET_CODE (pattern) == SET
969: && GET_CODE (SET_DEST (pattern)) == REG
970: && REG_FUNCTION_VALUE_P (SET_DEST (pattern)))
971: break;
1.1 root 972:
973: /* Try to do some quick constant folding here.
974: This will save save execution time of the compiler,
975: as well time and space of the program if done here. */
976: if (GET_CODE (pattern) == SET
977: && SET_DEST (pattern) == cc0_rtx)
978: next = try_fold_cc0 (insn);
979:
980: if (next != 0)
981: {
982: insn = next;
983: }
984: else
985: {
1.1.1.14 root 986: rtx note = find_reg_note (insn, REG_EQUIV, 0);
987:
1.1 root 988: copy = emit_insn (copy_rtx_and_substitute (pattern));
1.1.1.9 root 989: RTX_INTEGRATED_P (copy) = 1;
1.1.1.14 root 990:
991: /* If we are copying an insn that loads a constant,
992: record the constantness. */
993: if (note)
994: REG_NOTES (copy)
995: = gen_rtx (EXPR_LIST, REG_EQUIV, XEXP (note, 0),
996: REG_NOTES (copy));
1.1 root 997: }
998: break;
999:
1000: case JUMP_INSN:
1001: follows_call = 0;
1002: if (GET_CODE (PATTERN (insn)) == RETURN)
1003: {
1.1.1.9 root 1004: if (local_return_label == 0)
1005: local_return_label = gen_label_rtx ();
1006: emit_jump (local_return_label);
1.1 root 1007: break;
1008: }
1009: copy = emit_jump_insn (copy_rtx_and_substitute (PATTERN (insn)));
1.1.1.9 root 1010: RTX_INTEGRATED_P (copy) = 1;
1.1 root 1011: break;
1012:
1013: case CALL_INSN:
1.1.1.6 root 1014: #if 0
1015: /* This should no longer be necessary now that references
1016: to this function's return value are flagged to distinguish
1017: them from other references to the same hard register. */
1.1 root 1018: {
1019: rtx newbod;
1020: /* If the call's body is (set (reg...) (call...)),
1021: the register is a function return register, but DON'T
1022: translate it into INLINE_TARGET because it describes the
1023: called function, not the caller's return value. */
1024: if (GET_CODE (PATTERN (insn)) == SET)
1025: newbod = gen_rtx (SET, VOIDmode, SET_DEST (PATTERN (insn)),
1026: copy_rtx_and_substitute (SET_SRC (PATTERN (insn))));
1.1.1.6 root 1027: else if (GET_CODE (PATTERN (insn)) == PARALLEL
1028: && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
1029: {
1030: register int j;
1031: rtx newelem;
1032: newbod = gen_rtx (PARALLEL, VOIDmode,
1033: rtvec_alloc (XVECLEN (PATTERN (insn), 0)));
1034: newelem = gen_rtx (SET, VOIDmode,
1035: SET_DEST (XVECEXP (PATTERN (insn), 0, 0)),
1036: copy_rtx_and_substitute (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))));
1037: XVECEXP (newbod, 0, 0) = newelem;
1038: for (j = 1; j < XVECLEN (newbod, 0); j++)
1039: XVECEXP (newbod, 0, j)
1040: = copy_rtx_and_substitute (XVECEXP (PATTERN (insn), 0, j));
1041: }
1.1 root 1042: else
1043: newbod = copy_rtx_and_substitute (PATTERN (insn));
1044: copy = emit_call_insn (newbod);
1045: }
1.1.1.6 root 1046: #else /* 1 */
1047: copy = emit_call_insn (copy_rtx_and_substitute (PATTERN (insn)));
1048: #endif /* 1 */
1.1.1.9 root 1049: RTX_INTEGRATED_P (copy) = 1;
1.1 root 1050: /* Special handling needed for the following INSN depending on
1051: whether it copies the value from the fcn return reg. */
1052: if (GET_CODE (PATTERN (insn)) == SET)
1053: follows_call = SET_DEST (PATTERN (insn));
1.1.1.15 root 1054: else if (GET_CODE (PATTERN (insn)) == PARALLEL
1055: && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
1056: follows_call = SET_DEST (XVECEXP (PATTERN (insn), 0, 0));
1.1 root 1057: break;
1058:
1059: case CODE_LABEL:
1.1.1.6 root 1060: copy = emit_label (label_map[CODE_LABEL_NUMBER (insn)]);
1.1 root 1061: follows_call = 0;
1062: break;
1063:
1064: case BARRIER:
1.1.1.6 root 1065: copy = emit_barrier ();
1.1 root 1066: break;
1067:
1068: case NOTE:
1.1.1.14 root 1069: if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END
1070: && NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_BEG)
1.1.1.7 root 1071: copy = emit_note (NOTE_SOURCE_FILE (insn), NOTE_LINE_NUMBER (insn));
1072: else
1073: copy = 0;
1.1 root 1074: break;
1075:
1076: default:
1077: abort ();
1078: break;
1079: }
1.1.1.6 root 1080:
1081: insn_map[INSN_UID (insn)] = copy;
1.1 root 1082: }
1083:
1.1.1.9 root 1084: if (local_return_label)
1085: emit_label (local_return_label);
1.1 root 1086:
1087: /* Make copies of the decls of the symbols in the inline function, so that
1088: the copies of the variables get declared in the current function. */
1089: copy_decl_tree (DECL_INITIAL (fndecl), 0);
1090:
1091: /* End the scope containing the copied formal parameter variables. */
1092:
1.1.1.10 root 1093: expand_end_bindings (getdecls (), 1, 1);
1.1 root 1094: poplevel (1, 1, 0);
1.1.1.14 root 1095: poplevel (0, 0, 0);
1.1 root 1096:
1.1.1.15 root 1097: emit_line_note (input_filename, lineno);
1.1 root 1098: reg_map = NULL;
1099: label_map = NULL;
1100:
1101: if (ignore || TYPE_MODE (type) == VOIDmode)
1102: return 0;
1103:
1104: if (structure_value_addr)
1105: {
1106: if (target)
1107: return target;
1.1.1.14 root 1108: return gen_rtx (MEM, TYPE_MODE (type),
1.1 root 1109: memory_address (BLKmode, structure_value_addr));
1110: }
1111:
1.1.1.3 root 1112: return target;
1.1 root 1113: }
1114:
1115: /* Given a chain of PARM_DECLs, ARGS, and a vector of RTL homes VEC,
1116: copy each decl into a VAR_DECL, push all of those decls
1117: and give each one the corresponding home. */
1118:
1119: static void
1120: copy_parm_decls (args, vec)
1121: tree args;
1122: rtx *vec;
1123: {
1124: register tree tail;
1125: register int i;
1126:
1127: for (tail = args, i = 0; tail; tail = TREE_CHAIN (tail), i++)
1128: {
1129: register tree decl = pushdecl (build_decl (VAR_DECL, DECL_NAME (tail),
1130: TREE_TYPE (tail)));
1.1.1.9 root 1131: /* These args would always appear unused, if not for this. */
1132: TREE_USED (decl) = 1;
1.1.1.16! root 1133: /* Prevent warning for shadowing with these. */
! 1134: TREE_INLINE (decl) = 1;
1.1 root 1135: DECL_RTL (decl) = vec[i];
1136: }
1137: }
1138:
1139: /* Given a LET_STMT node, push decls and levels
1140: so as to construct in the current function a tree of contexts
1141: isomorphic to the one that is given. */
1142:
1143: static void
1144: copy_decl_tree (let, level)
1145: tree let;
1146: int level;
1147: {
1.1.1.14 root 1148: tree t, node;
1.1 root 1149:
1150: pushlevel (0);
1151:
1152: for (t = STMT_VARS (let); t; t = TREE_CHAIN (t))
1153: {
1154: tree d = build_decl (TREE_CODE (t), DECL_NAME (t), TREE_TYPE (t));
1155: DECL_SOURCE_LINE (d) = DECL_SOURCE_LINE (t);
1156: DECL_SOURCE_FILE (d) = DECL_SOURCE_FILE (t);
1157: if (DECL_RTL (t) != 0)
1.1.1.8 root 1158: {
1159: if (GET_CODE (DECL_RTL (t)) == MEM
1160: && CONSTANT_ADDRESS_P (XEXP (DECL_RTL (t), 0)))
1161: /* copy_rtx_and_substitute would call memory_address
1162: which would copy the address into a register.
1163: Then debugging-output wouldn't know how to handle it. */
1164: DECL_RTL (d) = DECL_RTL (t);
1165: else
1166: DECL_RTL (d) = copy_rtx_and_substitute (DECL_RTL (t));
1167: }
1.1 root 1168: TREE_EXTERNAL (d) = TREE_EXTERNAL (t);
1169: TREE_STATIC (d) = TREE_STATIC (t);
1170: TREE_PUBLIC (d) = TREE_PUBLIC (t);
1171: TREE_LITERAL (d) = TREE_LITERAL (t);
1172: TREE_ADDRESSABLE (d) = TREE_ADDRESSABLE (t);
1173: TREE_READONLY (d) = TREE_READONLY (t);
1174: TREE_VOLATILE (d) = TREE_VOLATILE (t);
1.1.1.9 root 1175: /* These args would always appear unused, if not for this. */
1176: TREE_USED (d) = 1;
1.1.1.16! root 1177: /* Prevent warning for shadowing with these. */
! 1178: TREE_INLINE (d) = 1;
1.1 root 1179: pushdecl (d);
1180: }
1181:
1.1.1.14 root 1182: for (t = STMT_SUBBLOCKS (let); t; t = TREE_CHAIN (t))
1.1 root 1183: copy_decl_tree (t, level + 1);
1184:
1.1.1.14 root 1185: node = poplevel (level > 0, 0, 0);
1186: if (node)
1187: TREE_USED (node) = TREE_USED (let);
1.1 root 1188: }
1189:
1190: /* Create a new copy of an rtx.
1191: Recursively copies the operands of the rtx,
1192: except for those few rtx codes that are sharable. */
1193:
1194: static rtx
1195: copy_rtx_and_substitute (orig)
1196: register rtx orig;
1197: {
1198: register rtx copy, temp;
1199: register int i, j;
1200: register RTX_CODE code;
1201: register enum machine_mode mode;
1202: register char *format_ptr;
1203: int regno;
1204:
1205: if (orig == 0)
1206: return 0;
1207:
1208: code = GET_CODE (orig);
1209: mode = GET_MODE (orig);
1210:
1211: switch (code)
1212: {
1213: case REG:
1214: /* If a frame-pointer register shows up, then we
1215: must `fix' the reference. If the stack pointer
1216: register shows up, it must be part of stack-adjustments
1217: (*not* because we eliminated the frame pointer!).
1218: Small hard registers are returned as-is. Pseudo-registers
1219: go through their `reg_map'. */
1220: regno = REGNO (orig);
1221: if (regno < FIRST_PSEUDO_REGISTER)
1222: {
1.1.1.14 root 1223: /* Some hard registers are also mapped,
1224: but others are not translated. */
1225: if (reg_map[regno] != 0)
1226: return reg_map[regno];
1.1.1.5 root 1227: if (REG_FUNCTION_VALUE_P (orig))
1.1.1.9 root 1228: {
1229: /* This is a reference to the function return value. If
1230: the function doesn't have a return value, error.
1231: If it does, it may not be the same mode as `inline_target'
1232: because SUBREG is not required for hard regs.
1233: If not, adjust mode of inline_target to fit the context. */
1234: if (inline_target == 0)
1235: abort ();
1236: if (mode == GET_MODE (inline_target))
1237: return inline_target;
1238: return gen_rtx (SUBREG, mode, inline_target, 0);
1239: }
1.1 root 1240: if (regno == FRAME_POINTER_REGNUM)
1241: return plus_constant (orig, fp_delta);
1242: return orig;
1243: }
1244: if (reg_map[regno] == NULL)
1245: reg_map[regno] = gen_reg_rtx (mode);
1246: return reg_map[regno];
1247:
1.1.1.14 root 1248: case SUBREG:
1249: copy = copy_rtx_and_substitute (SUBREG_REG (orig));
1250: /* SUBREG is ordinary, but don't make nested SUBREGs. */
1251: if (GET_CODE (copy) == SUBREG)
1252: return gen_rtx (SUBREG, GET_MODE (orig), SUBREG_REG (copy),
1253: SUBREG_WORD (orig) + SUBREG_WORD (copy));
1254: return gen_rtx (SUBREG, GET_MODE (orig), copy,
1255: SUBREG_WORD (orig));
1256:
1.1 root 1257: case CODE_LABEL:
1258: return label_map[CODE_LABEL_NUMBER (orig)];
1259:
1260: case LABEL_REF:
1261: copy = rtx_alloc (LABEL_REF);
1262: PUT_MODE (copy, mode);
1263: XEXP (copy, 0) = label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))];
1264: return copy;
1265:
1266: case PC:
1267: case CC0:
1268: case CONST_INT:
1269: case CONST_DOUBLE:
1270: case SYMBOL_REF:
1271: return orig;
1272:
1.1.1.11 root 1273: case ASM_OPERANDS:
1274: /* If a single asm insn contains multiple output operands
1275: then it contains multiple ASM_OPERANDS rtx's that share operand 3.
1276: We must make sure that the copied insn continues to share it. */
1277: if (orig_asm_operands_vector == XVEC (orig, 3))
1278: {
1279: copy = rtx_alloc (ASM_OPERANDS);
1280: XSTR (copy, 0) = XSTR (orig, 0);
1281: XSTR (copy, 1) = XSTR (orig, 1);
1282: XINT (copy, 2) = XINT (orig, 2);
1283: XVEC (copy, 3) = copy_asm_operands_vector;
1.1.1.14 root 1284: XVEC (copy, 4) = copy_asm_constraints_vector;
1285: XSTR (copy, 5) = XSTR (orig, 5);
1286: XINT (copy, 6) = XINT (orig, 6);
1.1.1.11 root 1287: return copy;
1288: }
1289: break;
1290:
1.1.1.5 root 1291: case CALL:
1292: /* This is given special treatment because the first
1293: operand of a CALL is a (MEM ...) which may get
1294: forced into a register for cse. This is undesirable
1295: if function-address cse isn't wanted or if we won't do cse. */
1296: #ifndef NO_FUNCTION_CSE
1297: if (! (optimize && ! flag_no_function_cse))
1298: #endif
1299: return gen_rtx (CALL, GET_MODE (orig),
1300: gen_rtx (MEM, GET_MODE (XEXP (orig, 0)),
1301: copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0))),
1302: copy_rtx_and_substitute (XEXP (orig, 1)));
1303: break;
1304:
1.1 root 1305: case PLUS:
1306: /* Note: the PLUS case is not nearly as careful as the MEM
1307: case in terms of preserving addresses. The reason for this
1308: is that it is expected that if a PLUS_EXPR turns out not
1309: to be a legitimate address, reload can fix that up, without
1310: doing major damage. However, a MEM rtx must preside
1311: over a legitimate address. The MEM case has lots of hair
1312: to deal with what happens when it sits on a PLUS... */
1313: /* Take care of the easy case quickly. */
1314: if (XEXP (orig, 0) == frame_pointer_rtx
1315: || XEXP (orig, 1) == frame_pointer_rtx
1316: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1317: && (XEXP (orig, 0) == arg_pointer_rtx
1318: || XEXP (orig, 1) == arg_pointer_rtx)))
1319: {
1.1.1.14 root 1320: rtx reg;
1.1 root 1321: if (XEXP (orig, 0) == frame_pointer_rtx
1322: || XEXP (orig, 0) == arg_pointer_rtx)
1.1.1.14 root 1323: reg = XEXP (orig, 0), copy = XEXP (orig, 1);
1.1 root 1324: else
1.1.1.14 root 1325: reg = XEXP (orig, 1), copy = XEXP (orig, 0);
1.1 root 1326:
1327: if (GET_CODE (copy) == CONST_INT)
1328: {
1329: int c = INTVAL (copy);
1330:
1.1.1.14 root 1331: if (reg == arg_pointer_rtx && c >= first_parm_offset)
1.1 root 1332: {
1.1.1.14 root 1333: copy = access_parm_map (c, VOIDmode);
1334: if (GET_CODE (copy) != MEM)
1335: /* Should not happen, because a parm we need to address
1336: should not be living in a register.
1337: (expand_inline_function copied it to a stack slot.) */
1338: abort ();
1.1 root 1339: return XEXP (copy, 0);
1340: }
1341: return gen_rtx (PLUS, mode,
1342: frame_pointer_rtx,
1343: gen_rtx (CONST_INT, SImode,
1344: c + fp_delta));
1345: }
1346: copy = copy_rtx_and_substitute (copy);
1.1.1.6 root 1347: temp = force_reg (mode, gen_rtx (PLUS, mode, frame_pointer_rtx, copy));
1.1 root 1348: return plus_constant (temp, fp_delta);
1349: }
1350: else if (reg_mentioned_p (frame_pointer_rtx, orig)
1351: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1352: && reg_mentioned_p (arg_pointer_rtx, orig)))
1353: {
1354: /* If we have a complex sum which has a frame pointer
1355: in it, and it was a legitimate address, then
1356: keep it that way. */
1357: if (memory_address_p (mode, orig))
1358: {
1359: if (GET_CODE (XEXP (orig, 0)) == CONST_INT)
1360: {
1361: copy = copy_rtx_and_substitute (XEXP (orig, 1));
1362: temp = plus_constant (copy, INTVAL (XEXP (orig, 0)));
1363: }
1364: else if (GET_CODE (XEXP (orig, 1)) == CONST_INT)
1365: {
1366: copy = copy_rtx_and_substitute (XEXP (orig, 0));
1367: temp = plus_constant (copy, INTVAL (XEXP (orig, 1)));
1368: }
1369: else
1370: {
1371: temp = gen_rtx (PLUS, GET_MODE (orig),
1372: copy_rtx_and_substitute (XEXP (orig, 0)),
1373: copy_rtx_and_substitute (XEXP (orig, 1)));
1374: }
1375: temp = memory_address (mode, temp);
1376: }
1377: else
1378: temp = gen_rtx (PLUS, GET_MODE (orig),
1379: copy_rtx_and_substitute (XEXP (orig, 0)),
1380: copy_rtx_and_substitute (XEXP (orig, 1)));
1381: }
1382: else
1383: temp = gen_rtx (PLUS, GET_MODE (orig),
1384: copy_rtx_and_substitute (XEXP (orig, 0)),
1385: copy_rtx_and_substitute (XEXP (orig, 1)));
1386:
1387: return temp;
1.1.1.7 root 1388:
1.1 root 1389: case MEM:
1390: /* Take care of easiest case here. */
1391: copy = XEXP (orig, 0);
1392: if (copy == frame_pointer_rtx || copy == arg_pointer_rtx)
1393: return gen_rtx (MEM, mode,
1394: plus_constant (frame_pointer_rtx, fp_delta));
1.1.1.6 root 1395:
1396: /* Allow a pushing-address even if that is not valid as an
1397: ordinary memory address. It indicates we are inlining a special
1.1.1.9 root 1398: push-insn. These must be copied; otherwise unshare_all_rtl
1399: might clobber them to point at temporary rtl of this function. */
1.1.1.6 root 1400: #ifdef STACK_GROWS_DOWNWARD
1401: if (GET_CODE (copy) == PRE_DEC && XEXP (copy, 0) == stack_pointer_rtx)
1.1.1.9 root 1402: return gen_rtx (MEM, mode, copy_rtx_and_substitute (copy));
1.1.1.6 root 1403: #else
1404: if (GET_CODE (copy) == PRE_INC && XEXP (copy, 0) == stack_pointer_rtx)
1.1.1.9 root 1405: return gen_rtx (MEM, mode, copy_rtx_and_substitute (copy));
1.1.1.6 root 1406: #endif
1407:
1.1.1.7 root 1408: /* If this is some other sort of address that isn't generally valid,
1409: break out all the registers referred to. */
1410: if (! memory_address_p (mode, copy))
1411: return gen_rtx (MEM, mode, copy_address (copy));
1412:
1.1 root 1413: if (GET_CODE (copy) == PLUS)
1414: {
1415: if (XEXP (copy, 0) == frame_pointer_rtx
1416: || XEXP (copy, 1) == frame_pointer_rtx
1417: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1418: && (XEXP (copy, 0) == arg_pointer_rtx
1419: || XEXP (copy, 1) == arg_pointer_rtx)))
1420: {
1421: rtx reg;
1422: if (XEXP (copy, 0) == frame_pointer_rtx
1423: || XEXP (copy, 0) == arg_pointer_rtx)
1424: reg = XEXP (copy, 0), copy = XEXP (copy, 1);
1425: else
1426: reg = XEXP (copy, 1), copy = XEXP (copy, 0);
1427:
1428: if (GET_CODE (copy) == CONST_INT)
1429: {
1430: int c = INTVAL (copy);
1431:
1.1.1.7 root 1432: if (reg == arg_pointer_rtx && c >= first_parm_offset)
1.1.1.14 root 1433: return access_parm_map (c, mode);
1.1.1.11 root 1434:
1.1 root 1435: temp = gen_rtx (PLUS, Pmode,
1436: frame_pointer_rtx,
1437: gen_rtx (CONST_INT, SImode,
1438: c + fp_delta));
1439: if (! memory_address_p (Pmode, temp))
1440: return gen_rtx (MEM, mode, plus_constant (inline_fp_rtx, c));
1441: }
1442: copy = copy_rtx_and_substitute (copy);
1443: temp = gen_rtx (PLUS, Pmode, frame_pointer_rtx, copy);
1444: temp = plus_constant (temp, fp_delta);
1445: temp = memory_address (Pmode, temp);
1446: }
1447: else if (reg_mentioned_p (frame_pointer_rtx, copy)
1448: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1449: && reg_mentioned_p (arg_pointer_rtx, copy)))
1450: {
1451: if (GET_CODE (XEXP (copy, 0)) == CONST_INT)
1452: {
1453: temp = copy_rtx_and_substitute (XEXP (copy, 1));
1454: temp = plus_constant (temp, INTVAL (XEXP (copy, 0)));
1455: }
1456: else if (GET_CODE (XEXP (copy, 1)) == CONST_INT)
1457: {
1458: temp = copy_rtx_and_substitute (XEXP (copy, 0));
1459: temp = plus_constant (temp, INTVAL (XEXP (copy, 1)));
1460: }
1461: else
1462: {
1463: temp = gen_rtx (PLUS, GET_MODE (copy),
1464: copy_rtx_and_substitute (XEXP (copy, 0)),
1465: copy_rtx_and_substitute (XEXP (copy, 1)));
1466: }
1467: }
1468: else
1469: {
1470: if (GET_CODE (XEXP (copy, 1)) == CONST_INT)
1471: temp = plus_constant (copy_rtx_and_substitute (XEXP (copy, 0)),
1472: INTVAL (XEXP (copy, 1)));
1473: else if (GET_CODE (XEXP (copy, 0)) == CONST_INT)
1474: temp = plus_constant (copy_rtx_and_substitute (XEXP (copy, 1)),
1475: INTVAL (XEXP (copy, 0)));
1476: else
1477: {
1478: rtx left = copy_rtx_and_substitute (XEXP (copy, 0));
1479: rtx right = copy_rtx_and_substitute (XEXP (copy, 1));
1480:
1481: temp = gen_rtx (PLUS, GET_MODE (copy), left, right);
1482: }
1483: }
1484: }
1485: else
1486: temp = copy_rtx_and_substitute (copy);
1487:
1488: return change_address (orig, mode, temp);
1489:
1490: case RETURN:
1491: abort ();
1492: }
1493:
1494: copy = rtx_alloc (code);
1495: PUT_MODE (copy, mode);
1496: copy->in_struct = orig->in_struct;
1497: copy->volatil = orig->volatil;
1498: copy->unchanging = orig->unchanging;
1499:
1500: format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
1501:
1502: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
1503: {
1504: switch (*format_ptr++)
1505: {
1506: case '0':
1507: break;
1508:
1509: case 'e':
1510: XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i));
1511: break;
1512:
1.1.1.6 root 1513: case 'u':
1514: /* Change any references to old-insns to point to the
1515: corresponding copied insns. */
1.1.1.9 root 1516: XEXP (copy, i) = insn_map[INSN_UID (XEXP (orig, i))];
1517: break;
1.1.1.6 root 1518:
1.1 root 1519: case 'E':
1520: XVEC (copy, i) = XVEC (orig, i);
1.1.1.6 root 1521: if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
1.1 root 1522: {
1523: XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
1524: for (j = 0; j < XVECLEN (copy, i); j++)
1525: XVECEXP (copy, i, j) = copy_rtx_and_substitute (XVECEXP (orig, i, j));
1526: }
1527: break;
1528:
1529: case 'i':
1530: XINT (copy, i) = XINT (orig, i);
1531: break;
1532:
1533: case 's':
1534: XSTR (copy, i) = XSTR (orig, i);
1535: break;
1536:
1537: default:
1538: abort ();
1539: }
1540: }
1.1.1.11 root 1541:
1542: if (code == ASM_OPERANDS && orig_asm_operands_vector == 0)
1543: {
1544: orig_asm_operands_vector = XVEC (orig, 3);
1545: copy_asm_operands_vector = XVEC (copy, 3);
1.1.1.14 root 1546: copy_asm_constraints_vector = XVEC (copy, 4);
1547: }
1548:
1549: return copy;
1550: }
1551:
1552: /* Get the value corresponding to an address relative to the arg pointer
1553: at index RELADDRESS. MODE is the machine mode of the reference.
1554: MODE is used only when the value is a REG.
1555: Pass VOIDmode for MODE when the mode is not known;
1556: in such cases, you should make sure the value is a MEM. */
1557:
1558: static rtx
1559: access_parm_map (reladdress, mode)
1560: int reladdress;
1561: enum machine_mode mode;
1562: {
1563: /* Index in parm_map. */
1564: int index = reladdress / UNITS_PER_WORD;
1565: /* Offset of the data being referenced
1566: from the beginning of the value for that parm. */
1567: int offset = reladdress % UNITS_PER_WORD;
1568: rtx copy;
1569:
1570: /* If we are referring to the middle of a multiword parm,
1571: find the beginning of that parm.
1572: OFFSET gets the offset of the reference from
1573: the beginning of the parm. */
1574:
1575: while (parm_map[index] == 0)
1576: {
1577: index--;
1578: if (index < first_parm_offset / UNITS_PER_WORD)
1579: /* If this abort happens, it means we need
1580: to handle "decrementing" INDEX back far
1581: enough to start looking among the reg parms
1582: instead of the stack parms. What a mess! */
1583: abort ();
1584: offset += UNITS_PER_WORD;
1585: }
1586:
1587: copy = parm_map[index];
1588:
1589: #ifdef BYTES_BIG_ENDIAN
1590: /* Subtract from OFFSET the offset of where
1591: the actual parm value would start. */
1592: if (GET_MODE_SIZE (GET_MODE (copy)) < UNITS_PER_WORD)
1593: offset
1594: -= (UNITS_PER_WORD
1595: - GET_MODE_SIZE (GET_MODE (copy)));
1596: #endif
1597:
1598: /* For memory ref, adjust it by the desired offset. */
1599: if (GET_CODE (copy) == MEM)
1600: {
1601: if (offset != 0)
1602: return change_address (copy, mode,
1603: plus_constant (XEXP (copy, 0),
1604: offset));
1605: return copy;
1606: }
1607:
1608: if (GET_CODE (copy) != REG && GET_CODE (copy) != SUBREG
1609: && ! CONSTANT_P (copy))
1610: abort ();
1611: if (mode == VOIDmode)
1612: abort ();
1613:
1614: /* A REG cannot be offset by bytes, so use a subreg
1615: (which is possible only in certain cases). */
1616: if (GET_MODE (copy) != mode
1617: && GET_MODE (copy) != VOIDmode)
1618: {
1619: int word;
1620: /* Crash if the portion of the arg wanted
1621: is not the least significant.
1622: Functions with refs to other parts of a
1623: parameter should not be inline--
1624: see function_cannot_inline_p. */
1625: #ifdef BYTES_BIG_ENDIAN
1.1.1.16! root 1626: if ((offset + GET_MODE_SIZE (mode)) % UNITS_PER_WORD
! 1627: != GET_MODE_SIZE (GET_MODE (copy)) % UNITS_PER_WORD)
1.1.1.14 root 1628: abort ();
1629: #else
1.1.1.16! root 1630: if ((offset % UNITS_PER_WORD) != 0)
1.1.1.14 root 1631: abort ();
1632: #endif
1.1.1.16! root 1633: word = offset % UNITS_PER_WORD;
1.1.1.14 root 1634: if (GET_CODE (copy) == SUBREG)
1635: word = SUBREG_WORD (copy), copy = SUBREG_REG (copy);
1636: if (CONSTANT_P (copy))
1637: copy = force_reg (GET_MODE (copy), copy);
1638: return gen_rtx (SUBREG, mode, copy, word);
1.1.1.11 root 1639: }
1640:
1.1 root 1641: return copy;
1642: }
1643:
1.1.1.7 root 1644: /* Like copy_rtx_and_substitute but produces different output, suitable
1645: for an ideosyncractic address that isn't memory_address_p.
1646: The output resembles the input except that REGs and MEMs are replaced
1647: with new psuedo registers. All the "real work" is done in separate
1648: insns which set up the values of these new registers. */
1649:
1650: static rtx
1651: copy_address (orig)
1652: register rtx orig;
1653: {
1.1.1.9 root 1654: register rtx copy;
1.1.1.7 root 1655: register int i, j;
1656: register RTX_CODE code;
1657: register enum machine_mode mode;
1658: register char *format_ptr;
1659:
1660: if (orig == 0)
1661: return 0;
1662:
1663: code = GET_CODE (orig);
1664: mode = GET_MODE (orig);
1665:
1666: switch (code)
1667: {
1668: case REG:
1.1.1.9 root 1669: if (REGNO (orig) != FRAME_POINTER_REGNUM)
1670: return copy_rtx_and_substitute (orig);
1671: return plus_constant (frame_pointer_rtx, fp_delta);
1672:
1673: case PLUS:
1674: if (GET_CODE (XEXP (orig, 0)) == REG
1675: && REGNO (XEXP (orig, 0)) == FRAME_POINTER_REGNUM)
1676: return plus_constant (orig, fp_delta);
1677: break;
1678:
1.1.1.7 root 1679: case MEM:
1.1.1.9 root 1680: return copy_to_reg (copy_rtx_and_substitute (orig));
1.1.1.7 root 1681:
1682: case CODE_LABEL:
1683: case LABEL_REF:
1.1.1.9 root 1684: return copy_rtx_and_substitute (orig);
1.1.1.7 root 1685:
1686: case PC:
1687: case CC0:
1688: case CONST_INT:
1689: case CONST_DOUBLE:
1690: case SYMBOL_REF:
1691: return orig;
1692: }
1693:
1694: copy = rtx_alloc (code);
1695: PUT_MODE (copy, mode);
1696: copy->in_struct = orig->in_struct;
1697: copy->volatil = orig->volatil;
1698: copy->unchanging = orig->unchanging;
1699:
1700: format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
1701:
1702: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
1703: {
1704: switch (*format_ptr++)
1705: {
1706: case '0':
1707: break;
1708:
1709: case 'e':
1710: XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i));
1711: break;
1712:
1713: case 'u':
1714: /* Change any references to old-insns to point to the
1715: corresponding copied insns. */
1.1.1.9 root 1716: XEXP (copy, i) = insn_map[INSN_UID (XEXP (orig, i))];
1717: break;
1.1.1.7 root 1718:
1719: case 'E':
1720: XVEC (copy, i) = XVEC (orig, i);
1721: if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
1722: {
1723: XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
1724: for (j = 0; j < XVECLEN (copy, i); j++)
1725: XVECEXP (copy, i, j) = copy_rtx_and_substitute (XVECEXP (orig, i, j));
1726: }
1727: break;
1728:
1729: case 'i':
1730: XINT (copy, i) = XINT (orig, i);
1731: break;
1732:
1733: case 's':
1734: XSTR (copy, i) = XSTR (orig, i);
1735: break;
1736:
1737: default:
1738: abort ();
1739: }
1740: }
1741: return copy;
1742: }
1743:
1.1 root 1744: /* Attempt to simplify INSN while copying it from an inline fn,
1745: assuming it is a SET that sets CC0.
1746:
1747: If we simplify it, we emit the appropriate insns and return
1748: the last insn that we have handled (since we may handle the insn
1749: that follows INSN as well as INSN itself).
1750:
1751: Otherwise we do nothing and return zero. */
1752:
1753: static rtx
1754: try_fold_cc0 (insn)
1755: rtx insn;
1756: {
1757: rtx cnst = copy_rtx_and_substitute (SET_SRC (PATTERN (insn)));
1758: rtx pat, copy;
1759:
1760: if (CONSTANT_P (cnst)
1761: /* @@ Cautious: Don't know how many of these tests we need. */
1762: && NEXT_INSN (insn)
1763: && GET_CODE (pat = PATTERN (NEXT_INSN (insn))) == SET
1764: && SET_DEST (pat) == pc_rtx
1765: && GET_CODE (pat = SET_SRC (pat)) == IF_THEN_ELSE
1766: && GET_RTX_LENGTH (GET_CODE (XEXP (pat, 0))) == 2)
1767: {
1768: rtx cnst2;
1769: rtx cond = XEXP (pat, 0);
1770:
1771: if ((XEXP (cond, 0) == cc0_rtx
1772: && CONSTANT_P (XEXP (cond, 1))
1773: && (cnst2 = XEXP (cond, 1)))
1774: || (XEXP (cond, 1) == cc0_rtx
1775: && CONSTANT_P (XEXP (cond, 0))
1776: && (cnst2 = XEXP (cond, 0))))
1777: {
1778: copy = fold_out_const_cc0 (cond, XEXP (pat, 1), XEXP (pat, 2),
1779: cnst, cnst2);
1780: if (copy)
1781: {
1782: if (GET_CODE (copy) == LABEL_REF)
1783: {
1784: /* We will branch unconditionally to
1785: the label specified by COPY.
1786: Eliminate dead code by running down the
1787: list of insn until we see a CODE_LABEL.
1788: If the CODE_LABEL is the one specified
1789: by COPY, we win, and can delete all code
1790: up to (but not necessarily including)
1791: that label. Otherwise only win a little:
1792: emit the branch insn, and continue expanding. */
1793: rtx tmp = NEXT_INSN (insn);
1794: while (tmp && GET_CODE (tmp) != CODE_LABEL)
1795: tmp = NEXT_INSN (tmp);
1796: if (! tmp)
1797: abort ();
1798: if (label_map[CODE_LABEL_NUMBER (tmp)] == XEXP (copy, 0))
1799: {
1800: /* Big win. */
1801: return PREV_INSN (tmp);
1802: }
1803: else
1804: {
1805: /* Small win. Emit the unconditional branch,
1806: followed by a BARRIER, so that jump optimization
1807: will know what to do. */
1808: emit_jump (copy);
1809: return NEXT_INSN (insn);
1810: }
1811: }
1812: else if (copy == pc_rtx)
1813: {
1814: /* Do not take the branch, just fall through.
1815: Jump optimize should handle the elimination of
1816: dead code if appropriate. */
1817: return NEXT_INSN (insn);
1818: }
1819: else
1820: abort ();
1821: }
1822: }
1823: }
1824: return 0;
1825: }
1826:
1827: /* If (COND_RTX CNST1 CNST2) yield a result we can treat
1828: as being constant, return THEN_RTX if the result is always
1829: non-zero, and return ELSE_RTX otherwise. */
1830: static rtx
1831: fold_out_const_cc0 (cond_rtx, then_rtx, else_rtx, cnst1, cnst2)
1832: rtx cond_rtx, then_rtx, else_rtx;
1833: rtx cnst1, cnst2;
1834: {
1835: int value1, value2;
1836: int int1 = GET_CODE (cnst1) == CONST_INT;
1837: int int2 = GET_CODE (cnst2) == CONST_INT;
1838: if (int1)
1839: value1 = INTVAL (cnst1);
1840: else
1841: value1 = 1;
1842: if (int2)
1843: value2 = INTVAL (cnst2);
1844: else
1845: value2 = 1;
1846:
1847: switch (GET_CODE (cond_rtx))
1848: {
1849: case NE:
1850: if (int1 && int2)
1851: if (value1 != value2)
1852: return copy_rtx_and_substitute (then_rtx);
1853: else
1854: return copy_rtx_and_substitute (else_rtx);
1855: if (value1 == 0 || value2 == 0)
1856: return copy_rtx_and_substitute (then_rtx);
1857: if (int1 == 0 && int2 == 0)
1858: if (rtx_equal_p (cnst1, cnst2))
1859: return copy_rtx_and_substitute (else_rtx);
1860: break;
1861: case EQ:
1862: if (int1 && int2)
1863: if (value1 == value2)
1864: return copy_rtx_and_substitute (then_rtx);
1865: else
1866: return copy_rtx_and_substitute (else_rtx);
1867: if (value1 == 0 || value2 == 0)
1868: return copy_rtx_and_substitute (else_rtx);
1869: if (int1 == 0 && int2 == 0)
1870: if (rtx_equal_p (cnst1, cnst2))
1871: return copy_rtx_and_substitute (then_rtx);
1872: break;
1873: case GE:
1874: if (int1 && int2)
1875: if (value1 >= value2)
1876: return copy_rtx_and_substitute (then_rtx);
1877: else
1878: return copy_rtx_and_substitute (else_rtx);
1879: if (value1 == 0)
1880: return copy_rtx_and_substitute (else_rtx);
1881: if (value2 == 0)
1882: return copy_rtx_and_substitute (then_rtx);
1883: break;
1884: case GT:
1885: if (int1 && int2)
1886: if (value1 > value2)
1887: return copy_rtx_and_substitute (then_rtx);
1888: else
1889: return copy_rtx_and_substitute (else_rtx);
1890: if (value1 == 0)
1891: return copy_rtx_and_substitute (else_rtx);
1892: if (value2 == 0)
1893: return copy_rtx_and_substitute (then_rtx);
1894: break;
1895: case LE:
1896: if (int1 && int2)
1897: if (value1 <= value2)
1898: return copy_rtx_and_substitute (then_rtx);
1899: else
1900: return copy_rtx_and_substitute (else_rtx);
1901: if (value1 == 0)
1902: return copy_rtx_and_substitute (then_rtx);
1903: if (value2 == 0)
1904: return copy_rtx_and_substitute (else_rtx);
1905: break;
1906: case LT:
1907: if (int1 && int2)
1908: if (value1 < value2)
1909: return copy_rtx_and_substitute (then_rtx);
1910: else
1911: return copy_rtx_and_substitute (else_rtx);
1912: if (value1 == 0)
1913: return copy_rtx_and_substitute (then_rtx);
1914: if (value2 == 0)
1915: return copy_rtx_and_substitute (else_rtx);
1916: break;
1917: case GEU:
1918: if (int1 && int2)
1919: if ((unsigned)value1 >= (unsigned)value2)
1920: return copy_rtx_and_substitute (then_rtx);
1921: else
1922: return copy_rtx_and_substitute (else_rtx);
1923: if (value1 == 0)
1924: return copy_rtx_and_substitute (else_rtx);
1925: if (value2 == 0)
1926: return copy_rtx_and_substitute (then_rtx);
1927: break;
1928: case GTU:
1929: if (int1 && int2)
1930: if ((unsigned)value1 > (unsigned)value2)
1931: return copy_rtx_and_substitute (then_rtx);
1932: else
1933: return copy_rtx_and_substitute (else_rtx);
1934: if (value1 == 0)
1935: return copy_rtx_and_substitute (else_rtx);
1936: if (value2 == 0)
1937: return copy_rtx_and_substitute (then_rtx);
1938: break;
1939: case LEU:
1940: if (int1 && int2)
1941: if ((unsigned)value1 <= (unsigned)value2)
1942: return copy_rtx_and_substitute (then_rtx);
1943: else
1944: return copy_rtx_and_substitute (else_rtx);
1945: if (value1 == 0)
1946: return copy_rtx_and_substitute (then_rtx);
1947: if (value2 == 0)
1948: return copy_rtx_and_substitute (else_rtx);
1949: break;
1950: case LTU:
1951: if (int1 && int2)
1952: if ((unsigned)value1 < (unsigned)value2)
1953: return copy_rtx_and_substitute (then_rtx);
1954: else
1955: return copy_rtx_and_substitute (else_rtx);
1956: if (value1 == 0)
1957: return copy_rtx_and_substitute (then_rtx);
1958: if (value2 == 0)
1959: return copy_rtx_and_substitute (else_rtx);
1960: break;
1961: }
1962: /* Could not hack it. */
1963: return 0;
1964: }
1965:
1966: /* Output the assembly language code for the function FNDECL
1967: from its DECL_SAVED_INSNS. Used for inline functions that are output
1968: at end of compilation instead of where they came in the source. */
1969:
1970: void
1971: output_inline_function (fndecl)
1972: tree fndecl;
1973: {
1974: rtx head = DECL_SAVED_INSNS (fndecl);
1975: rtx last;
1.1.1.14 root 1976: extern rtx stack_slot_list;
1.1 root 1977:
1978: temporary_allocation ();
1979:
1.1.1.4 root 1980: current_function_decl = fndecl;
1981:
1.1.1.14 root 1982: /* This call is only used to initialize global variables. */
1.1.1.16! root 1983: init_function_start (fndecl, "lossage", 1);
1.1 root 1984:
1985: /* Set stack frame size. */
1986: assign_stack_local (BLKmode, DECL_FRAME_SIZE (fndecl));
1987:
1988: restore_reg_data (FIRST_PARM_INSN (head));
1989:
1.1.1.14 root 1990: stack_slot_list = XEXP (head, 9);
1991:
1.1.1.10 root 1992: expand_function_end (DECL_SOURCE_FILE (fndecl), DECL_SOURCE_LINE (fndecl));
1.1 root 1993:
1994: for (last = head; NEXT_INSN (last); last = NEXT_INSN (last))
1995: ;
1996:
1997: set_new_first_and_last_insn (FIRST_PARM_INSN (head), last);
1998:
1999: /* Compile this function all the way down to assembly code. */
2000: rest_of_compilation (fndecl);
2001:
1.1.1.4 root 2002: current_function_decl = 0;
2003:
1.1 root 2004: permanent_allocation ();
2005: }
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