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1.1 root 1: /* Procedure integration for GNU CC.
2: Copyright (C) 1988 Free Software Foundation, Inc.
3: Contributed by Michael Tiemann ([email protected])
4:
5: This file is part of GNU CC.
6:
7: GNU CC is distributed in the hope that it will be useful,
8: but WITHOUT ANY WARRANTY. No author or distributor
9: accepts responsibility to anyone for the consequences of using it
10: or for whether it serves any particular purpose or works at all,
11: unless he says so in writing. Refer to the GNU CC General Public
12: License for full details.
13:
14: Everyone is granted permission to copy, modify and redistribute
15: GNU CC, but only under the conditions described in the
16: GNU CC General Public License. A copy of this license is
17: supposed to have been given to you along with GNU CC so you
18: can know your rights and responsibilities. It should be in a
19: file named COPYING. Among other things, the copyright notice
20: and this notice must be preserved on all copies. */
21:
22:
23: #include <ctype.h>
24: #include <stdio.h>
25:
26: #include "config.h"
27: #include "rtl.h"
28: #include "tree.h"
29: #include "flags.h"
30: #include "insn-flags.h"
31: #include "expr.h"
32:
33: #include "obstack.h"
34: #define obstack_chunk_alloc xmalloc
35: #define obstack_chunk_free free
36: extern int xmalloc ();
37: extern void free ();
38:
39: extern struct obstack permanent_obstack, maybepermanent_obstack;
40: extern struct obstack *rtl_obstack, *saveable_obstack, *current_obstack;
41:
42: #define MIN(x,y) ((x < y) ? x : y)
43:
44: extern tree pushdecl ();
1.1.1.5 root 45:
46: /* Default max number of insns a function can have and still be inline.
47: This is overridden on RISC machines. */
48: #ifndef INTEGRATE_THRESHOLD
49: #define INTEGRATE_THRESHOLD(DECL) \
50: (8 * (8 + list_length (DECL_ARGUMENTS (DECL)) + 16*TREE_INLINE (DECL)))
51: #endif
1.1 root 52:
53: /* This is the target of the inline function being expanded,
54: or NULL if there is none. */
55: static rtx inline_target;
56:
57: /* We must take special care not to disrupt life too severely
58: when performing procedure integration. One thing that that
59: involves is not creating illegitimate address which reload
60: cannot fix. Since we don't know what the frame pointer is
61: not capable of (in a machine independent way), we create
62: a pseudo-frame pointer which will have to do for now. */
63: static rtx inline_fp_rtx;
64:
65: /* Convert old frame-pointer offsets to new. Parameters which only
66: produce values (no addresses, and are never assigned), map directly
67: to the pseudo-reg of the incoming value. Parameters that are
68: assigned to but do not have their address taken are given a fresh
69: pseudo-register. Parameters that have their address take are
70: given a fresh stack-slot. */
71: static rtx *parm_map;
72:
73: /* ?? Should this be done here?? It is not right now.
74: Keep track of whether a given pseudo-register is the sum
75: of the frame pointer and a const_int (or zero). */
76: static char *fp_addr_p;
77:
78: /* For the local variables of the procdure being integrated that live
79: on the frame, FRAME_POINTER_DELTA says how much to change their
80: offsets by, so that they now live in the correct place on the
81: frame of the function being compiled. */
82: static int fp_delta;
83:
84: /* Return a copy of an rtx (as needed), substituting pseudo-register,
85: labels, and frame-pointer offsets as necessary. */
86: static rtx copy_rtx_and_substitute ();
1.1.1.7 ! root 87: /* Variant, used for memory addresses that are not memory_address_p. */
! 88: static rtx copy_address ();
1.1 root 89:
90: static void copy_parm_decls ();
91: static void copy_decl_tree ();
92:
93: static rtx try_fold_cc0 ();
94:
95: /* We do some simple constant folding optimization. This optimization
96: really exists primarily to save time inlining a function. It
1.1.1.5 root 97: also helps users who ask for inline functions without -O. */
1.1 root 98: static rtx fold_out_const_cc0 ();
99:
100: /* Zero if the current function (whose FUNCTION_DECL is FNDECL)
101: is safe and reasonable to integrate into other functions.
102: Nonzero means value is a warning message with a single %s
103: for the function's name. */
104:
105: char *
106: function_cannot_inline_p (fndecl)
107: register tree fndecl;
108: {
109: register rtx insn;
110: tree last = tree_last (TYPE_ARG_TYPES (TREE_TYPE (fndecl)));
1.1.1.5 root 111: int max_insns = INTEGRATE_THRESHOLD (fndecl);
1.1 root 112: register int ninsns = 0;
113: register tree parms;
114:
115: /* No inlines with varargs. `grokdeclarator' gives a warning
116: message about that if `inline' is specified. This code
117: it put in to catch the volunteers. */
118: if (last && TREE_VALUE (last) != void_type_node)
1.1.1.7 ! root 119: return "varargs function cannot be inline";
1.1 root 120:
121: /* If its not even close, don't even look. */
122: if (get_max_uid () > 2 * max_insns)
1.1.1.7 ! root 123: return "function too large to be inline";
1.1 root 124:
125: /* Don't inline functions which have BLKmode arguments.
126: Don't inline functions that take the address of
127: a parameter and do not specify a function prototype. */
128: for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
129: {
130: if (TYPE_MODE (TREE_TYPE (parms)) == BLKmode)
1.1.1.7 ! root 131: return "function with large aggregate parameter cannot be inline";
1.1 root 132: if (last == NULL_TREE && TREE_ADDRESSABLE (parms))
1.1.1.7 ! root 133: return "no prototype, and parameter address used; cannot be inline";
1.1 root 134: }
135:
136: if (get_max_uid () > max_insns)
137: {
138: for (ninsns = 0, insn = get_first_nonparm_insn (); insn && ninsns < max_insns;
139: insn = NEXT_INSN (insn))
140: {
141: if (GET_CODE (insn) == INSN
142: || GET_CODE (insn) == JUMP_INSN
143: || GET_CODE (insn) == CALL_INSN)
144: ninsns++;
145: }
146:
147: if (ninsns >= max_insns)
1.1.1.7 ! root 148: return "function too large to be inline";
1.1 root 149: }
150:
151: return 0;
152: }
153:
154: /* Variables used within save_for_inline. */
155:
156: /* Mapping from old pesudo-register to new pseudo-registers.
157: The first element of this map is reg_map[FIRST_PSEUDO_REGISTER].
1.1.1.6 root 158: It is allocated in `save_for_inline' and `expand_inline_function',
1.1 root 159: and deallocated on exit from each of those routines. */
160: static rtx *reg_map;
161:
162: /* Mapping from old code-labels to new code-labels.
163: The first element of this map is label_map[min_labelno].
1.1.1.6 root 164: It is allocated in `save_for_inline' and `expand_inline_function',
1.1 root 165: and deallocated on exit from each of those routines. */
166: static rtx *label_map;
167:
1.1.1.6 root 168: /* Mapping from old insn uid's to copied insns.
169: It is allocated in `save_for_inline' and `expand_inline_function',
170: and deallocated on exit from each of those routines. */
171: static rtx *insn_map;
172:
1.1 root 173: /* Map pseudo reg number into the PARM_DECL for the parm living in the reg.
174: Zero for a reg that isn't a parm's home.
175: Only reg numbers less than max_parm_reg are mapped here. */
176: static tree *parmdecl_map;
177:
178: /* Keep track of first pseudo-register beyond those that are parms. */
179: static int max_parm_reg;
180:
1.1.1.7 ! root 181: /* Offset from arg ptr to the first parm of this inline function. */
! 182: static int first_parm_offset;
! 183:
1.1 root 184: /* On machines that perform a function return with a single
185: instruction, such as the VAX, these return insns must be
186: mapped into branch statements. */
187: extern rtx return_label;
188:
189: /* Copy an rtx for save_for_inline. */
190: static rtx copy_for_inline ();
191:
192: /* Make the insns and PARM_DECLs of the current function permanent
193: and record other information in DECL_SAVED_INSNS to allow inlining
194: of this function in subsequent calls. */
195:
196: void
197: save_for_inline (fndecl)
198: tree fndecl;
199: {
200: extern rtx *regno_reg_rtx; /* in emit-rtl.c. */
201: extern current_function_args_size;
202:
203: rtx first_insn, last_insn, insn;
204: rtx head, copy;
205: tree parms;
206: int max_labelno, min_labelno, i, len;
207: int max_reg;
1.1.1.6 root 208: int max_uid;
1.1 root 209:
210: /* Make and emit a return-label if we have not already done so. */
211:
212: if (return_label == 0)
213: {
214: return_label = gen_label_rtx ();
215: emit_label (return_label);
216: }
217:
218: /* Get some bounds on the labels and registers used. */
219:
220: max_labelno = max_label_num ();
221: min_labelno = get_first_label_num ();
222: max_parm_reg = max_parm_reg_num ();
223: max_reg = max_reg_num ();
224:
225: /* Set up PARMDECL_MAP which maps pseudo-reg number to its PARM_DECL.
226:
227: Set TREE_VOLATILE to 0 if the parm is in a register, otherwise 1.
228: Later we set TREE_READONLY to 0 if the parm is modified inside the fn. */
229:
230: parmdecl_map = (tree *) alloca (max_parm_reg * sizeof (tree));
1.1.1.3 root 231: bzero (parmdecl_map, max_parm_reg * sizeof (tree));
1.1 root 232:
233: for (parms = DECL_ARGUMENTS (fndecl); parms; parms = TREE_CHAIN (parms))
234: {
235: rtx p = DECL_RTL (parms);
236:
237: if (GET_CODE (p) == REG)
238: {
239: parmdecl_map[REGNO (p)] = parms;
240: TREE_VOLATILE (parms) = 0;
241: }
242: else
243: TREE_VOLATILE (parms) = 1;
244: TREE_READONLY (parms) = 1;
245: }
246:
247: /* The list of DECL_SAVES_INSNS, starts off with a header which
248: contains the following information:
249:
250: the first insn of the function (not including the insns that copy
251: parameters into registers).
252: the first label used by that function,
253: the last label used by that function,
254: and the total number of registers used. */
255:
256: head = gen_inline_header_rtx (NULL, NULL, min_labelno, max_labelno,
257: max_parm_reg, max_reg,
258: current_function_args_size);
1.1.1.6 root 259: max_uid = INSN_UID (head);
1.1 root 260:
261: /* We have now allocated all that needs to be allocated permanently
262: on the rtx obstack. Set our high-water mark, so that we
263: can free the rest of this when the time comes. */
264:
265: preserve_data ();
266:
267: /* Copy the chain insns of this function.
268: Install the copied chain as the insns of this function,
269: for continued compilation;
270: the original chain is recorded as the DECL_SAVED_INSNS
271: for inlining future calls. */
272:
273: /* If there are insns that copy parms from the stack into pseudo registers,
274: those insns are not copied. `expand_inline_function' must
275: emit the correct code to handle such things. */
276:
277: insn = get_insns ();
278: if (GET_CODE (insn) != NOTE)
279: abort ();
280: first_insn = rtx_alloc (NOTE);
281: NOTE_SOURCE_FILE (first_insn) = NOTE_SOURCE_FILE (insn);
282: NOTE_LINE_NUMBER (first_insn) = NOTE_LINE_NUMBER (insn);
283: INSN_UID (first_insn) = INSN_UID (insn);
284: PREV_INSN (first_insn) = NULL;
285: NEXT_INSN (first_insn) = NULL;
286: last_insn = first_insn;
287:
288: /* Each pseudo-reg in the old insn chain must have a unique rtx in the copy.
289: Make these new rtx's now, and install them in regno_reg_rtx, so they
290: will be the official pseudo-reg rtx's for the rest of compilation. */
291:
292: reg_map = (rtx *) alloca ((max_reg + 1) * sizeof (rtx));
293:
294: len = sizeof (struct rtx_def) + (GET_RTX_LENGTH (REG) - 1) * sizeof (rtunion);
295: for (i = max_reg - 1; i >= FIRST_PSEUDO_REGISTER; i--)
296: reg_map[i] = (rtx)obstack_copy (&maybepermanent_obstack, regno_reg_rtx[i], len);
297: bcopy (reg_map + FIRST_PSEUDO_REGISTER,
298: regno_reg_rtx + FIRST_PSEUDO_REGISTER,
1.1.1.7 ! root 299: (max_reg - FIRST_PSEUDO_REGISTER) * sizeof (rtx));
1.1 root 300:
301: /* Likewise each label rtx must have a unique rtx as its copy. */
302:
303: label_map = (rtx *)alloca ((max_labelno - min_labelno) * sizeof (rtx));
304: label_map -= min_labelno;
305:
306: for (i = min_labelno; i < max_labelno; i++)
307: label_map[i] = gen_label_rtx ();
308:
1.1.1.6 root 309: /* Record the mapping of old insns to copied insns. */
310:
311: insn_map = (rtx *) alloca (max_uid * sizeof (rtx));
312: bzero (insn_map, max_uid * sizeof (rtx));
313:
1.1 root 314: /* Now copy the chain of insns. */
315:
316: for (insn = NEXT_INSN (insn); insn; insn = NEXT_INSN (insn))
317: {
318: switch (GET_CODE (insn))
319: {
320: case NOTE:
1.1.1.7 ! root 321: if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_FUNCTION_END)
! 322: continue;
! 323:
1.1 root 324: copy = rtx_alloc (NOTE);
325: NOTE_SOURCE_FILE (copy) = NOTE_SOURCE_FILE (insn);
326: NOTE_LINE_NUMBER (copy) = NOTE_LINE_NUMBER (insn);
327: break;
328:
329: case INSN:
330: case CALL_INSN:
331: case JUMP_INSN:
332: copy = rtx_alloc (GET_CODE (insn));
333: PATTERN (copy) = copy_for_inline (PATTERN (insn));
334: INSN_CODE (copy) = -1;
335: LOG_LINKS (copy) = NULL;
336: REG_NOTES (copy) = copy_for_inline (REG_NOTES (insn));
337: break;
338:
339: case CODE_LABEL:
340: copy = label_map[CODE_LABEL_NUMBER (insn)];
341: break;
342:
343: case BARRIER:
344: copy = rtx_alloc (BARRIER);
345: break;
346:
347: default:
348: abort ();
349: }
350: INSN_UID (copy) = INSN_UID (insn);
1.1.1.6 root 351: insn_map[INSN_UID (insn)] = copy;
1.1 root 352: NEXT_INSN (last_insn) = copy;
353: PREV_INSN (copy) = last_insn;
354: last_insn = copy;
355: }
356:
357: NEXT_INSN (last_insn) = NULL;
358:
359: NEXT_INSN (head) = get_first_nonparm_insn ();
360: FIRST_PARM_INSN (head) = get_insns ();
361: DECL_SAVED_INSNS (fndecl) = head;
362: DECL_FRAME_SIZE (fndecl) = get_frame_size ();
363: TREE_INLINE (fndecl) = 1;
364:
365: parmdecl_map = 0;
366: label_map = 0;
367: reg_map = 0;
368: return_label = 0;
369:
370: set_new_first_and_last_insn (first_insn, last_insn);
371: }
372:
373: /* Copy the rtx ORIG recursively, replacing pseudo-regs and labels
374: according to `reg_map' and `label_map'.
375: All other kinds of rtx are copied except those that can never be
376: changed during compilation. */
377:
378: static rtx
379: copy_for_inline (orig)
380: rtx orig;
381: {
382: register rtx x = orig;
383: register int i;
384: register enum rtx_code code;
385: register char *format_ptr;
386:
387: if (x == 0)
388: return x;
389:
390: code = GET_CODE (x);
391:
392: /* These types may be freely shared. */
393:
394: switch (code)
395: {
396: case QUEUED:
397: case CONST_INT:
398: case CONST_DOUBLE:
399: case SYMBOL_REF:
400: case PC:
401: case CC0:
402: return x;
403:
404: case MEM:
405: /* A MEM is allowed to be shared if its address is constant
406: or is a constant plus one of the special registers. */
407: if (CONSTANT_ADDRESS_P (XEXP (x, 0)))
408: return x;
409: if (GET_CODE (XEXP (x, 0)) == PLUS
410: && GET_CODE (XEXP (XEXP (x, 0), 0)) == REG
411: && (REGNO (XEXP (XEXP (x, 0), 0)) == FRAME_POINTER_REGNUM
412: || REGNO (XEXP (XEXP (x, 0), 0)) == ARG_POINTER_REGNUM)
413: && CONSTANT_ADDRESS_P (XEXP (XEXP (x, 0), 1)))
414: if (GET_CODE (XEXP (x, 0)) == REG
415: && (REGNO (XEXP (x, 0)) == FRAME_POINTER_REGNUM
416: || REGNO (XEXP (x, 0)) == ARG_POINTER_REGNUM)
417: && CONSTANT_ADDRESS_P (XEXP (x, 1)))
418: return x;
419: break;
420:
421: case LABEL_REF:
422: {
423: /* Must point to the new insn. */
424: return gen_rtx (LABEL_REF, GET_MODE (orig),
425: label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))]);
426: }
427:
428: case REG:
429: if (REGNO (x) >= FIRST_PSEUDO_REGISTER)
430: return reg_map [REGNO (x)];
431: else
432: return x;
433:
434: /* If a parm that gets modified lives in a pseudo-reg,
435: set its TREE_VOLATILE to prevent certain optimizations. */
436: case SET:
437: {
438: rtx dest = SET_DEST (x);
439:
440: if (GET_CODE (dest) == REG
441: && REGNO (dest) < max_parm_reg
1.1.1.3 root 442: && REGNO (dest) >= FIRST_PSEUDO_REGISTER
443: && parmdecl_map[REGNO (dest)] != 0)
1.1 root 444: TREE_READONLY (parmdecl_map[REGNO (dest)]) = 0;
445: }
446: break;
447: }
448:
449: /* Replace this rtx with a copy of itself. */
450:
451: x = rtx_alloc (code);
452: bcopy (orig, x, sizeof (int) * (GET_RTX_LENGTH (code) + 1));
453:
454: /* Now scan the subexpressions recursively.
455: We can store any replaced subexpressions directly into X
456: since we know X is not shared! Any vectors in X
457: must be copied if X was copied. */
458:
459: format_ptr = GET_RTX_FORMAT (code);
460:
461: for (i = 0; i < GET_RTX_LENGTH (code); i++)
462: {
463: switch (*format_ptr++)
464: {
465: case 'e':
466: XEXP (x, i) = copy_for_inline (XEXP (x, i));
467: break;
468:
1.1.1.6 root 469: case 'u':
470: /* Change any references to old-insns to point to the
471: corresponding copied insns. */
472: return insn_map[INSN_UID (XEXP (x, i))];
473:
1.1 root 474: case 'E':
1.1.1.6 root 475: if (XVEC (x, i) != NULL && XVECLEN (x, i) != 0)
1.1 root 476: {
477: register int j;
478:
479: XVEC (x, i) = gen_rtvec_v (XVECLEN (x, i), &XVECEXP (x, i, 0));
480: for (j = 0; j < XVECLEN (x, i); j++)
481: XVECEXP (x, i, j)
482: = copy_for_inline (XVECEXP (x, i, j));
483: }
484: break;
485: }
486: }
487: return x;
488: }
489:
490: /* Integrate the procedure defined by FNDECL. Note that this function
491: may wind up calling itself. Since the static variables are not
492: reentrant, we do not assign them until after the possibility
493: or recursion is eliminated.
494:
495: If IGNORE is nonzero, do not produce a value.
496: Otherwise store the value in TARGET if it is nonzero and that is convenient.
497:
498: Value is:
499: (rtx)-1 if we could not substitute the function
500: 0 if we substituted it and it does not produce a value
501: else an rtx for where the value is stored. */
502:
503: rtx
504: expand_inline_function (fndecl, parms, target, ignore, type, structure_value_addr)
505: tree fndecl, parms;
506: rtx target;
507: int ignore;
508: tree type;
509: rtx structure_value_addr;
510: {
511: tree formal, actual;
512: rtx header = DECL_SAVED_INSNS (fndecl);
513: rtx insns = FIRST_FUNCTION_INSN (header);
514: rtx insn, protect;
515: rtx last_insn = get_last_insn ();
516: int max_regno = MAX_REGNUM (header) + 1;
517: register int i;
518: int keep;
519: int min_labelno = FIRST_LABELNO (header);
520: int max_labelno = LAST_LABELNO (header);
521: int nargs;
522: rtx *arg_vec;
523: rtx return_label = 0;
524: rtx follows_call = 0;
1.1.1.7 ! root 525: rtx this_struct_value_rtx = 0;
1.1 root 526:
527: if (max_regno < FIRST_PSEUDO_REGISTER)
1.1.1.3 root 528: abort ();
1.1 root 529:
530: nargs = list_length (DECL_ARGUMENTS (fndecl));
531:
1.1.1.7 ! root 532: first_parm_offset = FIRST_PARM_OFFSET (fndecl);
! 533:
1.1 root 534: /* We expect PARMS to have the right length; don't crash if not. */
535: if (list_length (parms) != nargs)
536: return (rtx)-1;
537:
538: /* Make a fresh binding contour that we can easily remove. */
539: pushlevel (0);
540: expand_start_bindings (0);
541:
542: /* Get all the actual args as RTL, and store them in ARG_VEC. */
543:
544: arg_vec = (rtx *)alloca (nargs * sizeof (rtx));
545:
546: for (formal = DECL_ARGUMENTS (fndecl),
547: actual = parms,
548: i = 0;
549: formal;
550: formal = TREE_CHAIN (formal),
551: actual = TREE_CHAIN (actual),
552: i++)
553: {
554: tree arg = TREE_VALUE (actual); /* this has already been converted */
555: enum machine_mode tmode = TYPE_MODE (TREE_TYPE (formal));
556: rtx copy;
557:
1.1.1.7 ! root 558: emit_note (DECL_SOURCE_FILE (formal), DECL_SOURCE_LINE (formal));
1.1 root 559:
560: if (TREE_ADDRESSABLE (formal))
561: {
562: int size = int_size_in_bytes (TREE_TYPE (formal));
563: copy = assign_stack_local (tmode, size);
564: store_expr (arg, copy, 0);
565: }
566: else if (! TREE_READONLY (formal)
567: || TREE_VOLATILE (formal))
568: {
569: /* If parm is modified or if it hasn't a pseudo reg,
570: we may not simply substitute the actual value;
571: copy it through a register. */
572: copy = gen_reg_rtx (tmode);
573: store_expr (arg, copy, 0);
574: }
575: else
576: {
577: copy = expand_expr (arg, 0, tmode, 0);
578:
579: /* We do not use CONSTANT_ADDRESS_P here because
580: the set of cases where that might make a difference
581: are a subset of the cases that arise even when
582: it is a CONSTANT_ADDRESS_P (i.e., fp_delta
583: gets into the act. */
584: if (GET_CODE (copy) != REG && ! CONSTANT_P (copy))
585: copy = copy_to_reg (copy);
586: }
587: arg_vec[i] = copy;
588: }
589:
590: copy_parm_decls (DECL_ARGUMENTS (fndecl), arg_vec);
591:
592: /* Perform postincrements before actually calling the function. */
593: emit_queue ();
594:
595: /* clean up stack so that variables might have smaller offsets. */
596: do_pending_stack_adjust ();
597:
598: /* Pass the function the address in which to return a structure value. */
599: if (structure_value_addr)
1.1.1.7 ! root 600: {
! 601: if (GET_CODE (struct_value_rtx) == MEM)
! 602: {
! 603: this_struct_value_rtx = force_reg (Pmode, structure_value_addr);
! 604: }
! 605: else
! 606: {
! 607: this_struct_value_rtx = struct_value_rtx;
! 608: emit_move_insn (this_struct_value_rtx, structure_value_addr);
! 609: }
! 610: }
1.1 root 611:
612: /* Now prepare for copying the insns.
613: Set up reg_map, parm_map and label_map saying how to translate
614: the pseudo-registers, stack-parm references and labels when copying. */
615:
616: reg_map = (rtx *) alloca (max_regno * sizeof (rtx));
617: bzero (reg_map, max_regno * sizeof (rtx));
618:
619: if (DECL_ARGUMENTS (fndecl))
620: {
621: tree decl = DECL_ARGUMENTS (fndecl);
622: tree last = tree_last (decl);
623: int offset = FUNCTION_ARGS_SIZE (header);
1.1.1.7 ! root 624:
1.1 root 625: parm_map =
626: (rtx *)alloca ((offset / UNITS_PER_WORD) * sizeof (rtx));
627: bzero (parm_map, (offset / UNITS_PER_WORD) * sizeof (rtx));
1.1.1.7 ! root 628: parm_map -= first_parm_offset / UNITS_PER_WORD;
1.1 root 629:
630: for (formal = decl, i = 0; formal; formal = TREE_CHAIN (formal), i++)
631: {
632: /* Create an entry in PARM_MAP that says what pseudo register
633: is associated with an address we might compute. */
1.1.1.7 ! root 634: if (DECL_OFFSET (formal) >= 0)
! 635: {
! 636: /* This parameter has a home in the stack. */
! 637: parm_map[DECL_OFFSET (formal) / BITS_PER_WORD] = arg_vec[i];
! 638: }
! 639: else
! 640: {
! 641: /* Parameter that was passed in a register;
! 642: does it have a home on the stack (as a local)? */
! 643: rtx frtx = DECL_RTL (formal);
! 644: rtx offset = 0;
! 645: if (GET_CODE (frtx) == MEM)
! 646: {
! 647: frtx = XEXP (frtx, 0);
! 648: if (GET_CODE (frtx) == PLUS)
! 649: {
! 650: if (XEXP (frtx, 0) == frame_pointer_rtx
! 651: && GET_CODE (XEXP (frtx, 1)) == CONST_INT)
! 652: offset = XEXP (frtx, 1);
! 653: else if (XEXP (frtx, 1) == frame_pointer_rtx
! 654: && GET_CODE (XEXP (frtx, 0)) == CONST_INT)
! 655: offset = XEXP (frtx, 0);
! 656: }
! 657: if (offset)
! 658: parm_map[INTVAL (offset) / UNITS_PER_WORD] = arg_vec[i];
! 659: else abort ();
! 660: }
! 661: else if (GET_CODE (frtx) != REG)
! 662: abort ();
! 663: }
1.1 root 664: /* Create an entry in REG_MAP that says what rtx is associated
665: with a pseudo register from the function being inlined. */
666: if (GET_CODE (DECL_RTL (formal)) == REG)
667: reg_map[REGNO (DECL_RTL (formal))] = arg_vec[i];
668: }
1.1.1.7 ! root 669:
! 670: /* Make certain that we can map struct_value_{incoming_rtx,rtx},
! 671: and map it. If it is a hard register, it is mapped automagically. */
! 672: if (GET_CODE (struct_value_incoming_rtx) == REG)
! 673: ;
! 674: else if (GET_CODE (struct_value_incoming_rtx) == MEM
! 675: && XEXP (XEXP (struct_value_incoming_rtx, 0), 0) == frame_pointer_rtx
! 676: && GET_CODE (XEXP (XEXP (struct_value_incoming_rtx, 0), 1)) == CONST_INT)
! 677: parm_map[INTVAL (XEXP (XEXP (struct_value_incoming_rtx, 0), 1)) / UNITS_PER_WORD]
! 678: = this_struct_value_rtx;
! 679: else
! 680: abort ();
1.1 root 681: }
682: else
683: {
684: parm_map = NULL;
685: }
686:
687: label_map = (rtx *)alloca ((max_labelno - min_labelno) * sizeof (rtx));
688: label_map -= min_labelno;
689:
690: for (i = min_labelno; i < max_labelno; i++)
691: label_map[i] = gen_label_rtx ();
692:
1.1.1.6 root 693: /* As we copy insns, record the correspondence, so that inter-insn
694: references can be copied into isomorphic structure. */
695:
696: insn_map = (rtx *) alloca (INSN_UID (header) * sizeof (rtx));
697: bzero (insn_map, INSN_UID (header) * sizeof (rtx));
698:
1.1 root 699: /* Set up a target to translate the inline function's value-register. */
700:
701: if (structure_value_addr != 0 || TYPE_MODE (type) == VOIDmode)
702: inline_target = 0;
703: else
1.1.1.3 root 704: {
705: /* Machine mode function was declared to return. */
706: enum machine_mode departing_mode = TYPE_MODE (type);
707: /* (Possibly wider) machine mode it actually computes
708: (for the sake of callers that fail to declare it right). */
709: enum machine_mode arriving_mode
710: = TYPE_MODE (TREE_TYPE (DECL_RESULT (fndecl)));
711:
1.1.1.5 root 712: /* Don't use MEMs as direct targets because on some machines
713: substituting a MEM for a REG makes invalid insns.
714: Let the combiner substitute the MEM if that is valid. */
715: if (target && GET_CODE (target) == REG
716: && GET_MODE (target) == departing_mode)
1.1.1.3 root 717: inline_target = target;
718: else
719: inline_target = target = gen_reg_rtx (departing_mode);
720:
721: /* If function's value was promoted before return,
722: avoid machine mode mismatch when we substitute INLINE_TARGET.
723: But TARGET is what we will return to the caller. */
724: if (arriving_mode != departing_mode)
725: inline_target = gen_rtx (SUBREG, arriving_mode, target, 0);
726: }
1.1 root 727:
728: /* We are about to make space in this function's stack frame
729: for a copy of the stack frame of the inline function.
730: First, create an RTX that points to that stack frame
731: with the same offset usually used for the frame pointer.
732: This will be substituted for all frame-pointer references. */
733:
734: fp_delta = get_frame_size ();
735: #ifdef FRAME_GROWS_DOWNWARD
736: fp_delta = - fp_delta;
737: #endif
738: fp_delta -= STARTING_FRAME_OFFSET;
739:
740: inline_fp_rtx
741: = copy_to_mode_reg (Pmode,
742: plus_constant (frame_pointer_rtx, fp_delta));
743:
744: /* Now allocate the space for that to point at. */
745:
746: assign_stack_local (VOIDmode, DECL_FRAME_SIZE (fndecl));
747:
748: /* Now copy the insns one by one. */
749:
750: for (insn = insns; insn; insn = NEXT_INSN (insn))
751: {
752: rtx copy, pattern, next = 0;
753:
754: switch (GET_CODE (insn))
755: {
756: case INSN:
757: pattern = PATTERN (insn);
758:
759: /* Special handling for the insn immediately after a CALL_INSN
760: that returned a value:
761: If it does copy the value, we must avoid the usual translation
762: of the return-register into INLINE_TARGET.
763: If it just USEs the value, the inline function expects it to
764: stay in the return-register and be returned,
765: so copy it into INLINE_TARGET. */
766:
767: if (follows_call
768: /* Allow a stack-adjust, handled normally, to come in between
769: the call and the value-copying insn. */
770: && ! (GET_CODE (pattern) == SET
771: && SET_DEST (pattern) == stack_pointer_rtx))
772: {
773: if (GET_CODE (pattern) == SET
774: && rtx_equal_p (SET_SRC (pattern), follows_call))
775: /* This insn copies the value: take special care to copy
776: that value to this insn's destination. */
777: {
778: copy = emit_insn (gen_rtx (SET, VOIDmode,
779: copy_rtx_and_substitute (SET_DEST (pattern)),
780: follows_call));
781: copy->integrated = 1;
782: follows_call = 0;
783: break;
784: }
785: else if (GET_CODE (pattern) == USE
786: && rtx_equal_p (XEXP (pattern, 0), follows_call))
787: /* This insn does nothing but says the value is expected
788: to flow through to the inline function's return-value.
789: Make that happen, then ignore this insn. */
790: {
791: copy = emit_insn (gen_rtx (SET, VOIDmode, inline_target,
792: follows_call));
793: copy->integrated = 1;
794: follows_call = 0;
795: break;
796: }
797: /* If it does neither, this value must be ignored. */
798: follows_call = 0;
799: }
800:
801: /* The (USE (REG n)) at return from the function should be ignored
802: since we are changing (REG n) into inline_target. */
1.1.1.6 root 803: copy = 0;
1.1 root 804: if (GET_CODE (pattern) == USE
805: && GET_CODE (XEXP (pattern, 0)) == REG
1.1.1.5 root 806: && REG_FUNCTION_VALUE_P (XEXP (pattern, 0)))
1.1 root 807: break;
808:
809: /* Try to do some quick constant folding here.
810: This will save save execution time of the compiler,
811: as well time and space of the program if done here. */
812: if (GET_CODE (pattern) == SET
813: && SET_DEST (pattern) == cc0_rtx)
814: next = try_fold_cc0 (insn);
815:
816: if (next != 0)
817: {
818: insn = next;
819: }
820: else
821: {
822: copy = emit_insn (copy_rtx_and_substitute (pattern));
823: copy->integrated = 1;
824: }
825: break;
826:
827: case JUMP_INSN:
828: follows_call = 0;
829: if (GET_CODE (PATTERN (insn)) == RETURN)
830: {
831: if (return_label == 0)
832: return_label = gen_label_rtx ();
833: emit_jump (return_label);
834: break;
835: }
836: copy = emit_jump_insn (copy_rtx_and_substitute (PATTERN (insn)));
837: copy->integrated = 1;
838: break;
839:
840: case CALL_INSN:
1.1.1.6 root 841: #if 0
842: /* This should no longer be necessary now that references
843: to this function's return value are flagged to distinguish
844: them from other references to the same hard register. */
1.1 root 845: {
846: rtx newbod;
847: /* If the call's body is (set (reg...) (call...)),
848: the register is a function return register, but DON'T
849: translate it into INLINE_TARGET because it describes the
850: called function, not the caller's return value. */
851: if (GET_CODE (PATTERN (insn)) == SET)
852: newbod = gen_rtx (SET, VOIDmode, SET_DEST (PATTERN (insn)),
853: copy_rtx_and_substitute (SET_SRC (PATTERN (insn))));
1.1.1.6 root 854: else if (GET_CODE (PATTERN (insn)) == PARALLEL
855: && GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) == SET)
856: {
857: register int j;
858: rtx newelem;
859: newbod = gen_rtx (PARALLEL, VOIDmode,
860: rtvec_alloc (XVECLEN (PATTERN (insn), 0)));
861: newelem = gen_rtx (SET, VOIDmode,
862: SET_DEST (XVECEXP (PATTERN (insn), 0, 0)),
863: copy_rtx_and_substitute (SET_SRC (XVECEXP (PATTERN (insn), 0, 0))));
864: XVECEXP (newbod, 0, 0) = newelem;
865: for (j = 1; j < XVECLEN (newbod, 0); j++)
866: XVECEXP (newbod, 0, j)
867: = copy_rtx_and_substitute (XVECEXP (PATTERN (insn), 0, j));
868: }
1.1 root 869: else
870: newbod = copy_rtx_and_substitute (PATTERN (insn));
871: copy = emit_call_insn (newbod);
872: }
1.1.1.6 root 873: #else /* 1 */
874: copy = emit_call_insn (copy_rtx_and_substitute (PATTERN (insn)));
875: #endif /* 1 */
1.1 root 876: copy->integrated = 1;
877: /* Special handling needed for the following INSN depending on
878: whether it copies the value from the fcn return reg. */
879: if (GET_CODE (PATTERN (insn)) == SET)
880: follows_call = SET_DEST (PATTERN (insn));
881: break;
882:
883: case CODE_LABEL:
1.1.1.6 root 884: copy = emit_label (label_map[CODE_LABEL_NUMBER (insn)]);
1.1 root 885: follows_call = 0;
886: break;
887:
888: case BARRIER:
1.1.1.6 root 889: copy = emit_barrier ();
1.1 root 890: break;
891:
892: case NOTE:
1.1.1.7 ! root 893: if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_FUNCTION_END)
! 894: copy = emit_note (NOTE_SOURCE_FILE (insn), NOTE_LINE_NUMBER (insn));
! 895: else
! 896: copy = 0;
1.1 root 897: break;
898:
899: default:
900: abort ();
901: break;
902: }
1.1.1.6 root 903:
904: insn_map[INSN_UID (insn)] = copy;
1.1 root 905: }
906:
907: if (return_label)
908: emit_label (return_label);
909:
910: /* Make copies of the decls of the symbols in the inline function, so that
911: the copies of the variables get declared in the current function. */
912: copy_decl_tree (DECL_INITIAL (fndecl), 0);
913:
914: /* End the scope containing the copied formal parameter variables. */
915:
916: expand_end_bindings (getdecls (), 1);
917: poplevel (1, 1, 0);
918:
919: reg_map = NULL;
920: label_map = NULL;
921:
922: if (ignore || TYPE_MODE (type) == VOIDmode)
923: return 0;
924:
925: if (structure_value_addr)
926: {
927: if (target)
928: return target;
929: return gen_rtx (MEM, BLKmode,
930: memory_address (BLKmode, structure_value_addr));
931: }
932:
1.1.1.3 root 933: return target;
1.1 root 934: }
935:
936: /* Given a chain of PARM_DECLs, ARGS, and a vector of RTL homes VEC,
937: copy each decl into a VAR_DECL, push all of those decls
938: and give each one the corresponding home. */
939:
940: static void
941: copy_parm_decls (args, vec)
942: tree args;
943: rtx *vec;
944: {
945: register tree tail;
946: register int i;
947:
948: for (tail = args, i = 0; tail; tail = TREE_CHAIN (tail), i++)
949: {
950: register tree decl = pushdecl (build_decl (VAR_DECL, DECL_NAME (tail),
951: TREE_TYPE (tail)));
952: DECL_RTL (decl) = vec[i];
953: }
954: }
955:
956: /* Given a LET_STMT node, push decls and levels
957: so as to construct in the current function a tree of contexts
958: isomorphic to the one that is given. */
959:
960: static void
961: copy_decl_tree (let, level)
962: tree let;
963: int level;
964: {
965: tree t;
966:
967: pushlevel (0);
968:
969: for (t = STMT_VARS (let); t; t = TREE_CHAIN (t))
970: {
971: tree d = build_decl (TREE_CODE (t), DECL_NAME (t), TREE_TYPE (t));
972: DECL_SOURCE_LINE (d) = DECL_SOURCE_LINE (t);
973: DECL_SOURCE_FILE (d) = DECL_SOURCE_FILE (t);
974: if (DECL_RTL (t) != 0)
975: DECL_RTL (d) = copy_rtx_and_substitute (DECL_RTL (t));
976: TREE_EXTERNAL (d) = TREE_EXTERNAL (t);
977: TREE_STATIC (d) = TREE_STATIC (t);
978: TREE_PUBLIC (d) = TREE_PUBLIC (t);
979: TREE_LITERAL (d) = TREE_LITERAL (t);
980: TREE_ADDRESSABLE (d) = TREE_ADDRESSABLE (t);
981: TREE_READONLY (d) = TREE_READONLY (t);
982: TREE_VOLATILE (d) = TREE_VOLATILE (t);
983: pushdecl (d);
984: }
985:
986: for (t = STMT_BODY (let); t; t = TREE_CHAIN (t))
987: copy_decl_tree (t, level + 1);
988:
989: poplevel (level > 0, 0, 0);
990: }
991:
992: /* Create a new copy of an rtx.
993: Recursively copies the operands of the rtx,
994: except for those few rtx codes that are sharable. */
995:
996: static rtx
997: copy_rtx_and_substitute (orig)
998: register rtx orig;
999: {
1000: register rtx copy, temp;
1001: register int i, j;
1002: register RTX_CODE code;
1003: register enum machine_mode mode;
1004: register char *format_ptr;
1005: int regno;
1006:
1007: if (orig == 0)
1008: return 0;
1009:
1010: code = GET_CODE (orig);
1011: mode = GET_MODE (orig);
1012:
1013: switch (code)
1014: {
1015: case REG:
1016: /* If a frame-pointer register shows up, then we
1017: must `fix' the reference. If the stack pointer
1018: register shows up, it must be part of stack-adjustments
1019: (*not* because we eliminated the frame pointer!).
1020: Small hard registers are returned as-is. Pseudo-registers
1021: go through their `reg_map'. */
1022: regno = REGNO (orig);
1023: if (regno < FIRST_PSEUDO_REGISTER)
1024: {
1.1.1.5 root 1025: if (REG_FUNCTION_VALUE_P (orig))
1.1 root 1026: return inline_target;
1027: if (regno == FRAME_POINTER_REGNUM)
1028: return plus_constant (orig, fp_delta);
1029: return orig;
1030: }
1031: if (reg_map[regno] == NULL)
1032: reg_map[regno] = gen_reg_rtx (mode);
1033: return reg_map[regno];
1034:
1035: case CODE_LABEL:
1036: return label_map[CODE_LABEL_NUMBER (orig)];
1037:
1038: case LABEL_REF:
1039: copy = rtx_alloc (LABEL_REF);
1040: PUT_MODE (copy, mode);
1041: XEXP (copy, 0) = label_map[CODE_LABEL_NUMBER (XEXP (orig, 0))];
1042: return copy;
1043:
1044: case PC:
1045: case CC0:
1046: case CONST_INT:
1047: case CONST_DOUBLE:
1048: case SYMBOL_REF:
1049: return orig;
1050:
1.1.1.5 root 1051: case CALL:
1052: /* This is given special treatment because the first
1053: operand of a CALL is a (MEM ...) which may get
1054: forced into a register for cse. This is undesirable
1055: if function-address cse isn't wanted or if we won't do cse. */
1056: #ifndef NO_FUNCTION_CSE
1057: if (! (optimize && ! flag_no_function_cse))
1058: #endif
1059: return gen_rtx (CALL, GET_MODE (orig),
1060: gen_rtx (MEM, GET_MODE (XEXP (orig, 0)),
1061: copy_rtx_and_substitute (XEXP (XEXP (orig, 0), 0))),
1062: copy_rtx_and_substitute (XEXP (orig, 1)));
1063: break;
1064:
1.1 root 1065: case PLUS:
1066: /* Note: the PLUS case is not nearly as careful as the MEM
1067: case in terms of preserving addresses. The reason for this
1068: is that it is expected that if a PLUS_EXPR turns out not
1069: to be a legitimate address, reload can fix that up, without
1070: doing major damage. However, a MEM rtx must preside
1071: over a legitimate address. The MEM case has lots of hair
1072: to deal with what happens when it sits on a PLUS... */
1073: /* Take care of the easy case quickly. */
1074: if (XEXP (orig, 0) == frame_pointer_rtx
1075: || XEXP (orig, 1) == frame_pointer_rtx
1076: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1077: && (XEXP (orig, 0) == arg_pointer_rtx
1078: || XEXP (orig, 1) == arg_pointer_rtx)))
1079: {
1080: if (XEXP (orig, 0) == frame_pointer_rtx
1081: || XEXP (orig, 0) == arg_pointer_rtx)
1082: copy = XEXP (orig, 1);
1083: else
1084: copy = XEXP (orig, 0);
1085:
1086: if (GET_CODE (copy) == CONST_INT)
1087: {
1088: int c = INTVAL (copy);
1089:
1090: if (c > 0)
1091: {
1092: copy = parm_map[c / UNITS_PER_WORD];
1093: return XEXP (copy, 0);
1094: }
1095: return gen_rtx (PLUS, mode,
1096: frame_pointer_rtx,
1097: gen_rtx (CONST_INT, SImode,
1098: c + fp_delta));
1099: }
1100: copy = copy_rtx_and_substitute (copy);
1.1.1.6 root 1101: temp = force_reg (mode, gen_rtx (PLUS, mode, frame_pointer_rtx, copy));
1.1 root 1102: return plus_constant (temp, fp_delta);
1103: }
1104: else if (reg_mentioned_p (frame_pointer_rtx, orig)
1105: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1106: && reg_mentioned_p (arg_pointer_rtx, orig)))
1107: {
1108: /* If we have a complex sum which has a frame pointer
1109: in it, and it was a legitimate address, then
1110: keep it that way. */
1111: if (memory_address_p (mode, orig))
1112: {
1113: if (GET_CODE (XEXP (orig, 0)) == CONST_INT)
1114: {
1115: copy = copy_rtx_and_substitute (XEXP (orig, 1));
1116: temp = plus_constant (copy, INTVAL (XEXP (orig, 0)));
1117: }
1118: else if (GET_CODE (XEXP (orig, 1)) == CONST_INT)
1119: {
1120: copy = copy_rtx_and_substitute (XEXP (orig, 0));
1121: temp = plus_constant (copy, INTVAL (XEXP (orig, 1)));
1122: }
1123: else
1124: {
1125: temp = gen_rtx (PLUS, GET_MODE (orig),
1126: copy_rtx_and_substitute (XEXP (orig, 0)),
1127: copy_rtx_and_substitute (XEXP (orig, 1)));
1128: }
1129: temp = memory_address (mode, temp);
1130: }
1131: else
1132: temp = gen_rtx (PLUS, GET_MODE (orig),
1133: copy_rtx_and_substitute (XEXP (orig, 0)),
1134: copy_rtx_and_substitute (XEXP (orig, 1)));
1135: }
1136: else
1137: temp = gen_rtx (PLUS, GET_MODE (orig),
1138: copy_rtx_and_substitute (XEXP (orig, 0)),
1139: copy_rtx_and_substitute (XEXP (orig, 1)));
1140:
1141: return temp;
1.1.1.7 ! root 1142:
1.1 root 1143: case MEM:
1144: /* Take care of easiest case here. */
1145: copy = XEXP (orig, 0);
1146: if (copy == frame_pointer_rtx || copy == arg_pointer_rtx)
1147: return gen_rtx (MEM, mode,
1148: plus_constant (frame_pointer_rtx, fp_delta));
1.1.1.6 root 1149:
1150: /* Allow a pushing-address even if that is not valid as an
1151: ordinary memory address. It indicates we are inlining a special
1152: push-insn. */
1153: #ifdef STACK_GROWS_DOWNWARD
1154: if (GET_CODE (copy) == PRE_DEC && XEXP (copy, 0) == stack_pointer_rtx)
1155: return orig;
1156: #else
1157: if (GET_CODE (copy) == PRE_INC && XEXP (copy, 0) == stack_pointer_rtx)
1158: return orig;
1159: #endif
1160:
1.1.1.7 ! root 1161: /* If this is some other sort of address that isn't generally valid,
! 1162: break out all the registers referred to. */
! 1163: if (! memory_address_p (mode, copy))
! 1164: return gen_rtx (MEM, mode, copy_address (copy));
! 1165:
1.1 root 1166: if (GET_CODE (copy) == PLUS)
1167: {
1168: if (XEXP (copy, 0) == frame_pointer_rtx
1169: || XEXP (copy, 1) == frame_pointer_rtx
1170: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1171: && (XEXP (copy, 0) == arg_pointer_rtx
1172: || XEXP (copy, 1) == arg_pointer_rtx)))
1173: {
1174: rtx reg;
1175: if (XEXP (copy, 0) == frame_pointer_rtx
1176: || XEXP (copy, 0) == arg_pointer_rtx)
1177: reg = XEXP (copy, 0), copy = XEXP (copy, 1);
1178: else
1179: reg = XEXP (copy, 1), copy = XEXP (copy, 0);
1180:
1181: if (GET_CODE (copy) == CONST_INT)
1182: {
1183: int c = INTVAL (copy);
1184:
1.1.1.7 ! root 1185: if (reg == arg_pointer_rtx && c >= first_parm_offset)
1.1 root 1186: {
1187: copy = parm_map[c / UNITS_PER_WORD];
1188:
1189: /* If the MEM is only some of the bytes in the parm,
1190: truncate the parm value to the desired mode. */
1191: if (GET_MODE (copy) != mode
1192: && GET_MODE (copy) != VOIDmode)
1193: return convert_to_mode (mode, copy, 0);
1194: return copy;
1195: }
1196: temp = gen_rtx (PLUS, Pmode,
1197: frame_pointer_rtx,
1198: gen_rtx (CONST_INT, SImode,
1199: c + fp_delta));
1200: if (! memory_address_p (Pmode, temp))
1201: return gen_rtx (MEM, mode, plus_constant (inline_fp_rtx, c));
1202: }
1203: copy = copy_rtx_and_substitute (copy);
1204: temp = gen_rtx (PLUS, Pmode, frame_pointer_rtx, copy);
1205: temp = plus_constant (temp, fp_delta);
1206: temp = memory_address (Pmode, temp);
1207: }
1208: else if (reg_mentioned_p (frame_pointer_rtx, copy)
1209: || (ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1210: && reg_mentioned_p (arg_pointer_rtx, copy)))
1211: {
1212: if (GET_CODE (XEXP (copy, 0)) == CONST_INT)
1213: {
1214: temp = copy_rtx_and_substitute (XEXP (copy, 1));
1215: temp = plus_constant (temp, INTVAL (XEXP (copy, 0)));
1216: }
1217: else if (GET_CODE (XEXP (copy, 1)) == CONST_INT)
1218: {
1219: temp = copy_rtx_and_substitute (XEXP (copy, 0));
1220: temp = plus_constant (temp, INTVAL (XEXP (copy, 1)));
1221: }
1222: else
1223: {
1224: temp = gen_rtx (PLUS, GET_MODE (copy),
1225: copy_rtx_and_substitute (XEXP (copy, 0)),
1226: copy_rtx_and_substitute (XEXP (copy, 1)));
1227: }
1228: }
1229: else
1230: {
1231: if (GET_CODE (XEXP (copy, 1)) == CONST_INT)
1232: temp = plus_constant (copy_rtx_and_substitute (XEXP (copy, 0)),
1233: INTVAL (XEXP (copy, 1)));
1234: else if (GET_CODE (XEXP (copy, 0)) == CONST_INT)
1235: temp = plus_constant (copy_rtx_and_substitute (XEXP (copy, 1)),
1236: INTVAL (XEXP (copy, 0)));
1237: else
1238: {
1239: rtx left = copy_rtx_and_substitute (XEXP (copy, 0));
1240: rtx right = copy_rtx_and_substitute (XEXP (copy, 1));
1241:
1242: temp = gen_rtx (PLUS, GET_MODE (copy), left, right);
1243: }
1244: }
1245: }
1246: else
1247: temp = copy_rtx_and_substitute (copy);
1248:
1249: return change_address (orig, mode, temp);
1250:
1251: case RETURN:
1252: abort ();
1253: }
1254:
1255: copy = rtx_alloc (code);
1256: PUT_MODE (copy, mode);
1257: copy->in_struct = orig->in_struct;
1258: copy->volatil = orig->volatil;
1259: copy->unchanging = orig->unchanging;
1260:
1261: format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
1262:
1263: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
1264: {
1265: rtx new;
1266:
1267: switch (*format_ptr++)
1268: {
1269: case '0':
1270: break;
1271:
1272: case 'e':
1273: XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i));
1274: break;
1275:
1.1.1.6 root 1276: case 'u':
1277: /* Change any references to old-insns to point to the
1278: corresponding copied insns. */
1279: return insn_map[INSN_UID (XEXP (orig, i))];
1280:
1.1 root 1281: case 'E':
1282: XVEC (copy, i) = XVEC (orig, i);
1.1.1.6 root 1283: if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
1.1 root 1284: {
1285: XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
1286: for (j = 0; j < XVECLEN (copy, i); j++)
1287: XVECEXP (copy, i, j) = copy_rtx_and_substitute (XVECEXP (orig, i, j));
1288: }
1289: break;
1290:
1291: case 'i':
1292: XINT (copy, i) = XINT (orig, i);
1293: break;
1294:
1295: case 's':
1296: XSTR (copy, i) = XSTR (orig, i);
1297: break;
1298:
1299: default:
1300: abort ();
1301: }
1302: }
1303: return copy;
1304: }
1305:
1.1.1.7 ! root 1306: /* Like copy_rtx_and_substitute but produces different output, suitable
! 1307: for an ideosyncractic address that isn't memory_address_p.
! 1308: The output resembles the input except that REGs and MEMs are replaced
! 1309: with new psuedo registers. All the "real work" is done in separate
! 1310: insns which set up the values of these new registers. */
! 1311:
! 1312: static rtx
! 1313: copy_address (orig)
! 1314: register rtx orig;
! 1315: {
! 1316: register rtx copy, temp;
! 1317: register int i, j;
! 1318: register RTX_CODE code;
! 1319: register enum machine_mode mode;
! 1320: register char *format_ptr;
! 1321: int regno;
! 1322:
! 1323: if (orig == 0)
! 1324: return 0;
! 1325:
! 1326: code = GET_CODE (orig);
! 1327: mode = GET_MODE (orig);
! 1328:
! 1329: switch (code)
! 1330: {
! 1331: case REG:
! 1332: case MEM:
! 1333: return copy_to_reg (copy_rtx_and_substitute (code));
! 1334:
! 1335: case CODE_LABEL:
! 1336: case LABEL_REF:
! 1337: return copy_rtx_and_substitute (code);
! 1338:
! 1339: case PC:
! 1340: case CC0:
! 1341: case CONST_INT:
! 1342: case CONST_DOUBLE:
! 1343: case SYMBOL_REF:
! 1344: return orig;
! 1345: }
! 1346:
! 1347: copy = rtx_alloc (code);
! 1348: PUT_MODE (copy, mode);
! 1349: copy->in_struct = orig->in_struct;
! 1350: copy->volatil = orig->volatil;
! 1351: copy->unchanging = orig->unchanging;
! 1352:
! 1353: format_ptr = GET_RTX_FORMAT (GET_CODE (copy));
! 1354:
! 1355: for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++)
! 1356: {
! 1357: rtx new;
! 1358:
! 1359: switch (*format_ptr++)
! 1360: {
! 1361: case '0':
! 1362: break;
! 1363:
! 1364: case 'e':
! 1365: XEXP (copy, i) = copy_rtx_and_substitute (XEXP (orig, i));
! 1366: break;
! 1367:
! 1368: case 'u':
! 1369: /* Change any references to old-insns to point to the
! 1370: corresponding copied insns. */
! 1371: return insn_map[INSN_UID (XEXP (orig, i))];
! 1372:
! 1373: case 'E':
! 1374: XVEC (copy, i) = XVEC (orig, i);
! 1375: if (XVEC (orig, i) != NULL && XVECLEN (orig, i) != 0)
! 1376: {
! 1377: XVEC (copy, i) = rtvec_alloc (XVECLEN (orig, i));
! 1378: for (j = 0; j < XVECLEN (copy, i); j++)
! 1379: XVECEXP (copy, i, j) = copy_rtx_and_substitute (XVECEXP (orig, i, j));
! 1380: }
! 1381: break;
! 1382:
! 1383: case 'i':
! 1384: XINT (copy, i) = XINT (orig, i);
! 1385: break;
! 1386:
! 1387: case 's':
! 1388: XSTR (copy, i) = XSTR (orig, i);
! 1389: break;
! 1390:
! 1391: default:
! 1392: abort ();
! 1393: }
! 1394: }
! 1395: return copy;
! 1396: }
! 1397:
1.1 root 1398: /* Attempt to simplify INSN while copying it from an inline fn,
1399: assuming it is a SET that sets CC0.
1400:
1401: If we simplify it, we emit the appropriate insns and return
1402: the last insn that we have handled (since we may handle the insn
1403: that follows INSN as well as INSN itself).
1404:
1405: Otherwise we do nothing and return zero. */
1406:
1407: static rtx
1408: try_fold_cc0 (insn)
1409: rtx insn;
1410: {
1411: rtx cnst = copy_rtx_and_substitute (SET_SRC (PATTERN (insn)));
1412: rtx pat, copy;
1413:
1414: if (CONSTANT_P (cnst)
1415: /* @@ Cautious: Don't know how many of these tests we need. */
1416: && NEXT_INSN (insn)
1417: && GET_CODE (pat = PATTERN (NEXT_INSN (insn))) == SET
1418: && SET_DEST (pat) == pc_rtx
1419: && GET_CODE (pat = SET_SRC (pat)) == IF_THEN_ELSE
1420: && GET_RTX_LENGTH (GET_CODE (XEXP (pat, 0))) == 2)
1421: {
1422: rtx cnst2;
1423: rtx cond = XEXP (pat, 0);
1424:
1425: if ((XEXP (cond, 0) == cc0_rtx
1426: && CONSTANT_P (XEXP (cond, 1))
1427: && (cnst2 = XEXP (cond, 1)))
1428: || (XEXP (cond, 1) == cc0_rtx
1429: && CONSTANT_P (XEXP (cond, 0))
1430: && (cnst2 = XEXP (cond, 0))))
1431: {
1432: copy = fold_out_const_cc0 (cond, XEXP (pat, 1), XEXP (pat, 2),
1433: cnst, cnst2);
1434: if (copy)
1435: {
1436: if (GET_CODE (copy) == LABEL_REF)
1437: {
1438: /* We will branch unconditionally to
1439: the label specified by COPY.
1440: Eliminate dead code by running down the
1441: list of insn until we see a CODE_LABEL.
1442: If the CODE_LABEL is the one specified
1443: by COPY, we win, and can delete all code
1444: up to (but not necessarily including)
1445: that label. Otherwise only win a little:
1446: emit the branch insn, and continue expanding. */
1447: rtx tmp = NEXT_INSN (insn);
1448: while (tmp && GET_CODE (tmp) != CODE_LABEL)
1449: tmp = NEXT_INSN (tmp);
1450: if (! tmp)
1451: abort ();
1452: if (label_map[CODE_LABEL_NUMBER (tmp)] == XEXP (copy, 0))
1453: {
1454: /* Big win. */
1455: return PREV_INSN (tmp);
1456: }
1457: else
1458: {
1459: /* Small win. Emit the unconditional branch,
1460: followed by a BARRIER, so that jump optimization
1461: will know what to do. */
1462: emit_jump (copy);
1463: return NEXT_INSN (insn);
1464: }
1465: }
1466: else if (copy == pc_rtx)
1467: {
1468: /* Do not take the branch, just fall through.
1469: Jump optimize should handle the elimination of
1470: dead code if appropriate. */
1471: return NEXT_INSN (insn);
1472: }
1473: else
1474: abort ();
1475: }
1476: }
1477: }
1478: return 0;
1479: }
1480:
1481: /* If (COND_RTX CNST1 CNST2) yield a result we can treat
1482: as being constant, return THEN_RTX if the result is always
1483: non-zero, and return ELSE_RTX otherwise. */
1484: static rtx
1485: fold_out_const_cc0 (cond_rtx, then_rtx, else_rtx, cnst1, cnst2)
1486: rtx cond_rtx, then_rtx, else_rtx;
1487: rtx cnst1, cnst2;
1488: {
1489: int value1, value2;
1490: int int1 = GET_CODE (cnst1) == CONST_INT;
1491: int int2 = GET_CODE (cnst2) == CONST_INT;
1492: if (int1)
1493: value1 = INTVAL (cnst1);
1494: else
1495: value1 = 1;
1496: if (int2)
1497: value2 = INTVAL (cnst2);
1498: else
1499: value2 = 1;
1500:
1501: switch (GET_CODE (cond_rtx))
1502: {
1503: case NE:
1504: if (int1 && int2)
1505: if (value1 != value2)
1506: return copy_rtx_and_substitute (then_rtx);
1507: else
1508: return copy_rtx_and_substitute (else_rtx);
1509: if (value1 == 0 || value2 == 0)
1510: return copy_rtx_and_substitute (then_rtx);
1511: if (int1 == 0 && int2 == 0)
1512: if (rtx_equal_p (cnst1, cnst2))
1513: return copy_rtx_and_substitute (else_rtx);
1514: break;
1515: case EQ:
1516: if (int1 && int2)
1517: if (value1 == value2)
1518: return copy_rtx_and_substitute (then_rtx);
1519: else
1520: return copy_rtx_and_substitute (else_rtx);
1521: if (value1 == 0 || value2 == 0)
1522: return copy_rtx_and_substitute (else_rtx);
1523: if (int1 == 0 && int2 == 0)
1524: if (rtx_equal_p (cnst1, cnst2))
1525: return copy_rtx_and_substitute (then_rtx);
1526: break;
1527: case GE:
1528: if (int1 && int2)
1529: if (value1 >= value2)
1530: return copy_rtx_and_substitute (then_rtx);
1531: else
1532: return copy_rtx_and_substitute (else_rtx);
1533: if (value1 == 0)
1534: return copy_rtx_and_substitute (else_rtx);
1535: if (value2 == 0)
1536: return copy_rtx_and_substitute (then_rtx);
1537: break;
1538: case GT:
1539: if (int1 && int2)
1540: if (value1 > value2)
1541: return copy_rtx_and_substitute (then_rtx);
1542: else
1543: return copy_rtx_and_substitute (else_rtx);
1544: if (value1 == 0)
1545: return copy_rtx_and_substitute (else_rtx);
1546: if (value2 == 0)
1547: return copy_rtx_and_substitute (then_rtx);
1548: break;
1549: case LE:
1550: if (int1 && int2)
1551: if (value1 <= value2)
1552: return copy_rtx_and_substitute (then_rtx);
1553: else
1554: return copy_rtx_and_substitute (else_rtx);
1555: if (value1 == 0)
1556: return copy_rtx_and_substitute (then_rtx);
1557: if (value2 == 0)
1558: return copy_rtx_and_substitute (else_rtx);
1559: break;
1560: case LT:
1561: if (int1 && int2)
1562: if (value1 < value2)
1563: return copy_rtx_and_substitute (then_rtx);
1564: else
1565: return copy_rtx_and_substitute (else_rtx);
1566: if (value1 == 0)
1567: return copy_rtx_and_substitute (then_rtx);
1568: if (value2 == 0)
1569: return copy_rtx_and_substitute (else_rtx);
1570: break;
1571: case GEU:
1572: if (int1 && int2)
1573: if ((unsigned)value1 >= (unsigned)value2)
1574: return copy_rtx_and_substitute (then_rtx);
1575: else
1576: return copy_rtx_and_substitute (else_rtx);
1577: if (value1 == 0)
1578: return copy_rtx_and_substitute (else_rtx);
1579: if (value2 == 0)
1580: return copy_rtx_and_substitute (then_rtx);
1581: break;
1582: case GTU:
1583: if (int1 && int2)
1584: if ((unsigned)value1 > (unsigned)value2)
1585: return copy_rtx_and_substitute (then_rtx);
1586: else
1587: return copy_rtx_and_substitute (else_rtx);
1588: if (value1 == 0)
1589: return copy_rtx_and_substitute (else_rtx);
1590: if (value2 == 0)
1591: return copy_rtx_and_substitute (then_rtx);
1592: break;
1593: case LEU:
1594: if (int1 && int2)
1595: if ((unsigned)value1 <= (unsigned)value2)
1596: return copy_rtx_and_substitute (then_rtx);
1597: else
1598: return copy_rtx_and_substitute (else_rtx);
1599: if (value1 == 0)
1600: return copy_rtx_and_substitute (then_rtx);
1601: if (value2 == 0)
1602: return copy_rtx_and_substitute (else_rtx);
1603: break;
1604: case LTU:
1605: if (int1 && int2)
1606: if ((unsigned)value1 < (unsigned)value2)
1607: return copy_rtx_and_substitute (then_rtx);
1608: else
1609: return copy_rtx_and_substitute (else_rtx);
1610: if (value1 == 0)
1611: return copy_rtx_and_substitute (then_rtx);
1612: if (value2 == 0)
1613: return copy_rtx_and_substitute (else_rtx);
1614: break;
1615: }
1616: /* Could not hack it. */
1617: return 0;
1618: }
1619:
1620: /* Output the assembly language code for the function FNDECL
1621: from its DECL_SAVED_INSNS. Used for inline functions that are output
1622: at end of compilation instead of where they came in the source. */
1623:
1624: void
1625: output_inline_function (fndecl)
1626: tree fndecl;
1627: {
1628: rtx head = DECL_SAVED_INSNS (fndecl);
1629: rtx last;
1630:
1631: temporary_allocation ();
1632:
1.1.1.4 root 1633: current_function_decl = fndecl;
1634:
1.1 root 1635: /* This call is only used to initialize global variables.
1636: The rtl code it emits will be discarded below. */
1637: expand_function_start (fndecl);
1638:
1639: /* Set stack frame size. */
1640: assign_stack_local (BLKmode, DECL_FRAME_SIZE (fndecl));
1641:
1642: restore_reg_data (FIRST_PARM_INSN (head));
1643:
1644: expand_function_end (fndecl);
1645:
1646: for (last = head; NEXT_INSN (last); last = NEXT_INSN (last))
1647: ;
1648:
1649: set_new_first_and_last_insn (FIRST_PARM_INSN (head), last);
1650:
1651: /* Compile this function all the way down to assembly code. */
1652: rest_of_compilation (fndecl);
1653:
1.1.1.4 root 1654: current_function_decl = 0;
1655:
1.1 root 1656: permanent_allocation ();
1657: }
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