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1.1 root 1: /* Register to Stack convert for GNU compiler.
2: Copyright (C) 1992 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
6: GNU CC is free software; you can redistribute it and/or modify
7: it under the terms of the GNU General Public License as published by
8: the Free Software Foundation; either version 2, or (at your option)
9: any later version.
10:
11: GNU CC is distributed in the hope that it will be useful,
12: but WITHOUT ANY WARRANTY; without even the implied warranty of
13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: GNU General Public License for more details.
15:
16: You should have received a copy of the GNU General Public License
17: along with GNU CC; see the file COPYING. If not, write to
18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
19:
20: /* This pass converts stack-like registers from the "flat register
21: file" model that gcc uses, to a stack convention that the 387 uses.
22:
23: * The form of the input:
24:
25: On input, the function consists of insn that have had their
26: registers fully allocated to a set of "virtual" registers. Note that
27: the word "virtual" is used differently here than elsewhere in gcc: for
28: each virtual stack reg, there is a hard reg, but the mapping between
29: them is not known until this pass is run. On output, hard register
30: numbers have been substituted, and various pop and exchange insns have
31: been emitted. The hard register numbers and the virtual register
32: numbers completely overlap - before this pass, all stack register
33: numbers are virtual, and afterward they are all hard.
34:
35: The virtual registers can be manipulated normally by gcc, and their
36: semantics are the same as for normal registers. After the hard
37: register numbers are substituted, the semantics of an insn containing
38: stack-like regs are not the same as for an insn with normal regs: for
39: instance, it is not safe to delete an insn that appears to be a no-op
40: move. In general, no insn containing hard regs should be changed
41: after this pass is done.
42:
43: * The form of the output:
44:
45: After this pass, hard register numbers represent the distance from
46: the current top of stack to the desired register. A reference to
47: FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1,
48: represents the register just below that, and so forth. Also, REG_DEAD
49: notes indicate whether or not a stack register should be popped.
50:
51: A "swap" insn looks like a parallel of two patterns, where each
52: pattern is a SET: one sets A to B, the other B to A.
53:
54: A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG
55: and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS,
56: will replace the existing stack top, not push a new value.
57:
58: A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose
59: SET_SRC is REG or MEM.
60:
1.1.1.2 ! root 61: The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG
1.1 root 62: appears ambiguous. As a special case, the presence of a REG_DEAD note
63: for FIRST_STACK_REG differentiates between a load insn and a pop.
64:
65: If a REG_DEAD is present, the insn represents a "pop" that discards
66: the top of the register stack. If there is no REG_DEAD note, then the
67: insn represents a "dup" or a push of the current top of stack onto the
68: stack.
69:
70: * Methodology:
71:
72: Existing REG_DEAD and REG_UNUSED notes for stack registers are
73: deleted and recreated from scratch. REG_DEAD is never created for a
74: SET_DEST, only REG_UNUSED.
75:
76: Before life analysis, the mode of each insn is set based on whether
77: or not any stack registers are mentioned within that insn. VOIDmode
78: means that no regs are mentioned anyway, and QImode means that at
79: least one pattern within the insn mentions stack registers. This
80: information is valid until after reg_to_stack returns, and is used
81: from jump_optimize.
82:
83: * asm_operands:
84:
85: There are several rules on the usage of stack-like regs in
86: asm_operands insns. These rules apply only to the operands that are
87: stack-like regs:
88:
89: 1. Given a set of input regs that die in an asm_operands, it is
90: necessary to know which are implicitly popped by the asm, and
91: which must be explicitly popped by gcc.
92:
93: An input reg that is implicitly popped by the asm must be
94: explicitly clobbered, unless it is constrained to match an
95: output operand.
96:
97: 2. For any input reg that is implicitly popped by an asm, it is
98: necessary to know how to adjust the stack to compensate for the pop.
99: If any non-popped input is closer to the top of the reg-stack than
100: the implicitly popped reg, it would not be possible to know what the
101: stack looked like - it's not clear how the rest of the stack "slides
102: up".
103:
104: All implicitly popped input regs must be closer to the top of
105: the reg-stack than any input that is not implicitly popped.
106:
107: 3. It is possible that if an input dies in an insn, reload might
108: use the input reg for an output reload. Consider this example:
109:
110: asm ("foo" : "=t" (a) : "f" (b));
111:
112: This asm says that input B is not popped by the asm, and that
113: the asm pushes a result onto the reg-stack, ie, the stack is one
114: deeper after the asm than it was before. But, it is possible that
115: reload will think that it can use the same reg for both the input and
116: the output, if input B dies in this insn.
117:
118: If any input operand uses the "f" constraint, all output reg
119: constraints must use the "&" earlyclobber.
120:
121: The asm above would be written as
122:
123: asm ("foo" : "=&t" (a) : "f" (b));
124:
125: 4. Some operands need to be in particular places on the stack. All
126: output operands fall in this category - there is no other way to
127: know which regs the outputs appear in unless the user indicates
128: this in the constraints.
129:
130: Output operands must specifically indicate which reg an output
131: appears in after an asm. "=f" is not allowed: the operand
132: constraints must select a class with a single reg.
133:
134: 5. Output operands may not be "inserted" between existing stack regs.
135: Since no 387 opcode uses a read/write operand, all output operands
136: are dead before the asm_operands, and are pushed by the asm_operands.
137: It makes no sense to push anywhere but the top of the reg-stack.
138:
139: Output operands must start at the top of the reg-stack: output
140: operands may not "skip" a reg.
141:
142: 6. Some asm statements may need extra stack space for internal
143: calculations. This can be guaranteed by clobbering stack registers
144: unrelated to the inputs and outputs.
145:
146: Here are a couple of reasonable asms to want to write. This asm
147: takes one input, which is internally popped, and produces two outputs.
148:
149: asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
150:
151: This asm takes two inputs, which are popped by the fyl2xp1 opcode,
152: and replaces them with one output. The user must code the "st(1)"
153: clobber for reg-stack.c to know that fyl2xp1 pops both inputs.
154:
155: asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
156:
157: */
158:
159: #include <stdio.h>
160: #include "config.h"
161: #include "tree.h"
162: #include "rtl.h"
163: #include "insn-config.h"
164: #include "regs.h"
165: #include "hard-reg-set.h"
166: #include "flags.h"
167:
168: #ifdef STACK_REGS
169:
170: #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1)
171:
172: /* True if the current function returns a real value. */
173: static int current_function_returns_real;
174:
175: /* This is the basic stack record. TOP is an index into REG[] such
176: that REG[TOP] is the top of stack. If TOP is -1 the stack is empty.
177:
178: If TOP is -2 the stack is not yet initialized: reg_set indicates
179: which registers are live. Stack initialization consists of placing
180: each live reg in array `reg' and setting `top' appropriately. */
181:
182: typedef struct stack_def
183: {
184: int top; /* index to top stack element */
185: HARD_REG_SET reg_set; /* set of live registers */
186: char reg[REG_STACK_SIZE]; /* register - stack mapping */
187: } *stack;
188:
189: /* highest instruction uid */
190: static int max_uid = 0;
191:
192: /* Number of basic blocks in the current function. */
193: static int blocks;
194:
195: /* Element N is first insn in basic block N.
196: This info lasts until we finish compiling the function. */
197: static rtx *block_begin;
198:
199: /* Element N is last insn in basic block N.
200: This info lasts until we finish compiling the function. */
201: static rtx *block_end;
202:
203: /* Element N is nonzero if control can drop into basic block N */
204: static char *block_drops_in;
205:
206: /* Element N says all about the stack at entry block N */
207: static stack block_stack_in;
208:
209: /* Element N says all about the stack life at the end of block N */
210: static HARD_REG_SET *block_out_reg_set;
211:
212: /* This is where the BLOCK_NUM values are really stored. This is set
213: up by find_blocks and used there and in life_analysis. It can be used
214: later, but only to look up an insn that is the head or tail of some
215: block. life_analysis and the stack register conversion process can
216: add insns within a block. */
217: static short *block_number;
218:
219: /* This is the register file for all register after conversion */
220: static rtx FP_mode_reg[FIRST_PSEUDO_REGISTER][(int) MAX_MACHINE_MODE];
221:
222: /* Get the basic block number of an insn. See note at block_number
223: definition are validity of this information. */
224:
225: #define BLOCK_NUM(INSN) \
226: (((INSN_UID (INSN) > max_uid) \
227: ? (short *)(abort() , 0) \
228: : block_number)[INSN_UID (INSN)])
229:
230: extern rtx gen_jump ();
231: extern rtx gen_movdf ();
232: extern rtx find_regno_note ();
233: extern rtx emit_jump_insn_before ();
234: extern rtx emit_label_after ();
235:
236: /* Forward declarations */
237:
238: static void find_blocks ();
239: static void stack_reg_life_analysis ();
240: static void change_stack ();
241: static void convert_regs ();
242: static void dump_stack_info ();
243:
244: /* Return non-zero if any stack register is mentioned somewhere within PAT. */
245:
246: int
247: stack_regs_mentioned_p (pat)
248: register rtx pat;
249: {
250: register char *fmt;
251: register int i;
252:
253: if (STACK_REG_P (pat))
254: return 1;
255:
256: fmt = GET_RTX_FORMAT (GET_CODE (pat));
257: for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
258: {
259: if (fmt[i] == 'E')
260: {
261: register int j;
262:
263: for (j = XVECLEN (pat, i) - 1; j >= 0; j--)
264: if (stack_regs_mentioned_p (XVECEXP (pat, i, j)))
265: return 1;
266: }
267: else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i)))
268: return 1;
269: }
270:
271: return 0;
272: }
273:
274: /* Convert register usage from "flat" register file usage to a "stack
275: register file. FIRST is the first insn in the function, FILE is the
276: dump file, if used.
277:
278: First compute the beginning and end of each basic block. Do a
279: register life analysis on the stack registers, recording the result
280: for the head and tail of each basic block. The convert each insn one
281: by one. Run a last jump_optimize() pass, if optimizing, to eliminate
282: any cross-jumping created when the converter inserts pop insns.*/
283:
284: void
285: reg_to_stack (first, file)
286: rtx first;
287: FILE *file;
288: {
289: register rtx insn;
290: register int i;
291: int stack_reg_seen = 0;
292: enum machine_mode mode;
293:
294: current_function_returns_real
295: = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl))) == REAL_TYPE;
296:
297: for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode;
298: mode = GET_MODE_WIDER_MODE (mode))
299: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
300: FP_mode_reg[i][(int) mode] = gen_rtx (REG, mode, i);
301:
302: /* Count the basic blocks. Also find maximum insn uid. */
303: {
304: register RTX_CODE prev_code = JUMP_INSN;
305: register RTX_CODE code;
306:
307: max_uid = 0;
308: blocks = 0;
309: for (insn = first; insn; insn = NEXT_INSN (insn))
310: {
311: /* Note that this loop must select the same block boundaries
312: as code in find_blocks. */
313:
314: if (INSN_UID (insn) > max_uid)
315: max_uid = INSN_UID (insn);
316:
317: code = GET_CODE (insn);
318:
319: if (code == CODE_LABEL
320: || (prev_code != INSN
321: && prev_code != CALL_INSN
322: && prev_code != CODE_LABEL
323: && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
324: blocks++;
325:
326: /* Remember whether or not this insn mentions an FP regs.
327: Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */
328:
329: if ((GET_CODE (insn) == INSN || GET_CODE (insn) == CALL_INSN
330: || GET_CODE (insn) == JUMP_INSN)
331: && stack_regs_mentioned_p (PATTERN (insn)))
332: {
333: stack_reg_seen = 1;
334: PUT_MODE (insn, QImode);
335: }
336: else
337: PUT_MODE (insn, VOIDmode);
338:
339: if (code != NOTE)
340: prev_code = code;
341: }
342: }
343:
344: /* If no stack register reference exists in this insn, there isn't
345: anything to convert. */
346:
347: if (! stack_reg_seen)
348: return;
349:
350: /* If there are stack registers, there must be at least one block. */
351:
352: if (! blocks)
353: abort ();
354:
355: /* Allocate some tables that last till end of compiling this function
356: and some needed only in find_blocks and life_analysis. */
357:
358: block_begin = (rtx *) alloca (blocks * sizeof (rtx));
359: block_end = (rtx *) alloca (blocks * sizeof (rtx));
360: block_drops_in = (char *) alloca (blocks);
361:
362: block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def));
363: block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET));
364: bzero (block_stack_in, blocks * sizeof (struct stack_def));
365: bzero (block_out_reg_set, blocks * sizeof (HARD_REG_SET));
366:
367: block_number = (short *) alloca ((max_uid + 1) * sizeof (short));
368:
369: find_blocks (first);
370: stack_reg_life_analysis (first);
371:
372: /* Dump the life analysis debug information before jump
373: optimization, as that will destroy the LABEL_REFS we keep the
374: information in. */
375:
376: if (file)
377: dump_stack_info (file);
378:
379: convert_regs ();
380:
381: if (optimize)
382: jump_optimize (first, 2, 0, 0);
383: }
384:
385: /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the
386: label's chain of references, and note which insn contains each
387: reference. */
388:
389: static void
390: record_label_references (insn, pat)
391: rtx insn, pat;
392: {
393: register enum rtx_code code = GET_CODE (pat);
394: register int i;
395: register char *fmt;
396:
397: if (code == LABEL_REF)
398: {
399: register rtx label = XEXP (pat, 0);
400: register rtx ref;
401:
402: if (GET_CODE (label) != CODE_LABEL)
403: abort ();
404:
405: /* Don't make a duplicate in the code_label's chain. */
406:
407: for (ref = LABEL_REFS (label); ref != label; ref = LABEL_NEXTREF (ref))
408: if (CONTAINING_INSN (ref) == insn)
409: return;
410:
411: CONTAINING_INSN (pat) = insn;
412: LABEL_NEXTREF (pat) = LABEL_REFS (label);
413: LABEL_REFS (label) = pat;
414:
415: return;
416: }
417:
418: fmt = GET_RTX_FORMAT (code);
419: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
420: {
421: if (fmt[i] == 'e')
422: record_label_references (insn, XEXP (pat, i));
423: if (fmt[i] == 'E')
424: {
425: register int j;
426: for (j = 0; j < XVECLEN (pat, i); j++)
427: record_label_references (insn, XVECEXP (pat, i, j));
428: }
429: }
430: }
431:
432: /* Return a pointer to the REG expression within PAT. If PAT is not a
433: REG, possible enclosed by a conversion rtx, return the inner part of
434: PAT that stopped the search. */
435:
436: static rtx *
437: get_true_reg (pat)
438: rtx *pat;
439: {
440: while (GET_CODE (*pat) == SUBREG
441: || GET_CODE (*pat) == FLOAT
442: || GET_CODE (*pat) == FIX
443: || GET_CODE (*pat) == FLOAT_EXTEND
444: || GET_CODE (*pat) == FLOAT_TRUNCATE)
445: pat = & XEXP (*pat, 0);
446:
447: return pat;
448: }
449:
450: /* If REG is a stack register that is marked dead in REGSTACK, then
451: record that it is now live. If REG is not DEST, add a death note to
452: INSN if there isn't one already. If DEST is not a reg, it is safe to
453: assume that it does not mention a reg anywhere within. */
454:
455: static void
456: record_note_if_dead (insn, regstack, reg, dest)
457: rtx insn;
458: stack regstack;
459: rtx reg, dest;
460: {
461: reg = * get_true_reg (& reg);
462:
463: if (STACK_REG_P (reg))
464: {
465: if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (reg)))
466: {
467: if ((! REG_P (dest) || REGNO (dest) != REGNO (reg))
468: && ! find_regno_note (insn, REG_DEAD, REGNO (reg)))
469: REG_NOTES (insn) = gen_rtx (EXPR_LIST,
470: REG_DEAD, reg, REG_NOTES (insn));
471:
472: SET_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
473: }
474: }
475: else
476: if (stack_regs_mentioned_p (reg))
477: abort ();
478: }
479:
480: /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands.
481: N_OPERANDS is the total number of operands. Return which alternative
482: matched, or -1 is no alternative matches.
483:
484: OPERAND_MATCHES is an array which indicates which operand this
485: operand matches due to the constraints, or -1 if no match is required.
486: If two operands match by coincidence, but are not required to match by
487: the constraints, -1 is returned.
488:
489: OPERAND_CLASS is an array which indicates the smallest class
490: required by the constraints. If the alternative that matches calls
491: for some class `class', and the operand matches a subclass of `class',
492: OPERAND_CLASS is set to `class' as required by the constraints, not to
493: the subclass. If an alternative allows more than one class,
494: OPERAND_CLASS is set to the smallest class that is a union of the
495: allowed classes. */
496:
497: static int
498: constrain_asm_operands (n_operands, operands, operand_constraints,
499: operand_matches, operand_class)
500: int n_operands;
501: rtx *operands;
502: char **operand_constraints;
503: int *operand_matches;
504: enum reg_class *operand_class;
505: {
506: char **constraints = (char **) alloca (n_operands * sizeof (char *));
507: char *q;
508: int this_alternative, this_operand;
509: int n_alternatives;
510: int j;
511:
512: for (j = 0; j < n_operands; j++)
513: constraints[j] = operand_constraints[j];
514:
515: /* Compute the number of alternatives in the operands. reload has
516: already guaranteed that all operands have the same number of
517: alternatives. */
518:
519: n_alternatives = 1;
520: for (q = constraints[0]; *q; q++)
521: n_alternatives += (*q == ',');
522:
523: this_alternative = 0;
524: while (this_alternative < n_alternatives)
525: {
526: int lose = 0;
527: int i;
528:
529: /* No operands match, no narrow class requirements yet. */
530: for (i = 0; i < n_operands; i++)
531: {
532: operand_matches[i] = -1;
533: operand_class[i] = NO_REGS;
534: }
535:
536: for (this_operand = 0; this_operand < n_operands; this_operand++)
537: {
538: rtx op = operands[this_operand];
539: enum machine_mode mode = GET_MODE (op);
540: char *p = constraints[this_operand];
541: int offset = 0;
542: int win = 0;
543: int c;
544:
545: if (GET_CODE (op) == SUBREG)
546: {
547: if (GET_CODE (SUBREG_REG (op)) == REG
548: && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER)
549: offset = SUBREG_WORD (op);
550: op = SUBREG_REG (op);
551: }
552:
553: /* An empty constraint or empty alternative
554: allows anything which matched the pattern. */
555: if (*p == 0 || *p == ',')
556: win = 1;
557:
558: while (*p && (c = *p++) != ',')
559: switch (c)
560: {
561: case '=':
562: case '+':
563: case '?':
564: case '#':
565: case '&':
566: case '!':
567: case '*':
568: case '%':
569: /* Ignore these. */
570: break;
571:
572: case '0':
573: case '1':
574: case '2':
575: case '3':
576: case '4':
577: case '5':
578: /* This operand must be the same as a previous one.
579: This kind of constraint is used for instructions such
580: as add when they take only two operands.
581:
582: Note that the lower-numbered operand is passed first. */
583:
584: if (operands_match_p (operands[c - '0'],
585: operands[this_operand]))
586: {
587: operand_matches[this_operand] = c - '0';
588: win = 1;
589: }
590: break;
591:
592: case 'p':
593: /* p is used for address_operands. Since this is an asm,
594: just to make sure that the operand is valid for Pmode. */
595:
596: if (strict_memory_address_p (Pmode, op))
597: win = 1;
598: break;
599:
600: case 'g':
601: /* Anything goes unless it is a REG and really has a hard reg
602: but the hard reg is not in the class GENERAL_REGS. */
603: if (GENERAL_REGS == ALL_REGS
604: || GET_CODE (op) != REG
605: || reg_fits_class_p (op, GENERAL_REGS, offset, mode))
606: {
607: if (GET_CODE (op) == REG)
608: operand_class[this_operand]
609: = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
610: win = 1;
611: }
612: break;
613:
614: case 'r':
615: if (GET_CODE (op) == REG
616: && (GENERAL_REGS == ALL_REGS
617: || reg_fits_class_p (op, GENERAL_REGS, offset, mode)))
618: {
619: operand_class[this_operand]
620: = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS];
621: win = 1;
622: }
623: break;
624:
625: case 'X':
626: /* This is used for a MATCH_SCRATCH in the cases when we
627: don't actually need anything. So anything goes any time. */
628: win = 1;
629: break;
630:
631: case 'm':
632: if (GET_CODE (op) == MEM)
633: win = 1;
634: break;
635:
636: case '<':
637: if (GET_CODE (op) == MEM
638: && (GET_CODE (XEXP (op, 0)) == PRE_DEC
639: || GET_CODE (XEXP (op, 0)) == POST_DEC))
640: win = 1;
641: break;
642:
643: case '>':
644: if (GET_CODE (op) == MEM
645: && (GET_CODE (XEXP (op, 0)) == PRE_INC
646: || GET_CODE (XEXP (op, 0)) == POST_INC))
647: win = 1;
648: break;
649:
650: case 'E':
651: /* Match any CONST_DOUBLE, but only if
652: we can examine the bits of it reliably. */
653: if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT
654: || HOST_BITS_PER_INT != BITS_PER_WORD)
655: && GET_CODE (op) != VOIDmode && ! flag_pretend_float)
656: break;
657: if (GET_CODE (op) == CONST_DOUBLE)
658: win = 1;
659: break;
660:
661: case 'F':
662: if (GET_CODE (op) == CONST_DOUBLE)
663: win = 1;
664: break;
665:
666: case 'G':
667: case 'H':
668: if (GET_CODE (op) == CONST_DOUBLE
669: && CONST_DOUBLE_OK_FOR_LETTER_P (op, c))
670: win = 1;
671: break;
672:
673: case 's':
674: if (GET_CODE (op) == CONST_INT
675: || (GET_CODE (op) == CONST_DOUBLE
676: && GET_MODE (op) == VOIDmode))
677: break;
678: /* Fall through */
679: case 'i':
680: if (CONSTANT_P (op))
681: win = 1;
682: break;
683:
684: case 'n':
685: if (GET_CODE (op) == CONST_INT
686: || (GET_CODE (op) == CONST_DOUBLE
687: && GET_MODE (op) == VOIDmode))
688: win = 1;
689: break;
690:
691: case 'I':
692: case 'J':
693: case 'K':
694: case 'L':
695: case 'M':
696: case 'N':
697: case 'O':
698: case 'P':
699: if (GET_CODE (op) == CONST_INT
700: && CONST_OK_FOR_LETTER_P (INTVAL (op), c))
701: win = 1;
702: break;
703:
704: #ifdef EXTRA_CONSTRAINT
705: case 'Q':
706: case 'R':
707: case 'S':
708: case 'T':
709: case 'U':
710: if (EXTRA_CONSTRAINT (op, c))
711: win = 1;
712: break;
713: #endif
714:
715: case 'V':
716: if (GET_CODE (op) == MEM && ! offsettable_memref_p (op))
717: win = 1;
718: break;
719:
720: case 'o':
721: if (offsettable_memref_p (op))
722: win = 1;
723: break;
724:
725: default:
726: if (GET_CODE (op) == REG
727: && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c),
728: offset, mode))
729: {
730: operand_class[this_operand]
731: = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)];
732: win = 1;
733: }
734: }
735:
736: constraints[this_operand] = p;
737: /* If this operand did not win somehow,
738: this alternative loses. */
739: if (! win)
740: lose = 1;
741: }
742: /* This alternative won; the operands are ok.
743: Change whichever operands this alternative says to change. */
744: if (! lose)
745: break;
746:
747: this_alternative++;
748: }
749:
750: /* For operands constrained to match another operand, copy the other
751: operand's class to this operand's class. */
752: for (j = 0; j < n_operands; j++)
753: if (operand_matches[j] >= 0)
754: operand_class[j] = operand_class[operand_matches[j]];
755:
756: return this_alternative == n_alternatives ? -1 : this_alternative;
757: }
758:
759: /* Record the life info of each stack reg in INSN, updating REGSTACK.
760: N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS
761: is an array of the constraint strings used in the asm statement.
762: OPERANDS is an array of all operands for the insn, and is assumed to
763: contain all output operands, then all inputs operands.
764:
765: There are many rules that an asm statement for stack-like regs must
766: follow. Those rules are explained at the top of this file: the rule
767: numbers below refer to that explanation. */
768:
769: static void
770: record_asm_reg_life (insn, regstack, operands, constraints,
771: n_inputs, n_outputs)
772: rtx insn;
773: stack regstack;
774: rtx *operands;
775: char **constraints;
776: int n_inputs, n_outputs;
777: {
778: int i;
779: int n_operands = n_inputs + n_outputs;
780: int first_input = n_outputs;
781: int n_clobbers;
782: int malformed_asm = 0;
783: rtx body = PATTERN (insn);
784:
785: int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
786:
787: enum reg_class *operand_class
788: = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
789:
790: int reg_used_as_output[FIRST_PSEUDO_REGISTER];
791: int implicitly_dies[FIRST_PSEUDO_REGISTER];
792:
793: rtx *clobber_reg;
794:
795: /* Find out what the constraints required. If no constraint
796: alternative matches, that is a compiler bug: we should have caught
797: such an insn during reload. */
798: i = constrain_asm_operands (n_operands, operands, constraints,
799: operand_matches, operand_class);
800: if (i < 0)
801: abort ();
802:
803: /* Strip SUBREGs here to make the following code simpler. */
804: for (i = 0; i < n_operands; i++)
805: if (GET_CODE (operands[i]) == SUBREG
806: && GET_CODE (SUBREG_REG (operands[i])) == REG)
807: operands[i] = SUBREG_REG (operands[i]);
808:
809: /* Set up CLOBBER_REG. */
810:
811: n_clobbers = 0;
812:
813: if (GET_CODE (body) == PARALLEL)
1.1.1.2 ! root 814: {
! 815: clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
1.1 root 816:
1.1.1.2 ! root 817: for (i = 0; i < XVECLEN (body, 0); i++)
! 818: if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
! 819: {
! 820: rtx clobber = XVECEXP (body, 0, i);
! 821: rtx reg = XEXP (clobber, 0);
1.1 root 822:
1.1.1.2 ! root 823: if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
! 824: reg = SUBREG_REG (reg);
! 825:
! 826: if (STACK_REG_P (reg))
! 827: {
! 828: clobber_reg[n_clobbers] = reg;
! 829: n_clobbers++;
! 830: }
! 831: }
! 832: }
1.1 root 833:
834: /* Enforce rule #4: Output operands must specifically indicate which
835: reg an output appears in after an asm. "=f" is not allowed: the
836: operand constraints must select a class with a single reg.
837:
838: Also enforce rule #5: Output operands must start at the top of
839: the reg-stack: output operands may not "skip" a reg. */
840:
841: bzero (reg_used_as_output, sizeof (reg_used_as_output));
842: for (i = 0; i < n_outputs; i++)
843: if (STACK_REG_P (operands[i]))
844: if (reg_class_size[operand_class[i]] != 1)
845: {
846: error_for_asm
847: (insn, "Output constraint %d must specify a single register", i);
848: malformed_asm = 1;
849: }
850: else
851: reg_used_as_output[REGNO (operands[i])] = 1;
852:
853:
854: /* Search for first non-popped reg. */
855: for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
856: if (! reg_used_as_output[i])
857: break;
858:
859: /* If there are any other popped regs, that's an error. */
860: for (; i < LAST_STACK_REG + 1; i++)
861: if (reg_used_as_output[i])
862: break;
863:
864: if (i != LAST_STACK_REG + 1)
865: {
866: error_for_asm (insn, "Output regs must be grouped at top of stack");
867: malformed_asm = 1;
868: }
869:
870: /* Enforce rule #2: All implicitly popped input regs must be closer
871: to the top of the reg-stack than any input that is not implicitly
872: popped. */
873:
874: bzero (implicitly_dies, sizeof (implicitly_dies));
875: for (i = first_input; i < first_input + n_inputs; i++)
876: if (STACK_REG_P (operands[i]))
877: {
878: /* An input reg is implicitly popped if it is tied to an
879: output, or if there is a CLOBBER for it. */
880: int j;
881:
882: for (j = 0; j < n_clobbers; j++)
883: if (operands_match_p (clobber_reg[j], operands[i]))
884: break;
885:
886: if (j < n_clobbers || operand_matches[i] >= 0)
887: implicitly_dies[REGNO (operands[i])] = 1;
888: }
889:
890: /* Search for first non-popped reg. */
891: for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++)
892: if (! implicitly_dies[i])
893: break;
894:
895: /* If there are any other popped regs, that's an error. */
896: for (; i < LAST_STACK_REG + 1; i++)
897: if (implicitly_dies[i])
898: break;
899:
900: if (i != LAST_STACK_REG + 1)
901: {
902: error_for_asm (insn,
903: "Implicitly popped regs must be grouped at top of stack");
904: malformed_asm = 1;
905: }
906:
907: /* Enfore rule #3: If any input operand uses the "f" constraint, all
908: output constraints must use the "&" earlyclobber.
909:
910: ??? Detect this more deterministically by having constraint_asm_operands
911: record any earlyclobber. */
912:
913: for (i = first_input; i < first_input + n_inputs; i++)
914: if (operand_matches[i] == -1)
915: {
916: int j;
917:
918: for (j = 0; j < n_outputs; j++)
919: if (operands_match_p (operands[j], operands[i]))
920: {
921: error_for_asm (insn,
922: "Output operand %d must use `&' constraint", j);
923: malformed_asm = 1;
924: }
925: }
926:
927: if (malformed_asm)
928: {
929: /* Avoid further trouble with this insn. */
930: PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx);
931: PUT_MODE (insn, VOIDmode);
932: return;
933: }
934:
935: /* Process all outputs */
936: for (i = 0; i < n_outputs; i++)
937: {
938: rtx op = operands[i];
939:
940: if (! STACK_REG_P (op))
941: if (stack_regs_mentioned_p (op))
942: abort ();
943: else
944: continue;
945:
946: /* Each destination is dead before this insn. If the
947: destination is not used after this insn, record this with
948: REG_UNUSED. */
949:
950: if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op)))
951: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op,
952: REG_NOTES (insn));
953:
954: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op));
955: }
956:
957: /* Process all inputs */
958: for (i = first_input; i < first_input + n_inputs; i++)
959: {
960: if (! STACK_REG_P (operands[i]))
961: if (stack_regs_mentioned_p (operands[i]))
962: abort ();
963: else
964: continue;
965:
966: /* If an input is dead after the insn, record a death note.
967: But don't record a death note if there is already a death note,
968: or if the input is also an output. */
969:
970: if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))
971: && operand_matches[i] == -1
972: && ! find_regno_note (insn, REG_DEAD, REGNO (operands[i])))
973: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i],
974: REG_NOTES (insn));
975:
976: SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]));
977: }
978: }
979:
980: /* Scan PAT, which is part of INSN, and record the life & death of
981: stack registers in REGSTACK. If a register was dead, but is an input
982: operand in this insn, then mark the register live and record a death
983: note.
984:
985: If a register is dead after this insn, but is an output operand in
986: this insn, record a REG_UNUSED note.
987:
988: This function does not know about SET_DESTs that are both input and
989: output (such as ZERO_EXTRACT) - this cannot happen on a 387. */
990:
991: static void
992: record_reg_life_pat (insn, regstack, pat)
993: rtx insn;
994: stack regstack;
995: rtx pat;
996: {
997: rtx src, dest;
998:
999: /* We should have already handled any asm. */
1000: if (GET_CODE (pat) == ASM_INPUT || GET_CODE (pat) == ASM_OPERANDS)
1001: abort ();
1002:
1003: if (GET_CODE (pat) != SET)
1004: return;
1005:
1006: dest = * get_true_reg (& SET_DEST (pat));
1007:
1008: /* The destination is dead before this insn. If the destination is
1009: not used after this insn, record this with REG_UNUSED. */
1010:
1011: if (STACK_REG_P (dest))
1012: {
1013: /* ??? This check is unnecessary. */
1014:
1015: if (find_regno_note (insn, REG_UNUSED, REGNO (dest)))
1016: abort ();
1017:
1018: if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (dest)))
1019: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, dest,
1020: REG_NOTES (insn));
1021:
1022: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (dest));
1023: }
1024: else
1025: if (dest != cc0_rtx && stack_regs_mentioned_p (dest))
1026: abort ();
1027:
1028: src = * get_true_reg (& SET_SRC (pat));
1029:
1030: switch (GET_CODE (src))
1031: {
1032: /* ??? get_true_reg will make some of these cases redundant. */
1033:
1034: case PLUS:
1035: case MINUS:
1036: case MULT:
1037: case DIV:
1038: case COMPARE:
1039: record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1040: record_note_if_dead (insn, regstack, XEXP (src, 1), dest);
1041: break;
1042:
1043: case ABS:
1044: case NEG:
1045: case SQRT:
1046: case FLOAT_EXTEND:
1047: case FLOAT_TRUNCATE:
1048: case FLOAT:
1049: case UNSIGNED_FLOAT:
1050: record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1051: break;
1052:
1053: case UNSIGNED_FIX:
1054: case FIX:
1055: src = XEXP (src, 0);
1056: if (GET_CODE (src) == FIX)
1057: record_note_if_dead (insn, regstack, XEXP (src, 0), dest);
1058: else
1059: record_note_if_dead (insn, regstack, src, dest);
1060: break;
1061:
1062: case ASM_OPERANDS:
1063: case ASM_INPUT:
1064: abort (); /* we should have caught this already. */
1065: break;
1066:
1067: case REG:
1068: record_note_if_dead (insn, regstack, src, dest);
1069: break;
1070:
1071: default:
1072: /* If a stack register appears in the src RTL, it is a bug, and
1073: code should be added above to handle it. */
1074:
1075: if (stack_regs_mentioned_p (src))
1076: abort ();
1077: }
1078: }
1079:
1080: /* Calculate the number of inputs and outputs in BODY, an
1081: asm_operands. N_OPERANDS is the total number of operands, and
1082: N_INPUTS and N_OUTPUTS are pointers to ints into which the results are
1083: placed. */
1084:
1085: static void
1086: get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs)
1087: rtx body;
1088: int n_operands;
1089: int *n_inputs, *n_outputs;
1090: {
1091: if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS)
1092: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body));
1093:
1094: else if (GET_CODE (body) == ASM_OPERANDS)
1095: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body);
1096:
1097: else if (GET_CODE (body) == PARALLEL
1098: && GET_CODE (XVECEXP (body, 0, 0)) == SET)
1099: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0)));
1100:
1101: else if (GET_CODE (body) == PARALLEL
1102: && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS)
1103: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0));
1104: else
1105: abort ();
1106:
1107: *n_outputs = n_operands - *n_inputs;
1108: }
1109:
1110: /* Scan INSN, which is in BLOCK, and record the life & death of stack
1111: registers in REGSTACK. This function is called to process insns from
1112: the last insn in a block to the first. The actual scanning is done in
1113: record_reg_life_pat.
1114:
1115: If a register is live after a CALL_INSN, but is not a value return
1116: register for that CALL_INSN, then code is emitted to initialize that
1117: register. The block_end[] data is kept accurate.
1118:
1119: Existing death and unset notes for stack registers are deleted
1120: before processing the insn. */
1121:
1122: static void
1123: record_reg_life (insn, block, regstack)
1124: rtx insn;
1125: int block;
1126: stack regstack;
1127: {
1128: rtx note, *note_link;
1129: int n_operands;
1130:
1131: if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
1132: || INSN_DELETED_P (insn))
1133: return;
1134:
1135: /* Strip death notes for stack regs from this insn */
1136:
1137: note_link = ®_NOTES(insn);
1138: for (note = *note_link; note; note = XEXP (note, 1))
1139: if (STACK_REG_P (XEXP (note, 0))
1140: && (REG_NOTE_KIND (note) == REG_DEAD
1141: || REG_NOTE_KIND (note) == REG_UNUSED))
1142: *note_link = XEXP (note, 1);
1143: else
1144: note_link = &XEXP (note, 1);
1145:
1146: /* Process all patterns in the insn. */
1147:
1148: n_operands = asm_noperands (PATTERN (insn));
1149: if (n_operands >= 0)
1150: {
1151: /* This insn is an `asm' with operands. Decode the operands,
1152: decide how many are inputs, and record the life information. */
1153:
1154: rtx operands[MAX_RECOG_OPERANDS];
1155: rtx body = PATTERN (insn);
1156: int n_inputs, n_outputs;
1157: char **constraints = (char **) alloca (n_operands * sizeof (char *));
1158:
1159: decode_asm_operands (body, operands, 0, constraints, 0);
1160: get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
1161: record_asm_reg_life (insn, regstack, operands, constraints,
1162: n_inputs, n_outputs);
1163: return;
1164: }
1165:
1166: if (GET_CODE (PATTERN (insn)) == PARALLEL)
1167: {
1168: register int i;
1169:
1170: for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1171: record_reg_life_pat (insn, regstack, XVECEXP (PATTERN (insn), 0, i));
1172: }
1173: else if (GET_MODE (insn) == QImode)
1174: record_reg_life_pat (insn, regstack, PATTERN (insn));
1175:
1176: /* There might be a reg that is live after a function call.
1177: Initialize it to zero so that the program does not crash. See comment
1178: towards the end of stack_reg_life_analysis(). */
1179:
1180: if (GET_CODE (insn) == CALL_INSN)
1181: {
1182: int reg = FIRST_FLOAT_REG;
1183:
1184: /* If a stack reg is mentioned in a CALL_INSN, it must be as the
1185: return value; conversely, if a float is returned, a stack reg
1186: must be mentioned. */
1187:
1188: if (stack_regs_mentioned_p (PATTERN (insn)))
1189: reg++;
1190:
1191: for (; reg <= LAST_STACK_REG; reg++)
1192: if (TEST_HARD_REG_BIT (regstack->reg_set, reg))
1193: {
1194: rtx init, pat;
1195:
1196: /* The insn will use virtual register numbers, and so
1197: convert_regs is expected to process these. But BLOCK_NUM
1198: cannot be used on these insns, because they do not appear in
1199: block_number[]. */
1200:
1201: pat = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode],
1202: CONST0_RTX (DFmode));
1203: init = emit_insn_after (pat, insn);
1204: PUT_MODE (init, QImode);
1205:
1206: CLEAR_HARD_REG_BIT (regstack->reg_set, reg);
1207:
1208: /* If the CALL_INSN was the end of a block, move the
1209: block_end to point to the new insn. */
1210:
1211: if (block_end[block] == insn)
1212: block_end[block] = init;
1213: }
1214:
1215: /* Some regs do not survive a CALL */
1216:
1217: AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set);
1218: }
1219: }
1220:
1221: /* Find all basic blocks of the function, which starts with FIRST.
1222: For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */
1223:
1224: static void
1225: find_blocks (first)
1226: rtx first;
1227: {
1228: register rtx insn;
1229: register int block;
1230: register RTX_CODE prev_code = BARRIER;
1231: register RTX_CODE code;
1232:
1233: /* Record where all the blocks start and end.
1234: Record which basic blocks control can drop in to. */
1235:
1236: block = -1;
1237: for (insn = first; insn; insn = NEXT_INSN (insn))
1238: {
1239: /* Note that this loop must select the same block boundaries
1240: as code in reg_to_stack. */
1241:
1242: code = GET_CODE (insn);
1243:
1244: if (code == CODE_LABEL
1245: || (prev_code != INSN
1246: && prev_code != CALL_INSN
1247: && prev_code != CODE_LABEL
1248: && (code == INSN || code == CALL_INSN || code == JUMP_INSN)))
1249: {
1250: block_begin[++block] = insn;
1251: block_end[block] = insn;
1252: block_drops_in[block] = prev_code != BARRIER;
1253: }
1254: else if (code == INSN || code == CALL_INSN || code == JUMP_INSN)
1255: block_end[block] = insn;
1256:
1257: BLOCK_NUM (insn) = block;
1258:
1259: if (code == CODE_LABEL)
1260: LABEL_REFS (insn) = insn; /* delete old chain */
1261:
1262: if (code != NOTE)
1263: prev_code = code;
1264: }
1265:
1266: if (block + 1 != blocks)
1267: abort ();
1268:
1269: /* generate all label references to the correspondending jump insn */
1270: for (block = 0; block < blocks; block++)
1271: {
1272: insn = block_end[block];
1273:
1274: if (GET_CODE (insn) == JUMP_INSN)
1275: record_label_references (insn, PATTERN (insn));
1276: }
1277: }
1278:
1279: /* Determine the which registers are live at the start of each basic
1280: block of the function whose first insn is FIRST.
1281:
1282: First, if the function returns a real_type, mark the function
1283: return type as live at each return point, as the RTL may not give any
1284: hint that the register is live.
1285:
1286: Then, start with the last block and work back to the first block.
1287: Similarly, work backwards within each block, insn by insn, recording
1288: which regs are die and which are used (and therefore live) in the
1289: hard reg set of block_stack_in[].
1290:
1291: After processing each basic block, if there is a label at the start
1292: of the block, propagate the live registers to all jumps to this block.
1293:
1294: As a special case, if there are regs live in this block, that are
1295: not live in a block containing a jump to this label, and the block
1296: containing the jump has already been processed, we must propagate this
1297: block's entry register life back to the block containing the jump, and
1298: restart life analysis from there.
1299:
1300: In the worst case, this function may traverse the insns
1301: REG_STACK_SIZE times. This is necessary, since a jump towards the end
1302: of the insns may not know that a reg is live at a target that is early
1303: in the insns. So we back up and start over with the new reg live.
1304:
1305: If there are registers that are live at the start of the function,
1306: insns are emitted to initialize these registers. Something similar is
1307: done after CALL_INSNs in record_reg_life. */
1308:
1309: static void
1310: stack_reg_life_analysis (first)
1311: rtx first;
1312: {
1313: int reg, block;
1314: struct stack_def regstack;
1315:
1316: if (current_function_returns_real)
1317: {
1318: /* Find all RETURN insns and mark them. */
1319:
1320: for (block = blocks - 1; block >= 0; block--)
1321: if (GET_CODE (block_end[block]) == JUMP_INSN
1322: && GET_CODE (PATTERN (block_end[block])) == RETURN)
1323: SET_HARD_REG_BIT (block_out_reg_set[block], FIRST_STACK_REG);
1324:
1325: /* Mark of the end of last block if we "fall off" the end of the
1326: function into the epilogue. */
1327:
1328: if (GET_CODE (block_end[blocks-1]) != JUMP_INSN
1329: || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN)
1330: SET_HARD_REG_BIT (block_out_reg_set[blocks-1], FIRST_STACK_REG);
1331: }
1332:
1333: /* now scan all blocks backward for stack register use */
1334:
1335: block = blocks - 1;
1336: while (block >= 0)
1337: {
1338: register rtx insn, prev;
1339:
1340: /* current register status at last instruction */
1341:
1342: COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]);
1343:
1344: prev = block_end[block];
1345: do
1346: {
1347: insn = prev;
1348: prev = PREV_INSN (insn);
1349:
1350: /* If the insn is a CALL_INSN, we need to ensure that
1351: everything dies. But otherwise don't process unless there
1352: are some stack regs present. */
1353:
1354: if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
1355: record_reg_life (insn, block, ®stack);
1356:
1357: } while (insn != block_begin[block]);
1358:
1359: /* Set the state at the start of the block. Mark that no
1360: register mapping information known yet. */
1361:
1362: COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set);
1363: block_stack_in[block].top = -2;
1364:
1365: /* If there is a label, propagate our register life to all jumps
1366: to this label. */
1367:
1368: if (GET_CODE (insn) == CODE_LABEL)
1369: {
1370: register rtx label;
1371: int must_restart = 0;
1372:
1373: for (label = LABEL_REFS (insn); label != insn;
1374: label = LABEL_NEXTREF (label))
1375: {
1376: int jump_block = BLOCK_NUM (CONTAINING_INSN (label));
1377:
1378: if (jump_block < block)
1379: IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1380: block_stack_in[block].reg_set);
1381: else
1382: {
1383: /* The block containing the jump has already been
1384: processed. If there are registers that were not known
1385: to be live then, but are live now, we must back up
1386: and restart life analysis from that point with the new
1387: life information. */
1388:
1389: GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set,
1390: block_out_reg_set[jump_block],
1391: win);
1392:
1393: IOR_HARD_REG_SET (block_out_reg_set[jump_block],
1394: block_stack_in[block].reg_set);
1395:
1396: block = jump_block;
1397: must_restart = 1;
1398:
1399: win:
1400: ;
1401: }
1402: }
1403: if (must_restart)
1404: continue;
1405: }
1406:
1407: if (block_drops_in[block])
1408: IOR_HARD_REG_SET (block_out_reg_set[block-1],
1409: block_stack_in[block].reg_set);
1410:
1411: block -= 1;
1412: }
1413:
1414: {
1415: /* If any reg is live at the start of the first block of a
1416: function, then we must guarantee that the reg holds some value by
1417: generating our own "load" of that register. Otherwise a 387 would
1418: fault trying to access an empty register. */
1419:
1420: HARD_REG_SET empty_regs;
1421: CLEAR_HARD_REG_SET (empty_regs);
1422: GO_IF_HARD_REG_SUBSET (block_stack_in[0].reg_set, empty_regs,
1423: no_live_regs);
1424: }
1425:
1426: /* Load zero into each live register. The fact that a register
1427: appears live at the function start does not necessarily imply an error
1428: in the user program: it merely means that we could not determine that
1429: there wasn't such an error, just as -Wunused sometimes gives
1430: "incorrect" warnings. In those cases, these initializations will do
1431: no harm.
1432:
1433: Note that we are inserting virtual register references here:
1434: these insns must be processed by convert_regs later. Also, these
1435: insns will not be in block_number, so BLOCK_NUM() will fail for them. */
1436:
1437: for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
1438: if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg))
1439: {
1440: rtx init_rtx;
1441:
1442: init_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode],
1443: CONST0_RTX (DFmode));
1444: block_begin[0] = emit_insn_after (init_rtx, first);
1445: PUT_MODE (block_begin[0], QImode);
1446:
1447: CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg);
1448: }
1449:
1450: no_live_regs:
1451: ;
1452: }
1453:
1454: /*****************************************************************************
1.1.1.2 ! root 1455: This section deals with stack register substitution, and forms the second
1.1 root 1456: pass over the RTL.
1457: *****************************************************************************/
1458:
1459: /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for
1460: the desired hard REGNO. */
1461:
1462: static void
1463: replace_reg (reg, regno)
1464: rtx *reg;
1465: int regno;
1466: {
1467: if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG
1468: || ! STACK_REG_P (*reg))
1469: abort ();
1470:
1471: if (GET_MODE_CLASS (GET_MODE (*reg)) != MODE_FLOAT)
1472: abort ();
1473:
1474: *reg = FP_mode_reg[regno][(int) GET_MODE (*reg)];
1475: }
1476:
1477: /* Remove a note of type NOTE, which must be found, for register
1478: number REGNO from INSN. Remove only one such note. */
1479:
1480: static void
1481: remove_regno_note (insn, note, regno)
1482: rtx insn;
1483: enum reg_note note;
1484: int regno;
1485: {
1486: register rtx *note_link, this;
1487:
1488: note_link = ®_NOTES(insn);
1489: for (this = *note_link; this; this = XEXP (this, 1))
1490: if (REG_NOTE_KIND (this) == note
1491: && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno)
1492: {
1493: *note_link = XEXP (this, 1);
1494: return;
1495: }
1496: else
1497: note_link = &XEXP (this, 1);
1498:
1499: abort ();
1500: }
1501:
1502: /* Find the hard register number of virtual register REG in REGSTACK.
1503: The hard register number is relative to the top of the stack. -1 is
1504: returned if the register is not found. */
1505:
1506: static int
1507: get_hard_regnum (regstack, reg)
1508: stack regstack;
1509: rtx reg;
1510: {
1511: int i;
1512:
1513: if (! STACK_REG_P (reg))
1514: abort ();
1515:
1516: for (i = regstack->top; i >= 0; i--)
1517: if (regstack->reg[i] == REGNO (reg))
1518: break;
1519:
1520: return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1;
1521: }
1522:
1523: /* Delete INSN from the RTL. Mark the insn, but don't remove it from
1524: the chain of insns. Doing so could confuse block_begin and block_end
1525: if this were the only insn in the block. */
1526:
1527: static void
1528: delete_insn_for_stacker (insn)
1529: rtx insn;
1530: {
1531: PUT_CODE (insn, NOTE);
1532: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
1533: NOTE_SOURCE_FILE (insn) = 0;
1534: INSN_DELETED_P (insn) = 1;
1535: }
1536:
1537: /* Emit an insn to pop virtual register REG before or after INSN.
1538: REGSTACK is the stack state after INSN and is updated to reflect this
1539: pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn
1540: is represented as a SET whose destination is the register to be popped
1541: and source is the top of stack. A death note for the top of stack
1542: cases the movdf pattern to pop. */
1543:
1544: static rtx
1545: emit_pop_insn (insn, regstack, reg, when)
1546: rtx insn;
1547: stack regstack;
1548: rtx reg;
1549: rtx (*when)();
1550: {
1551: rtx pop_insn, pop_rtx;
1552: int hard_regno;
1553:
1554: hard_regno = get_hard_regnum (regstack, reg);
1555:
1556: if (hard_regno < FIRST_STACK_REG)
1557: abort ();
1558:
1559: pop_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[hard_regno][(int) DFmode],
1560: FP_mode_reg[FIRST_STACK_REG][(int) DFmode]);
1561:
1562: pop_insn = (*when) (pop_rtx, insn);
1563: PUT_MODE (pop_insn, VOIDmode);
1564:
1565: REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD,
1566: FP_mode_reg[FIRST_STACK_REG][(int) DFmode],
1567: REG_NOTES (pop_insn));
1568:
1569: regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)]
1570: = regstack->reg[regstack->top];
1571: regstack->top -= 1;
1572: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg));
1573:
1574: return pop_insn;
1575: }
1576:
1577: /* Emit an insn before or after INSN to swap virtual register REG with the
1578: top of stack. WHEN should be `emit_insn_before' or `emit_insn_before'
1579: REGSTACK is the stack state before the swap, and is updated to reflect
1580: the swap. A swap insn is represented as a PARALLEL of two patterns:
1581: each pattern moves one reg to the other.
1582:
1583: If REG is already at the top of the stack, no insn is emitted. */
1584:
1585: static void
1586: emit_hard_swap_insn (insn, regstack, hard_regno, when)
1587: rtx insn;
1588: stack regstack;
1589: int hard_regno;
1590: rtx (*when)();
1591: {
1592: rtx gen_swapdf();
1593: rtx swap_rtx, swap_insn;
1594: int tmp, other;
1595:
1596: if (hard_regno == FIRST_STACK_REG)
1597: return;
1598:
1599: swap_rtx = gen_swapdf (FP_mode_reg[hard_regno][(int) DFmode],
1600: FP_mode_reg[FIRST_STACK_REG][(int) DFmode]);
1601: swap_insn = (*when) (swap_rtx, insn);
1602: PUT_MODE (swap_insn, VOIDmode);
1603:
1604: other = regstack->top - (hard_regno - FIRST_STACK_REG);
1605:
1606: tmp = regstack->reg[other];
1607: regstack->reg[other] = regstack->reg[regstack->top];
1608: regstack->reg[regstack->top] = tmp;
1609: }
1610:
1611: /* Emit an insn before or after INSN to swap virtual register REG with the
1612: top of stack. See comments before emit_hard_swap_insn. */
1613:
1614: static void
1615: emit_swap_insn (insn, regstack, reg, when)
1616: rtx insn;
1617: stack regstack;
1618: rtx reg;
1619: rtx (*when)();
1620: {
1621: int hard_regno;
1622:
1623: hard_regno = get_hard_regnum (regstack, reg);
1624: if (hard_regno < FIRST_STACK_REG)
1625: abort ();
1626:
1627: emit_hard_swap_insn (insn, regstack, hard_regno, when);
1628: }
1629:
1630: /* Handle a move to or from a stack register in PAT, which is in INSN.
1631: REGSTACK is the current stack. */
1632:
1633: static void
1634: move_for_stack_reg (insn, regstack, pat)
1635: rtx insn;
1636: stack regstack;
1637: rtx pat;
1638: {
1639: rtx *src = get_true_reg (&SET_SRC (pat));
1640: rtx *dest = get_true_reg (&SET_DEST (pat));
1641: rtx note;
1642:
1643: if (STACK_REG_P (*src) && STACK_REG_P (*dest))
1644: {
1645: /* Write from one stack reg to another. If SRC dies here, then
1646: just change the register mapping and delete the insn. */
1647:
1648: note = find_regno_note (insn, REG_DEAD, REGNO (*src));
1649: if (note)
1650: {
1651: int i;
1652:
1653: /* If this is a no-op move, there must not be a REG_DEAD note. */
1654: if (REGNO (*src) == REGNO (*dest))
1655: abort ();
1656:
1657: for (i = regstack->top; i >= 0; i--)
1658: if (regstack->reg[i] == REGNO (*src))
1659: break;
1660:
1661: /* The source must be live, and the dest must be dead. */
1662: if (i < 0 || get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1663: abort ();
1664:
1665: /* It is possible that the dest is unused after this insn.
1666: If so, just pop the src. */
1667:
1668: if (find_regno_note (insn, REG_UNUSED, REGNO (*dest)))
1669: {
1670: emit_pop_insn (insn, regstack, *src, emit_insn_after);
1671:
1672: delete_insn_for_stacker (insn);
1673: return;
1674: }
1675:
1676: regstack->reg[i] = REGNO (*dest);
1677:
1678: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1679: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src));
1680:
1681: delete_insn_for_stacker (insn);
1682:
1683: return;
1684: }
1685:
1686: /* The source reg does not die. */
1687:
1688: /* If this appears to be a no-op move, delete it, or else it
1689: will confuse the machine description output patterns. But if
1690: it is REG_UNUSED, we must pop the reg now, as per-insn processing
1691: for REG_UNUSED will not work for deleted insns. */
1692:
1693: if (REGNO (*src) == REGNO (*dest))
1694: {
1695: if (find_regno_note (insn, REG_UNUSED, REGNO (*dest)))
1696: emit_pop_insn (insn, regstack, *dest, emit_insn_after);
1697:
1698: delete_insn_for_stacker (insn);
1699: return;
1700: }
1701:
1702: /* The destination ought to be dead */
1703: if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1704: abort ();
1705:
1706: replace_reg (src, get_hard_regnum (regstack, *src));
1707:
1708: regstack->reg[++regstack->top] = REGNO (*dest);
1709: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1710: replace_reg (dest, FIRST_STACK_REG);
1711: }
1712: else if (STACK_REG_P (*src))
1713: {
1714: /* Save from a stack reg to MEM, or possibly integer reg. Since
1715: only top of stack may be saved, emit an exchange first if
1716: needs be. */
1717:
1718: emit_swap_insn (insn, regstack, *src, emit_insn_before);
1719:
1720: note = find_regno_note (insn, REG_DEAD, REGNO (*src));
1721: if (note)
1722: {
1723: replace_reg (&XEXP (note, 0), FIRST_STACK_REG);
1724: regstack->top--;
1725: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src));
1726: }
1727:
1728: replace_reg (src, FIRST_STACK_REG);
1729: }
1730: else if (STACK_REG_P (*dest))
1731: {
1732: /* Load from MEM, or possibly integer REG or constant, into the
1733: stack regs. The actual target is always the top of the
1734: stack. The stack mapping is changed to reflect that DEST is
1735: now at top of stack. */
1736:
1737: /* The destination ought to be dead */
1738: if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG)
1739: abort ();
1740:
1741: if (regstack->top >= REG_STACK_SIZE)
1742: abort ();
1743:
1744: regstack->reg[++regstack->top] = REGNO (*dest);
1745: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1746: replace_reg (dest, FIRST_STACK_REG);
1747: }
1748: else
1749: abort ();
1750: }
1751:
1752: /* Handle a comparison. Special care needs to be taken to avoid
1753: causing comparisons that a 387 cannot do correctly, such as EQ.
1754:
1755: Also, a pop insn may need to be emitted. The 387 does have an
1756: `fcompp' insn that can pop two regs, but it is sometimes too expensive
1757: to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to
1758: set up. */
1759:
1760: static void
1761: compare_for_stack_reg (insn, regstack, pat)
1762: rtx insn;
1763: stack regstack;
1764: rtx pat;
1765: {
1766: rtx *src1, *src2;
1767: rtx src1_note, src2_note;
1768:
1769: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1770: src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1771:
1772: /* The first argument must always be a stack reg. */
1773: /* ??? why? */
1774:
1775: if (! STACK_REG_P (*src1))
1776: abort ();
1777:
1778: /* We will fix any death note later. */
1779:
1780: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1781:
1782: if (STACK_REG_P (*src2))
1783: src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1784: else
1785: src2_note = 0;
1786:
1787: emit_swap_insn (insn, regstack, *src1, emit_insn_before);
1788:
1789: replace_reg (src1, FIRST_STACK_REG);
1790:
1791: if (STACK_REG_P (*src2))
1792: replace_reg (src2, get_hard_regnum (regstack, *src2));
1793:
1794: if (src1_note)
1795: {
1796: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0)));
1797: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1798: regstack->top--;
1799: }
1800:
1801: /* If the second operand dies, handle that. But if the operands are
1802: the same stack register, don't bother, because only one death is
1803: needed, and it was just handled. */
1804:
1805: if (src2_note
1806: && ! (STACK_REG_P (*src1)
1807: && STACK_REG_P (*src2)
1808: && REGNO (*src1) == REGNO (*src2)))
1809: {
1810: /* As a special case, two regs may die in this insn if src2 is
1811: next to top of stack and the top of stack also dies. Since
1812: we have already popped src1, "next to top of stack" is really
1813: at top (FIRST_STACK_REG) now. */
1814:
1815: if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG
1816: && src1_note)
1817: {
1818: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0)));
1819: replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1);
1820: regstack->top--;
1821: }
1822: else
1823: {
1824: /* The 386 can only represent death of the first operand in
1825: the case handled above. In all other cases, emit a separate
1826: pop and remove the death note from here. */
1827:
1828: remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0)));
1829:
1830: emit_pop_insn (insn, regstack, XEXP (src2_note, 0),
1831: emit_insn_after);
1832: }
1833: }
1834: }
1835:
1836: /* Substitute new registers in PAT, which is part of INSN. REGSTACK
1837: is the current register layout. */
1838:
1839: static void
1840: subst_stack_regs_pat (insn, regstack, pat)
1841: rtx insn;
1842: stack regstack;
1843: rtx pat;
1844: {
1845: rtx *dest, *src;
1846: rtx *src1 = 0, *src2;
1847: rtx src1_note, src2_note;
1848:
1849: if (GET_CODE (pat) != SET)
1850: return;
1851:
1852: dest = get_true_reg (&SET_DEST (pat));
1853: src = get_true_reg (&SET_SRC (pat));
1854:
1855: /* See if this is a `movM' pattern, and handle elsewhere if so. */
1856:
1857: if (*dest != cc0_rtx
1858: && (STACK_REG_P (*src)
1859: || (STACK_REG_P (*dest)
1860: && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM
1861: || GET_CODE (*src) == CONST_DOUBLE))))
1862: move_for_stack_reg (insn, regstack, pat);
1863: else
1864: switch (GET_CODE (SET_SRC (pat)))
1865: {
1866: case COMPARE:
1867: compare_for_stack_reg (insn, regstack, pat);
1868: break;
1869:
1870: case CALL:
1871: regstack->reg[++regstack->top] = REGNO (*dest);
1872: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1873: replace_reg (dest, FIRST_STACK_REG);
1874: break;
1875:
1876: case REG:
1877: /* This is a `tstM2' case. */
1878: if (*dest != cc0_rtx)
1879: abort ();
1880:
1881: src1 = src;
1882:
1883: /* Fall through. */
1884:
1885: case SQRT:
1886: case ABS:
1887: case NEG:
1888: /* These insns only operate on the top of the stack. DEST might
1889: be cc0_rtx if we're processing a tstM pattern. Also, it's
1890: possible that the tstM case results in a REG_DEAD note on the
1891: source. */
1892:
1893: if (src1 == 0)
1894: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1895:
1896: emit_swap_insn (insn, regstack, *src1, emit_insn_before);
1897:
1898: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1899:
1900: if (STACK_REG_P (*dest))
1901: replace_reg (dest, FIRST_STACK_REG);
1902:
1903: if (src1_note)
1904: {
1905: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1906: regstack->top--;
1907: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1));
1908: }
1909:
1910: replace_reg (src1, FIRST_STACK_REG);
1911:
1912: break;
1913:
1914: case MINUS:
1915: case DIV:
1916: /* On i386, reversed forms of subM3 and divM3 exist for
1917: MODE_FLOAT, so the same code that works for addM3 and mulM3
1918: can be used. */
1919: case MULT:
1920: case PLUS:
1921: /* These insns can accept the top of stack as a destination
1922: from a stack reg or mem, or can use the top of stack as a
1923: source and some other stack register (possibly top of stack)
1924: as a destination. */
1925:
1926: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0));
1927: src2 = get_true_reg (&XEXP (SET_SRC (pat), 1));
1928:
1929: /* We will fix any death note later. */
1930:
1931: if (STACK_REG_P (*src1))
1932: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1));
1933: else
1934: src1_note = 0;
1935: if (STACK_REG_P (*src2))
1936: src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2));
1937: else
1938: src2_note = 0;
1939:
1940: /* If either operand is not a stack register, then the dest
1941: must be top of stack. */
1942:
1943: if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2))
1944: emit_swap_insn (insn, regstack, *dest, emit_insn_before);
1945: else
1946: {
1947: /* Both operands are REG. If neither operand is already
1948: at the top of stack, choose to make the one that is the dest
1949: the new top of stack.
1950:
1951: ??? A later optimization here would be to look forward
1952: in the insns and see which source reg will be needed at top
1953: of stack soonest. */
1954:
1955: int src1_hard_regnum, src2_hard_regnum;
1956:
1957: src1_hard_regnum = get_hard_regnum (regstack, *src1);
1958: src2_hard_regnum = get_hard_regnum (regstack, *src2);
1959: if (src1_hard_regnum == -1 || src2_hard_regnum == -1)
1960: abort ();
1961:
1962: if (src1_hard_regnum != FIRST_STACK_REG
1963: && src2_hard_regnum != FIRST_STACK_REG)
1964: emit_swap_insn (insn, regstack, *dest, emit_insn_before);
1965: }
1966:
1967: if (STACK_REG_P (*src1))
1968: replace_reg (src1, get_hard_regnum (regstack, *src1));
1969: if (STACK_REG_P (*src2))
1970: replace_reg (src2, get_hard_regnum (regstack, *src2));
1971:
1972: if (src1_note)
1973: {
1974: /* If the register that dies is at the top of stack, then
1975: the destination is somewhere else - merely substitute it.
1976: But if the reg that dies is not at top of stack, then
1977: move the top of stack to the dead reg, as though we had
1978: done the insn and then a store-with-pop. */
1979:
1980: if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top])
1981: {
1982: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1983: replace_reg (dest, get_hard_regnum (regstack, *dest));
1984: }
1985: else
1986: {
1987: int regno = get_hard_regnum (regstack, XEXP (src1_note, 0));
1988:
1989: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
1990: replace_reg (dest, regno);
1991:
1992: regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
1993: = regstack->reg[regstack->top];
1994: }
1995:
1996: CLEAR_HARD_REG_BIT (regstack->reg_set,
1997: REGNO (XEXP (src1_note, 0)));
1998: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG);
1999: regstack->top--;
2000: }
2001: else if (src2_note)
2002: {
2003: if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top])
2004: {
2005: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2006: replace_reg (dest, get_hard_regnum (regstack, *dest));
2007: }
2008: else
2009: {
2010: int regno = get_hard_regnum (regstack, XEXP (src2_note, 0));
2011:
2012: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2013: replace_reg (dest, regno);
2014:
2015: regstack->reg[regstack->top - (regno - FIRST_STACK_REG)]
2016: = regstack->reg[regstack->top];
2017: }
2018:
2019: CLEAR_HARD_REG_BIT (regstack->reg_set,
2020: REGNO (XEXP (src2_note, 0)));
2021: replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG);
2022: regstack->top--;
2023: }
2024: else
2025: {
2026: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest));
2027: replace_reg (dest, get_hard_regnum (regstack, *dest));
2028: }
2029:
2030: break;
2031:
2032: default:
2033: abort ();
2034: }
2035: }
2036:
2037: /* Substitute hard regnums for any stack regs in INSN, which has
2038: N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info
2039: before the insn, and is updated with changes made here. CONSTAINTS is
2040: an array of the constraint strings used in the asm statement.
2041:
2042: OPERANDS is an array of the operands, and OPERANDS_LOC is a
2043: parallel array of where the operands were found. The output operands
2044: all preceed the input operands.
2045:
2046: There are several requirements and assumptions about the use of
2047: stack-like regs in asm statements. These rules are enforced by
2048: record_asm_stack_regs; see comments there for details. Any
2049: asm_operands left in the RTL at this point may be assume to meet the
2050: requirements, since record_asm_stack_regs removes any problem asm. */
2051:
2052: static void
2053: subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints,
2054: n_inputs, n_outputs)
2055: rtx insn;
2056: stack regstack;
2057: rtx *operands, **operands_loc;
2058: char **constraints;
2059: int n_inputs, n_outputs;
2060: {
2061: int n_operands = n_inputs + n_outputs;
2062: int first_input = n_outputs;
2063: rtx body = PATTERN (insn);
2064:
2065: int *operand_matches = (int *) alloca (n_operands * sizeof (int *));
2066: enum reg_class *operand_class
2067: = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *));
2068:
2069: rtx *note_reg; /* Array of note contents */
2070: rtx **note_loc; /* Address of REG field of each note */
2071: enum reg_note *note_kind; /* The type of each note */
2072:
2073: rtx *clobber_reg;
2074: rtx **clobber_loc;
2075:
2076: struct stack_def temp_stack;
2077: int n_notes;
2078: int n_clobbers;
2079: rtx note;
2080: int i;
2081:
2082: /* Find out what the constraints required. If no constraint
2083: alternative matches, that is a compiler bug: we should have caught
2084: such an insn during the life analysis pass (and reload should have
2085: caught it regardless). */
2086:
2087: i = constrain_asm_operands (n_operands, operands, constraints,
2088: operand_matches, operand_class);
2089: if (i < 0)
2090: abort ();
2091:
2092: /* Strip SUBREGs here to make the following code simpler. */
2093: for (i = 0; i < n_operands; i++)
2094: if (GET_CODE (operands[i]) == SUBREG
2095: && GET_CODE (SUBREG_REG (operands[i])) == REG)
2096: {
2097: operands_loc[i] = & SUBREG_REG (operands[i]);
2098: operands[i] = SUBREG_REG (operands[i]);
2099: }
2100:
2101: /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */
2102:
2103: for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1))
2104: i++;
2105:
2106: note_reg = (rtx *) alloca (i * sizeof (rtx));
2107: note_loc = (rtx **) alloca (i * sizeof (rtx *));
2108: note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note));
2109:
2110: n_notes = 0;
2111: for (note = REG_NOTES (insn); note; note = XEXP (note, 1))
2112: {
2113: rtx reg = XEXP (note, 0);
2114: rtx *loc = & XEXP (note, 0);
2115:
2116: if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
2117: {
2118: loc = & SUBREG_REG (reg);
2119: reg = SUBREG_REG (reg);
2120: }
2121:
2122: if (STACK_REG_P (reg)
2123: && (REG_NOTE_KIND (note) == REG_DEAD
2124: || REG_NOTE_KIND (note) == REG_UNUSED))
2125: {
2126: note_reg[n_notes] = reg;
2127: note_loc[n_notes] = loc;
2128: note_kind[n_notes] = REG_NOTE_KIND (note);
2129: n_notes++;
2130: }
2131: }
2132:
2133: /* Set up CLOBBER_REG and CLOBBER_LOC. */
2134:
2135: n_clobbers = 0;
2136:
2137: if (GET_CODE (body) == PARALLEL)
1.1.1.2 ! root 2138: {
! 2139: clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *));
! 2140: clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **));
1.1 root 2141:
1.1.1.2 ! root 2142: for (i = 0; i < XVECLEN (body, 0); i++)
! 2143: if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER)
! 2144: {
! 2145: rtx clobber = XVECEXP (body, 0, i);
! 2146: rtx reg = XEXP (clobber, 0);
! 2147: rtx *loc = & XEXP (clobber, 0);
1.1 root 2148:
1.1.1.2 ! root 2149: if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG)
! 2150: {
! 2151: loc = & SUBREG_REG (reg);
! 2152: reg = SUBREG_REG (reg);
! 2153: }
! 2154:
! 2155: if (STACK_REG_P (reg))
! 2156: {
! 2157: clobber_reg[n_clobbers] = reg;
! 2158: clobber_loc[n_clobbers] = loc;
! 2159: n_clobbers++;
! 2160: }
! 2161: }
! 2162: }
1.1 root 2163:
2164: bcopy (regstack, &temp_stack, sizeof (temp_stack));
2165:
2166: /* Put the input regs into the desired place in TEMP_STACK. */
2167:
2168: for (i = first_input; i < first_input + n_inputs; i++)
2169: if (STACK_REG_P (operands[i])
2170: && reg_class_subset_p (operand_class[i], FLOAT_REGS)
2171: && operand_class[i] != FLOAT_REGS)
2172: {
2173: /* If an operand needs to be in a particular reg in
2174: FLOAT_REGS, the constraint was either 't' or 'u'. Since
2175: these constraints are for single register classes, and reload
2176: guaranteed that operand[i] is already in that class, we can
2177: just use REGNO (operands[i]) to know which actual reg this
2178: operand needs to be in. */
2179:
2180: int regno = get_hard_regnum (&temp_stack, operands[i]);
2181:
2182: if (regno < 0)
2183: abort ();
2184:
2185: if (regno != REGNO (operands[i]))
2186: {
2187: /* operands[i] is not in the right place. Find it
2188: and swap it with whatever is already in I's place.
2189: K is where operands[i] is now. J is where it should
2190: be. */
2191: int j, k, temp;
2192:
2193: k = temp_stack.top - (regno - FIRST_STACK_REG);
2194: j = (temp_stack.top
2195: - (REGNO (operands[i]) - FIRST_STACK_REG));
2196:
2197: temp = temp_stack.reg[k];
2198: temp_stack.reg[k] = temp_stack.reg[j];
2199: temp_stack.reg[j] = temp;
2200: }
2201: }
2202:
2203: /* emit insns before INSN to make sure the reg-stack is in the right
2204: order. */
2205:
2206: change_stack (insn, regstack, &temp_stack, emit_insn_before);
2207:
2208: /* Make the needed input register substitutions. Do death notes and
2209: clobbers too, because these are for inputs, not outputs. */
2210:
2211: for (i = first_input; i < first_input + n_inputs; i++)
2212: if (STACK_REG_P (operands[i]))
2213: {
2214: int regnum = get_hard_regnum (regstack, operands[i]);
2215:
2216: if (regnum < 0)
2217: abort ();
2218:
2219: replace_reg (operands_loc[i], regnum);
2220: }
2221:
2222: for (i = 0; i < n_notes; i++)
2223: if (note_kind[i] == REG_DEAD)
2224: {
2225: int regnum = get_hard_regnum (regstack, note_reg[i]);
2226:
2227: if (regnum < 0)
2228: abort ();
2229:
2230: replace_reg (note_loc[i], regnum);
2231: }
2232:
2233: for (i = 0; i < n_clobbers; i++)
2234: {
2235: /* It's OK for a CLOBBER to reference a reg that is not live.
2236: Don't try to replace it in that case. */
2237: int regnum = get_hard_regnum (regstack, clobber_reg[i]);
2238:
2239: if (regnum >= 0)
2240: {
2241: /* Sigh - clobbers always have QImode. But replace_reg knows
2242: that these regs can't be MODE_INT and will abort. Just put
2243: the right reg there without calling replace_reg. */
2244:
2245: *clobber_loc[i] = FP_mode_reg[regnum][(int) DFmode];
2246: }
2247: }
2248:
2249: /* Now remove from REGSTACK any inputs that the asm implicitly popped. */
2250:
2251: for (i = first_input; i < first_input + n_inputs; i++)
2252: if (STACK_REG_P (operands[i]))
2253: {
2254: /* An input reg is implicitly popped if it is tied to an
2255: output, or if there is a CLOBBER for it. */
2256: int j;
2257:
2258: for (j = 0; j < n_clobbers; j++)
2259: if (operands_match_p (clobber_reg[j], operands[i]))
2260: break;
2261:
2262: if (j < n_clobbers || operand_matches[i] >= 0)
2263: {
2264: /* operands[i] might not be at the top of stack. But that's OK,
2265: because all we need to do is pop the right number of regs
2266: off of the top of the reg-stack. record_asm_stack_regs
2267: guaranteed that all implicitly popped regs were grouped
2268: at the top of the reg-stack. */
2269:
2270: CLEAR_HARD_REG_BIT (regstack->reg_set,
2271: regstack->reg[regstack->top]);
2272: regstack->top--;
2273: }
2274: }
2275:
2276: /* Now add to REGSTACK any outputs that the asm implicitly pushed.
2277: Note that there isn't any need to substitute register numbers.
2278: ??? Explain why this is true. */
2279:
2280: for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--)
2281: {
2282: /* See if there is an output for this hard reg. */
2283: int j;
2284:
2285: for (j = 0; j < n_outputs; j++)
2286: if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i)
2287: {
2288: regstack->reg[++regstack->top] = i;
2289: SET_HARD_REG_BIT (regstack->reg_set, i);
2290: break;
2291: }
2292: }
2293:
2294: /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD
2295: input that the asm didn't implicitly pop. If the asm didn't
1.1.1.2 ! root 2296: implicitly pop an input reg, that reg will still be live.
1.1 root 2297:
2298: Note that we can't use find_regno_note here: the register numbers
2299: in the death notes have already been substituted. */
2300:
1.1.1.2 ! root 2301: for (i = 0; i < n_outputs; i++)
! 2302: if (STACK_REG_P (operands[i]))
! 2303: {
! 2304: int j;
! 2305:
! 2306: for (j = 0; j < n_notes; j++)
! 2307: if (REGNO (operands[i]) == REGNO (note_reg[j])
! 2308: && note_kind[j] == REG_UNUSED)
! 2309: {
! 2310: insn = emit_pop_insn (insn, regstack, operands[i],
! 2311: emit_insn_after);
! 2312: break;
! 2313: }
! 2314: }
! 2315:
! 2316: for (i = first_input; i < first_input + n_inputs; i++)
1.1 root 2317: if (STACK_REG_P (operands[i]))
2318: {
2319: int j;
2320:
2321: for (j = 0; j < n_notes; j++)
2322: if (REGNO (operands[i]) == REGNO (note_reg[j])
1.1.1.2 ! root 2323: && note_kind[j] == REG_DEAD
! 2324: && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])))
1.1 root 2325: {
2326: insn = emit_pop_insn (insn, regstack, operands[i],
2327: emit_insn_after);
2328: break;
2329: }
2330: }
2331: }
2332:
2333: /* Substitute stack hard reg numbers for stack virtual registers in
2334: INSN. Non-stack register numbers are not changed. REGSTACK is the
2335: current stack content. Insns may be emitted as needed to arrange the
2336: stack for the 387 based on the contents of the insn. */
2337:
2338: static void
2339: subst_stack_regs (insn, regstack)
2340: rtx insn;
2341: stack regstack;
2342: {
2343: register rtx *note_link, note;
2344: register int i;
2345: int n_operands;
2346:
2347: if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN)
2348: || INSN_DELETED_P (insn))
2349: return;
2350:
2351: /* The stack should be empty at a call. */
2352:
2353: if (GET_CODE (insn) == CALL_INSN)
2354: for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++)
2355: if (TEST_HARD_REG_BIT (regstack->reg_set, i))
2356: abort ();
2357:
2358: /* Do the actual substitution if any stack regs are mentioned.
2359: Since we only record whether entire insn mentions stack regs, and
2360: subst_stack_regs_pat only works for patterns that contain stack regs,
2361: we must check each pattern in a parallel here. A call_value_pop could
2362: fail otherwise. */
2363:
2364: if (GET_MODE (insn) == QImode)
2365: {
2366: n_operands = asm_noperands (PATTERN (insn));
2367: if (n_operands >= 0)
2368: {
2369: /* This insn is an `asm' with operands. Decode the operands,
2370: decide how many are inputs, and do register substitution.
2371: Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */
2372:
2373: rtx operands[MAX_RECOG_OPERANDS];
2374: rtx *operands_loc[MAX_RECOG_OPERANDS];
2375: rtx body = PATTERN (insn);
2376: int n_inputs, n_outputs;
2377: char **constraints
2378: = (char **) alloca (n_operands * sizeof (char *));
2379:
2380: decode_asm_operands (body, operands, operands_loc, constraints, 0);
2381: get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs);
2382: subst_asm_stack_regs (insn, regstack, operands, operands_loc,
2383: constraints, n_inputs, n_outputs);
2384: return;
2385: }
2386:
2387: if (GET_CODE (PATTERN (insn)) == PARALLEL)
2388: for (i = 0; i < XVECLEN (PATTERN (insn) , 0); i++)
2389: {
2390: if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i)))
2391: subst_stack_regs_pat (insn, regstack,
2392: XVECEXP (PATTERN (insn), 0, i));
2393: }
2394: else
2395: subst_stack_regs_pat (insn, regstack, PATTERN (insn));
2396: }
2397:
2398: /* subst_stack_regs_pat may have deleted a no-op insn. If so, any
2399: REG_UNUSED will already have been dealt with, so just return. */
2400:
2401: if (INSN_DELETED_P (insn))
2402: return;
2403:
2404: /* If there is a REG_UNUSED note on a stack register on this insn,
2405: the indicated reg must be popped. The REG_UNUSED note is removed,
2406: since the form of the newly emitted pop insn references the reg,
2407: making it no longer `unset'. */
2408:
2409: note_link = ®_NOTES(insn);
2410: for (note = *note_link; note; note = XEXP (note, 1))
2411: if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0)))
2412: {
2413: *note_link = XEXP (note, 1);
2414: insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after);
2415: }
2416: else
2417: note_link = &XEXP (note, 1);
2418: }
2419:
2420: /* Change the organization of the stack so that it fits a new basic
2421: block. Some registers might have to be popped, but there can never be
2422: a register live in the new block that is not now live.
2423:
2424: Insert any needed insns before or after INSN. WHEN is emit_insn_before
2425: or emit_insn_after. OLD is the original stack layout, and NEW is
2426: the desired form. OLD is updated to reflect the code emitted, ie, it
2427: will be the same as NEW upon return.
2428:
2429: This function will not preserve block_end[]. But that information
2430: is no longer needed once this has executed. */
2431:
2432: static void
2433: change_stack (insn, old, new, when)
2434: rtx insn;
2435: stack old;
2436: stack new;
2437: rtx (*when)();
2438: {
2439: int reg;
2440:
2441: /* We will be inserting new insns "backwards", by calling emit_insn_before.
2442: If we are to insert after INSN, find the next insn, and insert before
2443: it. */
2444:
2445: if (when == emit_insn_after)
2446: insn = NEXT_INSN (insn);
2447:
2448: /* Pop any registers that are not needed in the new block. */
2449:
2450: for (reg = old->top; reg >= 0; reg--)
2451: if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg]))
2452: emit_pop_insn (insn, old, FP_mode_reg[old->reg[reg]][(int) DFmode],
2453: emit_insn_before);
2454:
2455: if (new->top == -2)
2456: {
2457: /* If the new block has never been processed, then it can inherit
2458: the old stack order. */
2459:
2460: new->top = old->top;
2461: bcopy (old->reg, new->reg, sizeof (new->reg));
2462: }
2463: else
2464: {
2465: /* This block has been entered before, and we must match the
2466: previously selected stack order. */
2467:
2468: /* By now, the only difference should be the order of the stack,
2469: not their depth or liveliness. */
2470:
2471: GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win);
2472:
2473: abort ();
2474:
2475: win:
2476:
2477: if (old->top != new->top)
2478: abort ();
2479:
2480: /* Loop here emitting swaps until the stack is correct. The
2481: worst case number of swaps emitted is N + 2, where N is the
2482: depth of the stack. In some cases, the reg at the top of
2483: stack may be correct, but swapped anyway in order to fix
2484: other regs. But since we never swap any other reg away from
2485: its correct slot, this algorithm will converge. */
2486:
2487: do
2488: {
2489: /* Swap the reg at top of stack into the position it is
2490: supposed to be in, until the correct top of stack appears. */
2491:
2492: while (old->reg[old->top] != new->reg[new->top])
2493: {
2494: for (reg = new->top; reg >= 0; reg--)
2495: if (new->reg[reg] == old->reg[old->top])
2496: break;
2497:
2498: if (reg == -1)
2499: abort ();
2500:
2501: emit_swap_insn (insn, old,
2502: FP_mode_reg[old->reg[reg]][(int) DFmode],
2503: emit_insn_before);
2504: }
2505:
2506: /* See if any regs remain incorrect. If so, bring an
2507: incorrect reg to the top of stack, and let the while loop
2508: above fix it. */
2509:
2510: for (reg = new->top; reg >= 0; reg--)
2511: if (new->reg[reg] != old->reg[reg])
2512: {
2513: emit_swap_insn (insn, old,
2514: FP_mode_reg[old->reg[reg]][(int) DFmode],
2515: emit_insn_before);
2516: break;
2517: }
2518: } while (reg >= 0);
2519:
2520: /* At this point there must be no differences. */
2521:
2522: for (reg = old->top; reg >= 0; reg--)
2523: if (old->reg[reg] != new->reg[reg])
2524: abort ();
2525: }
2526: }
2527:
2528: /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is
2529: found, ensure that a jump from INSN to the code_label to which the
2530: label_ref points ends up with the same stack as that at the
2531: code_label. Do this by inserting insns just before the code_label to
2532: pop and rotate the stack until it is in the correct order. REGSTACK
2533: is the order of the register stack in INSN.
2534:
2535: Any code that is emitted here must not be later processed as part
2536: of any block, as it will already contain hard register numbers. */
2537:
2538: static void
2539: goto_block_pat (insn, regstack, pat)
2540: rtx insn;
2541: stack regstack;
2542: rtx pat;
2543: {
2544: rtx label;
2545: rtx new_jump, new_label, new_barrier;
2546: rtx *ref;
2547: stack label_stack;
2548: struct stack_def temp_stack;
2549: int reg;
2550:
2551: if (GET_CODE (pat) != LABEL_REF)
2552: {
2553: int i, j;
2554: char *fmt = GET_RTX_FORMAT (GET_CODE (pat));
2555:
2556: for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--)
2557: {
2558: if (fmt[i] == 'e')
2559: goto_block_pat (insn, regstack, XEXP (pat, i));
2560: if (fmt[i] == 'E')
2561: for (j = 0; j < XVECLEN (pat, i); j++)
2562: goto_block_pat (insn, regstack, XVECEXP (pat, i, j));
2563: }
2564: return;
2565: }
2566:
2567: label = XEXP (pat, 0);
2568: if (GET_CODE (label) != CODE_LABEL)
2569: abort ();
2570:
2571: /* First, see if in fact anything needs to be done to the stack at all. */
2572:
2573: label_stack = &block_stack_in[BLOCK_NUM (label)];
2574:
2575: if (label_stack->top == -2)
2576: {
2577: /* If the target block hasn't had a stack order selected, then
2578: we need merely ensure that no pops are needed. */
2579:
2580: for (reg = regstack->top; reg >= 0; reg--)
2581: if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg]))
2582: break;
2583:
2584: if (reg == -1)
2585: {
2586: /* change_stack will not emit any code in this case. */
2587:
2588: change_stack (label, regstack, label_stack, emit_insn_after);
2589: return;
2590: }
2591: }
2592: else if (label_stack->top == regstack->top)
2593: {
2594: for (reg = label_stack->top; reg >= 0; reg--)
2595: if (label_stack->reg[reg] != regstack->reg[reg])
2596: break;
2597:
2598: if (reg == -1)
2599: return;
2600: }
2601:
2602: /* At least one insn will need to be inserted before label. Insert
2603: a jump around the code we are about to emit. Emit a label for the new
2604: code, and point the original insn at this new label. We can't use
2605: redirect_jump here, because we're using fld[4] of the code labels as
2606: LABEL_REF chains, no NUSES counters. */
2607:
2608: new_jump = emit_jump_insn_before (gen_jump (label), label);
2609: record_label_references (new_jump, PATTERN (new_jump));
2610: JUMP_LABEL (new_jump) = label;
2611:
2612: new_barrier = emit_barrier_after (new_jump);
2613:
2614: new_label = gen_label_rtx ();
2615: emit_label_after (new_label, new_barrier);
2616: LABEL_REFS (new_label) = new_label;
2617:
2618: /* The old label_ref will no longer point to the code_label if now uses,
2619: so strip the label_ref from the code_label's chain of references. */
2620:
2621: for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref))
2622: if (*ref == pat)
2623: break;
2624:
2625: if (*ref == label)
2626: abort ();
2627:
2628: *ref = LABEL_NEXTREF (*ref);
2629:
2630: XEXP (pat, 0) = new_label;
2631: record_label_references (insn, PATTERN (insn));
2632:
2633: if (JUMP_LABEL (insn) == label)
2634: JUMP_LABEL (insn) = new_label;
2635:
2636: /* Now emit the needed code. */
2637:
2638: temp_stack = *regstack;
2639:
2640: change_stack (new_label, &temp_stack, label_stack, emit_insn_after);
2641: }
2642:
2643: /* Traverse all basic blocks in a function, converting the register
1.1.1.2 ! root 2644: references in each insn from the "flat" register file that gcc uses, to
1.1 root 2645: the stack-like registers the 387 uses. */
2646:
2647: static void
2648: convert_regs ()
2649: {
2650: register int block, reg;
2651: register rtx insn, next;
2652: struct stack_def regstack;
2653:
2654: for (block = 0; block < blocks; block++)
2655: {
2656: if (block_stack_in[block].top == -2)
2657: {
2658: /* This block has not been previously encountered. Choose a
2659: default mapping for any stack regs live on entry */
2660:
2661: block_stack_in[block].top = -1;
2662:
2663: for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--)
2664: if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg))
2665: block_stack_in[block].reg[++block_stack_in[block].top] = reg;
2666: }
2667:
2668: /* Process all insns in this block. Keep track of `next' here,
2669: so that we don't process any insns emitted while making
2670: substitutions in INSN. */
2671:
2672: next = block_begin[block];
2673: regstack = block_stack_in[block];
2674: do
2675: {
2676: insn = next;
2677: next = NEXT_INSN (insn);
2678:
2679: /* Don't bother processing unless there is a stack reg
2680: mentioned.
2681:
2682: ??? For now, process CALL_INSNs too to make sure that the
2683: stack regs are dead after a call. Remove this eventually. */
2684:
2685: if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN)
2686: subst_stack_regs (insn, ®stack);
2687:
2688: } while (insn != block_end[block]);
2689:
2690: /* Something failed if the stack life doesn't match. */
2691:
2692: GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win);
2693:
2694: abort ();
2695:
2696: win:
2697:
2698: /* Adjust the stack of this block on exit to match the stack of
2699: the target block, or copy stack information into stack of
2700: jump target if the target block's stack order hasn't been set
2701: yet. */
2702:
2703: if (GET_CODE (insn) == JUMP_INSN)
2704: goto_block_pat (insn, ®stack, PATTERN (insn));
2705:
2706: /* Likewise handle the case where we fall into the next block. */
2707:
2708: if ((block < blocks - 1) && block_drops_in[block+1])
2709: change_stack (insn, ®stack, &block_stack_in[block+1],
2710: emit_insn_after);
2711: }
2712:
2713: /* If the last basic block is the end of a loop, and that loop has
2714: regs live at its start, then the last basic block will have regs live
2715: at its end that need to be popped before the function returns. */
2716:
2717: for (reg = regstack.top; reg >= 0; reg--)
2718: if (! current_function_returns_real
2719: || regstack.reg[reg] != FIRST_STACK_REG)
2720: insn = emit_pop_insn (insn, ®stack,
2721: FP_mode_reg[regstack.reg[reg]][(int) DFmode],
2722: emit_insn_after);
2723: }
2724:
2725: /* Check expression PAT, which is in INSN, for label references. if
2726: one is found, print the block number of destination to FILE. */
2727:
2728: static void
2729: print_blocks (file, insn, pat)
2730: FILE *file;
2731: rtx insn, pat;
2732: {
2733: register RTX_CODE code = GET_CODE (pat);
2734: register int i;
2735: register char *fmt;
2736:
2737: if (code == LABEL_REF)
2738: {
2739: register rtx label = XEXP (pat, 0);
2740:
2741: if (GET_CODE (label) != CODE_LABEL)
2742: abort ();
2743:
2744: fprintf (file, " %d", BLOCK_NUM (label));
2745:
2746: return;
2747: }
2748:
2749: fmt = GET_RTX_FORMAT (code);
2750: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2751: {
2752: if (fmt[i] == 'e')
2753: print_blocks (file, insn, XEXP (pat, i));
2754: if (fmt[i] == 'E')
2755: {
2756: register int j;
2757: for (j = 0; j < XVECLEN (pat, i); j++)
2758: print_blocks (file, insn, XVECEXP (pat, i, j));
2759: }
2760: }
2761: }
2762:
2763: /* Write information about stack registers and stack blocks into FILE.
2764: This is part of making a debugging dump. */
2765: static void
2766: dump_stack_info (file)
2767: FILE *file;
2768: {
2769: register int block;
2770:
2771: fprintf (file, "\n%d stack blocks.\n", blocks);
2772: for (block = 0; block < blocks; block++)
2773: {
2774: register rtx head, jump, end;
2775: register int regno;
2776:
2777: fprintf (file, "\nStack block %d: first insn %d, last %d.\n",
2778: block, INSN_UID (block_begin[block]),
2779: INSN_UID (block_end[block]));
2780:
2781: head = block_begin[block];
2782:
2783: fprintf (file, "Reached from blocks: ");
2784: if (GET_CODE (head) == CODE_LABEL)
2785: for (jump = LABEL_REFS (head);
2786: jump != head;
2787: jump = LABEL_NEXTREF (jump))
2788: {
2789: register int from_block = BLOCK_NUM (CONTAINING_INSN (jump));
2790: fprintf (file, " %d", from_block);
2791: }
2792: if (block_drops_in[block])
2793: fprintf (file, " previous");
2794:
2795: fprintf (file, "\nlive stack registers on block entry: ");
2796: for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++)
2797: {
2798: if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno))
2799: fprintf (file, "%d ", regno);
2800: }
2801:
2802: fprintf (file, "\nlive stack registers on block exit: ");
2803: for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++)
2804: {
2805: if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno))
2806: fprintf (file, "%d ", regno);
2807: }
2808:
2809: end = block_end[block];
2810:
2811: fprintf (file, "\nJumps to blocks: ");
2812: if (GET_CODE (end) == JUMP_INSN)
2813: print_blocks (file, end, PATTERN (end));
2814:
2815: if (block + 1 < blocks && block_drops_in[block+1])
2816: fprintf (file, " next");
2817: else if (block + 1 == blocks
2818: || (GET_CODE (end) == JUMP_INSN
2819: && GET_CODE (PATTERN (end)) == RETURN))
2820: fprintf (file, " return");
2821:
2822: fprintf (file, "\n");
2823: }
2824: }
2825: #endif /* STACK_REGS */
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