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1.1 root 1: /* Register to Stack convert for GNU compiler. 1.1.1.7 ! root 2: Copyright (C) 1992, 1993, 1994 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: /* This pass converts stack-like registers from the "flat register 21: file" model that gcc uses, to a stack convention that the 387 uses. 22: 23: * The form of the input: 24: 25: On input, the function consists of insn that have had their 26: registers fully allocated to a set of "virtual" registers. Note that 27: the word "virtual" is used differently here than elsewhere in gcc: for 28: each virtual stack reg, there is a hard reg, but the mapping between 29: them is not known until this pass is run. On output, hard register 30: numbers have been substituted, and various pop and exchange insns have 31: been emitted. The hard register numbers and the virtual register 32: numbers completely overlap - before this pass, all stack register 33: numbers are virtual, and afterward they are all hard. 34: 35: The virtual registers can be manipulated normally by gcc, and their 36: semantics are the same as for normal registers. After the hard 37: register numbers are substituted, the semantics of an insn containing 38: stack-like regs are not the same as for an insn with normal regs: for 39: instance, it is not safe to delete an insn that appears to be a no-op 40: move. In general, no insn containing hard regs should be changed 41: after this pass is done. 42: 43: * The form of the output: 44: 45: After this pass, hard register numbers represent the distance from 46: the current top of stack to the desired register. A reference to 47: FIRST_STACK_REG references the top of stack, FIRST_STACK_REG + 1, 48: represents the register just below that, and so forth. Also, REG_DEAD 49: notes indicate whether or not a stack register should be popped. 50: 51: A "swap" insn looks like a parallel of two patterns, where each 52: pattern is a SET: one sets A to B, the other B to A. 53: 54: A "push" or "load" insn is a SET whose SET_DEST is FIRST_STACK_REG 55: and whose SET_DEST is REG or MEM. Any other SET_DEST, such as PLUS, 56: will replace the existing stack top, not push a new value. 57: 58: A store insn is a SET whose SET_DEST is FIRST_STACK_REG, and whose 59: SET_SRC is REG or MEM. 60: 1.1.1.2 root 61: The case where the SET_SRC and SET_DEST are both FIRST_STACK_REG 1.1 root 62: appears ambiguous. As a special case, the presence of a REG_DEAD note 63: for FIRST_STACK_REG differentiates between a load insn and a pop. 64: 65: If a REG_DEAD is present, the insn represents a "pop" that discards 66: the top of the register stack. If there is no REG_DEAD note, then the 67: insn represents a "dup" or a push of the current top of stack onto the 68: stack. 69: 70: * Methodology: 71: 72: Existing REG_DEAD and REG_UNUSED notes for stack registers are 73: deleted and recreated from scratch. REG_DEAD is never created for a 74: SET_DEST, only REG_UNUSED. 75: 76: Before life analysis, the mode of each insn is set based on whether 77: or not any stack registers are mentioned within that insn. VOIDmode 78: means that no regs are mentioned anyway, and QImode means that at 79: least one pattern within the insn mentions stack registers. This 80: information is valid until after reg_to_stack returns, and is used 81: from jump_optimize. 82: 83: * asm_operands: 84: 85: There are several rules on the usage of stack-like regs in 86: asm_operands insns. These rules apply only to the operands that are 87: stack-like regs: 88: 89: 1. Given a set of input regs that die in an asm_operands, it is 90: necessary to know which are implicitly popped by the asm, and 91: which must be explicitly popped by gcc. 92: 93: An input reg that is implicitly popped by the asm must be 94: explicitly clobbered, unless it is constrained to match an 95: output operand. 96: 97: 2. For any input reg that is implicitly popped by an asm, it is 98: necessary to know how to adjust the stack to compensate for the pop. 99: If any non-popped input is closer to the top of the reg-stack than 100: the implicitly popped reg, it would not be possible to know what the 101: stack looked like - it's not clear how the rest of the stack "slides 102: up". 103: 104: All implicitly popped input regs must be closer to the top of 105: the reg-stack than any input that is not implicitly popped. 106: 107: 3. It is possible that if an input dies in an insn, reload might 108: use the input reg for an output reload. Consider this example: 109: 110: asm ("foo" : "=t" (a) : "f" (b)); 111: 112: This asm says that input B is not popped by the asm, and that 113: the asm pushes a result onto the reg-stack, ie, the stack is one 114: deeper after the asm than it was before. But, it is possible that 115: reload will think that it can use the same reg for both the input and 116: the output, if input B dies in this insn. 117: 118: If any input operand uses the "f" constraint, all output reg 119: constraints must use the "&" earlyclobber. 120: 121: The asm above would be written as 122: 123: asm ("foo" : "=&t" (a) : "f" (b)); 124: 125: 4. Some operands need to be in particular places on the stack. All 126: output operands fall in this category - there is no other way to 127: know which regs the outputs appear in unless the user indicates 128: this in the constraints. 129: 130: Output operands must specifically indicate which reg an output 131: appears in after an asm. "=f" is not allowed: the operand 132: constraints must select a class with a single reg. 133: 134: 5. Output operands may not be "inserted" between existing stack regs. 135: Since no 387 opcode uses a read/write operand, all output operands 136: are dead before the asm_operands, and are pushed by the asm_operands. 137: It makes no sense to push anywhere but the top of the reg-stack. 138: 139: Output operands must start at the top of the reg-stack: output 140: operands may not "skip" a reg. 141: 142: 6. Some asm statements may need extra stack space for internal 143: calculations. This can be guaranteed by clobbering stack registers 144: unrelated to the inputs and outputs. 145: 146: Here are a couple of reasonable asms to want to write. This asm 147: takes one input, which is internally popped, and produces two outputs. 148: 149: asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp)); 150: 151: This asm takes two inputs, which are popped by the fyl2xp1 opcode, 152: and replaces them with one output. The user must code the "st(1)" 153: clobber for reg-stack.c to know that fyl2xp1 pops both inputs. 154: 155: asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)"); 156: 157: */ 158: 159: #include <stdio.h> 160: #include "config.h" 161: #include "tree.h" 162: #include "rtl.h" 163: #include "insn-config.h" 164: #include "regs.h" 165: #include "hard-reg-set.h" 166: #include "flags.h" 167: 168: #ifdef STACK_REGS 169: 170: #define REG_STACK_SIZE (LAST_STACK_REG - FIRST_STACK_REG + 1) 171: 172: /* True if the current function returns a real value. */ 173: static int current_function_returns_real; 174: 175: /* This is the basic stack record. TOP is an index into REG[] such 176: that REG[TOP] is the top of stack. If TOP is -1 the stack is empty. 177: 1.1.1.5 root 178: If TOP is -2, REG[] is not yet initialized. Stack initialization 179: consists of placing each live reg in array `reg' and setting `top' 180: appropriately. 181: 182: REG_SET indicates which registers are live. */ 1.1 root 183: 184: typedef struct stack_def 185: { 186: int top; /* index to top stack element */ 187: HARD_REG_SET reg_set; /* set of live registers */ 188: char reg[REG_STACK_SIZE]; /* register - stack mapping */ 189: } *stack; 190: 191: /* highest instruction uid */ 192: static int max_uid = 0; 193: 194: /* Number of basic blocks in the current function. */ 195: static int blocks; 196: 197: /* Element N is first insn in basic block N. 198: This info lasts until we finish compiling the function. */ 199: static rtx *block_begin; 200: 201: /* Element N is last insn in basic block N. 202: This info lasts until we finish compiling the function. */ 203: static rtx *block_end; 204: 205: /* Element N is nonzero if control can drop into basic block N */ 206: static char *block_drops_in; 207: 208: /* Element N says all about the stack at entry block N */ 209: static stack block_stack_in; 210: 211: /* Element N says all about the stack life at the end of block N */ 212: static HARD_REG_SET *block_out_reg_set; 213: 214: /* This is where the BLOCK_NUM values are really stored. This is set 215: up by find_blocks and used there and in life_analysis. It can be used 216: later, but only to look up an insn that is the head or tail of some 217: block. life_analysis and the stack register conversion process can 218: add insns within a block. */ 1.1.1.5 root 219: static int *block_number; 1.1 root 220: 221: /* This is the register file for all register after conversion */ 222: static rtx FP_mode_reg[FIRST_PSEUDO_REGISTER][(int) MAX_MACHINE_MODE]; 223: 224: /* Get the basic block number of an insn. See note at block_number 225: definition are validity of this information. */ 226: 227: #define BLOCK_NUM(INSN) \ 1.1.1.7 ! root 228: ((INSN_UID (INSN) > max_uid) \ ! 229: ? (abort() , -1) : block_number[INSN_UID (INSN)]) 1.1 root 230: 1.1.1.7 ! root 231: extern rtx forced_labels; 1.1 root 232: extern rtx gen_jump (); 1.1.1.6 root 233: extern rtx gen_movdf (), gen_movxf (); 1.1 root 234: extern rtx find_regno_note (); 235: extern rtx emit_jump_insn_before (); 236: extern rtx emit_label_after (); 237: 238: /* Forward declarations */ 239: 240: static void find_blocks (); 1.1.1.7 ! root 241: static uses_reg_or_mem (); 1.1 root 242: static void stack_reg_life_analysis (); 243: static void change_stack (); 244: static void convert_regs (); 245: static void dump_stack_info (); 246: 247: /* Return non-zero if any stack register is mentioned somewhere within PAT. */ 248: 249: int 250: stack_regs_mentioned_p (pat) 1.1.1.4 root 251: rtx pat; 1.1 root 252: { 253: register char *fmt; 254: register int i; 255: 256: if (STACK_REG_P (pat)) 257: return 1; 258: 259: fmt = GET_RTX_FORMAT (GET_CODE (pat)); 260: for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 261: { 262: if (fmt[i] == 'E') 263: { 264: register int j; 265: 266: for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 267: if (stack_regs_mentioned_p (XVECEXP (pat, i, j))) 268: return 1; 269: } 270: else if (fmt[i] == 'e' && stack_regs_mentioned_p (XEXP (pat, i))) 271: return 1; 272: } 273: 274: return 0; 275: } 276: 277: /* Convert register usage from "flat" register file usage to a "stack 278: register file. FIRST is the first insn in the function, FILE is the 279: dump file, if used. 280: 281: First compute the beginning and end of each basic block. Do a 282: register life analysis on the stack registers, recording the result 283: for the head and tail of each basic block. The convert each insn one 284: by one. Run a last jump_optimize() pass, if optimizing, to eliminate 285: any cross-jumping created when the converter inserts pop insns.*/ 286: 287: void 288: reg_to_stack (first, file) 289: rtx first; 290: FILE *file; 291: { 292: register rtx insn; 293: register int i; 294: int stack_reg_seen = 0; 295: enum machine_mode mode; 296: 297: current_function_returns_real 298: = TREE_CODE (TREE_TYPE (DECL_RESULT (current_function_decl))) == REAL_TYPE; 299: 300: for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); mode != VOIDmode; 301: mode = GET_MODE_WIDER_MODE (mode)) 302: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 303: FP_mode_reg[i][(int) mode] = gen_rtx (REG, mode, i); 304: 305: /* Count the basic blocks. Also find maximum insn uid. */ 306: { 1.1.1.7 ! root 307: register RTX_CODE prev_code = BARRIER; 1.1 root 308: register RTX_CODE code; 309: 310: max_uid = 0; 311: blocks = 0; 312: for (insn = first; insn; insn = NEXT_INSN (insn)) 313: { 314: /* Note that this loop must select the same block boundaries 1.1.1.7 ! root 315: as code in find_blocks. Also note that this code is not the ! 316: same as that used in flow.c. */ 1.1 root 317: 318: if (INSN_UID (insn) > max_uid) 319: max_uid = INSN_UID (insn); 320: 321: code = GET_CODE (insn); 322: 323: if (code == CODE_LABEL 324: || (prev_code != INSN 325: && prev_code != CALL_INSN 326: && prev_code != CODE_LABEL 1.1.1.7 ! root 327: && GET_RTX_CLASS (code) == 'i')) 1.1 root 328: blocks++; 329: 330: /* Remember whether or not this insn mentions an FP regs. 331: Check JUMP_INSNs too, in case someone creates a funny PARALLEL. */ 332: 1.1.1.7 ! root 333: if (GET_RTX_CLASS (GET_CODE (insn)) == 'i' 1.1 root 334: && stack_regs_mentioned_p (PATTERN (insn))) 335: { 336: stack_reg_seen = 1; 337: PUT_MODE (insn, QImode); 338: } 339: else 340: PUT_MODE (insn, VOIDmode); 341: 1.1.1.7 ! root 342: if (code == CODE_LABEL) ! 343: LABEL_REFS (insn) = insn; /* delete old chain */ ! 344: 1.1 root 345: if (code != NOTE) 346: prev_code = code; 347: } 348: } 349: 350: /* If no stack register reference exists in this insn, there isn't 351: anything to convert. */ 352: 353: if (! stack_reg_seen) 354: return; 355: 356: /* If there are stack registers, there must be at least one block. */ 357: 358: if (! blocks) 359: abort (); 360: 361: /* Allocate some tables that last till end of compiling this function 362: and some needed only in find_blocks and life_analysis. */ 363: 364: block_begin = (rtx *) alloca (blocks * sizeof (rtx)); 365: block_end = (rtx *) alloca (blocks * sizeof (rtx)); 366: block_drops_in = (char *) alloca (blocks); 367: 368: block_stack_in = (stack) alloca (blocks * sizeof (struct stack_def)); 369: block_out_reg_set = (HARD_REG_SET *) alloca (blocks * sizeof (HARD_REG_SET)); 1.1.1.7 ! root 370: bzero ((char *) block_stack_in, blocks * sizeof (struct stack_def)); ! 371: bzero ((char *) block_out_reg_set, blocks * sizeof (HARD_REG_SET)); 1.1 root 372: 1.1.1.5 root 373: block_number = (int *) alloca ((max_uid + 1) * sizeof (int)); 1.1 root 374: 375: find_blocks (first); 376: stack_reg_life_analysis (first); 377: 378: /* Dump the life analysis debug information before jump 379: optimization, as that will destroy the LABEL_REFS we keep the 380: information in. */ 381: 382: if (file) 383: dump_stack_info (file); 384: 385: convert_regs (); 386: 387: if (optimize) 388: jump_optimize (first, 2, 0, 0); 389: } 390: 391: /* Check PAT, which is in INSN, for LABEL_REFs. Add INSN to the 392: label's chain of references, and note which insn contains each 393: reference. */ 394: 395: static void 396: record_label_references (insn, pat) 397: rtx insn, pat; 398: { 399: register enum rtx_code code = GET_CODE (pat); 400: register int i; 401: register char *fmt; 402: 403: if (code == LABEL_REF) 404: { 405: register rtx label = XEXP (pat, 0); 406: register rtx ref; 407: 408: if (GET_CODE (label) != CODE_LABEL) 409: abort (); 410: 411: /* Don't make a duplicate in the code_label's chain. */ 412: 1.1.1.6 root 413: for (ref = LABEL_REFS (label); 414: ref && ref != label; 415: ref = LABEL_NEXTREF (ref)) 1.1 root 416: if (CONTAINING_INSN (ref) == insn) 417: return; 418: 419: CONTAINING_INSN (pat) = insn; 420: LABEL_NEXTREF (pat) = LABEL_REFS (label); 421: LABEL_REFS (label) = pat; 422: 423: return; 424: } 425: 426: fmt = GET_RTX_FORMAT (code); 427: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 428: { 429: if (fmt[i] == 'e') 430: record_label_references (insn, XEXP (pat, i)); 431: if (fmt[i] == 'E') 432: { 433: register int j; 434: for (j = 0; j < XVECLEN (pat, i); j++) 435: record_label_references (insn, XVECEXP (pat, i, j)); 436: } 437: } 438: } 439: 440: /* Return a pointer to the REG expression within PAT. If PAT is not a 441: REG, possible enclosed by a conversion rtx, return the inner part of 442: PAT that stopped the search. */ 443: 444: static rtx * 445: get_true_reg (pat) 446: rtx *pat; 447: { 448: while (GET_CODE (*pat) == SUBREG 449: || GET_CODE (*pat) == FLOAT 450: || GET_CODE (*pat) == FIX 1.1.1.5 root 451: || GET_CODE (*pat) == FLOAT_EXTEND) 1.1 root 452: pat = & XEXP (*pat, 0); 453: 454: return pat; 455: } 456: 457: /* Scan the OPERANDS and OPERAND_CONSTRAINTS of an asm_operands. 458: N_OPERANDS is the total number of operands. Return which alternative 459: matched, or -1 is no alternative matches. 460: 461: OPERAND_MATCHES is an array which indicates which operand this 462: operand matches due to the constraints, or -1 if no match is required. 463: If two operands match by coincidence, but are not required to match by 464: the constraints, -1 is returned. 465: 466: OPERAND_CLASS is an array which indicates the smallest class 467: required by the constraints. If the alternative that matches calls 468: for some class `class', and the operand matches a subclass of `class', 469: OPERAND_CLASS is set to `class' as required by the constraints, not to 470: the subclass. If an alternative allows more than one class, 471: OPERAND_CLASS is set to the smallest class that is a union of the 472: allowed classes. */ 473: 474: static int 475: constrain_asm_operands (n_operands, operands, operand_constraints, 476: operand_matches, operand_class) 477: int n_operands; 478: rtx *operands; 479: char **operand_constraints; 480: int *operand_matches; 481: enum reg_class *operand_class; 482: { 483: char **constraints = (char **) alloca (n_operands * sizeof (char *)); 484: char *q; 485: int this_alternative, this_operand; 486: int n_alternatives; 487: int j; 488: 489: for (j = 0; j < n_operands; j++) 490: constraints[j] = operand_constraints[j]; 491: 492: /* Compute the number of alternatives in the operands. reload has 493: already guaranteed that all operands have the same number of 494: alternatives. */ 495: 496: n_alternatives = 1; 497: for (q = constraints[0]; *q; q++) 498: n_alternatives += (*q == ','); 499: 500: this_alternative = 0; 501: while (this_alternative < n_alternatives) 502: { 503: int lose = 0; 504: int i; 505: 506: /* No operands match, no narrow class requirements yet. */ 507: for (i = 0; i < n_operands; i++) 508: { 509: operand_matches[i] = -1; 510: operand_class[i] = NO_REGS; 511: } 512: 513: for (this_operand = 0; this_operand < n_operands; this_operand++) 514: { 515: rtx op = operands[this_operand]; 516: enum machine_mode mode = GET_MODE (op); 517: char *p = constraints[this_operand]; 518: int offset = 0; 519: int win = 0; 520: int c; 521: 522: if (GET_CODE (op) == SUBREG) 523: { 524: if (GET_CODE (SUBREG_REG (op)) == REG 525: && REGNO (SUBREG_REG (op)) < FIRST_PSEUDO_REGISTER) 526: offset = SUBREG_WORD (op); 527: op = SUBREG_REG (op); 528: } 529: 530: /* An empty constraint or empty alternative 531: allows anything which matched the pattern. */ 532: if (*p == 0 || *p == ',') 533: win = 1; 534: 535: while (*p && (c = *p++) != ',') 536: switch (c) 537: { 538: case '=': 539: case '+': 540: case '?': 541: case '&': 542: case '!': 543: case '*': 544: case '%': 545: /* Ignore these. */ 546: break; 547: 1.1.1.3 root 548: case '#': 549: /* Ignore rest of this alternative. */ 550: while (*p && *p != ',') p++; 551: break; 552: 1.1 root 553: case '0': 554: case '1': 555: case '2': 556: case '3': 557: case '4': 558: case '5': 559: /* This operand must be the same as a previous one. 560: This kind of constraint is used for instructions such 561: as add when they take only two operands. 562: 563: Note that the lower-numbered operand is passed first. */ 564: 565: if (operands_match_p (operands[c - '0'], 566: operands[this_operand])) 567: { 568: operand_matches[this_operand] = c - '0'; 569: win = 1; 570: } 571: break; 572: 573: case 'p': 574: /* p is used for address_operands. Since this is an asm, 575: just to make sure that the operand is valid for Pmode. */ 576: 577: if (strict_memory_address_p (Pmode, op)) 578: win = 1; 579: break; 580: 581: case 'g': 582: /* Anything goes unless it is a REG and really has a hard reg 583: but the hard reg is not in the class GENERAL_REGS. */ 584: if (GENERAL_REGS == ALL_REGS 585: || GET_CODE (op) != REG 586: || reg_fits_class_p (op, GENERAL_REGS, offset, mode)) 587: { 588: if (GET_CODE (op) == REG) 589: operand_class[this_operand] 590: = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; 591: win = 1; 592: } 593: break; 594: 595: case 'r': 596: if (GET_CODE (op) == REG 597: && (GENERAL_REGS == ALL_REGS 598: || reg_fits_class_p (op, GENERAL_REGS, offset, mode))) 599: { 600: operand_class[this_operand] 601: = reg_class_subunion[(int) operand_class[this_operand]][(int) GENERAL_REGS]; 602: win = 1; 603: } 604: break; 605: 606: case 'X': 607: /* This is used for a MATCH_SCRATCH in the cases when we 608: don't actually need anything. So anything goes any time. */ 609: win = 1; 610: break; 611: 612: case 'm': 613: if (GET_CODE (op) == MEM) 614: win = 1; 615: break; 616: 617: case '<': 618: if (GET_CODE (op) == MEM 619: && (GET_CODE (XEXP (op, 0)) == PRE_DEC 620: || GET_CODE (XEXP (op, 0)) == POST_DEC)) 621: win = 1; 622: break; 623: 624: case '>': 625: if (GET_CODE (op) == MEM 626: && (GET_CODE (XEXP (op, 0)) == PRE_INC 627: || GET_CODE (XEXP (op, 0)) == POST_INC)) 628: win = 1; 629: break; 630: 631: case 'E': 632: /* Match any CONST_DOUBLE, but only if 633: we can examine the bits of it reliably. */ 634: if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 1.1.1.4 root 635: || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 1.1 root 636: && GET_CODE (op) != VOIDmode && ! flag_pretend_float) 637: break; 638: if (GET_CODE (op) == CONST_DOUBLE) 639: win = 1; 640: break; 641: 642: case 'F': 643: if (GET_CODE (op) == CONST_DOUBLE) 644: win = 1; 645: break; 646: 647: case 'G': 648: case 'H': 649: if (GET_CODE (op) == CONST_DOUBLE 650: && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) 651: win = 1; 652: break; 653: 654: case 's': 655: if (GET_CODE (op) == CONST_INT 656: || (GET_CODE (op) == CONST_DOUBLE 657: && GET_MODE (op) == VOIDmode)) 658: break; 659: /* Fall through */ 660: case 'i': 661: if (CONSTANT_P (op)) 662: win = 1; 663: break; 664: 665: case 'n': 666: if (GET_CODE (op) == CONST_INT 667: || (GET_CODE (op) == CONST_DOUBLE 668: && GET_MODE (op) == VOIDmode)) 669: win = 1; 670: break; 671: 672: case 'I': 673: case 'J': 674: case 'K': 675: case 'L': 676: case 'M': 677: case 'N': 678: case 'O': 679: case 'P': 680: if (GET_CODE (op) == CONST_INT 681: && CONST_OK_FOR_LETTER_P (INTVAL (op), c)) 682: win = 1; 683: break; 684: 685: #ifdef EXTRA_CONSTRAINT 686: case 'Q': 687: case 'R': 688: case 'S': 689: case 'T': 690: case 'U': 691: if (EXTRA_CONSTRAINT (op, c)) 692: win = 1; 693: break; 694: #endif 695: 696: case 'V': 697: if (GET_CODE (op) == MEM && ! offsettable_memref_p (op)) 698: win = 1; 699: break; 700: 701: case 'o': 702: if (offsettable_memref_p (op)) 703: win = 1; 704: break; 705: 706: default: 707: if (GET_CODE (op) == REG 708: && reg_fits_class_p (op, REG_CLASS_FROM_LETTER (c), 709: offset, mode)) 710: { 711: operand_class[this_operand] 712: = reg_class_subunion[(int)operand_class[this_operand]][(int) REG_CLASS_FROM_LETTER (c)]; 713: win = 1; 714: } 715: } 716: 717: constraints[this_operand] = p; 718: /* If this operand did not win somehow, 719: this alternative loses. */ 720: if (! win) 721: lose = 1; 722: } 723: /* This alternative won; the operands are ok. 724: Change whichever operands this alternative says to change. */ 725: if (! lose) 726: break; 727: 728: this_alternative++; 729: } 730: 731: /* For operands constrained to match another operand, copy the other 732: operand's class to this operand's class. */ 733: for (j = 0; j < n_operands; j++) 734: if (operand_matches[j] >= 0) 735: operand_class[j] = operand_class[operand_matches[j]]; 736: 737: return this_alternative == n_alternatives ? -1 : this_alternative; 738: } 739: 740: /* Record the life info of each stack reg in INSN, updating REGSTACK. 741: N_INPUTS is the number of inputs; N_OUTPUTS the outputs. CONSTRAINTS 742: is an array of the constraint strings used in the asm statement. 743: OPERANDS is an array of all operands for the insn, and is assumed to 744: contain all output operands, then all inputs operands. 745: 746: There are many rules that an asm statement for stack-like regs must 747: follow. Those rules are explained at the top of this file: the rule 748: numbers below refer to that explanation. */ 749: 750: static void 751: record_asm_reg_life (insn, regstack, operands, constraints, 752: n_inputs, n_outputs) 753: rtx insn; 754: stack regstack; 755: rtx *operands; 756: char **constraints; 757: int n_inputs, n_outputs; 758: { 759: int i; 760: int n_operands = n_inputs + n_outputs; 761: int first_input = n_outputs; 762: int n_clobbers; 763: int malformed_asm = 0; 764: rtx body = PATTERN (insn); 765: 766: int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); 767: 768: enum reg_class *operand_class 769: = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); 770: 771: int reg_used_as_output[FIRST_PSEUDO_REGISTER]; 772: int implicitly_dies[FIRST_PSEUDO_REGISTER]; 773: 774: rtx *clobber_reg; 775: 1.1.1.4 root 776: /* Find out what the constraints require. If no constraint 1.1.1.5 root 777: alternative matches, this asm is malformed. */ 1.1 root 778: i = constrain_asm_operands (n_operands, operands, constraints, 779: operand_matches, operand_class); 780: if (i < 0) 1.1.1.5 root 781: malformed_asm = 1; 1.1 root 782: 783: /* Strip SUBREGs here to make the following code simpler. */ 784: for (i = 0; i < n_operands; i++) 785: if (GET_CODE (operands[i]) == SUBREG 786: && GET_CODE (SUBREG_REG (operands[i])) == REG) 787: operands[i] = SUBREG_REG (operands[i]); 788: 789: /* Set up CLOBBER_REG. */ 790: 791: n_clobbers = 0; 792: 793: if (GET_CODE (body) == PARALLEL) 1.1.1.2 root 794: { 795: clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); 1.1 root 796: 1.1.1.2 root 797: for (i = 0; i < XVECLEN (body, 0); i++) 798: if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 799: { 800: rtx clobber = XVECEXP (body, 0, i); 801: rtx reg = XEXP (clobber, 0); 1.1 root 802: 1.1.1.2 root 803: if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 804: reg = SUBREG_REG (reg); 805: 806: if (STACK_REG_P (reg)) 807: { 808: clobber_reg[n_clobbers] = reg; 809: n_clobbers++; 810: } 811: } 812: } 1.1 root 813: 814: /* Enforce rule #4: Output operands must specifically indicate which 815: reg an output appears in after an asm. "=f" is not allowed: the 816: operand constraints must select a class with a single reg. 817: 818: Also enforce rule #5: Output operands must start at the top of 819: the reg-stack: output operands may not "skip" a reg. */ 820: 1.1.1.7 ! root 821: bzero ((char *) reg_used_as_output, sizeof (reg_used_as_output)); 1.1 root 822: for (i = 0; i < n_outputs; i++) 823: if (STACK_REG_P (operands[i])) 1.1.1.5 root 824: if (reg_class_size[(int) operand_class[i]] != 1) 1.1 root 825: { 826: error_for_asm 827: (insn, "Output constraint %d must specify a single register", i); 828: malformed_asm = 1; 829: } 830: else 831: reg_used_as_output[REGNO (operands[i])] = 1; 832: 833: 834: /* Search for first non-popped reg. */ 835: for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 836: if (! reg_used_as_output[i]) 837: break; 838: 839: /* If there are any other popped regs, that's an error. */ 840: for (; i < LAST_STACK_REG + 1; i++) 841: if (reg_used_as_output[i]) 842: break; 843: 844: if (i != LAST_STACK_REG + 1) 845: { 846: error_for_asm (insn, "Output regs must be grouped at top of stack"); 847: malformed_asm = 1; 848: } 849: 850: /* Enforce rule #2: All implicitly popped input regs must be closer 851: to the top of the reg-stack than any input that is not implicitly 852: popped. */ 853: 1.1.1.7 ! root 854: bzero ((char *) implicitly_dies, sizeof (implicitly_dies)); 1.1 root 855: for (i = first_input; i < first_input + n_inputs; i++) 856: if (STACK_REG_P (operands[i])) 857: { 858: /* An input reg is implicitly popped if it is tied to an 859: output, or if there is a CLOBBER for it. */ 860: int j; 861: 862: for (j = 0; j < n_clobbers; j++) 863: if (operands_match_p (clobber_reg[j], operands[i])) 864: break; 865: 866: if (j < n_clobbers || operand_matches[i] >= 0) 867: implicitly_dies[REGNO (operands[i])] = 1; 868: } 869: 870: /* Search for first non-popped reg. */ 871: for (i = FIRST_STACK_REG; i < LAST_STACK_REG + 1; i++) 872: if (! implicitly_dies[i]) 873: break; 874: 875: /* If there are any other popped regs, that's an error. */ 876: for (; i < LAST_STACK_REG + 1; i++) 877: if (implicitly_dies[i]) 878: break; 879: 880: if (i != LAST_STACK_REG + 1) 881: { 882: error_for_asm (insn, 883: "Implicitly popped regs must be grouped at top of stack"); 884: malformed_asm = 1; 885: } 886: 887: /* Enfore rule #3: If any input operand uses the "f" constraint, all 888: output constraints must use the "&" earlyclobber. 889: 890: ??? Detect this more deterministically by having constraint_asm_operands 891: record any earlyclobber. */ 892: 893: for (i = first_input; i < first_input + n_inputs; i++) 894: if (operand_matches[i] == -1) 895: { 896: int j; 897: 898: for (j = 0; j < n_outputs; j++) 899: if (operands_match_p (operands[j], operands[i])) 900: { 901: error_for_asm (insn, 902: "Output operand %d must use `&' constraint", j); 903: malformed_asm = 1; 904: } 905: } 906: 907: if (malformed_asm) 908: { 909: /* Avoid further trouble with this insn. */ 910: PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); 911: PUT_MODE (insn, VOIDmode); 912: return; 913: } 914: 915: /* Process all outputs */ 916: for (i = 0; i < n_outputs; i++) 917: { 918: rtx op = operands[i]; 919: 920: if (! STACK_REG_P (op)) 921: if (stack_regs_mentioned_p (op)) 922: abort (); 923: else 924: continue; 925: 926: /* Each destination is dead before this insn. If the 927: destination is not used after this insn, record this with 928: REG_UNUSED. */ 929: 930: if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (op))) 931: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, op, 932: REG_NOTES (insn)); 933: 934: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (op)); 935: } 936: 937: /* Process all inputs */ 938: for (i = first_input; i < first_input + n_inputs; i++) 939: { 940: if (! STACK_REG_P (operands[i])) 941: if (stack_regs_mentioned_p (operands[i])) 942: abort (); 943: else 944: continue; 945: 946: /* If an input is dead after the insn, record a death note. 947: But don't record a death note if there is already a death note, 948: or if the input is also an output. */ 949: 950: if (! TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])) 951: && operand_matches[i] == -1 1.1.1.5 root 952: && find_regno_note (insn, REG_DEAD, REGNO (operands[i])) == NULL_RTX) 1.1 root 953: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, operands[i], 954: REG_NOTES (insn)); 955: 956: SET_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i])); 957: } 958: } 959: 1.1.1.4 root 960: /* Scan PAT, which is part of INSN, and record registers appearing in 961: a SET_DEST in DEST, and other registers in SRC. 1.1 root 962: 963: This function does not know about SET_DESTs that are both input and 964: output (such as ZERO_EXTRACT) - this cannot happen on a 387. */ 965: 1.1.1.4 root 966: void 967: record_reg_life_pat (pat, src, dest) 1.1 root 968: rtx pat; 1.1.1.4 root 969: HARD_REG_SET *src, *dest; 1.1 root 970: { 1.1.1.4 root 971: register char *fmt; 972: register int i; 1.1 root 973: 1.1.1.4 root 974: if (STACK_REG_P (pat)) 1.1 root 975: { 1.1.1.4 root 976: if (src) 977: SET_HARD_REG_BIT (*src, REGNO (pat)); 1.1 root 978: 1.1.1.4 root 979: if (dest) 980: SET_HARD_REG_BIT (*dest, REGNO (pat)); 1.1 root 981: 1.1.1.4 root 982: return; 1.1 root 983: } 984: 1.1.1.4 root 985: if (GET_CODE (pat) == SET) 1.1 root 986: { 1.1.1.4 root 987: record_reg_life_pat (XEXP (pat, 0), NULL_PTR, dest); 988: record_reg_life_pat (XEXP (pat, 1), src, NULL_PTR); 989: return; 990: } 1.1 root 991: 1.1.1.4 root 992: /* We don't need to consider either of these cases. */ 993: if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) 994: return; 1.1 root 995: 1.1.1.4 root 996: fmt = GET_RTX_FORMAT (GET_CODE (pat)); 997: for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 998: { 999: if (fmt[i] == 'E') 1000: { 1001: register int j; 1.1 root 1002: 1.1.1.4 root 1003: for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1004: record_reg_life_pat (XVECEXP (pat, i, j), src, dest); 1005: } 1006: else if (fmt[i] == 'e') 1007: record_reg_life_pat (XEXP (pat, i), src, dest); 1.1 root 1008: } 1009: } 1010: 1011: /* Calculate the number of inputs and outputs in BODY, an 1012: asm_operands. N_OPERANDS is the total number of operands, and 1013: N_INPUTS and N_OUTPUTS are pointers to ints into which the results are 1014: placed. */ 1015: 1016: static void 1017: get_asm_operand_lengths (body, n_operands, n_inputs, n_outputs) 1018: rtx body; 1019: int n_operands; 1020: int *n_inputs, *n_outputs; 1021: { 1022: if (GET_CODE (body) == SET && GET_CODE (SET_SRC (body)) == ASM_OPERANDS) 1023: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (body)); 1024: 1025: else if (GET_CODE (body) == ASM_OPERANDS) 1026: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (body); 1027: 1028: else if (GET_CODE (body) == PARALLEL 1029: && GET_CODE (XVECEXP (body, 0, 0)) == SET) 1030: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (SET_SRC (XVECEXP (body, 0, 0))); 1031: 1032: else if (GET_CODE (body) == PARALLEL 1033: && GET_CODE (XVECEXP (body, 0, 0)) == ASM_OPERANDS) 1034: *n_inputs = ASM_OPERANDS_INPUT_LENGTH (XVECEXP (body, 0, 0)); 1035: else 1036: abort (); 1037: 1038: *n_outputs = n_operands - *n_inputs; 1039: } 1040: 1041: /* Scan INSN, which is in BLOCK, and record the life & death of stack 1042: registers in REGSTACK. This function is called to process insns from 1043: the last insn in a block to the first. The actual scanning is done in 1044: record_reg_life_pat. 1045: 1046: If a register is live after a CALL_INSN, but is not a value return 1047: register for that CALL_INSN, then code is emitted to initialize that 1048: register. The block_end[] data is kept accurate. 1049: 1050: Existing death and unset notes for stack registers are deleted 1051: before processing the insn. */ 1052: 1053: static void 1054: record_reg_life (insn, block, regstack) 1055: rtx insn; 1056: int block; 1057: stack regstack; 1058: { 1059: rtx note, *note_link; 1060: int n_operands; 1061: 1062: if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN) 1063: || INSN_DELETED_P (insn)) 1064: return; 1065: 1066: /* Strip death notes for stack regs from this insn */ 1067: 1068: note_link = ®_NOTES(insn); 1069: for (note = *note_link; note; note = XEXP (note, 1)) 1070: if (STACK_REG_P (XEXP (note, 0)) 1071: && (REG_NOTE_KIND (note) == REG_DEAD 1072: || REG_NOTE_KIND (note) == REG_UNUSED)) 1073: *note_link = XEXP (note, 1); 1074: else 1075: note_link = &XEXP (note, 1); 1076: 1077: /* Process all patterns in the insn. */ 1078: 1079: n_operands = asm_noperands (PATTERN (insn)); 1080: if (n_operands >= 0) 1081: { 1082: /* This insn is an `asm' with operands. Decode the operands, 1083: decide how many are inputs, and record the life information. */ 1084: 1085: rtx operands[MAX_RECOG_OPERANDS]; 1086: rtx body = PATTERN (insn); 1087: int n_inputs, n_outputs; 1088: char **constraints = (char **) alloca (n_operands * sizeof (char *)); 1089: 1.1.1.4 root 1090: decode_asm_operands (body, operands, NULL_PTR, constraints, NULL_PTR); 1.1 root 1091: get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); 1092: record_asm_reg_life (insn, regstack, operands, constraints, 1093: n_inputs, n_outputs); 1094: return; 1095: } 1096: 1.1.1.4 root 1097: /* An insn referencing a stack reg has a mode of QImode. */ 1098: if (GET_MODE (insn) == QImode) 1.1 root 1099: { 1.1.1.4 root 1100: HARD_REG_SET src, dest; 1101: int regno; 1102: 1103: CLEAR_HARD_REG_SET (src); 1104: CLEAR_HARD_REG_SET (dest); 1105: record_reg_life_pat (PATTERN (insn), &src, &dest); 1.1 root 1106: 1.1.1.4 root 1107: for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG; regno++) 1108: if (! TEST_HARD_REG_BIT (regstack->reg_set, regno)) 1109: { 1110: if (TEST_HARD_REG_BIT (src, regno) 1111: && ! TEST_HARD_REG_BIT (dest, regno)) 1112: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, 1113: FP_mode_reg[regno][(int) DFmode], 1114: REG_NOTES (insn)); 1115: else if (TEST_HARD_REG_BIT (dest, regno)) 1116: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_UNUSED, 1117: FP_mode_reg[regno][(int) DFmode], 1118: REG_NOTES (insn)); 1119: } 1120: 1121: AND_COMPL_HARD_REG_SET (regstack->reg_set, dest); 1122: IOR_HARD_REG_SET (regstack->reg_set, src); 1.1 root 1123: } 1124: 1125: /* There might be a reg that is live after a function call. 1126: Initialize it to zero so that the program does not crash. See comment 1127: towards the end of stack_reg_life_analysis(). */ 1128: 1129: if (GET_CODE (insn) == CALL_INSN) 1130: { 1131: int reg = FIRST_FLOAT_REG; 1132: 1133: /* If a stack reg is mentioned in a CALL_INSN, it must be as the 1.1.1.4 root 1134: return value. */ 1.1 root 1135: 1136: if (stack_regs_mentioned_p (PATTERN (insn))) 1137: reg++; 1138: 1139: for (; reg <= LAST_STACK_REG; reg++) 1140: if (TEST_HARD_REG_BIT (regstack->reg_set, reg)) 1141: { 1142: rtx init, pat; 1143: 1144: /* The insn will use virtual register numbers, and so 1145: convert_regs is expected to process these. But BLOCK_NUM 1146: cannot be used on these insns, because they do not appear in 1147: block_number[]. */ 1148: 1149: pat = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode], 1150: CONST0_RTX (DFmode)); 1151: init = emit_insn_after (pat, insn); 1152: PUT_MODE (init, QImode); 1153: 1154: CLEAR_HARD_REG_BIT (regstack->reg_set, reg); 1155: 1156: /* If the CALL_INSN was the end of a block, move the 1157: block_end to point to the new insn. */ 1158: 1159: if (block_end[block] == insn) 1160: block_end[block] = init; 1161: } 1162: 1163: /* Some regs do not survive a CALL */ 1164: 1165: AND_COMPL_HARD_REG_SET (regstack->reg_set, call_used_reg_set); 1166: } 1167: } 1168: 1169: /* Find all basic blocks of the function, which starts with FIRST. 1170: For each JUMP_INSN, build the chain of LABEL_REFS on each CODE_LABEL. */ 1171: 1172: static void 1173: find_blocks (first) 1174: rtx first; 1175: { 1176: register rtx insn; 1177: register int block; 1178: register RTX_CODE prev_code = BARRIER; 1179: register RTX_CODE code; 1.1.1.7 ! root 1180: rtx label_value_list = 0; 1.1 root 1181: 1182: /* Record where all the blocks start and end. 1183: Record which basic blocks control can drop in to. */ 1184: 1185: block = -1; 1186: for (insn = first; insn; insn = NEXT_INSN (insn)) 1187: { 1188: /* Note that this loop must select the same block boundaries 1.1.1.7 ! root 1189: as code in reg_to_stack, but that these are not the same ! 1190: as those selected in flow.c. */ 1.1 root 1191: 1192: code = GET_CODE (insn); 1193: 1194: if (code == CODE_LABEL 1195: || (prev_code != INSN 1196: && prev_code != CALL_INSN 1197: && prev_code != CODE_LABEL 1.1.1.7 ! root 1198: && GET_RTX_CLASS (code) == 'i')) 1.1 root 1199: { 1200: block_begin[++block] = insn; 1201: block_end[block] = insn; 1202: block_drops_in[block] = prev_code != BARRIER; 1203: } 1.1.1.7 ! root 1204: else if (GET_RTX_CLASS (code) == 'i') 1.1 root 1205: block_end[block] = insn; 1206: 1.1.1.7 ! root 1207: if (GET_RTX_CLASS (code) == 'i') ! 1208: { ! 1209: rtx note; ! 1210: ! 1211: /* Make a list of all labels referred to other than by jumps. */ ! 1212: for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) ! 1213: if (REG_NOTE_KIND (note) == REG_LABEL) ! 1214: label_value_list = gen_rtx (EXPR_LIST, VOIDmode, XEXP (note, 0), ! 1215: label_value_list); ! 1216: } 1.1 root 1217: 1.1.1.7 ! root 1218: block_number[INSN_UID (insn)] = block; 1.1 root 1219: 1220: if (code != NOTE) 1221: prev_code = code; 1222: } 1223: 1224: if (block + 1 != blocks) 1225: abort (); 1226: 1.1.1.3 root 1227: /* generate all label references to the corresponding jump insn */ 1.1 root 1228: for (block = 0; block < blocks; block++) 1229: { 1230: insn = block_end[block]; 1231: 1232: if (GET_CODE (insn) == JUMP_INSN) 1.1.1.7 ! root 1233: { ! 1234: rtx pat = PATTERN (insn); ! 1235: int computed_jump = 0; ! 1236: rtx x; ! 1237: ! 1238: if (GET_CODE (pat) == PARALLEL) ! 1239: { ! 1240: int len = XVECLEN (pat, 0); ! 1241: int has_use_labelref = 0; ! 1242: int i; ! 1243: ! 1244: for (i = len - 1; i >= 0; i--) ! 1245: if (GET_CODE (XVECEXP (pat, 0, i)) == USE ! 1246: && GET_CODE (XEXP (XVECEXP (pat, 0, i), 0)) == LABEL_REF) ! 1247: has_use_labelref = 1; ! 1248: ! 1249: if (! has_use_labelref) ! 1250: for (i = len - 1; i >= 0; i--) ! 1251: if (GET_CODE (XVECEXP (pat, 0, i)) == SET ! 1252: && SET_DEST (XVECEXP (pat, 0, i)) == pc_rtx ! 1253: && uses_reg_or_mem (SET_SRC (XVECEXP (pat, 0, i)))) ! 1254: computed_jump = 1; ! 1255: } ! 1256: else if (GET_CODE (pat) == SET ! 1257: && SET_DEST (pat) == pc_rtx ! 1258: && uses_reg_or_mem (SET_SRC (pat))) ! 1259: computed_jump = 1; ! 1260: ! 1261: if (computed_jump) ! 1262: { ! 1263: for (x = label_value_list; x; x = XEXP (x, 1)) ! 1264: record_label_references (insn, ! 1265: gen_rtx (LABEL_REF, VOIDmode, ! 1266: XEXP (x, 0))); ! 1267: ! 1268: for (x = forced_labels; x; x = XEXP (x, 1)) ! 1269: record_label_references (insn, ! 1270: gen_rtx (LABEL_REF, VOIDmode, ! 1271: XEXP (x, 0))); ! 1272: } ! 1273: ! 1274: record_label_references (insn, pat); ! 1275: } 1.1 root 1276: } 1277: } 1.1.1.5 root 1278: 1.1.1.7 ! root 1279: /* Return 1 if X contain a REG or MEM that is not in the constant pool. */ ! 1280: ! 1281: static int ! 1282: uses_reg_or_mem (x) ! 1283: rtx x; ! 1284: { ! 1285: enum rtx_code code = GET_CODE (x); ! 1286: int i, j; ! 1287: char *fmt; ! 1288: ! 1289: if (code == REG ! 1290: || (code == MEM ! 1291: && ! (GET_CODE (XEXP (x, 0)) == SYMBOL_REF ! 1292: && CONSTANT_POOL_ADDRESS_P (XEXP (x, 0))))) ! 1293: return 1; ! 1294: ! 1295: fmt = GET_RTX_FORMAT (code); ! 1296: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) ! 1297: { ! 1298: if (fmt[i] == 'e' ! 1299: && uses_reg_or_mem (XEXP (x, i))) ! 1300: return 1; ! 1301: ! 1302: if (fmt[i] == 'E') ! 1303: for (j = 0; j < XVECLEN (x, i); j++) ! 1304: if (uses_reg_or_mem (XVECEXP (x, i, j))) ! 1305: return 1; ! 1306: } ! 1307: ! 1308: return 0; ! 1309: } ! 1310: 1.1.1.5 root 1311: /* If current function returns its result in an fp stack register, 1312: return the register number. Otherwise return -1. */ 1313: 1314: static int 1315: stack_result_p (decl) 1316: tree decl; 1317: { 1318: rtx result = DECL_RTL (DECL_RESULT (decl)); 1319: 1320: if (result != 0 1321: && !(GET_CODE (result) == REG 1322: && REGNO (result) < FIRST_PSEUDO_REGISTER)) 1323: { 1324: #ifdef FUNCTION_OUTGOING_VALUE 1325: result 1326: = FUNCTION_OUTGOING_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 1327: #else 1328: result = FUNCTION_VALUE (TREE_TYPE (DECL_RESULT (decl)), decl); 1329: #endif 1330: } 1331: 1332: return STACK_REG_P (result) ? REGNO (result) : -1; 1333: } 1.1 root 1334: 1335: /* Determine the which registers are live at the start of each basic 1336: block of the function whose first insn is FIRST. 1337: 1338: First, if the function returns a real_type, mark the function 1339: return type as live at each return point, as the RTL may not give any 1340: hint that the register is live. 1341: 1342: Then, start with the last block and work back to the first block. 1343: Similarly, work backwards within each block, insn by insn, recording 1344: which regs are die and which are used (and therefore live) in the 1345: hard reg set of block_stack_in[]. 1346: 1347: After processing each basic block, if there is a label at the start 1348: of the block, propagate the live registers to all jumps to this block. 1349: 1350: As a special case, if there are regs live in this block, that are 1351: not live in a block containing a jump to this label, and the block 1352: containing the jump has already been processed, we must propagate this 1353: block's entry register life back to the block containing the jump, and 1354: restart life analysis from there. 1355: 1356: In the worst case, this function may traverse the insns 1357: REG_STACK_SIZE times. This is necessary, since a jump towards the end 1358: of the insns may not know that a reg is live at a target that is early 1359: in the insns. So we back up and start over with the new reg live. 1360: 1361: If there are registers that are live at the start of the function, 1362: insns are emitted to initialize these registers. Something similar is 1363: done after CALL_INSNs in record_reg_life. */ 1364: 1365: static void 1366: stack_reg_life_analysis (first) 1367: rtx first; 1368: { 1369: int reg, block; 1370: struct stack_def regstack; 1371: 1.1.1.4 root 1372: if (current_function_returns_real 1.1.1.5 root 1373: && stack_result_p (current_function_decl) >= 0) 1.1 root 1374: { 1375: /* Find all RETURN insns and mark them. */ 1376: 1.1.1.5 root 1377: int value_regno = stack_result_p (current_function_decl); 1.1.1.4 root 1378: 1.1 root 1379: for (block = blocks - 1; block >= 0; block--) 1380: if (GET_CODE (block_end[block]) == JUMP_INSN 1381: && GET_CODE (PATTERN (block_end[block])) == RETURN) 1.1.1.4 root 1382: SET_HARD_REG_BIT (block_out_reg_set[block], value_regno); 1.1 root 1383: 1384: /* Mark of the end of last block if we "fall off" the end of the 1385: function into the epilogue. */ 1386: 1387: if (GET_CODE (block_end[blocks-1]) != JUMP_INSN 1388: || GET_CODE (PATTERN (block_end[blocks-1])) == RETURN) 1.1.1.4 root 1389: SET_HARD_REG_BIT (block_out_reg_set[blocks-1], value_regno); 1.1 root 1390: } 1391: 1392: /* now scan all blocks backward for stack register use */ 1393: 1394: block = blocks - 1; 1395: while (block >= 0) 1396: { 1397: register rtx insn, prev; 1398: 1399: /* current register status at last instruction */ 1400: 1401: COPY_HARD_REG_SET (regstack.reg_set, block_out_reg_set[block]); 1402: 1403: prev = block_end[block]; 1404: do 1405: { 1406: insn = prev; 1407: prev = PREV_INSN (insn); 1408: 1409: /* If the insn is a CALL_INSN, we need to ensure that 1410: everything dies. But otherwise don't process unless there 1411: are some stack regs present. */ 1412: 1413: if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) 1414: record_reg_life (insn, block, ®stack); 1415: 1416: } while (insn != block_begin[block]); 1417: 1418: /* Set the state at the start of the block. Mark that no 1419: register mapping information known yet. */ 1420: 1421: COPY_HARD_REG_SET (block_stack_in[block].reg_set, regstack.reg_set); 1422: block_stack_in[block].top = -2; 1423: 1424: /* If there is a label, propagate our register life to all jumps 1425: to this label. */ 1426: 1427: if (GET_CODE (insn) == CODE_LABEL) 1428: { 1429: register rtx label; 1430: int must_restart = 0; 1431: 1432: for (label = LABEL_REFS (insn); label != insn; 1433: label = LABEL_NEXTREF (label)) 1434: { 1435: int jump_block = BLOCK_NUM (CONTAINING_INSN (label)); 1436: 1437: if (jump_block < block) 1438: IOR_HARD_REG_SET (block_out_reg_set[jump_block], 1439: block_stack_in[block].reg_set); 1440: else 1441: { 1442: /* The block containing the jump has already been 1443: processed. If there are registers that were not known 1444: to be live then, but are live now, we must back up 1445: and restart life analysis from that point with the new 1446: life information. */ 1447: 1448: GO_IF_HARD_REG_SUBSET (block_stack_in[block].reg_set, 1449: block_out_reg_set[jump_block], 1450: win); 1451: 1452: IOR_HARD_REG_SET (block_out_reg_set[jump_block], 1453: block_stack_in[block].reg_set); 1454: 1455: block = jump_block; 1456: must_restart = 1; 1457: 1458: win: 1459: ; 1460: } 1461: } 1462: if (must_restart) 1463: continue; 1464: } 1465: 1466: if (block_drops_in[block]) 1467: IOR_HARD_REG_SET (block_out_reg_set[block-1], 1468: block_stack_in[block].reg_set); 1469: 1470: block -= 1; 1471: } 1472: 1473: { 1474: /* If any reg is live at the start of the first block of a 1475: function, then we must guarantee that the reg holds some value by 1476: generating our own "load" of that register. Otherwise a 387 would 1477: fault trying to access an empty register. */ 1478: 1479: HARD_REG_SET empty_regs; 1480: CLEAR_HARD_REG_SET (empty_regs); 1481: GO_IF_HARD_REG_SUBSET (block_stack_in[0].reg_set, empty_regs, 1482: no_live_regs); 1483: } 1484: 1485: /* Load zero into each live register. The fact that a register 1486: appears live at the function start does not necessarily imply an error 1487: in the user program: it merely means that we could not determine that 1488: there wasn't such an error, just as -Wunused sometimes gives 1489: "incorrect" warnings. In those cases, these initializations will do 1490: no harm. 1491: 1492: Note that we are inserting virtual register references here: 1493: these insns must be processed by convert_regs later. Also, these 1494: insns will not be in block_number, so BLOCK_NUM() will fail for them. */ 1495: 1496: for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) 1497: if (TEST_HARD_REG_BIT (block_stack_in[0].reg_set, reg)) 1498: { 1499: rtx init_rtx; 1500: 1501: init_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[reg][(int) DFmode], 1502: CONST0_RTX (DFmode)); 1503: block_begin[0] = emit_insn_after (init_rtx, first); 1504: PUT_MODE (block_begin[0], QImode); 1505: 1506: CLEAR_HARD_REG_BIT (block_stack_in[0].reg_set, reg); 1507: } 1508: 1509: no_live_regs: 1510: ; 1511: } 1512: 1513: /***************************************************************************** 1.1.1.2 root 1514: This section deals with stack register substitution, and forms the second 1.1 root 1515: pass over the RTL. 1516: *****************************************************************************/ 1517: 1518: /* Replace REG, which is a pointer to a stack reg RTX, with an RTX for 1519: the desired hard REGNO. */ 1520: 1521: static void 1522: replace_reg (reg, regno) 1523: rtx *reg; 1524: int regno; 1525: { 1526: if (regno < FIRST_STACK_REG || regno > LAST_STACK_REG 1527: || ! STACK_REG_P (*reg)) 1528: abort (); 1529: 1530: if (GET_MODE_CLASS (GET_MODE (*reg)) != MODE_FLOAT) 1531: abort (); 1532: 1533: *reg = FP_mode_reg[regno][(int) GET_MODE (*reg)]; 1534: } 1535: 1536: /* Remove a note of type NOTE, which must be found, for register 1537: number REGNO from INSN. Remove only one such note. */ 1538: 1539: static void 1540: remove_regno_note (insn, note, regno) 1541: rtx insn; 1542: enum reg_note note; 1543: int regno; 1544: { 1545: register rtx *note_link, this; 1546: 1547: note_link = ®_NOTES(insn); 1548: for (this = *note_link; this; this = XEXP (this, 1)) 1549: if (REG_NOTE_KIND (this) == note 1550: && REG_P (XEXP (this, 0)) && REGNO (XEXP (this, 0)) == regno) 1551: { 1552: *note_link = XEXP (this, 1); 1553: return; 1554: } 1555: else 1556: note_link = &XEXP (this, 1); 1557: 1558: abort (); 1559: } 1560: 1561: /* Find the hard register number of virtual register REG in REGSTACK. 1562: The hard register number is relative to the top of the stack. -1 is 1563: returned if the register is not found. */ 1564: 1565: static int 1566: get_hard_regnum (regstack, reg) 1567: stack regstack; 1568: rtx reg; 1569: { 1570: int i; 1571: 1572: if (! STACK_REG_P (reg)) 1573: abort (); 1574: 1575: for (i = regstack->top; i >= 0; i--) 1576: if (regstack->reg[i] == REGNO (reg)) 1577: break; 1578: 1579: return i >= 0 ? (FIRST_STACK_REG + regstack->top - i) : -1; 1580: } 1581: 1582: /* Delete INSN from the RTL. Mark the insn, but don't remove it from 1583: the chain of insns. Doing so could confuse block_begin and block_end 1584: if this were the only insn in the block. */ 1585: 1586: static void 1587: delete_insn_for_stacker (insn) 1588: rtx insn; 1589: { 1590: PUT_CODE (insn, NOTE); 1591: NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED; 1592: NOTE_SOURCE_FILE (insn) = 0; 1593: } 1594: 1595: /* Emit an insn to pop virtual register REG before or after INSN. 1596: REGSTACK is the stack state after INSN and is updated to reflect this 1597: pop. WHEN is either emit_insn_before or emit_insn_after. A pop insn 1598: is represented as a SET whose destination is the register to be popped 1599: and source is the top of stack. A death note for the top of stack 1600: cases the movdf pattern to pop. */ 1601: 1602: static rtx 1603: emit_pop_insn (insn, regstack, reg, when) 1604: rtx insn; 1605: stack regstack; 1606: rtx reg; 1607: rtx (*when)(); 1608: { 1609: rtx pop_insn, pop_rtx; 1610: int hard_regno; 1611: 1612: hard_regno = get_hard_regnum (regstack, reg); 1613: 1614: if (hard_regno < FIRST_STACK_REG) 1615: abort (); 1616: 1617: pop_rtx = gen_rtx (SET, VOIDmode, FP_mode_reg[hard_regno][(int) DFmode], 1618: FP_mode_reg[FIRST_STACK_REG][(int) DFmode]); 1619: 1620: pop_insn = (*when) (pop_rtx, insn); 1.1.1.5 root 1621: /* ??? This used to be VOIDmode, but that seems wrong. */ 1622: PUT_MODE (pop_insn, QImode); 1.1 root 1623: 1624: REG_NOTES (pop_insn) = gen_rtx (EXPR_LIST, REG_DEAD, 1625: FP_mode_reg[FIRST_STACK_REG][(int) DFmode], 1626: REG_NOTES (pop_insn)); 1627: 1628: regstack->reg[regstack->top - (hard_regno - FIRST_STACK_REG)] 1629: = regstack->reg[regstack->top]; 1630: regstack->top -= 1; 1631: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (reg)); 1632: 1633: return pop_insn; 1634: } 1635: 1636: /* Emit an insn before or after INSN to swap virtual register REG with the 1637: top of stack. WHEN should be `emit_insn_before' or `emit_insn_before' 1638: REGSTACK is the stack state before the swap, and is updated to reflect 1639: the swap. A swap insn is represented as a PARALLEL of two patterns: 1640: each pattern moves one reg to the other. 1641: 1642: If REG is already at the top of the stack, no insn is emitted. */ 1643: 1644: static void 1.1.1.5 root 1645: emit_swap_insn (insn, regstack, reg) 1.1 root 1646: rtx insn; 1647: stack regstack; 1.1.1.5 root 1648: rtx reg; 1.1 root 1649: { 1.1.1.5 root 1650: int hard_regno; 1.1 root 1651: rtx gen_swapdf(); 1652: rtx swap_rtx, swap_insn; 1.1.1.5 root 1653: int tmp, other_reg; /* swap regno temps */ 1654: rtx i1; /* the stack-reg insn prior to INSN */ 1655: rtx i1set = NULL_RTX; /* the SET rtx within I1 */ 1656: 1657: hard_regno = get_hard_regnum (regstack, reg); 1.1 root 1658: 1.1.1.5 root 1659: if (hard_regno < FIRST_STACK_REG) 1660: abort (); 1.1 root 1661: if (hard_regno == FIRST_STACK_REG) 1662: return; 1663: 1.1.1.5 root 1664: other_reg = regstack->top - (hard_regno - FIRST_STACK_REG); 1.1 root 1665: 1.1.1.5 root 1666: tmp = regstack->reg[other_reg]; 1667: regstack->reg[other_reg] = regstack->reg[regstack->top]; 1.1 root 1668: regstack->reg[regstack->top] = tmp; 1669: 1.1.1.5 root 1670: /* Find the previous insn involving stack regs, but don't go past 1671: any labels, calls or jumps. */ 1672: i1 = prev_nonnote_insn (insn); 1673: while (i1 && GET_CODE (i1) == INSN && GET_MODE (i1) != QImode) 1674: i1 = prev_nonnote_insn (i1); 1675: 1676: if (i1) 1677: i1set = single_set (i1); 1678: 1679: if (i1set) 1680: { 1681: rtx i2; /* the stack-reg insn prior to I1 */ 1682: rtx i1src = *get_true_reg (&SET_SRC (i1set)); 1683: rtx i1dest = *get_true_reg (&SET_DEST (i1set)); 1684: 1685: /* If the previous register stack push was from the reg we are to 1686: swap with, omit the swap. */ 1687: 1688: if (GET_CODE (i1dest) == REG && REGNO (i1dest) == FIRST_STACK_REG 1689: && GET_CODE (i1src) == REG && REGNO (i1src) == hard_regno - 1 1690: && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1691: return; 1.1 root 1692: 1.1.1.5 root 1693: /* If the previous insn wrote to the reg we are to swap with, 1694: omit the swap. */ 1.1 root 1695: 1.1.1.5 root 1696: if (GET_CODE (i1dest) == REG && REGNO (i1dest) == hard_regno 1697: && GET_CODE (i1src) == REG && REGNO (i1src) == FIRST_STACK_REG 1698: && find_regno_note (i1, REG_DEAD, FIRST_STACK_REG) == NULL_RTX) 1699: return; 1700: } 1701: 1702: if (GET_RTX_CLASS (GET_CODE (i1)) == 'i' && sets_cc0_p (PATTERN (i1))) 1703: { 1704: i1 = next_nonnote_insn (i1); 1705: if (i1 == insn) 1706: abort (); 1707: } 1.1 root 1708: 1.1.1.5 root 1709: swap_rtx = gen_swapdf (FP_mode_reg[hard_regno][(int) DFmode], 1710: FP_mode_reg[FIRST_STACK_REG][(int) DFmode]); 1711: swap_insn = emit_insn_after (swap_rtx, i1); 1712: /* ??? This used to be VOIDmode, but that seems wrong. */ 1713: PUT_MODE (swap_insn, QImode); 1.1 root 1714: } 1715: 1716: /* Handle a move to or from a stack register in PAT, which is in INSN. 1717: REGSTACK is the current stack. */ 1718: 1719: static void 1720: move_for_stack_reg (insn, regstack, pat) 1721: rtx insn; 1722: stack regstack; 1723: rtx pat; 1724: { 1725: rtx *src = get_true_reg (&SET_SRC (pat)); 1726: rtx *dest = get_true_reg (&SET_DEST (pat)); 1727: rtx note; 1728: 1729: if (STACK_REG_P (*src) && STACK_REG_P (*dest)) 1730: { 1731: /* Write from one stack reg to another. If SRC dies here, then 1732: just change the register mapping and delete the insn. */ 1733: 1734: note = find_regno_note (insn, REG_DEAD, REGNO (*src)); 1735: if (note) 1736: { 1737: int i; 1738: 1739: /* If this is a no-op move, there must not be a REG_DEAD note. */ 1740: if (REGNO (*src) == REGNO (*dest)) 1741: abort (); 1742: 1743: for (i = regstack->top; i >= 0; i--) 1744: if (regstack->reg[i] == REGNO (*src)) 1745: break; 1746: 1747: /* The source must be live, and the dest must be dead. */ 1748: if (i < 0 || get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG) 1749: abort (); 1750: 1751: /* It is possible that the dest is unused after this insn. 1752: If so, just pop the src. */ 1753: 1754: if (find_regno_note (insn, REG_UNUSED, REGNO (*dest))) 1755: { 1756: emit_pop_insn (insn, regstack, *src, emit_insn_after); 1757: 1758: delete_insn_for_stacker (insn); 1759: return; 1760: } 1761: 1762: regstack->reg[i] = REGNO (*dest); 1763: 1764: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1765: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src)); 1766: 1767: delete_insn_for_stacker (insn); 1768: 1769: return; 1770: } 1771: 1772: /* The source reg does not die. */ 1773: 1774: /* If this appears to be a no-op move, delete it, or else it 1775: will confuse the machine description output patterns. But if 1776: it is REG_UNUSED, we must pop the reg now, as per-insn processing 1777: for REG_UNUSED will not work for deleted insns. */ 1778: 1779: if (REGNO (*src) == REGNO (*dest)) 1780: { 1781: if (find_regno_note (insn, REG_UNUSED, REGNO (*dest))) 1782: emit_pop_insn (insn, regstack, *dest, emit_insn_after); 1783: 1784: delete_insn_for_stacker (insn); 1785: return; 1786: } 1787: 1788: /* The destination ought to be dead */ 1789: if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG) 1790: abort (); 1791: 1792: replace_reg (src, get_hard_regnum (regstack, *src)); 1793: 1794: regstack->reg[++regstack->top] = REGNO (*dest); 1795: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1796: replace_reg (dest, FIRST_STACK_REG); 1797: } 1798: else if (STACK_REG_P (*src)) 1799: { 1800: /* Save from a stack reg to MEM, or possibly integer reg. Since 1801: only top of stack may be saved, emit an exchange first if 1802: needs be. */ 1803: 1.1.1.5 root 1804: emit_swap_insn (insn, regstack, *src); 1.1 root 1805: 1806: note = find_regno_note (insn, REG_DEAD, REGNO (*src)); 1807: if (note) 1808: { 1809: replace_reg (&XEXP (note, 0), FIRST_STACK_REG); 1810: regstack->top--; 1811: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src)); 1812: } 1.1.1.6 root 1813: else if (GET_MODE (*src) == XFmode && regstack->top != REG_STACK_SIZE) 1814: { 1815: /* A 387 cannot write an XFmode value to a MEM without 1816: clobbering the source reg. The output code can handle 1817: this by reading back the value from the MEM. 1818: But it is more efficient to use a temp register if one is 1819: available. Push the source value here if the register 1820: stack is not full, and then write the value to memory via 1821: a pop. */ 1822: rtx push_rtx, push_insn; 1823: rtx top_stack_reg = FP_mode_reg[FIRST_STACK_REG][(int) XFmode]; 1824: 1825: push_rtx = gen_movxf (top_stack_reg, top_stack_reg); 1826: push_insn = emit_insn_before (push_rtx, insn); 1827: PUT_MODE (push_insn, QImode); 1828: REG_NOTES (insn) = gen_rtx (EXPR_LIST, REG_DEAD, top_stack_reg, 1829: REG_NOTES (insn)); 1830: } 1.1 root 1831: 1832: replace_reg (src, FIRST_STACK_REG); 1833: } 1834: else if (STACK_REG_P (*dest)) 1835: { 1836: /* Load from MEM, or possibly integer REG or constant, into the 1837: stack regs. The actual target is always the top of the 1838: stack. The stack mapping is changed to reflect that DEST is 1839: now at top of stack. */ 1840: 1841: /* The destination ought to be dead */ 1842: if (get_hard_regnum (regstack, *dest) >= FIRST_STACK_REG) 1843: abort (); 1844: 1845: if (regstack->top >= REG_STACK_SIZE) 1846: abort (); 1847: 1848: regstack->reg[++regstack->top] = REGNO (*dest); 1849: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 1850: replace_reg (dest, FIRST_STACK_REG); 1851: } 1852: else 1853: abort (); 1854: } 1855: 1.1.1.5 root 1856: void 1857: swap_rtx_condition (pat) 1858: rtx pat; 1859: { 1860: register char *fmt; 1861: register int i; 1862: 1863: if (GET_RTX_CLASS (GET_CODE (pat)) == '<') 1864: { 1865: PUT_CODE (pat, swap_condition (GET_CODE (pat))); 1866: return; 1867: } 1868: 1869: fmt = GET_RTX_FORMAT (GET_CODE (pat)); 1870: for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 1871: { 1872: if (fmt[i] == 'E') 1873: { 1874: register int j; 1875: 1876: for (j = XVECLEN (pat, i) - 1; j >= 0; j--) 1877: swap_rtx_condition (XVECEXP (pat, i, j)); 1878: } 1879: else if (fmt[i] == 'e') 1880: swap_rtx_condition (XEXP (pat, i)); 1881: } 1882: } 1883: 1.1 root 1884: /* Handle a comparison. Special care needs to be taken to avoid 1885: causing comparisons that a 387 cannot do correctly, such as EQ. 1886: 1887: Also, a pop insn may need to be emitted. The 387 does have an 1888: `fcompp' insn that can pop two regs, but it is sometimes too expensive 1889: to do this - a `fcomp' followed by a `fstpl %st(0)' may be easier to 1890: set up. */ 1891: 1892: static void 1893: compare_for_stack_reg (insn, regstack, pat) 1894: rtx insn; 1895: stack regstack; 1896: rtx pat; 1897: { 1898: rtx *src1, *src2; 1899: rtx src1_note, src2_note; 1900: 1901: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); 1902: src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); 1903: 1.1.1.5 root 1904: /* ??? If fxch turns out to be cheaper than fstp, give priority to 1905: registers that die in this insn - move those to stack top first. */ 1906: if (! STACK_REG_P (*src1) 1907: || (STACK_REG_P (*src2) 1908: && get_hard_regnum (regstack, *src2) == FIRST_STACK_REG)) 1909: { 1910: rtx temp, next; 1911: 1912: temp = XEXP (SET_SRC (pat), 0); 1913: XEXP (SET_SRC (pat), 0) = XEXP (SET_SRC (pat), 1); 1914: XEXP (SET_SRC (pat), 1) = temp; 1.1 root 1915: 1.1.1.5 root 1916: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); 1917: src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); 1918: 1919: next = next_cc0_user (insn); 1920: if (next == NULL_RTX) 1921: abort (); 1922: 1923: swap_rtx_condition (PATTERN (next)); 1924: INSN_CODE (next) = -1; 1925: INSN_CODE (insn) = -1; 1926: } 1.1 root 1927: 1928: /* We will fix any death note later. */ 1929: 1930: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 1931: 1932: if (STACK_REG_P (*src2)) 1933: src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 1934: else 1.1.1.5 root 1935: src2_note = NULL_RTX; 1.1 root 1936: 1.1.1.5 root 1937: emit_swap_insn (insn, regstack, *src1); 1.1 root 1938: 1939: replace_reg (src1, FIRST_STACK_REG); 1940: 1941: if (STACK_REG_P (*src2)) 1942: replace_reg (src2, get_hard_regnum (regstack, *src2)); 1943: 1944: if (src1_note) 1945: { 1946: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src1_note, 0))); 1947: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 1948: regstack->top--; 1949: } 1950: 1951: /* If the second operand dies, handle that. But if the operands are 1952: the same stack register, don't bother, because only one death is 1953: needed, and it was just handled. */ 1954: 1955: if (src2_note 1.1.1.5 root 1956: && ! (STACK_REG_P (*src1) && STACK_REG_P (*src2) 1.1 root 1957: && REGNO (*src1) == REGNO (*src2))) 1958: { 1959: /* As a special case, two regs may die in this insn if src2 is 1960: next to top of stack and the top of stack also dies. Since 1961: we have already popped src1, "next to top of stack" is really 1962: at top (FIRST_STACK_REG) now. */ 1963: 1964: if (get_hard_regnum (regstack, XEXP (src2_note, 0)) == FIRST_STACK_REG 1965: && src1_note) 1966: { 1967: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (XEXP (src2_note, 0))); 1968: replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG + 1); 1969: regstack->top--; 1970: } 1971: else 1972: { 1973: /* The 386 can only represent death of the first operand in 1974: the case handled above. In all other cases, emit a separate 1975: pop and remove the death note from here. */ 1976: 1.1.1.3 root 1977: link_cc0_insns (insn); 1978: 1.1 root 1979: remove_regno_note (insn, REG_DEAD, REGNO (XEXP (src2_note, 0))); 1980: 1981: emit_pop_insn (insn, regstack, XEXP (src2_note, 0), 1982: emit_insn_after); 1983: } 1984: } 1985: } 1986: 1987: /* Substitute new registers in PAT, which is part of INSN. REGSTACK 1988: is the current register layout. */ 1989: 1990: static void 1991: subst_stack_regs_pat (insn, regstack, pat) 1992: rtx insn; 1993: stack regstack; 1994: rtx pat; 1995: { 1996: rtx *dest, *src; 1.1.1.5 root 1997: rtx *src1 = (rtx *) NULL_PTR, *src2; 1.1 root 1998: rtx src1_note, src2_note; 1999: 2000: if (GET_CODE (pat) != SET) 2001: return; 2002: 2003: dest = get_true_reg (&SET_DEST (pat)); 2004: src = get_true_reg (&SET_SRC (pat)); 2005: 2006: /* See if this is a `movM' pattern, and handle elsewhere if so. */ 2007: 2008: if (*dest != cc0_rtx 2009: && (STACK_REG_P (*src) 2010: || (STACK_REG_P (*dest) 2011: && (GET_CODE (*src) == REG || GET_CODE (*src) == MEM 2012: || GET_CODE (*src) == CONST_DOUBLE)))) 2013: move_for_stack_reg (insn, regstack, pat); 2014: else 2015: switch (GET_CODE (SET_SRC (pat))) 2016: { 2017: case COMPARE: 2018: compare_for_stack_reg (insn, regstack, pat); 2019: break; 2020: 2021: case CALL: 2022: regstack->reg[++regstack->top] = REGNO (*dest); 2023: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2024: replace_reg (dest, FIRST_STACK_REG); 2025: break; 2026: 2027: case REG: 2028: /* This is a `tstM2' case. */ 2029: if (*dest != cc0_rtx) 2030: abort (); 2031: 2032: src1 = src; 2033: 2034: /* Fall through. */ 2035: 1.1.1.5 root 2036: case FLOAT_TRUNCATE: 1.1 root 2037: case SQRT: 2038: case ABS: 2039: case NEG: 2040: /* These insns only operate on the top of the stack. DEST might 2041: be cc0_rtx if we're processing a tstM pattern. Also, it's 2042: possible that the tstM case results in a REG_DEAD note on the 2043: source. */ 2044: 2045: if (src1 == 0) 2046: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); 2047: 1.1.1.5 root 2048: emit_swap_insn (insn, regstack, *src1); 1.1 root 2049: 2050: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2051: 2052: if (STACK_REG_P (*dest)) 2053: replace_reg (dest, FIRST_STACK_REG); 2054: 2055: if (src1_note) 2056: { 2057: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 2058: regstack->top--; 2059: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 2060: } 2061: 2062: replace_reg (src1, FIRST_STACK_REG); 2063: 2064: break; 2065: 2066: case MINUS: 2067: case DIV: 2068: /* On i386, reversed forms of subM3 and divM3 exist for 2069: MODE_FLOAT, so the same code that works for addM3 and mulM3 2070: can be used. */ 2071: case MULT: 2072: case PLUS: 2073: /* These insns can accept the top of stack as a destination 2074: from a stack reg or mem, or can use the top of stack as a 2075: source and some other stack register (possibly top of stack) 2076: as a destination. */ 2077: 2078: src1 = get_true_reg (&XEXP (SET_SRC (pat), 0)); 2079: src2 = get_true_reg (&XEXP (SET_SRC (pat), 1)); 2080: 2081: /* We will fix any death note later. */ 2082: 2083: if (STACK_REG_P (*src1)) 2084: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2085: else 1.1.1.5 root 2086: src1_note = NULL_RTX; 1.1 root 2087: if (STACK_REG_P (*src2)) 2088: src2_note = find_regno_note (insn, REG_DEAD, REGNO (*src2)); 2089: else 1.1.1.5 root 2090: src2_note = NULL_RTX; 1.1 root 2091: 2092: /* If either operand is not a stack register, then the dest 2093: must be top of stack. */ 2094: 2095: if (! STACK_REG_P (*src1) || ! STACK_REG_P (*src2)) 1.1.1.5 root 2096: emit_swap_insn (insn, regstack, *dest); 1.1 root 2097: else 2098: { 2099: /* Both operands are REG. If neither operand is already 2100: at the top of stack, choose to make the one that is the dest 1.1.1.5 root 2101: the new top of stack. */ 1.1 root 2102: 2103: int src1_hard_regnum, src2_hard_regnum; 2104: 2105: src1_hard_regnum = get_hard_regnum (regstack, *src1); 2106: src2_hard_regnum = get_hard_regnum (regstack, *src2); 2107: if (src1_hard_regnum == -1 || src2_hard_regnum == -1) 2108: abort (); 2109: 2110: if (src1_hard_regnum != FIRST_STACK_REG 2111: && src2_hard_regnum != FIRST_STACK_REG) 1.1.1.5 root 2112: emit_swap_insn (insn, regstack, *dest); 1.1 root 2113: } 2114: 2115: if (STACK_REG_P (*src1)) 2116: replace_reg (src1, get_hard_regnum (regstack, *src1)); 2117: if (STACK_REG_P (*src2)) 2118: replace_reg (src2, get_hard_regnum (regstack, *src2)); 2119: 2120: if (src1_note) 2121: { 2122: /* If the register that dies is at the top of stack, then 2123: the destination is somewhere else - merely substitute it. 2124: But if the reg that dies is not at top of stack, then 2125: move the top of stack to the dead reg, as though we had 2126: done the insn and then a store-with-pop. */ 2127: 2128: if (REGNO (XEXP (src1_note, 0)) == regstack->reg[regstack->top]) 2129: { 2130: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2131: replace_reg (dest, get_hard_regnum (regstack, *dest)); 2132: } 2133: else 2134: { 2135: int regno = get_hard_regnum (regstack, XEXP (src1_note, 0)); 2136: 2137: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2138: replace_reg (dest, regno); 2139: 2140: regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 2141: = regstack->reg[regstack->top]; 2142: } 2143: 2144: CLEAR_HARD_REG_BIT (regstack->reg_set, 2145: REGNO (XEXP (src1_note, 0))); 2146: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 2147: regstack->top--; 2148: } 2149: else if (src2_note) 2150: { 2151: if (REGNO (XEXP (src2_note, 0)) == regstack->reg[regstack->top]) 2152: { 2153: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2154: replace_reg (dest, get_hard_regnum (regstack, *dest)); 2155: } 2156: else 2157: { 2158: int regno = get_hard_regnum (regstack, XEXP (src2_note, 0)); 2159: 2160: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2161: replace_reg (dest, regno); 2162: 2163: regstack->reg[regstack->top - (regno - FIRST_STACK_REG)] 2164: = regstack->reg[regstack->top]; 2165: } 2166: 2167: CLEAR_HARD_REG_BIT (regstack->reg_set, 2168: REGNO (XEXP (src2_note, 0))); 2169: replace_reg (&XEXP (src2_note, 0), FIRST_STACK_REG); 2170: regstack->top--; 2171: } 2172: else 2173: { 2174: SET_HARD_REG_BIT (regstack->reg_set, REGNO (*dest)); 2175: replace_reg (dest, get_hard_regnum (regstack, *dest)); 2176: } 2177: 2178: break; 2179: 1.1.1.4 root 2180: case UNSPEC: 2181: switch (XINT (SET_SRC (pat), 1)) 2182: { 2183: case 1: /* sin */ 2184: case 2: /* cos */ 2185: /* These insns only operate on the top of the stack. */ 2186: 2187: src1 = get_true_reg (&XVECEXP (SET_SRC (pat), 0, 0)); 2188: 1.1.1.5 root 2189: emit_swap_insn (insn, regstack, *src1); 1.1.1.4 root 2190: 2191: src1_note = find_regno_note (insn, REG_DEAD, REGNO (*src1)); 2192: 2193: if (STACK_REG_P (*dest)) 2194: replace_reg (dest, FIRST_STACK_REG); 2195: 2196: if (src1_note) 2197: { 2198: replace_reg (&XEXP (src1_note, 0), FIRST_STACK_REG); 2199: regstack->top--; 2200: CLEAR_HARD_REG_BIT (regstack->reg_set, REGNO (*src1)); 2201: } 2202: 2203: replace_reg (src1, FIRST_STACK_REG); 2204: 2205: break; 2206: 2207: default: 2208: abort (); 2209: } 2210: break; 2211: 1.1 root 2212: default: 2213: abort (); 2214: } 2215: } 2216: 2217: /* Substitute hard regnums for any stack regs in INSN, which has 2218: N_INPUTS inputs and N_OUTPUTS outputs. REGSTACK is the stack info 1.1.1.3 root 2219: before the insn, and is updated with changes made here. CONSTRAINTS is 1.1 root 2220: an array of the constraint strings used in the asm statement. 2221: 2222: OPERANDS is an array of the operands, and OPERANDS_LOC is a 2223: parallel array of where the operands were found. The output operands 1.1.1.3 root 2224: all precede the input operands. 1.1 root 2225: 2226: There are several requirements and assumptions about the use of 2227: stack-like regs in asm statements. These rules are enforced by 2228: record_asm_stack_regs; see comments there for details. Any 2229: asm_operands left in the RTL at this point may be assume to meet the 2230: requirements, since record_asm_stack_regs removes any problem asm. */ 2231: 2232: static void 2233: subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints, 2234: n_inputs, n_outputs) 2235: rtx insn; 2236: stack regstack; 2237: rtx *operands, **operands_loc; 2238: char **constraints; 2239: int n_inputs, n_outputs; 2240: { 2241: int n_operands = n_inputs + n_outputs; 2242: int first_input = n_outputs; 2243: rtx body = PATTERN (insn); 2244: 2245: int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); 2246: enum reg_class *operand_class 2247: = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); 2248: 2249: rtx *note_reg; /* Array of note contents */ 2250: rtx **note_loc; /* Address of REG field of each note */ 2251: enum reg_note *note_kind; /* The type of each note */ 2252: 2253: rtx *clobber_reg; 2254: rtx **clobber_loc; 2255: 2256: struct stack_def temp_stack; 2257: int n_notes; 2258: int n_clobbers; 2259: rtx note; 2260: int i; 2261: 2262: /* Find out what the constraints required. If no constraint 2263: alternative matches, that is a compiler bug: we should have caught 2264: such an insn during the life analysis pass (and reload should have 2265: caught it regardless). */ 2266: 2267: i = constrain_asm_operands (n_operands, operands, constraints, 2268: operand_matches, operand_class); 2269: if (i < 0) 2270: abort (); 2271: 2272: /* Strip SUBREGs here to make the following code simpler. */ 2273: for (i = 0; i < n_operands; i++) 2274: if (GET_CODE (operands[i]) == SUBREG 2275: && GET_CODE (SUBREG_REG (operands[i])) == REG) 2276: { 2277: operands_loc[i] = & SUBREG_REG (operands[i]); 2278: operands[i] = SUBREG_REG (operands[i]); 2279: } 2280: 2281: /* Set up NOTE_REG, NOTE_LOC and NOTE_KIND. */ 2282: 2283: for (i = 0, note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2284: i++; 2285: 2286: note_reg = (rtx *) alloca (i * sizeof (rtx)); 2287: note_loc = (rtx **) alloca (i * sizeof (rtx *)); 2288: note_kind = (enum reg_note *) alloca (i * sizeof (enum reg_note)); 2289: 2290: n_notes = 0; 2291: for (note = REG_NOTES (insn); note; note = XEXP (note, 1)) 2292: { 2293: rtx reg = XEXP (note, 0); 2294: rtx *loc = & XEXP (note, 0); 2295: 2296: if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 2297: { 2298: loc = & SUBREG_REG (reg); 2299: reg = SUBREG_REG (reg); 2300: } 2301: 2302: if (STACK_REG_P (reg) 2303: && (REG_NOTE_KIND (note) == REG_DEAD 2304: || REG_NOTE_KIND (note) == REG_UNUSED)) 2305: { 2306: note_reg[n_notes] = reg; 2307: note_loc[n_notes] = loc; 2308: note_kind[n_notes] = REG_NOTE_KIND (note); 2309: n_notes++; 2310: } 2311: } 2312: 2313: /* Set up CLOBBER_REG and CLOBBER_LOC. */ 2314: 2315: n_clobbers = 0; 2316: 2317: if (GET_CODE (body) == PARALLEL) 1.1.1.2 root 2318: { 2319: clobber_reg = (rtx *) alloca (XVECLEN (body, 0) * sizeof (rtx *)); 2320: clobber_loc = (rtx **) alloca (XVECLEN (body, 0) * sizeof (rtx **)); 1.1 root 2321: 1.1.1.2 root 2322: for (i = 0; i < XVECLEN (body, 0); i++) 2323: if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) 2324: { 2325: rtx clobber = XVECEXP (body, 0, i); 2326: rtx reg = XEXP (clobber, 0); 2327: rtx *loc = & XEXP (clobber, 0); 1.1 root 2328: 1.1.1.2 root 2329: if (GET_CODE (reg) == SUBREG && GET_CODE (SUBREG_REG (reg)) == REG) 2330: { 2331: loc = & SUBREG_REG (reg); 2332: reg = SUBREG_REG (reg); 2333: } 2334: 2335: if (STACK_REG_P (reg)) 2336: { 2337: clobber_reg[n_clobbers] = reg; 2338: clobber_loc[n_clobbers] = loc; 2339: n_clobbers++; 2340: } 2341: } 2342: } 1.1 root 2343: 1.1.1.7 ! root 2344: bcopy ((char *) regstack, (char *) &temp_stack, sizeof (temp_stack)); 1.1 root 2345: 2346: /* Put the input regs into the desired place in TEMP_STACK. */ 2347: 2348: for (i = first_input; i < first_input + n_inputs; i++) 2349: if (STACK_REG_P (operands[i]) 2350: && reg_class_subset_p (operand_class[i], FLOAT_REGS) 2351: && operand_class[i] != FLOAT_REGS) 2352: { 2353: /* If an operand needs to be in a particular reg in 2354: FLOAT_REGS, the constraint was either 't' or 'u'. Since 2355: these constraints are for single register classes, and reload 2356: guaranteed that operand[i] is already in that class, we can 2357: just use REGNO (operands[i]) to know which actual reg this 2358: operand needs to be in. */ 2359: 2360: int regno = get_hard_regnum (&temp_stack, operands[i]); 2361: 2362: if (regno < 0) 2363: abort (); 2364: 2365: if (regno != REGNO (operands[i])) 2366: { 2367: /* operands[i] is not in the right place. Find it 2368: and swap it with whatever is already in I's place. 2369: K is where operands[i] is now. J is where it should 2370: be. */ 2371: int j, k, temp; 2372: 2373: k = temp_stack.top - (regno - FIRST_STACK_REG); 2374: j = (temp_stack.top 2375: - (REGNO (operands[i]) - FIRST_STACK_REG)); 2376: 2377: temp = temp_stack.reg[k]; 2378: temp_stack.reg[k] = temp_stack.reg[j]; 2379: temp_stack.reg[j] = temp; 2380: } 2381: } 2382: 2383: /* emit insns before INSN to make sure the reg-stack is in the right 2384: order. */ 2385: 2386: change_stack (insn, regstack, &temp_stack, emit_insn_before); 2387: 2388: /* Make the needed input register substitutions. Do death notes and 2389: clobbers too, because these are for inputs, not outputs. */ 2390: 2391: for (i = first_input; i < first_input + n_inputs; i++) 2392: if (STACK_REG_P (operands[i])) 2393: { 2394: int regnum = get_hard_regnum (regstack, operands[i]); 2395: 2396: if (regnum < 0) 2397: abort (); 2398: 2399: replace_reg (operands_loc[i], regnum); 2400: } 2401: 2402: for (i = 0; i < n_notes; i++) 2403: if (note_kind[i] == REG_DEAD) 2404: { 2405: int regnum = get_hard_regnum (regstack, note_reg[i]); 2406: 2407: if (regnum < 0) 2408: abort (); 2409: 2410: replace_reg (note_loc[i], regnum); 2411: } 2412: 2413: for (i = 0; i < n_clobbers; i++) 2414: { 2415: /* It's OK for a CLOBBER to reference a reg that is not live. 2416: Don't try to replace it in that case. */ 2417: int regnum = get_hard_regnum (regstack, clobber_reg[i]); 2418: 2419: if (regnum >= 0) 2420: { 2421: /* Sigh - clobbers always have QImode. But replace_reg knows 2422: that these regs can't be MODE_INT and will abort. Just put 2423: the right reg there without calling replace_reg. */ 2424: 2425: *clobber_loc[i] = FP_mode_reg[regnum][(int) DFmode]; 2426: } 2427: } 2428: 2429: /* Now remove from REGSTACK any inputs that the asm implicitly popped. */ 2430: 2431: for (i = first_input; i < first_input + n_inputs; i++) 2432: if (STACK_REG_P (operands[i])) 2433: { 2434: /* An input reg is implicitly popped if it is tied to an 2435: output, or if there is a CLOBBER for it. */ 2436: int j; 2437: 2438: for (j = 0; j < n_clobbers; j++) 2439: if (operands_match_p (clobber_reg[j], operands[i])) 2440: break; 2441: 2442: if (j < n_clobbers || operand_matches[i] >= 0) 2443: { 2444: /* operands[i] might not be at the top of stack. But that's OK, 2445: because all we need to do is pop the right number of regs 2446: off of the top of the reg-stack. record_asm_stack_regs 2447: guaranteed that all implicitly popped regs were grouped 2448: at the top of the reg-stack. */ 2449: 2450: CLEAR_HARD_REG_BIT (regstack->reg_set, 2451: regstack->reg[regstack->top]); 2452: regstack->top--; 2453: } 2454: } 2455: 2456: /* Now add to REGSTACK any outputs that the asm implicitly pushed. 2457: Note that there isn't any need to substitute register numbers. 2458: ??? Explain why this is true. */ 2459: 2460: for (i = LAST_STACK_REG; i >= FIRST_STACK_REG; i--) 2461: { 2462: /* See if there is an output for this hard reg. */ 2463: int j; 2464: 2465: for (j = 0; j < n_outputs; j++) 2466: if (STACK_REG_P (operands[j]) && REGNO (operands[j]) == i) 2467: { 2468: regstack->reg[++regstack->top] = i; 2469: SET_HARD_REG_BIT (regstack->reg_set, i); 2470: break; 2471: } 2472: } 2473: 2474: /* Now emit a pop insn for any REG_UNUSED output, or any REG_DEAD 2475: input that the asm didn't implicitly pop. If the asm didn't 1.1.1.2 root 2476: implicitly pop an input reg, that reg will still be live. 1.1 root 2477: 2478: Note that we can't use find_regno_note here: the register numbers 2479: in the death notes have already been substituted. */ 2480: 1.1.1.2 root 2481: for (i = 0; i < n_outputs; i++) 2482: if (STACK_REG_P (operands[i])) 2483: { 2484: int j; 2485: 2486: for (j = 0; j < n_notes; j++) 2487: if (REGNO (operands[i]) == REGNO (note_reg[j]) 2488: && note_kind[j] == REG_UNUSED) 2489: { 2490: insn = emit_pop_insn (insn, regstack, operands[i], 2491: emit_insn_after); 2492: break; 2493: } 2494: } 2495: 2496: for (i = first_input; i < first_input + n_inputs; i++) 1.1 root 2497: if (STACK_REG_P (operands[i])) 2498: { 2499: int j; 2500: 2501: for (j = 0; j < n_notes; j++) 2502: if (REGNO (operands[i]) == REGNO (note_reg[j]) 1.1.1.2 root 2503: && note_kind[j] == REG_DEAD 2504: && TEST_HARD_REG_BIT (regstack->reg_set, REGNO (operands[i]))) 1.1 root 2505: { 2506: insn = emit_pop_insn (insn, regstack, operands[i], 2507: emit_insn_after); 2508: break; 2509: } 2510: } 2511: } 2512: 2513: /* Substitute stack hard reg numbers for stack virtual registers in 2514: INSN. Non-stack register numbers are not changed. REGSTACK is the 2515: current stack content. Insns may be emitted as needed to arrange the 2516: stack for the 387 based on the contents of the insn. */ 2517: 2518: static void 2519: subst_stack_regs (insn, regstack) 2520: rtx insn; 2521: stack regstack; 2522: { 2523: register rtx *note_link, note; 2524: register int i; 2525: int n_operands; 2526: 2527: if ((GET_CODE (insn) != INSN && GET_CODE (insn) != CALL_INSN) 2528: || INSN_DELETED_P (insn)) 2529: return; 2530: 2531: /* The stack should be empty at a call. */ 2532: 2533: if (GET_CODE (insn) == CALL_INSN) 2534: for (i = FIRST_STACK_REG; i <= LAST_STACK_REG; i++) 2535: if (TEST_HARD_REG_BIT (regstack->reg_set, i)) 2536: abort (); 2537: 2538: /* Do the actual substitution if any stack regs are mentioned. 2539: Since we only record whether entire insn mentions stack regs, and 2540: subst_stack_regs_pat only works for patterns that contain stack regs, 2541: we must check each pattern in a parallel here. A call_value_pop could 2542: fail otherwise. */ 2543: 2544: if (GET_MODE (insn) == QImode) 2545: { 2546: n_operands = asm_noperands (PATTERN (insn)); 2547: if (n_operands >= 0) 2548: { 2549: /* This insn is an `asm' with operands. Decode the operands, 2550: decide how many are inputs, and do register substitution. 2551: Any REG_UNUSED notes will be handled by subst_asm_stack_regs. */ 2552: 2553: rtx operands[MAX_RECOG_OPERANDS]; 2554: rtx *operands_loc[MAX_RECOG_OPERANDS]; 2555: rtx body = PATTERN (insn); 2556: int n_inputs, n_outputs; 2557: char **constraints 2558: = (char **) alloca (n_operands * sizeof (char *)); 2559: 1.1.1.4 root 2560: decode_asm_operands (body, operands, operands_loc, 2561: constraints, NULL_PTR); 1.1 root 2562: get_asm_operand_lengths (body, n_operands, &n_inputs, &n_outputs); 2563: subst_asm_stack_regs (insn, regstack, operands, operands_loc, 2564: constraints, n_inputs, n_outputs); 2565: return; 2566: } 2567: 2568: if (GET_CODE (PATTERN (insn)) == PARALLEL) 1.1.1.4 root 2569: for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++) 1.1 root 2570: { 2571: if (stack_regs_mentioned_p (XVECEXP (PATTERN (insn), 0, i))) 2572: subst_stack_regs_pat (insn, regstack, 2573: XVECEXP (PATTERN (insn), 0, i)); 2574: } 2575: else 2576: subst_stack_regs_pat (insn, regstack, PATTERN (insn)); 2577: } 2578: 2579: /* subst_stack_regs_pat may have deleted a no-op insn. If so, any 2580: REG_UNUSED will already have been dealt with, so just return. */ 2581: 1.1.1.7 ! root 2582: if (GET_CODE (insn) == NOTE) 1.1 root 2583: return; 2584: 2585: /* If there is a REG_UNUSED note on a stack register on this insn, 2586: the indicated reg must be popped. The REG_UNUSED note is removed, 2587: since the form of the newly emitted pop insn references the reg, 2588: making it no longer `unset'. */ 2589: 2590: note_link = ®_NOTES(insn); 2591: for (note = *note_link; note; note = XEXP (note, 1)) 2592: if (REG_NOTE_KIND (note) == REG_UNUSED && STACK_REG_P (XEXP (note, 0))) 2593: { 2594: *note_link = XEXP (note, 1); 2595: insn = emit_pop_insn (insn, regstack, XEXP (note, 0), emit_insn_after); 2596: } 2597: else 2598: note_link = &XEXP (note, 1); 2599: } 2600: 2601: /* Change the organization of the stack so that it fits a new basic 2602: block. Some registers might have to be popped, but there can never be 2603: a register live in the new block that is not now live. 2604: 2605: Insert any needed insns before or after INSN. WHEN is emit_insn_before 2606: or emit_insn_after. OLD is the original stack layout, and NEW is 2607: the desired form. OLD is updated to reflect the code emitted, ie, it 2608: will be the same as NEW upon return. 2609: 2610: This function will not preserve block_end[]. But that information 2611: is no longer needed once this has executed. */ 2612: 2613: static void 2614: change_stack (insn, old, new, when) 2615: rtx insn; 2616: stack old; 2617: stack new; 2618: rtx (*when)(); 2619: { 2620: int reg; 2621: 2622: /* We will be inserting new insns "backwards", by calling emit_insn_before. 2623: If we are to insert after INSN, find the next insn, and insert before 2624: it. */ 2625: 2626: if (when == emit_insn_after) 2627: insn = NEXT_INSN (insn); 2628: 2629: /* Pop any registers that are not needed in the new block. */ 2630: 2631: for (reg = old->top; reg >= 0; reg--) 2632: if (! TEST_HARD_REG_BIT (new->reg_set, old->reg[reg])) 2633: emit_pop_insn (insn, old, FP_mode_reg[old->reg[reg]][(int) DFmode], 2634: emit_insn_before); 2635: 2636: if (new->top == -2) 2637: { 2638: /* If the new block has never been processed, then it can inherit 2639: the old stack order. */ 2640: 2641: new->top = old->top; 2642: bcopy (old->reg, new->reg, sizeof (new->reg)); 2643: } 2644: else 2645: { 2646: /* This block has been entered before, and we must match the 2647: previously selected stack order. */ 2648: 2649: /* By now, the only difference should be the order of the stack, 2650: not their depth or liveliness. */ 2651: 2652: GO_IF_HARD_REG_EQUAL (old->reg_set, new->reg_set, win); 2653: 2654: abort (); 2655: 2656: win: 2657: 2658: if (old->top != new->top) 2659: abort (); 2660: 2661: /* Loop here emitting swaps until the stack is correct. The 2662: worst case number of swaps emitted is N + 2, where N is the 2663: depth of the stack. In some cases, the reg at the top of 2664: stack may be correct, but swapped anyway in order to fix 2665: other regs. But since we never swap any other reg away from 2666: its correct slot, this algorithm will converge. */ 2667: 2668: do 2669: { 2670: /* Swap the reg at top of stack into the position it is 2671: supposed to be in, until the correct top of stack appears. */ 2672: 2673: while (old->reg[old->top] != new->reg[new->top]) 2674: { 2675: for (reg = new->top; reg >= 0; reg--) 2676: if (new->reg[reg] == old->reg[old->top]) 2677: break; 2678: 2679: if (reg == -1) 2680: abort (); 2681: 2682: emit_swap_insn (insn, old, 1.1.1.5 root 2683: FP_mode_reg[old->reg[reg]][(int) DFmode]); 1.1 root 2684: } 2685: 2686: /* See if any regs remain incorrect. If so, bring an 2687: incorrect reg to the top of stack, and let the while loop 2688: above fix it. */ 2689: 2690: for (reg = new->top; reg >= 0; reg--) 2691: if (new->reg[reg] != old->reg[reg]) 2692: { 2693: emit_swap_insn (insn, old, 1.1.1.5 root 2694: FP_mode_reg[old->reg[reg]][(int) DFmode]); 1.1 root 2695: break; 2696: } 2697: } while (reg >= 0); 2698: 2699: /* At this point there must be no differences. */ 2700: 2701: for (reg = old->top; reg >= 0; reg--) 2702: if (old->reg[reg] != new->reg[reg]) 2703: abort (); 2704: } 2705: } 2706: 2707: /* Check PAT, which points to RTL in INSN, for a LABEL_REF. If it is 2708: found, ensure that a jump from INSN to the code_label to which the 2709: label_ref points ends up with the same stack as that at the 2710: code_label. Do this by inserting insns just before the code_label to 2711: pop and rotate the stack until it is in the correct order. REGSTACK 2712: is the order of the register stack in INSN. 2713: 2714: Any code that is emitted here must not be later processed as part 2715: of any block, as it will already contain hard register numbers. */ 2716: 2717: static void 2718: goto_block_pat (insn, regstack, pat) 2719: rtx insn; 2720: stack regstack; 2721: rtx pat; 2722: { 2723: rtx label; 2724: rtx new_jump, new_label, new_barrier; 2725: rtx *ref; 2726: stack label_stack; 2727: struct stack_def temp_stack; 2728: int reg; 2729: 2730: if (GET_CODE (pat) != LABEL_REF) 2731: { 2732: int i, j; 2733: char *fmt = GET_RTX_FORMAT (GET_CODE (pat)); 2734: 2735: for (i = GET_RTX_LENGTH (GET_CODE (pat)) - 1; i >= 0; i--) 2736: { 2737: if (fmt[i] == 'e') 2738: goto_block_pat (insn, regstack, XEXP (pat, i)); 2739: if (fmt[i] == 'E') 2740: for (j = 0; j < XVECLEN (pat, i); j++) 2741: goto_block_pat (insn, regstack, XVECEXP (pat, i, j)); 2742: } 2743: return; 2744: } 2745: 2746: label = XEXP (pat, 0); 2747: if (GET_CODE (label) != CODE_LABEL) 2748: abort (); 2749: 2750: /* First, see if in fact anything needs to be done to the stack at all. */ 1.1.1.7 ! root 2751: if (INSN_UID (label) <= 0) ! 2752: return; 1.1 root 2753: 2754: label_stack = &block_stack_in[BLOCK_NUM (label)]; 2755: 2756: if (label_stack->top == -2) 2757: { 2758: /* If the target block hasn't had a stack order selected, then 2759: we need merely ensure that no pops are needed. */ 2760: 2761: for (reg = regstack->top; reg >= 0; reg--) 2762: if (! TEST_HARD_REG_BIT (label_stack->reg_set, regstack->reg[reg])) 2763: break; 2764: 2765: if (reg == -1) 2766: { 2767: /* change_stack will not emit any code in this case. */ 2768: 2769: change_stack (label, regstack, label_stack, emit_insn_after); 2770: return; 2771: } 2772: } 2773: else if (label_stack->top == regstack->top) 2774: { 2775: for (reg = label_stack->top; reg >= 0; reg--) 2776: if (label_stack->reg[reg] != regstack->reg[reg]) 2777: break; 2778: 2779: if (reg == -1) 2780: return; 2781: } 2782: 2783: /* At least one insn will need to be inserted before label. Insert 2784: a jump around the code we are about to emit. Emit a label for the new 2785: code, and point the original insn at this new label. We can't use 2786: redirect_jump here, because we're using fld[4] of the code labels as 2787: LABEL_REF chains, no NUSES counters. */ 2788: 2789: new_jump = emit_jump_insn_before (gen_jump (label), label); 2790: record_label_references (new_jump, PATTERN (new_jump)); 2791: JUMP_LABEL (new_jump) = label; 2792: 2793: new_barrier = emit_barrier_after (new_jump); 2794: 2795: new_label = gen_label_rtx (); 2796: emit_label_after (new_label, new_barrier); 2797: LABEL_REFS (new_label) = new_label; 2798: 2799: /* The old label_ref will no longer point to the code_label if now uses, 2800: so strip the label_ref from the code_label's chain of references. */ 2801: 2802: for (ref = &LABEL_REFS (label); *ref != label; ref = &LABEL_NEXTREF (*ref)) 2803: if (*ref == pat) 2804: break; 2805: 2806: if (*ref == label) 2807: abort (); 2808: 2809: *ref = LABEL_NEXTREF (*ref); 2810: 2811: XEXP (pat, 0) = new_label; 2812: record_label_references (insn, PATTERN (insn)); 2813: 2814: if (JUMP_LABEL (insn) == label) 2815: JUMP_LABEL (insn) = new_label; 2816: 2817: /* Now emit the needed code. */ 2818: 2819: temp_stack = *regstack; 2820: 2821: change_stack (new_label, &temp_stack, label_stack, emit_insn_after); 2822: } 2823: 2824: /* Traverse all basic blocks in a function, converting the register 1.1.1.2 root 2825: references in each insn from the "flat" register file that gcc uses, to 1.1 root 2826: the stack-like registers the 387 uses. */ 2827: 2828: static void 2829: convert_regs () 2830: { 2831: register int block, reg; 2832: register rtx insn, next; 2833: struct stack_def regstack; 2834: 2835: for (block = 0; block < blocks; block++) 2836: { 2837: if (block_stack_in[block].top == -2) 2838: { 2839: /* This block has not been previously encountered. Choose a 2840: default mapping for any stack regs live on entry */ 2841: 2842: block_stack_in[block].top = -1; 2843: 2844: for (reg = LAST_STACK_REG; reg >= FIRST_STACK_REG; reg--) 2845: if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, reg)) 2846: block_stack_in[block].reg[++block_stack_in[block].top] = reg; 2847: } 2848: 2849: /* Process all insns in this block. Keep track of `next' here, 2850: so that we don't process any insns emitted while making 2851: substitutions in INSN. */ 2852: 2853: next = block_begin[block]; 2854: regstack = block_stack_in[block]; 2855: do 2856: { 2857: insn = next; 2858: next = NEXT_INSN (insn); 2859: 2860: /* Don't bother processing unless there is a stack reg 2861: mentioned. 2862: 2863: ??? For now, process CALL_INSNs too to make sure that the 2864: stack regs are dead after a call. Remove this eventually. */ 2865: 2866: if (GET_MODE (insn) == QImode || GET_CODE (insn) == CALL_INSN) 2867: subst_stack_regs (insn, ®stack); 2868: 2869: } while (insn != block_end[block]); 2870: 2871: /* Something failed if the stack life doesn't match. */ 2872: 2873: GO_IF_HARD_REG_EQUAL (regstack.reg_set, block_out_reg_set[block], win); 2874: 2875: abort (); 2876: 2877: win: 2878: 2879: /* Adjust the stack of this block on exit to match the stack of 2880: the target block, or copy stack information into stack of 2881: jump target if the target block's stack order hasn't been set 2882: yet. */ 2883: 2884: if (GET_CODE (insn) == JUMP_INSN) 2885: goto_block_pat (insn, ®stack, PATTERN (insn)); 2886: 2887: /* Likewise handle the case where we fall into the next block. */ 2888: 2889: if ((block < blocks - 1) && block_drops_in[block+1]) 2890: change_stack (insn, ®stack, &block_stack_in[block+1], 2891: emit_insn_after); 2892: } 2893: 2894: /* If the last basic block is the end of a loop, and that loop has 2895: regs live at its start, then the last basic block will have regs live 2896: at its end that need to be popped before the function returns. */ 2897: 2898: for (reg = regstack.top; reg >= 0; reg--) 2899: if (! current_function_returns_real 2900: || regstack.reg[reg] != FIRST_STACK_REG) 2901: insn = emit_pop_insn (insn, ®stack, 2902: FP_mode_reg[regstack.reg[reg]][(int) DFmode], 2903: emit_insn_after); 2904: } 2905: 2906: /* Check expression PAT, which is in INSN, for label references. if 2907: one is found, print the block number of destination to FILE. */ 2908: 2909: static void 2910: print_blocks (file, insn, pat) 2911: FILE *file; 2912: rtx insn, pat; 2913: { 2914: register RTX_CODE code = GET_CODE (pat); 2915: register int i; 2916: register char *fmt; 2917: 2918: if (code == LABEL_REF) 2919: { 2920: register rtx label = XEXP (pat, 0); 2921: 2922: if (GET_CODE (label) != CODE_LABEL) 2923: abort (); 2924: 2925: fprintf (file, " %d", BLOCK_NUM (label)); 2926: 2927: return; 2928: } 2929: 2930: fmt = GET_RTX_FORMAT (code); 2931: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 2932: { 2933: if (fmt[i] == 'e') 2934: print_blocks (file, insn, XEXP (pat, i)); 2935: if (fmt[i] == 'E') 2936: { 2937: register int j; 2938: for (j = 0; j < XVECLEN (pat, i); j++) 2939: print_blocks (file, insn, XVECEXP (pat, i, j)); 2940: } 2941: } 2942: } 2943: 2944: /* Write information about stack registers and stack blocks into FILE. 2945: This is part of making a debugging dump. */ 2946: static void 2947: dump_stack_info (file) 2948: FILE *file; 2949: { 2950: register int block; 2951: 2952: fprintf (file, "\n%d stack blocks.\n", blocks); 2953: for (block = 0; block < blocks; block++) 2954: { 2955: register rtx head, jump, end; 2956: register int regno; 2957: 2958: fprintf (file, "\nStack block %d: first insn %d, last %d.\n", 2959: block, INSN_UID (block_begin[block]), 2960: INSN_UID (block_end[block])); 2961: 2962: head = block_begin[block]; 2963: 2964: fprintf (file, "Reached from blocks: "); 2965: if (GET_CODE (head) == CODE_LABEL) 2966: for (jump = LABEL_REFS (head); 2967: jump != head; 2968: jump = LABEL_NEXTREF (jump)) 2969: { 2970: register int from_block = BLOCK_NUM (CONTAINING_INSN (jump)); 2971: fprintf (file, " %d", from_block); 2972: } 2973: if (block_drops_in[block]) 2974: fprintf (file, " previous"); 2975: 2976: fprintf (file, "\nlive stack registers on block entry: "); 2977: for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++) 2978: { 2979: if (TEST_HARD_REG_BIT (block_stack_in[block].reg_set, regno)) 2980: fprintf (file, "%d ", regno); 2981: } 2982: 2983: fprintf (file, "\nlive stack registers on block exit: "); 2984: for (regno = FIRST_STACK_REG; regno <= LAST_STACK_REG ; regno++) 2985: { 2986: if (TEST_HARD_REG_BIT (block_out_reg_set[block], regno)) 2987: fprintf (file, "%d ", regno); 2988: } 2989: 2990: end = block_end[block]; 2991: 2992: fprintf (file, "\nJumps to blocks: "); 2993: if (GET_CODE (end) == JUMP_INSN) 2994: print_blocks (file, end, PATTERN (end)); 2995: 2996: if (block + 1 < blocks && block_drops_in[block+1]) 2997: fprintf (file, " next"); 2998: else if (block + 1 == blocks 2999: || (GET_CODE (end) == JUMP_INSN 3000: && GET_CODE (PATTERN (end)) == RETURN)) 3001: fprintf (file, " return"); 3002: 3003: fprintf (file, "\n"); 3004: } 3005: } 3006: #endif /* STACK_REGS */
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