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1.1 root 1: /* Compute register class preferences for pseudo-registers. 1.1.1.4 ! root 2: Copyright (C) 1987, 1988, 1991, 1992 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: /* This file contains two passes of the compiler: reg_scan and reg_class. 22: It also defines some tables of information about the hardware registers 23: and a function init_reg_sets to initialize the tables. */ 24: 25: #include "config.h" 26: #include "rtl.h" 27: #include "hard-reg-set.h" 28: #include "flags.h" 29: #include "basic-block.h" 30: #include "regs.h" 31: #include "insn-config.h" 32: #include "recog.h" 1.1.1.4 ! root 33: #include "reload.h" ! 34: #include "real.h" 1.1 root 35: 36: #ifndef REGISTER_MOVE_COST 37: #define REGISTER_MOVE_COST(x, y) 2 38: #endif 39: 40: #ifndef MEMORY_MOVE_COST 1.1.1.4 ! root 41: #define MEMORY_MOVE_COST(x) 4 ! 42: #endif ! 43: ! 44: /* If we have auto-increment or auto-decrement and we can have secondary ! 45: reloads, we are not allowed to use classes requiring secondary ! 46: reloads for psuedos auto-incremented since reload can't handle it. */ ! 47: ! 48: #ifdef AUTO_INC_DEC ! 49: #if defined(SECONDARY_INPUT_RELOAD_CLASS) || defined(SECONDARY_OUTPUT_RELOAD_CLASS) ! 50: #define FORBIDDEN_INC_DEC_CLASSES ! 51: #endif 1.1 root 52: #endif 53: 54: /* Register tables used by many passes. */ 55: 56: /* Indexed by hard register number, contains 1 for registers 57: that are fixed use (stack pointer, pc, frame pointer, etc.). 58: These are the registers that cannot be used to allocate 59: a pseudo reg whose life does not cross calls. */ 60: 61: char fixed_regs[FIRST_PSEUDO_REGISTER]; 62: 63: /* Same info as a HARD_REG_SET. */ 64: 65: HARD_REG_SET fixed_reg_set; 66: 67: /* Data for initializing the above. */ 68: 69: static char initial_fixed_regs[] = FIXED_REGISTERS; 70: 71: /* Indexed by hard register number, contains 1 for registers 72: that are fixed use or are clobbered by function calls. 73: These are the registers that cannot be used to allocate 74: a pseudo reg whose life crosses calls. */ 75: 76: char call_used_regs[FIRST_PSEUDO_REGISTER]; 77: 78: /* Same info as a HARD_REG_SET. */ 79: 80: HARD_REG_SET call_used_reg_set; 81: 82: /* Data for initializing the above. */ 83: 84: static char initial_call_used_regs[] = CALL_USED_REGISTERS; 85: 86: /* Indexed by hard register number, contains 1 for registers that are 87: fixed use -- i.e. in fixed_regs -- or a function value return register 88: or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the 89: registers that cannot hold quantities across calls even if we are 90: willing to save and restore them. */ 91: 92: char call_fixed_regs[FIRST_PSEUDO_REGISTER]; 93: 94: /* The same info as a HARD_REG_SET. */ 95: 96: HARD_REG_SET call_fixed_reg_set; 97: 98: /* Number of non-fixed registers. */ 99: 100: int n_non_fixed_regs; 101: 102: /* Indexed by hard register number, contains 1 for registers 103: that are being used for global register decls. 104: These must be exempt from ordinary flow analysis 105: and are also considered fixed. */ 106: 107: char global_regs[FIRST_PSEUDO_REGISTER]; 108: 109: /* Table of register numbers in the order in which to try to use them. */ 110: #ifdef REG_ALLOC_ORDER 111: int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; 112: #endif 113: 114: /* For each reg class, a HARD_REG_SET saying which registers are in it. */ 115: 1.1.1.4 ! root 116: HARD_REG_SET reg_class_contents[N_REG_CLASSES]; ! 117: ! 118: /* The same information, but as an array of ints. We copy from these ! 119: ints to the table above. This is done so that the tm.h files do ! 120: not have to be aware of the wordsize for machines with <= 64 regs. */ ! 121: ! 122: #define N_REG_INTS \ ! 123: ((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT) ! 124: ! 125: static int int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] ! 126: = REG_CLASS_CONTENTS; 1.1 root 127: 128: /* For each reg class, number of regs it contains. */ 129: 130: int reg_class_size[N_REG_CLASSES]; 131: 132: /* For each reg class, table listing all the containing classes. */ 133: 134: enum reg_class reg_class_superclasses[N_REG_CLASSES][N_REG_CLASSES]; 135: 136: /* For each reg class, table listing all the classes contained in it. */ 137: 138: enum reg_class reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES]; 139: 140: /* For each pair of reg classes, 141: a largest reg class contained in their union. */ 142: 143: enum reg_class reg_class_subunion[N_REG_CLASSES][N_REG_CLASSES]; 144: 145: /* For each pair of reg classes, 146: the smallest reg class containing their union. */ 147: 148: enum reg_class reg_class_superunion[N_REG_CLASSES][N_REG_CLASSES]; 149: 150: /* Array containing all of the register names */ 151: 152: char *reg_names[] = REGISTER_NAMES; 153: 154: /* Indexed by n, gives number of times (REG n) is set or clobbered. 155: This information remains valid for the rest of the compilation 156: of the current function; it is used to control register allocation. 157: 158: This information applies to both hard registers and pseudo registers, 159: unlike much of the information above. */ 160: 161: short *reg_n_sets; 162: 1.1.1.4 ! root 163: /* Maximum cost of moving from a register in one class to a register in ! 164: another class. Based on REGISTER_MOVE_COST. */ ! 165: ! 166: static int move_cost[N_REG_CLASSES][N_REG_CLASSES]; ! 167: ! 168: /* Similar, but here we don't have to move if the first index is a subset ! 169: of the second so in that case the cost is zero. */ ! 170: ! 171: static int may_move_cost[N_REG_CLASSES][N_REG_CLASSES]; ! 172: ! 173: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 174: ! 175: /* These are the classes that regs which are auto-incremented or decremented ! 176: cannot be put in. */ ! 177: ! 178: static int forbidden_inc_dec_class[N_REG_CLASSES]; ! 179: ! 180: /* Indexed by n, is non-zero if (REG n) is used in an auto-inc or auto-dec ! 181: context. */ ! 182: ! 183: static char *in_inc_dec; ! 184: ! 185: #endif /* FORBIDDEN_INC_DEC_CLASSES */ ! 186: 1.1 root 187: /* Function called only once to initialize the above data on reg usage. 188: Once this is done, various switches may override. */ 189: 190: void 191: init_reg_sets () 192: { 193: register int i, j; 194: 1.1.1.4 ! root 195: /* First copy the register information from the initial int form into ! 196: the regsets. */ ! 197: ! 198: for (i = 0; i < N_REG_CLASSES; i++) ! 199: { ! 200: CLEAR_HARD_REG_SET (reg_class_contents[i]); ! 201: ! 202: for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) ! 203: if (int_reg_class_contents[i][j / HOST_BITS_PER_INT] ! 204: & (1 << (j % HOST_BITS_PER_INT))) ! 205: SET_HARD_REG_BIT (reg_class_contents[i], j); ! 206: } ! 207: 1.1 root 208: bcopy (initial_fixed_regs, fixed_regs, sizeof fixed_regs); 209: bcopy (initial_call_used_regs, call_used_regs, sizeof call_used_regs); 210: bzero (global_regs, sizeof global_regs); 211: 212: /* Compute number of hard regs in each class. */ 213: 214: bzero (reg_class_size, sizeof reg_class_size); 215: for (i = 0; i < N_REG_CLASSES; i++) 216: for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) 217: if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) 218: reg_class_size[i]++; 219: 220: /* Initialize the table of subunions. 221: reg_class_subunion[I][J] gets the largest-numbered reg-class 222: that is contained in the union of classes I and J. */ 223: 224: for (i = 0; i < N_REG_CLASSES; i++) 225: { 226: for (j = 0; j < N_REG_CLASSES; j++) 227: { 228: #ifdef HARD_REG_SET 229: register /* Declare it register if it's a scalar. */ 230: #endif 231: HARD_REG_SET c; 232: register int k; 233: 234: COPY_HARD_REG_SET (c, reg_class_contents[i]); 235: IOR_HARD_REG_SET (c, reg_class_contents[j]); 236: for (k = 0; k < N_REG_CLASSES; k++) 237: { 238: GO_IF_HARD_REG_SUBSET (reg_class_contents[k], c, 239: subclass1); 240: continue; 241: 242: subclass1: 243: /* keep the largest subclass */ /* SPEE 900308 */ 244: GO_IF_HARD_REG_SUBSET (reg_class_contents[k], 245: reg_class_contents[(int) reg_class_subunion[i][j]], 246: subclass2); 247: reg_class_subunion[i][j] = (enum reg_class) k; 248: subclass2: 249: ; 250: } 251: } 252: } 253: 254: /* Initialize the table of superunions. 255: reg_class_superunion[I][J] gets the smallest-numbered reg-class 256: containing the union of classes I and J. */ 257: 258: for (i = 0; i < N_REG_CLASSES; i++) 259: { 260: for (j = 0; j < N_REG_CLASSES; j++) 261: { 262: #ifdef HARD_REG_SET 263: register /* Declare it register if it's a scalar. */ 264: #endif 265: HARD_REG_SET c; 266: register int k; 267: 268: COPY_HARD_REG_SET (c, reg_class_contents[i]); 269: IOR_HARD_REG_SET (c, reg_class_contents[j]); 270: for (k = 0; k < N_REG_CLASSES; k++) 271: GO_IF_HARD_REG_SUBSET (c, reg_class_contents[k], superclass); 272: 273: superclass: 274: reg_class_superunion[i][j] = (enum reg_class) k; 275: } 276: } 277: 278: /* Initialize the tables of subclasses and superclasses of each reg class. 279: First clear the whole table, then add the elements as they are found. */ 280: 281: for (i = 0; i < N_REG_CLASSES; i++) 282: { 283: for (j = 0; j < N_REG_CLASSES; j++) 284: { 285: reg_class_superclasses[i][j] = LIM_REG_CLASSES; 286: reg_class_subclasses[i][j] = LIM_REG_CLASSES; 287: } 288: } 289: 290: for (i = 0; i < N_REG_CLASSES; i++) 291: { 292: if (i == (int) NO_REGS) 293: continue; 294: 295: for (j = i + 1; j < N_REG_CLASSES; j++) 296: { 297: enum reg_class *p; 298: 299: GO_IF_HARD_REG_SUBSET (reg_class_contents[i], reg_class_contents[j], 300: subclass); 301: continue; 302: subclass: 303: /* Reg class I is a subclass of J. 304: Add J to the table of superclasses of I. */ 305: p = ®_class_superclasses[i][0]; 306: while (*p != LIM_REG_CLASSES) p++; 307: *p = (enum reg_class) j; 308: /* Add I to the table of superclasses of J. */ 309: p = ®_class_subclasses[j][0]; 310: while (*p != LIM_REG_CLASSES) p++; 311: *p = (enum reg_class) i; 312: } 313: } 1.1.1.4 ! root 314: ! 315: /* Initialize the move cost table. Find every subset of each class ! 316: and take the maximum cost of moving any subset to any other. */ ! 317: ! 318: for (i = 0; i < N_REG_CLASSES; i++) ! 319: for (j = 0; j < N_REG_CLASSES; j++) ! 320: { ! 321: int cost = i == j ? 2 : REGISTER_MOVE_COST (i, j); ! 322: enum reg_class *p1, *p2; ! 323: ! 324: for (p2 = ®_class_subclasses[j][0]; *p2 != LIM_REG_CLASSES; p2++) ! 325: if (*p2 != i) ! 326: cost = MAX (cost, REGISTER_MOVE_COST (i, *p2)); ! 327: ! 328: for (p1 = ®_class_subclasses[i][0]; *p1 != LIM_REG_CLASSES; p1++) ! 329: { ! 330: if (*p1 != j) ! 331: cost = MAX (cost, REGISTER_MOVE_COST (*p1, j)); ! 332: ! 333: for (p2 = ®_class_subclasses[j][0]; ! 334: *p2 != LIM_REG_CLASSES; p2++) ! 335: if (*p1 != *p2) ! 336: cost = MAX (cost, REGISTER_MOVE_COST (*p1, *p2)); ! 337: } ! 338: ! 339: move_cost[i][j] = cost; ! 340: ! 341: if (reg_class_subset_p (i, j)) ! 342: cost = 0; ! 343: ! 344: may_move_cost[i][j] = cost; ! 345: } 1.1 root 346: } 347: 348: /* After switches have been processed, which perhaps alter 349: `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */ 350: 351: void 352: init_reg_sets_1 () 353: { 354: register int i; 355: 356: /* This macro allows the fixed or call-used registers 357: to depend on target flags. */ 358: 359: #ifdef CONDITIONAL_REGISTER_USAGE 360: CONDITIONAL_REGISTER_USAGE; 361: #endif 362: 363: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 364: if (global_regs[i]) 365: { 366: if (call_used_regs[i] && ! fixed_regs[i]) 367: warning ("call-clobbered register used for global register variable"); 368: fixed_regs[i] = 1; 369: /* Prevent saving/restoring of this reg. */ 370: call_used_regs[i] = 1; 371: } 372: 373: /* Initialize "constant" tables. */ 374: 375: CLEAR_HARD_REG_SET (fixed_reg_set); 376: CLEAR_HARD_REG_SET (call_used_reg_set); 377: CLEAR_HARD_REG_SET (call_fixed_reg_set); 378: 379: bcopy (fixed_regs, call_fixed_regs, sizeof call_fixed_regs); 380: #ifdef STRUCT_VALUE_REGNUM 381: call_fixed_regs[STRUCT_VALUE_REGNUM] = 1; 382: #endif 383: #ifdef STATIC_CHAIN_REGNUM 384: call_fixed_regs[STATIC_CHAIN_REGNUM] = 1; 385: #endif 386: 387: n_non_fixed_regs = 0; 388: 389: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 390: { 391: if (FUNCTION_VALUE_REGNO_P (i)) 392: call_fixed_regs[i] = 1; 393: if (fixed_regs[i]) 394: SET_HARD_REG_BIT (fixed_reg_set, i); 395: else 396: n_non_fixed_regs++; 397: 398: if (call_used_regs[i]) 399: SET_HARD_REG_BIT (call_used_reg_set, i); 400: if (call_fixed_regs[i]) 401: SET_HARD_REG_BIT (call_fixed_reg_set, i); 402: } 403: } 404: 405: /* Specify the usage characteristics of the register named NAME. 406: It should be a fixed register if FIXED and a 407: call-used register if CALL_USED. */ 408: 409: void 410: fix_register (name, fixed, call_used) 411: char *name; 412: int fixed, call_used; 413: { 414: int i; 415: 416: /* Decode the name and update the primary form of 417: the register info. */ 418: 1.1.1.2 root 419: if ((i = decode_reg_name (name)) >= 0) 420: { 421: fixed_regs[i] = fixed; 422: call_used_regs[i] = call_used; 423: } 424: else 1.1 root 425: { 426: warning ("unknown register name: %s", name); 427: } 428: } 429: 430: /* Now the data and code for the `regclass' pass, which happens 431: just before local-alloc. */ 432: 1.1.1.4 ! root 433: /* The `costs' struct records the cost of using a hard register of each class ! 434: and of using memory for each pseudo. We use this data to set up ! 435: register class preferences. */ 1.1 root 436: 1.1.1.4 ! root 437: struct costs 1.1 root 438: { 1.1.1.4 ! root 439: int cost[N_REG_CLASSES]; ! 440: int mem_cost; 1.1 root 441: }; 442: 1.1.1.4 ! root 443: /* Record the cost of each class for each pseudo. */ ! 444: ! 445: static struct costs *costs; ! 446: ! 447: /* Record the same data by operand number, accumulated for each alternative ! 448: in an insn. The contribution to a pseudo is that of the minimum-cost ! 449: alternative. */ ! 450: ! 451: static struct costs op_costs[MAX_RECOG_OPERANDS]; 1.1 root 452: 453: /* (enum reg_class) prefclass[R] is the preferred class for pseudo number R. 454: This is available after `regclass' is run. */ 455: 456: static char *prefclass; 457: 1.1.1.4 ! root 458: /* altclass[R] is a register class that we should use for allocating ! 459: pseudo number R if no register in the preferred class is available. ! 460: If no register in this class is available, memory is preferred. ! 461: ! 462: It might appear to be more general to have a bitmask of classes here, ! 463: but since it is recommended that there be a class corresponding to the ! 464: union of most major pair of classes, that generality is not required. ! 465: 1.1 root 466: This is available after `regclass' is run. */ 467: 1.1.1.4 ! root 468: static char *altclass; 1.1 root 469: 1.1.1.4 ! root 470: /* Record the depth of loops that we are in. */ 1.1 root 471: 472: static int loop_depth; 473: 1.1.1.4 ! root 474: /* Account for the fact that insns within a loop are executed very commonly, ! 475: but don't keep doing this as loops go too deep. */ ! 476: ! 477: static int loop_cost; ! 478: ! 479: static int copy_cost (); ! 480: static void record_reg_classes (); ! 481: static void record_address_regs (); 1.1 root 482: 483: 484: /* Return the reg_class in which pseudo reg number REGNO is best allocated. 485: This function is sometimes called before the info has been computed. 486: When that happens, just return GENERAL_REGS, which is innocuous. */ 487: 488: enum reg_class 489: reg_preferred_class (regno) 490: int regno; 491: { 492: if (prefclass == 0) 493: return GENERAL_REGS; 494: return (enum reg_class) prefclass[regno]; 495: } 496: 1.1.1.4 ! root 497: enum reg_class ! 498: reg_alternate_class (regno) 1.1 root 499: { 500: if (prefclass == 0) 1.1.1.4 ! root 501: return ALL_REGS; ! 502: ! 503: return (enum reg_class) altclass[regno]; 1.1 root 504: } 505: 506: /* This prevents dump_flow_info from losing if called 507: before regclass is run. */ 508: 509: void 510: regclass_init () 511: { 512: prefclass = 0; 513: } 514: 515: /* This is a pass of the compiler that scans all instructions 516: and calculates the preferred class for each pseudo-register. 517: This information can be accessed later by calling `reg_preferred_class'. 518: This pass comes just before local register allocation. */ 519: 520: void 521: regclass (f, nregs) 522: rtx f; 523: int nregs; 524: { 525: #ifdef REGISTER_CONSTRAINTS 526: register rtx insn; 1.1.1.4 ! root 527: register int i, j; ! 528: struct costs init_cost; ! 529: rtx set; ! 530: int pass; 1.1 root 531: 532: init_recog (); 533: 1.1.1.4 ! root 534: costs = (struct costs *) alloca (nregs * sizeof (struct costs)); 1.1 root 535: 1.1.1.4 ! root 536: #ifdef FORBIDDEN_INC_DEC_CLASSES 1.1 root 537: 1.1.1.4 ! root 538: in_inc_dec = (char *) alloca (nregs); 1.1 root 539: 1.1.1.4 ! root 540: /* Initialize information about which register classes can be used for ! 541: pseudos that are auto-incremented or auto-decremented. It would ! 542: seem better to put this in init_reg_sets, but we need to be able ! 543: to allocate rtx, which we can't do that early. */ 1.1 root 544: 1.1.1.4 ! root 545: for (i = 0; i < N_REG_CLASSES; i++) 1.1 root 546: { 1.1.1.4 ! root 547: rtx r = gen_rtx (REG, VOIDmode, 0); ! 548: enum machine_mode m; 1.1 root 549: 1.1.1.4 ! root 550: for (j = 0; j < FIRST_PSEUDO_REGISTER; j++) ! 551: if (TEST_HARD_REG_BIT (reg_class_contents[i], j)) ! 552: { ! 553: REGNO (r) = j; 1.1 root 554: 1.1.1.4 ! root 555: for (m = VOIDmode; (int) m < (int) MAX_MACHINE_MODE; ! 556: m = (enum machine_mode) ((int) m) + 1) ! 557: if (HARD_REGNO_MODE_OK (j, m)) ! 558: { ! 559: PUT_MODE (r, m); ! 560: if (0 ! 561: #ifdef SECONDARY_INPUT_RELOAD_CLASS ! 562: || (SECONDARY_INPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r) ! 563: != NO_REGS) ! 564: #endif ! 565: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS ! 566: || (SECONDARY_OUTPUT_RELOAD_CLASS (BASE_REG_CLASS, m, r) ! 567: != NO_REGS) ! 568: #endif ! 569: ) ! 570: forbidden_inc_dec_class[i] = 1; ! 571: } ! 572: } ! 573: } ! 574: #endif /* FORBIDDEN_INC_DEC_CLASSES */ 1.1 root 575: 1.1.1.4 ! root 576: init_cost.mem_cost = 10000; ! 577: for (i = 0; i < N_REG_CLASSES; i++) ! 578: init_cost.cost[i] = 10000; ! 579: ! 580: /* Normally we scan the insns once and determine the best class to use for ! 581: each register. However, if -fexpensive_optimizations are on, we do so ! 582: twice, the second time using the tentative best classes to guide the ! 583: selection. */ 1.1 root 584: 1.1.1.4 ! root 585: for (pass = 0; pass <= flag_expensive_optimizations; pass++) ! 586: { ! 587: /* Zero out our accumulation of the cost of each class for each reg. */ ! 588: ! 589: bzero (costs, nregs * sizeof (struct costs)); ! 590: ! 591: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 592: bzero (in_inc_dec, nregs); ! 593: #endif 1.1 root 594: 1.1.1.4 ! root 595: loop_depth = 0, loop_cost = 1; ! 596: ! 597: /* Scan the instructions and record each time it would ! 598: save code to put a certain register in a certain class. */ ! 599: ! 600: for (insn = f; insn; insn = NEXT_INSN (insn)) ! 601: { ! 602: char *constraints[MAX_RECOG_OPERANDS]; ! 603: enum machine_mode modes[MAX_RECOG_OPERANDS]; ! 604: int nalternatives; ! 605: int noperands; ! 606: ! 607: /* Show that an insn inside a loop is likely to be executed three ! 608: times more than insns outside a loop. This is much more agressive ! 609: than the assumptions made elsewhere and is being tried as an ! 610: experiment. */ ! 611: ! 612: if (GET_CODE (insn) == NOTE ! 613: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) ! 614: loop_depth++, loop_cost = 1 << (2 * MIN (loop_depth, 5)); ! 615: else if (GET_CODE (insn) == NOTE ! 616: && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END) ! 617: loop_depth--, loop_cost = 1 << (2 * MIN (loop_depth, 5)); ! 618: ! 619: else if ((GET_CODE (insn) == INSN ! 620: && GET_CODE (PATTERN (insn)) != USE ! 621: && GET_CODE (PATTERN (insn)) != CLOBBER ! 622: && GET_CODE (PATTERN (insn)) != ASM_INPUT) ! 623: || (GET_CODE (insn) == JUMP_INSN ! 624: && GET_CODE (PATTERN (insn)) != ADDR_VEC ! 625: && GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) ! 626: || GET_CODE (insn) == CALL_INSN) ! 627: { ! 628: if (GET_CODE (insn) == INSN ! 629: && (noperands = asm_noperands (PATTERN (insn))) >= 0) 1.1 root 630: { 1.1.1.4 ! root 631: decode_asm_operands (PATTERN (insn), recog_operand, NULL_PTR, ! 632: constraints, modes); ! 633: nalternatives = (noperands == 0 ? 0 ! 634: : n_occurrences (',', constraints[0]) + 1); 1.1 root 635: } 1.1.1.4 ! root 636: else 1.1 root 637: { 1.1.1.4 ! root 638: int insn_code_number = recog_memoized (insn); ! 639: rtx note; ! 640: ! 641: set = single_set (insn); ! 642: insn_extract (insn); 1.1 root 643: 1.1.1.4 ! root 644: nalternatives = insn_n_alternatives[insn_code_number]; ! 645: noperands = insn_n_operands[insn_code_number]; ! 646: ! 647: /* If this insn loads a parameter from its stack slot, then ! 648: it represents a savings, rather than a cost, if the ! 649: parameter is stored in memory. Record this fact. */ ! 650: ! 651: if (set != 0 && GET_CODE (SET_DEST (set)) == REG ! 652: && GET_CODE (SET_SRC (set)) == MEM ! 653: && (note = find_reg_note (insn, REG_EQUIV, ! 654: NULL_RTX)) != 0 ! 655: && GET_CODE (XEXP (note, 0)) == MEM) ! 656: { ! 657: costs[REGNO (SET_DEST (set))].mem_cost ! 658: -= (MEMORY_MOVE_COST (GET_MODE (SET_DEST (set))) ! 659: * loop_cost); ! 660: record_address_regs (XEXP (SET_SRC (set), 0), ! 661: BASE_REG_CLASS, loop_cost * 2); ! 662: continue; ! 663: } ! 664: ! 665: /* Improve handling of two-address insns such as ! 666: (set X (ashift CONST Y)) where CONST must be made to ! 667: match X. Change it into two insns: (set X CONST) ! 668: (set X (ashift X Y)). If we left this for reloading, it ! 669: would probably get three insns because X and Y might go ! 670: in the same place. This prevents X and Y from receiving ! 671: the same hard reg. ! 672: ! 673: We can only do this if the modes of operands 0 and 1 ! 674: (which might not be the same) are tieable and we only need ! 675: do this during our first pass. */ ! 676: ! 677: if (pass == 0 && optimize ! 678: && noperands >= 3 ! 679: && insn_operand_constraint[insn_code_number][1][0] == '0' ! 680: && insn_operand_constraint[insn_code_number][1][1] == 0 ! 681: && CONSTANT_P (recog_operand[1]) ! 682: && ! rtx_equal_p (recog_operand[0], recog_operand[1]) ! 683: && ! rtx_equal_p (recog_operand[0], recog_operand[2]) ! 684: && GET_CODE (recog_operand[0]) == REG ! 685: && MODES_TIEABLE_P (GET_MODE (recog_operand[0]), ! 686: insn_operand_mode[insn_code_number][1])) 1.1 root 687: { 1.1.1.4 ! root 688: rtx previnsn = prev_real_insn (insn); ! 689: rtx dest ! 690: = gen_lowpart (insn_operand_mode[insn_code_number][1], ! 691: recog_operand[0]); ! 692: rtx newinsn ! 693: = emit_insn_before (gen_move_insn (dest, ! 694: recog_operand[1]), ! 695: insn); ! 696: ! 697: /* If this insn was the start of a basic block, ! 698: include the new insn in that block. ! 699: We need not check for code_label here; ! 700: while a basic block can start with a code_label, ! 701: INSN could not be at the beginning of that block. */ ! 702: if (previnsn == 0 || GET_CODE (previnsn) == JUMP_INSN) ! 703: { ! 704: int b; ! 705: for (b = 0; b < n_basic_blocks; b++) ! 706: if (insn == basic_block_head[b]) ! 707: basic_block_head[b] = newinsn; ! 708: } ! 709: ! 710: /* This makes one more setting of new insns's dest. */ ! 711: reg_n_sets[REGNO (recog_operand[0])]++; ! 712: ! 713: *recog_operand_loc[1] = recog_operand[0]; ! 714: for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) ! 715: if (recog_dup_num[i] == 1) ! 716: *recog_dup_loc[i] = recog_operand[0]; ! 717: ! 718: insn = PREV_INSN (newinsn); ! 719: continue; 1.1 root 720: } 721: 1.1.1.4 ! root 722: /* If this is setting a pseudo from another pseudo or the ! 723: sum of a pseudo and a constant integer and the other ! 724: pseudo is known to be a pointer, set the destination to ! 725: be a pointer as well. ! 726: ! 727: Likewise if it is setting the destination from an address ! 728: or from a value equivalent to an address or to the sum of ! 729: an address and something else. ! 730: ! 731: But don't do any of this if the pseudo corresponds to ! 732: a user variable since it should have already been set ! 733: as a pointer based on the type. ! 734: ! 735: There is no point in doing this during our second ! 736: pass since not enough should have changed. */ ! 737: ! 738: if (pass == 0 && set != 0 && GET_CODE (SET_DEST (set)) == REG ! 739: && REGNO (SET_DEST (set)) >= FIRST_PSEUDO_REGISTER ! 740: && ! REG_USERVAR_P (SET_DEST (set)) ! 741: && ! REGNO_POINTER_FLAG (REGNO (SET_DEST (set))) ! 742: && ((GET_CODE (SET_SRC (set)) == REG ! 743: && REGNO_POINTER_FLAG (REGNO (SET_SRC (set)))) ! 744: || ((GET_CODE (SET_SRC (set)) == PLUS ! 745: || GET_CODE (SET_SRC (set)) == LO_SUM) ! 746: && (GET_CODE (XEXP (SET_SRC (set), 1)) ! 747: == CONST_INT) ! 748: && GET_CODE (XEXP (SET_SRC (set), 0)) == REG ! 749: && REGNO_POINTER_FLAG (REGNO (XEXP (SET_SRC (set), 0)))) ! 750: || GET_CODE (SET_SRC (set)) == CONST ! 751: || GET_CODE (SET_SRC (set)) == SYMBOL_REF ! 752: || GET_CODE (SET_SRC (set)) == LABEL_REF ! 753: || (GET_CODE (SET_SRC (set)) == HIGH ! 754: && (GET_CODE (XEXP (SET_SRC (set), 0)) == CONST ! 755: || (GET_CODE (XEXP (SET_SRC (set), 0)) ! 756: == SYMBOL_REF) ! 757: || (GET_CODE (XEXP (SET_SRC (set), 0)) ! 758: == LABEL_REF))) ! 759: || ((GET_CODE (SET_SRC (set)) == PLUS ! 760: || GET_CODE (SET_SRC (set)) == LO_SUM) ! 761: && (GET_CODE (XEXP (SET_SRC (set), 1)) == CONST ! 762: || (GET_CODE (XEXP (SET_SRC (set), 1)) ! 763: == SYMBOL_REF) ! 764: || (GET_CODE (XEXP (SET_SRC (set), 1)) ! 765: == LABEL_REF))) ! 766: || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0 ! 767: && (GET_CODE (XEXP (note, 0)) == CONST ! 768: || GET_CODE (XEXP (note, 0)) == SYMBOL_REF ! 769: || GET_CODE (XEXP (note, 0)) == LABEL_REF)))) ! 770: REGNO_POINTER_FLAG (REGNO (SET_DEST (set))) = 1; 1.1 root 771: 1.1.1.4 ! root 772: for (i = 0; i < noperands; i++) ! 773: { ! 774: constraints[i] ! 775: = insn_operand_constraint[insn_code_number][i]; ! 776: modes[i] = insn_operand_mode[insn_code_number][i]; ! 777: } 1.1 root 778: } 1.1.1.4 ! root 779: ! 780: /* If we get here, we are set up to record the costs of all the ! 781: operands for this insn. Start by initializing the costs. ! 782: Then handle any address registers. Finally record the desired ! 783: classes for any pseudos, doing it twice if some pair of ! 784: operands are commutative. */ ! 785: ! 786: for (i = 0; i < noperands; i++) ! 787: { ! 788: op_costs[i] = init_cost; ! 789: ! 790: if (GET_CODE (recog_operand[i]) == SUBREG) ! 791: recog_operand[i] = SUBREG_REG (recog_operand[i]); ! 792: ! 793: if (GET_CODE (recog_operand[i]) == MEM) ! 794: record_address_regs (XEXP (recog_operand[i], 0), ! 795: BASE_REG_CLASS, loop_cost * 2); ! 796: else if (constraints[i][0] == 'p') ! 797: record_address_regs (recog_operand[i], ! 798: BASE_REG_CLASS, loop_cost * 2); ! 799: } ! 800: ! 801: /* Check for commutative in a separate loop so everything will ! 802: have been initialized. Don't bother doing anything if the ! 803: second operand is a constant since that is the case ! 804: for which the constraints should have been written. */ ! 805: ! 806: for (i = 0; i < noperands - 1; i++) ! 807: if (constraints[i][0] == '%' ! 808: && ! CONSTANT_P (recog_operand[i+1])) ! 809: { ! 810: char *xconstraints[MAX_RECOG_OPERANDS]; ! 811: int j; ! 812: ! 813: /* Handle commutative operands by swapping the constraints. ! 814: We assume the modes are the same. */ ! 815: ! 816: for (j = 0; j < noperands; j++) ! 817: xconstraints[j] = constraints[j]; ! 818: ! 819: xconstraints[i] = constraints[i+1]; ! 820: xconstraints[i+1] = constraints[i]; ! 821: record_reg_classes (nalternatives, noperands, ! 822: recog_operand, modes, xconstraints, ! 823: insn); ! 824: } ! 825: ! 826: record_reg_classes (nalternatives, noperands, recog_operand, ! 827: modes, constraints, insn); ! 828: ! 829: /* Now add the cost for each operand to the total costs for ! 830: its register. */ ! 831: ! 832: for (i = 0; i < noperands; i++) ! 833: if (GET_CODE (recog_operand[i]) == REG ! 834: && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER) ! 835: { ! 836: int regno = REGNO (recog_operand[i]); ! 837: struct costs *p = &costs[regno], *q = &op_costs[i]; ! 838: ! 839: p->mem_cost += q->mem_cost * loop_cost; ! 840: for (j = 0; j < N_REG_CLASSES; j++) ! 841: p->cost[j] += q->cost[j] * loop_cost; ! 842: } 1.1 root 843: } 844: } 845: 1.1.1.4 ! root 846: /* Now for each register look at how desirable each class is ! 847: and find which class is preferred. Store that in ! 848: `prefclass[REGNO]'. Record in `altclass[REGNO]' the largest register ! 849: class any of whose registers is better than memory. */ 1.1 root 850: 1.1.1.4 ! root 851: if (pass == 0) ! 852: { ! 853: prefclass = (char *) oballoc (nregs); ! 854: altclass = (char *) oballoc (nregs); ! 855: } 1.1 root 856: 1.1.1.4 ! root 857: for (i = FIRST_PSEUDO_REGISTER; i < nregs; i++) 1.1 root 858: { 1.1.1.4 ! root 859: register int best_cost = (1 << (HOST_BITS_PER_INT - 2)) - 1; ! 860: enum reg_class best = ALL_REGS, alt = NO_REGS; ! 861: /* This is an enum reg_class, but we call it an int ! 862: to save lots of casts. */ ! 863: register int class; ! 864: register struct costs *p = &costs[i]; ! 865: ! 866: for (class = (int) ALL_REGS - 1; class > 0; class--) 1.1 root 867: { 1.1.1.4 ! root 868: /* Ignore classes that are too small for this operand or ! 869: invalid for a operand that was auto-incremented. */ ! 870: if (CLASS_MAX_NREGS (class, PSEUDO_REGNO_MODE (i)) ! 871: > reg_class_size[class] ! 872: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 873: || (in_inc_dec[i] && forbidden_inc_dec_class[class]) ! 874: #endif ! 875: ) ! 876: ; ! 877: else if (p->cost[class] < best_cost) ! 878: { ! 879: best_cost = p->cost[class]; ! 880: best = (enum reg_class) class; ! 881: } ! 882: else if (p->cost[class] == best_cost) ! 883: best = reg_class_subunion[(int)best][class]; 1.1 root 884: } 885: 1.1.1.4 ! root 886: /* Record the alternate register class; i.e., a class for which ! 887: every register in it is better than using memory. If adding a ! 888: class would make a smaller class (i.e., no union of just those ! 889: classes exists), skip that class. The major unions of classes ! 890: should be provided as a register class. Don't do this if we ! 891: will be doing it again later. */ ! 892: ! 893: if (pass == 1 || ! flag_expensive_optimizations) ! 894: for (class = 0; class < N_REG_CLASSES; class++) ! 895: if (p->cost[class] < p->mem_cost ! 896: && (reg_class_size[(int) reg_class_subunion[(int) alt][class]] ! 897: > reg_class_size[(int) alt]) ! 898: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 899: && ! (in_inc_dec[i] && forbidden_inc_dec_class[class]) 1.1 root 900: #endif 1.1.1.4 ! root 901: ) ! 902: alt = reg_class_subunion[(int) alt][class]; ! 903: ! 904: /* If we don't add any classes, nothing to try. */ ! 905: if (alt == best) ! 906: alt = (int) NO_REGS; ! 907: ! 908: /* We cast to (int) because (char) hits bugs in some compilers. */ ! 909: prefclass[i] = (int) best; ! 910: altclass[i] = (int) alt; ! 911: } 1.1 root 912: } 913: #endif /* REGISTER_CONSTRAINTS */ 914: } 915: 916: #ifdef REGISTER_CONSTRAINTS 917: 1.1.1.4 ! root 918: /* Record the cost of using memory or registers of various classes for ! 919: the operands in INSN. 1.1 root 920: 1.1.1.4 ! root 921: N_ALTS is the number of alternatives. 1.1 root 922: 1.1.1.4 ! root 923: N_OPS is the number of operands. 1.1 root 924: 1.1.1.4 ! root 925: OPS is an array of the operands. 1.1 root 926: 1.1.1.4 ! root 927: MODES are the modes of the operands, in case any are VOIDmode. 1.1 root 928: 1.1.1.4 ! root 929: CONSTRAINTS are the constraints to use for the operands. This array ! 930: is modified by this procedure. 1.1 root 931: 1.1.1.4 ! root 932: This procedure works alternative by alternative. For each alternative ! 933: we assume that we will be able to allocate all pseudos to their ideal ! 934: register class and calculate the cost of using that alternative. Then ! 935: we compute for each operand that is a pseudo-register, the cost of ! 936: having the pseudo allocated to each register class and using it in that ! 937: alternative. To this cost is added the cost of the alternative. 1.1 root 938: 1.1.1.4 ! root 939: The cost of each class for this insn is its lowest cost among all the ! 940: alternatives. */ ! 941: ! 942: static void ! 943: record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn) ! 944: int n_alts; ! 945: int n_ops; ! 946: rtx *ops; ! 947: enum machine_mode *modes; ! 948: char **constraints; ! 949: rtx insn; ! 950: { ! 951: int alt; ! 952: enum op_type {OP_READ, OP_WRITE, OP_READ_WRITE} op_types[MAX_RECOG_OPERANDS]; ! 953: int i, j; ! 954: ! 955: /* By default, each operand is an input operand. */ ! 956: ! 957: for (i = 0; i < n_ops; i++) ! 958: op_types[i] = OP_READ; 1.1 root 959: 1.1.1.4 ! root 960: /* Process each alternative, each time minimizing an operand's cost with ! 961: the cost for each operand in that alternative. */ 1.1 root 962: 1.1.1.4 ! root 963: for (alt = 0; alt < n_alts; alt++) 1.1 root 964: { 1.1.1.4 ! root 965: struct costs this_op_costs[MAX_RECOG_OPERANDS]; ! 966: int alt_fail = 0; ! 967: int alt_cost = 0; ! 968: enum reg_class classes[MAX_RECOG_OPERANDS]; ! 969: int class; 1.1 root 970: 1.1.1.4 ! root 971: for (i = 0; i < n_ops; i++) 1.1 root 972: { 1.1.1.4 ! root 973: char *p = constraints[i]; ! 974: rtx op = ops[i]; ! 975: enum machine_mode mode = modes[i]; ! 976: int allows_mem = 0; ! 977: int win = 0; ! 978: char c; ! 979: ! 980: /* If this operand has no constraints at all, we can conclude ! 981: nothing about it since anything is valid. */ ! 982: ! 983: if (*p == 0) 1.1 root 984: { 1.1.1.4 ! root 985: if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER) ! 986: bzero ((char *) &this_op_costs[i], sizeof this_op_costs[i]); ! 987: ! 988: continue; 1.1 root 989: } 990: 1.1.1.4 ! root 991: if (*p == '%') ! 992: p++; 1.1 root 993: 1.1.1.4 ! root 994: /* If this alternative is only relevant when this operand ! 995: matches a previous operand, we do different things depending ! 996: on whether this operand is a pseudo-reg or not. */ ! 997: ! 998: if (p[0] >= '0' && p[0] <= '0' + i && (p[1] == ',' || p[1] == 0)) ! 999: { ! 1000: j = p[0] - '0'; ! 1001: classes[i] = classes[j]; 1.1 root 1002: 1.1.1.4 ! root 1003: if (GET_CODE (op) != REG || REGNO (op) < FIRST_PSEUDO_REGISTER) ! 1004: { ! 1005: /* If this matches the other operand, we have no added ! 1006: cost. */ ! 1007: if (rtx_equal_p (ops[j], op)) ! 1008: ; ! 1009: ! 1010: /* If we can't put the other operand into a register, this ! 1011: alternative can't be used. */ ! 1012: ! 1013: else if (classes[j] == NO_REGS) ! 1014: alt_fail = 1; ! 1015: ! 1016: /* Otherwise, add to the cost of this alternative the cost ! 1017: to copy this operand to the register used for the other ! 1018: operand. */ 1.1 root 1019: 1.1.1.4 ! root 1020: else ! 1021: alt_cost += copy_cost (op, mode, classes[j], 1); ! 1022: } ! 1023: else if (GET_CODE (ops[j]) != REG ! 1024: || REGNO (ops[j]) < FIRST_PSEUDO_REGISTER) ! 1025: { ! 1026: /* This op is a pseudo but the one it matches is not. */ ! 1027: ! 1028: /* If we can't put the other operand into a register, this ! 1029: alternative can't be used. */ ! 1030: ! 1031: if (classes[j] == NO_REGS) ! 1032: alt_fail = 1; ! 1033: ! 1034: /* Otherwise, add to the cost of this alternative the cost ! 1035: to copy the other operand to the register used for this ! 1036: operand. */ 1.1 root 1037: 1.1.1.4 ! root 1038: else ! 1039: alt_cost += copy_cost (ops[j], mode, classes[j], 1); ! 1040: } ! 1041: else ! 1042: { ! 1043: /* The costs of this operand are the same as that of the ! 1044: other operand. However, if we cannot tie them, this ! 1045: alternative needs to do a copy, which is one ! 1046: instruction. */ ! 1047: ! 1048: this_op_costs[i] = this_op_costs[j]; ! 1049: if (! find_reg_note (insn, REG_DEAD, op)) ! 1050: alt_cost += 2; ! 1051: ! 1052: /* This is in place of ordinary cost computation ! 1053: for this operand. */ ! 1054: continue; ! 1055: } ! 1056: } 1.1 root 1057: 1.1.1.4 ! root 1058: /* Scan all the constraint letters. See if the operand matches ! 1059: any of the constraints. Collect the valid register classes ! 1060: and see if this operand accepts memory. */ ! 1061: ! 1062: classes[i] = NO_REGS; ! 1063: while (*p && (c = *p++) != ',') ! 1064: switch (c) 1.1 root 1065: { 1.1.1.4 ! root 1066: case '=': ! 1067: op_types[i] = OP_WRITE; ! 1068: break; ! 1069: ! 1070: case '+': ! 1071: op_types[i] = OP_READ_WRITE; ! 1072: break; ! 1073: ! 1074: case '*': ! 1075: /* Ignore the next letter for this pass. */ ! 1076: p++; ! 1077: break; ! 1078: ! 1079: case '%': ! 1080: case '?': case '!': case '#': ! 1081: case '&': ! 1082: case '0': case '1': case '2': case '3': case '4': ! 1083: case 'p': ! 1084: break; ! 1085: ! 1086: case 'm': case 'o': case 'V': ! 1087: /* It doesn't seem worth distingishing between offsettable ! 1088: and non-offsettable addresses here. */ ! 1089: allows_mem = 1; ! 1090: if (GET_CODE (op) == MEM) ! 1091: win = 1; ! 1092: break; ! 1093: ! 1094: case '<': ! 1095: if (GET_CODE (op) == MEM ! 1096: && (GET_CODE (XEXP (op, 0)) == PRE_DEC ! 1097: || GET_CODE (XEXP (op, 0)) == POST_DEC)) ! 1098: win = 1; ! 1099: break; ! 1100: ! 1101: case '>': ! 1102: if (GET_CODE (op) == MEM ! 1103: && (GET_CODE (XEXP (op, 0)) == PRE_INC ! 1104: || GET_CODE (XEXP (op, 0)) == POST_INC)) ! 1105: win = 1; ! 1106: break; ! 1107: ! 1108: case 'E': ! 1109: /* Match any floating double constant, but only if ! 1110: we can examine the bits of it reliably. */ ! 1111: if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT ! 1112: || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) ! 1113: && GET_MODE (op) != VOIDmode && ! flag_pretend_float) ! 1114: break; ! 1115: if (GET_CODE (op) == CONST_DOUBLE) ! 1116: win = 1; ! 1117: break; ! 1118: ! 1119: case 'F': ! 1120: if (GET_CODE (op) == CONST_DOUBLE) ! 1121: win = 1; ! 1122: break; ! 1123: ! 1124: case 'G': ! 1125: case 'H': ! 1126: if (GET_CODE (op) == CONST_DOUBLE ! 1127: && CONST_DOUBLE_OK_FOR_LETTER_P (op, c)) ! 1128: win = 1; ! 1129: break; ! 1130: ! 1131: case 's': ! 1132: if (GET_CODE (op) == CONST_INT ! 1133: || (GET_CODE (op) == CONST_DOUBLE ! 1134: && GET_MODE (op) == VOIDmode)) 1.1 root 1135: break; 1.1.1.4 ! root 1136: case 'i': ! 1137: if (CONSTANT_P (op) ! 1138: #ifdef LEGITIMATE_PIC_OPERAND_P ! 1139: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) ! 1140: #endif ! 1141: ) ! 1142: win = 1; ! 1143: break; ! 1144: ! 1145: case 'n': ! 1146: if (GET_CODE (op) == CONST_INT ! 1147: || (GET_CODE (op) == CONST_DOUBLE ! 1148: && GET_MODE (op) == VOIDmode)) ! 1149: win = 1; ! 1150: break; ! 1151: ! 1152: case 'I': ! 1153: case 'J': ! 1154: case 'K': ! 1155: case 'L': ! 1156: case 'M': ! 1157: case 'N': ! 1158: case 'O': ! 1159: case 'P': ! 1160: if (GET_CODE (op) == CONST_INT ! 1161: && CONST_OK_FOR_LETTER_P (INTVAL (op), c)) ! 1162: win = 1; ! 1163: break; ! 1164: ! 1165: case 'X': ! 1166: win = 1; ! 1167: break; ! 1168: ! 1169: #ifdef EXTRA_CONSTRAINT ! 1170: case 'Q': ! 1171: case 'R': ! 1172: case 'S': ! 1173: case 'T': ! 1174: case 'U': ! 1175: if (EXTRA_CONSTRAINT (op, c)) ! 1176: win = 1; ! 1177: break; ! 1178: #endif ! 1179: ! 1180: case 'g': ! 1181: if (GET_CODE (op) == MEM ! 1182: || (CONSTANT_P (op) ! 1183: #ifdef LEGITIMATE_PIC_OPERAND_P ! 1184: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (op)) ! 1185: #endif ! 1186: )) ! 1187: win = 1; ! 1188: allows_mem = 1; ! 1189: case 'r': ! 1190: classes[i] ! 1191: = reg_class_subunion[(int) classes[i]][(int) GENERAL_REGS]; ! 1192: break; ! 1193: ! 1194: default: ! 1195: classes[i] ! 1196: = reg_class_subunion[(int) classes[i]] ! 1197: [(int) REG_CLASS_FROM_LETTER (c)]; 1.1 root 1198: } 1199: 1.1.1.4 ! root 1200: constraints[i] = p; ! 1201: ! 1202: /* How we account for this operand now depends on whether it is a ! 1203: pseudo register or not. If it is, we first check if any ! 1204: register classes are valid. If not, we ignore this alternative, ! 1205: since we want to assume that all pseudos get allocated for ! 1206: register preferencing. If some register class is valid, compute ! 1207: the costs of moving the pseudo into that class. */ ! 1208: ! 1209: if (GET_CODE (op) == REG && REGNO (op) >= FIRST_PSEUDO_REGISTER) ! 1210: { ! 1211: if (classes[i] == NO_REGS) ! 1212: alt_fail = 1; ! 1213: else ! 1214: { ! 1215: struct costs *pp = &this_op_costs[i]; ! 1216: ! 1217: for (class = 0; class < N_REG_CLASSES; class++) ! 1218: pp->cost[class] = may_move_cost[class][(int) classes[i]]; ! 1219: ! 1220: /* If the alternative actually allows memory, make things ! 1221: a bit cheaper since we won't need an extra insn to ! 1222: load it. */ ! 1223: ! 1224: pp->mem_cost = MEMORY_MOVE_COST (mode) - allows_mem; ! 1225: ! 1226: /* If we have assigned a class to this register in our ! 1227: first pass, add a cost to this alternative corresponding ! 1228: to what we would add if this register were not in the ! 1229: appropriate class. */ ! 1230: ! 1231: if (prefclass) ! 1232: alt_cost ! 1233: += may_move_cost[prefclass[REGNO (op)]][(int) classes[i]]; ! 1234: } ! 1235: } ! 1236: ! 1237: /* Otherwise, if this alternative wins, either because we ! 1238: have already determined that or if we have a hard register of ! 1239: the proper class, there is no cost for this alternative. */ ! 1240: ! 1241: else if (win ! 1242: || (GET_CODE (op) == REG ! 1243: && reg_fits_class_p (op, classes[i], 0, GET_MODE (op)))) ! 1244: ; ! 1245: ! 1246: /* If registers are valid, the cost of this alternative includes ! 1247: copying the object to and/or from a register. */ ! 1248: ! 1249: else if (classes[i] != NO_REGS) ! 1250: { ! 1251: if (op_types[i] != OP_WRITE) ! 1252: alt_cost += copy_cost (op, mode, classes[i], 1); ! 1253: ! 1254: if (op_types[i] != OP_READ) ! 1255: alt_cost += copy_cost (op, mode, classes[i], 0); ! 1256: } ! 1257: ! 1258: /* The only other way this alternative can be used is if this is a ! 1259: constant that could be placed into memory. */ 1.1 root 1260: 1.1.1.4 ! root 1261: else if (CONSTANT_P (op) && allows_mem) ! 1262: alt_cost += MEMORY_MOVE_COST (mode); ! 1263: else ! 1264: alt_fail = 1; ! 1265: } ! 1266: ! 1267: if (alt_fail) ! 1268: continue; ! 1269: ! 1270: /* Finally, update the costs with the information we've calculated ! 1271: about this alternative. */ ! 1272: ! 1273: for (i = 0; i < n_ops; i++) ! 1274: if (GET_CODE (ops[i]) == REG ! 1275: && REGNO (ops[i]) >= FIRST_PSEUDO_REGISTER) ! 1276: { ! 1277: struct costs *pp = &op_costs[i], *qq = &this_op_costs[i]; ! 1278: int scale = 1 + (op_types[i] == OP_READ_WRITE); ! 1279: ! 1280: pp->mem_cost = MIN (pp->mem_cost, ! 1281: (qq->mem_cost + alt_cost) * scale); ! 1282: ! 1283: for (class = 0; class < N_REG_CLASSES; class++) ! 1284: pp->cost[class] = MIN (pp->cost[class], ! 1285: (qq->cost[class] + alt_cost) * scale); ! 1286: } ! 1287: } 1.1 root 1288: } 1.1.1.4 ! root 1289: ! 1290: /* Compute the cost of loading X into (if TO_P is non-zero) or from (if ! 1291: TO_P is zero) a register of class CLASS in mode MODE. ! 1292: ! 1293: X must not be a pseudo. */ ! 1294: ! 1295: static int ! 1296: copy_cost (x, mode, class, to_p) ! 1297: rtx x; ! 1298: enum machine_mode mode; ! 1299: enum reg_class class; ! 1300: int to_p; ! 1301: { ! 1302: enum reg_class secondary_class = NO_REGS; ! 1303: ! 1304: /* If X is a SCRATCH, there is actually nothing to move since we are ! 1305: assuming optimal allocation. */ ! 1306: ! 1307: if (GET_CODE (x) == SCRATCH) ! 1308: return 0; ! 1309: ! 1310: /* Get the class we will actually use for a reload. */ ! 1311: class = PREFERRED_RELOAD_CLASS (x, class); ! 1312: ! 1313: #ifdef HAVE_SECONDARY_RELOADS ! 1314: /* If we need a secondary reload (we assume here that we are using ! 1315: the secondary reload as an intermediate, not a scratch register), the ! 1316: cost is that to load the input into the intermediate register, then ! 1317: to copy them. We use a special value of TO_P to avoid recursion. */ ! 1318: ! 1319: #ifdef SECONDARY_INPUT_RELOAD_CLASS ! 1320: if (to_p == 1) ! 1321: secondary_class = SECONDARY_INPUT_RELOAD_CLASS (class, mode, x); ! 1322: #endif 1.1 root 1323: 1.1.1.4 ! root 1324: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS ! 1325: if (! to_p) ! 1326: secondary_class = SECONDARY_OUTPUT_RELOAD_CLASS (class, mode, x); ! 1327: #endif ! 1328: ! 1329: if (secondary_class != NO_REGS) ! 1330: return (move_cost[(int) secondary_class][(int) class] ! 1331: + copy_cost (x, mode, secondary_class, 2)); ! 1332: #endif /* HAVE_SECONDARY_RELOADS */ ! 1333: ! 1334: /* For memory, use the memory move cost, for (hard) registers, use the ! 1335: cost to move between the register classes, and use 2 for everything ! 1336: else (constants). */ ! 1337: ! 1338: if (GET_CODE (x) == MEM || class == NO_REGS) ! 1339: return MEMORY_MOVE_COST (mode); ! 1340: ! 1341: else if (GET_CODE (x) == REG) ! 1342: return move_cost[(int) REGNO_REG_CLASS (REGNO (x))][(int) class]; ! 1343: ! 1344: else ! 1345: /* If this is a constant, we may eventually want to call rtx_cost here. */ ! 1346: return 2; ! 1347: } ! 1348: 1.1 root 1349: /* Record the pseudo registers we must reload into hard registers 1350: in a subexpression of a memory address, X. 1351: 1.1.1.4 ! root 1352: CLASS is the class that the register needs to be in and is either ! 1353: BASE_REG_CLASS or INDEX_REG_CLASS. ! 1354: ! 1355: SCALE is twice the amount to multiply the cost by (it is twice so we ! 1356: can represent half-cost adjustments). */ ! 1357: ! 1358: static void ! 1359: record_address_regs (x, class, scale) 1.1 root 1360: rtx x; 1.1.1.4 ! root 1361: enum reg_class class; ! 1362: int scale; 1.1 root 1363: { 1364: register enum rtx_code code = GET_CODE (x); 1365: 1366: switch (code) 1367: { 1368: case CONST_INT: 1369: case CONST: 1370: case CC0: 1371: case PC: 1372: case SYMBOL_REF: 1373: case LABEL_REF: 1374: return; 1375: 1376: case PLUS: 1377: /* When we have an address that is a sum, 1378: we must determine whether registers are "base" or "index" regs. 1379: If there is a sum of two registers, we must choose one to be 1380: the "base". Luckily, we can use the REGNO_POINTER_FLAG 1.1.1.4 ! root 1381: to make a good choice most of the time. We only need to do this ! 1382: on machines that can have two registers in an address and where ! 1383: the base and index register classes are different. ! 1384: ! 1385: ??? This code used to set REGNO_POINTER_FLAG in some cases, but ! 1386: that seems bogus since it should only be set when we are sure ! 1387: the register is being used as a pointer. */ ! 1388: 1.1 root 1389: { 1390: rtx arg0 = XEXP (x, 0); 1391: rtx arg1 = XEXP (x, 1); 1392: register enum rtx_code code0 = GET_CODE (arg0); 1393: register enum rtx_code code1 = GET_CODE (arg1); 1394: 1395: /* Look inside subregs. */ 1.1.1.4 ! root 1396: if (code0 == SUBREG) 1.1 root 1397: arg0 = SUBREG_REG (arg0), code0 = GET_CODE (arg0); 1.1.1.4 ! root 1398: if (code1 == SUBREG) 1.1 root 1399: arg1 = SUBREG_REG (arg1), code1 = GET_CODE (arg1); 1400: 1.1.1.4 ! root 1401: /* If this machine only allows one register per address, it must ! 1402: be in the first operand. */ ! 1403: ! 1404: if (MAX_REGS_PER_ADDRESS == 1) ! 1405: record_address_regs (arg0, class, scale); ! 1406: ! 1407: /* If index and base registers are the same on this machine, just ! 1408: record registers in any non-constant operands. We assume here, ! 1409: as well as in the tests below, that all addresses are in ! 1410: canonical form. */ ! 1411: ! 1412: else if (INDEX_REG_CLASS == BASE_REG_CLASS) 1.1 root 1413: { 1.1.1.4 ! root 1414: record_address_regs (arg0, class, scale); ! 1415: if (! CONSTANT_P (arg1)) ! 1416: record_address_regs (arg1, class, scale); 1.1 root 1417: } 1.1.1.4 ! root 1418: ! 1419: /* If the second operand is a constant integer, it doesn't change ! 1420: what class the first operand must be. */ ! 1421: ! 1422: else if (code1 == CONST_INT || code1 == CONST_DOUBLE) ! 1423: record_address_regs (arg0, class, scale); ! 1424: ! 1425: /* If the second operand is a symbolic constant, the first operand ! 1426: must be an index register. */ ! 1427: ! 1428: else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF) ! 1429: record_address_regs (arg0, INDEX_REG_CLASS, scale); ! 1430: ! 1431: /* If this the sum of two registers where the first is known to be a ! 1432: pointer, it must be a base register with the second an index. */ ! 1433: ! 1434: else if (code0 == REG && code1 == REG ! 1435: && REGNO_POINTER_FLAG (REGNO (arg0))) 1.1 root 1436: { 1.1.1.4 ! root 1437: record_address_regs (arg0, BASE_REG_CLASS, scale); ! 1438: record_address_regs (arg1, INDEX_REG_CLASS, scale); 1.1 root 1439: } 1.1.1.4 ! root 1440: ! 1441: /* If this is the sum of two registers and neither is known to ! 1442: be a pointer, count equal chances that each might be a base ! 1443: or index register. This case should be rare. */ ! 1444: ! 1445: else if (code0 == REG && code1 == REG ! 1446: && ! REGNO_POINTER_FLAG (REGNO (arg0)) ! 1447: && ! REGNO_POINTER_FLAG (REGNO (arg1))) 1.1 root 1448: { 1.1.1.4 ! root 1449: record_address_regs (arg0, BASE_REG_CLASS, scale / 2); ! 1450: record_address_regs (arg0, INDEX_REG_CLASS, scale / 2); ! 1451: record_address_regs (arg1, BASE_REG_CLASS, scale / 2); ! 1452: record_address_regs (arg1, INDEX_REG_CLASS, scale / 2); 1.1 root 1453: } 1454: 1.1.1.4 ! root 1455: /* In all other cases, the first operand is an index and the ! 1456: second is the base. */ ! 1457: ! 1458: else ! 1459: { ! 1460: record_address_regs (arg0, INDEX_REG_CLASS, scale); ! 1461: record_address_regs (arg1, BASE_REG_CLASS, scale); ! 1462: } 1.1 root 1463: } 1464: break; 1465: 1466: case POST_INC: 1467: case PRE_INC: 1468: case POST_DEC: 1469: case PRE_DEC: 1470: /* Double the importance of a pseudo register that is incremented 1471: or decremented, since it would take two extra insns 1.1.1.4 ! root 1472: if it ends up in the wrong place. If the operand is a pseudo, ! 1473: show it is being used in an INC_DEC context. */ ! 1474: ! 1475: #ifdef FORBIDDEN_INC_DEC_CLASSES ! 1476: if (GET_CODE (XEXP (x, 0)) == REG ! 1477: && REGNO (XEXP (x, 0)) >= FIRST_PSEUDO_REGISTER) ! 1478: in_inc_dec[REGNO (XEXP (x, 0))] = 1; ! 1479: #endif ! 1480: ! 1481: record_address_regs (XEXP (x, 0), class, 2 * scale); 1.1 root 1482: break; 1483: 1484: case REG: 1485: { 1.1.1.4 ! root 1486: register struct costs *pp = &costs[REGNO (x)]; ! 1487: register int i; 1.1 root 1488: 1.1.1.4 ! root 1489: pp->mem_cost += (MEMORY_MOVE_COST (Pmode) * scale) / 2; 1.1 root 1490: 1.1.1.4 ! root 1491: for (i = 0; i < N_REG_CLASSES; i++) ! 1492: pp->cost[i] += (may_move_cost[i][(int) class] * scale) / 2; 1.1 root 1493: } 1494: break; 1495: 1496: default: 1497: { 1498: register char *fmt = GET_RTX_FORMAT (code); 1499: register int i; 1500: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1501: if (fmt[i] == 'e') 1.1.1.4 ! root 1502: record_address_regs (XEXP (x, i), class, scale); 1.1 root 1503: } 1504: } 1505: } 1506: #endif /* REGISTER_CONSTRAINTS */ 1507: 1508: /* This is the `regscan' pass of the compiler, run just before cse 1509: and again just before loop. 1510: 1511: It finds the first and last use of each pseudo-register 1512: and records them in the vectors regno_first_uid, regno_last_uid 1513: and counts the number of sets in the vector reg_n_sets. 1514: 1515: REPEAT is nonzero the second time this is called. */ 1516: 1517: /* Indexed by pseudo register number, gives uid of first insn using the reg 1518: (as of the time reg_scan is called). */ 1519: 1.1.1.4 ! root 1520: int *regno_first_uid; 1.1 root 1521: 1522: /* Indexed by pseudo register number, gives uid of last insn using the reg 1523: (as of the time reg_scan is called). */ 1524: 1.1.1.4 ! root 1525: int *regno_last_uid; 1.1 root 1526: 1527: /* Record the number of registers we used when we allocated the above two 1528: tables. If we are called again with more than this, we must re-allocate 1529: the tables. */ 1530: 1531: static int highest_regno_in_uid_map; 1532: 1533: /* Maximum number of parallel sets and clobbers in any insn in this fn. 1534: Always at least 3, since the combiner could put that many togetherm 1535: and we want this to remain correct for all the remaining passes. */ 1536: 1537: int max_parallel; 1538: 1539: void reg_scan_mark_refs (); 1540: 1541: void 1542: reg_scan (f, nregs, repeat) 1543: rtx f; 1544: int nregs; 1545: int repeat; 1546: { 1547: register rtx insn; 1548: 1549: if (!repeat || nregs > highest_regno_in_uid_map) 1550: { 1551: /* Leave some spare space in case more regs are allocated. */ 1552: highest_regno_in_uid_map = nregs + nregs / 20; 1553: regno_first_uid 1.1.1.4 ! root 1554: = (int *) oballoc (highest_regno_in_uid_map * sizeof (int)); 1.1 root 1555: regno_last_uid 1.1.1.4 ! root 1556: = (int *) oballoc (highest_regno_in_uid_map * sizeof (int)); 1.1 root 1557: reg_n_sets 1558: = (short *) oballoc (highest_regno_in_uid_map * sizeof (short)); 1559: } 1560: 1.1.1.4 ! root 1561: bzero (regno_first_uid, highest_regno_in_uid_map * sizeof (int)); ! 1562: bzero (regno_last_uid, highest_regno_in_uid_map * sizeof (int)); 1.1 root 1563: bzero (reg_n_sets, highest_regno_in_uid_map * sizeof (short)); 1564: 1565: max_parallel = 3; 1566: 1567: for (insn = f; insn; insn = NEXT_INSN (insn)) 1568: if (GET_CODE (insn) == INSN 1569: || GET_CODE (insn) == CALL_INSN 1570: || GET_CODE (insn) == JUMP_INSN) 1571: { 1572: if (GET_CODE (PATTERN (insn)) == PARALLEL 1573: && XVECLEN (PATTERN (insn), 0) > max_parallel) 1574: max_parallel = XVECLEN (PATTERN (insn), 0); 1575: reg_scan_mark_refs (PATTERN (insn), INSN_UID (insn)); 1576: } 1577: } 1578: 1579: void 1580: reg_scan_mark_refs (x, uid) 1581: rtx x; 1582: int uid; 1583: { 1584: register enum rtx_code code = GET_CODE (x); 1585: register rtx dest; 1586: 1587: switch (code) 1588: { 1589: case CONST_INT: 1590: case CONST: 1591: case CONST_DOUBLE: 1592: case CC0: 1593: case PC: 1594: case SYMBOL_REF: 1595: case LABEL_REF: 1596: case ADDR_VEC: 1597: case ADDR_DIFF_VEC: 1598: return; 1599: 1600: case REG: 1601: { 1602: register int regno = REGNO (x); 1603: 1604: regno_last_uid[regno] = uid; 1605: if (regno_first_uid[regno] == 0) 1606: regno_first_uid[regno] = uid; 1607: } 1608: break; 1609: 1610: case SET: 1611: /* Count a set of the destination if it is a register. */ 1612: for (dest = SET_DEST (x); 1613: GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART 1614: || GET_CODE (dest) == ZERO_EXTEND; 1615: dest = XEXP (dest, 0)) 1616: ; 1617: 1618: if (GET_CODE (dest) == REG) 1619: reg_n_sets[REGNO (dest)]++; 1620: 1621: /* ... fall through ... */ 1622: 1623: default: 1624: { 1625: register char *fmt = GET_RTX_FORMAT (code); 1626: register int i; 1627: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1628: { 1629: if (fmt[i] == 'e') 1630: reg_scan_mark_refs (XEXP (x, i), uid); 1631: else if (fmt[i] == 'E' && XVEC (x, i) != 0) 1632: { 1633: register int j; 1634: for (j = XVECLEN (x, i) - 1; j >= 0; j--) 1635: reg_scan_mark_refs (XVECEXP (x, i, j), uid); 1636: } 1637: } 1638: } 1639: } 1640: } 1641: 1642: /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1 1643: is also in C2. */ 1644: 1645: int 1646: reg_class_subset_p (c1, c2) 1647: register enum reg_class c1; 1648: register enum reg_class c2; 1649: { 1650: if (c1 == c2) return 1; 1651: 1652: if (c2 == ALL_REGS) 1653: win: 1654: return 1; 1655: GO_IF_HARD_REG_SUBSET (reg_class_contents[(int)c1], 1656: reg_class_contents[(int)c2], 1657: win); 1658: return 0; 1659: } 1660: 1661: /* Return nonzero if there is a register that is in both C1 and C2. */ 1662: 1663: int 1664: reg_classes_intersect_p (c1, c2) 1665: register enum reg_class c1; 1666: register enum reg_class c2; 1667: { 1668: #ifdef HARD_REG_SET 1669: register 1670: #endif 1671: HARD_REG_SET c; 1672: 1673: if (c1 == c2) return 1; 1674: 1675: if (c1 == ALL_REGS || c2 == ALL_REGS) 1676: return 1; 1677: 1678: COPY_HARD_REG_SET (c, reg_class_contents[(int) c1]); 1679: AND_HARD_REG_SET (c, reg_class_contents[(int) c2]); 1680: 1681: GO_IF_HARD_REG_SUBSET (c, reg_class_contents[(int) NO_REGS], lose); 1682: return 1; 1683: 1684: lose: 1685: return 0; 1686: } 1687:
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