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1.1 root 1: /* Search an insn for pseudo regs that must be in hard regs and are not. 1.1.1.7 ! root 2: Copyright (C) 1987, 88, 89, 92, 93, 1994 Free Software Foundation, Inc. 1.1 root 3: 4: This file is part of GNU CC. 5: 6: GNU CC is free software; you can redistribute it and/or modify 7: it under the terms of the GNU General Public License as published by 8: the Free Software Foundation; either version 2, or (at your option) 9: any later version. 10: 11: GNU CC is distributed in the hope that it will be useful, 12: but WITHOUT ANY WARRANTY; without even the implied warranty of 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14: GNU General Public License for more details. 15: 16: You should have received a copy of the GNU General Public License 17: along with GNU CC; see the file COPYING. If not, write to 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 19: 20: 21: /* This file contains subroutines used only from the file reload1.c. 22: It knows how to scan one insn for operands and values 23: that need to be copied into registers to make valid code. 24: It also finds other operands and values which are valid 25: but for which equivalent values in registers exist and 26: ought to be used instead. 27: 28: Before processing the first insn of the function, call `init_reload'. 29: 30: To scan an insn, call `find_reloads'. This does two things: 31: 1. sets up tables describing which values must be reloaded 32: for this insn, and what kind of hard regs they must be reloaded into; 33: 2. optionally record the locations where those values appear in 34: the data, so they can be replaced properly later. 35: This is done only if the second arg to `find_reloads' is nonzero. 36: 37: The third arg to `find_reloads' specifies the number of levels 38: of indirect addressing supported by the machine. If it is zero, 39: indirect addressing is not valid. If it is one, (MEM (REG n)) 40: is valid even if (REG n) did not get a hard register; if it is two, 41: (MEM (MEM (REG n))) is also valid even if (REG n) did not get a 42: hard register, and similarly for higher values. 43: 44: Then you must choose the hard regs to reload those pseudo regs into, 45: and generate appropriate load insns before this insn and perhaps 46: also store insns after this insn. Set up the array `reload_reg_rtx' 47: to contain the REG rtx's for the registers you used. In some 48: cases `find_reloads' will return a nonzero value in `reload_reg_rtx' 49: for certain reloads. Then that tells you which register to use, 50: so you do not need to allocate one. But you still do need to add extra 51: instructions to copy the value into and out of that register. 52: 53: Finally you must call `subst_reloads' to substitute the reload reg rtx's 54: into the locations already recorded. 55: 56: NOTE SIDE EFFECTS: 57: 58: find_reloads can alter the operands of the instruction it is called on. 59: 60: 1. Two operands of any sort may be interchanged, if they are in a 61: commutative instruction. 62: This happens only if find_reloads thinks the instruction will compile 63: better that way. 64: 65: 2. Pseudo-registers that are equivalent to constants are replaced 66: with those constants if they are not in hard registers. 67: 68: 1 happens every time find_reloads is called. 69: 2 happens only when REPLACE is 1, which is only when 70: actually doing the reloads, not when just counting them. 71: 72: 73: Using a reload register for several reloads in one insn: 74: 75: When an insn has reloads, it is considered as having three parts: 76: the input reloads, the insn itself after reloading, and the output reloads. 77: Reloads of values used in memory addresses are often needed for only one part. 78: 79: When this is so, reload_when_needed records which part needs the reload. 80: Two reloads for different parts of the insn can share the same reload 81: register. 82: 83: When a reload is used for addresses in multiple parts, or when it is 84: an ordinary operand, it is classified as RELOAD_OTHER, and cannot share 85: a register with any other reload. */ 86: 87: #define REG_OK_STRICT 88: 1.1.1.7 ! root 89: #include <stdio.h> 1.1 root 90: #include "config.h" 91: #include "rtl.h" 92: #include "insn-config.h" 93: #include "insn-codes.h" 94: #include "recog.h" 95: #include "reload.h" 96: #include "regs.h" 97: #include "hard-reg-set.h" 98: #include "flags.h" 99: #include "real.h" 100: 101: #ifndef REGISTER_MOVE_COST 102: #define REGISTER_MOVE_COST(x, y) 2 103: #endif 104: 105: /* The variables set up by `find_reloads' are: 106: 107: n_reloads number of distinct reloads needed; max reload # + 1 108: tables indexed by reload number 109: reload_in rtx for value to reload from 110: reload_out rtx for where to store reload-reg afterward if nec 111: (often the same as reload_in) 112: reload_reg_class enum reg_class, saying what regs to reload into 113: reload_inmode enum machine_mode; mode this operand should have 114: when reloaded, on input. 115: reload_outmode enum machine_mode; mode this operand should have 116: when reloaded, on output. 117: reload_optional char, nonzero for an optional reload. 118: Optional reloads are ignored unless the 119: value is already sitting in a register. 120: reload_inc int, positive amount to increment or decrement by if 121: reload_in is a PRE_DEC, PRE_INC, POST_DEC, POST_INC. 122: Ignored otherwise (don't assume it is zero). 123: reload_in_reg rtx. A reg for which reload_in is the equivalent. 124: If reload_in is a symbol_ref which came from 125: reg_equiv_constant, then this is the pseudo 126: which has that symbol_ref as equivalent. 127: reload_reg_rtx rtx. This is the register to reload into. 128: If it is zero when `find_reloads' returns, 129: you must find a suitable register in the class 130: specified by reload_reg_class, and store here 131: an rtx for that register with mode from 132: reload_inmode or reload_outmode. 133: reload_nocombine char, nonzero if this reload shouldn't be 134: combined with another reload. 1.1.1.5 root 135: reload_opnum int, operand number being reloaded. This is 136: used to group related reloads and need not always 137: be equal to the actual operand number in the insn, 138: though it current will be; for in-out operands, it 139: is one of the two operand numbers. 140: reload_when_needed enum, classifies reload as needed either for 1.1 root 141: addressing an input reload, addressing an output, 142: for addressing a non-reloaded mem ref, 143: or for unspecified purposes (i.e., more than one 144: of the above). 145: reload_secondary_p int, 1 if this is a secondary register for one 1.1.1.7 ! root 146: or more reloads. ! 147: reload_secondary_in_reload ! 148: reload_secondary_out_reload ! 149: int, gives the reload number of a secondary ! 150: reload, when needed; otherwise -1 ! 151: reload_secondary_in_icode ! 152: reload_secondary_out_icode ! 153: enum insn_code, if a secondary reload is required, 1.1 root 154: gives the INSN_CODE that uses the secondary 155: reload as a scratch register, or CODE_FOR_nothing 156: if the secondary reload register is to be an 157: intermediate register. */ 158: int n_reloads; 159: 160: rtx reload_in[MAX_RELOADS]; 161: rtx reload_out[MAX_RELOADS]; 162: enum reg_class reload_reg_class[MAX_RELOADS]; 163: enum machine_mode reload_inmode[MAX_RELOADS]; 164: enum machine_mode reload_outmode[MAX_RELOADS]; 165: rtx reload_reg_rtx[MAX_RELOADS]; 166: char reload_optional[MAX_RELOADS]; 167: int reload_inc[MAX_RELOADS]; 168: rtx reload_in_reg[MAX_RELOADS]; 169: char reload_nocombine[MAX_RELOADS]; 1.1.1.5 root 170: int reload_opnum[MAX_RELOADS]; 171: enum reload_type reload_when_needed[MAX_RELOADS]; 1.1 root 172: int reload_secondary_p[MAX_RELOADS]; 1.1.1.7 ! root 173: int reload_secondary_in_reload[MAX_RELOADS]; ! 174: int reload_secondary_out_reload[MAX_RELOADS]; ! 175: enum insn_code reload_secondary_in_icode[MAX_RELOADS]; ! 176: enum insn_code reload_secondary_out_icode[MAX_RELOADS]; 1.1 root 177: 178: /* All the "earlyclobber" operands of the current insn 179: are recorded here. */ 180: int n_earlyclobbers; 181: rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]; 182: 1.1.1.5 root 183: int reload_n_operands; 184: 1.1 root 185: /* Replacing reloads. 186: 187: If `replace_reloads' is nonzero, then as each reload is recorded 188: an entry is made for it in the table `replacements'. 189: Then later `subst_reloads' can look through that table and 190: perform all the replacements needed. */ 191: 192: /* Nonzero means record the places to replace. */ 193: static int replace_reloads; 194: 195: /* Each replacement is recorded with a structure like this. */ 196: struct replacement 197: { 198: rtx *where; /* Location to store in */ 199: rtx *subreg_loc; /* Location of SUBREG if WHERE is inside 200: a SUBREG; 0 otherwise. */ 201: int what; /* which reload this is for */ 202: enum machine_mode mode; /* mode it must have */ 203: }; 204: 205: static struct replacement replacements[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 206: 207: /* Number of replacements currently recorded. */ 208: static int n_replacements; 209: 1.1.1.5 root 210: /* Used to track what is modified by an operand. */ 211: struct decomposition 212: { 213: int reg_flag; /* Nonzero if referencing a register. */ 214: int safe; /* Nonzero if this can't conflict with anything. */ 215: rtx base; /* Base adddress for MEM. */ 216: HOST_WIDE_INT start; /* Starting offset or register number. */ 217: HOST_WIDE_INT end; /* Endinf offset or register number. */ 218: }; 219: 1.1 root 220: /* MEM-rtx's created for pseudo-regs in stack slots not directly addressable; 221: (see reg_equiv_address). */ 222: static rtx memlocs[MAX_RECOG_OPERANDS * ((MAX_REGS_PER_ADDRESS * 2) + 1)]; 223: static int n_memlocs; 224: 1.1.1.4 root 225: #ifdef SECONDARY_MEMORY_NEEDED 226: 227: /* Save MEMs needed to copy from one class of registers to another. One MEM 228: is used per mode, but normally only one or two modes are ever used. 229: 1.1.1.5 root 230: We keep two versions, before and after register elimination. The one 231: after register elimination is record separately for each operand. This 232: is done in case the address is not valid to be sure that we separately 233: reload each. */ 1.1.1.4 root 234: 235: static rtx secondary_memlocs[NUM_MACHINE_MODES]; 1.1.1.5 root 236: static rtx secondary_memlocs_elim[NUM_MACHINE_MODES][MAX_RECOG_OPERANDS]; 1.1.1.4 root 237: #endif 238: 1.1 root 239: /* The instruction we are doing reloads for; 240: so we can test whether a register dies in it. */ 241: static rtx this_insn; 242: 243: /* Nonzero if this instruction is a user-specified asm with operands. */ 244: static int this_insn_is_asm; 245: 246: /* If hard_regs_live_known is nonzero, 247: we can tell which hard regs are currently live, 248: at least enough to succeed in choosing dummy reloads. */ 249: static int hard_regs_live_known; 250: 251: /* Indexed by hard reg number, 252: element is nonegative if hard reg has been spilled. 253: This vector is passed to `find_reloads' as an argument 254: and is not changed here. */ 255: static short *static_reload_reg_p; 256: 257: /* Set to 1 in subst_reg_equivs if it changes anything. */ 258: static int subst_reg_equivs_changed; 259: 260: /* On return from push_reload, holds the reload-number for the OUT 261: operand, which can be different for that from the input operand. */ 262: static int output_reloadnum; 263: 1.1.1.7 ! root 264: /* Compare two RTX's. */ ! 265: #define MATCHES(x, y) \ ! 266: (x == y || (x != 0 && (GET_CODE (x) == REG \ ! 267: ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \ ! 268: : rtx_equal_p (x, y) && ! side_effects_p (x)))) ! 269: ! 270: /* Indicates if two reloads purposes are for similar enough things that we ! 271: can merge their reloads. */ ! 272: #define MERGABLE_RELOADS(when1, when2, op1, op2) \ ! 273: ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \ ! 274: || ((when1) == (when2) && (op1) == (op2)) \ ! 275: || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \ ! 276: || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \ ! 277: && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \ ! 278: || ((when1) == RELOAD_FOR_OTHER_ADDRESS \ ! 279: && (when2) == RELOAD_FOR_OTHER_ADDRESS)) ! 280: ! 281: /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */ ! 282: #define MERGE_TO_OTHER(when1, when2, op1, op2) \ ! 283: ((when1) != (when2) \ ! 284: || ! ((op1) == (op2) \ ! 285: || (when1) == RELOAD_FOR_INPUT \ ! 286: || (when1) == RELOAD_FOR_OPERAND_ADDRESS \ ! 287: || (when1) == RELOAD_FOR_OTHER_ADDRESS)) ! 288: ! 289: static int push_secondary_reload PROTO((int, rtx, int, int, enum reg_class, ! 290: enum machine_mode, enum reload_type, ! 291: enum insn_code *)); 1.1.1.5 root 292: static int push_reload PROTO((rtx, rtx, rtx *, rtx *, enum reg_class, 293: enum machine_mode, enum machine_mode, 294: int, int, int, enum reload_type)); 295: static void push_replacement PROTO((rtx *, int, enum machine_mode)); 296: static void combine_reloads PROTO((void)); 297: static rtx find_dummy_reload PROTO((rtx, rtx, rtx *, rtx *, 1.1.1.6 root 298: enum machine_mode, enum machine_mode, 1.1.1.5 root 299: enum reg_class, int)); 1.1.1.6 root 300: static int earlyclobber_operand_p PROTO((rtx)); 1.1.1.5 root 301: static int hard_reg_set_here_p PROTO((int, int, rtx)); 302: static struct decomposition decompose PROTO((rtx)); 303: static int immune_p PROTO((rtx, rtx, struct decomposition)); 304: static int alternative_allows_memconst PROTO((char *, int)); 305: static rtx find_reloads_toplev PROTO((rtx, int, enum reload_type, int, int)); 306: static rtx make_memloc PROTO((rtx, int)); 307: static int find_reloads_address PROTO((enum machine_mode, rtx *, rtx, rtx *, 308: int, enum reload_type, int)); 309: static rtx subst_reg_equivs PROTO((rtx)); 310: static rtx subst_indexed_address PROTO((rtx)); 311: static int find_reloads_address_1 PROTO((rtx, int, rtx *, int, 312: enum reload_type,int)); 313: static void find_reloads_address_part PROTO((rtx, rtx *, enum reg_class, 314: enum machine_mode, int, 315: enum reload_type, int)); 316: static int find_inc_amount PROTO((rtx, rtx)); 1.1 root 317: 318: #ifdef HAVE_SECONDARY_RELOADS 319: 320: /* Determine if any secondary reloads are needed for loading (if IN_P is 321: non-zero) or storing (if IN_P is zero) X to or from a reload register of 1.1.1.7 ! root 322: register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads ! 323: are needed, push them. ! 324: ! 325: Return the reload number of the secondary reload we made, or -1 if ! 326: we didn't need one. *PICODE is set to the insn_code to use if we do ! 327: need a secondary reload. */ 1.1 root 328: 1.1.1.7 ! root 329: static int ! 330: push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, ! 331: type, picode) ! 332: int in_p; 1.1 root 333: rtx x; 1.1.1.7 ! root 334: int opnum; ! 335: int optional; 1.1 root 336: enum reg_class reload_class; 337: enum machine_mode reload_mode; 1.1.1.7 ! root 338: enum reload_type type; 1.1 root 339: enum insn_code *picode; 340: { 341: enum reg_class class = NO_REGS; 342: enum machine_mode mode = reload_mode; 343: enum insn_code icode = CODE_FOR_nothing; 344: enum reg_class t_class = NO_REGS; 345: enum machine_mode t_mode = VOIDmode; 346: enum insn_code t_icode = CODE_FOR_nothing; 1.1.1.7 ! root 347: enum reload_type secondary_type; ! 348: int i; ! 349: int s_reload, t_reload = -1; ! 350: ! 351: if (type == RELOAD_FOR_INPUT_ADDRESS || type == RELOAD_FOR_OUTPUT_ADDRESS) ! 352: secondary_type = type; ! 353: else ! 354: secondary_type = in_p ? RELOAD_FOR_INPUT_ADDRESS : RELOAD_FOR_OUTPUT_ADDRESS; ! 355: ! 356: *picode = CODE_FOR_nothing; 1.1 root 357: 1.1.1.2 root 358: /* If X is a pseudo-register that has an equivalent MEM (actually, if it 359: is still a pseudo-register by now, it *must* have an equivalent MEM 360: but we don't want to assume that), use that equivalent when seeing if 361: a secondary reload is needed since whether or not a reload is needed 362: might be sensitive to the form of the MEM. */ 363: 364: if (GET_CODE (x) == REG && REGNO (x) >= FIRST_PSEUDO_REGISTER 365: && reg_equiv_mem[REGNO (x)] != 0) 366: x = reg_equiv_mem[REGNO (x)]; 367: 1.1 root 368: #ifdef SECONDARY_INPUT_RELOAD_CLASS 369: if (in_p) 370: class = SECONDARY_INPUT_RELOAD_CLASS (reload_class, reload_mode, x); 371: #endif 372: 373: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS 374: if (! in_p) 375: class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class, reload_mode, x); 376: #endif 377: 1.1.1.7 ! root 378: /* If we don't need any secondary registers, done. */ 1.1 root 379: if (class == NO_REGS) 1.1.1.7 ! root 380: return -1; 1.1 root 381: 382: /* Get a possible insn to use. If the predicate doesn't accept X, don't 383: use the insn. */ 384: 385: icode = (in_p ? reload_in_optab[(int) reload_mode] 386: : reload_out_optab[(int) reload_mode]); 387: 388: if (icode != CODE_FOR_nothing 389: && insn_operand_predicate[(int) icode][in_p] 390: && (! (insn_operand_predicate[(int) icode][in_p]) (x, reload_mode))) 391: icode = CODE_FOR_nothing; 392: 393: /* If we will be using an insn, see if it can directly handle the reload 394: register we will be using. If it can, the secondary reload is for a 395: scratch register. If it can't, we will use the secondary reload for 396: an intermediate register and require a tertiary reload for the scratch 397: register. */ 398: 399: if (icode != CODE_FOR_nothing) 400: { 401: /* If IN_P is non-zero, the reload register will be the output in 402: operand 0. If IN_P is zero, the reload register will be the input 403: in operand 1. Outputs should have an initial "=", which we must 404: skip. */ 405: 1.1.1.2 root 406: char insn_letter = insn_operand_constraint[(int) icode][!in_p][in_p]; 1.1 root 407: enum reg_class insn_class 1.1.1.2 root 408: = (insn_letter == 'r' ? GENERAL_REGS 409: : REG_CLASS_FROM_LETTER (insn_letter)); 1.1 root 410: 411: if (insn_class == NO_REGS 412: || (in_p && insn_operand_constraint[(int) icode][!in_p][0] != '=') 413: /* The scratch register's constraint must start with "=&". */ 414: || insn_operand_constraint[(int) icode][2][0] != '=' 415: || insn_operand_constraint[(int) icode][2][1] != '&') 416: abort (); 417: 418: if (reg_class_subset_p (reload_class, insn_class)) 419: mode = insn_operand_mode[(int) icode][2]; 420: else 421: { 1.1.1.2 root 422: char t_letter = insn_operand_constraint[(int) icode][2][2]; 1.1 root 423: class = insn_class; 424: t_mode = insn_operand_mode[(int) icode][2]; 1.1.1.2 root 425: t_class = (t_letter == 'r' ? GENERAL_REGS 426: : REG_CLASS_FROM_LETTER (t_letter)); 1.1 root 427: t_icode = icode; 428: icode = CODE_FOR_nothing; 429: } 430: } 431: 1.1.1.7 ! root 432: /* This case isn't valid, so fail. Reload is allowed to use the same ! 433: register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but ! 434: in the case of a secondary register, we actually need two different ! 435: registers for correct code. We fail here to prevent the possibility of ! 436: silently generating incorrect code later. ! 437: ! 438: The convention is that secondary input reloads are valid only if the ! 439: secondary_class is different from class. If you have such a case, you ! 440: can not use secondary reloads, you must work around the problem some ! 441: other way. ! 442: ! 443: Allow this when MODE is not reload_mode and assume that the generated ! 444: code handles this case (it does on the Alpha, which is the only place ! 445: this currently happens). */ ! 446: ! 447: if (in_p && class == reload_class && mode == reload_mode) ! 448: abort (); 1.1 root 449: 1.1.1.7 ! root 450: /* If we need a tertiary reload, see if we have one we can reuse or else ! 451: make a new one. */ ! 452: ! 453: if (t_class != NO_REGS) ! 454: { ! 455: for (t_reload = 0; t_reload < n_reloads; t_reload++) ! 456: if (reload_secondary_p[t_reload] ! 457: && (reg_class_subset_p (t_class, reload_reg_class[t_reload]) ! 458: || reg_class_subset_p (reload_reg_class[t_reload], t_class)) ! 459: && ((in_p && reload_inmode[t_reload] == t_mode) ! 460: || (! in_p && reload_outmode[t_reload] == t_mode)) ! 461: && ((in_p && (reload_secondary_in_icode[t_reload] ! 462: == CODE_FOR_nothing)) ! 463: || (! in_p &&(reload_secondary_out_icode[t_reload] ! 464: == CODE_FOR_nothing))) ! 465: && (reg_class_size[(int) t_class] == 1 ! 466: #ifdef SMALL_REGISTER_CLASSES ! 467: || 1 ! 468: #endif ! 469: ) ! 470: && MERGABLE_RELOADS (secondary_type, ! 471: reload_when_needed[t_reload], ! 472: opnum, reload_opnum[t_reload])) ! 473: { ! 474: if (in_p) ! 475: reload_inmode[t_reload] = t_mode; ! 476: if (! in_p) ! 477: reload_outmode[t_reload] = t_mode; ! 478: ! 479: if (reg_class_subset_p (t_class, reload_reg_class[t_reload])) ! 480: reload_reg_class[t_reload] = t_class; ! 481: ! 482: reload_opnum[t_reload] = MIN (reload_opnum[t_reload], opnum); ! 483: reload_optional[t_reload] &= optional; ! 484: reload_secondary_p[t_reload] = 1; ! 485: if (MERGE_TO_OTHER (secondary_type, reload_when_needed[t_reload], ! 486: opnum, reload_opnum[t_reload])) ! 487: reload_when_needed[t_reload] = RELOAD_OTHER; ! 488: } ! 489: ! 490: if (t_reload == n_reloads) ! 491: { ! 492: /* We need to make a new tertiary reload for this register class. */ ! 493: reload_in[t_reload] = reload_out[t_reload] = 0; ! 494: reload_reg_class[t_reload] = t_class; ! 495: reload_inmode[t_reload] = in_p ? t_mode : VOIDmode; ! 496: reload_outmode[t_reload] = ! in_p ? t_mode : VOIDmode; ! 497: reload_reg_rtx[t_reload] = 0; ! 498: reload_optional[t_reload] = optional; ! 499: reload_inc[t_reload] = 0; ! 500: /* Maybe we could combine these, but it seems too tricky. */ ! 501: reload_nocombine[t_reload] = 1; ! 502: reload_in_reg[t_reload] = 0; ! 503: reload_opnum[t_reload] = opnum; ! 504: reload_when_needed[t_reload] = secondary_type; ! 505: reload_secondary_in_reload[t_reload] = -1; ! 506: reload_secondary_out_reload[t_reload] = -1; ! 507: reload_secondary_in_icode[t_reload] = CODE_FOR_nothing; ! 508: reload_secondary_out_icode[t_reload] = CODE_FOR_nothing; ! 509: reload_secondary_p[t_reload] = 1; ! 510: ! 511: n_reloads++; ! 512: } ! 513: } ! 514: ! 515: /* See if we can reuse an existing secondary reload. */ ! 516: for (s_reload = 0; s_reload < n_reloads; s_reload++) ! 517: if (reload_secondary_p[s_reload] ! 518: && (reg_class_subset_p (class, reload_reg_class[s_reload]) ! 519: || reg_class_subset_p (reload_reg_class[s_reload], class)) ! 520: && ((in_p && reload_inmode[s_reload] == mode) ! 521: || (! in_p && reload_outmode[s_reload] == mode)) ! 522: && ((in_p && reload_secondary_in_reload[s_reload] == t_reload) ! 523: || (! in_p && reload_secondary_out_reload[s_reload] == t_reload)) ! 524: && ((in_p && reload_secondary_in_icode[s_reload] == t_icode) ! 525: || (! in_p && reload_secondary_out_icode[s_reload] == t_icode)) ! 526: && (reg_class_size[(int) class] == 1 ! 527: #ifdef SMALL_REGISTER_CLASSES ! 528: || 1 ! 529: #endif ! 530: ) ! 531: && MERGABLE_RELOADS (secondary_type, reload_when_needed[s_reload], ! 532: opnum, reload_opnum[s_reload])) ! 533: { ! 534: if (in_p) ! 535: reload_inmode[s_reload] = mode; ! 536: if (! in_p) ! 537: reload_outmode[s_reload] = mode; ! 538: ! 539: if (reg_class_subset_p (class, reload_reg_class[s_reload])) ! 540: reload_reg_class[s_reload] = class; ! 541: ! 542: reload_opnum[s_reload] = MIN (reload_opnum[s_reload], opnum); ! 543: reload_optional[s_reload] &= optional; ! 544: reload_secondary_p[s_reload] = 1; ! 545: if (MERGE_TO_OTHER (secondary_type, reload_when_needed[s_reload], ! 546: opnum, reload_opnum[s_reload])) ! 547: reload_when_needed[s_reload] = RELOAD_OTHER; ! 548: } ! 549: ! 550: if (s_reload == n_reloads) ! 551: { ! 552: /* We need to make a new secondary reload for this register class. */ ! 553: reload_in[s_reload] = reload_out[s_reload] = 0; ! 554: reload_reg_class[s_reload] = class; ! 555: ! 556: reload_inmode[s_reload] = in_p ? mode : VOIDmode; ! 557: reload_outmode[s_reload] = ! in_p ? mode : VOIDmode; ! 558: reload_reg_rtx[s_reload] = 0; ! 559: reload_optional[s_reload] = optional; ! 560: reload_inc[s_reload] = 0; ! 561: /* Maybe we could combine these, but it seems too tricky. */ ! 562: reload_nocombine[s_reload] = 1; ! 563: reload_in_reg[s_reload] = 0; ! 564: reload_opnum[s_reload] = opnum; ! 565: reload_when_needed[s_reload] = secondary_type; ! 566: reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1; ! 567: reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1; ! 568: reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing; ! 569: reload_secondary_out_icode[s_reload] ! 570: = ! in_p ? t_icode : CODE_FOR_nothing; ! 571: reload_secondary_p[s_reload] = 1; ! 572: ! 573: n_reloads++; ! 574: ! 575: #ifdef SECONDARY_MEMORY_NEEDED ! 576: /* If we need a memory location to copy between the two reload regs, ! 577: set it up now. */ ! 578: ! 579: if (in_p && icode == CODE_FOR_nothing ! 580: && SECONDARY_MEMORY_NEEDED (class, reload_class, reload_mode)) ! 581: get_secondary_mem (x, reload_mode, opnum, type); ! 582: ! 583: if (! in_p && icode == CODE_FOR_nothing ! 584: && SECONDARY_MEMORY_NEEDED (reload_class, class, reload_mode)) ! 585: get_secondary_mem (x, reload_mode, opnum, type); ! 586: #endif ! 587: } ! 588: ! 589: *picode = icode; ! 590: return s_reload; 1.1 root 591: } 592: #endif /* HAVE_SECONDARY_RELOADS */ 593: 1.1.1.4 root 594: #ifdef SECONDARY_MEMORY_NEEDED 595: 596: /* Return a memory location that will be used to copy X in mode MODE. 597: If we haven't already made a location for this mode in this insn, 598: call find_reloads_address on the location being returned. */ 599: 600: rtx 1.1.1.5 root 601: get_secondary_mem (x, mode, opnum, type) 1.1.1.4 root 602: rtx x; 603: enum machine_mode mode; 1.1.1.5 root 604: int opnum; 605: enum reload_type type; 1.1.1.4 root 606: { 607: rtx loc; 608: int mem_valid; 609: 1.1.1.7 ! root 610: /* By default, if MODE is narrower than a word, widen it to a word. ! 611: This is required because most machines that require these memory ! 612: locations do not support short load and stores from all registers ! 613: (e.g., FP registers). */ 1.1.1.4 root 614: 1.1.1.7 ! root 615: #ifdef SECONDARY_MEMORY_NEEDED_MODE ! 616: mode = SECONDARY_MEMORY_NEEDED_MODE (mode); ! 617: #else 1.1.1.4 root 618: if (GET_MODE_BITSIZE (mode) < BITS_PER_WORD) 619: mode = mode_for_size (BITS_PER_WORD, GET_MODE_CLASS (mode), 0); 1.1.1.7 ! root 620: #endif 1.1.1.4 root 621: 1.1.1.5 root 622: /* If we already have made a MEM for this operand in MODE, return it. */ 623: if (secondary_memlocs_elim[(int) mode][opnum] != 0) 624: return secondary_memlocs_elim[(int) mode][opnum]; 1.1.1.4 root 625: 626: /* If this is the first time we've tried to get a MEM for this mode, 627: allocate a new one. `something_changed' in reload will get set 628: by noticing that the frame size has changed. */ 629: 630: if (secondary_memlocs[(int) mode] == 0) 1.1.1.5 root 631: { 632: #ifdef SECONDARY_MEMORY_NEEDED_RTX 633: secondary_memlocs[(int) mode] = SECONDARY_MEMORY_NEEDED_RTX (mode); 634: #else 635: secondary_memlocs[(int) mode] 636: = assign_stack_local (mode, GET_MODE_SIZE (mode), 0); 637: #endif 638: } 1.1.1.4 root 639: 640: /* Get a version of the address doing any eliminations needed. If that 641: didn't give us a new MEM, make a new one if it isn't valid. */ 642: 1.1.1.5 root 643: loc = eliminate_regs (secondary_memlocs[(int) mode], VOIDmode, NULL_RTX); 1.1.1.4 root 644: mem_valid = strict_memory_address_p (mode, XEXP (loc, 0)); 645: 646: if (! mem_valid && loc == secondary_memlocs[(int) mode]) 647: loc = copy_rtx (loc); 648: 649: /* The only time the call below will do anything is if the stack 650: offset is too large. In that case IND_LEVELS doesn't matter, so we 1.1.1.5 root 651: can just pass a zero. Adjust the type to be the address of the 652: corresponding object. If the address was valid, save the eliminated 653: address. If it wasn't valid, we need to make a reload each time, so 654: don't save it. */ 1.1.1.4 root 655: 1.1.1.5 root 656: if (! mem_valid) 657: { 658: type = (type == RELOAD_FOR_INPUT ? RELOAD_FOR_INPUT_ADDRESS 659: : type == RELOAD_FOR_OUTPUT ? RELOAD_FOR_OUTPUT_ADDRESS 660: : RELOAD_OTHER); 1.1.1.4 root 661: 1.1.1.5 root 662: find_reloads_address (mode, NULL_PTR, XEXP (loc, 0), &XEXP (loc, 0), 663: opnum, type, 0); 664: } 1.1.1.4 root 665: 1.1.1.5 root 666: secondary_memlocs_elim[(int) mode][opnum] = loc; 1.1.1.4 root 667: return loc; 668: } 669: 670: /* Clear any secondary memory locations we've made. */ 671: 672: void 673: clear_secondary_mem () 674: { 1.1.1.7 ! root 675: bzero ((char *) secondary_memlocs, sizeof secondary_memlocs); 1.1.1.4 root 676: } 677: #endif /* SECONDARY_MEMORY_NEEDED */ 678: 1.1.1.5 root 679: /* Record one reload that needs to be performed. 1.1 root 680: IN is an rtx saying where the data are to be found before this instruction. 681: OUT says where they must be stored after the instruction. 682: (IN is zero for data not read, and OUT is zero for data not written.) 683: INLOC and OUTLOC point to the places in the instructions where 684: IN and OUT were found. 1.1.1.5 root 685: If IN and OUT are both non-zero, it means the same register must be used 686: to reload both IN and OUT. 687: 1.1 root 688: CLASS is a register class required for the reloaded data. 689: INMODE is the machine mode that the instruction requires 690: for the reg that replaces IN and OUTMODE is likewise for OUT. 691: 692: If IN is zero, then OUT's location and mode should be passed as 693: INLOC and INMODE. 694: 695: STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx. 696: 697: OPTIONAL nonzero means this reload does not need to be performed: 698: it can be discarded if that is more convenient. 699: 1.1.1.5 root 700: OPNUM and TYPE say what the purpose of this reload is. 701: 1.1 root 702: The return value is the reload-number for this reload. 703: 704: If both IN and OUT are nonzero, in some rare cases we might 705: want to make two separate reloads. (Actually we never do this now.) 706: Therefore, the reload-number for OUT is stored in 707: output_reloadnum when we return; the return value applies to IN. 708: Usually (presently always), when IN and OUT are nonzero, 709: the two reload-numbers are equal, but the caller should be careful to 710: distinguish them. */ 711: 712: static int 713: push_reload (in, out, inloc, outloc, class, 1.1.1.5 root 714: inmode, outmode, strict_low, optional, opnum, type) 1.1 root 715: register rtx in, out; 716: rtx *inloc, *outloc; 717: enum reg_class class; 718: enum machine_mode inmode, outmode; 719: int strict_low; 720: int optional; 1.1.1.5 root 721: int opnum; 722: enum reload_type type; 1.1 root 723: { 724: register int i; 725: int dont_share = 0; 726: rtx *in_subreg_loc = 0, *out_subreg_loc = 0; 1.1.1.7 ! root 727: int secondary_in_reload = -1, secondary_out_reload = -1; ! 728: enum insn_code secondary_in_icode, secondary_out_icode; 1.1.1.5 root 729: 1.1 root 730: /* INMODE and/or OUTMODE could be VOIDmode if no mode 731: has been specified for the operand. In that case, 732: use the operand's mode as the mode to reload. */ 733: if (inmode == VOIDmode && in != 0) 734: inmode = GET_MODE (in); 735: if (outmode == VOIDmode && out != 0) 736: outmode = GET_MODE (out); 737: 738: /* If IN is a pseudo register everywhere-equivalent to a constant, and 739: it is not in a hard register, reload straight from the constant, 740: since we want to get rid of such pseudo registers. 741: Often this is done earlier, but not always in find_reloads_address. */ 742: if (in != 0 && GET_CODE (in) == REG) 743: { 744: register int regno = REGNO (in); 745: 746: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 747: && reg_equiv_constant[regno] != 0) 748: in = reg_equiv_constant[regno]; 749: } 750: 751: /* Likewise for OUT. Of course, OUT will never be equivalent to 752: an actual constant, but it might be equivalent to a memory location 753: (in the case of a parameter). */ 754: if (out != 0 && GET_CODE (out) == REG) 755: { 756: register int regno = REGNO (out); 757: 758: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 759: && reg_equiv_constant[regno] != 0) 760: out = reg_equiv_constant[regno]; 761: } 762: 763: /* If we have a read-write operand with an address side-effect, 764: change either IN or OUT so the side-effect happens only once. */ 765: if (in != 0 && out != 0 && GET_CODE (in) == MEM && rtx_equal_p (in, out)) 766: { 767: if (GET_CODE (XEXP (in, 0)) == POST_INC 768: || GET_CODE (XEXP (in, 0)) == POST_DEC) 769: in = gen_rtx (MEM, GET_MODE (in), XEXP (XEXP (in, 0), 0)); 770: if (GET_CODE (XEXP (in, 0)) == PRE_INC 771: || GET_CODE (XEXP (in, 0)) == PRE_DEC) 772: out = gen_rtx (MEM, GET_MODE (out), XEXP (XEXP (out, 0), 0)); 773: } 774: 1.1.1.6 root 775: /* If we are reloading a (SUBREG constant ...), really reload just the 776: inside expression in its own mode. Similarly for (SUBREG (PLUS ...)). 777: If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still 778: a pseudo and hence will become a MEM) with M1 wider than M2 and the 779: register is a pseudo, also reload the inside expression. 780: For machines that extend byte loads, do this for any SUBREG of a pseudo 1.1.1.7 ! root 781: where both M1 and M2 are a word or smaller, M1 is wider than M2, and ! 782: M2 is an integral mode that gets extended when loaded. 1.1.1.5 root 783: Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 1.1 root 784: either M1 is not valid for R or M2 is wider than a word but we only 785: need one word to store an M2-sized quantity in R. 1.1.1.5 root 786: (However, if OUT is nonzero, we need to reload the reg *and* 787: the subreg, so do nothing here, and let following statement handle it.) 788: 1.1 root 789: Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere; 790: we can't handle it here because CONST_INT does not indicate a mode. 791: 792: Similarly, we must reload the inside expression if we have a 1.1.1.4 root 793: STRICT_LOW_PART (presumably, in == out in the cas). 794: 795: Also reload the inner expression if it does not require a secondary 1.1.1.7 ! root 796: reload but the SUBREG does. ! 797: ! 798: Finally, reload the inner expression if it is a register that is in ! 799: the class whose registers cannot be referenced in a different size ! 800: and M1 is not the same size as M2. */ 1.1 root 801: 802: if (in != 0 && GET_CODE (in) == SUBREG 1.1.1.6 root 803: && (CONSTANT_P (SUBREG_REG (in)) 804: || GET_CODE (SUBREG_REG (in)) == PLUS 1.1 root 805: || strict_low 1.1.1.6 root 806: || (((GET_CODE (SUBREG_REG (in)) == REG 807: && REGNO (SUBREG_REG (in)) >= FIRST_PSEUDO_REGISTER) 808: || GET_CODE (SUBREG_REG (in)) == MEM) 809: && ((GET_MODE_SIZE (inmode) 810: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) 811: #ifdef LOAD_EXTEND_OP 812: || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 813: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 814: <= UNITS_PER_WORD) 815: && (GET_MODE_SIZE (inmode) 1.1.1.7 ! root 816: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in)))) ! 817: && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in))) ! 818: && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in))) != NIL) 1.1.1.6 root 819: #endif 820: )) 1.1 root 821: || (GET_CODE (SUBREG_REG (in)) == REG 1.1.1.6 root 822: && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 1.1.1.5 root 823: /* The case where out is nonzero 824: is handled differently in the following statement. */ 825: && (out == 0 || SUBREG_WORD (in) == 0) 1.1.1.6 root 826: && ((GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 827: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 828: > UNITS_PER_WORD) 829: && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 830: / UNITS_PER_WORD) 831: != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 832: GET_MODE (SUBREG_REG (in))))) 833: || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in)) 834: + SUBREG_WORD (in)), 835: inmode))) 1.1.1.4 root 836: #ifdef SECONDARY_INPUT_RELOAD_CLASS 837: || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode, in) != NO_REGS 838: && (SECONDARY_INPUT_RELOAD_CLASS (class, 839: GET_MODE (SUBREG_REG (in)), 840: SUBREG_REG (in)) 841: == NO_REGS)) 842: #endif 1.1.1.7 ! root 843: #ifdef CLASS_CANNOT_CHANGE_SIZE ! 844: || (GET_CODE (SUBREG_REG (in)) == REG ! 845: && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER ! 846: && (TEST_HARD_REG_BIT ! 847: (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], ! 848: REGNO (SUBREG_REG (in)))) ! 849: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) ! 850: != GET_MODE_SIZE (inmode))) ! 851: #endif 1.1.1.4 root 852: )) 1.1 root 853: { 854: in_subreg_loc = inloc; 855: inloc = &SUBREG_REG (in); 856: in = *inloc; 1.1.1.6 root 857: #ifndef LOAD_EXTEND_OP 1.1 root 858: if (GET_CODE (in) == MEM) 859: /* This is supposed to happen only for paradoxical subregs made by 860: combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */ 861: if (GET_MODE_SIZE (GET_MODE (in)) > GET_MODE_SIZE (inmode)) 862: abort (); 1.1.1.5 root 863: #endif 1.1 root 864: inmode = GET_MODE (in); 865: } 866: 1.1.1.5 root 867: /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where 868: either M1 is not valid for R or M2 is wider than a word but we only 869: need one word to store an M2-sized quantity in R. 870: 871: However, we must reload the inner reg *as well as* the subreg in 872: that case. */ 873: 874: if (in != 0 && GET_CODE (in) == SUBREG 875: && GET_CODE (SUBREG_REG (in)) == REG 876: && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER 877: && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in)), inmode) 878: || (GET_MODE_SIZE (inmode) <= UNITS_PER_WORD 879: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 880: > UNITS_PER_WORD) 881: && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 882: / UNITS_PER_WORD) 883: != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in)), 884: GET_MODE (SUBREG_REG (in))))))) 885: { 886: push_reload (SUBREG_REG (in), NULL_RTX, &SUBREG_REG (in), NULL_PTR, 887: GENERAL_REGS, VOIDmode, VOIDmode, 0, 0, opnum, type); 888: } 889: 890: 1.1 root 891: /* Similarly for paradoxical and problematical SUBREGs on the output. 892: Note that there is no reason we need worry about the previous value 893: of SUBREG_REG (out); even if wider than out, 894: storing in a subreg is entitled to clobber it all 895: (except in the case of STRICT_LOW_PART, 896: and in that case the constraint should label it input-output.) */ 897: if (out != 0 && GET_CODE (out) == SUBREG 1.1.1.6 root 898: && (CONSTANT_P (SUBREG_REG (out)) 1.1 root 899: || strict_low 1.1.1.6 root 900: || (((GET_CODE (SUBREG_REG (out)) == REG 901: && REGNO (SUBREG_REG (out)) >= FIRST_PSEUDO_REGISTER) 902: || GET_CODE (SUBREG_REG (out)) == MEM) 903: && ((GET_MODE_SIZE (outmode) 1.1.1.7 ! root 904: > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out)))))) 1.1.1.6 root 905: || (GET_CODE (SUBREG_REG (out)) == REG 906: && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER 907: && ((GET_MODE_SIZE (outmode) <= UNITS_PER_WORD 908: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 909: > UNITS_PER_WORD) 910: && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) 911: / UNITS_PER_WORD) 912: != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out)), 913: GET_MODE (SUBREG_REG (out))))) 914: || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out)) 915: + SUBREG_WORD (out)), 916: outmode))) 1.1.1.4 root 917: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS 918: || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode, out) != NO_REGS 919: && (SECONDARY_OUTPUT_RELOAD_CLASS (class, 920: GET_MODE (SUBREG_REG (out)), 921: SUBREG_REG (out)) 922: == NO_REGS)) 923: #endif 1.1.1.7 ! root 924: #ifdef CLASS_CANNOT_CHANGE_SIZE ! 925: || (GET_CODE (SUBREG_REG (out)) == REG ! 926: && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER ! 927: && (TEST_HARD_REG_BIT ! 928: (reg_class_contents[(int) CLASS_CANNOT_CHANGE_SIZE], ! 929: REGNO (SUBREG_REG (out)))) ! 930: && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out))) ! 931: != GET_MODE_SIZE (outmode))) ! 932: #endif 1.1.1.4 root 933: )) 1.1 root 934: { 935: out_subreg_loc = outloc; 936: outloc = &SUBREG_REG (out); 1.1.1.5 root 937: out = *outloc; 1.1.1.6 root 938: #ifndef LOAD_EXTEND_OP 1.1.1.5 root 939: if (GET_CODE (out) == MEM 1.1 root 940: && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) 941: abort (); 1.1.1.5 root 942: #endif 1.1 root 943: outmode = GET_MODE (out); 944: } 945: 946: /* If IN appears in OUT, we can't share any input-only reload for IN. */ 947: if (in != 0 && out != 0 && GET_CODE (out) == MEM 948: && (GET_CODE (in) == REG || GET_CODE (in) == MEM) 1.1.1.3 root 949: && reg_overlap_mentioned_for_reload_p (in, XEXP (out, 0))) 1.1 root 950: dont_share = 1; 951: 1.1.1.4 root 952: /* If IN is a SUBREG of a hard register, make a new REG. This 953: simplifies some of the cases below. */ 954: 955: if (in != 0 && GET_CODE (in) == SUBREG && GET_CODE (SUBREG_REG (in)) == REG 956: && REGNO (SUBREG_REG (in)) < FIRST_PSEUDO_REGISTER) 957: in = gen_rtx (REG, GET_MODE (in), 958: REGNO (SUBREG_REG (in)) + SUBREG_WORD (in)); 959: 960: /* Similarly for OUT. */ 961: if (out != 0 && GET_CODE (out) == SUBREG 962: && GET_CODE (SUBREG_REG (out)) == REG 963: && REGNO (SUBREG_REG (out)) < FIRST_PSEUDO_REGISTER) 964: out = gen_rtx (REG, GET_MODE (out), 965: REGNO (SUBREG_REG (out)) + SUBREG_WORD (out)); 966: 1.1 root 967: /* Narrow down the class of register wanted if that is 968: desirable on this machine for efficiency. */ 969: if (in != 0) 970: class = PREFERRED_RELOAD_CLASS (in, class); 971: 1.1.1.5 root 972: /* Output reloads may need analogous treatment, different in detail. */ 1.1.1.4 root 973: #ifdef PREFERRED_OUTPUT_RELOAD_CLASS 974: if (out != 0) 975: class = PREFERRED_OUTPUT_RELOAD_CLASS (out, class); 976: #endif 977: 1.1 root 978: /* Make sure we use a class that can handle the actual pseudo 979: inside any subreg. For example, on the 386, QImode regs 980: can appear within SImode subregs. Although GENERAL_REGS 981: can handle SImode, QImode needs a smaller class. */ 982: #ifdef LIMIT_RELOAD_CLASS 983: if (in_subreg_loc) 984: class = LIMIT_RELOAD_CLASS (inmode, class); 985: else if (in != 0 && GET_CODE (in) == SUBREG) 986: class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in)), class); 987: 988: if (out_subreg_loc) 989: class = LIMIT_RELOAD_CLASS (outmode, class); 990: if (out != 0 && GET_CODE (out) == SUBREG) 991: class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out)), class); 992: #endif 993: 994: /* Verify that this class is at least possible for the mode that 995: is specified. */ 996: if (this_insn_is_asm) 997: { 998: enum machine_mode mode; 999: if (GET_MODE_SIZE (inmode) > GET_MODE_SIZE (outmode)) 1000: mode = inmode; 1001: else 1002: mode = outmode; 1.1.1.5 root 1003: if (mode == VOIDmode) 1004: { 1005: error_for_asm (this_insn, "cannot reload integer constant operand in `asm'"); 1006: mode = word_mode; 1007: if (in != 0) 1008: inmode = word_mode; 1009: if (out != 0) 1010: outmode = word_mode; 1011: } 1.1 root 1012: for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 1013: if (HARD_REGNO_MODE_OK (i, mode) 1014: && TEST_HARD_REG_BIT (reg_class_contents[(int) class], i)) 1015: { 1016: int nregs = HARD_REGNO_NREGS (i, mode); 1017: 1018: int j; 1019: for (j = 1; j < nregs; j++) 1020: if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], i + j)) 1021: break; 1022: if (j == nregs) 1023: break; 1024: } 1025: if (i == FIRST_PSEUDO_REGISTER) 1026: { 1027: error_for_asm (this_insn, "impossible register constraint in `asm'"); 1028: class = ALL_REGS; 1029: } 1030: } 1031: 1.1.1.5 root 1032: if (class == NO_REGS) 1033: abort (); 1034: 1.1 root 1035: /* We can use an existing reload if the class is right 1036: and at least one of IN and OUT is a match 1037: and the other is at worst neutral. 1.1.1.5 root 1038: (A zero compared against anything is neutral.) 1039: 1040: If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are 1041: for the same thing since that can cause us to need more reload registers 1042: than we otherwise would. */ 1043: 1.1 root 1044: for (i = 0; i < n_reloads; i++) 1045: if ((reg_class_subset_p (class, reload_reg_class[i]) 1046: || reg_class_subset_p (reload_reg_class[i], class)) 1047: /* If the existing reload has a register, it must fit our class. */ 1048: && (reload_reg_rtx[i] == 0 1049: || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1050: true_regnum (reload_reg_rtx[i]))) 1051: && ((in != 0 && MATCHES (reload_in[i], in) && ! dont_share 1052: && (out == 0 || reload_out[i] == 0 || MATCHES (reload_out[i], out))) 1053: || 1054: (out != 0 && MATCHES (reload_out[i], out) 1.1.1.5 root 1055: && (in == 0 || reload_in[i] == 0 || MATCHES (reload_in[i], in)))) 1056: && (reg_class_size[(int) class] == 1 1057: #ifdef SMALL_REGISTER_CLASSES 1058: || 1 1059: #endif 1060: ) 1061: && MERGABLE_RELOADS (type, reload_when_needed[i], 1062: opnum, reload_opnum[i])) 1.1 root 1063: break; 1064: 1065: /* Reloading a plain reg for input can match a reload to postincrement 1066: that reg, since the postincrement's value is the right value. 1067: Likewise, it can match a preincrement reload, since we regard 1068: the preincrementation as happening before any ref in this insn 1069: to that register. */ 1070: if (i == n_reloads) 1071: for (i = 0; i < n_reloads; i++) 1072: if ((reg_class_subset_p (class, reload_reg_class[i]) 1073: || reg_class_subset_p (reload_reg_class[i], class)) 1074: /* If the existing reload has a register, it must fit our class. */ 1075: && (reload_reg_rtx[i] == 0 1076: || TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1077: true_regnum (reload_reg_rtx[i]))) 1078: && out == 0 && reload_out[i] == 0 && reload_in[i] != 0 1079: && ((GET_CODE (in) == REG 1080: && (GET_CODE (reload_in[i]) == POST_INC 1081: || GET_CODE (reload_in[i]) == POST_DEC 1082: || GET_CODE (reload_in[i]) == PRE_INC 1083: || GET_CODE (reload_in[i]) == PRE_DEC) 1084: && MATCHES (XEXP (reload_in[i], 0), in)) 1085: || 1086: (GET_CODE (reload_in[i]) == REG 1087: && (GET_CODE (in) == POST_INC 1088: || GET_CODE (in) == POST_DEC 1089: || GET_CODE (in) == PRE_INC 1090: || GET_CODE (in) == PRE_DEC) 1.1.1.5 root 1091: && MATCHES (XEXP (in, 0), reload_in[i]))) 1092: && (reg_class_size[(int) class] == 1 1093: #ifdef SMALL_REGISTER_CLASSES 1094: || 1 1095: #endif 1096: ) 1097: && MERGABLE_RELOADS (type, reload_when_needed[i], 1098: opnum, reload_opnum[i])) 1.1 root 1099: { 1100: /* Make sure reload_in ultimately has the increment, 1101: not the plain register. */ 1102: if (GET_CODE (in) == REG) 1103: in = reload_in[i]; 1104: break; 1105: } 1106: 1107: if (i == n_reloads) 1108: { 1.1.1.7 ! root 1109: /* See if we need a secondary reload register to move between CLASS ! 1110: and IN or CLASS and OUT. Get the icode and push any required reloads ! 1111: needed for each of them if so. */ 1.1 root 1112: 1113: #ifdef SECONDARY_INPUT_RELOAD_CLASS 1114: if (in != 0) 1.1.1.7 ! root 1115: secondary_in_reload ! 1116: = push_secondary_reload (1, in, opnum, optional, class, inmode, type, ! 1117: &secondary_in_icode); 1.1 root 1118: #endif 1119: 1120: #ifdef SECONDARY_OUTPUT_RELOAD_CLASS 1121: if (out != 0 && GET_CODE (out) != SCRATCH) 1.1.1.7 ! root 1122: secondary_out_reload ! 1123: = push_secondary_reload (0, out, opnum, optional, class, outmode, ! 1124: type, &secondary_out_icode); 1.1 root 1125: #endif 1126: 1127: /* We found no existing reload suitable for re-use. 1128: So add an additional reload. */ 1129: 1.1.1.7 ! root 1130: i = n_reloads; 1.1 root 1131: reload_in[i] = in; 1132: reload_out[i] = out; 1133: reload_reg_class[i] = class; 1134: reload_inmode[i] = inmode; 1135: reload_outmode[i] = outmode; 1136: reload_reg_rtx[i] = 0; 1137: reload_optional[i] = optional; 1138: reload_inc[i] = 0; 1139: reload_nocombine[i] = 0; 1140: reload_in_reg[i] = inloc ? *inloc : 0; 1.1.1.5 root 1141: reload_opnum[i] = opnum; 1142: reload_when_needed[i] = type; 1.1.1.7 ! root 1143: reload_secondary_in_reload[i] = secondary_in_reload; ! 1144: reload_secondary_out_reload[i] = secondary_out_reload; ! 1145: reload_secondary_in_icode[i] = secondary_in_icode; ! 1146: reload_secondary_out_icode[i] = secondary_out_icode; 1.1 root 1147: reload_secondary_p[i] = 0; 1148: 1149: n_reloads++; 1.1.1.4 root 1150: 1151: #ifdef SECONDARY_MEMORY_NEEDED 1152: /* If a memory location is needed for the copy, make one. */ 1153: if (in != 0 && GET_CODE (in) == REG 1154: && REGNO (in) < FIRST_PSEUDO_REGISTER 1155: && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in)), 1156: class, inmode)) 1.1.1.5 root 1157: get_secondary_mem (in, inmode, opnum, type); 1.1.1.4 root 1158: 1159: if (out != 0 && GET_CODE (out) == REG 1160: && REGNO (out) < FIRST_PSEUDO_REGISTER 1161: && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out)), 1162: outmode)) 1.1.1.5 root 1163: get_secondary_mem (out, outmode, opnum, type); 1.1.1.4 root 1164: #endif 1.1 root 1165: } 1166: else 1167: { 1168: /* We are reusing an existing reload, 1169: but we may have additional information for it. 1170: For example, we may now have both IN and OUT 1171: while the old one may have just one of them. */ 1172: 1173: if (inmode != VOIDmode) 1174: reload_inmode[i] = inmode; 1175: if (outmode != VOIDmode) 1176: reload_outmode[i] = outmode; 1177: if (in != 0) 1178: reload_in[i] = in; 1179: if (out != 0) 1180: reload_out[i] = out; 1181: if (reg_class_subset_p (class, reload_reg_class[i])) 1182: reload_reg_class[i] = class; 1183: reload_optional[i] &= optional; 1.1.1.5 root 1184: if (MERGE_TO_OTHER (type, reload_when_needed[i], 1185: opnum, reload_opnum[i])) 1186: reload_when_needed[i] = RELOAD_OTHER; 1187: reload_opnum[i] = MIN (reload_opnum[i], opnum); 1.1 root 1188: } 1189: 1190: /* If the ostensible rtx being reload differs from the rtx found 1191: in the location to substitute, this reload is not safe to combine 1192: because we cannot reliably tell whether it appears in the insn. */ 1193: 1194: if (in != 0 && in != *inloc) 1195: reload_nocombine[i] = 1; 1196: 1197: #if 0 1198: /* This was replaced by changes in find_reloads_address_1 and the new 1199: function inc_for_reload, which go with a new meaning of reload_inc. */ 1200: 1201: /* If this is an IN/OUT reload in an insn that sets the CC, 1202: it must be for an autoincrement. It doesn't work to store 1203: the incremented value after the insn because that would clobber the CC. 1204: So we must do the increment of the value reloaded from, 1205: increment it, store it back, then decrement again. */ 1206: if (out != 0 && sets_cc0_p (PATTERN (this_insn))) 1207: { 1208: out = 0; 1209: reload_out[i] = 0; 1210: reload_inc[i] = find_inc_amount (PATTERN (this_insn), in); 1211: /* If we did not find a nonzero amount-to-increment-by, 1212: that contradicts the belief that IN is being incremented 1213: in an address in this insn. */ 1214: if (reload_inc[i] == 0) 1215: abort (); 1216: } 1217: #endif 1218: 1219: /* If we will replace IN and OUT with the reload-reg, 1220: record where they are located so that substitution need 1221: not do a tree walk. */ 1222: 1223: if (replace_reloads) 1224: { 1225: if (inloc != 0) 1226: { 1227: register struct replacement *r = &replacements[n_replacements++]; 1228: r->what = i; 1229: r->subreg_loc = in_subreg_loc; 1230: r->where = inloc; 1231: r->mode = inmode; 1232: } 1233: if (outloc != 0 && outloc != inloc) 1234: { 1235: register struct replacement *r = &replacements[n_replacements++]; 1236: r->what = i; 1237: r->where = outloc; 1238: r->subreg_loc = out_subreg_loc; 1239: r->mode = outmode; 1240: } 1241: } 1242: 1243: /* If this reload is just being introduced and it has both 1244: an incoming quantity and an outgoing quantity that are 1245: supposed to be made to match, see if either one of the two 1246: can serve as the place to reload into. 1247: 1248: If one of them is acceptable, set reload_reg_rtx[i] 1249: to that one. */ 1250: 1251: if (in != 0 && out != 0 && in != out && reload_reg_rtx[i] == 0) 1252: { 1253: reload_reg_rtx[i] = find_dummy_reload (in, out, inloc, outloc, 1.1.1.6 root 1254: inmode, outmode, 1.1 root 1255: reload_reg_class[i], i); 1256: 1257: /* If the outgoing register already contains the same value 1258: as the incoming one, we can dispense with loading it. 1259: The easiest way to tell the caller that is to give a phony 1260: value for the incoming operand (same as outgoing one). */ 1261: if (reload_reg_rtx[i] == out 1262: && (GET_CODE (in) == REG || CONSTANT_P (in)) 1263: && 0 != find_equiv_reg (in, this_insn, 0, REGNO (out), 1264: static_reload_reg_p, i, inmode)) 1265: reload_in[i] = out; 1266: } 1267: 1268: /* If this is an input reload and the operand contains a register that 1269: dies in this insn and is used nowhere else, see if it is the right class 1270: to be used for this reload. Use it if so. (This occurs most commonly 1271: in the case of paradoxical SUBREGs and in-out reloads). We cannot do 1272: this if it is also an output reload that mentions the register unless 1273: the output is a SUBREG that clobbers an entire register. 1274: 1275: Note that the operand might be one of the spill regs, if it is a 1276: pseudo reg and we are in a block where spilling has not taken place. 1277: But if there is no spilling in this block, that is OK. 1278: An explicitly used hard reg cannot be a spill reg. */ 1279: 1280: if (reload_reg_rtx[i] == 0 && in != 0) 1281: { 1282: rtx note; 1283: int regno; 1284: 1285: for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1286: if (REG_NOTE_KIND (note) == REG_DEAD 1287: && GET_CODE (XEXP (note, 0)) == REG 1288: && (regno = REGNO (XEXP (note, 0))) < FIRST_PSEUDO_REGISTER 1289: && reg_mentioned_p (XEXP (note, 0), in) 1290: && ! refers_to_regno_for_reload_p (regno, 1291: (regno 1292: + HARD_REGNO_NREGS (regno, 1293: inmode)), 1294: PATTERN (this_insn), inloc) 1.1.1.5 root 1295: /* If this is also an output reload, IN cannot be used as 1296: the reload register if it is set in this insn unless IN 1297: is also OUT. */ 1298: && (out == 0 || in == out 1299: || ! hard_reg_set_here_p (regno, 1300: (regno 1301: + HARD_REGNO_NREGS (regno, 1302: inmode)), 1303: PATTERN (this_insn))) 1304: /* ??? Why is this code so different from the previous? 1305: Is there any simple coherent way to describe the two together? 1306: What's going on here. */ 1.1 root 1307: && (in != out 1308: || (GET_CODE (in) == SUBREG 1309: && (((GET_MODE_SIZE (GET_MODE (in)) + (UNITS_PER_WORD - 1)) 1310: / UNITS_PER_WORD) 1311: == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in))) 1312: + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)))) 1313: /* Make sure the operand fits in the reg that dies. */ 1314: && GET_MODE_SIZE (inmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1315: && HARD_REGNO_MODE_OK (regno, inmode) 1316: && GET_MODE_SIZE (outmode) <= GET_MODE_SIZE (GET_MODE (XEXP (note, 0))) 1317: && HARD_REGNO_MODE_OK (regno, outmode) 1318: && TEST_HARD_REG_BIT (reg_class_contents[(int) class], regno) 1319: && !fixed_regs[regno]) 1320: { 1321: reload_reg_rtx[i] = gen_rtx (REG, inmode, regno); 1322: break; 1323: } 1324: } 1325: 1326: if (out) 1327: output_reloadnum = i; 1328: 1329: return i; 1330: } 1331: 1332: /* Record an additional place we must replace a value 1333: for which we have already recorded a reload. 1334: RELOADNUM is the value returned by push_reload 1335: when the reload was recorded. 1336: This is used in insn patterns that use match_dup. */ 1337: 1338: static void 1339: push_replacement (loc, reloadnum, mode) 1340: rtx *loc; 1341: int reloadnum; 1342: enum machine_mode mode; 1343: { 1344: if (replace_reloads) 1345: { 1346: register struct replacement *r = &replacements[n_replacements++]; 1347: r->what = reloadnum; 1348: r->where = loc; 1349: r->subreg_loc = 0; 1350: r->mode = mode; 1351: } 1352: } 1353: 1.1.1.5 root 1354: /* Transfer all replacements that used to be in reload FROM to be in 1355: reload TO. */ 1356: 1357: void 1358: transfer_replacements (to, from) 1359: int to, from; 1360: { 1361: int i; 1362: 1363: for (i = 0; i < n_replacements; i++) 1364: if (replacements[i].what == from) 1365: replacements[i].what = to; 1366: } 1367: 1.1 root 1368: /* If there is only one output reload, and it is not for an earlyclobber 1369: operand, try to combine it with a (logically unrelated) input reload 1370: to reduce the number of reload registers needed. 1371: 1372: This is safe if the input reload does not appear in 1373: the value being output-reloaded, because this implies 1374: it is not needed any more once the original insn completes. 1375: 1376: If that doesn't work, see we can use any of the registers that 1377: die in this insn as a reload register. We can if it is of the right 1378: class and does not appear in the value being output-reloaded. */ 1379: 1380: static void 1381: combine_reloads () 1382: { 1383: int i; 1384: int output_reload = -1; 1385: rtx note; 1386: 1387: /* Find the output reload; return unless there is exactly one 1388: and that one is mandatory. */ 1389: 1390: for (i = 0; i < n_reloads; i++) 1391: if (reload_out[i] != 0) 1392: { 1393: if (output_reload >= 0) 1394: return; 1395: output_reload = i; 1396: } 1397: 1398: if (output_reload < 0 || reload_optional[output_reload]) 1399: return; 1400: 1401: /* An input-output reload isn't combinable. */ 1402: 1403: if (reload_in[output_reload] != 0) 1404: return; 1405: 1.1.1.3 root 1406: /* If this reload is for an earlyclobber operand, we can't do anything. */ 1.1.1.6 root 1407: if (earlyclobber_operand_p (reload_out[output_reload])) 1408: return; 1.1 root 1409: 1410: /* Check each input reload; can we combine it? */ 1411: 1412: for (i = 0; i < n_reloads; i++) 1413: if (reload_in[i] && ! reload_optional[i] && ! reload_nocombine[i] 1414: /* Life span of this reload must not extend past main insn. */ 1.1.1.5 root 1415: && reload_when_needed[i] != RELOAD_FOR_OUTPUT_ADDRESS 1416: && reload_when_needed[i] != RELOAD_OTHER 1417: && (CLASS_MAX_NREGS (reload_reg_class[i], reload_inmode[i]) 1418: == CLASS_MAX_NREGS (reload_reg_class[output_reload], 1419: reload_outmode[output_reload])) 1.1 root 1420: && reload_inc[i] == 0 1421: && reload_reg_rtx[i] == 0 1.1.1.5 root 1422: #ifdef SECONDARY_MEMORY_NEEDED 1.1.1.7 ! root 1423: /* Don't combine two reloads with different secondary ! 1424: memory locations. */ 1.1.1.5 root 1425: && (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] == 0 1426: || secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] == 0 1427: || rtx_equal_p (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]], 1428: secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]])) 1429: #endif 1430: #ifdef SMALL_REGISTER_CLASSES 1431: && reload_reg_class[i] == reload_reg_class[output_reload] 1432: #else 1.1 root 1433: && (reg_class_subset_p (reload_reg_class[i], 1434: reload_reg_class[output_reload]) 1435: || reg_class_subset_p (reload_reg_class[output_reload], 1436: reload_reg_class[i])) 1.1.1.5 root 1437: #endif 1.1 root 1438: && (MATCHES (reload_in[i], reload_out[output_reload]) 1439: /* Args reversed because the first arg seems to be 1440: the one that we imagine being modified 1441: while the second is the one that might be affected. */ 1.1.1.3 root 1442: || (! reg_overlap_mentioned_for_reload_p (reload_out[output_reload], 1443: reload_in[i]) 1.1 root 1444: /* However, if the input is a register that appears inside 1445: the output, then we also can't share. 1446: Imagine (set (mem (reg 69)) (plus (reg 69) ...)). 1447: If the same reload reg is used for both reg 69 and the 1448: result to be stored in memory, then that result 1449: will clobber the address of the memory ref. */ 1450: && ! (GET_CODE (reload_in[i]) == REG 1.1.1.3 root 1451: && reg_overlap_mentioned_for_reload_p (reload_in[i], 1.1.1.5 root 1452: reload_out[output_reload])))) 1453: && (reg_class_size[(int) reload_reg_class[i]] 1454: #ifdef SMALL_REGISTER_CLASSES 1455: || 1 1456: #endif 1457: ) 1458: /* We will allow making things slightly worse by combining an 1459: input and an output, but no worse than that. */ 1460: && (reload_when_needed[i] == RELOAD_FOR_INPUT 1461: || reload_when_needed[i] == RELOAD_FOR_OUTPUT)) 1.1 root 1462: { 1463: int j; 1464: 1465: /* We have found a reload to combine with! */ 1466: reload_out[i] = reload_out[output_reload]; 1467: reload_outmode[i] = reload_outmode[output_reload]; 1468: /* Mark the old output reload as inoperative. */ 1469: reload_out[output_reload] = 0; 1470: /* The combined reload is needed for the entire insn. */ 1471: reload_when_needed[i] = RELOAD_OTHER; 1472: /* If the output reload had a secondary reload, copy it. */ 1.1.1.7 ! root 1473: if (reload_secondary_out_reload[output_reload] != -1) ! 1474: { ! 1475: reload_secondary_out_reload[i] ! 1476: = reload_secondary_out_reload[output_reload]; ! 1477: reload_secondary_out_icode[i] ! 1478: = reload_secondary_out_icode[output_reload]; ! 1479: } ! 1480: 1.1.1.5 root 1481: #ifdef SECONDARY_MEMORY_NEEDED 1482: /* Copy any secondary MEM. */ 1483: if (secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]] != 0) 1484: secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[i]] 1485: = secondary_memlocs_elim[(int) reload_outmode[output_reload]][reload_opnum[output_reload]]; 1486: #endif 1.1 root 1487: /* If required, minimize the register class. */ 1488: if (reg_class_subset_p (reload_reg_class[output_reload], 1489: reload_reg_class[i])) 1490: reload_reg_class[i] = reload_reg_class[output_reload]; 1491: 1492: /* Transfer all replacements from the old reload to the combined. */ 1493: for (j = 0; j < n_replacements; j++) 1494: if (replacements[j].what == output_reload) 1495: replacements[j].what = i; 1496: 1497: return; 1498: } 1499: 1500: /* If this insn has only one operand that is modified or written (assumed 1501: to be the first), it must be the one corresponding to this reload. It 1502: is safe to use anything that dies in this insn for that output provided 1503: that it does not occur in the output (we already know it isn't an 1504: earlyclobber. If this is an asm insn, give up. */ 1505: 1506: if (INSN_CODE (this_insn) == -1) 1507: return; 1508: 1509: for (i = 1; i < insn_n_operands[INSN_CODE (this_insn)]; i++) 1510: if (insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '=' 1511: || insn_operand_constraint[INSN_CODE (this_insn)][i][0] == '+') 1512: return; 1513: 1514: /* See if some hard register that dies in this insn and is not used in 1515: the output is the right class. Only works if the register we pick 1516: up can fully hold our output reload. */ 1517: for (note = REG_NOTES (this_insn); note; note = XEXP (note, 1)) 1518: if (REG_NOTE_KIND (note) == REG_DEAD 1519: && GET_CODE (XEXP (note, 0)) == REG 1.1.1.3 root 1520: && ! reg_overlap_mentioned_for_reload_p (XEXP (note, 0), 1521: reload_out[output_reload]) 1.1 root 1522: && REGNO (XEXP (note, 0)) < FIRST_PSEUDO_REGISTER 1523: && HARD_REGNO_MODE_OK (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1524: && TEST_HARD_REG_BIT (reg_class_contents[(int) reload_reg_class[output_reload]], 1525: REGNO (XEXP (note, 0))) 1526: && (HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), reload_outmode[output_reload]) 1527: <= HARD_REGNO_NREGS (REGNO (XEXP (note, 0)), GET_MODE (XEXP (note, 0)))) 1528: && ! fixed_regs[REGNO (XEXP (note, 0))]) 1529: { 1530: reload_reg_rtx[output_reload] = gen_rtx (REG, 1531: reload_outmode[output_reload], 1532: REGNO (XEXP (note, 0))); 1533: return; 1534: } 1535: } 1536: 1537: /* Try to find a reload register for an in-out reload (expressions IN and OUT). 1538: See if one of IN and OUT is a register that may be used; 1539: this is desirable since a spill-register won't be needed. 1540: If so, return the register rtx that proves acceptable. 1541: 1542: INLOC and OUTLOC are locations where IN and OUT appear in the insn. 1543: CLASS is the register class required for the reload. 1544: 1545: If FOR_REAL is >= 0, it is the number of the reload, 1546: and in some cases when it can be discovered that OUT doesn't need 1547: to be computed, clear out reload_out[FOR_REAL]. 1548: 1549: If FOR_REAL is -1, this should not be done, because this call 1550: is just to see if a register can be found, not to find and install it. */ 1551: 1552: static rtx 1.1.1.6 root 1553: find_dummy_reload (real_in, real_out, inloc, outloc, 1554: inmode, outmode, class, for_real) 1.1 root 1555: rtx real_in, real_out; 1556: rtx *inloc, *outloc; 1.1.1.6 root 1557: enum machine_mode inmode, outmode; 1.1 root 1558: enum reg_class class; 1559: int for_real; 1560: { 1561: rtx in = real_in; 1562: rtx out = real_out; 1563: int in_offset = 0; 1564: int out_offset = 0; 1565: rtx value = 0; 1566: 1567: /* If operands exceed a word, we can't use either of them 1568: unless they have the same size. */ 1.1.1.6 root 1569: if (GET_MODE_SIZE (outmode) != GET_MODE_SIZE (inmode) 1570: && (GET_MODE_SIZE (outmode) > UNITS_PER_WORD 1571: || GET_MODE_SIZE (inmode) > UNITS_PER_WORD)) 1.1 root 1572: return 0; 1573: 1574: /* Find the inside of any subregs. */ 1575: while (GET_CODE (out) == SUBREG) 1576: { 1577: out_offset = SUBREG_WORD (out); 1578: out = SUBREG_REG (out); 1579: } 1580: while (GET_CODE (in) == SUBREG) 1581: { 1582: in_offset = SUBREG_WORD (in); 1583: in = SUBREG_REG (in); 1584: } 1585: 1586: /* Narrow down the reg class, the same way push_reload will; 1587: otherwise we might find a dummy now, but push_reload won't. */ 1588: class = PREFERRED_RELOAD_CLASS (in, class); 1589: 1590: /* See if OUT will do. */ 1591: if (GET_CODE (out) == REG 1592: && REGNO (out) < FIRST_PSEUDO_REGISTER) 1593: { 1594: register int regno = REGNO (out) + out_offset; 1.1.1.6 root 1595: int nwords = HARD_REGNO_NREGS (regno, outmode); 1.1.1.4 root 1596: rtx saved_rtx; 1.1 root 1597: 1598: /* When we consider whether the insn uses OUT, 1599: ignore references within IN. They don't prevent us 1600: from copying IN into OUT, because those refs would 1601: move into the insn that reloads IN. 1602: 1603: However, we only ignore IN in its role as this reload. 1604: If the insn uses IN elsewhere and it contains OUT, 1605: that counts. We can't be sure it's the "same" operand 1606: so it might not go through this reload. */ 1.1.1.4 root 1607: saved_rtx = *inloc; 1.1 root 1608: *inloc = const0_rtx; 1609: 1610: if (regno < FIRST_PSEUDO_REGISTER 1611: /* A fixed reg that can overlap other regs better not be used 1612: for reloading in any way. */ 1613: #ifdef OVERLAPPING_REGNO_P 1614: && ! (fixed_regs[regno] && OVERLAPPING_REGNO_P (regno)) 1615: #endif 1616: && ! refers_to_regno_for_reload_p (regno, regno + nwords, 1617: PATTERN (this_insn), outloc)) 1618: { 1619: int i; 1620: for (i = 0; i < nwords; i++) 1621: if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1622: regno + i)) 1623: break; 1624: 1625: if (i == nwords) 1626: { 1627: if (GET_CODE (real_out) == REG) 1628: value = real_out; 1629: else 1.1.1.6 root 1630: value = gen_rtx (REG, outmode, regno); 1.1 root 1631: } 1632: } 1633: 1.1.1.4 root 1634: *inloc = saved_rtx; 1.1 root 1635: } 1636: 1637: /* Consider using IN if OUT was not acceptable 1638: or if OUT dies in this insn (like the quotient in a divmod insn). 1639: We can't use IN unless it is dies in this insn, 1640: which means we must know accurately which hard regs are live. 1641: Also, the result can't go in IN if IN is used within OUT. */ 1642: if (hard_regs_live_known 1643: && GET_CODE (in) == REG 1644: && REGNO (in) < FIRST_PSEUDO_REGISTER 1645: && (value == 0 1646: || find_reg_note (this_insn, REG_UNUSED, real_out)) 1647: && find_reg_note (this_insn, REG_DEAD, real_in) 1648: && !fixed_regs[REGNO (in)] 1.1.1.6 root 1649: && HARD_REGNO_MODE_OK (REGNO (in), 1650: /* The only case where out and real_out might 1651: have different modes is where real_out 1652: is a subreg, and in that case, out 1653: has a real mode. */ 1654: (GET_MODE (out) != VOIDmode 1655: ? GET_MODE (out) : outmode))) 1.1 root 1656: { 1657: register int regno = REGNO (in) + in_offset; 1.1.1.6 root 1658: int nwords = HARD_REGNO_NREGS (regno, inmode); 1.1 root 1659: 1.1.1.4 root 1660: if (! refers_to_regno_for_reload_p (regno, regno + nwords, out, NULL_PTR) 1.1 root 1661: && ! hard_reg_set_here_p (regno, regno + nwords, 1662: PATTERN (this_insn))) 1663: { 1664: int i; 1665: for (i = 0; i < nwords; i++) 1666: if (! TEST_HARD_REG_BIT (reg_class_contents[(int) class], 1667: regno + i)) 1668: break; 1669: 1670: if (i == nwords) 1671: { 1672: /* If we were going to use OUT as the reload reg 1673: and changed our mind, it means OUT is a dummy that 1674: dies here. So don't bother copying value to it. */ 1675: if (for_real >= 0 && value == real_out) 1676: reload_out[for_real] = 0; 1677: if (GET_CODE (real_in) == REG) 1678: value = real_in; 1679: else 1.1.1.6 root 1680: value = gen_rtx (REG, inmode, regno); 1.1 root 1681: } 1682: } 1683: } 1684: 1685: return value; 1686: } 1687: 1688: /* This page contains subroutines used mainly for determining 1689: whether the IN or an OUT of a reload can serve as the 1690: reload register. */ 1691: 1.1.1.6 root 1692: /* Return 1 if X is an operand of an insn that is being earlyclobbered. */ 1693: 1694: static int 1695: earlyclobber_operand_p (x) 1696: rtx x; 1697: { 1698: int i; 1699: 1700: for (i = 0; i < n_earlyclobbers; i++) 1701: if (reload_earlyclobbers[i] == x) 1702: return 1; 1703: 1704: return 0; 1705: } 1706: 1.1 root 1707: /* Return 1 if expression X alters a hard reg in the range 1708: from BEG_REGNO (inclusive) to END_REGNO (exclusive), 1709: either explicitly or in the guise of a pseudo-reg allocated to REGNO. 1710: X should be the body of an instruction. */ 1711: 1712: static int 1713: hard_reg_set_here_p (beg_regno, end_regno, x) 1714: register int beg_regno, end_regno; 1715: rtx x; 1716: { 1717: if (GET_CODE (x) == SET || GET_CODE (x) == CLOBBER) 1718: { 1719: register rtx op0 = SET_DEST (x); 1720: while (GET_CODE (op0) == SUBREG) 1721: op0 = SUBREG_REG (op0); 1722: if (GET_CODE (op0) == REG) 1723: { 1724: register int r = REGNO (op0); 1725: /* See if this reg overlaps range under consideration. */ 1726: if (r < end_regno 1727: && r + HARD_REGNO_NREGS (r, GET_MODE (op0)) > beg_regno) 1728: return 1; 1729: } 1730: } 1731: else if (GET_CODE (x) == PARALLEL) 1732: { 1733: register int i = XVECLEN (x, 0) - 1; 1734: for (; i >= 0; i--) 1735: if (hard_reg_set_here_p (beg_regno, end_regno, XVECEXP (x, 0, i))) 1736: return 1; 1737: } 1738: 1739: return 0; 1740: } 1741: 1742: /* Return 1 if ADDR is a valid memory address for mode MODE, 1743: and check that each pseudo reg has the proper kind of 1744: hard reg. */ 1745: 1746: int 1747: strict_memory_address_p (mode, addr) 1748: enum machine_mode mode; 1749: register rtx addr; 1750: { 1751: GO_IF_LEGITIMATE_ADDRESS (mode, addr, win); 1752: return 0; 1753: 1754: win: 1755: return 1; 1756: } 1757: 1758: /* Like rtx_equal_p except that it allows a REG and a SUBREG to match 1759: if they are the same hard reg, and has special hacks for 1760: autoincrement and autodecrement. 1761: This is specifically intended for find_reloads to use 1762: in determining whether two operands match. 1763: X is the operand whose number is the lower of the two. 1764: 1765: The value is 2 if Y contains a pre-increment that matches 1766: a non-incrementing address in X. */ 1767: 1768: /* ??? To be completely correct, we should arrange to pass 1769: for X the output operand and for Y the input operand. 1770: For now, we assume that the output operand has the lower number 1771: because that is natural in (SET output (... input ...)). */ 1772: 1773: int 1774: operands_match_p (x, y) 1775: register rtx x, y; 1776: { 1777: register int i; 1778: register RTX_CODE code = GET_CODE (x); 1779: register char *fmt; 1780: int success_2; 1781: 1782: if (x == y) 1783: return 1; 1784: if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) 1785: && (GET_CODE (y) == REG || (GET_CODE (y) == SUBREG 1786: && GET_CODE (SUBREG_REG (y)) == REG))) 1787: { 1788: register int j; 1789: 1790: if (code == SUBREG) 1791: { 1792: i = REGNO (SUBREG_REG (x)); 1793: if (i >= FIRST_PSEUDO_REGISTER) 1794: goto slow; 1795: i += SUBREG_WORD (x); 1796: } 1797: else 1798: i = REGNO (x); 1799: 1800: if (GET_CODE (y) == SUBREG) 1801: { 1802: j = REGNO (SUBREG_REG (y)); 1803: if (j >= FIRST_PSEUDO_REGISTER) 1804: goto slow; 1805: j += SUBREG_WORD (y); 1806: } 1807: else 1808: j = REGNO (y); 1809: 1.1.1.5 root 1810: /* On a WORDS_BIG_ENDIAN machine, point to the last register of a 1811: multiple hard register group, so that for example (reg:DI 0) and 1812: (reg:SI 1) will be considered the same register. */ 1813: if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (x)) > UNITS_PER_WORD 1814: && i < FIRST_PSEUDO_REGISTER) 1815: i += (GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD) - 1; 1816: if (WORDS_BIG_ENDIAN && GET_MODE_SIZE (GET_MODE (y)) > UNITS_PER_WORD 1817: && j < FIRST_PSEUDO_REGISTER) 1818: j += (GET_MODE_SIZE (GET_MODE (y)) / UNITS_PER_WORD) - 1; 1819: 1.1 root 1820: return i == j; 1821: } 1822: /* If two operands must match, because they are really a single 1823: operand of an assembler insn, then two postincrements are invalid 1824: because the assembler insn would increment only once. 1825: On the other hand, an postincrement matches ordinary indexing 1826: if the postincrement is the output operand. */ 1827: if (code == POST_DEC || code == POST_INC) 1828: return operands_match_p (XEXP (x, 0), y); 1829: /* Two preincrements are invalid 1830: because the assembler insn would increment only once. 1831: On the other hand, an preincrement matches ordinary indexing 1832: if the preincrement is the input operand. 1833: In this case, return 2, since some callers need to do special 1834: things when this happens. */ 1835: if (GET_CODE (y) == PRE_DEC || GET_CODE (y) == PRE_INC) 1836: return operands_match_p (x, XEXP (y, 0)) ? 2 : 0; 1837: 1838: slow: 1839: 1840: /* Now we have disposed of all the cases 1841: in which different rtx codes can match. */ 1842: if (code != GET_CODE (y)) 1843: return 0; 1844: if (code == LABEL_REF) 1845: return XEXP (x, 0) == XEXP (y, 0); 1846: if (code == SYMBOL_REF) 1847: return XSTR (x, 0) == XSTR (y, 0); 1848: 1849: /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */ 1850: 1851: if (GET_MODE (x) != GET_MODE (y)) 1852: return 0; 1853: 1854: /* Compare the elements. If any pair of corresponding elements 1855: fail to match, return 0 for the whole things. */ 1856: 1857: success_2 = 0; 1858: fmt = GET_RTX_FORMAT (code); 1859: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1860: { 1861: int val; 1862: switch (fmt[i]) 1863: { 1.1.1.4 root 1864: case 'w': 1865: if (XWINT (x, i) != XWINT (y, i)) 1866: return 0; 1867: break; 1868: 1.1 root 1869: case 'i': 1870: if (XINT (x, i) != XINT (y, i)) 1871: return 0; 1872: break; 1873: 1874: case 'e': 1875: val = operands_match_p (XEXP (x, i), XEXP (y, i)); 1876: if (val == 0) 1877: return 0; 1878: /* If any subexpression returns 2, 1879: we should return 2 if we are successful. */ 1880: if (val == 2) 1881: success_2 = 1; 1882: break; 1883: 1884: case '0': 1885: break; 1886: 1887: /* It is believed that rtx's at this level will never 1888: contain anything but integers and other rtx's, 1889: except for within LABEL_REFs and SYMBOL_REFs. */ 1890: default: 1891: abort (); 1892: } 1893: } 1894: return 1 + success_2; 1895: } 1896: 1897: /* Return the number of times character C occurs in string S. */ 1898: 1.1.1.4 root 1899: int 1.1 root 1900: n_occurrences (c, s) 1.1.1.7 ! root 1901: int c; 1.1 root 1902: char *s; 1903: { 1904: int n = 0; 1905: while (*s) 1906: n += (*s++ == c); 1907: return n; 1908: } 1909: 1910: /* Describe the range of registers or memory referenced by X. 1911: If X is a register, set REG_FLAG and put the first register 1912: number into START and the last plus one into END. 1913: If X is a memory reference, put a base address into BASE 1914: and a range of integer offsets into START and END. 1915: If X is pushing on the stack, we can assume it causes no trouble, 1916: so we set the SAFE field. */ 1917: 1918: static struct decomposition 1919: decompose (x) 1920: rtx x; 1921: { 1922: struct decomposition val; 1923: int all_const = 0; 1924: 1925: val.reg_flag = 0; 1926: val.safe = 0; 1927: if (GET_CODE (x) == MEM) 1928: { 1929: rtx base, offset = 0; 1930: rtx addr = XEXP (x, 0); 1931: 1932: if (GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC 1933: || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC) 1934: { 1935: val.base = XEXP (addr, 0); 1936: val.start = - GET_MODE_SIZE (GET_MODE (x)); 1937: val.end = GET_MODE_SIZE (GET_MODE (x)); 1938: val.safe = REGNO (val.base) == STACK_POINTER_REGNUM; 1939: return val; 1940: } 1941: 1942: if (GET_CODE (addr) == CONST) 1943: { 1944: addr = XEXP (addr, 0); 1945: all_const = 1; 1946: } 1947: if (GET_CODE (addr) == PLUS) 1948: { 1949: if (CONSTANT_P (XEXP (addr, 0))) 1950: { 1951: base = XEXP (addr, 1); 1952: offset = XEXP (addr, 0); 1953: } 1954: else if (CONSTANT_P (XEXP (addr, 1))) 1955: { 1956: base = XEXP (addr, 0); 1957: offset = XEXP (addr, 1); 1958: } 1959: } 1960: 1961: if (offset == 0) 1962: { 1963: base = addr; 1964: offset = const0_rtx; 1965: } 1966: if (GET_CODE (offset) == CONST) 1967: offset = XEXP (offset, 0); 1968: if (GET_CODE (offset) == PLUS) 1969: { 1970: if (GET_CODE (XEXP (offset, 0)) == CONST_INT) 1971: { 1972: base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 1)); 1973: offset = XEXP (offset, 0); 1974: } 1975: else if (GET_CODE (XEXP (offset, 1)) == CONST_INT) 1976: { 1977: base = gen_rtx (PLUS, GET_MODE (base), base, XEXP (offset, 0)); 1978: offset = XEXP (offset, 1); 1979: } 1980: else 1981: { 1982: base = gen_rtx (PLUS, GET_MODE (base), base, offset); 1983: offset = const0_rtx; 1984: } 1985: } 1986: else if (GET_CODE (offset) != CONST_INT) 1987: { 1988: base = gen_rtx (PLUS, GET_MODE (base), base, offset); 1989: offset = const0_rtx; 1990: } 1991: 1992: if (all_const && GET_CODE (base) == PLUS) 1993: base = gen_rtx (CONST, GET_MODE (base), base); 1994: 1995: if (GET_CODE (offset) != CONST_INT) 1996: abort (); 1997: 1998: val.start = INTVAL (offset); 1999: val.end = val.start + GET_MODE_SIZE (GET_MODE (x)); 2000: val.base = base; 2001: return val; 2002: } 2003: else if (GET_CODE (x) == REG) 2004: { 2005: val.reg_flag = 1; 2006: val.start = true_regnum (x); 2007: if (val.start < 0) 2008: { 2009: /* A pseudo with no hard reg. */ 2010: val.start = REGNO (x); 2011: val.end = val.start + 1; 2012: } 2013: else 2014: /* A hard reg. */ 2015: val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2016: } 2017: else if (GET_CODE (x) == SUBREG) 2018: { 2019: if (GET_CODE (SUBREG_REG (x)) != REG) 2020: /* This could be more precise, but it's good enough. */ 2021: return decompose (SUBREG_REG (x)); 2022: val.reg_flag = 1; 2023: val.start = true_regnum (x); 2024: if (val.start < 0) 2025: return decompose (SUBREG_REG (x)); 2026: else 2027: /* A hard reg. */ 2028: val.end = val.start + HARD_REGNO_NREGS (val.start, GET_MODE (x)); 2029: } 2030: else if (CONSTANT_P (x) 2031: /* This hasn't been assigned yet, so it can't conflict yet. */ 2032: || GET_CODE (x) == SCRATCH) 2033: val.safe = 1; 2034: else 2035: abort (); 2036: return val; 2037: } 2038: 2039: /* Return 1 if altering Y will not modify the value of X. 2040: Y is also described by YDATA, which should be decompose (Y). */ 2041: 2042: static int 2043: immune_p (x, y, ydata) 2044: rtx x, y; 2045: struct decomposition ydata; 2046: { 2047: struct decomposition xdata; 2048: 2049: if (ydata.reg_flag) 1.1.1.4 root 2050: return !refers_to_regno_for_reload_p (ydata.start, ydata.end, x, NULL_PTR); 1.1 root 2051: if (ydata.safe) 2052: return 1; 2053: 2054: if (GET_CODE (y) != MEM) 2055: abort (); 2056: /* If Y is memory and X is not, Y can't affect X. */ 2057: if (GET_CODE (x) != MEM) 2058: return 1; 2059: 2060: xdata = decompose (x); 2061: 2062: if (! rtx_equal_p (xdata.base, ydata.base)) 2063: { 2064: /* If bases are distinct symbolic constants, there is no overlap. */ 2065: if (CONSTANT_P (xdata.base) && CONSTANT_P (ydata.base)) 2066: return 1; 2067: /* Constants and stack slots never overlap. */ 2068: if (CONSTANT_P (xdata.base) 2069: && (ydata.base == frame_pointer_rtx 1.1.1.6 root 2070: || ydata.base == hard_frame_pointer_rtx 1.1 root 2071: || ydata.base == stack_pointer_rtx)) 2072: return 1; 2073: if (CONSTANT_P (ydata.base) 2074: && (xdata.base == frame_pointer_rtx 1.1.1.6 root 2075: || xdata.base == hard_frame_pointer_rtx 1.1 root 2076: || xdata.base == stack_pointer_rtx)) 2077: return 1; 2078: /* If either base is variable, we don't know anything. */ 2079: return 0; 2080: } 2081: 2082: 2083: return (xdata.start >= ydata.end || ydata.start >= xdata.end); 2084: } 1.1.1.3 root 2085: 1.1.1.4 root 2086: /* Similar, but calls decompose. */ 1.1.1.3 root 2087: 2088: int 2089: safe_from_earlyclobber (op, clobber) 2090: rtx op, clobber; 2091: { 2092: struct decomposition early_data; 2093: 2094: early_data = decompose (clobber); 2095: return immune_p (op, clobber, early_data); 2096: } 1.1 root 2097: 2098: /* Main entry point of this file: search the body of INSN 2099: for values that need reloading and record them with push_reload. 2100: REPLACE nonzero means record also where the values occur 2101: so that subst_reloads can be used. 2102: 2103: IND_LEVELS says how many levels of indirection are supported by this 2104: machine; a value of zero means that a memory reference is not a valid 2105: memory address. 2106: 2107: LIVE_KNOWN says we have valid information about which hard 2108: regs are live at each point in the program; this is true when 2109: we are called from global_alloc but false when stupid register 2110: allocation has been done. 2111: 2112: RELOAD_REG_P if nonzero is a vector indexed by hard reg number 2113: which is nonnegative if the reg has been commandeered for reloading into. 2114: It is copied into STATIC_RELOAD_REG_P and referenced from there 2115: by various subroutines. */ 2116: 2117: void 2118: find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) 2119: rtx insn; 2120: int replace, ind_levels; 2121: int live_known; 2122: short *reload_reg_p; 2123: { 2124: #ifdef REGISTER_CONSTRAINTS 2125: 2126: register int insn_code_number; 1.1.1.5 root 2127: register int i, j; 1.1 root 2128: int noperands; 2129: /* These are the constraints for the insn. We don't change them. */ 2130: char *constraints1[MAX_RECOG_OPERANDS]; 2131: /* These start out as the constraints for the insn 2132: and they are chewed up as we consider alternatives. */ 2133: char *constraints[MAX_RECOG_OPERANDS]; 2134: /* These are the preferred classes for an operand, or NO_REGS if it isn't 2135: a register. */ 2136: enum reg_class preferred_class[MAX_RECOG_OPERANDS]; 2137: char pref_or_nothing[MAX_RECOG_OPERANDS]; 2138: /* Nonzero for a MEM operand whose entire address needs a reload. */ 2139: int address_reloaded[MAX_RECOG_OPERANDS]; 1.1.1.5 root 2140: /* Value of enum reload_type to use for operand. */ 2141: enum reload_type operand_type[MAX_RECOG_OPERANDS]; 2142: /* Value of enum reload_type to use within address of operand. */ 2143: enum reload_type address_type[MAX_RECOG_OPERANDS]; 2144: /* Save the usage of each operand. */ 2145: enum reload_usage { RELOAD_READ, RELOAD_READ_WRITE, RELOAD_WRITE } modified[MAX_RECOG_OPERANDS]; 1.1 root 2146: int no_input_reloads = 0, no_output_reloads = 0; 2147: int n_alternatives; 2148: int this_alternative[MAX_RECOG_OPERANDS]; 2149: char this_alternative_win[MAX_RECOG_OPERANDS]; 2150: char this_alternative_offmemok[MAX_RECOG_OPERANDS]; 2151: char this_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2152: int this_alternative_matches[MAX_RECOG_OPERANDS]; 2153: int swapped; 2154: int goal_alternative[MAX_RECOG_OPERANDS]; 2155: int this_alternative_number; 2156: int goal_alternative_number; 2157: int operand_reloadnum[MAX_RECOG_OPERANDS]; 2158: int goal_alternative_matches[MAX_RECOG_OPERANDS]; 2159: int goal_alternative_matched[MAX_RECOG_OPERANDS]; 2160: char goal_alternative_win[MAX_RECOG_OPERANDS]; 2161: char goal_alternative_offmemok[MAX_RECOG_OPERANDS]; 2162: char goal_alternative_earlyclobber[MAX_RECOG_OPERANDS]; 2163: int goal_alternative_swapped; 2164: int best; 2165: int commutative; 2166: char operands_match[MAX_RECOG_OPERANDS][MAX_RECOG_OPERANDS]; 2167: rtx substed_operand[MAX_RECOG_OPERANDS]; 2168: rtx body = PATTERN (insn); 2169: rtx set = single_set (insn); 2170: int goal_earlyclobber, this_earlyclobber; 2171: enum machine_mode operand_mode[MAX_RECOG_OPERANDS]; 2172: 2173: this_insn = insn; 2174: this_insn_is_asm = 0; /* Tentative. */ 2175: n_reloads = 0; 2176: n_replacements = 0; 2177: n_memlocs = 0; 2178: n_earlyclobbers = 0; 2179: replace_reloads = replace; 2180: hard_regs_live_known = live_known; 2181: static_reload_reg_p = reload_reg_p; 2182: 2183: /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads; 2184: neither are insns that SET cc0. Insns that use CC0 are not allowed 2185: to have any input reloads. */ 2186: if (GET_CODE (insn) == JUMP_INSN || GET_CODE (insn) == CALL_INSN) 2187: no_output_reloads = 1; 2188: 2189: #ifdef HAVE_cc0 2190: if (reg_referenced_p (cc0_rtx, PATTERN (insn))) 2191: no_input_reloads = 1; 2192: if (reg_set_p (cc0_rtx, PATTERN (insn))) 2193: no_output_reloads = 1; 2194: #endif 2195: 1.1.1.4 root 2196: #ifdef SECONDARY_MEMORY_NEEDED 2197: /* The eliminated forms of any secondary memory locations are per-insn, so 2198: clear them out here. */ 2199: 1.1.1.7 ! root 2200: bzero ((char *) secondary_memlocs_elim, sizeof secondary_memlocs_elim); 1.1.1.4 root 2201: #endif 2202: 1.1 root 2203: /* Find what kind of insn this is. NOPERANDS gets number of operands. 2204: Make OPERANDS point to a vector of operand values. 2205: Make OPERAND_LOCS point to a vector of pointers to 2206: where the operands were found. 2207: Fill CONSTRAINTS and CONSTRAINTS1 with pointers to the 2208: constraint-strings for this insn. 2209: Return if the insn needs no reload processing. */ 2210: 2211: switch (GET_CODE (body)) 2212: { 2213: case USE: 2214: case CLOBBER: 2215: case ASM_INPUT: 2216: case ADDR_VEC: 2217: case ADDR_DIFF_VEC: 2218: return; 2219: 2220: case SET: 2221: /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it 2222: is cheap to move between them. If it is not, there may not be an insn 2223: to do the copy, so we may need a reload. */ 2224: if (GET_CODE (SET_DEST (body)) == REG 2225: && REGNO (SET_DEST (body)) < FIRST_PSEUDO_REGISTER 2226: && GET_CODE (SET_SRC (body)) == REG 2227: && REGNO (SET_SRC (body)) < FIRST_PSEUDO_REGISTER 2228: && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body))), 2229: REGNO_REG_CLASS (REGNO (SET_DEST (body)))) == 2) 2230: return; 2231: case PARALLEL: 2232: case ASM_OPERANDS: 1.1.1.5 root 2233: reload_n_operands = noperands = asm_noperands (body); 1.1 root 2234: if (noperands >= 0) 2235: { 2236: /* This insn is an `asm' with operands. */ 2237: 2238: insn_code_number = -1; 2239: this_insn_is_asm = 1; 2240: 2241: /* expand_asm_operands makes sure there aren't too many operands. */ 2242: if (noperands > MAX_RECOG_OPERANDS) 2243: abort (); 2244: 2245: /* Now get the operand values and constraints out of the insn. */ 2246: 2247: decode_asm_operands (body, recog_operand, recog_operand_loc, 2248: constraints, operand_mode); 2249: if (noperands > 0) 2250: { 1.1.1.7 ! root 2251: bcopy ((char *) constraints, (char *) constraints1, ! 2252: noperands * sizeof (char *)); 1.1 root 2253: n_alternatives = n_occurrences (',', constraints[0]) + 1; 2254: for (i = 1; i < noperands; i++) 1.1.1.2 root 2255: if (n_alternatives != n_occurrences (',', constraints[i]) + 1) 1.1 root 2256: { 2257: error_for_asm (insn, "operand constraints differ in number of alternatives"); 2258: /* Avoid further trouble with this insn. */ 2259: PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); 2260: n_reloads = 0; 2261: return; 2262: } 2263: } 2264: break; 2265: } 2266: 2267: default: 2268: /* Ordinary insn: recognize it, get the operands via insn_extract 2269: and get the constraints. */ 2270: 2271: insn_code_number = recog_memoized (insn); 2272: if (insn_code_number < 0) 2273: fatal_insn_not_found (insn); 2274: 1.1.1.5 root 2275: reload_n_operands = noperands = insn_n_operands[insn_code_number]; 1.1 root 2276: n_alternatives = insn_n_alternatives[insn_code_number]; 2277: /* Just return "no reloads" if insn has no operands with constraints. */ 2278: if (n_alternatives == 0) 2279: return; 2280: insn_extract (insn); 2281: for (i = 0; i < noperands; i++) 2282: { 2283: constraints[i] = constraints1[i] 2284: = insn_operand_constraint[insn_code_number][i]; 2285: operand_mode[i] = insn_operand_mode[insn_code_number][i]; 2286: } 2287: } 2288: 2289: if (noperands == 0) 2290: return; 2291: 2292: commutative = -1; 2293: 2294: /* If we will need to know, later, whether some pair of operands 2295: are the same, we must compare them now and save the result. 2296: Reloading the base and index registers will clobber them 2297: and afterward they will fail to match. */ 2298: 2299: for (i = 0; i < noperands; i++) 2300: { 2301: register char *p; 2302: register int c; 2303: 2304: substed_operand[i] = recog_operand[i]; 2305: p = constraints[i]; 2306: 1.1.1.5 root 2307: modified[i] = RELOAD_READ; 2308: 2309: /* Scan this operand's constraint to see if it is an output operand, 2310: an in-out operand, is commutative, or should match another. */ 1.1 root 2311: 2312: while (c = *p++) 1.1.1.5 root 2313: { 2314: if (c == '=') 2315: modified[i] = RELOAD_WRITE; 2316: else if (c == '+') 2317: modified[i] = RELOAD_READ_WRITE; 2318: else if (c == '%') 2319: { 2320: /* The last operand should not be marked commutative. */ 2321: if (i == noperands - 1) 2322: { 2323: if (this_insn_is_asm) 2324: warning_for_asm (this_insn, 2325: "`%%' constraint used with last operand"); 2326: else 2327: abort (); 2328: } 2329: else 2330: commutative = i; 2331: } 2332: else if (c >= '0' && c <= '9') 2333: { 2334: c -= '0'; 2335: operands_match[c][i] 2336: = operands_match_p (recog_operand[c], recog_operand[i]); 1.1.1.4 root 2337: 1.1.1.5 root 2338: /* An operand may not match itself. */ 2339: if (c == i) 2340: { 2341: if (this_insn_is_asm) 2342: warning_for_asm (this_insn, 2343: "operand %d has constraint %d", i, c); 2344: else 2345: abort (); 2346: } 1.1.1.4 root 2347: 1.1.1.5 root 2348: /* If C can be commuted with C+1, and C might need to match I, 2349: then C+1 might also need to match I. */ 2350: if (commutative >= 0) 2351: { 2352: if (c == commutative || c == commutative + 1) 2353: { 2354: int other = c + (c == commutative ? 1 : -1); 2355: operands_match[other][i] 2356: = operands_match_p (recog_operand[other], recog_operand[i]); 2357: } 2358: if (i == commutative || i == commutative + 1) 2359: { 2360: int other = i + (i == commutative ? 1 : -1); 2361: operands_match[c][other] 2362: = operands_match_p (recog_operand[c], recog_operand[other]); 2363: } 2364: /* Note that C is supposed to be less than I. 2365: No need to consider altering both C and I because in 2366: that case we would alter one into the other. */ 2367: } 2368: } 2369: } 1.1 root 2370: } 2371: 2372: /* Examine each operand that is a memory reference or memory address 2373: and reload parts of the addresses into index registers. 2374: Also here any references to pseudo regs that didn't get hard regs 2375: but are equivalent to constants get replaced in the insn itself 2376: with those constants. Nobody will ever see them again. 2377: 2378: Finally, set up the preferred classes of each operand. */ 2379: 2380: for (i = 0; i < noperands; i++) 2381: { 2382: register RTX_CODE code = GET_CODE (recog_operand[i]); 1.1.1.5 root 2383: 1.1 root 2384: address_reloaded[i] = 0; 1.1.1.5 root 2385: operand_type[i] = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT 2386: : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT 2387: : RELOAD_OTHER); 2388: address_type[i] 2389: = (modified[i] == RELOAD_READ ? RELOAD_FOR_INPUT_ADDRESS 2390: : modified[i] == RELOAD_WRITE ? RELOAD_FOR_OUTPUT_ADDRESS 2391: : RELOAD_OTHER); 1.1 root 2392: 1.1.1.6 root 2393: if (*constraints[i] == 0) 2394: /* Ignore things like match_operator operands. */ 2395: ; 2396: else if (constraints[i][0] == 'p') 1.1 root 2397: { 1.1.1.4 root 2398: find_reloads_address (VOIDmode, NULL_PTR, 1.1 root 2399: recog_operand[i], recog_operand_loc[i], 1.1.1.5 root 2400: i, operand_type[i], ind_levels); 1.1 root 2401: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2402: } 2403: else if (code == MEM) 2404: { 2405: if (find_reloads_address (GET_MODE (recog_operand[i]), 2406: recog_operand_loc[i], 2407: XEXP (recog_operand[i], 0), 2408: &XEXP (recog_operand[i], 0), 1.1.1.5 root 2409: i, address_type[i], ind_levels)) 1.1 root 2410: address_reloaded[i] = 1; 2411: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2412: } 2413: else if (code == SUBREG) 2414: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i] 1.1.1.5 root 2415: = find_reloads_toplev (recog_operand[i], i, address_type[i], 2416: ind_levels, 1.1 root 2417: set != 0 2418: && &SET_DEST (set) == recog_operand_loc[i]); 1.1.1.6 root 2419: else if (code == PLUS) 2420: /* We can get a PLUS as an "operand" as a result of 1.1.1.7 ! root 2421: register elimination. See eliminate_regs and gen_reload. */ 1.1.1.6 root 2422: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i] 2423: = find_reloads_toplev (recog_operand[i], i, address_type[i], 2424: ind_levels, 0); 1.1 root 2425: else if (code == REG) 2426: { 2427: /* This is equivalent to calling find_reloads_toplev. 2428: The code is duplicated for speed. 2429: When we find a pseudo always equivalent to a constant, 2430: we replace it by the constant. We must be sure, however, 2431: that we don't try to replace it in the insn in which it 2432: is being set. */ 2433: register int regno = REGNO (recog_operand[i]); 2434: if (reg_equiv_constant[regno] != 0 2435: && (set == 0 || &SET_DEST (set) != recog_operand_loc[i])) 2436: substed_operand[i] = recog_operand[i] 2437: = reg_equiv_constant[regno]; 2438: #if 0 /* This might screw code in reload1.c to delete prior output-reload 2439: that feeds this insn. */ 2440: if (reg_equiv_mem[regno] != 0) 2441: substed_operand[i] = recog_operand[i] 2442: = reg_equiv_mem[regno]; 2443: #endif 2444: if (reg_equiv_address[regno] != 0) 2445: { 2446: /* If reg_equiv_address is not a constant address, copy it, 2447: since it may be shared. */ 2448: rtx address = reg_equiv_address[regno]; 2449: 2450: if (rtx_varies_p (address)) 2451: address = copy_rtx (address); 2452: 2453: /* If this is an output operand, we must output a CLOBBER 1.1.1.5 root 2454: after INSN so find_equiv_reg knows REGNO is being written. 2455: Mark this insn specially, do we can put our output reloads 2456: after it. */ 2457: 2458: if (modified[i] != RELOAD_READ) 2459: PUT_MODE (emit_insn_after (gen_rtx (CLOBBER, VOIDmode, 2460: recog_operand[i]), 2461: insn), 2462: DImode); 1.1 root 2463: 2464: *recog_operand_loc[i] = recog_operand[i] 2465: = gen_rtx (MEM, GET_MODE (recog_operand[i]), address); 2466: RTX_UNCHANGING_P (recog_operand[i]) 2467: = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 2468: find_reloads_address (GET_MODE (recog_operand[i]), 2469: recog_operand_loc[i], 2470: XEXP (recog_operand[i], 0), 2471: &XEXP (recog_operand[i], 0), 1.1.1.5 root 2472: i, address_type[i], ind_levels); 1.1 root 2473: substed_operand[i] = recog_operand[i] = *recog_operand_loc[i]; 2474: } 2475: } 1.1.1.3 root 2476: /* If the operand is still a register (we didn't replace it with an 2477: equivalent), get the preferred class to reload it into. */ 2478: code = GET_CODE (recog_operand[i]); 2479: preferred_class[i] 1.1.1.4 root 2480: = ((code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER) 1.1.1.3 root 2481: ? reg_preferred_class (REGNO (recog_operand[i])) : NO_REGS); 2482: pref_or_nothing[i] 1.1.1.4 root 2483: = (code == REG && REGNO (recog_operand[i]) >= FIRST_PSEUDO_REGISTER 2484: && reg_alternate_class (REGNO (recog_operand[i])) == NO_REGS); 1.1 root 2485: } 2486: 2487: /* If this is simply a copy from operand 1 to operand 0, merge the 2488: preferred classes for the operands. */ 2489: if (set != 0 && noperands >= 2 && recog_operand[0] == SET_DEST (set) 2490: && recog_operand[1] == SET_SRC (set)) 2491: { 2492: preferred_class[0] = preferred_class[1] 2493: = reg_class_subunion[(int) preferred_class[0]][(int) preferred_class[1]]; 2494: pref_or_nothing[0] |= pref_or_nothing[1]; 2495: pref_or_nothing[1] |= pref_or_nothing[0]; 2496: } 2497: 2498: /* Now see what we need for pseudo-regs that didn't get hard regs 2499: or got the wrong kind of hard reg. For this, we must consider 2500: all the operands together against the register constraints. */ 2501: 2502: best = MAX_RECOG_OPERANDS + 300; 2503: 2504: swapped = 0; 2505: goal_alternative_swapped = 0; 2506: try_swapped: 2507: 2508: /* The constraints are made of several alternatives. 2509: Each operand's constraint looks like foo,bar,... with commas 2510: separating the alternatives. The first alternatives for all 2511: operands go together, the second alternatives go together, etc. 2512: 2513: First loop over alternatives. */ 2514: 2515: for (this_alternative_number = 0; 2516: this_alternative_number < n_alternatives; 2517: this_alternative_number++) 2518: { 2519: /* Loop over operands for one constraint alternative. */ 2520: /* LOSERS counts those that don't fit this alternative 2521: and would require loading. */ 2522: int losers = 0; 2523: /* BAD is set to 1 if it some operand can't fit this alternative 2524: even after reloading. */ 2525: int bad = 0; 2526: /* REJECT is a count of how undesirable this alternative says it is 2527: if any reloading is required. If the alternative matches exactly 2528: then REJECT is ignored, but otherwise it gets this much 2529: counted against it in addition to the reloading needed. Each 2530: ? counts three times here since we want the disparaging caused by 2531: a bad register class to only count 1/3 as much. */ 2532: int reject = 0; 2533: 2534: this_earlyclobber = 0; 2535: 2536: for (i = 0; i < noperands; i++) 2537: { 2538: register char *p = constraints[i]; 2539: register int win = 0; 2540: /* 0 => this operand can be reloaded somehow for this alternative */ 2541: int badop = 1; 2542: /* 0 => this operand can be reloaded if the alternative allows regs. */ 2543: int winreg = 0; 2544: int c; 2545: register rtx operand = recog_operand[i]; 2546: int offset = 0; 2547: /* Nonzero means this is a MEM that must be reloaded into a reg 2548: regardless of what the constraint says. */ 2549: int force_reload = 0; 2550: int offmemok = 0; 1.1.1.7 ! root 2551: /* Nonzero if a constant forced into memory would be OK for this ! 2552: operand. */ ! 2553: int constmemok = 0; 1.1 root 2554: int earlyclobber = 0; 2555: 2556: /* If the operand is a SUBREG, extract 2557: the REG or MEM (or maybe even a constant) within. 2558: (Constants can occur as a result of reg_equiv_constant.) */ 2559: 2560: while (GET_CODE (operand) == SUBREG) 2561: { 2562: offset += SUBREG_WORD (operand); 2563: operand = SUBREG_REG (operand); 1.1.1.6 root 2564: /* Force reload if this is a constant or PLUS or if there may may 2565: be a problem accessing OPERAND in the outer mode. */ 2566: if (CONSTANT_P (operand) 2567: || GET_CODE (operand) == PLUS 2568: /* We must force a reload of paradoxical SUBREGs 2569: of a MEM because the alignment of the inner value 1.1.1.7 ! root 2570: may not be enough to do the outer reference. On ! 2571: big-endian machines, it may also reference outside ! 2572: the object. 1.1.1.6 root 2573: 2574: On machines that extend byte operations and we have a 1.1.1.7 ! root 2575: SUBREG where both the inner and outer modes are no wider ! 2576: than a word and the inner mode is narrower, is integral, ! 2577: and gets extended when loaded from memory, combine.c has ! 2578: made assumptions about the behavior of the machine in such 1.1.1.6 root 2579: register access. If the data is, in fact, in memory we 2580: must always load using the size assumed to be in the 2581: register and let the insn do the different-sized 2582: accesses. */ 2583: || ((GET_CODE (operand) == MEM 2584: || (GET_CODE (operand)== REG 2585: && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 2586: && (((GET_MODE_BITSIZE (GET_MODE (operand)) 2587: < BIGGEST_ALIGNMENT) 2588: && (GET_MODE_SIZE (operand_mode[i]) 2589: > GET_MODE_SIZE (GET_MODE (operand)))) 1.1.1.7 ! root 2590: || (GET_CODE (operand) == MEM && BYTES_BIG_ENDIAN) 1.1.1.6 root 2591: #ifdef LOAD_EXTEND_OP 2592: || (GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2593: && (GET_MODE_SIZE (GET_MODE (operand)) 2594: <= UNITS_PER_WORD) 2595: && (GET_MODE_SIZE (operand_mode[i]) 1.1.1.7 ! root 2596: > GET_MODE_SIZE (GET_MODE (operand))) ! 2597: && INTEGRAL_MODE_P (GET_MODE (operand)) ! 2598: && LOAD_EXTEND_OP (GET_MODE (operand)) != NIL) 1.1.1.4 root 2599: #endif 1.1.1.6 root 2600: )) 1.1 root 2601: /* Subreg of a hard reg which can't handle the subreg's mode 2602: or which would handle that mode in the wrong number of 2603: registers for subregging to work. */ 1.1.1.6 root 2604: || (GET_CODE (operand) == REG 2605: && REGNO (operand) < FIRST_PSEUDO_REGISTER 2606: && ((GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 2607: && (GET_MODE_SIZE (GET_MODE (operand)) 2608: > UNITS_PER_WORD) 2609: && ((GET_MODE_SIZE (GET_MODE (operand)) 2610: / UNITS_PER_WORD) 2611: != HARD_REGNO_NREGS (REGNO (operand), 2612: GET_MODE (operand)))) 2613: || ! HARD_REGNO_MODE_OK (REGNO (operand) + offset, 2614: operand_mode[i])))) 1.1 root 2615: force_reload = 1; 2616: } 2617: 2618: this_alternative[i] = (int) NO_REGS; 2619: this_alternative_win[i] = 0; 2620: this_alternative_offmemok[i] = 0; 2621: this_alternative_earlyclobber[i] = 0; 2622: this_alternative_matches[i] = -1; 2623: 2624: /* An empty constraint or empty alternative 2625: allows anything which matched the pattern. */ 2626: if (*p == 0 || *p == ',') 2627: win = 1, badop = 0; 2628: 2629: /* Scan this alternative's specs for this operand; 2630: set WIN if the operand fits any letter in this alternative. 2631: Otherwise, clear BADOP if this operand could 2632: fit some letter after reloads, 2633: or set WINREG if this operand could fit after reloads 2634: provided the constraint allows some registers. */ 2635: 2636: while (*p && (c = *p++) != ',') 2637: switch (c) 2638: { 2639: case '=': 2640: case '+': 2641: case '*': 2642: break; 2643: 2644: case '%': 1.1.1.4 root 2645: /* The last operand should not be marked commutative. */ 2646: if (i != noperands - 1) 2647: commutative = i; 1.1 root 2648: break; 2649: 2650: case '?': 2651: reject += 3; 2652: break; 2653: 2654: case '!': 2655: reject = 300; 2656: break; 2657: 2658: case '#': 2659: /* Ignore rest of this alternative as far as 2660: reloading is concerned. */ 2661: while (*p && *p != ',') p++; 2662: break; 2663: 2664: case '0': 2665: case '1': 2666: case '2': 2667: case '3': 2668: case '4': 2669: c -= '0'; 2670: this_alternative_matches[i] = c; 2671: /* We are supposed to match a previous operand. 2672: If we do, we win if that one did. 2673: If we do not, count both of the operands as losers. 2674: (This is too conservative, since most of the time 2675: only a single reload insn will be needed to make 2676: the two operands win. As a result, this alternative 2677: may be rejected when it is actually desirable.) */ 2678: if ((swapped && (c != commutative || i != commutative + 1)) 2679: /* If we are matching as if two operands were swapped, 2680: also pretend that operands_match had been computed 2681: with swapped. 2682: But if I is the second of those and C is the first, 2683: don't exchange them, because operands_match is valid 2684: only on one side of its diagonal. */ 2685: ? (operands_match 2686: [(c == commutative || c == commutative + 1) 2687: ? 2*commutative + 1 - c : c] 2688: [(i == commutative || i == commutative + 1) 2689: ? 2*commutative + 1 - i : i]) 2690: : operands_match[c][i]) 2691: win = this_alternative_win[c]; 2692: else 2693: { 2694: /* Operands don't match. */ 2695: rtx value; 2696: /* Retroactively mark the operand we had to match 2697: as a loser, if it wasn't already. */ 2698: if (this_alternative_win[c]) 2699: losers++; 2700: this_alternative_win[c] = 0; 2701: if (this_alternative[c] == (int) NO_REGS) 2702: bad = 1; 2703: /* But count the pair only once in the total badness of 2704: this alternative, if the pair can be a dummy reload. */ 2705: value 2706: = find_dummy_reload (recog_operand[i], recog_operand[c], 2707: recog_operand_loc[i], recog_operand_loc[c], 1.1.1.6 root 2708: operand_mode[i], operand_mode[c], 1.1 root 2709: this_alternative[c], -1); 2710: 2711: if (value != 0) 2712: losers--; 2713: } 2714: /* This can be fixed with reloads if the operand 2715: we are supposed to match can be fixed with reloads. */ 2716: badop = 0; 2717: this_alternative[i] = this_alternative[c]; 1.1.1.6 root 2718: 2719: /* If we have to reload this operand and some previous 2720: operand also had to match the same thing as this 2721: operand, we don't know how to do that. So reject this 2722: alternative. */ 2723: if (! win || force_reload) 2724: for (j = 0; j < i; j++) 2725: if (this_alternative_matches[j] 2726: == this_alternative_matches[i]) 2727: badop = 1; 2728: 1.1 root 2729: break; 2730: 2731: case 'p': 2732: /* All necessary reloads for an address_operand 2733: were handled in find_reloads_address. */ 1.1.1.7 ! root 2734: this_alternative[i] = (int) BASE_REG_CLASS; 1.1 root 2735: win = 1; 2736: break; 2737: 2738: case 'm': 2739: if (force_reload) 2740: break; 2741: if (GET_CODE (operand) == MEM 2742: || (GET_CODE (operand) == REG 2743: && REGNO (operand) >= FIRST_PSEUDO_REGISTER 2744: && reg_renumber[REGNO (operand)] < 0)) 2745: win = 1; 2746: if (CONSTANT_P (operand)) 2747: badop = 0; 1.1.1.7 ! root 2748: constmemok = 1; 1.1 root 2749: break; 2750: 2751: case '<': 2752: if (GET_CODE (operand) == MEM 2753: && ! address_reloaded[i] 2754: && (GET_CODE (XEXP (operand, 0)) == PRE_DEC 2755: || GET_CODE (XEXP (operand, 0)) == POST_DEC)) 2756: win = 1; 2757: break; 2758: 2759: case '>': 2760: if (GET_CODE (operand) == MEM 2761: && ! address_reloaded[i] 2762: && (GET_CODE (XEXP (operand, 0)) == PRE_INC 2763: || GET_CODE (XEXP (operand, 0)) == POST_INC)) 2764: win = 1; 2765: break; 2766: 2767: /* Memory operand whose address is not offsettable. */ 2768: case 'V': 2769: if (force_reload) 2770: break; 2771: if (GET_CODE (operand) == MEM 2772: && ! (ind_levels ? offsettable_memref_p (operand) 2773: : offsettable_nonstrict_memref_p (operand)) 2774: /* Certain mem addresses will become offsettable 2775: after they themselves are reloaded. This is important; 2776: we don't want our own handling of unoffsettables 2777: to override the handling of reg_equiv_address. */ 2778: && !(GET_CODE (XEXP (operand, 0)) == REG 2779: && (ind_levels == 0 2780: || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0))) 2781: win = 1; 2782: break; 2783: 2784: /* Memory operand whose address is offsettable. */ 2785: case 'o': 2786: if (force_reload) 2787: break; 2788: if ((GET_CODE (operand) == MEM 2789: /* If IND_LEVELS, find_reloads_address won't reload a 2790: pseudo that didn't get a hard reg, so we have to 2791: reject that case. */ 2792: && (ind_levels ? offsettable_memref_p (operand) 2793: : offsettable_nonstrict_memref_p (operand))) 2794: /* Certain mem addresses will become offsettable 2795: after they themselves are reloaded. This is important; 2796: we don't want our own handling of unoffsettables 2797: to override the handling of reg_equiv_address. */ 2798: || (GET_CODE (operand) == MEM 2799: && GET_CODE (XEXP (operand, 0)) == REG 2800: && (ind_levels == 0 2801: || reg_equiv_address[REGNO (XEXP (operand, 0))] != 0)) 2802: || (GET_CODE (operand) == REG 2803: && REGNO (operand) >= FIRST_PSEUDO_REGISTER 1.1.1.6 root 2804: && reg_renumber[REGNO (operand)] < 0 2805: /* If reg_equiv_address is nonzero, we will be 2806: loading it into a register; hence it will be 2807: offsettable, but we cannot say that reg_equiv_mem 2808: is offsettable without checking. */ 2809: && ((reg_equiv_mem[REGNO (operand)] != 0 2810: && offsettable_memref_p (reg_equiv_mem[REGNO (operand)])) 2811: || (reg_equiv_address[REGNO (operand)] != 0)))) 1.1 root 2812: win = 1; 2813: if (CONSTANT_P (operand) || GET_CODE (operand) == MEM) 2814: badop = 0; 1.1.1.7 ! root 2815: constmemok = 1; 1.1 root 2816: offmemok = 1; 2817: break; 2818: 2819: case '&': 2820: /* Output operand that is stored before the need for the 2821: input operands (and their index registers) is over. */ 2822: earlyclobber = 1, this_earlyclobber = 1; 2823: break; 2824: 2825: case 'E': 2826: /* Match any floating double constant, but only if 2827: we can examine the bits of it reliably. */ 2828: if ((HOST_FLOAT_FORMAT != TARGET_FLOAT_FORMAT 1.1.1.4 root 2829: || HOST_BITS_PER_WIDE_INT != BITS_PER_WORD) 1.1 root 2830: && GET_MODE (operand) != VOIDmode && ! flag_pretend_float) 2831: break; 2832: if (GET_CODE (operand) == CONST_DOUBLE) 2833: win = 1; 2834: break; 2835: 2836: case 'F': 2837: if (GET_CODE (operand) == CONST_DOUBLE) 2838: win = 1; 2839: break; 2840: 2841: case 'G': 2842: case 'H': 2843: if (GET_CODE (operand) == CONST_DOUBLE 2844: && CONST_DOUBLE_OK_FOR_LETTER_P (operand, c)) 2845: win = 1; 2846: break; 2847: 2848: case 's': 2849: if (GET_CODE (operand) == CONST_INT 2850: || (GET_CODE (operand) == CONST_DOUBLE 2851: && GET_MODE (operand) == VOIDmode)) 2852: break; 2853: case 'i': 2854: if (CONSTANT_P (operand) 2855: #ifdef LEGITIMATE_PIC_OPERAND_P 2856: && (! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) 2857: #endif 2858: ) 2859: win = 1; 2860: break; 2861: 2862: case 'n': 2863: if (GET_CODE (operand) == CONST_INT 2864: || (GET_CODE (operand) == CONST_DOUBLE 2865: && GET_MODE (operand) == VOIDmode)) 2866: win = 1; 2867: break; 2868: 2869: case 'I': 2870: case 'J': 2871: case 'K': 2872: case 'L': 2873: case 'M': 2874: case 'N': 2875: case 'O': 2876: case 'P': 2877: if (GET_CODE (operand) == CONST_INT 2878: && CONST_OK_FOR_LETTER_P (INTVAL (operand), c)) 2879: win = 1; 2880: break; 2881: 2882: case 'X': 2883: win = 1; 2884: break; 2885: 2886: case 'g': 2887: if (! force_reload 2888: /* A PLUS is never a valid operand, but reload can make 2889: it from a register when eliminating registers. */ 2890: && GET_CODE (operand) != PLUS 2891: /* A SCRATCH is not a valid operand. */ 2892: && GET_CODE (operand) != SCRATCH 2893: #ifdef LEGITIMATE_PIC_OPERAND_P 2894: && (! CONSTANT_P (operand) 2895: || ! flag_pic 2896: || LEGITIMATE_PIC_OPERAND_P (operand)) 2897: #endif 2898: && (GENERAL_REGS == ALL_REGS 2899: || GET_CODE (operand) != REG 2900: || (REGNO (operand) >= FIRST_PSEUDO_REGISTER 2901: && reg_renumber[REGNO (operand)] < 0))) 2902: win = 1; 2903: /* Drop through into 'r' case */ 2904: 2905: case 'r': 2906: this_alternative[i] 2907: = (int) reg_class_subunion[this_alternative[i]][(int) GENERAL_REGS]; 2908: goto reg; 2909: 2910: #ifdef EXTRA_CONSTRAINT 2911: case 'Q': 2912: case 'R': 2913: case 'S': 2914: case 'T': 2915: case 'U': 2916: if (EXTRA_CONSTRAINT (operand, c)) 2917: win = 1; 2918: break; 2919: #endif 2920: 2921: default: 2922: this_alternative[i] 2923: = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; 2924: 2925: reg: 2926: if (GET_MODE (operand) == BLKmode) 2927: break; 2928: winreg = 1; 2929: if (GET_CODE (operand) == REG 2930: && reg_fits_class_p (operand, this_alternative[i], 2931: offset, GET_MODE (recog_operand[i]))) 2932: win = 1; 2933: break; 2934: } 2935: 2936: constraints[i] = p; 2937: 2938: /* If this operand could be handled with a reg, 2939: and some reg is allowed, then this operand can be handled. */ 2940: if (winreg && this_alternative[i] != (int) NO_REGS) 2941: badop = 0; 2942: 2943: /* Record which operands fit this alternative. */ 2944: this_alternative_earlyclobber[i] = earlyclobber; 2945: if (win && ! force_reload) 2946: this_alternative_win[i] = 1; 2947: else 2948: { 1.1.1.7 ! root 2949: int const_to_mem = 0; ! 2950: 1.1 root 2951: this_alternative_offmemok[i] = offmemok; 2952: losers++; 2953: if (badop) 2954: bad = 1; 2955: /* Alternative loses if it has no regs for a reg operand. */ 2956: if (GET_CODE (operand) == REG 2957: && this_alternative[i] == (int) NO_REGS 2958: && this_alternative_matches[i] < 0) 2959: bad = 1; 2960: 2961: /* Alternative loses if it requires a type of reload not 2962: permitted for this insn. We can always reload SCRATCH 2963: and objects with a REG_UNUSED note. */ 1.1.1.5 root 2964: if (GET_CODE (operand) != SCRATCH 2965: && modified[i] != RELOAD_READ && no_output_reloads 1.1 root 2966: && ! find_reg_note (insn, REG_UNUSED, operand)) 2967: bad = 1; 2968: else if (modified[i] != RELOAD_WRITE && no_input_reloads) 2969: bad = 1; 2970: 1.1.1.6 root 2971: /* If this is a constant that is reloaded into the desired 2972: class by copying it to memory first, count that as another 2973: reload. This is consistent with other code and is 2974: required to avoid chosing another alternative when 2975: the constant is moved into memory by this function on 2976: an early reload pass. Note that the test here is 2977: precisely the same as in the code below that calls 2978: force_const_mem. */ 2979: if (CONSTANT_P (operand) 1.1.1.7 ! root 2980: /* force_const_mem does not accept HIGH. */ ! 2981: && GET_CODE (operand) != HIGH 1.1.1.6 root 2982: && (PREFERRED_RELOAD_CLASS (operand, 2983: (enum reg_class) this_alternative[i]) 2984: == NO_REGS) 2985: && operand_mode[i] != VOIDmode) 1.1.1.7 ! root 2986: { ! 2987: const_to_mem = 1; ! 2988: if (this_alternative[i] != (int) NO_REGS) ! 2989: losers++; ! 2990: } ! 2991: ! 2992: /* If we can't reload this value at all, reject this ! 2993: alternative. Note that we could also lose due to ! 2994: LIMIT_RELOAD_RELOAD_CLASS, but we don't check that ! 2995: here. */ ! 2996: ! 2997: if (! CONSTANT_P (operand) ! 2998: && (enum reg_class) this_alternative[i] != NO_REGS ! 2999: && (PREFERRED_RELOAD_CLASS (operand, ! 3000: (enum reg_class) this_alternative[i]) ! 3001: == NO_REGS)) ! 3002: bad = 1; 1.1.1.6 root 3003: 1.1 root 3004: /* We prefer to reload pseudos over reloading other things, 3005: since such reloads may be able to be eliminated later. 3006: If we are reloading a SCRATCH, we won't be generating any 3007: insns, just using a register, so it is also preferred. 1.1.1.7 ! root 3008: So bump REJECT in other cases. Don't do this in the ! 3009: case where we are forcing a constant into memory and ! 3010: it will then win since we don't want to have a different ! 3011: alternative match then. */ 1.1.1.6 root 3012: if (! (GET_CODE (operand) == REG 3013: && REGNO (operand) >= FIRST_PSEUDO_REGISTER) 1.1.1.7 ! root 3014: && GET_CODE (operand) != SCRATCH ! 3015: && ! (const_to_mem && constmemok)) 1.1 root 3016: reject++; 3017: } 3018: 3019: /* If this operand is a pseudo register that didn't get a hard 3020: reg and this alternative accepts some register, see if the 3021: class that we want is a subset of the preferred class for this 3022: register. If not, but it intersects that class, use the 3023: preferred class instead. If it does not intersect the preferred 3024: class, show that usage of this alternative should be discouraged; 3025: it will be discouraged more still if the register is `preferred 3026: or nothing'. We do this because it increases the chance of 3027: reusing our spill register in a later insn and avoiding a pair 3028: of memory stores and loads. 3029: 3030: Don't bother with this if this alternative will accept this 3031: operand. 3032: 1.1.1.7 ! root 3033: Don't do this for a multiword operand, since it is only a ! 3034: small win and has the risk of requiring more spill registers, ! 3035: which could cause a large loss. 1.1.1.4 root 3036: 1.1 root 3037: Don't do this if the preferred class has only one register 3038: because we might otherwise exhaust the class. */ 3039: 3040: 3041: if (! win && this_alternative[i] != (int) NO_REGS 1.1.1.4 root 3042: && GET_MODE_SIZE (operand_mode[i]) <= UNITS_PER_WORD 1.1 root 3043: && reg_class_size[(int) preferred_class[i]] > 1) 3044: { 3045: if (! reg_class_subset_p (this_alternative[i], 3046: preferred_class[i])) 3047: { 3048: /* Since we don't have a way of forming the intersection, 3049: we just do something special if the preferred class 3050: is a subset of the class we have; that's the most 3051: common case anyway. */ 3052: if (reg_class_subset_p (preferred_class[i], 3053: this_alternative[i])) 3054: this_alternative[i] = (int) preferred_class[i]; 3055: else 3056: reject += (1 + pref_or_nothing[i]); 3057: } 3058: } 3059: } 3060: 3061: /* Now see if any output operands that are marked "earlyclobber" 3062: in this alternative conflict with any input operands 3063: or any memory addresses. */ 3064: 3065: for (i = 0; i < noperands; i++) 3066: if (this_alternative_earlyclobber[i] 3067: && this_alternative_win[i]) 3068: { 3069: struct decomposition early_data; 3070: 3071: early_data = decompose (recog_operand[i]); 3072: 3073: if (modified[i] == RELOAD_READ) 3074: { 3075: if (this_insn_is_asm) 3076: warning_for_asm (this_insn, 3077: "`&' constraint used with input operand"); 3078: else 3079: abort (); 3080: continue; 3081: } 3082: 3083: if (this_alternative[i] == NO_REGS) 3084: { 3085: this_alternative_earlyclobber[i] = 0; 3086: if (this_insn_is_asm) 3087: error_for_asm (this_insn, 3088: "`&' constraint used with no register class"); 3089: else 3090: abort (); 3091: } 3092: 3093: for (j = 0; j < noperands; j++) 3094: /* Is this an input operand or a memory ref? */ 3095: if ((GET_CODE (recog_operand[j]) == MEM 3096: || modified[j] != RELOAD_WRITE) 3097: && j != i 3098: /* Ignore things like match_operator operands. */ 3099: && *constraints1[j] != 0 3100: /* Don't count an input operand that is constrained to match 3101: the early clobber operand. */ 3102: && ! (this_alternative_matches[j] == i 3103: && rtx_equal_p (recog_operand[i], recog_operand[j])) 3104: /* Is it altered by storing the earlyclobber operand? */ 3105: && !immune_p (recog_operand[j], recog_operand[i], early_data)) 3106: { 3107: /* If the output is in a single-reg class, 3108: it's costly to reload it, so reload the input instead. */ 3109: if (reg_class_size[this_alternative[i]] == 1 3110: && (GET_CODE (recog_operand[j]) == REG 3111: || GET_CODE (recog_operand[j]) == SUBREG)) 3112: { 3113: losers++; 3114: this_alternative_win[j] = 0; 3115: } 3116: else 3117: break; 3118: } 3119: /* If an earlyclobber operand conflicts with something, 3120: it must be reloaded, so request this and count the cost. */ 3121: if (j != noperands) 3122: { 3123: losers++; 3124: this_alternative_win[i] = 0; 3125: for (j = 0; j < noperands; j++) 3126: if (this_alternative_matches[j] == i 3127: && this_alternative_win[j]) 3128: { 3129: this_alternative_win[j] = 0; 3130: losers++; 3131: } 3132: } 3133: } 3134: 3135: /* If one alternative accepts all the operands, no reload required, 3136: choose that alternative; don't consider the remaining ones. */ 3137: if (losers == 0) 3138: { 3139: /* Unswap these so that they are never swapped at `finish'. */ 3140: if (commutative >= 0) 3141: { 3142: recog_operand[commutative] = substed_operand[commutative]; 3143: recog_operand[commutative + 1] 3144: = substed_operand[commutative + 1]; 3145: } 3146: for (i = 0; i < noperands; i++) 3147: { 3148: goal_alternative_win[i] = 1; 3149: goal_alternative[i] = this_alternative[i]; 3150: goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3151: goal_alternative_matches[i] = this_alternative_matches[i]; 3152: goal_alternative_earlyclobber[i] 3153: = this_alternative_earlyclobber[i]; 3154: } 3155: goal_alternative_number = this_alternative_number; 3156: goal_alternative_swapped = swapped; 3157: goal_earlyclobber = this_earlyclobber; 3158: goto finish; 3159: } 3160: 3161: /* REJECT, set by the ! and ? constraint characters and when a register 3162: would be reloaded into a non-preferred class, discourages the use of 3163: this alternative for a reload goal. REJECT is incremented by three 3164: for each ? and one for each non-preferred class. */ 3165: losers = losers * 3 + reject; 3166: 3167: /* If this alternative can be made to work by reloading, 3168: and it needs less reloading than the others checked so far, 3169: record it as the chosen goal for reloading. */ 3170: if (! bad && best > losers) 3171: { 3172: for (i = 0; i < noperands; i++) 3173: { 3174: goal_alternative[i] = this_alternative[i]; 3175: goal_alternative_win[i] = this_alternative_win[i]; 3176: goal_alternative_offmemok[i] = this_alternative_offmemok[i]; 3177: goal_alternative_matches[i] = this_alternative_matches[i]; 3178: goal_alternative_earlyclobber[i] 3179: = this_alternative_earlyclobber[i]; 3180: } 3181: goal_alternative_swapped = swapped; 3182: best = losers; 3183: goal_alternative_number = this_alternative_number; 3184: goal_earlyclobber = this_earlyclobber; 3185: } 3186: } 3187: 3188: /* If insn is commutative (it's safe to exchange a certain pair of operands) 3189: then we need to try each alternative twice, 3190: the second time matching those two operands 3191: as if we had exchanged them. 3192: To do this, really exchange them in operands. 3193: 3194: If we have just tried the alternatives the second time, 3195: return operands to normal and drop through. */ 3196: 3197: if (commutative >= 0) 3198: { 3199: swapped = !swapped; 3200: if (swapped) 3201: { 3202: register enum reg_class tclass; 3203: register int t; 3204: 3205: recog_operand[commutative] = substed_operand[commutative + 1]; 3206: recog_operand[commutative + 1] = substed_operand[commutative]; 3207: 3208: tclass = preferred_class[commutative]; 3209: preferred_class[commutative] = preferred_class[commutative + 1]; 3210: preferred_class[commutative + 1] = tclass; 3211: 3212: t = pref_or_nothing[commutative]; 3213: pref_or_nothing[commutative] = pref_or_nothing[commutative + 1]; 3214: pref_or_nothing[commutative + 1] = t; 3215: 1.1.1.7 ! root 3216: bcopy ((char *) constraints1, (char *) constraints, ! 3217: noperands * sizeof (char *)); 1.1 root 3218: goto try_swapped; 3219: } 3220: else 3221: { 3222: recog_operand[commutative] = substed_operand[commutative]; 3223: recog_operand[commutative + 1] = substed_operand[commutative + 1]; 3224: } 3225: } 3226: 3227: /* The operands don't meet the constraints. 3228: goal_alternative describes the alternative 3229: that we could reach by reloading the fewest operands. 3230: Reload so as to fit it. */ 3231: 3232: if (best == MAX_RECOG_OPERANDS + 300) 3233: { 3234: /* No alternative works with reloads?? */ 3235: if (insn_code_number >= 0) 3236: abort (); 3237: error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3238: /* Avoid further trouble with this insn. */ 3239: PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); 3240: n_reloads = 0; 3241: return; 3242: } 3243: 3244: /* Jump to `finish' from above if all operands are valid already. 3245: In that case, goal_alternative_win is all 1. */ 3246: finish: 3247: 3248: /* Right now, for any pair of operands I and J that are required to match, 3249: with I < J, 3250: goal_alternative_matches[J] is I. 3251: Set up goal_alternative_matched as the inverse function: 3252: goal_alternative_matched[I] = J. */ 3253: 3254: for (i = 0; i < noperands; i++) 3255: goal_alternative_matched[i] = -1; 3256: 3257: for (i = 0; i < noperands; i++) 3258: if (! goal_alternative_win[i] 3259: && goal_alternative_matches[i] >= 0) 3260: goal_alternative_matched[goal_alternative_matches[i]] = i; 3261: 3262: /* If the best alternative is with operands 1 and 2 swapped, 1.1.1.5 root 3263: consider them swapped before reporting the reloads. Update the 3264: operand numbers of any reloads already pushed. */ 1.1 root 3265: 3266: if (goal_alternative_swapped) 3267: { 3268: register rtx tem; 3269: 3270: tem = substed_operand[commutative]; 3271: substed_operand[commutative] = substed_operand[commutative + 1]; 3272: substed_operand[commutative + 1] = tem; 3273: tem = recog_operand[commutative]; 3274: recog_operand[commutative] = recog_operand[commutative + 1]; 3275: recog_operand[commutative + 1] = tem; 1.1.1.5 root 3276: 3277: for (i = 0; i < n_reloads; i++) 3278: { 3279: if (reload_opnum[i] == commutative) 3280: reload_opnum[i] = commutative + 1; 3281: else if (reload_opnum[i] == commutative + 1) 3282: reload_opnum[i] = commutative; 3283: } 1.1 root 3284: } 3285: 3286: /* Perform whatever substitutions on the operands we are supposed 3287: to make due to commutativity or replacement of registers 3288: with equivalent constants or memory slots. */ 3289: 3290: for (i = 0; i < noperands; i++) 3291: { 3292: *recog_operand_loc[i] = substed_operand[i]; 3293: /* While we are looping on operands, initialize this. */ 3294: operand_reloadnum[i] = -1; 1.1.1.5 root 3295: 3296: /* If this is an earlyclobber operand, we need to widen the scope. 3297: The reload must remain valid from the start of the insn being 3298: reloaded until after the operand is stored into its destination. 3299: We approximate this with RELOAD_OTHER even though we know that we 3300: do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads. 3301: 3302: One special case that is worth checking is when we have an 3303: output that is earlyclobber but isn't used past the insn (typically 3304: a SCRATCH). In this case, we only need have the reload live 3305: through the insn itself, but not for any of our input or output 3306: reloads. 3307: 3308: In any case, anything needed to address this operand can remain 3309: however they were previously categorized. */ 3310: 3311: if (goal_alternative_earlyclobber[i]) 3312: operand_type[i] 3313: = (find_reg_note (insn, REG_UNUSED, recog_operand[i]) 3314: ? RELOAD_FOR_INSN : RELOAD_OTHER); 1.1 root 3315: } 3316: 3317: /* Any constants that aren't allowed and can't be reloaded 3318: into registers are here changed into memory references. */ 3319: for (i = 0; i < noperands; i++) 3320: if (! goal_alternative_win[i] 3321: && CONSTANT_P (recog_operand[i]) 1.1.1.7 ! root 3322: /* force_const_mem does not accept HIGH. */ ! 3323: && GET_CODE (recog_operand[i]) != HIGH 1.1 root 3324: && (PREFERRED_RELOAD_CLASS (recog_operand[i], 3325: (enum reg_class) goal_alternative[i]) 3326: == NO_REGS) 3327: && operand_mode[i] != VOIDmode) 3328: { 3329: *recog_operand_loc[i] = recog_operand[i] 3330: = find_reloads_toplev (force_const_mem (operand_mode[i], 3331: recog_operand[i]), 1.1.1.5 root 3332: i, address_type[i], ind_levels, 0); 1.1 root 3333: if (alternative_allows_memconst (constraints1[i], 3334: goal_alternative_number)) 3335: goal_alternative_win[i] = 1; 3336: } 3337: 1.1.1.6 root 3338: /* Record the values of the earlyclobber operands for the caller. */ 3339: if (goal_earlyclobber) 3340: for (i = 0; i < noperands; i++) 3341: if (goal_alternative_earlyclobber[i]) 3342: reload_earlyclobbers[n_earlyclobbers++] = recog_operand[i]; 3343: 1.1 root 3344: /* Now record reloads for all the operands that need them. */ 3345: for (i = 0; i < noperands; i++) 3346: if (! goal_alternative_win[i]) 3347: { 3348: /* Operands that match previous ones have already been handled. */ 3349: if (goal_alternative_matches[i] >= 0) 3350: ; 3351: /* Handle an operand with a nonoffsettable address 3352: appearing where an offsettable address will do 1.1.1.6 root 3353: by reloading the address into a base register. 3354: 3355: ??? We can also do this when the operand is a register and 3356: reg_equiv_mem is not offsettable, but this is a bit tricky, 3357: so we don't bother with it. It may not be worth doing. */ 1.1 root 3358: else if (goal_alternative_matched[i] == -1 3359: && goal_alternative_offmemok[i] 3360: && GET_CODE (recog_operand[i]) == MEM) 3361: { 3362: operand_reloadnum[i] 1.1.1.4 root 3363: = push_reload (XEXP (recog_operand[i], 0), NULL_RTX, 3364: &XEXP (recog_operand[i], 0), NULL_PTR, 1.1 root 3365: BASE_REG_CLASS, GET_MODE (XEXP (recog_operand[i], 0)), 1.1.1.5 root 3366: VOIDmode, 0, 0, i, RELOAD_FOR_INPUT); 1.1 root 3367: reload_inc[operand_reloadnum[i]] 3368: = GET_MODE_SIZE (GET_MODE (recog_operand[i])); 1.1.1.5 root 3369: 3370: /* If this operand is an output, we will have made any 3371: reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but 3372: now we are treating part of the operand as an input, so 3373: we must change these to RELOAD_FOR_INPUT_ADDRESS. */ 3374: 1.1.1.6 root 3375: if (modified[i] == RELOAD_WRITE) 1.1.1.5 root 3376: for (j = 0; j < n_reloads; j++) 3377: if (reload_opnum[j] == i 3378: && reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS) 3379: reload_when_needed[j] = RELOAD_FOR_INPUT_ADDRESS; 1.1 root 3380: } 3381: else if (goal_alternative_matched[i] == -1) 3382: operand_reloadnum[i] = 3383: push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, 3384: modified[i] != RELOAD_READ ? recog_operand[i] : 0, 1.1.1.5 root 3385: (modified[i] != RELOAD_WRITE ? 3386: recog_operand_loc[i] : 0), 1.1 root 3387: modified[i] != RELOAD_READ ? recog_operand_loc[i] : 0, 3388: (enum reg_class) goal_alternative[i], 1.1.1.5 root 3389: (modified[i] == RELOAD_WRITE 3390: ? VOIDmode : operand_mode[i]), 3391: (modified[i] == RELOAD_READ 3392: ? VOIDmode : operand_mode[i]), 1.1 root 3393: (insn_code_number < 0 ? 0 3394: : insn_operand_strict_low[insn_code_number][i]), 1.1.1.5 root 3395: 0, i, operand_type[i]); 1.1 root 3396: /* In a matching pair of operands, one must be input only 3397: and the other must be output only. 3398: Pass the input operand as IN and the other as OUT. */ 3399: else if (modified[i] == RELOAD_READ 3400: && modified[goal_alternative_matched[i]] == RELOAD_WRITE) 3401: { 3402: operand_reloadnum[i] 3403: = push_reload (recog_operand[i], 3404: recog_operand[goal_alternative_matched[i]], 3405: recog_operand_loc[i], 3406: recog_operand_loc[goal_alternative_matched[i]], 3407: (enum reg_class) goal_alternative[i], 3408: operand_mode[i], 3409: operand_mode[goal_alternative_matched[i]], 1.1.1.5 root 3410: 0, 0, i, RELOAD_OTHER); 1.1 root 3411: operand_reloadnum[goal_alternative_matched[i]] = output_reloadnum; 3412: } 3413: else if (modified[i] == RELOAD_WRITE 3414: && modified[goal_alternative_matched[i]] == RELOAD_READ) 3415: { 3416: operand_reloadnum[goal_alternative_matched[i]] 3417: = push_reload (recog_operand[goal_alternative_matched[i]], 3418: recog_operand[i], 3419: recog_operand_loc[goal_alternative_matched[i]], 3420: recog_operand_loc[i], 3421: (enum reg_class) goal_alternative[i], 3422: operand_mode[goal_alternative_matched[i]], 3423: operand_mode[i], 1.1.1.5 root 3424: 0, 0, i, RELOAD_OTHER); 1.1 root 3425: operand_reloadnum[i] = output_reloadnum; 3426: } 3427: else if (insn_code_number >= 0) 3428: abort (); 3429: else 3430: { 3431: error_for_asm (insn, "inconsistent operand constraints in an `asm'"); 3432: /* Avoid further trouble with this insn. */ 3433: PATTERN (insn) = gen_rtx (USE, VOIDmode, const0_rtx); 3434: n_reloads = 0; 3435: return; 3436: } 3437: } 3438: else if (goal_alternative_matched[i] < 0 3439: && goal_alternative_matches[i] < 0 3440: && optimize) 3441: { 1.1.1.5 root 3442: /* For each non-matching operand that's a MEM or a pseudo-register 1.1 root 3443: that didn't get a hard register, make an optional reload. 3444: This may get done even if the insn needs no reloads otherwise. */ 1.1.1.5 root 3445: 3446: rtx operand = recog_operand[i]; 3447: 1.1 root 3448: while (GET_CODE (operand) == SUBREG) 3449: operand = XEXP (operand, 0); 1.1.1.5 root 3450: if ((GET_CODE (operand) == MEM 3451: || (GET_CODE (operand) == REG 3452: && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 1.1 root 3453: && (enum reg_class) goal_alternative[i] != NO_REGS 1.1.1.5 root 3454: && ! no_input_reloads 3455: /* Optional output reloads don't do anything and we mustn't 3456: make in-out reloads on insns that are not permitted output 3457: reloads. */ 1.1 root 3458: && (modified[i] == RELOAD_READ 1.1.1.5 root 3459: || (modified[i] == RELOAD_READ_WRITE && ! no_output_reloads))) 1.1 root 3460: operand_reloadnum[i] 3461: = push_reload (modified[i] != RELOAD_WRITE ? recog_operand[i] : 0, 3462: modified[i] != RELOAD_READ ? recog_operand[i] : 0, 1.1.1.5 root 3463: (modified[i] != RELOAD_WRITE 3464: ? recog_operand_loc[i] : 0), 3465: (modified[i] != RELOAD_READ 3466: ? recog_operand_loc[i] : 0), 1.1 root 3467: (enum reg_class) goal_alternative[i], 1.1.1.5 root 3468: (modified[i] == RELOAD_WRITE 3469: ? VOIDmode : operand_mode[i]), 3470: (modified[i] == RELOAD_READ 3471: ? VOIDmode : operand_mode[i]), 1.1 root 3472: (insn_code_number < 0 ? 0 3473: : insn_operand_strict_low[insn_code_number][i]), 1.1.1.5 root 3474: 1, i, operand_type[i]); 1.1 root 3475: } 1.1.1.5 root 3476: else if (goal_alternative_matches[i] >= 0 3477: && goal_alternative_win[goal_alternative_matches[i]] 3478: && modified[i] == RELOAD_READ 3479: && modified[goal_alternative_matches[i]] == RELOAD_WRITE 3480: && ! no_input_reloads && ! no_output_reloads 3481: && optimize) 3482: { 3483: /* Similarly, make an optional reload for a pair of matching 3484: objects that are in MEM or a pseudo that didn't get a hard reg. */ 3485: 3486: rtx operand = recog_operand[i]; 1.1 root 3487: 1.1.1.5 root 3488: while (GET_CODE (operand) == SUBREG) 3489: operand = XEXP (operand, 0); 3490: if ((GET_CODE (operand) == MEM 3491: || (GET_CODE (operand) == REG 3492: && REGNO (operand) >= FIRST_PSEUDO_REGISTER)) 3493: && ((enum reg_class) goal_alternative[goal_alternative_matches[i]] 3494: != NO_REGS)) 3495: operand_reloadnum[i] = operand_reloadnum[goal_alternative_matches[i]] 3496: = push_reload (recog_operand[goal_alternative_matches[i]], 3497: recog_operand[i], 3498: recog_operand_loc[goal_alternative_matches[i]], 3499: recog_operand_loc[i], 3500: (enum reg_class) goal_alternative[goal_alternative_matches[i]], 3501: operand_mode[goal_alternative_matches[i]], 3502: operand_mode[i], 3503: 0, 1, goal_alternative_matches[i], RELOAD_OTHER); 3504: } 3505: 1.1 root 3506: /* If this insn pattern contains any MATCH_DUP's, make sure that 3507: they will be substituted if the operands they match are substituted. 3508: Also do now any substitutions we already did on the operands. 3509: 3510: Don't do this if we aren't making replacements because we might be 3511: propagating things allocated by frame pointer elimination into places 3512: it doesn't expect. */ 3513: 3514: if (insn_code_number >= 0 && replace) 3515: for (i = insn_n_dups[insn_code_number] - 1; i >= 0; i--) 3516: { 3517: int opno = recog_dup_num[i]; 3518: *recog_dup_loc[i] = *recog_operand_loc[opno]; 3519: if (operand_reloadnum[opno] >= 0) 3520: push_replacement (recog_dup_loc[i], operand_reloadnum[opno], 3521: insn_operand_mode[insn_code_number][opno]); 3522: } 3523: 3524: #if 0 3525: /* This loses because reloading of prior insns can invalidate the equivalence 3526: (or at least find_equiv_reg isn't smart enough to find it any more), 3527: causing this insn to need more reload regs than it needed before. 3528: It may be too late to make the reload regs available. 3529: Now this optimization is done safely in choose_reload_regs. */ 3530: 3531: /* For each reload of a reg into some other class of reg, 3532: search for an existing equivalent reg (same value now) in the right class. 3533: We can use it as long as we don't need to change its contents. */ 3534: for (i = 0; i < n_reloads; i++) 3535: if (reload_reg_rtx[i] == 0 3536: && reload_in[i] != 0 3537: && GET_CODE (reload_in[i]) == REG 3538: && reload_out[i] == 0) 3539: { 3540: reload_reg_rtx[i] 3541: = find_equiv_reg (reload_in[i], insn, reload_reg_class[i], -1, 3542: static_reload_reg_p, 0, reload_inmode[i]); 3543: /* Prevent generation of insn to load the value 3544: because the one we found already has the value. */ 3545: if (reload_reg_rtx[i]) 3546: reload_in[i] = reload_reg_rtx[i]; 3547: } 3548: #endif 3549: 1.1.1.5 root 3550: /* Perhaps an output reload can be combined with another 3551: to reduce needs by one. */ 3552: if (!goal_earlyclobber) 3553: combine_reloads (); 3554: 3555: /* If we have a pair of reloads for parts of an address, they are reloading 3556: the same object, the operands themselves were not reloaded, and they 3557: are for two operands that are supposed to match, merge the reloads and 3558: change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */ 3559: 3560: for (i = 0; i < n_reloads; i++) 3561: { 3562: int k; 3563: 3564: for (j = i + 1; j < n_reloads; j++) 3565: if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 3566: || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS) 3567: && (reload_when_needed[j] == RELOAD_FOR_INPUT_ADDRESS 3568: || reload_when_needed[j] == RELOAD_FOR_OUTPUT_ADDRESS) 3569: && rtx_equal_p (reload_in[i], reload_in[j]) 3570: && (operand_reloadnum[reload_opnum[i]] < 0 3571: || reload_optional[operand_reloadnum[reload_opnum[i]]]) 3572: && (operand_reloadnum[reload_opnum[j]] < 0 3573: || reload_optional[operand_reloadnum[reload_opnum[j]]]) 3574: && (goal_alternative_matches[reload_opnum[i]] == reload_opnum[j] 3575: || (goal_alternative_matches[reload_opnum[j]] 3576: == reload_opnum[i]))) 3577: { 3578: for (k = 0; k < n_replacements; k++) 3579: if (replacements[k].what == j) 3580: replacements[k].what = i; 3581: 3582: reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; 3583: reload_in[j] = 0; 3584: } 3585: } 3586: 3587: /* Scan all the reloads and update their type. 3588: If a reload is for the address of an operand and we didn't reload 3589: that operand, change the type. Similarly, change the operand number 3590: of a reload when two operands match. If a reload is optional, treat it 3591: as though the operand isn't reloaded. 3592: 3593: ??? This latter case is somewhat odd because if we do the optional 3594: reload, it means the object is hanging around. Thus we need only 3595: do the address reload if the optional reload was NOT done. 3596: 3597: Change secondary reloads to be the address type of their operand, not 3598: the normal type. 3599: 3600: If an operand's reload is now RELOAD_OTHER, change any 3601: RELOAD_FOR_INPUT_ADDRESS reloads of that operand to 3602: RELOAD_FOR_OTHER_ADDRESS. */ 3603: 3604: for (i = 0; i < n_reloads; i++) 3605: { 3606: if (reload_secondary_p[i] 3607: && reload_when_needed[i] == operand_type[reload_opnum[i]]) 3608: reload_when_needed[i] = address_type[reload_opnum[i]]; 3609: 3610: if ((reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 3611: || reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS) 3612: && (operand_reloadnum[reload_opnum[i]] < 0 3613: || reload_optional[operand_reloadnum[reload_opnum[i]]])) 1.1.1.7 ! root 3614: { ! 3615: /* If we have a secondary reload to go along with this reload, ! 3616: change its type to RELOAD_FOR_OPADDR_ADDR. */ ! 3617: ! 3618: if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS ! 3619: && reload_secondary_in_reload[i] != -1) ! 3620: { ! 3621: int secondary_in_reload = reload_secondary_in_reload[i]; ! 3622: ! 3623: reload_when_needed[secondary_in_reload] = ! 3624: RELOAD_FOR_OPADDR_ADDR; ! 3625: ! 3626: /* If there's a tertiary reload we have to change it also. */ ! 3627: if (secondary_in_reload > 0 ! 3628: && reload_secondary_in_reload[secondary_in_reload] != -1) ! 3629: reload_when_needed[reload_secondary_in_reload[secondary_in_reload]] ! 3630: = RELOAD_FOR_OPADDR_ADDR; ! 3631: } ! 3632: ! 3633: if (reload_when_needed[i] == RELOAD_FOR_OUTPUT_ADDRESS ! 3634: && reload_secondary_out_reload[i] != -1) ! 3635: { ! 3636: int secondary_out_reload = reload_secondary_out_reload[i]; ! 3637: ! 3638: reload_when_needed[secondary_out_reload] = ! 3639: RELOAD_FOR_OPADDR_ADDR; ! 3640: ! 3641: /* If there's a tertiary reload we have to change it also. */ ! 3642: if (secondary_out_reload ! 3643: && reload_secondary_out_reload[secondary_out_reload] != -1) ! 3644: reload_when_needed[reload_secondary_out_reload[secondary_out_reload]] ! 3645: = RELOAD_FOR_OPADDR_ADDR; ! 3646: } ! 3647: reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; ! 3648: } 1.1.1.5 root 3649: 3650: if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS 3651: && operand_reloadnum[reload_opnum[i]] >= 0 3652: && (reload_when_needed[operand_reloadnum[reload_opnum[i]]] 3653: == RELOAD_OTHER)) 3654: reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS; 3655: 3656: if (goal_alternative_matches[reload_opnum[i]] >= 0) 3657: reload_opnum[i] = goal_alternative_matches[reload_opnum[i]]; 3658: } 3659: 3660: /* See if we have any reloads that are now allowed to be merged 3661: because we've changed when the reload is needed to 3662: RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only 3663: check for the most common cases. */ 3664: 3665: for (i = 0; i < n_reloads; i++) 3666: if (reload_in[i] != 0 && reload_out[i] == 0 3667: && (reload_when_needed[i] == RELOAD_FOR_OPERAND_ADDRESS 3668: || reload_when_needed[i] == RELOAD_FOR_OTHER_ADDRESS)) 3669: for (j = 0; j < n_reloads; j++) 3670: if (i != j && reload_in[j] != 0 && reload_out[j] == 0 3671: && reload_when_needed[j] == reload_when_needed[i] 1.1.1.6 root 3672: && MATCHES (reload_in[i], reload_in[j]) 3673: && reload_reg_class[i] == reload_reg_class[j] 3674: && !reload_nocombine[i] && !reload_nocombine[j] 3675: && reload_reg_rtx[i] == reload_reg_rtx[j]) 1.1.1.5 root 3676: { 3677: reload_opnum[i] = MIN (reload_opnum[i], reload_opnum[j]); 3678: transfer_replacements (i, j); 3679: reload_in[j] = 0; 3680: } 3681: 1.1 root 3682: #else /* no REGISTER_CONSTRAINTS */ 3683: int noperands; 3684: int insn_code_number; 3685: int goal_earlyclobber = 0; /* Always 0, to make combine_reloads happen. */ 3686: register int i; 3687: rtx body = PATTERN (insn); 3688: 3689: n_reloads = 0; 3690: n_replacements = 0; 3691: n_earlyclobbers = 0; 3692: replace_reloads = replace; 3693: this_insn = insn; 3694: 3695: /* Find what kind of insn this is. NOPERANDS gets number of operands. 3696: Store the operand values in RECOG_OPERAND and the locations 3697: of the words in the insn that point to them in RECOG_OPERAND_LOC. 3698: Return if the insn needs no reload processing. */ 3699: 3700: switch (GET_CODE (body)) 3701: { 3702: case USE: 3703: case CLOBBER: 3704: case ASM_INPUT: 3705: case ADDR_VEC: 3706: case ADDR_DIFF_VEC: 3707: return; 3708: 3709: case PARALLEL: 3710: case SET: 3711: noperands = asm_noperands (body); 3712: if (noperands >= 0) 3713: { 3714: /* This insn is an `asm' with operands. 3715: First, find out how many operands, and allocate space. */ 3716: 3717: insn_code_number = -1; 3718: /* ??? This is a bug! ??? 3719: Give up and delete this insn if it has too many operands. */ 3720: if (noperands > MAX_RECOG_OPERANDS) 3721: abort (); 3722: 3723: /* Now get the operand values out of the insn. */ 3724: 1.1.1.4 root 3725: decode_asm_operands (body, recog_operand, recog_operand_loc, 3726: NULL_PTR, NULL_PTR); 1.1 root 3727: break; 3728: } 3729: 3730: default: 3731: /* Ordinary insn: recognize it, allocate space for operands and 3732: constraints, and get them out via insn_extract. */ 3733: 3734: insn_code_number = recog_memoized (insn); 3735: noperands = insn_n_operands[insn_code_number]; 3736: insn_extract (insn); 3737: } 3738: 3739: if (noperands == 0) 3740: return; 3741: 3742: for (i = 0; i < noperands; i++) 3743: { 3744: register RTX_CODE code = GET_CODE (recog_operand[i]); 3745: int is_set_dest = GET_CODE (body) == SET && (i == 0); 3746: 3747: if (insn_code_number >= 0) 3748: if (insn_operand_address_p[insn_code_number][i]) 1.1.1.4 root 3749: find_reloads_address (VOIDmode, NULL_PTR, 1.1 root 3750: recog_operand[i], recog_operand_loc[i], 1.1.1.5 root 3751: i, RELOAD_FOR_INPUT, ind_levels); 3752: 3753: /* In these cases, we can't tell if the operand is an input 3754: or an output, so be conservative. In practice it won't be 3755: problem. */ 3756: 1.1 root 3757: if (code == MEM) 3758: find_reloads_address (GET_MODE (recog_operand[i]), 3759: recog_operand_loc[i], 3760: XEXP (recog_operand[i], 0), 3761: &XEXP (recog_operand[i], 0), 1.1.1.5 root 3762: i, RELOAD_OTHER, ind_levels); 1.1 root 3763: if (code == SUBREG) 3764: recog_operand[i] = *recog_operand_loc[i] 1.1.1.5 root 3765: = find_reloads_toplev (recog_operand[i], i, RELOAD_OTHER, 3766: ind_levels, is_set_dest); 1.1 root 3767: if (code == REG) 3768: { 3769: register int regno = REGNO (recog_operand[i]); 3770: if (reg_equiv_constant[regno] != 0 && !is_set_dest) 3771: recog_operand[i] = *recog_operand_loc[i] 3772: = reg_equiv_constant[regno]; 3773: #if 0 /* This might screw code in reload1.c to delete prior output-reload 3774: that feeds this insn. */ 3775: if (reg_equiv_mem[regno] != 0) 3776: recog_operand[i] = *recog_operand_loc[i] 3777: = reg_equiv_mem[regno]; 3778: #endif 3779: } 3780: } 3781: 3782: /* Perhaps an output reload can be combined with another 3783: to reduce needs by one. */ 3784: if (!goal_earlyclobber) 3785: combine_reloads (); 1.1.1.5 root 3786: #endif /* no REGISTER_CONSTRAINTS */ 1.1 root 3787: } 3788: 3789: /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT 3790: accepts a memory operand with constant address. */ 3791: 3792: static int 3793: alternative_allows_memconst (constraint, altnum) 3794: char *constraint; 3795: int altnum; 3796: { 3797: register int c; 3798: /* Skip alternatives before the one requested. */ 3799: while (altnum > 0) 3800: { 3801: while (*constraint++ != ','); 3802: altnum--; 3803: } 3804: /* Scan the requested alternative for 'm' or 'o'. 3805: If one of them is present, this alternative accepts memory constants. */ 3806: while ((c = *constraint++) && c != ',' && c != '#') 3807: if (c == 'm' || c == 'o') 3808: return 1; 3809: return 0; 3810: } 3811: 3812: /* Scan X for memory references and scan the addresses for reloading. 3813: Also checks for references to "constant" regs that we want to eliminate 3814: and replaces them with the values they stand for. 1.1.1.3 root 3815: We may alter X destructively if it contains a reference to such. 1.1 root 3816: If X is just a constant reg, we return the equivalent value 3817: instead of X. 3818: 3819: IND_LEVELS says how many levels of indirect addressing this machine 3820: supports. 3821: 1.1.1.5 root 3822: OPNUM and TYPE identify the purpose of the reload. 3823: 1.1 root 3824: IS_SET_DEST is true if X is the destination of a SET, which is not 3825: appropriate to be replaced by a constant. */ 3826: 3827: static rtx 1.1.1.5 root 3828: find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest) 1.1 root 3829: rtx x; 1.1.1.5 root 3830: int opnum; 3831: enum reload_type type; 1.1 root 3832: int ind_levels; 3833: int is_set_dest; 3834: { 3835: register RTX_CODE code = GET_CODE (x); 3836: 3837: register char *fmt = GET_RTX_FORMAT (code); 3838: register int i; 3839: 3840: if (code == REG) 3841: { 3842: /* This code is duplicated for speed in find_reloads. */ 3843: register int regno = REGNO (x); 3844: if (reg_equiv_constant[regno] != 0 && !is_set_dest) 3845: x = reg_equiv_constant[regno]; 3846: #if 0 3847: /* This creates (subreg (mem...)) which would cause an unnecessary 3848: reload of the mem. */ 3849: else if (reg_equiv_mem[regno] != 0) 3850: x = reg_equiv_mem[regno]; 3851: #endif 3852: else if (reg_equiv_address[regno] != 0) 3853: { 3854: /* If reg_equiv_address varies, it may be shared, so copy it. */ 3855: rtx addr = reg_equiv_address[regno]; 3856: 3857: if (rtx_varies_p (addr)) 3858: addr = copy_rtx (addr); 3859: 3860: x = gen_rtx (MEM, GET_MODE (x), addr); 3861: RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 1.1.1.4 root 3862: find_reloads_address (GET_MODE (x), NULL_PTR, 1.1 root 3863: XEXP (x, 0), 1.1.1.5 root 3864: &XEXP (x, 0), opnum, type, ind_levels); 1.1 root 3865: } 3866: return x; 3867: } 3868: if (code == MEM) 3869: { 3870: rtx tem = x; 3871: find_reloads_address (GET_MODE (x), &tem, XEXP (x, 0), &XEXP (x, 0), 1.1.1.5 root 3872: opnum, type, ind_levels); 1.1 root 3873: return tem; 3874: } 3875: 3876: if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) 3877: { 3878: /* Check for SUBREG containing a REG that's equivalent to a constant. 3879: If the constant has a known value, truncate it right now. 3880: Similarly if we are extracting a single-word of a multi-word 3881: constant. If the constant is symbolic, allow it to be substituted 3882: normally. push_reload will strip the subreg later. If the 3883: constant is VOIDmode, abort because we will lose the mode of 3884: the register (this should never happen because one of the cases 3885: above should handle it). */ 3886: 3887: register int regno = REGNO (SUBREG_REG (x)); 3888: rtx tem; 3889: 3890: if (subreg_lowpart_p (x) 3891: && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 3892: && reg_equiv_constant[regno] != 0 3893: && (tem = gen_lowpart_common (GET_MODE (x), 3894: reg_equiv_constant[regno])) != 0) 3895: return tem; 3896: 3897: if (GET_MODE_BITSIZE (GET_MODE (x)) == BITS_PER_WORD 3898: && regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 3899: && reg_equiv_constant[regno] != 0 3900: && (tem = operand_subword (reg_equiv_constant[regno], 3901: SUBREG_WORD (x), 0, 3902: GET_MODE (SUBREG_REG (x)))) != 0) 3903: return tem; 3904: 3905: if (regno >= FIRST_PSEUDO_REGISTER && reg_renumber[regno] < 0 3906: && reg_equiv_constant[regno] != 0 3907: && GET_MODE (reg_equiv_constant[regno]) == VOIDmode) 3908: abort (); 3909: 3910: /* If the subreg contains a reg that will be converted to a mem, 3911: convert the subreg to a narrower memref now. 3912: Otherwise, we would get (subreg (mem ...) ...), 3913: which would force reload of the mem. 3914: 3915: We also need to do this if there is an equivalent MEM that is 3916: not offsettable. In that case, alter_subreg would produce an 1.1.1.2 root 3917: invalid address on big-endian machines. 3918: 1.1.1.4 root 3919: For machines that extend byte loads, we must not reload using 1.1.1.2 root 3920: a wider mode if we have a paradoxical SUBREG. find_reloads will 3921: force a reload in that case. So we should not do anything here. */ 1.1 root 3922: 3923: else if (regno >= FIRST_PSEUDO_REGISTER 1.1.1.6 root 3924: #ifdef LOAD_EXTEND_OP 1.1.1.2 root 3925: && (GET_MODE_SIZE (GET_MODE (x)) 3926: <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x)))) 3927: #endif 1.1 root 3928: && (reg_equiv_address[regno] != 0 3929: || (reg_equiv_mem[regno] != 0 1.1.1.5 root 3930: && (! strict_memory_address_p (GET_MODE (x), 3931: XEXP (reg_equiv_mem[regno], 0)) 3932: || ! offsettable_memref_p (reg_equiv_mem[regno]))))) 1.1 root 3933: { 3934: int offset = SUBREG_WORD (x) * UNITS_PER_WORD; 3935: rtx addr = (reg_equiv_address[regno] ? reg_equiv_address[regno] 3936: : XEXP (reg_equiv_mem[regno], 0)); 3937: #if BYTES_BIG_ENDIAN 3938: int size; 3939: size = GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))); 3940: offset += MIN (size, UNITS_PER_WORD); 3941: size = GET_MODE_SIZE (GET_MODE (x)); 3942: offset -= MIN (size, UNITS_PER_WORD); 3943: #endif 3944: addr = plus_constant (addr, offset); 3945: x = gen_rtx (MEM, GET_MODE (x), addr); 3946: RTX_UNCHANGING_P (x) = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 1.1.1.4 root 3947: find_reloads_address (GET_MODE (x), NULL_PTR, 1.1 root 3948: XEXP (x, 0), 1.1.1.5 root 3949: &XEXP (x, 0), opnum, type, ind_levels); 1.1 root 3950: } 3951: 3952: } 3953: 3954: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 3955: { 3956: if (fmt[i] == 'e') 1.1.1.5 root 3957: XEXP (x, i) = find_reloads_toplev (XEXP (x, i), opnum, type, 1.1 root 3958: ind_levels, is_set_dest); 3959: } 3960: return x; 3961: } 3962: 1.1.1.5 root 3963: /* Return a mem ref for the memory equivalent of reg REGNO. 3964: This mem ref is not shared with anything. */ 3965: 1.1 root 3966: static rtx 3967: make_memloc (ad, regno) 3968: rtx ad; 3969: int regno; 3970: { 3971: register int i; 3972: rtx tem = reg_equiv_address[regno]; 1.1.1.5 root 3973: 3974: #if 0 /* We cannot safely reuse a memloc made here; 3975: if the pseudo appears twice, and its mem needs a reload, 3976: it gets two separate reloads assigned, but it only 3977: gets substituted with the second of them; 3978: then it can get used before that reload reg gets loaded up. */ 1.1 root 3979: for (i = 0; i < n_memlocs; i++) 3980: if (rtx_equal_p (tem, XEXP (memlocs[i], 0))) 3981: return memlocs[i]; 1.1.1.5 root 3982: #endif 1.1 root 3983: 3984: /* If TEM might contain a pseudo, we must copy it to avoid 3985: modifying it when we do the substitution for the reload. */ 3986: if (rtx_varies_p (tem)) 3987: tem = copy_rtx (tem); 3988: 3989: tem = gen_rtx (MEM, GET_MODE (ad), tem); 3990: RTX_UNCHANGING_P (tem) = RTX_UNCHANGING_P (regno_reg_rtx[regno]); 3991: memlocs[n_memlocs++] = tem; 3992: return tem; 3993: } 3994: 3995: /* Record all reloads needed for handling memory address AD 3996: which appears in *LOC in a memory reference to mode MODE 3997: which itself is found in location *MEMREFLOC. 3998: Note that we take shortcuts assuming that no multi-reg machine mode 3999: occurs as part of an address. 4000: 1.1.1.5 root 4001: OPNUM and TYPE specify the purpose of this reload. 1.1 root 4002: 4003: IND_LEVELS says how many levels of indirect addressing this machine 4004: supports. 4005: 4006: Value is nonzero if this address is reloaded or replaced as a whole. 4007: This is interesting to the caller if the address is an autoincrement. 4008: 4009: Note that there is no verification that the address will be valid after 4010: this routine does its work. Instead, we rely on the fact that the address 4011: was valid when reload started. So we need only undo things that reload 4012: could have broken. These are wrong register types, pseudos not allocated 4013: to a hard register, and frame pointer elimination. */ 4014: 4015: static int 1.1.1.5 root 4016: find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels) 1.1 root 4017: enum machine_mode mode; 4018: rtx *memrefloc; 4019: rtx ad; 4020: rtx *loc; 1.1.1.5 root 4021: int opnum; 4022: enum reload_type type; 1.1 root 4023: int ind_levels; 4024: { 4025: register int regno; 4026: rtx tem; 4027: 4028: /* If the address is a register, see if it is a legitimate address and 4029: reload if not. We first handle the cases where we need not reload 4030: or where we must reload in a non-standard way. */ 4031: 4032: if (GET_CODE (ad) == REG) 4033: { 4034: regno = REGNO (ad); 4035: 4036: if (reg_equiv_constant[regno] != 0 4037: && strict_memory_address_p (mode, reg_equiv_constant[regno])) 4038: { 4039: *loc = ad = reg_equiv_constant[regno]; 4040: return 1; 4041: } 4042: 4043: else if (reg_equiv_address[regno] != 0) 4044: { 4045: tem = make_memloc (ad, regno); 1.1.1.4 root 4046: find_reloads_address (GET_MODE (tem), NULL_PTR, XEXP (tem, 0), 1.1.1.5 root 4047: &XEXP (tem, 0), opnum, type, ind_levels); 1.1.1.4 root 4048: push_reload (tem, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS, 1.1 root 4049: GET_MODE (ad), VOIDmode, 0, 0, 1.1.1.5 root 4050: opnum, type); 1.1 root 4051: return 1; 4052: } 4053: 1.1.1.5 root 4054: /* We can avoid a reload if the register's equivalent memory expression 1.1.1.6 root 4055: is valid as an indirect memory address. 4056: But not all addresses are valid in a mem used as an indirect address: 4057: only reg or reg+constant. */ 1.1 root 4058: 1.1.1.5 root 4059: else if (reg_equiv_mem[regno] != 0 && ind_levels > 0 1.1.1.6 root 4060: && strict_memory_address_p (mode, reg_equiv_mem[regno]) 4061: && (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == REG 4062: || (GET_CODE (XEXP (reg_equiv_mem[regno], 0)) == PLUS 4063: && GET_CODE (XEXP (XEXP (reg_equiv_mem[regno], 0), 0)) == REG 4064: && CONSTANT_P (XEXP (XEXP (reg_equiv_mem[regno], 0), 0))))) 1.1.1.5 root 4065: return 0; 1.1 root 4066: 4067: /* The only remaining case where we can avoid a reload is if this is a 4068: hard register that is valid as a base register and which is not the 4069: subject of a CLOBBER in this insn. */ 4070: 4071: else if (regno < FIRST_PSEUDO_REGISTER && REGNO_OK_FOR_BASE_P (regno) 4072: && ! regno_clobbered_p (regno, this_insn)) 4073: return 0; 4074: 4075: /* If we do not have one of the cases above, we must do the reload. */ 1.1.1.4 root 4076: push_reload (ad, NULL_RTX, loc, NULL_PTR, BASE_REG_CLASS, 1.1.1.5 root 4077: GET_MODE (ad), VOIDmode, 0, 0, opnum, type); 1.1 root 4078: return 1; 4079: } 4080: 4081: if (strict_memory_address_p (mode, ad)) 4082: { 4083: /* The address appears valid, so reloads are not needed. 4084: But the address may contain an eliminable register. 4085: This can happen because a machine with indirect addressing 4086: may consider a pseudo register by itself a valid address even when 4087: it has failed to get a hard reg. 4088: So do a tree-walk to find and eliminate all such regs. */ 4089: 4090: /* But first quickly dispose of a common case. */ 4091: if (GET_CODE (ad) == PLUS 4092: && GET_CODE (XEXP (ad, 1)) == CONST_INT 4093: && GET_CODE (XEXP (ad, 0)) == REG 4094: && reg_equiv_constant[REGNO (XEXP (ad, 0))] == 0) 4095: return 0; 4096: 4097: subst_reg_equivs_changed = 0; 4098: *loc = subst_reg_equivs (ad); 4099: 4100: if (! subst_reg_equivs_changed) 4101: return 0; 4102: 4103: /* Check result for validity after substitution. */ 4104: if (strict_memory_address_p (mode, ad)) 4105: return 0; 4106: } 4107: 4108: /* The address is not valid. We have to figure out why. One possibility 4109: is that it is itself a MEM. This can happen when the frame pointer is 4110: being eliminated, a pseudo is not allocated to a hard register, and the 4111: offset between the frame and stack pointers is not its initial value. 1.1.1.2 root 4112: In that case the pseudo will have been replaced by a MEM referring to 1.1 root 4113: the stack pointer. */ 4114: if (GET_CODE (ad) == MEM) 4115: { 4116: /* First ensure that the address in this MEM is valid. Then, unless 4117: indirect addresses are valid, reload the MEM into a register. */ 4118: tem = ad; 4119: find_reloads_address (GET_MODE (ad), &tem, XEXP (ad, 0), &XEXP (ad, 0), 1.1.1.5 root 4120: opnum, type, ind_levels == 0 ? 0 : ind_levels - 1); 1.1.1.4 root 4121: 4122: /* If tem was changed, then we must create a new memory reference to 4123: hold it and store it back into memrefloc. */ 4124: if (tem != ad && memrefloc) 4125: { 4126: *memrefloc = copy_rtx (*memrefloc); 4127: copy_replacements (tem, XEXP (*memrefloc, 0)); 4128: loc = &XEXP (*memrefloc, 0); 4129: } 4130: 1.1 root 4131: /* Check similar cases as for indirect addresses as above except 4132: that we can allow pseudos and a MEM since they should have been 4133: taken care of above. */ 4134: 4135: if (ind_levels == 0 4136: || (GET_CODE (XEXP (tem, 0)) == SYMBOL_REF && ! indirect_symref_ok) 4137: || GET_CODE (XEXP (tem, 0)) == MEM 4138: || ! (GET_CODE (XEXP (tem, 0)) == REG 4139: || (GET_CODE (XEXP (tem, 0)) == PLUS 4140: && GET_CODE (XEXP (XEXP (tem, 0), 0)) == REG 4141: && GET_CODE (XEXP (XEXP (tem, 0), 1)) == CONST_INT))) 4142: { 4143: /* Must use TEM here, not AD, since it is the one that will 4144: have any subexpressions reloaded, if needed. */ 1.1.1.4 root 4145: push_reload (tem, NULL_RTX, loc, NULL_PTR, 1.1 root 4146: BASE_REG_CLASS, GET_MODE (tem), VOIDmode, 0, 1.1.1.5 root 4147: 0, opnum, type); 1.1 root 4148: return 1; 4149: } 4150: else 4151: return 0; 4152: } 4153: 4154: /* If we have address of a stack slot but it's not valid 4155: (displacement is too large), compute the sum in a register. */ 4156: else if (GET_CODE (ad) == PLUS 4157: && (XEXP (ad, 0) == frame_pointer_rtx 1.1.1.6 root 4158: #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4159: || XEXP (ad, 0) == hard_frame_pointer_rtx 4160: #endif 1.1 root 4161: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4162: || XEXP (ad, 0) == arg_pointer_rtx 4163: #endif 4164: || XEXP (ad, 0) == stack_pointer_rtx) 4165: && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4166: { 4167: /* Unshare the MEM rtx so we can safely alter it. */ 4168: if (memrefloc) 4169: { 4170: *memrefloc = copy_rtx (*memrefloc); 4171: loc = &XEXP (*memrefloc, 0); 4172: } 4173: if (double_reg_address_ok) 4174: { 4175: /* Unshare the sum as well. */ 4176: *loc = ad = copy_rtx (ad); 4177: /* Reload the displacement into an index reg. 4178: We assume the frame pointer or arg pointer is a base reg. */ 4179: find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), 1.1.1.5 root 4180: INDEX_REG_CLASS, GET_MODE (ad), opnum, 4181: type, ind_levels); 1.1 root 4182: } 4183: else 4184: { 4185: /* If the sum of two regs is not necessarily valid, 4186: reload the sum into a base reg. 4187: That will at least work. */ 4188: find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, 1.1.1.5 root 4189: opnum, type, ind_levels); 1.1 root 4190: } 4191: return 1; 4192: } 4193: 4194: /* If we have an indexed stack slot, there are three possible reasons why 4195: it might be invalid: The index might need to be reloaded, the address 4196: might have been made by frame pointer elimination and hence have a 4197: constant out of range, or both reasons might apply. 4198: 4199: We can easily check for an index needing reload, but even if that is the 4200: case, we might also have an invalid constant. To avoid making the 4201: conservative assumption and requiring two reloads, we see if this address 4202: is valid when not interpreted strictly. If it is, the only problem is 4203: that the index needs a reload and find_reloads_address_1 will take care 4204: of it. 4205: 4206: There is still a case when we might generate an extra reload, 4207: however. In certain cases eliminate_regs will return a MEM for a REG 4208: (see the code there for details). In those cases, memory_address_p 4209: applied to our address will return 0 so we will think that our offset 4210: must be too large. But it might indeed be valid and the only problem 4211: is that a MEM is present where a REG should be. This case should be 4212: very rare and there doesn't seem to be any way to avoid it. 4213: 4214: If we decide to do something here, it must be that 4215: `double_reg_address_ok' is true and that this address rtl was made by 4216: eliminate_regs. We generate a reload of the fp/sp/ap + constant and 4217: rework the sum so that the reload register will be added to the index. 4218: This is safe because we know the address isn't shared. 4219: 4220: We check for fp/ap/sp as both the first and second operand of the 4221: innermost PLUS. */ 4222: 4223: else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4224: && GET_CODE (XEXP (ad, 0)) == PLUS 4225: && (XEXP (XEXP (ad, 0), 0) == frame_pointer_rtx 1.1.1.6 root 4226: #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM 4227: || XEXP (XEXP (ad, 0), 0) == hard_frame_pointer_rtx 4228: #endif 1.1 root 4229: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4230: || XEXP (XEXP (ad, 0), 0) == arg_pointer_rtx 4231: #endif 4232: || XEXP (XEXP (ad, 0), 0) == stack_pointer_rtx) 4233: && ! memory_address_p (mode, ad)) 4234: { 4235: *loc = ad = gen_rtx (PLUS, GET_MODE (ad), 4236: plus_constant (XEXP (XEXP (ad, 0), 0), 4237: INTVAL (XEXP (ad, 1))), 4238: XEXP (XEXP (ad, 0), 1)); 4239: find_reloads_address_part (XEXP (ad, 0), &XEXP (ad, 0), BASE_REG_CLASS, 1.1.1.5 root 4240: GET_MODE (ad), opnum, type, ind_levels); 4241: find_reloads_address_1 (XEXP (ad, 1), 1, &XEXP (ad, 1), opnum, type, 0); 1.1 root 4242: 4243: return 1; 4244: } 4245: 4246: else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT 4247: && GET_CODE (XEXP (ad, 0)) == PLUS 4248: && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx 1.1.1.6 root 4249: #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM 4250: || XEXP (XEXP (ad, 0), 1) == hard_frame_pointer_rtx 4251: #endif 1.1 root 4252: #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM 4253: || XEXP (XEXP (ad, 0), 1) == arg_pointer_rtx 4254: #endif 4255: || XEXP (XEXP (ad, 0), 1) == stack_pointer_rtx) 4256: && ! memory_address_p (mode, ad)) 4257: { 4258: *loc = ad = gen_rtx (PLUS, GET_MODE (ad), 1.1.1.7 ! root 4259: XEXP (XEXP (ad, 0), 0), 1.1 root 4260: plus_constant (XEXP (XEXP (ad, 0), 1), 1.1.1.7 ! root 4261: INTVAL (XEXP (ad, 1)))); ! 4262: find_reloads_address_part (XEXP (ad, 1), &XEXP (ad, 1), BASE_REG_CLASS, 1.1.1.5 root 4263: GET_MODE (ad), opnum, type, ind_levels); 1.1.1.7 ! root 4264: find_reloads_address_1 (XEXP (ad, 0), 1, &XEXP (ad, 0), opnum, type, 0); 1.1 root 4265: 4266: return 1; 4267: } 4268: 4269: /* See if address becomes valid when an eliminable register 4270: in a sum is replaced. */ 4271: 4272: tem = ad; 4273: if (GET_CODE (ad) == PLUS) 4274: tem = subst_indexed_address (ad); 4275: if (tem != ad && strict_memory_address_p (mode, tem)) 4276: { 4277: /* Ok, we win that way. Replace any additional eliminable 4278: registers. */ 4279: 4280: subst_reg_equivs_changed = 0; 4281: tem = subst_reg_equivs (tem); 4282: 4283: /* Make sure that didn't make the address invalid again. */ 4284: 4285: if (! subst_reg_equivs_changed || strict_memory_address_p (mode, tem)) 4286: { 4287: *loc = tem; 4288: return 0; 4289: } 4290: } 4291: 4292: /* If constants aren't valid addresses, reload the constant address 4293: into a register. */ 1.1.1.4 root 4294: if (CONSTANT_P (ad) && ! strict_memory_address_p (mode, ad)) 1.1 root 4295: { 4296: /* If AD is in address in the constant pool, the MEM rtx may be shared. 4297: Unshare it so we can safely alter it. */ 4298: if (memrefloc && GET_CODE (ad) == SYMBOL_REF 4299: && CONSTANT_POOL_ADDRESS_P (ad)) 4300: { 4301: *memrefloc = copy_rtx (*memrefloc); 4302: loc = &XEXP (*memrefloc, 0); 4303: } 4304: 1.1.1.5 root 4305: find_reloads_address_part (ad, loc, BASE_REG_CLASS, Pmode, opnum, type, 1.1 root 4306: ind_levels); 4307: return 1; 4308: } 4309: 1.1.1.5 root 4310: return find_reloads_address_1 (ad, 0, loc, opnum, type, ind_levels); 1.1 root 4311: } 4312: 4313: /* Find all pseudo regs appearing in AD 4314: that are eliminable in favor of equivalent values 4315: and do not have hard regs; replace them by their equivalents. */ 4316: 4317: static rtx 4318: subst_reg_equivs (ad) 4319: rtx ad; 4320: { 4321: register RTX_CODE code = GET_CODE (ad); 4322: register int i; 4323: register char *fmt; 4324: 4325: switch (code) 4326: { 4327: case HIGH: 4328: case CONST_INT: 4329: case CONST: 4330: case CONST_DOUBLE: 4331: case SYMBOL_REF: 4332: case LABEL_REF: 4333: case PC: 4334: case CC0: 4335: return ad; 4336: 4337: case REG: 4338: { 4339: register int regno = REGNO (ad); 4340: 4341: if (reg_equiv_constant[regno] != 0) 4342: { 4343: subst_reg_equivs_changed = 1; 4344: return reg_equiv_constant[regno]; 4345: } 4346: } 4347: return ad; 4348: 4349: case PLUS: 4350: /* Quickly dispose of a common case. */ 4351: if (XEXP (ad, 0) == frame_pointer_rtx 4352: && GET_CODE (XEXP (ad, 1)) == CONST_INT) 4353: return ad; 4354: } 4355: 4356: fmt = GET_RTX_FORMAT (code); 4357: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4358: if (fmt[i] == 'e') 4359: XEXP (ad, i) = subst_reg_equivs (XEXP (ad, i)); 4360: return ad; 4361: } 4362: 4363: /* Compute the sum of X and Y, making canonicalizations assumed in an 4364: address, namely: sum constant integers, surround the sum of two 4365: constants with a CONST, put the constant as the second operand, and 4366: group the constant on the outermost sum. 4367: 4368: This routine assumes both inputs are already in canonical form. */ 4369: 4370: rtx 4371: form_sum (x, y) 4372: rtx x, y; 4373: { 4374: rtx tem; 1.1.1.5 root 4375: enum machine_mode mode = GET_MODE (x); 4376: 4377: if (mode == VOIDmode) 4378: mode = GET_MODE (y); 4379: 4380: if (mode == VOIDmode) 4381: mode = Pmode; 1.1 root 4382: 4383: if (GET_CODE (x) == CONST_INT) 4384: return plus_constant (y, INTVAL (x)); 4385: else if (GET_CODE (y) == CONST_INT) 4386: return plus_constant (x, INTVAL (y)); 4387: else if (CONSTANT_P (x)) 4388: tem = x, x = y, y = tem; 4389: 4390: if (GET_CODE (x) == PLUS && CONSTANT_P (XEXP (x, 1))) 4391: return form_sum (XEXP (x, 0), form_sum (XEXP (x, 1), y)); 4392: 4393: /* Note that if the operands of Y are specified in the opposite 4394: order in the recursive calls below, infinite recursion will occur. */ 4395: if (GET_CODE (y) == PLUS && CONSTANT_P (XEXP (y, 1))) 4396: return form_sum (form_sum (x, XEXP (y, 0)), XEXP (y, 1)); 4397: 4398: /* If both constant, encapsulate sum. Otherwise, just form sum. A 4399: constant will have been placed second. */ 4400: if (CONSTANT_P (x) && CONSTANT_P (y)) 4401: { 4402: if (GET_CODE (x) == CONST) 4403: x = XEXP (x, 0); 4404: if (GET_CODE (y) == CONST) 4405: y = XEXP (y, 0); 4406: 1.1.1.5 root 4407: return gen_rtx (CONST, VOIDmode, gen_rtx (PLUS, mode, x, y)); 1.1 root 4408: } 4409: 1.1.1.5 root 4410: return gen_rtx (PLUS, mode, x, y); 1.1 root 4411: } 4412: 4413: /* If ADDR is a sum containing a pseudo register that should be 4414: replaced with a constant (from reg_equiv_constant), 4415: return the result of doing so, and also apply the associative 4416: law so that the result is more likely to be a valid address. 4417: (But it is not guaranteed to be one.) 4418: 4419: Note that at most one register is replaced, even if more are 4420: replaceable. Also, we try to put the result into a canonical form 4421: so it is more likely to be a valid address. 4422: 4423: In all other cases, return ADDR. */ 4424: 4425: static rtx 4426: subst_indexed_address (addr) 4427: rtx addr; 4428: { 4429: rtx op0 = 0, op1 = 0, op2 = 0; 4430: rtx tem; 4431: int regno; 4432: 4433: if (GET_CODE (addr) == PLUS) 4434: { 4435: /* Try to find a register to replace. */ 4436: op0 = XEXP (addr, 0), op1 = XEXP (addr, 1), op2 = 0; 4437: if (GET_CODE (op0) == REG 4438: && (regno = REGNO (op0)) >= FIRST_PSEUDO_REGISTER 4439: && reg_renumber[regno] < 0 4440: && reg_equiv_constant[regno] != 0) 4441: op0 = reg_equiv_constant[regno]; 4442: else if (GET_CODE (op1) == REG 4443: && (regno = REGNO (op1)) >= FIRST_PSEUDO_REGISTER 4444: && reg_renumber[regno] < 0 4445: && reg_equiv_constant[regno] != 0) 4446: op1 = reg_equiv_constant[regno]; 4447: else if (GET_CODE (op0) == PLUS 4448: && (tem = subst_indexed_address (op0)) != op0) 4449: op0 = tem; 4450: else if (GET_CODE (op1) == PLUS 4451: && (tem = subst_indexed_address (op1)) != op1) 4452: op1 = tem; 4453: else 4454: return addr; 4455: 4456: /* Pick out up to three things to add. */ 4457: if (GET_CODE (op1) == PLUS) 4458: op2 = XEXP (op1, 1), op1 = XEXP (op1, 0); 4459: else if (GET_CODE (op0) == PLUS) 4460: op2 = op1, op1 = XEXP (op0, 1), op0 = XEXP (op0, 0); 4461: 4462: /* Compute the sum. */ 4463: if (op2 != 0) 4464: op1 = form_sum (op1, op2); 4465: if (op1 != 0) 4466: op0 = form_sum (op0, op1); 4467: 4468: return op0; 4469: } 4470: return addr; 4471: } 4472: 4473: /* Record the pseudo registers we must reload into hard registers 4474: in a subexpression of a would-be memory address, X. 4475: (This function is not called if the address we find is strictly valid.) 4476: CONTEXT = 1 means we are considering regs as index regs, 4477: = 0 means we are considering them as base regs. 4478: 1.1.1.5 root 4479: OPNUM and TYPE specify the purpose of any reloads made. 1.1 root 4480: 4481: IND_LEVELS says how many levels of indirect addressing are 4482: supported at this point in the address. 4483: 4484: We return nonzero if X, as a whole, is reloaded or replaced. */ 4485: 4486: /* Note that we take shortcuts assuming that no multi-reg machine mode 4487: occurs as part of an address. 4488: Also, this is not fully machine-customizable; it works for machines 4489: such as vaxes and 68000's and 32000's, but other possible machines 4490: could have addressing modes that this does not handle right. */ 4491: 4492: static int 1.1.1.5 root 4493: find_reloads_address_1 (x, context, loc, opnum, type, ind_levels) 1.1 root 4494: rtx x; 4495: int context; 4496: rtx *loc; 1.1.1.5 root 4497: int opnum; 4498: enum reload_type type; 1.1 root 4499: int ind_levels; 4500: { 4501: register RTX_CODE code = GET_CODE (x); 4502: 1.1.1.7 ! root 4503: switch (code) 1.1 root 4504: { 1.1.1.7 ! root 4505: case PLUS: ! 4506: { ! 4507: register rtx orig_op0 = XEXP (x, 0); ! 4508: register rtx orig_op1 = XEXP (x, 1); ! 4509: register RTX_CODE code0 = GET_CODE (orig_op0); ! 4510: register RTX_CODE code1 = GET_CODE (orig_op1); ! 4511: register rtx op0 = orig_op0; ! 4512: register rtx op1 = orig_op1; 1.1.1.6 root 4513: 1.1.1.7 ! root 4514: if (GET_CODE (op0) == SUBREG) ! 4515: { ! 4516: op0 = SUBREG_REG (op0); ! 4517: code0 = GET_CODE (op0); ! 4518: } 1.1.1.6 root 4519: 1.1.1.7 ! root 4520: if (GET_CODE (op1) == SUBREG) ! 4521: { ! 4522: op1 = SUBREG_REG (op1); ! 4523: code1 = GET_CODE (op1); ! 4524: } ! 4525: ! 4526: if (code0 == MULT || code0 == SIGN_EXTEND || code1 == MEM) ! 4527: { ! 4528: find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type, 1.1.1.5 root 4529: ind_levels); 1.1.1.7 ! root 4530: find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, 1.1.1.5 root 4531: ind_levels); 1.1.1.7 ! root 4532: } ! 4533: ! 4534: else if (code1 == MULT || code1 == SIGN_EXTEND || code0 == MEM) ! 4535: { 1.1.1.6 root 4536: find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type, 1.1.1.5 root 4537: ind_levels); 1.1.1.7 ! root 4538: find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type, 1.1.1.5 root 4539: ind_levels); 1.1.1.7 ! root 4540: } ! 4541: ! 4542: else if (code0 == CONST_INT || code0 == CONST ! 4543: || code0 == SYMBOL_REF || code0 == LABEL_REF) 1.1.1.6 root 4544: find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, 1.1.1.5 root 4545: ind_levels); 1.1.1.7 ! root 4546: ! 4547: else if (code1 == CONST_INT || code1 == CONST ! 4548: || code1 == SYMBOL_REF || code1 == LABEL_REF) 1.1.1.6 root 4549: find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type, 1.1.1.5 root 4550: ind_levels); 1.1.1.7 ! root 4551: ! 4552: else if (code0 == REG && code1 == REG) ! 4553: { ! 4554: if (REG_OK_FOR_INDEX_P (op0) ! 4555: && REG_OK_FOR_BASE_P (op1)) ! 4556: return 0; ! 4557: else if (REG_OK_FOR_INDEX_P (op1) ! 4558: && REG_OK_FOR_BASE_P (op0)) ! 4559: return 0; ! 4560: else if (REG_OK_FOR_BASE_P (op1)) ! 4561: find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type, ! 4562: ind_levels); ! 4563: else if (REG_OK_FOR_BASE_P (op0)) ! 4564: find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type, ! 4565: ind_levels); ! 4566: else if (REG_OK_FOR_INDEX_P (op1)) ! 4567: find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type, ! 4568: ind_levels); ! 4569: else if (REG_OK_FOR_INDEX_P (op0)) ! 4570: find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, ! 4571: ind_levels); ! 4572: else ! 4573: { ! 4574: find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type, ! 4575: ind_levels); ! 4576: find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, ! 4577: ind_levels); ! 4578: } ! 4579: } ! 4580: ! 4581: else if (code0 == REG) ! 4582: { ! 4583: find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type, ! 4584: ind_levels); ! 4585: find_reloads_address_1 (orig_op1, 0, &XEXP (x, 1), opnum, type, ! 4586: ind_levels); ! 4587: } ! 4588: ! 4589: else if (code1 == REG) ! 4590: { ! 4591: find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type, ! 4592: ind_levels); ! 4593: find_reloads_address_1 (orig_op0, 0, &XEXP (x, 0), opnum, type, ! 4594: ind_levels); ! 4595: } ! 4596: } ! 4597: ! 4598: return 0; ! 4599: ! 4600: case POST_INC: ! 4601: case POST_DEC: ! 4602: case PRE_INC: ! 4603: case PRE_DEC: 1.1 root 4604: if (GET_CODE (XEXP (x, 0)) == REG) 4605: { 4606: register int regno = REGNO (XEXP (x, 0)); 4607: int value = 0; 4608: rtx x_orig = x; 4609: 4610: /* A register that is incremented cannot be constant! */ 4611: if (regno >= FIRST_PSEUDO_REGISTER 4612: && reg_equiv_constant[regno] != 0) 4613: abort (); 4614: 4615: /* Handle a register that is equivalent to a memory location 4616: which cannot be addressed directly. */ 4617: if (reg_equiv_address[regno] != 0) 4618: { 4619: rtx tem = make_memloc (XEXP (x, 0), regno); 4620: /* First reload the memory location's address. */ 4621: find_reloads_address (GET_MODE (tem), 0, XEXP (tem, 0), 1.1.1.5 root 4622: &XEXP (tem, 0), opnum, type, ind_levels); 1.1 root 4623: /* Put this inside a new increment-expression. */ 4624: x = gen_rtx (GET_CODE (x), GET_MODE (x), tem); 4625: /* Proceed to reload that, as if it contained a register. */ 4626: } 4627: 4628: /* If we have a hard register that is ok as an index, 4629: don't make a reload. If an autoincrement of a nice register 4630: isn't "valid", it must be that no autoincrement is "valid". 4631: If that is true and something made an autoincrement anyway, 4632: this must be a special context where one is allowed. 4633: (For example, a "push" instruction.) 4634: We can't improve this address, so leave it alone. */ 4635: 4636: /* Otherwise, reload the autoincrement into a suitable hard reg 4637: and record how much to increment by. */ 4638: 4639: if (reg_renumber[regno] >= 0) 4640: regno = reg_renumber[regno]; 4641: if ((regno >= FIRST_PSEUDO_REGISTER 4642: || !(context ? REGNO_OK_FOR_INDEX_P (regno) 4643: : REGNO_OK_FOR_BASE_P (regno)))) 4644: { 4645: register rtx link; 4646: 4647: int reloadnum 1.1.1.4 root 4648: = push_reload (x, NULL_RTX, loc, NULL_PTR, 1.1 root 4649: context ? INDEX_REG_CLASS : BASE_REG_CLASS, 1.1.1.5 root 4650: GET_MODE (x), GET_MODE (x), VOIDmode, 0, 4651: opnum, type); 1.1 root 4652: reload_inc[reloadnum] 4653: = find_inc_amount (PATTERN (this_insn), XEXP (x_orig, 0)); 4654: 4655: value = 1; 4656: 4657: #ifdef AUTO_INC_DEC 4658: /* Update the REG_INC notes. */ 4659: 4660: for (link = REG_NOTES (this_insn); 4661: link; link = XEXP (link, 1)) 4662: if (REG_NOTE_KIND (link) == REG_INC 4663: && REGNO (XEXP (link, 0)) == REGNO (XEXP (x_orig, 0))) 4664: push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 4665: #endif 4666: } 4667: return value; 4668: } 1.1.1.7 ! root 4669: 1.1 root 4670: else if (GET_CODE (XEXP (x, 0)) == MEM) 4671: { 4672: /* This is probably the result of a substitution, by eliminate_regs, 4673: of an equivalent address for a pseudo that was not allocated to a 4674: hard register. Verify that the specified address is valid and 4675: reload it into a register. */ 4676: rtx tem = XEXP (x, 0); 4677: register rtx link; 4678: int reloadnum; 4679: 4680: /* Since we know we are going to reload this item, don't decrement 4681: for the indirection level. 4682: 4683: Note that this is actually conservative: it would be slightly 4684: more efficient to use the value of SPILL_INDIRECT_LEVELS from 4685: reload1.c here. */ 4686: find_reloads_address (GET_MODE (x), &XEXP (x, 0), 4687: XEXP (XEXP (x, 0), 0), &XEXP (XEXP (x, 0), 0), 1.1.1.5 root 4688: opnum, type, ind_levels); 1.1 root 4689: 1.1.1.4 root 4690: reloadnum = push_reload (x, NULL_RTX, loc, NULL_PTR, 1.1 root 4691: context ? INDEX_REG_CLASS : BASE_REG_CLASS, 1.1.1.5 root 4692: GET_MODE (x), VOIDmode, 0, 0, opnum, type); 1.1 root 4693: reload_inc[reloadnum] 4694: = find_inc_amount (PATTERN (this_insn), XEXP (x, 0)); 4695: 4696: link = FIND_REG_INC_NOTE (this_insn, tem); 4697: if (link != 0) 4698: push_replacement (&XEXP (link, 0), reloadnum, VOIDmode); 4699: 4700: return 1; 4701: } 1.1.1.7 ! root 4702: return 0; 1.1 root 4703: 1.1.1.7 ! root 4704: case MEM: ! 4705: /* This is probably the result of a substitution, by eliminate_regs, of ! 4706: an equivalent address for a pseudo that was not allocated to a hard ! 4707: register. Verify that the specified address is valid and reload it ! 4708: into a register. ! 4709: ! 4710: Since we know we are going to reload this item, don't decrement for ! 4711: the indirection level. 1.1 root 4712: 4713: Note that this is actually conservative: it would be slightly more 4714: efficient to use the value of SPILL_INDIRECT_LEVELS from 4715: reload1.c here. */ 4716: 4717: find_reloads_address (GET_MODE (x), loc, XEXP (x, 0), &XEXP (x, 0), 1.1.1.5 root 4718: opnum, type, ind_levels); 1.1.1.4 root 4719: push_reload (*loc, NULL_RTX, loc, NULL_PTR, 1.1 root 4720: context ? INDEX_REG_CLASS : BASE_REG_CLASS, 1.1.1.5 root 4721: GET_MODE (x), VOIDmode, 0, 0, opnum, type); 1.1 root 4722: return 1; 4723: 1.1.1.7 ! root 4724: case REG: ! 4725: { ! 4726: register int regno = REGNO (x); ! 4727: ! 4728: if (reg_equiv_constant[regno] != 0) ! 4729: { ! 4730: find_reloads_address_part (reg_equiv_constant[regno], loc, ! 4731: (context ? INDEX_REG_CLASS ! 4732: : BASE_REG_CLASS), ! 4733: GET_MODE (x), opnum, type, ind_levels); ! 4734: return 1; ! 4735: } 1.1 root 4736: 4737: #if 0 /* This might screw code in reload1.c to delete prior output-reload 4738: that feeds this insn. */ 1.1.1.7 ! root 4739: if (reg_equiv_mem[regno] != 0) ! 4740: { ! 4741: push_reload (reg_equiv_mem[regno], NULL_RTX, loc, NULL_PTR, ! 4742: context ? INDEX_REG_CLASS : BASE_REG_CLASS, ! 4743: GET_MODE (x), VOIDmode, 0, 0, opnum, type); ! 4744: return 1; ! 4745: } 1.1 root 4746: #endif 4747: 1.1.1.7 ! root 4748: if (reg_equiv_address[regno] != 0) ! 4749: { ! 4750: x = make_memloc (x, regno); ! 4751: find_reloads_address (GET_MODE (x), 0, XEXP (x, 0), &XEXP (x, 0), ! 4752: opnum, type, ind_levels); ! 4753: } 1.1 root 4754: 1.1.1.7 ! root 4755: if (reg_renumber[regno] >= 0) ! 4756: regno = reg_renumber[regno]; ! 4757: ! 4758: if ((regno >= FIRST_PSEUDO_REGISTER ! 4759: || !(context ? REGNO_OK_FOR_INDEX_P (regno) ! 4760: : REGNO_OK_FOR_BASE_P (regno)))) ! 4761: { ! 4762: push_reload (x, NULL_RTX, loc, NULL_PTR, ! 4763: context ? INDEX_REG_CLASS : BASE_REG_CLASS, ! 4764: GET_MODE (x), VOIDmode, 0, 0, opnum, type); ! 4765: return 1; ! 4766: } ! 4767: ! 4768: /* If a register appearing in an address is the subject of a CLOBBER ! 4769: in this insn, reload it into some other register to be safe. ! 4770: The CLOBBER is supposed to make the register unavailable ! 4771: from before this insn to after it. */ ! 4772: if (regno_clobbered_p (regno, this_insn)) ! 4773: { ! 4774: push_reload (x, NULL_RTX, loc, NULL_PTR, ! 4775: context ? INDEX_REG_CLASS : BASE_REG_CLASS, ! 4776: GET_MODE (x), VOIDmode, 0, 0, opnum, type); ! 4777: return 1; ! 4778: } ! 4779: } ! 4780: return 0; ! 4781: ! 4782: case SUBREG: ! 4783: /* If this is a SUBREG of a hard register and the resulting register is ! 4784: of the wrong class, reload the whole SUBREG. This avoids needless ! 4785: copies if SUBREG_REG is multi-word. */ ! 4786: if (GET_CODE (SUBREG_REG (x)) == REG ! 4787: && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) ! 4788: { ! 4789: int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); ! 4790: ! 4791: if (! (context ? REGNO_OK_FOR_INDEX_P (regno) ! 4792: : REGNO_OK_FOR_BASE_P (regno))) ! 4793: { ! 4794: push_reload (x, NULL_RTX, loc, NULL_PTR, ! 4795: context ? INDEX_REG_CLASS : BASE_REG_CLASS, ! 4796: GET_MODE (x), VOIDmode, 0, 0, opnum, type); ! 4797: return 1; ! 4798: } 1.1 root 4799: } 1.1.1.7 ! root 4800: break; 1.1 root 4801: } 4802: 1.1.1.7 ! root 4803: { ! 4804: register char *fmt = GET_RTX_FORMAT (code); ! 4805: register int i; ! 4806: ! 4807: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) ! 4808: { ! 4809: if (fmt[i] == 'e') ! 4810: find_reloads_address_1 (XEXP (x, i), context, &XEXP (x, i), ! 4811: opnum, type, ind_levels); ! 4812: } ! 4813: } ! 4814: 1.1 root 4815: return 0; 4816: } 4817: 4818: /* X, which is found at *LOC, is a part of an address that needs to be 4819: reloaded into a register of class CLASS. If X is a constant, or if 4820: X is a PLUS that contains a constant, check that the constant is a 4821: legitimate operand and that we are supposed to be able to load 4822: it into the register. 4823: 4824: If not, force the constant into memory and reload the MEM instead. 4825: 4826: MODE is the mode to use, in case X is an integer constant. 4827: 1.1.1.5 root 4828: OPNUM and TYPE describe the purpose of any reloads made. 1.1 root 4829: 4830: IND_LEVELS says how many levels of indirect addressing this machine 4831: supports. */ 4832: 4833: static void 1.1.1.5 root 4834: find_reloads_address_part (x, loc, class, mode, opnum, type, ind_levels) 1.1 root 4835: rtx x; 4836: rtx *loc; 4837: enum reg_class class; 4838: enum machine_mode mode; 1.1.1.5 root 4839: int opnum; 4840: enum reload_type type; 1.1 root 4841: int ind_levels; 4842: { 4843: if (CONSTANT_P (x) 4844: && (! LEGITIMATE_CONSTANT_P (x) 4845: || PREFERRED_RELOAD_CLASS (x, class) == NO_REGS)) 4846: { 4847: rtx tem = x = force_const_mem (mode, x); 4848: find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 1.1.1.5 root 4849: opnum, type, ind_levels); 1.1 root 4850: } 4851: 4852: else if (GET_CODE (x) == PLUS 4853: && CONSTANT_P (XEXP (x, 1)) 4854: && (! LEGITIMATE_CONSTANT_P (XEXP (x, 1)) 4855: || PREFERRED_RELOAD_CLASS (XEXP (x, 1), class) == NO_REGS)) 4856: { 4857: rtx tem = force_const_mem (GET_MODE (x), XEXP (x, 1)); 4858: 4859: x = gen_rtx (PLUS, GET_MODE (x), XEXP (x, 0), tem); 4860: find_reloads_address (mode, &tem, XEXP (tem, 0), &XEXP (tem, 0), 1.1.1.5 root 4861: opnum, type, ind_levels); 1.1 root 4862: } 4863: 1.1.1.4 root 4864: push_reload (x, NULL_RTX, loc, NULL_PTR, class, 1.1.1.5 root 4865: mode, VOIDmode, 0, 0, opnum, type); 1.1 root 4866: } 4867: 1.1.1.5 root 4868: /* Substitute into the current INSN the registers into which we have reloaded 1.1 root 4869: the things that need reloading. The array `replacements' 4870: says contains the locations of all pointers that must be changed 4871: and says what to replace them with. 4872: 4873: Return the rtx that X translates into; usually X, but modified. */ 4874: 4875: void 4876: subst_reloads () 4877: { 4878: register int i; 4879: 4880: for (i = 0; i < n_replacements; i++) 4881: { 4882: register struct replacement *r = &replacements[i]; 4883: register rtx reloadreg = reload_reg_rtx[r->what]; 4884: if (reloadreg) 4885: { 4886: /* Encapsulate RELOADREG so its machine mode matches what 1.1.1.6 root 4887: used to be there. Note that gen_lowpart_common will 4888: do the wrong thing if RELOADREG is multi-word. RELOADREG 4889: will always be a REG here. */ 1.1 root 4890: if (GET_MODE (reloadreg) != r->mode && r->mode != VOIDmode) 1.1.1.6 root 4891: reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg)); 1.1 root 4892: 4893: /* If we are putting this into a SUBREG and RELOADREG is a 4894: SUBREG, we would be making nested SUBREGs, so we have to fix 4895: this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */ 4896: 4897: if (r->subreg_loc != 0 && GET_CODE (reloadreg) == SUBREG) 4898: { 4899: if (GET_MODE (*r->subreg_loc) 4900: == GET_MODE (SUBREG_REG (reloadreg))) 4901: *r->subreg_loc = SUBREG_REG (reloadreg); 4902: else 4903: { 4904: *r->where = SUBREG_REG (reloadreg); 4905: SUBREG_WORD (*r->subreg_loc) += SUBREG_WORD (reloadreg); 4906: } 4907: } 4908: else 4909: *r->where = reloadreg; 4910: } 4911: /* If reload got no reg and isn't optional, something's wrong. */ 4912: else if (! reload_optional[r->what]) 4913: abort (); 4914: } 4915: } 4916: 4917: /* Make a copy of any replacements being done into X and move those copies 4918: to locations in Y, a copy of X. We only look at the highest level of 4919: the RTL. */ 4920: 4921: void 4922: copy_replacements (x, y) 4923: rtx x; 4924: rtx y; 4925: { 4926: int i, j; 4927: enum rtx_code code = GET_CODE (x); 4928: char *fmt = GET_RTX_FORMAT (code); 4929: struct replacement *r; 4930: 4931: /* We can't support X being a SUBREG because we might then need to know its 4932: location if something inside it was replaced. */ 4933: if (code == SUBREG) 4934: abort (); 4935: 4936: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 4937: if (fmt[i] == 'e') 4938: for (j = 0; j < n_replacements; j++) 4939: { 4940: if (replacements[j].subreg_loc == &XEXP (x, i)) 4941: { 4942: r = &replacements[n_replacements++]; 4943: r->where = replacements[j].where; 4944: r->subreg_loc = &XEXP (y, i); 4945: r->what = replacements[j].what; 4946: r->mode = replacements[j].mode; 4947: } 4948: else if (replacements[j].where == &XEXP (x, i)) 4949: { 4950: r = &replacements[n_replacements++]; 4951: r->where = &XEXP (y, i); 4952: r->subreg_loc = 0; 4953: r->what = replacements[j].what; 4954: r->mode = replacements[j].mode; 4955: } 4956: } 4957: } 4958: 1.1.1.3 root 4959: /* If LOC was scheduled to be replaced by something, return the replacement. 4960: Otherwise, return *LOC. */ 4961: 4962: rtx 4963: find_replacement (loc) 4964: rtx *loc; 4965: { 4966: struct replacement *r; 4967: 4968: for (r = &replacements[0]; r < &replacements[n_replacements]; r++) 4969: { 4970: rtx reloadreg = reload_reg_rtx[r->what]; 4971: 4972: if (reloadreg && r->where == loc) 4973: { 4974: if (r->mode != VOIDmode && GET_MODE (reloadreg) != r->mode) 4975: reloadreg = gen_rtx (REG, r->mode, REGNO (reloadreg)); 4976: 4977: return reloadreg; 4978: } 4979: else if (reloadreg && r->subreg_loc == loc) 4980: { 4981: /* RELOADREG must be either a REG or a SUBREG. 4982: 4983: ??? Is it actually still ever a SUBREG? If so, why? */ 4984: 4985: if (GET_CODE (reloadreg) == REG) 4986: return gen_rtx (REG, GET_MODE (*loc), 4987: REGNO (reloadreg) + SUBREG_WORD (*loc)); 4988: else if (GET_MODE (reloadreg) == GET_MODE (*loc)) 4989: return reloadreg; 4990: else 4991: return gen_rtx (SUBREG, GET_MODE (*loc), SUBREG_REG (reloadreg), 4992: SUBREG_WORD (reloadreg) + SUBREG_WORD (*loc)); 4993: } 4994: } 4995: 4996: return *loc; 4997: } 4998: 1.1 root 4999: /* Return nonzero if register in range [REGNO, ENDREGNO) 5000: appears either explicitly or implicitly in X 1.1.1.6 root 5001: other than being stored into (except for earlyclobber operands). 1.1 root 5002: 5003: References contained within the substructure at LOC do not count. 5004: LOC may be zero, meaning don't ignore anything. 5005: 5006: This is similar to refers_to_regno_p in rtlanal.c except that we 5007: look at equivalences for pseudos that didn't get hard registers. */ 5008: 5009: int 5010: refers_to_regno_for_reload_p (regno, endregno, x, loc) 5011: int regno, endregno; 5012: rtx x; 5013: rtx *loc; 5014: { 5015: register int i; 5016: register RTX_CODE code; 5017: register char *fmt; 5018: 5019: if (x == 0) 5020: return 0; 5021: 5022: repeat: 5023: code = GET_CODE (x); 5024: 5025: switch (code) 5026: { 5027: case REG: 5028: i = REGNO (x); 5029: 1.1.1.3 root 5030: /* If this is a pseudo, a hard register must not have been allocated. 5031: X must therefore either be a constant or be in memory. */ 5032: if (i >= FIRST_PSEUDO_REGISTER) 5033: { 5034: if (reg_equiv_memory_loc[i]) 5035: return refers_to_regno_for_reload_p (regno, endregno, 1.1.1.4 root 5036: reg_equiv_memory_loc[i], 5037: NULL_PTR); 1.1.1.3 root 5038: 5039: if (reg_equiv_constant[i]) 5040: return 0; 5041: 5042: abort (); 5043: } 1.1 root 5044: 5045: return (endregno > i 5046: && regno < i + (i < FIRST_PSEUDO_REGISTER 5047: ? HARD_REGNO_NREGS (i, GET_MODE (x)) 5048: : 1)); 5049: 5050: case SUBREG: 5051: /* If this is a SUBREG of a hard reg, we can see exactly which 5052: registers are being modified. Otherwise, handle normally. */ 5053: if (GET_CODE (SUBREG_REG (x)) == REG 5054: && REGNO (SUBREG_REG (x)) < FIRST_PSEUDO_REGISTER) 5055: { 5056: int inner_regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x); 5057: int inner_endregno 5058: = inner_regno + (inner_regno < FIRST_PSEUDO_REGISTER 5059: ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 5060: 5061: return endregno > inner_regno && regno < inner_endregno; 5062: } 5063: break; 5064: 5065: case CLOBBER: 5066: case SET: 5067: if (&SET_DEST (x) != loc 5068: /* Note setting a SUBREG counts as referring to the REG it is in for 5069: a pseudo but not for hard registers since we can 5070: treat each word individually. */ 5071: && ((GET_CODE (SET_DEST (x)) == SUBREG 5072: && loc != &SUBREG_REG (SET_DEST (x)) 5073: && GET_CODE (SUBREG_REG (SET_DEST (x))) == REG 5074: && REGNO (SUBREG_REG (SET_DEST (x))) >= FIRST_PSEUDO_REGISTER 5075: && refers_to_regno_for_reload_p (regno, endregno, 5076: SUBREG_REG (SET_DEST (x)), 5077: loc)) 1.1.1.6 root 5078: /* If the ouput is an earlyclobber operand, this is 5079: a conflict. */ 5080: || ((GET_CODE (SET_DEST (x)) != REG 5081: || earlyclobber_operand_p (SET_DEST (x))) 1.1 root 5082: && refers_to_regno_for_reload_p (regno, endregno, 5083: SET_DEST (x), loc)))) 5084: return 1; 5085: 5086: if (code == CLOBBER || loc == &SET_SRC (x)) 5087: return 0; 5088: x = SET_SRC (x); 5089: goto repeat; 5090: } 5091: 5092: /* X does not match, so try its subexpressions. */ 5093: 5094: fmt = GET_RTX_FORMAT (code); 5095: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5096: { 5097: if (fmt[i] == 'e' && loc != &XEXP (x, i)) 5098: { 5099: if (i == 0) 5100: { 5101: x = XEXP (x, 0); 5102: goto repeat; 5103: } 5104: else 5105: if (refers_to_regno_for_reload_p (regno, endregno, 5106: XEXP (x, i), loc)) 5107: return 1; 5108: } 5109: else if (fmt[i] == 'E') 5110: { 5111: register int j; 5112: for (j = XVECLEN (x, i) - 1; j >=0; j--) 5113: if (loc != &XVECEXP (x, i, j) 5114: && refers_to_regno_for_reload_p (regno, endregno, 5115: XVECEXP (x, i, j), loc)) 5116: return 1; 5117: } 5118: } 5119: return 0; 5120: } 1.1.1.3 root 5121: 5122: /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG, 5123: we check if any register number in X conflicts with the relevant register 5124: numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN 5125: contains a MEM (we don't bother checking for memory addresses that can't 5126: conflict because we expect this to be a rare case. 5127: 5128: This function is similar to reg_overlap_mention_p in rtlanal.c except 5129: that we look at equivalences for pseudos that didn't get hard registers. */ 5130: 5131: int 5132: reg_overlap_mentioned_for_reload_p (x, in) 5133: rtx x, in; 5134: { 5135: int regno, endregno; 5136: 5137: if (GET_CODE (x) == SUBREG) 5138: { 5139: regno = REGNO (SUBREG_REG (x)); 5140: if (regno < FIRST_PSEUDO_REGISTER) 5141: regno += SUBREG_WORD (x); 5142: } 5143: else if (GET_CODE (x) == REG) 5144: { 5145: regno = REGNO (x); 5146: 5147: /* If this is a pseudo, it must not have been assigned a hard register. 5148: Therefore, it must either be in memory or be a constant. */ 5149: 5150: if (regno >= FIRST_PSEUDO_REGISTER) 5151: { 5152: if (reg_equiv_memory_loc[regno]) 5153: return refers_to_mem_for_reload_p (in); 5154: else if (reg_equiv_constant[regno]) 5155: return 0; 5156: abort (); 5157: } 5158: } 5159: else if (CONSTANT_P (x)) 5160: return 0; 5161: else if (GET_CODE (x) == MEM) 5162: return refers_to_mem_for_reload_p (in); 5163: else if (GET_CODE (x) == SCRATCH || GET_CODE (x) == PC 5164: || GET_CODE (x) == CC0) 5165: return reg_mentioned_p (x, in); 5166: else 5167: abort (); 5168: 5169: endregno = regno + (regno < FIRST_PSEUDO_REGISTER 5170: ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); 5171: 1.1.1.4 root 5172: return refers_to_regno_for_reload_p (regno, endregno, in, NULL_PTR); 1.1.1.3 root 5173: } 5174: 5175: /* Return nonzero if anything in X contains a MEM. Look also for pseudo 5176: registers. */ 5177: 5178: int 5179: refers_to_mem_for_reload_p (x) 5180: rtx x; 5181: { 5182: char *fmt; 5183: int i; 5184: 5185: if (GET_CODE (x) == MEM) 5186: return 1; 5187: 5188: if (GET_CODE (x) == REG) 5189: return (REGNO (x) >= FIRST_PSEUDO_REGISTER 5190: && reg_equiv_memory_loc[REGNO (x)]); 5191: 5192: fmt = GET_RTX_FORMAT (GET_CODE (x)); 5193: for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) 5194: if (fmt[i] == 'e' 5195: && (GET_CODE (XEXP (x, i)) == MEM 5196: || refers_to_mem_for_reload_p (XEXP (x, i)))) 5197: return 1; 5198: 5199: return 0; 5200: } 1.1 root 5201: 5202: /* Check the insns before INSN to see if there is a suitable register 5203: containing the same value as GOAL. 5204: If OTHER is -1, look for a register in class CLASS. 5205: Otherwise, just see if register number OTHER shares GOAL's value. 5206: 5207: Return an rtx for the register found, or zero if none is found. 5208: 5209: If RELOAD_REG_P is (short *)1, 5210: we reject any hard reg that appears in reload_reg_rtx 5211: because such a hard reg is also needed coming into this insn. 5212: 5213: If RELOAD_REG_P is any other nonzero value, 5214: it is a vector indexed by hard reg number 5215: and we reject any hard reg whose element in the vector is nonnegative 5216: as well as any that appears in reload_reg_rtx. 5217: 5218: If GOAL is zero, then GOALREG is a register number; we look 5219: for an equivalent for that register. 5220: 5221: MODE is the machine mode of the value we want an equivalence for. 5222: If GOAL is nonzero and not VOIDmode, then it must have mode MODE. 5223: 5224: This function is used by jump.c as well as in the reload pass. 5225: 5226: If GOAL is the sum of the stack pointer and a constant, we treat it 5227: as if it were a constant except that sp is required to be unchanging. */ 5228: 5229: rtx 5230: find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) 5231: register rtx goal; 5232: rtx insn; 5233: enum reg_class class; 5234: register int other; 5235: short *reload_reg_p; 5236: int goalreg; 5237: enum machine_mode mode; 5238: { 5239: register rtx p = insn; 1.1.1.5 root 5240: rtx goaltry, valtry, value, where; 1.1 root 5241: register rtx pat; 5242: register int regno = -1; 5243: int valueno; 5244: int goal_mem = 0; 5245: int goal_const = 0; 5246: int goal_mem_addr_varies = 0; 5247: int need_stable_sp = 0; 5248: int nregs; 5249: int valuenregs; 5250: 5251: if (goal == 0) 5252: regno = goalreg; 5253: else if (GET_CODE (goal) == REG) 5254: regno = REGNO (goal); 5255: else if (GET_CODE (goal) == MEM) 5256: { 5257: enum rtx_code code = GET_CODE (XEXP (goal, 0)); 5258: if (MEM_VOLATILE_P (goal)) 5259: return 0; 5260: if (flag_float_store && GET_MODE_CLASS (GET_MODE (goal)) == MODE_FLOAT) 5261: return 0; 5262: /* An address with side effects must be reexecuted. */ 5263: switch (code) 5264: { 5265: case POST_INC: 5266: case PRE_INC: 5267: case POST_DEC: 5268: case PRE_DEC: 5269: return 0; 5270: } 5271: goal_mem = 1; 5272: } 5273: else if (CONSTANT_P (goal)) 5274: goal_const = 1; 5275: else if (GET_CODE (goal) == PLUS 5276: && XEXP (goal, 0) == stack_pointer_rtx 5277: && CONSTANT_P (XEXP (goal, 1))) 5278: goal_const = need_stable_sp = 1; 5279: else 5280: return 0; 5281: 5282: /* On some machines, certain regs must always be rejected 5283: because they don't behave the way ordinary registers do. */ 5284: 5285: #ifdef OVERLAPPING_REGNO_P 5286: if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 5287: && OVERLAPPING_REGNO_P (regno)) 5288: return 0; 5289: #endif 5290: 5291: /* Scan insns back from INSN, looking for one that copies 5292: a value into or out of GOAL. 5293: Stop and give up if we reach a label. */ 5294: 5295: while (1) 5296: { 5297: p = PREV_INSN (p); 5298: if (p == 0 || GET_CODE (p) == CODE_LABEL) 5299: return 0; 5300: if (GET_CODE (p) == INSN 5301: /* If we don't want spill regs ... */ 1.1.1.5 root 5302: && (! (reload_reg_p != 0 5303: && reload_reg_p != (short *) (HOST_WIDE_INT) 1) 1.1 root 5304: /* ... then ignore insns introduced by reload; they aren't useful 5305: and can cause results in reload_as_needed to be different 5306: from what they were when calculating the need for spills. 5307: If we notice an input-reload insn here, we will reject it below, 5308: but it might hide a usable equivalent. That makes bad code. 5309: It may even abort: perhaps no reg was spilled for this insn 5310: because it was assumed we would find that equivalent. */ 5311: || INSN_UID (p) < reload_first_uid)) 5312: { 1.1.1.3 root 5313: rtx tem; 1.1 root 5314: pat = single_set (p); 5315: /* First check for something that sets some reg equal to GOAL. */ 5316: if (pat != 0 5317: && ((regno >= 0 5318: && true_regnum (SET_SRC (pat)) == regno 5319: && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 5320: || 5321: (regno >= 0 5322: && true_regnum (SET_DEST (pat)) == regno 5323: && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0) 5324: || 5325: (goal_const && rtx_equal_p (SET_SRC (pat), goal) 5326: && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 5327: || (goal_mem 5328: && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0 5329: && rtx_renumbered_equal_p (goal, SET_SRC (pat))) 5330: || (goal_mem 5331: && (valueno = true_regnum (valtry = SET_SRC (pat))) >= 0 1.1.1.3 root 5332: && rtx_renumbered_equal_p (goal, SET_DEST (pat))) 5333: /* If we are looking for a constant, 5334: and something equivalent to that constant was copied 5335: into a reg, we can use that reg. */ 1.1.1.4 root 5336: || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 5337: NULL_RTX)) 1.1.1.3 root 5338: && rtx_equal_p (XEXP (tem, 0), goal) 5339: && (valueno = true_regnum (valtry = SET_DEST (pat))) >= 0) 1.1.1.4 root 5340: || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 5341: NULL_RTX)) 1.1.1.3 root 5342: && GET_CODE (SET_DEST (pat)) == REG 5343: && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 5344: && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 5345: && GET_CODE (goal) == CONST_INT 1.1.1.5 root 5346: && 0 != (goaltry = operand_subword (XEXP (tem, 0), 0, 0, 5347: VOIDmode)) 5348: && rtx_equal_p (goal, goaltry) 1.1.1.3 root 5349: && (valtry = operand_subword (SET_DEST (pat), 0, 0, 5350: VOIDmode)) 5351: && (valueno = true_regnum (valtry)) >= 0) 1.1.1.4 root 5352: || (goal_const && (tem = find_reg_note (p, REG_EQUIV, 5353: NULL_RTX)) 1.1.1.3 root 5354: && GET_CODE (SET_DEST (pat)) == REG 5355: && GET_CODE (XEXP (tem, 0)) == CONST_DOUBLE 5356: && GET_MODE_CLASS (GET_MODE (XEXP (tem, 0))) == MODE_FLOAT 5357: && GET_CODE (goal) == CONST_INT 1.1.1.5 root 5358: && 0 != (goaltry = operand_subword (XEXP (tem, 0), 1, 0, 5359: VOIDmode)) 5360: && rtx_equal_p (goal, goaltry) 1.1.1.3 root 5361: && (valtry 5362: = operand_subword (SET_DEST (pat), 1, 0, VOIDmode)) 5363: && (valueno = true_regnum (valtry)) >= 0))) 1.1 root 5364: if (other >= 0 5365: ? valueno == other 5366: : ((unsigned) valueno < FIRST_PSEUDO_REGISTER 5367: && TEST_HARD_REG_BIT (reg_class_contents[(int) class], 5368: valueno))) 5369: { 5370: value = valtry; 5371: where = p; 5372: break; 5373: } 5374: } 5375: } 5376: 5377: /* We found a previous insn copying GOAL into a suitable other reg VALUE 5378: (or copying VALUE into GOAL, if GOAL is also a register). 5379: Now verify that VALUE is really valid. */ 5380: 5381: /* VALUENO is the register number of VALUE; a hard register. */ 5382: 5383: /* Don't try to re-use something that is killed in this insn. We want 5384: to be able to trust REG_UNUSED notes. */ 5385: if (find_reg_note (where, REG_UNUSED, value)) 5386: return 0; 5387: 5388: /* If we propose to get the value from the stack pointer or if GOAL is 5389: a MEM based on the stack pointer, we need a stable SP. */ 5390: if (valueno == STACK_POINTER_REGNUM 1.1.1.3 root 5391: || (goal_mem && reg_overlap_mentioned_for_reload_p (stack_pointer_rtx, 5392: goal))) 1.1 root 5393: need_stable_sp = 1; 5394: 5395: /* Reject VALUE if the copy-insn moved the wrong sort of datum. */ 5396: if (GET_MODE (value) != mode) 5397: return 0; 5398: 5399: /* Reject VALUE if it was loaded from GOAL 5400: and is also a register that appears in the address of GOAL. */ 5401: 5402: if (goal_mem && value == SET_DEST (PATTERN (where)) 1.1.1.3 root 5403: && refers_to_regno_for_reload_p (valueno, 5404: (valueno 5405: + HARD_REGNO_NREGS (valueno, mode)), 1.1.1.4 root 5406: goal, NULL_PTR)) 1.1 root 5407: return 0; 5408: 5409: /* Reject registers that overlap GOAL. */ 5410: 5411: if (!goal_mem && !goal_const 5412: && regno + HARD_REGNO_NREGS (regno, mode) > valueno 5413: && regno < valueno + HARD_REGNO_NREGS (valueno, mode)) 5414: return 0; 5415: 5416: /* Reject VALUE if it is one of the regs reserved for reloads. 5417: Reload1 knows how to reuse them anyway, and it would get 5418: confused if we allocated one without its knowledge. 5419: (Now that insns introduced by reload are ignored above, 5420: this case shouldn't happen, but I'm not positive.) */ 5421: 1.1.1.5 root 5422: if (reload_reg_p != 0 && reload_reg_p != (short *) (HOST_WIDE_INT) 1 1.1 root 5423: && reload_reg_p[valueno] >= 0) 5424: return 0; 5425: 5426: /* On some machines, certain regs must always be rejected 5427: because they don't behave the way ordinary registers do. */ 5428: 5429: #ifdef OVERLAPPING_REGNO_P 5430: if (OVERLAPPING_REGNO_P (valueno)) 5431: return 0; 5432: #endif 5433: 5434: nregs = HARD_REGNO_NREGS (regno, mode); 5435: valuenregs = HARD_REGNO_NREGS (valueno, mode); 5436: 5437: /* Reject VALUE if it is a register being used for an input reload 5438: even if it is not one of those reserved. */ 5439: 5440: if (reload_reg_p != 0) 5441: { 5442: int i; 5443: for (i = 0; i < n_reloads; i++) 5444: if (reload_reg_rtx[i] != 0 && reload_in[i]) 5445: { 5446: int regno1 = REGNO (reload_reg_rtx[i]); 5447: int nregs1 = HARD_REGNO_NREGS (regno1, 5448: GET_MODE (reload_reg_rtx[i])); 5449: if (regno1 < valueno + valuenregs 5450: && regno1 + nregs1 > valueno) 5451: return 0; 5452: } 5453: } 5454: 5455: if (goal_mem) 1.1.1.5 root 5456: /* We must treat frame pointer as varying here, 5457: since it can vary--in a nonlocal goto as generated by expand_goto. */ 5458: goal_mem_addr_varies = !CONSTANT_ADDRESS_P (XEXP (goal, 0)); 1.1 root 5459: 5460: /* Now verify that the values of GOAL and VALUE remain unaltered 5461: until INSN is reached. */ 5462: 5463: p = insn; 5464: while (1) 5465: { 5466: p = PREV_INSN (p); 5467: if (p == where) 5468: return value; 5469: 5470: /* Don't trust the conversion past a function call 5471: if either of the two is in a call-clobbered register, or memory. */ 5472: if (GET_CODE (p) == CALL_INSN 5473: && ((regno >= 0 && regno < FIRST_PSEUDO_REGISTER 5474: && call_used_regs[regno]) 5475: || 5476: (valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER 5477: && call_used_regs[valueno]) 5478: || 5479: goal_mem 5480: || need_stable_sp)) 5481: return 0; 5482: 5483: #ifdef INSN_CLOBBERS_REGNO_P 5484: if ((valueno >= 0 && valueno < FIRST_PSEUDO_REGISTER 5485: && INSN_CLOBBERS_REGNO_P (p, valueno)) 5486: || (regno >= 0 && regno < FIRST_PSEUDO_REGISTER 5487: && INSN_CLOBBERS_REGNO_P (p, regno))) 5488: return 0; 5489: #endif 5490: 5491: if (GET_RTX_CLASS (GET_CODE (p)) == 'i') 5492: { 5493: /* If this insn P stores in either GOAL or VALUE, return 0. 5494: If GOAL is a memory ref and this insn writes memory, return 0. 5495: If GOAL is a memory ref and its address is not constant, 5496: and this insn P changes a register used in GOAL, return 0. */ 5497: 5498: pat = PATTERN (p); 5499: if (GET_CODE (pat) == SET || GET_CODE (pat) == CLOBBER) 5500: { 5501: register rtx dest = SET_DEST (pat); 5502: while (GET_CODE (dest) == SUBREG 5503: || GET_CODE (dest) == ZERO_EXTRACT 5504: || GET_CODE (dest) == SIGN_EXTRACT 5505: || GET_CODE (dest) == STRICT_LOW_PART) 5506: dest = XEXP (dest, 0); 5507: if (GET_CODE (dest) == REG) 5508: { 5509: register int xregno = REGNO (dest); 5510: int xnregs; 5511: if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 5512: xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 5513: else 5514: xnregs = 1; 5515: if (xregno < regno + nregs && xregno + xnregs > regno) 5516: return 0; 5517: if (xregno < valueno + valuenregs 5518: && xregno + xnregs > valueno) 5519: return 0; 5520: if (goal_mem_addr_varies 1.1.1.3 root 5521: && reg_overlap_mentioned_for_reload_p (dest, goal)) 1.1 root 5522: return 0; 5523: } 5524: else if (goal_mem && GET_CODE (dest) == MEM 5525: && ! push_operand (dest, GET_MODE (dest))) 5526: return 0; 5527: else if (need_stable_sp && push_operand (dest, GET_MODE (dest))) 5528: return 0; 5529: } 5530: else if (GET_CODE (pat) == PARALLEL) 5531: { 5532: register int i; 5533: for (i = XVECLEN (pat, 0) - 1; i >= 0; i--) 5534: { 5535: register rtx v1 = XVECEXP (pat, 0, i); 5536: if (GET_CODE (v1) == SET || GET_CODE (v1) == CLOBBER) 5537: { 5538: register rtx dest = SET_DEST (v1); 5539: while (GET_CODE (dest) == SUBREG 5540: || GET_CODE (dest) == ZERO_EXTRACT 5541: || GET_CODE (dest) == SIGN_EXTRACT 5542: || GET_CODE (dest) == STRICT_LOW_PART) 5543: dest = XEXP (dest, 0); 5544: if (GET_CODE (dest) == REG) 5545: { 5546: register int xregno = REGNO (dest); 5547: int xnregs; 5548: if (REGNO (dest) < FIRST_PSEUDO_REGISTER) 5549: xnregs = HARD_REGNO_NREGS (xregno, GET_MODE (dest)); 5550: else 5551: xnregs = 1; 5552: if (xregno < regno + nregs 5553: && xregno + xnregs > regno) 5554: return 0; 5555: if (xregno < valueno + valuenregs 5556: && xregno + xnregs > valueno) 5557: return 0; 5558: if (goal_mem_addr_varies 1.1.1.3 root 5559: && reg_overlap_mentioned_for_reload_p (dest, 5560: goal)) 1.1 root 5561: return 0; 5562: } 5563: else if (goal_mem && GET_CODE (dest) == MEM 5564: && ! push_operand (dest, GET_MODE (dest))) 5565: return 0; 5566: else if (need_stable_sp 5567: && push_operand (dest, GET_MODE (dest))) 5568: return 0; 5569: } 5570: } 5571: } 5572: 5573: #ifdef AUTO_INC_DEC 5574: /* If this insn auto-increments or auto-decrements 5575: either regno or valueno, return 0 now. 5576: If GOAL is a memory ref and its address is not constant, 5577: and this insn P increments a register used in GOAL, return 0. */ 5578: { 5579: register rtx link; 5580: 5581: for (link = REG_NOTES (p); link; link = XEXP (link, 1)) 5582: if (REG_NOTE_KIND (link) == REG_INC 5583: && GET_CODE (XEXP (link, 0)) == REG) 5584: { 5585: register int incno = REGNO (XEXP (link, 0)); 5586: if (incno < regno + nregs && incno >= regno) 5587: return 0; 5588: if (incno < valueno + valuenregs && incno >= valueno) 5589: return 0; 5590: if (goal_mem_addr_varies 1.1.1.3 root 5591: && reg_overlap_mentioned_for_reload_p (XEXP (link, 0), 5592: goal)) 1.1 root 5593: return 0; 5594: } 5595: } 5596: #endif 5597: } 5598: } 5599: } 5600: 5601: /* Find a place where INCED appears in an increment or decrement operator 5602: within X, and return the amount INCED is incremented or decremented by. 5603: The value is always positive. */ 5604: 5605: static int 5606: find_inc_amount (x, inced) 5607: rtx x, inced; 5608: { 5609: register enum rtx_code code = GET_CODE (x); 5610: register char *fmt; 5611: register int i; 5612: 5613: if (code == MEM) 5614: { 5615: register rtx addr = XEXP (x, 0); 5616: if ((GET_CODE (addr) == PRE_DEC 5617: || GET_CODE (addr) == POST_DEC 5618: || GET_CODE (addr) == PRE_INC 5619: || GET_CODE (addr) == POST_INC) 5620: && XEXP (addr, 0) == inced) 5621: return GET_MODE_SIZE (GET_MODE (x)); 5622: } 5623: 5624: fmt = GET_RTX_FORMAT (code); 5625: for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 5626: { 5627: if (fmt[i] == 'e') 5628: { 5629: register int tem = find_inc_amount (XEXP (x, i), inced); 5630: if (tem != 0) 5631: return tem; 5632: } 5633: if (fmt[i] == 'E') 5634: { 5635: register int j; 5636: for (j = XVECLEN (x, i) - 1; j >= 0; j--) 5637: { 5638: register int tem = find_inc_amount (XVECEXP (x, i, j), inced); 5639: if (tem != 0) 5640: return tem; 5641: } 5642: } 5643: } 5644: 5645: return 0; 5646: } 5647: 5648: /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */ 5649: 5650: int 5651: regno_clobbered_p (regno, insn) 5652: int regno; 5653: rtx insn; 5654: { 5655: if (GET_CODE (PATTERN (insn)) == CLOBBER 5656: && GET_CODE (XEXP (PATTERN (insn), 0)) == REG) 5657: return REGNO (XEXP (PATTERN (insn), 0)) == regno; 5658: 5659: if (GET_CODE (PATTERN (insn)) == PARALLEL) 5660: { 5661: int i = XVECLEN (PATTERN (insn), 0) - 1; 5662: 5663: for (; i >= 0; i--) 5664: { 5665: rtx elt = XVECEXP (PATTERN (insn), 0, i); 5666: if (GET_CODE (elt) == CLOBBER && GET_CODE (XEXP (elt, 0)) == REG 5667: && REGNO (XEXP (elt, 0)) == regno) 5668: return 1; 5669: } 5670: } 5671: 5672: return 0; 5673: } 1.1.1.7 ! root 5674: ! 5675: static char *reload_when_needed_name[] = ! 5676: { ! 5677: "RELOAD_FOR_INPUT", ! 5678: "RELOAD_FOR_OUTPUT", ! 5679: "RELOAD_FOR_INSN", ! 5680: "RELOAD_FOR_INPUT_ADDRESS", ! 5681: "RELOAD_FOR_OUTPUT_ADDRESS", ! 5682: "RELOAD_FOR_OPERAND_ADDRESS", ! 5683: "RELOAD_FOR_OPADDR_ADDR", ! 5684: "RELOAD_OTHER", ! 5685: "RELOAD_FOR_OTHER_ADDRESS" ! 5686: }; ! 5687: ! 5688: static char *reg_class_names[] = REG_CLASS_NAMES; ! 5689: ! 5690: /* This function is used to print the variables set by 'find_reloads' */ ! 5691: ! 5692: void ! 5693: debug_reload() ! 5694: { ! 5695: int r; ! 5696: ! 5697: fprintf (stderr, "\nn_reloads = %d\n", n_reloads); ! 5698: ! 5699: for (r = 0; r < n_reloads; r++) ! 5700: { ! 5701: fprintf (stderr, "\nRELOAD %d\n", r); ! 5702: ! 5703: if (reload_in[r]) ! 5704: { ! 5705: fprintf (stderr, "\nreload_in (%s) = ", mode_name[reload_inmode[r]]); ! 5706: debug_rtx (reload_in[r]); ! 5707: } ! 5708: ! 5709: if (reload_out[r]) ! 5710: { ! 5711: fprintf (stderr, "\nreload_out (%s) = ", mode_name[reload_outmode[r]]); ! 5712: debug_rtx (reload_out[r]); ! 5713: } ! 5714: ! 5715: fprintf (stderr, "%s, ", reg_class_names[(int) reload_reg_class[r]]); ! 5716: ! 5717: fprintf (stderr, "%s (opnum = %d)", reload_when_needed_name[(int)reload_when_needed[r]], ! 5718: reload_opnum[r]); ! 5719: ! 5720: if (reload_optional[r]) ! 5721: fprintf (stderr, ", optional"); ! 5722: ! 5723: if (reload_in[r]) ! 5724: fprintf (stderr, ", inc by %d\n", reload_inc[r]); ! 5725: ! 5726: if (reload_nocombine[r]) ! 5727: fprintf (stderr, ", can combine", reload_nocombine[r]); ! 5728: ! 5729: if (reload_secondary_p[r]) ! 5730: fprintf (stderr, ", secondary_reload_p"); ! 5731: ! 5732: if (reload_in_reg[r]) ! 5733: { ! 5734: fprintf (stderr, "\nreload_in_reg:\t\t\t"); ! 5735: debug_rtx (reload_in_reg[r]); ! 5736: } ! 5737: ! 5738: if (reload_reg_rtx[r]) ! 5739: { ! 5740: fprintf (stderr, "\nreload_reg_rtx:\t\t\t"); ! 5741: debug_rtx (reload_reg_rtx[r]); ! 5742: } ! 5743: ! 5744: if (reload_secondary_in_reload[r] != -1) ! 5745: { ! 5746: fprintf (stderr, "\nsecondary_in_reload = "); ! 5747: fprintf (stderr, "%d ", reload_secondary_in_reload[r]); ! 5748: } ! 5749: ! 5750: if (reload_secondary_out_reload[r] != -1) ! 5751: { ! 5752: if (reload_secondary_in_reload[r] != -1) ! 5753: fprintf (stderr, ", secondary_out_reload = "); ! 5754: else ! 5755: fprintf (stderr, "\nsecondary_out_reload = "); ! 5756: ! 5757: fprintf (stderr, "%d", reload_secondary_out_reload[r]); ! 5758: } ! 5759: ! 5760: ! 5761: if (reload_secondary_in_icode[r] != CODE_FOR_nothing) ! 5762: { ! 5763: fprintf (stderr, "\nsecondary_in_icode = "); ! 5764: fprintf (stderr, "%s", insn_name[r]); ! 5765: } ! 5766: ! 5767: if (reload_secondary_out_icode[r] != CODE_FOR_nothing) ! 5768: { ! 5769: if (reload_secondary_in_icode[r] != CODE_FOR_nothing) ! 5770: fprintf (stderr, ", secondary_out_icode = "); ! 5771: else ! 5772: fprintf (stderr, "\nsecondary_out_icode = "); ! 5773: ! 5774: fprintf (stderr, "%s ", insn_name[r]); ! 5775: } ! 5776: fprintf (stderr, "\n"); ! 5777: } ! 5778: ! 5779: fprintf (stderr, "\n"); ! 5780: }
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