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1.1 root 1: /* This file contains the definitions and documentation for the
2: Register Transfer Expressions (rtx's) that make up the
3: Register Transfer Language (rtl) used in the Back End of the GNU compiler.
1.1.1.7 ! root 4: Copyright (C) 1987, 1988, 1992, 1994, 1995 Free Software Foundation, Inc.
1.1 root 5:
6: This file is part of GNU CC.
7:
8: GNU CC is free software; you can redistribute it and/or modify
9: it under the terms of the GNU General Public License as published by
10: the Free Software Foundation; either version 2, or (at your option)
11: any later version.
12:
13: GNU CC is distributed in the hope that it will be useful,
14: but WITHOUT ANY WARRANTY; without even the implied warranty of
15: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: GNU General Public License for more details.
17:
18: You should have received a copy of the GNU General Public License
19: along with GNU CC; see the file COPYING. If not, write to
1.1.1.7 ! root 20: the Free Software Foundation, 59 Temple Place - Suite 330,
! 21: Boston, MA 02111-1307, USA. */
1.1 root 22:
23:
24: /* Expression definitions and descriptions for all targets are in this file.
25: Some will not be used for some targets.
26:
27: The fields in the cpp macro call "DEF_RTL_EXPR()"
28: are used to create declarations in the C source of the compiler.
29:
30: The fields are:
31:
32: 1. The internal name of the rtx used in the C source.
33: It is a tag in the enumeration "enum rtx_code" defined in "rtl.h".
34: By convention these are in UPPER_CASE.
35:
36: 2. The name of the rtx in the external ASCII format read by
37: read_rtx(), and printed by print_rtx().
38: These names are stored in rtx_name[].
39: By convention these are the internal (field 1) names in lower_case.
40:
41: 3. The print format, and type of each rtx->fld[] (field) in this rtx.
42: These formats are stored in rtx_format[].
43: The meaning of the formats is documented in front of this array in rtl.c
44:
45: 4. The class of the rtx. These are stored in rtx_class and are accessed
46: via the GET_RTX_CLASS macro. They are defined as follows:
47:
48: "o" an rtx code that can be used to represent an object (e.g, REG, MEM)
49: "<" an rtx code for a comparison (e.g, EQ, NE, LT)
50: "1" an rtx code for a unary arithmetic expression (e.g, NEG, NOT)
51: "c" an rtx code for a commutative binary operation (e.g,, PLUS, MULT)
52: "3" an rtx code for a non-bitfield three input operation (IF_THEN_ELSE)
53: "2" an rtx code for a non-commutative binary operation (e.g., MINUS, DIV)
54: "b" an rtx code for a bit-field operation (ZERO_EXTRACT, SIGN_EXTRACT)
55: "i" an rtx code for a machine insn (INSN, JUMP_INSN, CALL_INSN)
56: "m" an rtx code for something that matches in insns (e.g, MATCH_DUP)
57: "x" everything else
58:
59: */
60:
61: /* ---------------------------------------------------------------------
62: Expressions (and "meta" expressions) used for structuring the
63: rtl representation of a program.
64: --------------------------------------------------------------------- */
65:
66: /* an expression code name unknown to the reader */
67: DEF_RTL_EXPR(UNKNOWN, "UnKnown", "*", 'x')
68:
69: /* (NIL) is used by rtl reader and printer to represent a null pointer. */
70:
71: DEF_RTL_EXPR(NIL, "nil", "*", 'x')
72:
73: /* ---------------------------------------------------------------------
74: Expressions used in constructing lists.
75: --------------------------------------------------------------------- */
76:
77: /* a linked list of expressions */
78: DEF_RTL_EXPR(EXPR_LIST, "expr_list", "ee", 'x')
79:
80: /* a linked list of instructions.
81: The insns are represented in print by their uids. */
82: DEF_RTL_EXPR(INSN_LIST, "insn_list", "ue", 'x')
83:
84: /* ----------------------------------------------------------------------
1.1.1.2 root 85: Expression types for machine descriptions.
1.1 root 86: These do not appear in actual rtl code in the compiler.
87: ---------------------------------------------------------------------- */
88:
89: /* Appears only in machine descriptions.
90: Means use the function named by the second arg (the string)
91: as a predicate; if matched, store the structure that was matched
92: in the operand table at index specified by the first arg (the integer).
93: If the second arg is the null string, the structure is just stored.
94:
95: A third string argument indicates to the register allocator restrictions
96: on where the operand can be allocated.
97:
98: If the target needs no restriction on any instruction this field should
99: be the null string.
100:
101: The string is prepended by:
102: '=' to indicate the operand is only written to.
103: '+' to indicate the operand is both read and written to.
104:
105: Each character in the string represents an allocatable class for an operand.
106: 'g' indicates the operand can be any valid class.
107: 'i' indicates the operand can be immediate (in the instruction) data.
108: 'r' indicates the operand can be in a register.
109: 'm' indicates the operand can be in memory.
110: 'o' a subset of the 'm' class. Those memory addressing modes that
111: can be offset at compile time (have a constant added to them).
112:
113: Other characters indicate target dependent operand classes and
114: are described in each target's machine description.
115:
116: For instructions with more than one operand, sets of classes can be
117: separated by a comma to indicate the appropriate multi-operand constraints.
118: There must be a 1 to 1 correspondence between these sets of classes in
119: all operands for an instruction.
120: */
121: DEF_RTL_EXPR(MATCH_OPERAND, "match_operand", "iss", 'm')
122:
123: /* Appears only in machine descriptions.
124: Means match a SCRATCH or a register. When used to generate rtl, a
125: SCRATCH is generated. As for MATCH_OPERAND, the mode specifies
126: the desired mode and the first argument is the operand number.
127: The second argument is the constraint. */
128: DEF_RTL_EXPR(MATCH_SCRATCH, "match_scratch", "is", 'm')
129:
130: /* Appears only in machine descriptions.
131: Means match only something equal to what is stored in the operand table
132: at the index specified by the argument. */
133: DEF_RTL_EXPR(MATCH_DUP, "match_dup", "i", 'm')
134:
135: /* Appears only in machine descriptions.
136: Means apply a predicate, AND match recursively the operands of the rtx.
137: Operand 0 is the operand-number, as in match_operand.
138: Operand 1 is a predicate to apply (as a string, a function name).
139: Operand 2 is a vector of expressions, each of which must match
140: one subexpression of the rtx this construct is matching. */
141: DEF_RTL_EXPR(MATCH_OPERATOR, "match_operator", "isE", 'm')
142:
143: /* Appears only in machine descriptions.
144: Means to match a PARALLEL of arbitrary length. The predicate is applied
145: to the PARALLEL and the initial expressions in the PARALLEL are matched.
146: Operand 0 is the operand-number, as in match_operand.
147: Operand 1 is a predicate to apply to the PARALLEL.
148: Operand 2 is a vector of expressions, each of which must match the
149: corresponding element in the PARALLEL. */
150: DEF_RTL_EXPR(MATCH_PARALLEL, "match_parallel", "isE", 'm')
151:
152: /* Appears only in machine descriptions.
153: Means match only something equal to what is stored in the operand table
154: at the index specified by the argument. For MATCH_OPERATOR. */
155: DEF_RTL_EXPR(MATCH_OP_DUP, "match_op_dup", "iE", 'm')
156:
157: /* Appears only in machine descriptions.
1.1.1.3 root 158: Means match only something equal to what is stored in the operand table
159: at the index specified by the argument. For MATCH_PARALLEL. */
160: DEF_RTL_EXPR(MATCH_PAR_DUP, "match_par_dup", "iE", 'm')
161:
162: /* Appears only in machine descriptions.
1.1 root 163: Defines the pattern for one kind of instruction.
164: Operand:
165: 0: names this instruction.
166: If the name is the null string, the instruction is in the
167: machine description just to be recognized, and will never be emitted by
168: the tree to rtl expander.
169: 1: is the pattern.
170: 2: is a string which is a C expression
171: giving an additional condition for recognizing this pattern.
172: A null string means no extra condition.
173: 3: is the action to execute if this pattern is matched.
174: If this assembler code template starts with a * then it is a fragment of
175: C code to run to decide on a template to use. Otherwise, it is the
176: template to use.
177: 4: optionally, a vector of attributes for this insn.
178: */
179: DEF_RTL_EXPR(DEFINE_INSN, "define_insn", "sEssV", 'x')
180:
181: /* Definition of a peephole optimization.
182: 1st operand: vector of insn patterns to match
183: 2nd operand: C expression that must be true
184: 3rd operand: template or C code to produce assembler output.
185: 4: optionally, a vector of attributes for this insn.
186: */
187: DEF_RTL_EXPR(DEFINE_PEEPHOLE, "define_peephole", "EssV", 'x')
188:
189: /* Definition of a split operation.
190: 1st operand: insn pattern to match
191: 2nd operand: C expression that must be true
192: 3rd operand: vector of insn patterns to place into a SEQUENCE
193: 4th operand: optionally, some C code to execute before generating the
194: insns. This might, for example, create some RTX's and store them in
195: elements of `recog_operand' for use by the vector of insn-patterns.
196: (`operands' is an alias here for `recog_operand'). */
197: DEF_RTL_EXPR(DEFINE_SPLIT, "define_split", "EsES", 'x')
198:
199: /* Definition of a combiner pattern.
200: Operands not defined yet. */
201: DEF_RTL_EXPR(DEFINE_COMBINE, "define_combine", "Ess", 'x')
202:
203: /* Define how to generate multiple insns for a standard insn name.
204: 1st operand: the insn name.
205: 2nd operand: vector of insn-patterns.
206: Use match_operand to substitute an element of `recog_operand'.
207: 3rd operand: C expression that must be true for this to be available.
208: This may not test any operands.
209: 4th operand: Extra C code to execute before generating the insns.
210: This might, for example, create some RTX's and store them in
211: elements of `recog_operand' for use by the vector of insn-patterns.
212: (`operands' is an alias here for `recog_operand'). */
213: DEF_RTL_EXPR(DEFINE_EXPAND, "define_expand", "sEss", 'x')
214:
215: /* Define a requirement for delay slots.
216: 1st operand: Condition involving insn attributes that, if true,
217: indicates that the insn requires the number of delay slots
218: shown.
219: 2nd operand: Vector whose length is the three times the number of delay
220: slots required.
221: Each entry gives three conditions, each involving attributes.
222: The first must be true for an insn to occupy that delay slot
223: location. The second is true for all insns that can be
224: annulled if the branch is true and the third is true for all
225: insns that can be annulled if the branch is false.
226:
227: Multiple DEFINE_DELAYs may be present. They indicate differing
228: requirements for delay slots. */
229: DEF_RTL_EXPR(DEFINE_DELAY, "define_delay", "eE", 'x')
230:
231: /* Define a set of insns that requires a function unit. This means that
232: these insns produce their result after a delay and that there may be
233: restrictions on the number of insns of this type that can be scheduled
234: simultaneously.
235:
236: More than one DEFINE_FUNCTION_UNIT can be specified for a function unit.
237: Each gives a set of operations and associated delays. The first three
238: operands must be the same for each operation for the same function unit.
239:
1.1.1.3 root 240: All delays are specified in cycles.
1.1 root 241:
242: 1st operand: Name of function unit (mostly for documentation)
243: 2nd operand: Number of identical function units in CPU
244: 3rd operand: Total number of simultaneous insns that can execute on this
245: function unit; 0 if unlimited.
246: 4th operand: Condition involving insn attribute, that, if true, specifies
247: those insns that this expression applies to.
248: 5th operand: Constant delay after which insn result will be
249: available.
250: 6th operand: Delay until next insn can be scheduled on the function unit
251: executing this operation. The meaning depends on whether or
252: not the next operand is supplied.
253: 7th operand: If this operand is not specified, the 6th operand gives the
1.1.1.3 root 254: number of cycles after the instruction matching the 4th
255: operand begins using the function unit until a subsequent
256: insn can begin. A value of zero should be used for a
257: unit with no issue constraints. If only one operation can
258: be executed a time and the unit is busy for the entire time,
259: the 3rd operand should be specified as 1, the 6th operand
260: sould be specified as 0, and the 7th operand should not
261: be specified.
1.1 root 262:
263: If this operand is specified, it is a list of attribute
264: expressions. If an insn for which any of these expressions
265: is true is currently executing on the function unit, the
1.1.1.3 root 266: issue delay will be given by the 6th operand. Otherwise,
267: the insn can be immediately scheduled (subject to the limit
268: on the number of simultaneous operations executing on the
1.1 root 269: unit.) */
270: DEF_RTL_EXPR(DEFINE_FUNCTION_UNIT, "define_function_unit", "siieiiV", 'x')
271:
272: /* Define attribute computation for `asm' instructions. */
273: DEF_RTL_EXPR(DEFINE_ASM_ATTRIBUTES, "define_asm_attributes", "V", 'x' )
274:
275: /* SEQUENCE appears in the result of a `gen_...' function
276: for a DEFINE_EXPAND that wants to make several insns.
277: Its elements are the bodies of the insns that should be made.
278: `emit_insn' takes the SEQUENCE apart and makes separate insns. */
279: DEF_RTL_EXPR(SEQUENCE, "sequence", "E", 'x')
280:
281: /* Refers to the address of its argument.
282: This appears only in machine descriptions, indicating that
283: any expression that would be acceptable as the operand of MEM
284: should be matched. */
285: DEF_RTL_EXPR(ADDRESS, "address", "e", 'm')
286:
287: /* ----------------------------------------------------------------------
288: Expressions used for insn attributes. These also do not appear in
289: actual rtl code in the compiler.
290: ---------------------------------------------------------------------- */
291:
292: /* Definition of an insn attribute.
293: 1st operand: name of the attribute
294: 2nd operand: comma-separated list of possible attribute values
295: 3rd operand: expression for the default value of the attribute. */
296: DEF_RTL_EXPR(DEFINE_ATTR, "define_attr", "sse", 'x')
297:
298: /* Marker for the name of an attribute. */
299: DEF_RTL_EXPR(ATTR, "attr", "s", 'x')
300:
301: /* For use in the last (optional) operand of DEFINE_INSN or DEFINE_PEEPHOLE and
302: in DEFINE_ASM_INSN to specify an attribute to assign to insns matching that
303: pattern.
304:
305: (set_attr "name" "value") is equivalent to
306: (set (attr "name") (const_string "value")) */
307: DEF_RTL_EXPR(SET_ATTR, "set_attr", "ss", 'x')
308:
309: /* In the last operand of DEFINE_INSN and DEFINE_PEEPHOLE, this can be used to
310: specify that attribute values are to be assigned according to the
311: alternative matched.
312:
313: The following three expressions are equivalent:
314:
315: (set (attr "att") (cond [(eq_attrq "alternative" "1") (const_string "a1")
316: (eq_attrq "alternative" "2") (const_string "a2")]
317: (const_string "a3")))
318: (set_attr_alternative "att" [(const_string "a1") (const_string "a2")
319: (const_string "a3")])
320: (set_attr "att" "a1,a2,a3")
321: */
322: DEF_RTL_EXPR(SET_ATTR_ALTERNATIVE, "set_attr_alternative", "sE", 'x')
323:
324: /* A conditional expression true if the value of the specified attribute of
325: the current insn equals the specified value. The first operand is the
326: attribute name and the second is the comparison value. */
327: DEF_RTL_EXPR(EQ_ATTR, "eq_attr", "ss", 'x')
328:
1.1.1.4 root 329: /* A conditional expression which is true if the specified flag is
330: true for the insn being scheduled in reorg.
331:
332: genattr.c defines the following flags which can be tested by
333: (attr_flag "foo") expressions in eligible_for_delay.
334:
335: forward, backward, very_likely, likely, very_unlikely, and unlikely. */
336:
337: DEF_RTL_EXPR (ATTR_FLAG, "attr_flag", "s", 'x')
338:
1.1 root 339: /* ----------------------------------------------------------------------
340: Expression types used for things in the instruction chain.
341:
342: All formats must start with "iuu" to handle the chain.
343: Each insn expression holds an rtl instruction and its semantics
344: during back-end processing.
345: See macros's in "rtl.h" for the meaning of each rtx->fld[].
346:
347: ---------------------------------------------------------------------- */
348:
349: /* An instruction that cannot jump. */
350: DEF_RTL_EXPR(INSN, "insn", "iuueiee", 'i')
351:
352: /* An instruction that can possibly jump.
353: Fields ( rtx->fld[] ) have exact same meaning as INSN's. */
354: DEF_RTL_EXPR(JUMP_INSN, "jump_insn", "iuueiee0", 'i')
355:
356: /* An instruction that can possibly call a subroutine
357: but which will not change which instruction comes next
358: in the current function.
1.1.1.6 root 359: Field ( rtx->fld[7] ) is CALL_INSN_FUNCTION_USAGE.
360: All other fields ( rtx->fld[] ) have exact same meaning as INSN's. */
361: DEF_RTL_EXPR(CALL_INSN, "call_insn", "iuueieee", 'i')
1.1 root 362:
363: /* A marker that indicates that control will not flow through. */
364: DEF_RTL_EXPR(BARRIER, "barrier", "iuu", 'x')
365:
366: /* Holds a label that is followed by instructions.
367: Operand:
368: 3: is a number that is unique in the entire compilation.
369: 4: is the user-given name of the label, if any.
370: 5: is used in jump.c for the use-count of the label.
371: and in flow.c to point to the chain of label_ref's to this label. */
372: DEF_RTL_EXPR(CODE_LABEL, "code_label", "iuuis0", 'x')
373:
374: /* Say where in the code a source line starts, for symbol table's sake.
375: Contains a filename and a line number. Line numbers <= 0 are special:
376: 0 is used in a dummy placed at the front of every function
377: just so there will never be a need to delete the first insn;
378: -1 indicates a dummy; insns to be deleted by flow analysis and combining
379: are really changed to NOTEs with a number of -1.
380: -2 means beginning of a name binding contour; output N_LBRAC.
381: -3 means end of a contour; output N_RBRAC. */
382: DEF_RTL_EXPR(NOTE, "note", "iuusn", 'x')
383:
384: /* INLINE_HEADER is use by inline function machinery. The information
385: it contains helps to build the mapping function between the rtx's of
386: the function to be inlined and the current function being expanded. */
387:
1.1.1.7 ! root 388: DEF_RTL_EXPR(INLINE_HEADER, "inline_header", "iuuuiiiiiieeiiEe", 'x')
1.1 root 389:
390: /* ----------------------------------------------------------------------
391: Top level constituents of INSN, JUMP_INSN and CALL_INSN.
392: ---------------------------------------------------------------------- */
393:
394: /* Several operations to be done in parallel. */
395: DEF_RTL_EXPR(PARALLEL, "parallel", "E", 'x')
396:
397: /* A string that is passed through to the assembler as input.
398: One can obviously pass comments through by using the
399: assembler comment syntax.
400: These occur in an insn all by themselves as the PATTERN.
401: They also appear inside an ASM_OPERANDS
402: as a convenient way to hold a string. */
403: DEF_RTL_EXPR(ASM_INPUT, "asm_input", "s", 'x')
404:
405: /* An assembler instruction with operands.
406: 1st operand is the instruction template.
407: 2nd operand is the constraint for the output.
408: 3rd operand is the number of the output this expression refers to.
409: When an insn stores more than one value, a separate ASM_OPERANDS
410: is made for each output; this integer distinguishes them.
411: 4th is a vector of values of input operands.
412: 5th is a vector of modes and constraints for the input operands.
413: Each element is an ASM_INPUT containing a constraint string
414: and whose mode indicates the mode of the input operand.
415: 6th is the name of the containing source file.
416: 7th is the source line number. */
417: DEF_RTL_EXPR(ASM_OPERANDS, "asm_operands", "ssiEEsi", 'x')
418:
419: /* A machine-specific operation.
420: 1st operand is a vector of operands being used by the operation so that
421: any needed reloads can be done.
422: 2nd operand is a unique value saying which of a number of machine-specific
423: operations is to be performed.
424: (Note that the vector must be the first operand because of the way that
425: genrecog.c record positions within an insn.)
426: This can occur all by itself in a PATTERN, as a component of a PARALLEL,
427: or inside an expression. */
428: DEF_RTL_EXPR(UNSPEC, "unspec", "Ei", 'x')
429:
1.1.1.2 root 430: /* Similar, but a volatile operation and one which may trap. */
1.1 root 431: DEF_RTL_EXPR(UNSPEC_VOLATILE, "unspec_volatile", "Ei", 'x')
432:
433: /* Vector of addresses, stored as full words. */
434: /* Each element is a LABEL_REF to a CODE_LABEL whose address we want. */
435: DEF_RTL_EXPR(ADDR_VEC, "addr_vec", "E", 'x')
436:
437: /* Vector of address differences X0 - BASE, X1 - BASE, ...
438: First operand is BASE; the vector contains the X's.
439: The machine mode of this rtx says how much space to leave
440: for each difference. */
441: DEF_RTL_EXPR(ADDR_DIFF_VEC, "addr_diff_vec", "eE", 'x')
442:
443: /* ----------------------------------------------------------------------
444: At the top level of an instruction (perhaps under PARALLEL).
445: ---------------------------------------------------------------------- */
446:
447: /* Assignment.
448: Operand 1 is the location (REG, MEM, PC, CC0 or whatever) assigned to.
449: Operand 2 is the value stored there.
450: ALL assignment must use SET.
451: Instructions that do multiple assignments must use multiple SET,
452: under PARALLEL. */
453: DEF_RTL_EXPR(SET, "set", "ee", 'x')
454:
455: /* Indicate something is used in a way that we don't want to explain.
456: For example, subroutine calls will use the register
457: in which the static chain is passed. */
458: DEF_RTL_EXPR(USE, "use", "e", 'x')
459:
460: /* Indicate something is clobbered in a way that we don't want to explain.
461: For example, subroutine calls will clobber some physical registers
462: (the ones that are by convention not saved). */
463: DEF_RTL_EXPR(CLOBBER, "clobber", "e", 'x')
464:
465: /* Call a subroutine.
466: Operand 1 is the address to call.
467: Operand 2 is the number of arguments. */
468:
469: DEF_RTL_EXPR(CALL, "call", "ee", 'x')
470:
471: /* Return from a subroutine. */
472:
473: DEF_RTL_EXPR(RETURN, "return", "", 'x')
474:
475: /* Conditional trap.
476: Operand 1 is the condition.
477: Operand 2 is the trap code.
478: For an unconditional trap, make the condition (const_int 1). */
479: DEF_RTL_EXPR(TRAP_IF, "trap_if", "ei", 'x')
480:
481: /* ----------------------------------------------------------------------
482: Primitive values for use in expressions.
483: ---------------------------------------------------------------------- */
484:
485: /* numeric integer constant */
1.1.1.3 root 486: DEF_RTL_EXPR(CONST_INT, "const_int", "w", 'o')
1.1 root 487:
488: /* numeric double constant.
489: Operand 0 is the MEM that stores this constant in memory,
490: or various other things (see comments at immed_double_const in varasm.c).
491: Operand 1 is a chain of all CONST_DOUBLEs in use in the current function.
492: Remaining operands hold the actual value.
493: The number of operands may be more than 2 if cross-compiling;
494: see init_rtl. */
1.1.1.3 root 495: DEF_RTL_EXPR(CONST_DOUBLE, "const_double", "e0ww", 'o')
1.1 root 496:
497: /* String constant. Used only for attributes right now. */
498: DEF_RTL_EXPR(CONST_STRING, "const_string", "s", 'o')
499:
500: /* This is used to encapsulate an expression whose value is constant
501: (such as the sum of a SYMBOL_REF and a CONST_INT) so that it will be
502: recognized as a constant operand rather than by arithmetic instructions. */
503:
504: DEF_RTL_EXPR(CONST, "const", "e", 'o')
505:
506: /* program counter. Ordinary jumps are represented
507: by a SET whose first operand is (PC). */
508: DEF_RTL_EXPR(PC, "pc", "", 'o')
509:
510: /* A register. The "operand" is the register number, accessed
511: with the REGNO macro. If this number is less than FIRST_PSEUDO_REGISTER
512: than a hardware register is being referred to. */
513: DEF_RTL_EXPR(REG, "reg", "i", 'o')
514:
515: /* A scratch register. This represents a register used only within a
516: single insn. It will be turned into a REG during register allocation
517: or reload unless the constraint indicates that the register won't be
518: needed, in which case it can remain a SCRATCH. This code is
519: marked as having one operand so it can be turned into a REG. */
520: DEF_RTL_EXPR(SCRATCH, "scratch", "0", 'o')
521:
522: /* One word of a multi-word value.
523: The first operand is the complete value; the second says which word.
524: The WORDS_BIG_ENDIAN flag controls whether word number 0
525: (as numbered in a SUBREG) is the most or least significant word.
526:
527: This is also used to refer to a value in a different machine mode.
528: For example, it can be used to refer to a SImode value as if it were
529: Qimode, or vice versa. Then the word number is always 0. */
530: DEF_RTL_EXPR(SUBREG, "subreg", "ei", 'x')
531:
532: /* This one-argument rtx is used for move instructions
533: that are guaranteed to alter only the low part of a destination.
534: Thus, (SET (SUBREG:HI (REG...)) (MEM:HI ...))
535: has an unspecified effect on the high part of REG,
536: but (SET (STRICT_LOW_PART (SUBREG:HI (REG...))) (MEM:HI ...))
537: is guaranteed to alter only the bits of REG that are in HImode.
538:
539: The actual instruction used is probably the same in both cases,
540: but the register constraints may be tighter when STRICT_LOW_PART
541: is in use. */
542:
543: DEF_RTL_EXPR(STRICT_LOW_PART, "strict_low_part", "e", 'x')
544:
1.1.1.5 root 545: /* (CONCAT a b) represents the virtual concatenation of a and b
546: to make a value that has as many bits as a and b put together.
547: This is used for complex values. Normally it appears only
548: in DECL_RTLs and during RTL generation, but not in the insn chain. */
549: DEF_RTL_EXPR(CONCAT, "concat", "ee", 'o')
550:
1.1 root 551: /* A memory location; operand is the address.
552: Can be nested inside a VOLATILE. */
553: DEF_RTL_EXPR(MEM, "mem", "e", 'o')
554:
555: /* Reference to an assembler label in the code for this function.
556: The operand is a CODE_LABEL found in the insn chain.
557: The unprinted fields 1 and 2 are used in flow.c for the
558: LABEL_NEXTREF and CONTAINING_INSN. */
559: DEF_RTL_EXPR(LABEL_REF, "label_ref", "u00", 'o')
560:
561: /* Reference to a named label: the string that is the first operand,
562: with `_' added implicitly in front.
563: Exception: if the first character explicitly given is `*',
564: to give it to the assembler, remove the `*' and do not add `_'. */
565: DEF_RTL_EXPR(SYMBOL_REF, "symbol_ref", "s", 'o')
566:
567: /* The condition code register is represented, in our imagination,
568: as a register holding a value that can be compared to zero.
569: In fact, the machine has already compared them and recorded the
570: results; but instructions that look at the condition code
571: pretend to be looking at the entire value and comparing it. */
572: DEF_RTL_EXPR(CC0, "cc0", "", 'o')
573:
574: /* =====================================================================
575: A QUEUED expression really points to a member of the queue of instructions
576: to be output later for postincrement/postdecrement.
577: QUEUED expressions never become part of instructions.
578: When a QUEUED expression would be put into an instruction,
579: instead either the incremented variable or a copy of its previous
580: value is used.
581:
582: Operands are:
583: 0. the variable to be incremented (a REG rtx).
584: 1. the incrementing instruction, or 0 if it hasn't been output yet.
585: 2. A REG rtx for a copy of the old value of the variable, or 0 if none yet.
586: 3. the body to use for the incrementing instruction
587: 4. the next QUEUED expression in the queue.
588: ====================================================================== */
589:
590: DEF_RTL_EXPR(QUEUED, "queued", "eeeee", 'x')
591:
592: /* ----------------------------------------------------------------------
593: Expressions for operators in an rtl pattern
594: ---------------------------------------------------------------------- */
595:
596: /* if_then_else. This is used in representing ordinary
597: conditional jump instructions.
598: Operand:
599: 0: condition
600: 1: then expr
601: 2: else expr */
602: DEF_RTL_EXPR(IF_THEN_ELSE, "if_then_else", "eee", '3')
603:
604: /* General conditional. The first operand is a vector composed of pairs of
605: expressions. The first element of each pair is evaluated, in turn.
606: The value of the conditional is the second expression of the first pair
607: whose first expression evaluates non-zero. If none of the expressions is
608: true, the second operand will be used as the value of the conditional.
609:
610: This should be replaced with use of IF_THEN_ELSE. */
611: DEF_RTL_EXPR(COND, "cond", "Ee", 'x')
612:
613: /* Comparison, produces a condition code result. */
614: DEF_RTL_EXPR(COMPARE, "compare", "ee", '2')
615:
616: /* plus */
617: DEF_RTL_EXPR(PLUS, "plus", "ee", 'c')
618:
619: /* Operand 0 minus operand 1. */
620: DEF_RTL_EXPR(MINUS, "minus", "ee", '2')
621:
622: /* Minus operand 0. */
623: DEF_RTL_EXPR(NEG, "neg", "e", '1')
624:
625: DEF_RTL_EXPR(MULT, "mult", "ee", 'c')
626:
627: /* Operand 0 divided by operand 1. */
628: DEF_RTL_EXPR(DIV, "div", "ee", '2')
629: /* Remainder of operand 0 divided by operand 1. */
630: DEF_RTL_EXPR(MOD, "mod", "ee", '2')
631:
632: /* Unsigned divide and remainder. */
633: DEF_RTL_EXPR(UDIV, "udiv", "ee", '2')
634: DEF_RTL_EXPR(UMOD, "umod", "ee", '2')
635:
636: /* Bitwise operations. */
637: DEF_RTL_EXPR(AND, "and", "ee", 'c')
638:
639: DEF_RTL_EXPR(IOR, "ior", "ee", 'c')
640:
641: DEF_RTL_EXPR(XOR, "xor", "ee", 'c')
642:
643: DEF_RTL_EXPR(NOT, "not", "e", '1')
644:
645: /* Operand:
646: 0: value to be shifted.
1.1.1.6 root 647: 1: number of bits. */
1.1 root 648: DEF_RTL_EXPR(ASHIFT, "ashift", "ee", '2')
649: DEF_RTL_EXPR(ROTATE, "rotate", "ee", '2')
650:
651: /* Right shift operations, for machines where these are not the same
652: as left shifting with a negative argument. */
653:
654: DEF_RTL_EXPR(ASHIFTRT, "ashiftrt", "ee", '2')
655: DEF_RTL_EXPR(LSHIFTRT, "lshiftrt", "ee", '2')
656: DEF_RTL_EXPR(ROTATERT, "rotatert", "ee", '2')
657:
658: /* Minimum and maximum values of two operands. We need both signed and
659: unsigned forms. (We cannot use MIN for SMIN because it conflicts
660: with a macro of the same name.) */
661:
662: DEF_RTL_EXPR(SMIN, "smin", "ee", 'c')
663: DEF_RTL_EXPR(SMAX, "smax", "ee", 'c')
664: DEF_RTL_EXPR(UMIN, "umin", "ee", 'c')
665: DEF_RTL_EXPR(UMAX, "umax", "ee", 'c')
666:
667: /* These unary operations are used to represent incrementation
668: and decrementation as they occur in memory addresses.
669: The amount of increment or decrement are not represented
670: because they can be understood from the machine-mode of the
671: containing MEM. These operations exist in only two cases:
672: 1. pushes onto the stack.
673: 2. created automatically by the life_analysis pass in flow.c. */
674: DEF_RTL_EXPR(PRE_DEC, "pre_dec", "e", 'x')
675: DEF_RTL_EXPR(PRE_INC, "pre_inc", "e", 'x')
676: DEF_RTL_EXPR(POST_DEC, "post_dec", "e", 'x')
677: DEF_RTL_EXPR(POST_INC, "post_inc", "e", 'x')
678:
679: /* Comparison operations. The ordered comparisons exist in two
680: flavors, signed and unsigned. */
681: DEF_RTL_EXPR(NE, "ne", "ee", '<')
682: DEF_RTL_EXPR(EQ, "eq", "ee", '<')
683: DEF_RTL_EXPR(GE, "ge", "ee", '<')
684: DEF_RTL_EXPR(GT, "gt", "ee", '<')
685: DEF_RTL_EXPR(LE, "le", "ee", '<')
686: DEF_RTL_EXPR(LT, "lt", "ee", '<')
687: DEF_RTL_EXPR(GEU, "geu", "ee", '<')
688: DEF_RTL_EXPR(GTU, "gtu", "ee", '<')
689: DEF_RTL_EXPR(LEU, "leu", "ee", '<')
690: DEF_RTL_EXPR(LTU, "ltu", "ee", '<')
691:
692: /* Represents the result of sign-extending the sole operand.
693: The machine modes of the operand and of the SIGN_EXTEND expression
694: determine how much sign-extension is going on. */
695: DEF_RTL_EXPR(SIGN_EXTEND, "sign_extend", "e", '1')
696:
697: /* Similar for zero-extension (such as unsigned short to int). */
698: DEF_RTL_EXPR(ZERO_EXTEND, "zero_extend", "e", '1')
699:
700: /* Similar but here the operand has a wider mode. */
701: DEF_RTL_EXPR(TRUNCATE, "truncate", "e", '1')
702:
703: /* Similar for extending floating-point values (such as SFmode to DFmode). */
704: DEF_RTL_EXPR(FLOAT_EXTEND, "float_extend", "e", '1')
705: DEF_RTL_EXPR(FLOAT_TRUNCATE, "float_truncate", "e", '1')
706:
707: /* Conversion of fixed point operand to floating point value. */
708: DEF_RTL_EXPR(FLOAT, "float", "e", '1')
709:
710: /* With fixed-point machine mode:
711: Conversion of floating point operand to fixed point value.
712: Value is defined only when the operand's value is an integer.
713: With floating-point machine mode (and operand with same mode):
714: Operand is rounded toward zero to produce an integer value
715: represented in floating point. */
716: DEF_RTL_EXPR(FIX, "fix", "e", '1')
717:
718: /* Conversion of unsigned fixed point operand to floating point value. */
719: DEF_RTL_EXPR(UNSIGNED_FLOAT, "unsigned_float", "e", '1')
720:
721: /* With fixed-point machine mode:
722: Conversion of floating point operand to *unsigned* fixed point value.
723: Value is defined only when the operand's value is an integer. */
724: DEF_RTL_EXPR(UNSIGNED_FIX, "unsigned_fix", "e", '1')
725:
726: /* Absolute value */
727: DEF_RTL_EXPR(ABS, "abs", "e", '1')
728:
729: /* Square root */
730: DEF_RTL_EXPR(SQRT, "sqrt", "e", '1')
731:
732: /* Find first bit that is set.
733: Value is 1 + number of trailing zeros in the arg.,
734: or 0 if arg is 0. */
735: DEF_RTL_EXPR(FFS, "ffs", "e", '1')
736:
737: /* Reference to a signed bit-field of specified size and position.
738: Operand 0 is the memory unit (usually SImode or QImode) which
739: contains the field's first bit. Operand 1 is the width, in bits.
740: Operand 2 is the number of bits in the memory unit before the
741: first bit of this field.
742: If BITS_BIG_ENDIAN is defined, the first bit is the msb and
743: operand 2 counts from the msb of the memory unit.
744: Otherwise, the first bit is the lsb and operand 2 counts from
745: the lsb of the memory unit. */
746: DEF_RTL_EXPR(SIGN_EXTRACT, "sign_extract", "eee", 'b')
747:
748: /* Similar for unsigned bit-field. */
749: DEF_RTL_EXPR(ZERO_EXTRACT, "zero_extract", "eee", 'b')
750:
751: /* For RISC machines. These save memory when splitting insns. */
752:
753: /* HIGH are the high-order bits of a constant expression. */
754: DEF_RTL_EXPR(HIGH, "high", "e", 'o')
755:
756: /* LO_SUM is the sum of a register and the low-order bits
757: of a constant expression. */
758: DEF_RTL_EXPR(LO_SUM, "lo_sum", "ee", 'o')
759:
760: /*
761: Local variables:
762: mode:c
763: version-control: t
764: End:
765: */
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