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1.1 root 1: @c Copyright (C) 1988, 1989, 1992 Free Software Foundation, Inc.
2: @c This is part of the GCC manual.
3: @c For copying conditions, see the file gcc.texi.
4:
5: @ifset INTERNALS
6: @node RTL, Machine Desc, Passes, Top
7: @chapter RTL Representation
8: @cindex RTL representation
9: @cindex representation of RTL
10: @cindex Register Transfer Language (RTL)
11:
12: Most of the work of the compiler is done on an intermediate representation
13: called register transfer language. In this language, the instructions to be
14: output are described, pretty much one by one, in an algebraic form that
15: describes what the instruction does.
16:
17: RTL is inspired by Lisp lists. It has both an internal form, made up of
18: structures that point at other structures, and a textual form that is used
19: in the machine description and in printed debugging dumps. The textual
20: form uses nested parentheses to indicate the pointers in the internal form.
21:
22: @menu
23: * RTL Objects:: Expressions vs vectors vs strings vs integers.
24: * Accessors:: Macros to access expression operands or vector elts.
25: * Flags:: Other flags in an RTL expression.
26: * Machine Modes:: Describing the size and format of a datum.
27: * Constants:: Expressions with constant values.
28: * Regs and Memory:: Expressions representing register contents or memory.
29: * Arithmetic:: Expressions representing arithmetic on other expressions.
30: * Comparisons:: Expressions representing comparison of expressions.
31: * Bit Fields:: Expressions representing bit-fields in memory or reg.
32: * Conversions:: Extending, truncating, floating or fixing.
33: * RTL Declarations:: Declaring volatility, constancy, etc.
34: * Side Effects:: Expressions for storing in registers, etc.
35: * Incdec:: Embedded side-effects for autoincrement addressing.
36: * Assembler:: Representing @code{asm} with operands.
37: * Insns:: Expression types for entire insns.
38: * Calls:: RTL representation of function call insns.
39: * Sharing:: Some expressions are unique; others *must* be copied.
40: @end menu
41:
42: @node RTL Objects, Accessors, RTL, RTL
43: @section RTL Object Types
44: @cindex RTL object types
45:
46: @cindex RTL integers
47: @cindex RTL strings
48: @cindex RTL vectors
49: @cindex RTL expression
50: @cindex RTX (See RTL)
51: RTL uses four kinds of objects: expressions, integers, strings and vectors.
52: Expressions are the most important ones. An RTL expression (``RTX'', for
53: short) is a C structure, but it is usually referred to with a pointer; a
54: type that is given the typedef name @code{rtx}.
55:
56: An integer is simply an @code{int}; their written form uses decimal digits.
57:
58: A string is a sequence of characters. In core it is represented as a
59: @code{char *} in usual C fashion, and it is written in C syntax as well.
60: However, strings in RTL may never be null. If you write an empty string in
61: a machine description, it is represented in core as a null pointer rather
62: than as a pointer to a null character. In certain contexts, these null
63: pointers instead of strings are valid. Within RTL code, strings are most
64: commonly found inside @code{symbol_ref} expressions, but they appear in
65: other contexts in the RTL expressions that make up machine descriptions.
66:
67: A vector contains an arbitrary number of pointers to expressions. The
68: number of elements in the vector is explicitly present in the vector.
69: The written form of a vector consists of square brackets
70: (@samp{[@dots{}]}) surrounding the elements, in sequence and with
71: whitespace separating them. Vectors of length zero are not created;
72: null pointers are used instead.
73:
74: @cindex expression codes
75: @cindex codes, RTL expression
76: @findex GET_CODE
77: @findex PUT_CODE
78: Expressions are classified by @dfn{expression codes} (also called RTX
79: codes). The expression code is a name defined in @file{rtl.def}, which is
80: also (in upper case) a C enumeration constant. The possible expression
81: codes and their meanings are machine-independent. The code of an RTX can
82: be extracted with the macro @code{GET_CODE (@var{x})} and altered with
83: @code{PUT_CODE (@var{x}, @var{newcode})}.
84:
85: The expression code determines how many operands the expression contains,
86: and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
87: by looking at an operand what kind of object it is. Instead, you must know
88: from its context---from the expression code of the containing expression.
89: For example, in an expression of code @code{subreg}, the first operand is
90: to be regarded as an expression and the second operand as an integer. In
91: an expression of code @code{plus}, there are two operands, both of which
92: are to be regarded as expressions. In a @code{symbol_ref} expression,
93: there is one operand, which is to be regarded as a string.
94:
95: Expressions are written as parentheses containing the name of the
96: expression type, its flags and machine mode if any, and then the operands
97: of the expression (separated by spaces).
98:
99: Expression code names in the @samp{md} file are written in lower case,
100: but when they appear in C code they are written in upper case. In this
101: manual, they are shown as follows: @code{const_int}.
102:
103: @cindex (nil)
104: @cindex nil
105: In a few contexts a null pointer is valid where an expression is normally
106: wanted. The written form of this is @code{(nil)}.
107:
108: @node Accessors, Flags, RTL Objects, RTL
109: @section Access to Operands
110: @cindex accessors
111: @cindex access to operands
112: @cindex operand access
113:
114: @cindex RTL format
115: For each expression type @file{rtl.def} specifies the number of contained
116: objects and their kinds, with four possibilities: @samp{e} for expression
117: (actually a pointer to an expression), @samp{i} for integer, @samp{s} for
118: string, and @samp{E} for vector of expressions. The sequence of letters
119: for an expression code is called its @dfn{format}. Thus, the format of
120: @code{subreg} is @samp{ei}.@refill
121:
122: @cindex RTL format characters
123: A few other format characters are used occasionally:
124:
125: @table @code
126: @item u
127: @samp{u} is equivalent to @samp{e} except that it is printed differently
128: in debugging dumps. It is used for pointers to insns.
129:
130: @item n
131: @samp{n} is equivalent to @samp{i} except that it is printed differently
132: in debugging dumps. It is used for the line number or code number of a
133: @code{note} insn.
134:
135: @item S
136: @samp{S} indicates a string which is optional. In the RTL objects in
137: core, @samp{S} is equivalent to @samp{s}, but when the object is read,
138: from an @samp{md} file, the string value of this operand may be omitted.
139: An omitted string is taken to be the null string.
140:
141: @item V
142: @samp{V} indicates a vector which is optional. In the RTL objects in
143: core, @samp{V} is equivalent to @samp{E}, but when the object is read
144: from an @samp{md} file, the vector value of this operand may be omitted.
145: An omitted vector is effectively the same as a vector of no elements.
146:
147: @item 0
148: @samp{0} means a slot whose contents do not fit any normal category.
149: @samp{0} slots are not printed at all in dumps, and are often used in
150: special ways by small parts of the compiler.
151: @end table
152:
153: There are macros to get the number of operands, the format, and the
154: class of an expression code:
155:
156: @table @code
157: @findex GET_RTX_LENGTH
158: @item GET_RTX_LENGTH (@var{code})
159: Number of operands of an RTX of code @var{code}.
160:
161: @findex GET_RTX_FORMAT
162: @item GET_RTX_FORMAT (@var{code})
163: The format of an RTX of code @var{code}, as a C string.
164:
165: @findex GET_RTX_CLASS
166: @cindex classes of RTX codes
167: @item GET_RTX_CLASS (@var{code})
168: A single character representing the type of RTX operation that code
169: @var{code} performs.
170:
171: The following classes are defined:
172:
173: @table @code
174: @item o
175: An RTX code that represents an actual object, such as @code{reg} or
176: @code{mem}. @code{subreg} is not in this class.
177:
178: @item <
179: An RTX code for a comparison. The codes in this class are
180: @code{NE}, @code{EQ}, @code{LE}, @code{LT}, @code{GE}, @code{GT},
181: @code{LEU}, @code{LTU}, @code{GEU}, @code{GTU}.@refill
182:
183: @item 1
184: An RTX code for a unary arithmetic operation, such as @code{neg}.
185:
186: @item c
187: An RTX code for a commutative binary operation, other than @code{NE}
188: and @code{EQ} (which have class @samp{<}).
189:
190: @item 2
191: An RTX code for a noncommutative binary operation, such as @code{MINUS}.
192:
193: @item b
194: An RTX code for a bitfield operation (@code{ZERO_EXTRACT} and
195: @code{SIGN_EXTRACT}).
196:
197: @item 3
198: An RTX code for other three input operations, such as @code{IF_THEN_ELSE}.
199:
200: @item i
201: An RTX code for a machine insn (@code{INSN}, @code{JUMP_INSN}, and
202: @code{CALL_INSN}).@refill
203:
204: @item m
205: An RTX code for something that matches in insns, such as @code{MATCH_DUP}.
206:
207: @item x
208: All other RTX codes.
209: @end table
210: @end table
211:
212: @findex XEXP
213: @findex XINT
214: @findex XSTR
215: Operands of expressions are accessed using the macros @code{XEXP},
216: @code{XINT} and @code{XSTR}. Each of these macros takes two arguments: an
217: expression-pointer (RTX) and an operand number (counting from zero).
218: Thus,@refill
219:
220: @example
221: XEXP (@var{x}, 2)
222: @end example
223:
224: @noindent
225: accesses operand 2 of expression @var{x}, as an expression.
226:
227: @example
228: XINT (@var{x}, 2)
229: @end example
230:
231: @noindent
232: accesses the same operand as an integer. @code{XSTR}, used in the same
233: fashion, would access it as a string.
234:
235: Any operand can be accessed as an integer, as an expression or as a string.
236: You must choose the correct method of access for the kind of value actually
237: stored in the operand. You would do this based on the expression code of
238: the containing expression. That is also how you would know how many
239: operands there are.
240:
241: For example, if @var{x} is a @code{subreg} expression, you know that it has
242: two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
243: and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
244: would get the address of the expression operand but cast as an integer;
245: that might occasionally be useful, but it would be cleaner to write
246: @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
247: compile without error, and would return the second, integer operand cast as
248: an expression pointer, which would probably result in a crash when
249: accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
250: but this will access memory past the end of the expression with
251: unpredictable results.@refill
252:
253: Access to operands which are vectors is more complicated. You can use the
254: macro @code{XVEC} to get the vector-pointer itself, or the macros
255: @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
256: vector.
257:
258: @table @code
259: @findex XVEC
260: @item XVEC (@var{exp}, @var{idx})
261: Access the vector-pointer which is operand number @var{idx} in @var{exp}.
262:
263: @findex XVECLEN
264: @item XVECLEN (@var{exp}, @var{idx})
265: Access the length (number of elements) in the vector which is
266: in operand number @var{idx} in @var{exp}. This value is an @code{int}.
267:
268: @findex XVECEXP
269: @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
270: Access element number @var{eltnum} in the vector which is
271: in operand number @var{idx} in @var{exp}. This value is an RTX.
272:
273: It is up to you to make sure that @var{eltnum} is not negative
274: and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
275: @end table
276:
277: All the macros defined in this section expand into lvalues and therefore
278: can be used to assign the operands, lengths and vector elements as well as
279: to access them.
280:
281: @node Flags, Machine Modes, Accessors, RTL
282: @section Flags in an RTL Expression
283: @cindex flags in RTL expression
284:
285: RTL expressions contain several flags (one-bit bit-fields) that are used
286: in certain types of expression. Most often they are accessed with the
287: following macros:
288:
289: @table @code
290: @findex MEM_VOLATILE_P
291: @cindex @code{mem} and @samp{/v}
292: @cindex @code{volatil}, in @code{mem}
293: @cindex @samp{/v} in RTL dump
294: @item MEM_VOLATILE_P (@var{x})
295: In @code{mem} expressions, nonzero for volatile memory references.
296: Stored in the @code{volatil} field and printed as @samp{/v}.
297:
298: @findex MEM_IN_STRUCT_P
299: @cindex @code{mem} and @samp{/s}
300: @cindex @code{in_struct}, in @code{mem}
301: @cindex @samp{/s} in RTL dump
302: @item MEM_IN_STRUCT_P (@var{x})
303: In @code{mem} expressions, nonzero for reference to an entire
304: structure, union or array, or to a component of one. Zero for
305: references to a scalar variable or through a pointer to a scalar.
306: Stored in the @code{in_struct} field and printed as @samp{/s}.
307:
308: @findex REG_LOOP_TEST_P
309: @cindex @code{reg} and @samp{/s}
310: @cindex @code{in_struct}, in @code{reg}
311: @item REG_LOOP_TEST_P
312: In @code{reg} expressions, nonzero if this register's entire life is
313: contained in the exit test code for some loop. Stored in the
314: @code{in_struct} field and printed as @samp{/s}.
315:
316: @findex REG_USERVAR_P
317: @cindex @code{reg} and @samp{/v}
318: @cindex @code{volatil}, in @code{reg}
319: @item REG_USERVAR_P (@var{x})
320: In a @code{reg}, nonzero if it corresponds to a variable present in
321: the user's source code. Zero for temporaries generated internally by
322: the compiler. Stored in the @code{volatil} field and printed as
323: @samp{/v}.
324:
325: @cindex @samp{/i} in RTL dump
326: @findex REG_FUNCTION_VALUE_P
327: @cindex @code{reg} and @samp{/i}
328: @cindex @code{integrated}, in @code{reg}
329: @item REG_FUNCTION_VALUE_P (@var{x})
330: Nonzero in a @code{reg} if it is the place in which this function's
331: value is going to be returned. (This happens only in a hard
332: register.) Stored in the @code{integrated} field and printed as
333: @samp{/i}.
334:
335: The same hard register may be used also for collecting the values of
336: functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
337: in this kind of use.
338:
339: @findex RTX_UNCHANGING_P
340: @cindex @code{reg} and @samp{/u}
341: @cindex @code{mem} and @samp{/u}
342: @cindex @code{unchanging}, in @code{reg} and @code{mem}
343: @cindex @samp{/u} in RTL dump
344: @item RTX_UNCHANGING_P (@var{x})
345: Nonzero in a @code{reg} or @code{mem} if the value is not changed.
346: (This flag is not set for memory references via pointers to constants.
347: Such pointers only guarantee that the object will not be changed
348: explicitly by the current function. The object might be changed by
349: other functions or by aliasing.) Stored in the
350: @code{unchanging} field and printed as @samp{/u}.
351:
352: @findex RTX_INTEGRATED_P
353: @cindex @code{integrated}, in @code{insn}
354: @item RTX_INTEGRATED_P (@var{insn})
355: Nonzero in an insn if it resulted from an in-line function call.
356: Stored in the @code{integrated} field and printed as @samp{/i}. This
357: may be deleted; nothing currently depends on it.
358:
359: @findex SYMBOL_REF_USED
360: @cindex @code{used}, in @code{symbol_ref}
361: @item SYMBOL_REF_USED (@var{x})
362: In a @code{symbol_ref}, indicates that @var{x} has been used. This is
363: normally only used to ensure that @var{x} is only declared external
364: once. Stored in the @code{used} field.
365:
366: @findex SYMBOL_REF_FLAG
367: @cindex @code{symbol_ref} and @samp{/v}
368: @cindex @code{volatil}, in @code{symbol_ref}
369: @item SYMBOL_REF_FLAG (@var{x})
370: In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
371: Stored in the @code{volatil} field and printed as @samp{/v}.
372:
373: @findex LABEL_OUTSIDE_LOOP_P
374: @cindex @code{label_ref} and @samp{/s}
375: @cindex @code{in_struct}, in @code{label_ref}
376: @item LABEL_OUTSIDE_LOOP_P
377: In @code{label_ref} expressions, nonzero if this is a reference to a
378: label that is outside the innermost loop containing the reference to the
379: label. Stored in the @code{in_struct} field and printed as @samp{/s}.
380:
381: @findex INSN_DELETED_P
382: @cindex @code{volatil}, in @code{insn}
383: @item INSN_DELETED_P (@var{insn})
384: In an insn, nonzero if the insn has been deleted. Stored in the
385: @code{volatil} field and printed as @samp{/v}.
386:
387: @findex INSN_ANNULLED_BRANCH_P
388: @cindex @code{insn} and @samp{/u}
389: @cindex @code{unchanging}, in @code{insn}
390: @item INSN_ANNULLED_BRANCH_P (@var{insn})
391: In an @code{insn} in the delay slot of a branch insn, indicates that an
392: annulling branch should be used. See the discussion under
393: @code{sequence} below. Stored in the @code{unchanging} field and printed
394: as @samp{/u}.
395:
396: @findex INSN_FROM_TARGET_P
397: @cindex @code{insn} and @samp{/s}
398: @cindex @code{in_struct}, in @code{insn}
399: @cindex @samp{/s} in RTL dump
400: @item INSN_FROM_TARGET_P (@var{insn})
401: In an @code{insn} in a delay slot of a branch, indicates that the insn
402: is from the target of the branch. If the branch insn has
403: @code{INSN_ANNULLED_BRANCH_P} set, this insn should only be executed if
404: the branch is taken. For annulled branches with this bit clear, the
405: insn should be executed only if the branch is not taken. Stored in the
406: @code{in_struct} field and printed as @samp{/s}.
407:
408: @findex CONSTANT_POOL_ADDRESS_P
409: @cindex @code{symbol_ref} and @samp{/u}
410: @cindex @code{unchanging}, in @code{symbol_ref}
411: @item CONSTANT_POOL_ADDRESS_P (@var{x})
412: Nonzero in a @code{symbol_ref} if it refers to part of the current
413: function's ``constants pool''. These are addresses close to the
414: beginning of the function, and GNU CC assumes they can be addressed
415: directly (perhaps with the help of base registers). Stored in the
416: @code{unchanging} field and printed as @samp{/u}.
417:
418: @findex CONST_CALL_P
419: @cindex @code{call_insn} and @samp{/u}
420: @cindex @code{unchanging}, in @code{call_insn}
421: @item CONST_CALL_P (@var{x})
422: In a @code{call_insn}, indicates that the insn represents a call to a const
423: function. Stored in the @code{unchanging} field and printed as @samp{/u}.
424:
425: @findex LABEL_PRESERVE_P
426: @cindex @code{code_label} and @samp{/i}
427: @cindex @code{in_struct}, in @code{code_label}
428: @item LABEL_PRESERVE_P (@var{x})
429: In a @code{code_label}, indicates that the label can never be deleted.
430: Labels referenced by a a non-local goto will have this bit set. Stored
431: in the @code{in_struct} field and printed as @samp{/s}.
432:
433: @findex SCHED_GROUP_P
434: @cindex @code{insn} and @samp{/i}
435: @cindex @code{in_struct}, in @code{insn}
436: @item SCHED_GROUP_P (@var{insn})
437: During instruction scheduling, in an insn, indicates that the previous insn
438: must be scheduled together with this insn. This is used to ensure that
439: certain groups of instructions will not be split up by the instruction
440: scheduling pass, for example, @code{use} insns before a @code{call_insn} may
441: not be separated from the @code{call_insn}. Stored in the @code{in_struct}
442: field and printed as @samp{/s}.
443: @end table
444:
445: These are the fields which the above macros refer to:
446:
447: @table @code
448: @findex used
449: @item used
450: Normally, this flag is used only momentarily, at the end of RTL
451: generation for a function, to count the number of times an expression
452: appears in insns. Expressions that appear more than once are copied,
453: according to the rules for shared structure (@pxref{Sharing}).
454:
455: In a @code{symbol_ref}, it indicates that an external declaration for
456: the symbol has already been written.
457:
458: In a @code{reg}, it is used by the leaf register renumbering code to ensure
459: that each register is only renumbered once.
460:
461: @findex volatil
462: @item volatil
463: This flag is used in @code{mem},@code{symbol_ref} and @code{reg}
464: expressions and in insns. In RTL dump files, it is printed as
465: @samp{/v}.
466:
467: @cindex volatile memory references
468: In a @code{mem} expression, it is 1 if the memory reference is volatile.
469: Volatile memory references may not be deleted, reordered or combined.
470:
471: In a @code{symbol_ref} expression, it is used for machine-specific
472: purposes.
473:
474: In a @code{reg} expression, it is 1 if the value is a user-level variable.
475: 0 indicates an internal compiler temporary.
476:
477: In an insn, 1 means the insn has been deleted.
478:
479: @findex in_struct
480: @item in_struct
481: In @code{mem} expressions, it is 1 if the memory datum referred to is
482: all or part of a structure or array; 0 if it is (or might be) a scalar
483: variable. A reference through a C pointer has 0 because the pointer
484: might point to a scalar variable. This information allows the compiler
485: to determine something about possible cases of aliasing.
486:
487: In an insn in the delay slot of a branch, 1 means that this insn is from
488: the target of the branch.
489:
490: During instruction scheduling, in an insn, 1 means that this insn must be
491: scheduled as part of a group together with the previous insn.
492:
493: In @code{reg} expressions, it is 1 if the register has its entire life
494: contained within the test expression of some loopl.
495:
496: In @code{label_ref} expressions, 1 means that the referenced label is
497: outside the innermost loop containing the insn in which the @code{label_ref}
498: was found.
499:
500: In @code{code_label} expressions, it is 1 if the label may never be deleted.
501: This is used for labels which are the target of non-local gotos.
502:
503: In an RTL dump, this flag is represented as @samp{/s}.
504:
505: @findex unchanging
506: @item unchanging
507: In @code{reg} and @code{mem} expressions, 1 means
508: that the value of the expression never changes.
509:
510: In an insn, 1 means that this is an annulling branch.
511:
512: In a @code{symbol_ref} expression, 1 means that this symbol addresses
513: something in the per-function constants pool.
514:
515: In a @code{call_insn}, 1 means that this instruction is a call to a
516: const function.
517:
518: In an RTL dump, this flag is represented as @samp{/u}.
519:
520: @findex integrated
521: @item integrated
522: In some kinds of expressions, including insns, this flag means the
523: rtl was produced by procedure integration.
524:
525: In a @code{reg} expression, this flag indicates the register
526: containing the value to be returned by the current function. On
527: machines that pass parameters in registers, the same register number
528: may be used for parameters as well, but this flag is not set on such
529: uses.
530: @end table
531:
532: @node Machine Modes, Constants, Flags, RTL
533: @section Machine Modes
534: @cindex machine modes
535:
536: @findex enum machine_mode
537: A machine mode describes a size of data object and the representation used
538: for it. In the C code, machine modes are represented by an enumeration
539: type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
540: expression has room for a machine mode and so do certain kinds of tree
541: expressions (declarations and types, to be precise).
542:
543: In debugging dumps and machine descriptions, the machine mode of an RTL
544: expression is written after the expression code with a colon to separate
545: them. The letters @samp{mode} which appear at the end of each machine mode
546: name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
547: expression with machine mode @code{SImode}. If the mode is
548: @code{VOIDmode}, it is not written at all.
549:
550: Here is a table of machine modes. The term ``byte'' below refers to an
551: object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
552:
553: @table @code
554: @findex QImode
555: @item QImode
556: ``Quarter-Integer'' mode represents a single byte treated as an integer.
557:
558: @findex HImode
559: @item HImode
560: ``Half-Integer'' mode represents a two-byte integer.
561:
562: @findex PSImode
563: @item PSImode
564: ``Partial Single Integer'' mode represents an integer which occupies
565: four bytes but which doesn't really use all four. On some machines,
566: this is the right mode to use for pointers.
567:
568: @findex SImode
569: @item SImode
570: ``Single Integer'' mode represents a four-byte integer.
571:
572: @findex PDImode
573: @item PDImode
574: ``Partial Double Integer'' mode represents an integer which occupies
575: eight bytes but which doesn't really use all eight. On some machines,
576: this is the right mode to use for certain pointers.
577:
578: @findex DImode
579: @item DImode
580: ``Double Integer'' mode represents an eight-byte integer.
581:
582: @findex TImode
583: @item TImode
584: ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
585:
586: @findex SFmode
587: @item SFmode
588: ``Single Floating'' mode represents a single-precision (four byte) floating
589: point number.
590:
591: @findex DFmode
592: @item DFmode
593: ``Double Floating'' mode represents a double-precision (eight byte) floating
594: point number.
595:
596: @findex XFmode
597: @item XFmode
598: ``Extended Floating'' mode represents a triple-precision (twelve byte)
599: floating point number. This mode is used for IEEE extended floating
600: point.
601:
602: @findex TFmode
603: @item TFmode
604: ``Tetra Floating'' mode represents a quadruple-precision (sixteen byte)
605: floating point number.
606:
607: @findex CCmode
608: @item CCmode
609: ``Condition Code'' mode represents the value of a condition code, which
610: is a machine-specific set of bits used to represent the result of a
611: comparison operation. Other machine-specific modes may also be used for
612: the condition code. These modes are not used on machines that use
613: @code{cc0} (see @pxref{Condition Code}).
614:
615: @findex BLKmode
616: @item BLKmode
617: ``Block'' mode represents values that are aggregates to which none of
618: the other modes apply. In RTL, only memory references can have this mode,
619: and only if they appear in string-move or vector instructions. On machines
620: which have no such instructions, @code{BLKmode} will not appear in RTL.
621:
622: @findex VOIDmode
623: @item VOIDmode
624: Void mode means the absence of a mode or an unspecified mode.
625: For example, RTL expressions of code @code{const_int} have mode
626: @code{VOIDmode} because they can be taken to have whatever mode the context
627: requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
628: the absence of any mode.
629:
630: @findex SCmode
631: @findex DCmode
632: @findex XCmode
633: @findex TCmode
634: @item SCmode, DCmode, XCmode, TCmode
635: These modes stand for a complex number represented as a pair of
636: floating point values. The values are in @code{SFmode}, @code{DFmode},
637: @code{XFmode}, and @code{TFmode}, respectively. Since C does not
638: support complex numbers, these machine modes are only partially
639: implemented.
640: @end table
641:
642: The machine description defines @code{Pmode} as a C macro which expands
643: into the machine mode used for addresses. Normally this is the mode
644: whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
645:
646: The only modes which a machine description @i{must} support are
647: @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
648: @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
649: The compiler will attempt to use @code{DImode} for 8-byte structures and
650: unions, but this can be prevented by overriding the definition of
651: @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
652: use @code{TImode} for 16-byte structures and unions. Likewise, you can
653: arrange for the C type @code{short int} to avoid using @code{HImode}.
654:
655: @cindex mode classes
656: Very few explicit references to machine modes remain in the compiler and
657: these few references will soon be removed. Instead, the machine modes
658: are divided into mode classes. These are represented by the enumeration
659: type @code{enum mode_class} defined in @file{machmode.h}. The possible
660: mode classes are:
661:
662: @table @code
663: @findex MODE_INT
664: @item MODE_INT
665: Integer modes. By default these are @code{QImode}, @code{HImode},
666: @code{SImode}, @code{DImode}, and @code{TImode}.
667:
668: @findex MODE_PARTIAL_INT
669: @item MODE_PARTIAL_INT
670: The ``partial integer'' modes, @code{PSImode} and @code{PDImode}.
671:
672: @findex MODE_FLOAT
673: @item MODE_FLOAT
674: floating point modes. By default these are @code{SFmode}, @code{DFmode},
675: @code{XFmode} and @code{TFmode}.
676:
677: @findex MODE_COMPLEX_INT
678: @item MODE_COMPLEX_INT
679: Complex integer modes. (These are not currently implemented).
680:
681: @findex MODE_COMPLEX_FLOAT
682: @item MODE_COMPLEX_FLOAT
683: Complex floating point modes. By default these are @code{SCmode},
684: @code{DCmode}, @code{XCmode}, and @code{TCmode}.
685:
686: @findex MODE_FUNCTION
687: @item MODE_FUNCTION
688: Algol or Pascal function variables including a static chain.
689: (These are not currently implemented).
690:
691: @findex MODE_CC
692: @item MODE_CC
693: Modes representing condition code values. These are @code{CCmode} plus
694: any modes listed in the @code{EXTRA_CC_MODES} macro. @xref{Jump Patterns},
695: also see @ref{Condition Code}.
696:
697: @findex MODE_RANDOM
698: @item MODE_RANDOM
699: This is a catchall mode class for modes which don't fit into the above
700: classes. Currently @code{VOIDmode} and @code{BLKmode} are in
701: @code{MODE_RANDOM}.
702: @end table
703:
704: Here are some C macros that relate to machine modes:
705:
706: @table @code
707: @findex GET_MODE
708: @item GET_MODE (@var{x})
709: Returns the machine mode of the RTX @var{x}.
710:
711: @findex PUT_MODE
712: @item PUT_MODE (@var{x}, @var{newmode})
713: Alters the machine mode of the RTX @var{x} to be @var{newmode}.
714:
715: @findex NUM_MACHINE_MODES
716: @item NUM_MACHINE_MODES
717: Stands for the number of machine modes available on the target
718: machine. This is one greater than the largest numeric value of any
719: machine mode.
720:
721: @findex GET_MODE_NAME
722: @item GET_MODE_NAME (@var{m})
723: Returns the name of mode @var{m} as a string.
724:
725: @findex GET_MODE_CLASS
726: @item GET_MODE_CLASS (@var{m})
727: Returns the mode class of mode @var{m}.
728:
729: @findex GET_MODE_WIDER_MODE
730: @item GET_MODE_WIDER_MODE (@var{m})
731: Returns the next wider natural mode. E.g.,
732: @code{GET_WIDER_MODE(QImode)} returns @code{HImode}.
733:
734: @findex GET_MODE_SIZE
735: @item GET_MODE_SIZE (@var{m})
736: Returns the size in bytes of a datum of mode @var{m}.
737:
738: @findex GET_MODE_BITSIZE
739: @item GET_MODE_BITSIZE (@var{m})
740: Returns the size in bits of a datum of mode @var{m}.
741:
742: @findex GET_MODE_MASK
743: @item GET_MODE_MASK (@var{m})
744: Returns a bitmask containing 1 for all bits in a word that fit within
745: mode @var{m}. This macro can only be used for modes whose bitsize is
746: less than or equal to @code{HOST_BITS_PER_INT}.
747:
748: @findex GET_MODE_ALIGNMENT
749: @item GET_MODE_ALIGNMENT (@var{m)})
750: Return the required alignment, in bits, for an object of mode @var{m}.
751:
752: @findex GET_MODE_UNIT_SIZE
753: @item GET_MODE_UNIT_SIZE (@var{m})
754: Returns the size in bytes of the subunits of a datum of mode @var{m}.
755: This is the same as @code{GET_MODE_SIZE} except in the case of complex
756: modes. For them, the unit size is the size of the real or imaginary
757: part.
758:
759: @findex GET_MODE_NUNITS
760: @item GET_MODE_NUNITS (@var{m})
761: Returns the number of units contained in a mode, i.e.,
762: @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
763:
764: @findex GET_CLASS_NARROWEST_MODE
765: @item GET_CLASS_NARROWEST_MODE (@var{c})
766: Returns the narrowest mode in mode class @var{c}.
767: @end table
768:
769: @findex byte_mode
770: @findex word_mode
771: The global variables @code{byte_mode} and @code{word_mode} contain
772: modes whose classes are @code{MODE_INT} and whose bitsizes are
773: @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
774: machines, these are @code{QImode} and @code{SImode}, respectively.
775:
776: @node Constants, Regs and Memory, Machine Modes, RTL
777: @section Constant Expression Types
778: @cindex RTL constants
779: @cindex RTL constant expression types
780:
781: The simplest RTL expressions are those that represent constant values.
782:
783: @table @code
784: @findex const_int
785: @item (const_int @var{i})
786: This type of expression represents the integer value @var{i}. @var{i}
787: is customarily accessed with the macro @code{INTVAL} as in
788: @code{INTVAL (@var{exp})}, which is equivalent to @code{XINT (@var{exp}, 0)}.
789:
790: Keep in mind that the result of @code{INTVAL} is an integer on the host
791: machine. If the host machine has more bits in an @code{int} than the
792: target machine has in the mode in which the constant will be used, then
793: some of the bits you get from @code{INTVAL} will be superfluous. In
794: many cases, for proper results, you must carefully disregard the values
795: of those bits.
796:
797: @findex const0_rtx
798: @findex const1_rtx
799: @findex const2_rtx
800: @findex constm1_rtx
801: There is only one expression object for the integer value zero; it is
802: the value of the variable @code{const0_rtx}. Likewise, the only
803: expression for integer value one is found in @code{const1_rtx}, the only
804: expression for integer value two is found in @code{const2_rtx}, and the
805: only expression for integer value negative one is found in
806: @code{constm1_rtx}. Any attempt to create an expression of code
807: @code{const_int} and value zero, one, two or negative one will return
808: @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
809: @code{constm1_rtx} as appropriate.@refill
810:
811: @findex const_true_rtx
812: Similarly, there is only one object for the integer whose value is
813: @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
814: @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
815: @code{const1_rtx} will point to the same object. If
816: @code{STORE_FLAG_VALUE} is -1, @code{const_true_rtx} and
817: @code{constm1_rtx} will point to the same object.@refill
818:
819: @findex const_double
820: @item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
821: Represents either a floating-point constant of mode @var{m} or an
822: integer constant that is too large to fit into @code{HOST_BITS_PER_INT}
823: bits but small enough to fit within twice that number of bits (GNU CC
824: does not provide a mechanism to represent even larger constants). In
825: the latter case, @var{m} will be @code{VOIDmode}.
826:
827: @findex CONST_DOUBLE_MEM
828: @findex CONST_DOUBLE_CHAIN
829: @var{addr} is used to contain the @code{mem} expression that corresponds
830: to the location in memory that at which the constant can be found. If
831: it has not been allocated a memory location, but is on the chain of all
832: @code{const_double} expressions in this compilation (maintained using an
833: undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
834: on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
835: customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
836: chain field via @code{CONST_DOUBLE_CHAIN}.@refill
837:
838: @findex CONST_DOUBLE_LOW
839: If @var{m} is @code{VOIDmode}, the bit of the value are stored in
840: @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
841: @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
842:
843: If the constant is floating point (either single or double precision),
844: then the number of integers used to store the value depends on the size
845: of @code{REAL_VALUE_TYPE} (@pxref{Cross-compilation}). The integers
846: represent a @code{double}. To convert them to a @code{double}, do
847:
848: @example
849: union real_extract u;
850: bcopy (&CONST_DOUBLE_LOW (x), &u, sizeof u);
851: @end example
852:
853: @noindent
854: and then refer to @code{u.d}.
855:
856: @findex CONST0_RTX
857: @findex CONST1_RTX
858: @findex CONST2_RTX
859: The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
860: value 0 in mode @var{mode}. If mode @var{mode} is of mode class
861: @code{MODE_INT}, it returns @code{const0_rtx}. Otherwise, it returns a
862: @code{CONST_DOUBLE} expression in mode @var{mode}. Similarly, the macro
863: @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
864: mode @var{mode} and similarly for @code{CONST2_RTX}.
865:
866: @findex const_string
867: @item (const_string @var{str})
868: Represents a constant string with value @var{str}. Currently this is
869: used only for insn attributes (@pxref{Insn Attributes}) since constant
870: strings in C are placed in memory.
871:
872: @findex symbol_ref
873: @item (symbol_ref @var{symbol})
874: Represents the value of an assembler label for data. @var{symbol} is
875: a string that describes the name of the assembler label. If it starts
876: with a @samp{*}, the label is the rest of @var{symbol} not including
877: the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
878: with @samp{_}.
879:
880: @findex label_ref
881: @item (label_ref @var{label})
882: Represents the value of an assembler label for code. It contains one
883: operand, an expression, which must be a @code{code_label} that appears
884: in the instruction sequence to identify the place where the label
885: should go.
886:
887: The reason for using a distinct expression type for code label
888: references is so that jump optimization can distinguish them.
889:
890: @item (const:@var{m} @var{exp})
891: Represents a constant that is the result of an assembly-time
892: arithmetic computation. The operand, @var{exp}, is an expression that
893: contains only constants (@code{const_int}, @code{symbol_ref} and
894: @code{label_ref} expressions) combined with @code{plus} and
895: @code{minus}. However, not all combinations are valid, since the
896: assembler cannot do arbitrary arithmetic on relocatable symbols.
897:
898: @var{m} should be @code{Pmode}.
899:
900: @findex high
901: @item (high:@var{m} @var{exp})
902: Represents the high-order bits of @var{exp}, usually a
903: @code{symbol_ref}. The number of bits is machine-dependent and is
904: normally the number of bits specified in an instruction that initializes
905: the high order bits of a register. It is used with @code{lo_sum} to
906: represent the typical two-instruction sequence used in RISC machines to
907: reference a global memory location.
908:
909: @var{m} should be @code{Pmode}.
910: @end table
911:
912: @node Regs and Memory, Arithmetic, Constants, RTL
913: @section Registers and Memory
914: @cindex RTL register expressions
915: @cindex RTL memory expressions
916:
917: Here are the RTL expression types for describing access to machine
918: registers and to main memory.
919:
920: @table @code
921: @findex reg
922: @cindex hard registers
923: @cindex pseudo registers
924: @item (reg:@var{m} @var{n})
925: For small values of the integer @var{n} (less than
926: @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
927: register number @var{n}: a @dfn{hard register}. For larger values of
928: @var{n}, it stands for a temporary value or @dfn{pseudo register}.
929: The compiler's strategy is to generate code assuming an unlimited
930: number of such pseudo registers, and later convert them into hard
931: registers or into memory references.
932:
933: @var{m} is the machine mode of the reference. It is necessary because
934: machines can generally refer to each register in more than one mode.
935: For example, a register may contain a full word but there may be
936: instructions to refer to it as a half word or as a single byte, as
937: well as instructions to refer to it as a floating point number of
938: various precisions.
939:
940: Even for a register that the machine can access in only one mode,
941: the mode must always be specified.
942:
943: The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
944: description, since the number of hard registers on the machine is an
945: invariant characteristic of the machine. Note, however, that not
946: all of the machine registers must be general registers. All the
947: machine registers that can be used for storage of data are given
948: hard register numbers, even those that can be used only in certain
949: instructions or can hold only certain types of data.
950:
951: A hard register may be accessed in various modes throughout one
952: function, but each pseudo register is given a natural mode
953: and is accessed only in that mode. When it is necessary to describe
954: an access to a pseudo register using a nonnatural mode, a @code{subreg}
955: expression is used.
956:
957: A @code{reg} expression with a machine mode that specifies more than
958: one word of data may actually stand for several consecutive registers.
959: If in addition the register number specifies a hardware register, then
960: it actually represents several consecutive hardware registers starting
961: with the specified one.
962:
963: Each pseudo register number used in a function's RTL code is
964: represented by a unique @code{reg} expression.
965:
966: @findex FIRST_VIRTUAL_REGISTER
967: @findex LAST_VIRTUAL_REGISTER
968: Some pseudo register numbers, those within the range of
969: @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
970: appear during the RTL generation phase and are eliminated before the
971: optimization phases. These represent locations in the stack frame that
972: cannot be determined until RTL generation for the function has been
973: completed. The following virtual register numbers are defined:
974:
975: @table @code
976: @findex VIRTUAL_INCOMING_ARGS_REGNUM
977: @item VIRTUAL_INCOMING_ARGS_REGNUM
978: This points to the first word of the incoming arguments passed on the
979: stack. Normally these arguments are placed there by the caller, but the
980: callee may have pushed some arguments that were previously passed in
981: registers.
982:
983: @cindex @code{FIRST_PARM_OFFSET} and virtual registers
984: @cindex @code{ARG_POINTER_REGNUM} and virtual registers
985: When RTL generation is complete, this virtual register is replaced
986: by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
987: value of @code{FIRST_PARM_OFFSET}.
988:
989: @findex VIRTUAL_STACK_VARS_REGNUM
990: @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
991: @item VIRTUAL_STACK_VARS_REGNUM
992: If @code{FRAME_GROWS_DOWNWARDS} is defined, this points to immediately
993: above the first variable on the stack. Otherwise, it points to the
994: first variable on the stack.
995:
996: @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
997: @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
998: It is replaced with the sum of the register given by
999: @code{FRAME_POINTER_REGNUM} and the value @code{STARTING_FRAME_OFFSET}.
1000:
1001: @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1002: @item VIRTUAL_STACK_DYNAMIC_REGNUM
1003: This points to the location of dynamically allocated memory on the stack
1004: immediately after the stack pointer has been adjusted by the amount of
1005: memory desired.
1006:
1007: @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1008: @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1009: It is replaced by the sum of the register given by
1010: @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1011:
1012: @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1013: @item VIRTUAL_OUTGOING_ARGS_REGNUM
1014: This points to the location in the stack at which outgoing arguments
1015: should be written when the stack is pre-pushed (arguments pushed using
1016: push insns should always use @code{STACK_POINTER_REGNUM}).
1017:
1018: @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1019: It is replaced by the sum of the register given by
1020: @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1021: @end table
1022:
1023: @findex subreg
1024: @item (subreg:@var{m} @var{reg} @var{wordnum})
1025: @code{subreg} expressions are used to refer to a register in a machine
1026: mode other than its natural one, or to refer to one register of
1027: a multi-word @code{reg} that actually refers to several registers.
1028:
1029: Each pseudo-register has a natural mode. If it is necessary to
1030: operate on it in a different mode---for example, to perform a fullword
1031: move instruction on a pseudo-register that contains a single
1032: byte---the pseudo-register must be enclosed in a @code{subreg}. In
1033: such a case, @var{wordnum} is zero.
1034:
1035: Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
1036: case it is restricting consideration to only the bits of @var{reg} that
1037: are in @var{m}. However, sometimes @var{m} is wider than the mode of
1038: @var{reg}. These @code{subreg} expressions are often called
1039: @dfn{paradoxical}. They are used in cases where we want to refer to an
1040: object in a wider mode but do not care what value the additional bits
1041: have. The reload pass ensures that paradoxical references are only
1042: made to hard registers.
1043:
1044: The other use of @code{subreg} is to extract the individual registers of
1045: a multi-register value. Machine modes such as @code{DImode} and
1046: @code{TImode} can indicate values longer than a word, values which
1047: usually require two or more consecutive registers. To access one of the
1048: registers, use a @code{subreg} with mode @code{SImode} and a
1049: @var{wordnum} that says which register.
1050:
1051: @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1052: The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
1053: that word number zero is the most significant part; otherwise, it is
1054: the least significant part.
1055:
1056: @cindex combiner pass
1057: @cindex reload pass
1058: @cindex @code{subreg}, special reload handling
1059: Between the combiner pass and the reload pass, it is possible to have a
1060: paradoxical @code{subreg} which contains a @code{mem} instead of a
1061: @code{reg} as its first operand. After the reload pass, it is also
1062: possible to have a non-paradoxical @code{subreg} which contains a
1063: @code{mem}; this usually occurs when the @code{mem} is a stack slot
1064: which replaced a pseudo register.
1065:
1066: Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
1067: using a @code{subreg}. On some machines the most significant part of a
1068: @code{DFmode} value does not have the same format as a single-precision
1069: floating value.
1070:
1071: It is also not valid to access a single word of a multi-word value in a
1072: hard register when less registers can hold the value than would be
1073: expected from its size. For example, some 32-bit machines have
1074: floating-point registers that can hold an entire @code{DFmode} value.
1075: If register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)}
1076: would be invalid because there is no way to convert that reference to
1077: a single machine register. The reload pass prevents @code{subreg}
1078: expressions such as these from being formed.
1079:
1080: @findex SUBREG_REG
1081: @findex SUBREG_WORD
1082: The first operand of a @code{subreg} expression is customarily accessed
1083: with the @code{SUBREG_REG} macro and the second operand is customarily
1084: accessed with the @code{SUBREG_WORD} macro.
1085:
1086: @findex scratch
1087: @cindex scratch operands
1088: @item (scratch:@var{m})
1089: This represents a scratch register that will be required for the
1090: execution of a single instruction and not used subsequently. It is
1091: converted into a @code{reg} by either the local register allocator or
1092: the reload pass.
1093:
1094: @code{scratch} is usually present inside a @code{clobber} operation
1095: (@pxref{Side Effects}).
1096:
1097: @findex cc0
1098: @cindex condition code register
1099: @item (cc0)
1100: This refers to the machine's condition code register. It has no
1101: operands and may not have a machine mode. There are two ways to use it:
1102:
1103: @itemize @bullet
1104: @item
1105: To stand for a complete set of condition code flags. This is best on
1106: most machines, where each comparison sets the entire series of flags.
1107:
1108: With this technique, @code{(cc0)} may be validly used in only two
1109: contexts: as the destination of an assignment (in test and compare
1110: instructions) and in comparison operators comparing against zero
1111: (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1112:
1113: @item
1114: To stand for a single flag that is the result of a single condition.
1115: This is useful on machines that have only a single flag bit, and in
1116: which comparison instructions must specify the condition to test.
1117:
1118: With this technique, @code{(cc0)} may be validly used in only two
1119: contexts: as the destination of an assignment (in test and compare
1120: instructions) where the source is a comparison operator, and as the
1121: first operand of @code{if_then_else} (in a conditional branch).
1122: @end itemize
1123:
1124: @findex cc0_rtx
1125: There is only one expression object of code @code{cc0}; it is the
1126: value of the variable @code{cc0_rtx}. Any attempt to create an
1127: expression of code @code{cc0} will return @code{cc0_rtx}.
1128:
1129: Instructions can set the condition code implicitly. On many machines,
1130: nearly all instructions set the condition code based on the value that
1131: they compute or store. It is not necessary to record these actions
1132: explicitly in the RTL because the machine description includes a
1133: prescription for recognizing the instructions that do so (by means of
1134: the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
1135: instructions whose sole purpose is to set the condition code, and
1136: instructions that use the condition code, need mention @code{(cc0)}.
1137:
1138: On some machines, the condition code register is given a register number
1139: and a @code{reg} is used instead of @code{(cc0)}. This is usually the
1140: preferable approach if only a small subset of instructions modify the
1141: condition code. Other machines store condition codes in general
1142: registers; in such cases a pseudo register should be used.
1143:
1144: Some machines, such as the Sparc and RS/6000, have two sets of
1145: arithmetic instructions, one that sets and one that does not set the
1146: condition code. This is best handled by normally generating the
1147: instruction that does not set the condition code, and making a pattern
1148: that both performs the arithmetic and sets the condition code register
1149: (which would not be @code{(cc0)} in this case). For examples, search
1150: for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
1151:
1152: @findex pc
1153: @item (pc)
1154: @cindex program counter
1155: This represents the machine's program counter. It has no operands and
1156: may not have a machine mode. @code{(pc)} may be validly used only in
1157: certain specific contexts in jump instructions.
1158:
1159: @findex pc_rtx
1160: There is only one expression object of code @code{pc}; it is the value
1161: of the variable @code{pc_rtx}. Any attempt to create an expression of
1162: code @code{pc} will return @code{pc_rtx}.
1163:
1164: All instructions that do not jump alter the program counter implicitly
1165: by incrementing it, but there is no need to mention this in the RTL.
1166:
1167: @findex mem
1168: @item (mem:@var{m} @var{addr})
1169: This RTX represents a reference to main memory at an address
1170: represented by the expression @var{addr}. @var{m} specifies how large
1171: a unit of memory is accessed.
1172: @end table
1173:
1174: @node Arithmetic, Comparisons, Regs and Memory, RTL
1175: @section RTL Expressions for Arithmetic
1176: @cindex arithmetic, in RTL
1177: @cindex math, in RTL
1178: @cindex RTL expressions for arithmetic
1179:
1180: Unless otherwise specified, all the operands of arithmetic expressions
1181: must be valid for mode @var{m}. An operand is valid for mode @var{m}
1182: if it has mode @var{m}, or if it is a @code{const_int} or
1183: @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
1184:
1185: For commutative binary operations, constants should be placed in the
1186: second operand.
1187:
1188: @table @code
1189: @findex plus
1190: @cindex RTL addition
1191: @cindex RTL sum
1192: @item (plus:@var{m} @var{x} @var{y})
1193: Represents the sum of the values represented by @var{x} and @var{y}
1194: carried out in machine mode @var{m}.
1195:
1196: @findex lo_sum
1197: @item (lo_sum:@var{m} @var{x} @var{y})
1198: Like @code{plus}, except that it represents that sum of @var{x} and the
1199: low-order bits of @var{y}. The number of low order bits is
1200: machine-dependent but is normally the number of bits in a @code{Pmode}
1201: item minus the number of bits set by the @code{high} code
1202: (@pxref{Constants}).
1203:
1204: @var{m} should be @code{Pmode}.
1205:
1206: @findex minus
1207: @cindex RTL subtraction
1208: @cindex RTL difference
1209: @item (minus:@var{m} @var{x} @var{y})
1210: Like @code{plus} but represents subtraction.
1211:
1212: @findex compare
1213: @cindex RTL comparison
1214: @item (compare:@var{m} @var{x} @var{y})
1215: Represents the result of subtracting @var{y} from @var{x} for purposes
1216: of comparison. The result is computed without overflow, as if with
1217: infinite precision.
1218:
1219: Of course, machines can't really subtract with infinite precision.
1220: However, they can pretend to do so when only the sign of the
1221: result will be used, which is the case when the result is stored
1222: in the condition code. And that is the only way this kind of expression
1223: may validly be used: as a value to be stored in the condition codes.
1224:
1225: The mode @var{m} is not related to the modes of @var{x} and @var{y},
1226: but instead is the mode of the condition code value. If @code{(cc0)}
1227: is used, it is @code{VOIDmode}. Otherwise it is some mode in class
1228: @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}.
1229:
1230: Normally, @var{x} and @var{y} must have the same mode. Otherwise,
1231: @code{compare} is valid only if the mode of @var{x} is in class
1232: @code{MODE_INT} and @var{y} is a @code{const_int} or
1233: @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
1234: determines what mode the comparison is to be done in; thus it must not
1235: be @code{VOIDmode}.
1236:
1237: If one of the operands is a constant, it should be placed in the
1238: second operand and the comparison code adjusted as appropriate.
1239:
1240: A @code{compare} specifying two @code{VOIDmode} constants is not valid
1241: since there is no way to know in what mode the comparison is to be
1242: performed; the comparison must either be folded during the compilation
1243: or the first operand must be loaded into a register while its mode is
1244: still known.
1245:
1246: @findex neg
1247: @item (neg:@var{m} @var{x})
1248: Represents the negation (subtraction from zero) of the value represented
1249: by @var{x}, carried out in mode @var{m}.
1250:
1251: @findex mult
1252: @cindex multiplication
1253: @cindex product
1254: @item (mult:@var{m} @var{x} @var{y})
1255: Represents the signed product of the values represented by @var{x} and
1256: @var{y} carried out in machine mode @var{m}.
1257:
1258: Some machines support a multiplication that generates a product wider
1259: than the operands. Write the pattern for this as
1260:
1261: @example
1262: (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
1263: @end example
1264:
1265: where @var{m} is wider than the modes of @var{x} and @var{y}, which need
1266: not be the same.
1267:
1268: Write patterns for unsigned widening multiplication similarly using
1269: @code{zero_extend}.
1270:
1271: @findex div
1272: @cindex division
1273: @cindex signed division
1274: @cindex quotient
1275: @item (div:@var{m} @var{x} @var{y})
1276: Represents the quotient in signed division of @var{x} by @var{y},
1277: carried out in machine mode @var{m}. If @var{m} is a floating point
1278: mode, it represents the exact quotient; otherwise, the integerized
1279: quotient.
1280:
1281: Some machines have division instructions in which the operands and
1282: quotient widths are not all the same; you should represent
1283: such instructions using @code{truncate} and @code{sign_extend} as in,
1284:
1285: @example
1286: (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
1287: @end example
1288:
1289: @findex udiv
1290: @cindex unsigned division
1291: @cindex division
1292: @item (udiv:@var{m} @var{x} @var{y})
1293: Like @code{div} but represents unsigned division.
1294:
1295: @findex mod
1296: @findex umod
1297: @cindex remainder
1298: @cindex division
1299: @item (mod:@var{m} @var{x} @var{y})
1300: @itemx (umod:@var{m} @var{x} @var{y})
1301: Like @code{div} and @code{udiv} but represent the remainder instead of
1302: the quotient.
1303:
1304: @findex smin
1305: @findex smax
1306: @cindex signed minimum
1307: @cindex signed maximum
1308: @item (smin:@var{m} @var{x} @var{y})
1309: @itemx (smax:@var{m} @var{x} @var{y})
1310: Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
1311: @var{x} and @var{y}, interpreted as signed integers in mode @var{m}.
1312:
1313: @findex umin
1314: @findex umax
1315: @cindex unsigned minimum and maximum
1316: @item (umin:@var{m} @var{x} @var{y})
1317: @itemx (umax:@var{m} @var{x} @var{y})
1318: Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
1319: integers.
1320:
1321: @findex not
1322: @cindex complement, bitwise
1323: @cindex bitwise complement
1324: @item (not:@var{m} @var{x})
1325: Represents the bitwise complement of the value represented by @var{x},
1326: carried out in mode @var{m}, which must be a fixed-point machine mode.
1327:
1328: @findex and
1329: @cindex logical-and, bitwise
1330: @cindex bitwise logical-and
1331: @item (and:@var{m} @var{x} @var{y})
1332: Represents the bitwise logical-and of the values represented by
1333: @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
1334: a fixed-point machine mode.
1335:
1336: @findex ior
1337: @cindex inclusive-or, bitwise
1338: @cindex bitwise inclusive-or
1339: @item (ior:@var{m} @var{x} @var{y})
1340: Represents the bitwise inclusive-or of the values represented by @var{x}
1341: and @var{y}, carried out in machine mode @var{m}, which must be a
1342: fixed-point mode.
1343:
1344: @findex xor
1345: @cindex exclusive-or, bitwise
1346: @cindex bitwise exclusive-or
1347: @item (xor:@var{m} @var{x} @var{y})
1348: Represents the bitwise exclusive-or of the values represented by @var{x}
1349: and @var{y}, carried out in machine mode @var{m}, which must be a
1350: fixed-point mode.
1351:
1352: @findex ashift
1353: @cindex left shift
1354: @cindex shift
1355: @cindex arithmetic shift
1356: @item (ashift:@var{m} @var{x} @var{c})
1357: Represents the result of arithmetically shifting @var{x} left by @var{c}
1358: places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
1359: be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
1360: mode is determined by the mode called for in the machine description
1361: entry for the left-shift instruction. For example, on the Vax, the mode
1362: of @var{c} is @code{QImode} regardless of @var{m}.
1363:
1364: @findex lshift
1365: @cindex left shift
1366: @cindex logical shift
1367: @item (lshift:@var{m} @var{x} @var{c})
1368: Like @code{lshift} but for arithmetic left shift. @code{ashift} and
1369: @code{lshift} are identical operations; we customarily use @code{ashift}
1370: for both.
1371:
1372: @findex lshiftrt
1373: @cindex right shift
1374: @findex ashiftrt
1375: @item (lshiftrt:@var{m} @var{x} @var{c})
1376: @itemx (ashiftrt:@var{m} @var{x} @var{c})
1377: Like @code{lshift} and @code{ashift} but for right shift. Unlike
1378: the case for left shift, these two operations are distinct.
1379:
1380: @findex rotate
1381: @cindex rotate
1382: @cindex left rotate
1383: @findex rotatert
1384: @cindex right rotate
1385: @item (rotate:@var{m} @var{x} @var{c})
1386: @itemx (rotatert:@var{m} @var{x} @var{c})
1387: Similar but represent left and right rotate. If @var{c} is a constant,
1388: use @code{rotate}.
1389:
1390: @findex abs
1391: @cindex absolute value
1392: @item (abs:@var{m} @var{x})
1393: Represents the absolute value of @var{x}, computed in mode @var{m}.
1394:
1395: @findex sqrt
1396: @cindex square root
1397: @item (sqrt:@var{m} @var{x})
1398: Represents the square root of @var{x}, computed in mode @var{m}.
1399: Most often @var{m} will be a floating point mode.
1400:
1401: @findex ffs
1402: @item (ffs:@var{m} @var{x})
1403: Represents one plus the index of the least significant 1-bit in
1404: @var{x}, represented as an integer of mode @var{m}. (The value is
1405: zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
1406: depending on the target machine, various mode combinations may be
1407: valid.
1408: @end table
1409:
1410: @node Comparisons, Bit Fields, Arithmetic, RTL
1411: @section Comparison Operations
1412: @cindex RTL comparison operations
1413:
1414: Comparison operators test a relation on two operands and are considered
1415: to represent a machine-dependent nonzero value described by, but not
1416: necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
1417: if the relation holds, or zero if it does not. The mode of the
1418: comparison operation is independent of the mode of the data being
1419: compared. If the comparison operation is being tested (e.g., the first
1420: operand of an @code{if_then_else}), the mode must be @code{VOIDmode}.
1421: If the comparison operation is producing data to be stored in some
1422: variable, the mode must be in class @code{MODE_INT}. All comparison
1423: operations producing data must use the same mode, which is
1424: machine-specific.
1425:
1426: @cindex condition codes
1427: There are two ways that comparison operations may be used. The
1428: comparison operators may be used to compare the condition codes
1429: @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
1430: a construct actually refers to the result of the preceding instruction
1431: in which the condition codes were set. The instructing setting the
1432: condition code must be adjacent to the instruction using the condition
1433: code; only @code{note} insns may separate them.
1434:
1435: Alternatively, a comparison operation may directly compare two data
1436: objects. The mode of the comparison is determined by the operands; they
1437: must both be valid for a common machine mode. A comparison with both
1438: operands constant would be invalid as the machine mode could not be
1439: deduced from it, but such a comparison should never exist in RTL due to
1440: constant folding.
1441:
1442: In the example above, if @code{(cc0)} were last set to
1443: @code{(compare @var{x} @var{y})}, the comparison operation is
1444: identical to @code{(eq @var{x} @var{y})}. Usually only one style
1445: of comparisons is supported on a particular machine, but the combine
1446: pass will try to merge the operations to produce the @code{eq} shown
1447: in case it exists in the context of the particular insn involved.
1448:
1449: Inequality comparisons come in two flavors, signed and unsigned. Thus,
1450: there are distinct expression codes @code{gt} and @code{gtu} for signed and
1451: unsigned greater-than. These can produce different results for the same
1452: pair of integer values: for example, 1 is signed greater-than -1 but not
1453: unsigned greater-than, because -1 when regarded as unsigned is actually
1454: @code{0xffffffff} which is greater than 1.
1455:
1456: The signed comparisons are also used for floating point values. Floating
1457: point comparisons are distinguished by the machine modes of the operands.
1458:
1459: @table @code
1460: @findex eq
1461: @cindex equal
1462: @item (eq:@var{m} @var{x} @var{y})
1463: 1 if the values represented by @var{x} and @var{y} are equal,
1464: otherwise 0.
1465:
1466: @findex ne
1467: @cindex not equal
1468: @item (ne:@var{m} @var{x} @var{y})
1469: 1 if the values represented by @var{x} and @var{y} are not equal,
1470: otherwise 0.
1471:
1472: @findex gt
1473: @cindex greater than
1474: @item (gt:@var{m} @var{x} @var{y})
1475: 1 if the @var{x} is greater than @var{y}. If they are fixed-point,
1476: the comparison is done in a signed sense.
1477:
1478: @findex gtu
1479: @cindex greater than
1480: @cindex unsigned greater than
1481: @item (gtu:@var{m} @var{x} @var{y})
1482: Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
1483:
1484: @findex lt
1485: @cindex less than
1486: @findex ltu
1487: @cindex unsigned less than
1488: @item (lt:@var{m} @var{x} @var{y})
1489: @itemx (ltu:@var{m} @var{x} @var{y})
1490: Like @code{gt} and @code{gtu} but test for ``less than''.
1491:
1492: @findex ge
1493: @cindex greater than
1494: @findex geu
1495: @cindex unsigned greater than
1496: @item (ge:@var{m} @var{x} @var{y})
1497: @itemx (geu:@var{m} @var{x} @var{y})
1498: Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
1499:
1500: @findex le
1501: @cindex less than or equal
1502: @findex leu
1503: @cindex unsigned less than
1504: @item (le:@var{m} @var{x} @var{y})
1505: @itemx (leu:@var{m} @var{x} @var{y})
1506: Like @code{gt} and @code{gtu} but test for ``less than or equal''.
1507:
1508: @findex if_then_else
1509: @item (if_then_else @var{cond} @var{then} @var{else})
1510: This is not a comparison operation but is listed here because it is
1511: always used in conjunction with a comparison operation. To be
1512: precise, @var{cond} is a comparison expression. This expression
1513: represents a choice, according to @var{cond}, between the value
1514: represented by @var{then} and the one represented by @var{else}.
1515:
1516: On most machines, @code{if_then_else} expressions are valid only
1517: to express conditional jumps.
1518:
1519: @findex cond
1520: @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
1521: Similar to @code{if_then_else}, but more general. Each of @var{test1},
1522: @var{test2}, @dots{} is performed in turn. The result of this expression is
1523: the @var{value} corresponding to the first non-zero test, or @var{default} if
1524: none of the tests are non-zero expressions.
1525:
1526: This is currently not valid for instruction patterns and is supported only
1527: for insn attributes. @xref{Insn Attributes}.
1528: @end table
1529:
1530: @node Bit Fields, Conversions, Comparisons, RTL
1531: @section Bit Fields
1532: @cindex bit fields
1533:
1534: Special expression codes exist to represent bit-field instructions.
1535: These types of expressions are lvalues in RTL; they may appear
1536: on the left side of an assignment, indicating insertion of a value
1537: into the specified bit field.
1538:
1539: @table @code
1540: @findex sign_extract
1541: @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
1542: @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
1543: This represents a reference to a sign-extended bit field contained or
1544: starting in @var{loc} (a memory or register reference). The bit field
1545: is @var{size} bits wide and starts at bit @var{pos}. The compilation
1546: option @code{BITS_BIG_ENDIAN} says which end of the memory unit
1547: @var{pos} counts from.
1548:
1549: If @var{loc} is in memory, its mode must be a single-byte integer mode.
1550: If @var{loc} is in a register, the mode to use is specified by the
1551: operand of the @code{insv} or @code{extv} pattern
1552: (@pxref{Standard Names}) and is usually a full-word integer mode.
1553:
1554: The mode of @var{pos} is machine-specific and is also specified
1555: in the @code{insv} or @code{extv} pattern.
1556:
1557: The mode @var{m} is the same as the mode that would be used for
1558: @var{loc} if it were a register.
1559:
1560: @findex zero_extract
1561: @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
1562: Like @code{sign_extract} but refers to an unsigned or zero-extended
1563: bit field. The same sequence of bits are extracted, but they
1564: are filled to an entire word with zeros instead of by sign-extension.
1565: @end table
1566:
1567: @node Conversions, RTL Declarations, Bit Fields, RTL
1568: @section Conversions
1569: @cindex conversions
1570: @cindex machine mode conversions
1571:
1572: All conversions between machine modes must be represented by
1573: explicit conversion operations. For example, an expression
1574: which is the sum of a byte and a full word cannot be written as
1575: @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
1576: operation requires two operands of the same machine mode.
1577: Therefore, the byte-sized operand is enclosed in a conversion
1578: operation, as in
1579:
1580: @example
1581: (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
1582: @end example
1583:
1584: The conversion operation is not a mere placeholder, because there
1585: may be more than one way of converting from a given starting mode
1586: to the desired final mode. The conversion operation code says how
1587: to do it.
1588:
1589: For all conversion operations, @var{x} must not be @code{VOIDmode}
1590: because the mode in which to do the conversion would not be known.
1591: The conversion must either be done at compile-time or @var{x}
1592: must be placed into a register.
1593:
1594: @table @code
1595: @findex sign_extend
1596: @item (sign_extend:@var{m} @var{x})
1597: Represents the result of sign-extending the value @var{x}
1598: to machine mode @var{m}. @var{m} must be a fixed-point mode
1599: and @var{x} a fixed-point value of a mode narrower than @var{m}.
1600:
1601: @findex zero_extend
1602: @item (zero_extend:@var{m} @var{x})
1603: Represents the result of zero-extending the value @var{x}
1604: to machine mode @var{m}. @var{m} must be a fixed-point mode
1605: and @var{x} a fixed-point value of a mode narrower than @var{m}.
1606:
1607: @findex float_extend
1608: @item (float_extend:@var{m} @var{x})
1609: Represents the result of extending the value @var{x}
1610: to machine mode @var{m}. @var{m} must be a floating point mode
1611: and @var{x} a floating point value of a mode narrower than @var{m}.
1612:
1613: @findex truncate
1614: @item (truncate:@var{m} @var{x})
1615: Represents the result of truncating the value @var{x}
1616: to machine mode @var{m}. @var{m} must be a fixed-point mode
1617: and @var{x} a fixed-point value of a mode wider than @var{m}.
1618:
1619: @findex float_truncate
1620: @item (float_truncate:@var{m} @var{x})
1621: Represents the result of truncating the value @var{x}
1622: to machine mode @var{m}. @var{m} must be a floating point mode
1623: and @var{x} a floating point value of a mode wider than @var{m}.
1624:
1625: @findex float
1626: @item (float:@var{m} @var{x})
1627: Represents the result of converting fixed point value @var{x},
1628: regarded as signed, to floating point mode @var{m}.
1629:
1630: @findex unsigned_float
1631: @item (unsigned_float:@var{m} @var{x})
1632: Represents the result of converting fixed point value @var{x},
1633: regarded as unsigned, to floating point mode @var{m}.
1634:
1635: @findex fix
1636: @item (fix:@var{m} @var{x})
1637: When @var{m} is a fixed point mode, represents the result of
1638: converting floating point value @var{x} to mode @var{m}, regarded as
1639: signed. How rounding is done is not specified, so this operation may
1640: be used validly in compiling C code only for integer-valued operands.
1641:
1642: @findex unsigned_fix
1643: @item (unsigned_fix:@var{m} @var{x})
1644: Represents the result of converting floating point value @var{x} to
1645: fixed point mode @var{m}, regarded as unsigned. How rounding is done
1646: is not specified.
1647:
1648: @findex fix
1649: @item (fix:@var{m} @var{x})
1650: When @var{m} is a floating point mode, represents the result of
1651: converting floating point value @var{x} (valid for mode @var{m}) to an
1652: integer, still represented in floating point mode @var{m}, by rounding
1653: towards zero.
1654: @end table
1655:
1656: @node RTL Declarations, Side Effects, Conversions, RTL
1657: @section Declarations
1658: @cindex RTL declarations
1659: @cindex declarations, RTL
1660:
1661: Declaration expression codes do not represent arithmetic operations
1662: but rather state assertions about their operands.
1663:
1664: @table @code
1665: @findex strict_low_part
1666: @cindex @code{subreg}, in @code{strict_low_part}
1667: @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
1668: This expression code is used in only one context: operand 0 of a
1669: @code{set} expression. In addition, the operand of this expression
1670: must be a non-paradoxical @code{subreg} expression.
1671:
1672: The presence of @code{strict_low_part} says that the part of the
1673: register which is meaningful in mode @var{n}, but is not part of
1674: mode @var{m}, is not to be altered. Normally, an assignment to such
1675: a subreg is allowed to have undefined effects on the rest of the
1676: register when @var{m} is less than a word.
1677: @end table
1678:
1679: @node Side Effects, Incdec, RTL Declarations, RTL
1680: @section Side Effect Expressions
1681: @cindex RTL side effect expressions
1682:
1683: The expression codes described so far represent values, not actions.
1684: But machine instructions never produce values; they are meaningful
1685: only for their side effects on the state of the machine. Special
1686: expression codes are used to represent side effects.
1687:
1688: The body of an instruction is always one of these side effect codes;
1689: the codes described above, which represent values, appear only as
1690: the operands of these.
1691:
1692: @table @code
1693: @findex set
1694: @item (set @var{lval} @var{x})
1695: Represents the action of storing the value of @var{x} into the place
1696: represented by @var{lval}. @var{lval} must be an expression
1697: representing a place that can be stored in: @code{reg} (or
1698: @code{subreg} or @code{strict_low_part}), @code{mem}, @code{pc} or
1699: @code{cc0}.@refill
1700:
1701: If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
1702: machine mode; then @var{x} must be valid for that mode.@refill
1703:
1704: If @var{lval} is a @code{reg} whose machine mode is less than the full
1705: width of the register, then it means that the part of the register
1706: specified by the machine mode is given the specified value and the
1707: rest of the register receives an undefined value. Likewise, if
1708: @var{lval} is a @code{subreg} whose machine mode is narrower than
1709: the mode of the register, the rest of the register can be changed in
1710: an undefined way.
1711:
1712: If @var{lval} is a @code{strict_low_part} of a @code{subreg}, then the
1713: part of the register specified by the machine mode of the
1714: @code{subreg} is given the value @var{x} and the rest of the register
1715: is not changed.@refill
1716:
1717: If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
1718: be either a @code{compare} expression or a value that may have any mode.
1719: The latter case represents a ``test'' instruction. The expression
1720: @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
1721: @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
1722: Use the former expression to save space during the compilation.
1723:
1724: @cindex jump instructions and @code{set}
1725: @cindex @code{if_then_else} usage
1726: If @var{lval} is @code{(pc)}, we have a jump instruction, and the
1727: possibilities for @var{x} are very limited. It may be a
1728: @code{label_ref} expression (unconditional jump). It may be an
1729: @code{if_then_else} (conditional jump), in which case either the
1730: second or the third operand must be @code{(pc)} (for the case which
1731: does not jump) and the other of the two must be a @code{label_ref}
1732: (for the case which does jump). @var{x} may also be a @code{mem} or
1733: @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
1734: @code{mem}; these unusual patterns are used to represent jumps through
1735: branch tables.@refill
1736:
1737: If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
1738: @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
1739: valid for the mode of @var{lval}.
1740:
1741: @findex SET_DEST
1742: @findex SET_SRC
1743: @var{lval} is customarily accessed with the @code{SET_DEST} macro and
1744: @var{x} with the @code{SET_SRC} macro.
1745:
1746: @findex return
1747: @item (return)
1748: As the sole expression in a pattern, represents a return from the
1749: current function, on machines where this can be done with one
1750: instruction, such as Vaxes. On machines where a multi-instruction
1751: ``epilogue'' must be executed in order to return from the function,
1752: returning is done by jumping to a label which precedes the epilogue, and
1753: the @code{return} expression code is never used.
1754:
1755: Inside an @code{if_then_else} expression, represents the value to be
1756: placed in @code{pc} to return to the caller.
1757:
1758: Note that an insn pattern of @code{(return)} is logically equivalent to
1759: @code{(set (pc) (return))}, but the latter form is never used.
1760:
1761: @findex call
1762: @item (call @var{function} @var{nargs})
1763: Represents a function call. @var{function} is a @code{mem} expression
1764: whose address is the address of the function to be called.
1765: @var{nargs} is an expression which can be used for two purposes: on
1766: some machines it represents the number of bytes of stack argument; on
1767: others, it represents the number of argument registers.
1768:
1769: Each machine has a standard machine mode which @var{function} must
1770: have. The machine description defines macro @code{FUNCTION_MODE} to
1771: expand into the requisite mode name. The purpose of this mode is to
1772: specify what kind of addressing is allowed, on machines where the
1773: allowed kinds of addressing depend on the machine mode being
1774: addressed.
1775:
1776: @findex clobber
1777: @item (clobber @var{x})
1778: Represents the storing or possible storing of an unpredictable,
1779: undescribed value into @var{x}, which must be a @code{reg},
1780: @code{scratch} or @code{mem} expression.
1781:
1782: One place this is used is in string instructions that store standard
1783: values into particular hard registers. It may not be worth the
1784: trouble to describe the values that are stored, but it is essential to
1785: inform the compiler that the registers will be altered, lest it
1786: attempt to keep data in them across the string instruction.
1787:
1788: If @var{x} is @code{(mem:BLK (const_int 0))}, it means that all memory
1789: locations must be presumed clobbered.
1790:
1791: Note that the machine description classifies certain hard registers as
1792: ``call-clobbered''. All function call instructions are assumed by
1793: default to clobber these registers, so there is no need to use
1794: @code{clobber} expressions to indicate this fact. Also, each function
1795: call is assumed to have the potential to alter any memory location,
1796: unless the function is declared @code{const}.
1797:
1798: If the last group of expressions in a @code{parallel} are each a
1799: @code{clobber} expression whose arguments are @code{reg} or
1800: @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
1801: phase can add the appropriate @code{clobber} expressions to an insn it
1802: has constructed when doing so will cause a pattern to be matched.
1803:
1804: This feature can be used, for example, on a machine that whose multiply
1805: and add instructions don't use an MQ register but which has an
1806: add-accumulate instruction that does clobber the MQ register. Similarly,
1807: a combined instruction might require a temporary register while the
1808: constituent instructions might not.
1809:
1810: When a @code{clobber} expression for a register appears inside a
1811: @code{parallel} with other side effects, the register allocator
1812: guarantees that the register is unoccupied both before and after that
1813: insn. However, the reload phase may allocate a register used for one of
1814: the inputs unless the @samp{&} constraint is specified for the selected
1815: alternative (@pxref{Modifiers}). You can clobber either a specific hard
1816: register, a pseudo register, or a @code{scratch} expression; in the
1817: latter two cases, GNU CC will allocate a hard register that is available
1818: there for use as a temporary.
1819:
1820: For instructions that require a temporary register, you should use
1821: @code{scratch} instead of a pseudo-register because this will allow the
1822: combiner phase to add the @code{clobber} when required. You do this by
1823: coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
1824: clobber a pseudo register, use one which appears nowhere else---generate
1825: a new one each time. Otherwise, you may confuse CSE.
1826:
1827: There is one other known use for clobbering a pseudo register in a
1828: @code{parallel}: when one of the input operands of the insn is also
1829: clobbered by the insn. In this case, using the same pseudo register in
1830: the clobber and elsewhere in the insn produces the expected results.
1831:
1832: @findex use
1833: @item (use @var{x})
1834: Represents the use of the value of @var{x}. It indicates that the
1835: value in @var{x} at this point in the program is needed, even though
1836: it may not be apparent why this is so. Therefore, the compiler will
1837: not attempt to delete previous instructions whose only effect is to
1838: store a value in @var{x}. @var{x} must be a @code{reg} expression.
1839:
1840: During the delayed branch scheduling phase, @var{x} may be an insn.
1841: This indicates that @var{x} previously was located at this place in the
1842: code and its data dependencies need to be taken into account. These
1843: @code{use} insns will be deleted before the delayed branch scheduling
1844: phase exits.
1845:
1846: @findex parallel
1847: @item (parallel [@var{x0} @var{x1} @dots{}])
1848: Represents several side effects performed in parallel. The square
1849: brackets stand for a vector; the operand of @code{parallel} is a
1850: vector of expressions. @var{x0}, @var{x1} and so on are individual
1851: side effect expressions---expressions of code @code{set}, @code{call},
1852: @code{return}, @code{clobber} or @code{use}.@refill
1853:
1854: ``In parallel'' means that first all the values used in the individual
1855: side-effects are computed, and second all the actual side-effects are
1856: performed. For example,
1857:
1858: @example
1859: (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
1860: (set (mem:SI (reg:SI 1)) (reg:SI 1))])
1861: @end example
1862:
1863: @noindent
1864: says unambiguously that the values of hard register 1 and the memory
1865: location addressed by it are interchanged. In both places where
1866: @code{(reg:SI 1)} appears as a memory address it refers to the value
1867: in register 1 @emph{before} the execution of the insn.
1868:
1869: It follows that it is @emph{incorrect} to use @code{parallel} and
1870: expect the result of one @code{set} to be available for the next one.
1871: For example, people sometimes attempt to represent a jump-if-zero
1872: instruction this way:
1873:
1874: @example
1875: (parallel [(set (cc0) (reg:SI 34))
1876: (set (pc) (if_then_else
1877: (eq (cc0) (const_int 0))
1878: (label_ref @dots{})
1879: (pc)))])
1880: @end example
1881:
1882: @noindent
1883: But this is incorrect, because it says that the jump condition depends
1884: on the condition code value @emph{before} this instruction, not on the
1885: new value that is set by this instruction.
1886:
1887: @cindex peephole optimization, RTL representation
1888: Peephole optimization, which takes place together with final assembly
1889: code output, can produce insns whose patterns consist of a @code{parallel}
1890: whose elements are the operands needed to output the resulting
1891: assembler code---often @code{reg}, @code{mem} or constant expressions.
1892: This would not be well-formed RTL at any other stage in compilation,
1893: but it is ok then because no further optimization remains to be done.
1894: However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
1895: any, must deal with such insns if you define any peephole optimizations.
1896:
1897: @findex sequence
1898: @item (sequence [@var{insns} @dots{}])
1899: Represents a sequence of insns. Each of the @var{insns} that appears
1900: in the vector is suitable for appearing in the chain of insns, so it
1901: must be an @code{insn}, @code{jump_insn}, @code{call_insn},
1902: @code{code_label}, @code{barrier} or @code{note}.
1903:
1904: A @code{sequence} RTX is never placed in an actual insn during RTL
1905: generation. It represents the sequence of insns that result from a
1906: @code{define_expand} @emph{before} those insns are passed to
1907: @code{emit_insn} to insert them in the chain of insns. When actually
1908: inserted, the individual sub-insns are separated out and the
1909: @code{sequence} is forgotten.
1910:
1911: After delay-slot scheduling is completed, an insn and all the insns that
1912: reside in its delay slots are grouped together into a @code{sequence}.
1913: The insn requiring the delay slot is the first insn in the vector;
1914: subsequent insns are to be placed in the delay slot.
1915:
1916: @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
1917: indicate that a branch insn should be used that will conditionally annul
1918: the effect of the insns in the delay slots. In such a case,
1919: @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
1920: the branch and should be executed only if the branch is taken; otherwise
1921: the insn should be executed only if the branch is not taken.
1922: @xref{Delay Slots}.
1923: @end table
1924:
1925: These expression codes appear in place of a side effect, as the body of
1926: an insn, though strictly speaking they do not always describe side
1927: effects as such:
1928:
1929: @table @code
1930: @findex asm_input
1931: @item (asm_input @var{s})
1932: Represents literal assembler code as described by the string @var{s}.
1933:
1934: @findex unspec
1935: @findex unspec_volatile
1936: @item (unspec [@var{operands} @dots{}] @var{index})
1937: @itemx (unspec [@var{operands} @dots{}] @var{index})
1938: Represents a machine-specific operation on @var{operands}. @var{index}
1939: selects between multiple macine-specific operations.
1940: @code{unspec_volatile} is used for volatile operations and operations
1941: that may trap; @code{unspec} is used for other operations.
1942:
1943: These codes may appear themselves inside a @code{pattern} of an
1944: insn, inside a @code{parallel}, or inside an expression.
1945:
1946: @findex addr_vec
1947: @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
1948: Represents a table of jump addresses. The vector elements @var{lr0},
1949: etc., are @code{label_ref} expressions. The mode @var{m} specifies
1950: how much space is given to each address; normally @var{m} would be
1951: @code{Pmode}.
1952:
1953: @findex addr_diff_vec
1954: @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}])
1955: Represents a table of jump addresses expressed as offsets from
1956: @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
1957: expressions and so is @var{base}. The mode @var{m} specifies how much
1958: space is given to each address-difference.@refill
1959: @end table
1960:
1961: @node Incdec, Assembler, Side Effects, RTL
1962: @section Embedded Side-Effects on Addresses
1963: @cindex RTL preincrement
1964: @cindex RTL postincrement
1965: @cindex RTL predecrement
1966: @cindex RTL postdecrement
1967:
1968: Four special side-effect expression codes appear as memory addresses.
1969:
1970: @table @code
1971: @findex pre_dec
1972: @item (pre_dec:@var{m} @var{x})
1973: Represents the side effect of decrementing @var{x} by a standard
1974: amount and represents also the value that @var{x} has after being
1975: decremented. @var{x} must be a @code{reg} or @code{mem}, but most
1976: machines allow only a @code{reg}. @var{m} must be the machine mode
1977: for pointers on the machine in use. The amount @var{x} is decremented
1978: by is the length in bytes of the machine mode of the containing memory
1979: reference of which this expression serves as the address. Here is an
1980: example of its use:@refill
1981:
1982: @example
1983: (mem:DF (pre_dec:SI (reg:SI 39)))
1984: @end example
1985:
1986: @noindent
1987: This says to decrement pseudo register 39 by the length of a @code{DFmode}
1988: value and use the result to address a @code{DFmode} value.
1989:
1990: @findex pre_inc
1991: @item (pre_inc:@var{m} @var{x})
1992: Similar, but specifies incrementing @var{x} instead of decrementing it.
1993:
1994: @findex post_dec
1995: @item (post_dec:@var{m} @var{x})
1996: Represents the same side effect as @code{pre_dec} but a different
1997: value. The value represented here is the value @var{x} has @i{before}
1998: being decremented.
1999:
2000: @findex post_inc
2001: @item (post_inc:@var{m} @var{x})
2002: Similar, but specifies incrementing @var{x} instead of decrementing it.
2003: @end table
2004:
2005: These embedded side effect expressions must be used with care. Instruction
2006: patterns may not use them. Until the @samp{flow} pass of the compiler,
2007: they may occur only to represent pushes onto the stack. The @samp{flow}
2008: pass finds cases where registers are incremented or decremented in one
2009: instruction and used as an address shortly before or after; these cases are
2010: then transformed to use pre- or post-increment or -decrement.
2011:
2012: If a register used as the operand of these expressions is used in
2013: another address in an insn, the original value of the register is used.
2014: Uses of the register outside of an address are not permitted within the
2015: same insn as a use in an embedded side effect expression because such
2016: insns behave differently on different machines and hence must be treated
2017: as ambiguous and disallowed.
2018:
2019: An instruction that can be represented with an embedded side effect
2020: could also be represented using @code{parallel} containing an additional
2021: @code{set} to describe how the address register is altered. This is not
2022: done because machines that allow these operations at all typically
2023: allow them wherever a memory address is called for. Describing them as
2024: additional parallel stores would require doubling the number of entries
2025: in the machine description.
2026:
2027: @node Assembler, Insns, IncDec, RTL
2028: @section Assembler Instructions as Expressions
2029: @cindex assembler instructions in RTL
2030:
2031: @cindex @code{asm_operands}, usage
2032: The RTX code @code{asm_operands} represents a value produced by a
2033: user-specified assembler instruction. It is used to represent
2034: an @code{asm} statement with arguments. An @code{asm} statement with
2035: a single output operand, like this:
2036:
2037: @example
2038: asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
2039: @end example
2040:
2041: @noindent
2042: is represented using a single @code{asm_operands} RTX which represents
2043: the value that is stored in @code{outputvar}:
2044:
2045: @example
2046: (set @var{rtx-for-outputvar}
2047: (asm_operands "foo %1,%2,%0" "a" 0
2048: [@var{rtx-for-addition-result} @var{rtx-for-*z}]
2049: [(asm_input:@var{m1} "g")
2050: (asm_input:@var{m2} "di")]))
2051: @end example
2052:
2053: @noindent
2054: Here the operands of the @code{asm_operands} RTX are the assembler
2055: template string, the output-operand's constraint, the index-number of the
2056: output operand among the output operands specified, a vector of input
2057: operand RTX's, and a vector of input-operand modes and constraints. The
2058: mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
2059: @code{*z}.
2060:
2061: When an @code{asm} statement has multiple output values, its insn has
2062: several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
2063: contains a @code{asm_operands}; all of these share the same assembler
2064: template and vectors, but each contains the constraint for the respective
2065: output operand. They are also distinguished by the output-operand index
2066: number, which is 0, 1, @dots{} for successive output operands.
2067:
2068: @node Insns, Calls, Assembler, RTL
2069: @section Insns
2070: @cindex insns
2071:
2072: The RTL representation of the code for a function is a doubly-linked
2073: chain of objects called @dfn{insns}. Insns are expressions with
2074: special codes that are used for no other purpose. Some insns are
2075: actual instructions; others represent dispatch tables for @code{switch}
2076: statements; others represent labels to jump to or various sorts of
2077: declarative information.
2078:
2079: In addition to its own specific data, each insn must have a unique
2080: id-number that distinguishes it from all other insns in the current
2081: function (after delayed branch scheduling, copies of an insn with the
2082: same id-number may be present in multiple places in a function, but
2083: these copies will always be identical and will only appear inside a
2084: @code{sequence}), and chain pointers to the preceding and following
2085: insns. These three fields occupy the same position in every insn,
2086: independent of the expression code of the insn. They could be accessed
2087: with @code{XEXP} and @code{XINT}, but instead three special macros are
2088: always used:
2089:
2090: @table @code
2091: @findex INSN_UID
2092: @item INSN_UID (@var{i})
2093: Accesses the unique id of insn @var{i}.
2094:
2095: @findex PREV_INSN
2096: @item PREV_INSN (@var{i})
2097: Accesses the chain pointer to the insn preceding @var{i}.
2098: If @var{i} is the first insn, this is a null pointer.
2099:
2100: @findex NEXT_INSN
2101: @item NEXT_INSN (@var{i})
2102: Accesses the chain pointer to the insn following @var{i}.
2103: If @var{i} is the last insn, this is a null pointer.
2104: @end table
2105:
2106: @findex get_insns
2107: @findex get_last_insn
2108: The first insn in the chain is obtained by calling @code{get_insns}; the
2109: last insn is the result of calling @code{get_last_insn}. Within the
2110: chain delimited by these insns, the @code{NEXT_INSN} and
2111: @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
2112: the first insn,
2113:
2114: @example
2115: NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
2116: @end example
2117:
2118: @noindent
2119: is always true and if @var{insn} is not the last insn,
2120:
2121: @example
2122: PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
2123: @end example
2124:
2125: @noindent
2126: is always true.
2127:
2128: After delay slot scheduling, some of the insns in the chain might be
2129: @code{sequence} expressions, which contain a vector of insns. The value
2130: of @code{NEXT_INSN} in all but the last of these insns is the next insn
2131: in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
2132: is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
2133: which it is contained. Similar rules apply for @code{PREV_INSN}.
2134:
2135: This means that the above invariants are not necessarily true for insns
2136: inside @code{sequence} expressions. Specifically, if @var{insn} is the
2137: first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
2138: is the insn containing the @code{sequence} expression, as is the value
2139: of @code{PREV_INSN (NEXT_INSN (@var{insn}))} is @var{insn} is the last
2140: insn in the @code{sequence} expression. You can use these expressions
2141: to find the containing @code{sequence} expression.@refill
2142:
2143: Every insn has one of the following six expression codes:
2144:
2145: @table @code
2146: @findex insn
2147: @item insn
2148: The expression code @code{insn} is used for instructions that do not jump
2149: and do not do function calls. @code{sequence} expressions are always
2150: contained in insns with code @code{insn} even if one of those insns
2151: should jump or do function calls.
2152:
2153: Insns with code @code{insn} have four additional fields beyond the three
2154: mandatory ones listed above. These four are described in a table below.
2155:
2156: @findex jump_insn
2157: @item jump_insn
2158: The expression code @code{jump_insn} is used for instructions that may
2159: jump (or, more generally, may contain @code{label_ref} expressions). If
2160: there is an instruction to return from the current function, it is
2161: recorded as a @code{jump_insn}.
2162:
2163: @findex JUMP_LABEL
2164: @code{jump_insn} insns have the same extra fields as @code{insn} insns,
2165: accessed in the same way and in addition contains a field
2166: @code{JUMP_LABEL} which is defined once jump optimization has completed.
2167:
2168: For simple conditional and unconditional jumps, this field contains the
2169: @code{code_label} to which this insn will (possibly conditionally)
2170: branch. In a more complex jump, @code{JUMP_LABEL} records one of the
2171: labels that the insn refers to; the only way to find the others
2172: is to scan the entire body of the insn.
2173:
2174: Return insns count as jumps, but since they do not refer to any labels,
2175: they have zero in the @code{JUMP_LABEL} field.
2176:
2177: @findex call_insn
2178: @item call_insn
2179: The expression code @code{call_insn} is used for instructions that may do
2180: function calls. It is important to distinguish these instructions because
2181: they imply that certain registers and memory locations may be altered
2182: unpredictably.
2183:
2184: A @code{call_insn} insn may be preceeded by insns that contain a single
2185: @code{use} expression and be followed by insns the contain a single
2186: @code{clobber} expression. If so, these @code{use} and @code{clobber}
2187: expressions are treated as being part of the function call.
2188: There must not even be a @code{note} between the @code{call_insn} and
2189: the @code{use} or @code{clobber} insns for this special treatment to
2190: take place. This is somewhat of a kludge and will be removed in a later
2191: version of GNU CC.
2192:
2193: @code{call_insn} insns have the same extra fields as @code{insn} insns,
2194: accessed in the same way.
2195:
2196: @findex code_label
2197: @findex CODE_LABEL_NUMBER
2198: @item code_label
2199: A @code{code_label} insn represents a label that a jump insn can jump
2200: to. It contains two special fields of data in addition to the three
2201: standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
2202: number}, a number that identifies this label uniquely among all the
2203: labels in the compilation (not just in the current function).
2204: Ultimately, the label is represented in the assembler output as an
2205: assembler label, usually of the form @samp{L@var{n}} where @var{n} is
2206: the label number.
2207:
2208: When a @code{code_label} appears in an RTL expression, it normally
2209: appears within a @code{label_ref} which represents the address of
2210: the label, as a number.
2211:
2212: @findex LABEL_NUSES
2213: The field @code{LABEL_NUSES} is only defined once the jump optimization
2214: phase is completed and contains the number of times this label is
2215: referenced in the current function.
2216:
2217: @findex barrier
2218: @item barrier
2219: Barriers are placed in the instruction stream when control cannot flow
2220: past them. They are placed after unconditional jump instructions to
2221: indicate that the jumps are unconditional and after calls to
2222: @code{volatile} functions, which do not return (e.g., @code{exit}).
2223: They contain no information beyond the three standard fields.
2224:
2225: @findex note
2226: @findex NOTE_LINE_NUMBER
2227: @findex NOTE_SOURCE_FILE
2228: @item note
2229: @code{note} insns are used to represent additional debugging and
2230: declarative information. They contain two nonstandard fields, an
2231: integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
2232: string accessed with @code{NOTE_SOURCE_FILE}.
2233:
2234: If @code{NOTE_LINE_NUMBER} is positive, the note represents the
2235: position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
2236: that the line came from. These notes control generation of line
2237: number data in the assembler output.
2238:
2239: Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
2240: code with one of the following values (and @code{NOTE_SOURCE_FILE}
2241: must contain a null pointer):
2242:
2243: @table @code
2244: @findex NOTE_INSN_DELETED
2245: @item NOTE_INSN_DELETED
2246: Such a note is completely ignorable. Some passes of the compiler
2247: delete insns by altering them into notes of this kind.
2248:
2249: @findex NOTE_INSN_BLOCK_BEG
2250: @findex NOTE_INSN_BLOCK_END
2251: @item NOTE_INSN_BLOCK_BEG
2252: @itemx NOTE_INSN_BLOCK_END
2253: These types of notes indicate the position of the beginning and end
2254: of a level of scoping of variable names. They control the output
2255: of debugging information.
2256:
2257: @findex NOTE_INSN_LOOP_BEG
2258: @findex NOTE_INSN_LOOP_END
2259: @item NOTE_INSN_LOOP_BEG
2260: @itemx NOTE_INSN_LOOP_END
2261: These types of notes indicate the position of the beginning and end
2262: of a @code{while} or @code{for} loop. They enable the loop optimizer
2263: to find loops quickly.
2264:
2265: @findex NOTE_INSN_LOOP_CONT
2266: @item NOTE_INSN_LOOP_CONT
2267: Appears at the place in a loop that @code{continue} statements jump to.
2268:
2269: @findex NOTE_INSN_LOOP_VTOP
2270: @item NOTE_INSN_LOOP_VTOP
2271: This note indicates the place in a loop where the exit test begins for
2272: those loops in which the exit test has been duplicated. This position
2273: becomes another virtual start of the loop when considering loop
2274: invariants.
2275:
2276: @findex NOTE_INSN_FUNCTION_END
2277: @item NOTE_INSN_FUNCTION_END
2278: Appears near the end of the function body, just before the label that
2279: @code{return} statements jump to (on machine where a single instruction
2280: does not suffice for returning). This note may be deleted by jump
2281: optimization.
2282:
2283: @findex NOTE_INSN_SETJMP
2284: @item NOTE_INSN_SETJMP
2285: Appears following each call to @code{setjmp} or a related function.
2286: @end table
2287:
2288: These codes are printed symbolically when they appear in debugging dumps.
2289: @end table
2290:
2291: @cindex @code{HImode}, in @code{insn}
2292: @cindex @code{QImode}, in @code{insn}
2293: The machine mode of an insn is normally @code{VOIDmode}, but some
2294: phases use the mode for various purposes; for example, the reload pass
2295: sets it to @code{HImode} if the insn needs reloading but not register
2296: elimination and @code{QImode} if both are required. The common
2297: subexpression elimination pass sets the mode of an insn to @code{QImode}
2298: when it is the first insn in a block that has already been processed.
2299:
2300: Here is a table of the extra fields of @code{insn}, @code{jump_insn}
2301: and @code{call_insn} insns:
2302:
2303: @table @code
2304: @findex PATTERN
2305: @item PATTERN (@var{i})
2306: An expression for the side effect performed by this insn. This must be
2307: one of the following codes: @code{set}, @code{call}, @code{use},
2308: @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
2309: @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
2310: @code{unspec_volatile}, or @code{parallel}. If it is a @code{parallel},
2311: each element of the @code{parallel} must be one these codes, except that
2312: @code{parallel} expressions cannot be nested and @code{addr_vec} and
2313: @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
2314:
2315: @findex INSN_CODE
2316: @item INSN_CODE (@var{i})
2317: An integer that says which pattern in the machine description matches
2318: this insn, or -1 if the matching has not yet been attempted.
2319:
2320: Such matching is never attempted and this field remains -1 on an insn
2321: whose pattern consists of a single @code{use}, @code{clobber},
2322: @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
2323:
2324: @findex asm_noperands
2325: Matching is also never attempted on insns that result from an @code{asm}
2326: statement. These contain at least one @code{asm_operands} expression.
2327: The function @code{asm_noperands} returns a non-negative value for
2328: such insns.
2329:
2330: In the debugging output, this field is printed as a number followed by
2331: a symbolic representation that locates the pattern in the @file{md}
2332: file as some small positive or negative offset from a named pattern.
2333:
2334: @findex LOG_LINKS
2335: @item LOG_LINKS (@var{i})
2336: A list (chain of @code{insn_list} expressions) giving information about
2337: dependencies between instructions within a basic block. Neither a jump
2338: nor a label may come between the related insns.
2339:
2340: @findex REG_NOTES
2341: @item REG_NOTES (@var{i})
2342: A list (chain of @code{expr_list} and @code{insn_list} expressions)
2343: giving miscellaneous information about the insn. It is often information
2344: pertaining to the registers used in this insn.
2345: @end table
2346:
2347: The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
2348: expressions. Each of these has two operands: the first is an insn,
2349: and the second is another @code{insn_list} expression (the next one in
2350: the chain). The last @code{insn_list} in the chain has a null pointer
2351: as second operand. The significant thing about the chain is which
2352: insns appear in it (as first operands of @code{insn_list}
2353: expressions). Their order is not significant.
2354:
2355: This list is originally set up by the flow analysis pass; it is a null
2356: pointer until then. Flow only adds links for those data dependencies
2357: which can be used for instruction combination. For each insn, the flow
2358: analysis pass adds a link to insns which store into registers values
2359: that are used for the first time in this insn. The instruction
2360: scheduling pass adds extra links so that every dependence will be
2361: represented. Links represent data dependencies, antidependencies and
2362: output dependencies; the machine mode of the link distinguishes these
2363: three types: antidependencies have mode @code{REG_DEP_ANTI}, output
2364: dependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have
2365: mode @code{VOIDmode}.
2366:
2367: The @code{REG_NOTES} field of an insn is a chain similar to the
2368: @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
2369: addition to @code{insn_list} expressions. There are several kinds
2370: of register notes, which are distinguished by the machine mode, which
2371: in a register note is really understood as being an @code{enum reg_note}.
2372: The first operand @var{op} of the note is data whose meaning depends on
2373: the kind of note.
2374:
2375: @findex REG_NOTE_KIND
2376: @findex PUT_REG_NOTE_KIND
2377: The macro @code{REG_NOTE_KIND (@var{x})} returns the the kind of
2378: register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
2379: (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
2380: @var{newkind}.
2381:
2382: Register notes are of three classes: They may say something about an
2383: input to an insn, they may say something about an output of an insn, or
2384: they may create a linkage between two insns. There are also a set
2385: of values that are only used in @code{LOG_LINKS}.
2386:
2387: These register notes annotate inputs to an insn:
2388:
2389: @table @code
2390: @findex REG_DEAD
2391: @item REG_DEAD
2392: The value in @var{op} dies in this insn; that is to say, altering the
2393: value immediately after this insn would not affect the future behavior
2394: of the program.
2395:
2396: This does not necessarily mean that the register @var{op} has no useful
2397: value after this insn since it may also be an output of the insn. In
2398: such a case, however, a @code{REG_DEAD} note would be redundant and is
2399: usually not present until after the reload pass, but no code relies on
2400: this fact.
2401:
2402: @findex REG_INC
2403: @item REG_INC
2404: The register @var{op} is incremented (or decremented; at this level
2405: there is no distinction) by an embedded side effect inside this insn.
2406: This means it appears in a @code{post_inc}, @code{pre_inc},
2407: @code{post_dec} or @code{pre_dec} expression.
2408:
2409: @findex REG_NONNEG
2410: @item REG_NONNEG
2411: The register @var{op} is known to have a nonnegative value when this
2412: insn is reached. This is used so that decrement and branch until zero
2413: instructions, such as the m68k dbra, can be matched.
2414:
2415: The @code{REG_NONNEG} note is added to insns only if the machine
2416: description contains a pattern named
2417: @samp{decrement_and_branch_until_zero}.
2418:
2419: @findex REG_NO_CONFLICT
2420: @item REG_NO_CONFLICT
2421: This insn does not cause a conflict between @var{op} and the item
2422: being set by this insn even though it might appear that it does.
2423: In other words, if the destination register and @var{op} could
2424: otherwise be assigned the same register, this insn does not
2425: prevent that assignment.
2426:
2427: Insns with this note are usually part of a block that begins with a
2428: @code{clobber} insn specifying a multi-word pseudo register (which will
2429: be the output of the block), a group of insns that each set one word of
2430: the value and have the @code{REG_NO_CONFLICT} note attached, and a final
2431: insn that copies the output to itself with an attached @code{REG_EQUAL}
2432: note giving the expression being computed. This block is encapsulated
2433: with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
2434: last insns, respectively.
2435:
2436: @findex REG_LABEL
2437: @item REG_LABEL
2438: This insn uses @var{op}, a @code{code_label}, but is not a
2439: @code{jump_insn}. The presence of this note allows jump optimization to
2440: be aware that @var{op} is, in fact, being used.
2441: @end table
2442:
2443: The following notes describe attributes of outputs of an insn:
2444:
2445: @table @code
2446: @findex REG_EQUIV
2447: @findex REG_EQUAL
2448: @item REG_EQUIV
2449: @itemx REG_EQUAL
2450: This note is only valid on an insn that sets only one register and
2451: indicates that that register will be equal to @var{op} at run time; the
2452: scope of this equivalence differs between the two types of notes. The
2453: value which the insn explicitly copies into the register may look
2454: different from @var{op}, but they will be equal at run time. If the
2455: output of the single @code{set} is a @code{strict_low_part} expression,
2456: the note refers to the register that is contained in @code{SUBREG_REG}
2457: of the @code{subreg} expression.
2458:
2459: For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
2460: the entire function, and could validly be replaced in all its
2461: occurrences by @var{op}. (``Validly'' here refers to the data flow of
2462: the program; simple replacement may make some insns invalid.) For
2463: example, when a constant is loaded into a register that is never
2464: assigned any other value, this kind of note is used.
2465:
2466: When a parameter is copied into a pseudo-register at entry to a function,
2467: a note of this kind records that the register is equivalent to the stack
2468: slot where the parameter was passed. Although in this case the register
2469: may be set by other insns, it is still valid to replace the register
2470: by the stack slot throughout the function.
2471:
2472: In the case of @code{REG_EQUAL}, the register that is set by this insn
2473: will be equal to @var{op} at run time at the end of this insn but not
2474: necessarily elsewhere in the function. In this case, @var{op}
2475: is typically an arithmetic expression. For example, when a sequence of
2476: insns such as a library call is used to perform an arithmetic operation,
2477: this kind of note is attached to the insn that produces or copies the
2478: final value.
2479:
2480: These two notes are used in different ways by the compiler passes.
2481: @code{REG_EQUAL} is used by passes prior to register allocation (such as
2482: common subexpression elimination and loop optimization) to tell them how
2483: to think of that value. @code{REG_EQUIV} notes are used by register
2484: allocation to indicate that there is an available substitute expression
2485: (either a constant or a @code{mem} expression for the location of a
2486: parameter on the stack) that may be used in place of a register if
2487: insufficient registers are available.
2488:
2489: Except for stack homes for parameters, which are indicated by a
2490: @code{REG_EQUIV} note and are not useful to the early optimization
2491: passes and pseudo registers that are equivalent to a memory location
2492: throughout there entire life, which is not detected until later in
2493: the compilation, all equivalences are initially indicated by an attached
2494: @code{REG_EQUAL} note. In the early stages of register allocation, a
2495: @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
2496: @var{op} is a constant and the insn represents the only set of its
2497: destination register.
2498:
2499: Thus, compiler passes prior to register allocation need only check for
2500: @code{REG_EQUAL} notes and passes subsequent to register allocation
2501: need only check for @code{REG_EQUIV} notes.
2502:
2503: @findex REG_UNUSED
2504: @item REG_UNUSED
2505: The register @var{op} being set by this insn will not be used in a
2506: subsequent insn. This differs from a @code{REG_DEAD} note, which
2507: indicates that the value in an input will not be used subsequently.
2508: These two notes are independent; both may be present for the same
2509: register.
2510:
2511: @findex REG_WAS_0
2512: @item REG_WAS_0
2513: The single output of this insn contained zero before this insn.
2514: @var{op} is the insn that set it to zero. You can rely on this note if
2515: it is present and @var{op} has not been deleted or turned into a @code{note};
2516: its absence implies nothing.
2517: @end table
2518:
2519: These notes describe linkages between insns. They occur in pairs: one
2520: insn has one of a pair of notes that points to a second insn, which has
2521: the inverse note pointing back to the first insn.
2522:
2523: @table @code
2524: @findex REG_RETVAL
2525: @item REG_RETVAL
2526: This insn copies the value of a multi-insn sequence (for example, a
2527: library call), and @var{op} is the first insn of the sequence (for a
2528: library call, the first insn that was generated to set up the arguments
2529: for the library call).
2530:
2531: Loop optimization uses this note to treat such a sequence as a single
2532: operation for code motion purposes and flow analysis uses this note to
2533: delete such sequences whose results are dead.
2534:
2535: A @code{REG_EQUAL} note will also usually be attached to this insn to
2536: provide the expression being computed by the sequence.
2537:
2538: @findex REG_LIBCALL
2539: @item REG_LIBCALL
2540: This is the inverse of @code{REG_RETVAL}: it is placed on the first
2541: insn of a multi-insn sequence, and it points to the last one.
2542:
2543: @findex REG_CC_SETTER
2544: @findex REG_CC_USER
2545: @item REG_CC_SETTER
2546: @itemx REG_CC_USER
2547: On machines that use @code{cc0}, the insns which set and use @code{cc0}
2548: set and use @code{cc0} are adjacent. However, when branch delay slot
2549: filling is done, this may no longer be true. In this case a
2550: @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
2551: point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
2552: be placed on the insn using @code{cc0} to point to the insn setting
2553: @code{cc0}.@refill
2554: @end table
2555:
2556: These values are only used in the @code{LOG_LINKS} field, and indicate
2557: the type of dependency that each link represents. Links which indicate
2558: a data dependence (a read after write dependence) do not use any code,
2559: they simply have mode @code{VOIDmode}, and are printed without any
2560: descriptive text.
2561:
2562: @table @code
2563: @findex REG_DEP_ANTI
2564: @item REG_DEP_ANTI
2565: This indicates an anti dependence (a write after read dependence).
2566:
2567: @findex REG_DEP_OUTPUT
2568: @item REG_DEP_OUTPUT
2569: This indicates an output dependence (a write after write dependence).
2570: @end table
2571:
2572: For convenience, the machine mode in an @code{insn_list} or
2573: @code{expr_list} is printed using these symbolic codes in debugging dumps.
2574:
2575: @findex insn_list
2576: @findex expr_list
2577: The only difference between the expression codes @code{insn_list} and
2578: @code{expr_list} is that the first operand of an @code{insn_list} is
2579: assumed to be an insn and is printed in debugging dumps as the insn's
2580: unique id; the first operand of an @code{expr_list} is printed in the
2581: ordinary way as an expression.
2582:
2583: @node Calls, Sharing, Insns, RTL
2584: @section RTL Representation of Function-Call Insns
2585: @cindex calling functions in RTL
2586: @cindex RTL function-call insns
2587: @cindex function-call insns
2588:
2589: Insns that call subroutines have the RTL expression code @code{call_insn}.
2590: These insns must satisfy special rules, and their bodies must use a special
2591: RTL expression code, @code{call}.
2592:
2593: @cindex @code{call} usage
2594: A @code{call} expression has two operands, as follows:
2595:
2596: @example
2597: (call (mem:@var{fm} @var{addr}) @var{nbytes})
2598: @end example
2599:
2600: @noindent
2601: Here @var{nbytes} is an operand that represents the number of bytes of
2602: argument data being passed to the subroutine, @var{fm} is a machine mode
2603: (which must equal as the definition of the @code{FUNCTION_MODE} macro in
2604: the machine description) and @var{addr} represents the address of the
2605: subroutine.
2606:
2607: For a subroutine that returns no value, the @code{call} expression as
2608: shown above is the entire body of the insn, except that the insn might
2609: also contain @code{use} or @code{clobber} expressions.
2610:
2611: @cindex @code{BLKmode}, and function return values
2612: For a subroutine that returns a value whose mode is not @code{BLKmode},
2613: the value is returned in a hard register. If this register's number is
2614: @var{r}, then the body of the call insn looks like this:
2615:
2616: @example
2617: (set (reg:@var{m} @var{r})
2618: (call (mem:@var{fm} @var{addr}) @var{nbytes}))
2619: @end example
2620:
2621: @noindent
2622: This RTL expression makes it clear (to the optimizer passes) that the
2623: appropriate register receives a useful value in this insn.
2624:
2625: When a subroutine returns a @code{BLKmode} value, it is handled by
2626: passing to the subroutine the address of a place to store the value.
2627: So the call insn itself does not ``return'' any value, and it has the
2628: same RTL form as a call that returns nothing.
2629:
2630: On some machines, the call instruction itself clobbers some register,
2631: for example to contain the return address. @code{call_insn} insns
2632: on these machines should have a body which is a @code{parallel}
2633: that contains both the @code{call} expression and @code{clobber}
2634: expressions that indicate which registers are destroyed. Similarly,
2635: if the call instruction requires some register other than the stack
2636: pointer that is not explicitly mentioned it its RTL, a @code{use}
2637: subexpression should mention that register.
2638:
2639: Functions that are called are assumed to modify all registers listed in
2640: the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
2641: Basics}) and, with the exception of @code{const} functions and library
2642: calls, to modify all of memory.
2643:
2644: Insns containing just @code{use} expressions directly precede the
2645: @code{call_insn} insn to indicate which registers contain inputs to the
2646: function. Similarly, if registers other than those in
2647: @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
2648: containing a single @code{clobber} follow immediately after the call to
2649: indicate which registers.
2650:
2651: @node Sharing,, Calls, RTL
2652: @section Structure Sharing Assumptions
2653: @cindex sharing of RTL components
2654: @cindex RTL structure sharing assumptions
2655:
2656: The compiler assumes that certain kinds of RTL expressions are unique;
2657: there do not exist two distinct objects representing the same value.
2658: In other cases, it makes an opposite assumption: that no RTL expression
2659: object of a certain kind appears in more than one place in the
2660: containing structure.
2661:
2662: These assumptions refer to a single function; except for the RTL
2663: objects that describe global variables and external functions,
2664: and a few standard objects such as small integer constants,
2665: no RTL objects are common to two functions.
2666:
2667: @itemize @bullet
2668: @cindex @code{reg}, RTL sharing
2669: @item
2670: Each pseudo-register has only a single @code{reg} object to represent it,
2671: and therefore only a single machine mode.
2672:
2673: @cindex symbolic label
2674: @cindex @code{symbol_ref}, RTL sharing
2675: @item
2676: For any symbolic label, there is only one @code{symbol_ref} object
2677: referring to it.
2678:
2679: @cindex @code{const_int}, RTL sharing
2680: @item
2681: There is only one @code{const_int} expression with value 0, only
2682: one with value 1, and only one with value @minus{}1.
2683: Some other integer values are also stored uniquely.
2684:
2685: @cindex @code{pc}, RTL sharing
2686: @item
2687: There is only one @code{pc} expression.
2688:
2689: @cindex @code{cc0}, RTL sharing
2690: @item
2691: There is only one @code{cc0} expression.
2692:
2693: @cindex @code{const_double}, RTL sharing
2694: @item
2695: There is only one @code{const_double} expression with value 0 for
2696: each floating point mode. Likewise for values 1 and 2.
2697:
2698: @cindex @code{label_ref}, RTL sharing
2699: @cindex @code{scratch}, RTL sharing
2700: @item
2701: No @code{label_ref} or @code{scratch} appears in more than one place in
2702: the RTL structure; in other words, it is safe to do a tree-walk of all
2703: the insns in the function and assume that each time a @code{label_ref}
2704: or @code{scratch} is seen it is distinct from all others that are seen.
2705:
2706: @cindex @code{mem}, RTL sharing
2707: @item
2708: Only one @code{mem} object is normally created for each static
2709: variable or stack slot, so these objects are frequently shared in all
2710: the places they appear. However, separate but equal objects for these
2711: variables are occasionally made.
2712:
2713: @cindex @code{asm_operands}, RTL sharing
2714: @item
2715: When a single @code{asm} statement has multiple output operands, a
2716: distinct @code{asm_operands} expression is made for each output operand.
2717: However, these all share the vector which contains the sequence of input
2718: operands. This sharing is used later on to test whether two
2719: @code{asm_operands} expressions come from the same statement, so all
2720: optimizations must carefully preserve the sharing if they copy the
2721: vector at all.
2722:
2723: @item
2724: No RTL object appears in more than one place in the RTL structure
2725: except as described above. Many passes of the compiler rely on this
2726: by assuming that they can modify RTL objects in place without unwanted
2727: side-effects on other insns.
2728:
2729: @findex unshare_all_rtl
2730: @item
2731: During initial RTL generation, shared structure is freely introduced.
2732: After all the RTL for a function has been generated, all shared
2733: structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
2734: after which the above rules are guaranteed to be followed.
2735:
2736: @findex copy_rtx_if_shared
2737: @item
2738: During the combiner pass, shared structure within an insn can exist
2739: temporarily. However, the shared structure is copied before the
2740: combiner is finished with the insn. This is done by calling
2741: @code{copy_rtx_if_shared}, which is a subroutine of
2742: @code{unshare_all_rtl}.
2743: @end itemize
2744: @end ifset
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