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1.1 root 1: @c Copyright (C) 1988, 1989, 1992 Free Software Foundation, Inc.
2: @c This is part of the GCC manual.
3: @c For copying conditions, see the file gcc.texi.
4:
5: @ifset INTERNALS
1.1.1.3 root 6: @node RTL
1.1 root 7: @chapter RTL Representation
8: @cindex RTL representation
9: @cindex representation of RTL
10: @cindex Register Transfer Language (RTL)
11:
12: Most of the work of the compiler is done on an intermediate representation
13: called register transfer language. In this language, the instructions to be
14: output are described, pretty much one by one, in an algebraic form that
15: describes what the instruction does.
16:
17: RTL is inspired by Lisp lists. It has both an internal form, made up of
18: structures that point at other structures, and a textual form that is used
19: in the machine description and in printed debugging dumps. The textual
20: form uses nested parentheses to indicate the pointers in the internal form.
21:
22: @menu
23: * RTL Objects:: Expressions vs vectors vs strings vs integers.
24: * Accessors:: Macros to access expression operands or vector elts.
25: * Flags:: Other flags in an RTL expression.
26: * Machine Modes:: Describing the size and format of a datum.
27: * Constants:: Expressions with constant values.
28: * Regs and Memory:: Expressions representing register contents or memory.
29: * Arithmetic:: Expressions representing arithmetic on other expressions.
30: * Comparisons:: Expressions representing comparison of expressions.
31: * Bit Fields:: Expressions representing bit-fields in memory or reg.
32: * Conversions:: Extending, truncating, floating or fixing.
33: * RTL Declarations:: Declaring volatility, constancy, etc.
34: * Side Effects:: Expressions for storing in registers, etc.
35: * Incdec:: Embedded side-effects for autoincrement addressing.
36: * Assembler:: Representing @code{asm} with operands.
37: * Insns:: Expression types for entire insns.
38: * Calls:: RTL representation of function call insns.
39: * Sharing:: Some expressions are unique; others *must* be copied.
40: @end menu
41:
42: @node RTL Objects, Accessors, RTL, RTL
43: @section RTL Object Types
44: @cindex RTL object types
45:
46: @cindex RTL integers
47: @cindex RTL strings
48: @cindex RTL vectors
49: @cindex RTL expression
50: @cindex RTX (See RTL)
1.1.1.4 ! root 51: RTL uses five kinds of objects: expressions, integers, wide integers,
! 52: strings and vectors. Expressions are the most important ones. An RTL
! 53: expression (``RTX'', for short) is a C structure, but it is usually
! 54: referred to with a pointer; a type that is given the typedef name
! 55: @code{rtx}.
1.1 root 56:
57: An integer is simply an @code{int}; their written form uses decimal digits.
1.1.1.4 ! root 58: A wide integer is an integral object whose type is @code{HOST_WIDE_INT}
! 59: (@pxref{Config}); their written form used decimal digits.
1.1 root 60:
61: A string is a sequence of characters. In core it is represented as a
62: @code{char *} in usual C fashion, and it is written in C syntax as well.
63: However, strings in RTL may never be null. If you write an empty string in
64: a machine description, it is represented in core as a null pointer rather
65: than as a pointer to a null character. In certain contexts, these null
66: pointers instead of strings are valid. Within RTL code, strings are most
67: commonly found inside @code{symbol_ref} expressions, but they appear in
68: other contexts in the RTL expressions that make up machine descriptions.
69:
70: A vector contains an arbitrary number of pointers to expressions. The
71: number of elements in the vector is explicitly present in the vector.
72: The written form of a vector consists of square brackets
73: (@samp{[@dots{}]}) surrounding the elements, in sequence and with
74: whitespace separating them. Vectors of length zero are not created;
75: null pointers are used instead.
76:
77: @cindex expression codes
78: @cindex codes, RTL expression
79: @findex GET_CODE
80: @findex PUT_CODE
81: Expressions are classified by @dfn{expression codes} (also called RTX
82: codes). The expression code is a name defined in @file{rtl.def}, which is
83: also (in upper case) a C enumeration constant. The possible expression
84: codes and their meanings are machine-independent. The code of an RTX can
85: be extracted with the macro @code{GET_CODE (@var{x})} and altered with
86: @code{PUT_CODE (@var{x}, @var{newcode})}.
87:
88: The expression code determines how many operands the expression contains,
89: and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
90: by looking at an operand what kind of object it is. Instead, you must know
91: from its context---from the expression code of the containing expression.
92: For example, in an expression of code @code{subreg}, the first operand is
93: to be regarded as an expression and the second operand as an integer. In
94: an expression of code @code{plus}, there are two operands, both of which
95: are to be regarded as expressions. In a @code{symbol_ref} expression,
96: there is one operand, which is to be regarded as a string.
97:
98: Expressions are written as parentheses containing the name of the
99: expression type, its flags and machine mode if any, and then the operands
100: of the expression (separated by spaces).
101:
102: Expression code names in the @samp{md} file are written in lower case,
103: but when they appear in C code they are written in upper case. In this
104: manual, they are shown as follows: @code{const_int}.
105:
106: @cindex (nil)
107: @cindex nil
108: In a few contexts a null pointer is valid where an expression is normally
109: wanted. The written form of this is @code{(nil)}.
110:
111: @node Accessors, Flags, RTL Objects, RTL
112: @section Access to Operands
113: @cindex accessors
114: @cindex access to operands
115: @cindex operand access
116:
117: @cindex RTL format
1.1.1.4 ! root 118: For each expression type @file{rtl.def} specifies the number of
! 119: contained objects and their kinds, with four possibilities: @samp{e} for
! 120: expression (actually a pointer to an expression), @samp{i} for integer,
! 121: @samp{w} for wide integer, @samp{s} for string, and @samp{E} for vector
! 122: of expressions. The sequence of letters for an expression code is
! 123: called its @dfn{format}. Thus, the format of @code{subreg} is
! 124: @samp{ei}.@refill
1.1 root 125:
126: @cindex RTL format characters
127: A few other format characters are used occasionally:
128:
129: @table @code
130: @item u
131: @samp{u} is equivalent to @samp{e} except that it is printed differently
132: in debugging dumps. It is used for pointers to insns.
133:
134: @item n
135: @samp{n} is equivalent to @samp{i} except that it is printed differently
136: in debugging dumps. It is used for the line number or code number of a
137: @code{note} insn.
138:
139: @item S
140: @samp{S} indicates a string which is optional. In the RTL objects in
141: core, @samp{S} is equivalent to @samp{s}, but when the object is read,
142: from an @samp{md} file, the string value of this operand may be omitted.
143: An omitted string is taken to be the null string.
144:
145: @item V
146: @samp{V} indicates a vector which is optional. In the RTL objects in
147: core, @samp{V} is equivalent to @samp{E}, but when the object is read
148: from an @samp{md} file, the vector value of this operand may be omitted.
149: An omitted vector is effectively the same as a vector of no elements.
150:
151: @item 0
152: @samp{0} means a slot whose contents do not fit any normal category.
153: @samp{0} slots are not printed at all in dumps, and are often used in
154: special ways by small parts of the compiler.
155: @end table
156:
157: There are macros to get the number of operands, the format, and the
158: class of an expression code:
159:
160: @table @code
161: @findex GET_RTX_LENGTH
162: @item GET_RTX_LENGTH (@var{code})
163: Number of operands of an RTX of code @var{code}.
164:
165: @findex GET_RTX_FORMAT
166: @item GET_RTX_FORMAT (@var{code})
167: The format of an RTX of code @var{code}, as a C string.
168:
169: @findex GET_RTX_CLASS
170: @cindex classes of RTX codes
171: @item GET_RTX_CLASS (@var{code})
172: A single character representing the type of RTX operation that code
173: @var{code} performs.
174:
175: The following classes are defined:
176:
177: @table @code
178: @item o
179: An RTX code that represents an actual object, such as @code{reg} or
180: @code{mem}. @code{subreg} is not in this class.
181:
182: @item <
183: An RTX code for a comparison. The codes in this class are
184: @code{NE}, @code{EQ}, @code{LE}, @code{LT}, @code{GE}, @code{GT},
185: @code{LEU}, @code{LTU}, @code{GEU}, @code{GTU}.@refill
186:
187: @item 1
188: An RTX code for a unary arithmetic operation, such as @code{neg}.
189:
190: @item c
191: An RTX code for a commutative binary operation, other than @code{NE}
192: and @code{EQ} (which have class @samp{<}).
193:
194: @item 2
195: An RTX code for a noncommutative binary operation, such as @code{MINUS}.
196:
197: @item b
198: An RTX code for a bitfield operation (@code{ZERO_EXTRACT} and
199: @code{SIGN_EXTRACT}).
200:
201: @item 3
202: An RTX code for other three input operations, such as @code{IF_THEN_ELSE}.
203:
204: @item i
205: An RTX code for a machine insn (@code{INSN}, @code{JUMP_INSN}, and
206: @code{CALL_INSN}).@refill
207:
208: @item m
209: An RTX code for something that matches in insns, such as @code{MATCH_DUP}.
210:
211: @item x
212: All other RTX codes.
213: @end table
214: @end table
215:
216: @findex XEXP
217: @findex XINT
1.1.1.4 ! root 218: @findex XWINT
1.1 root 219: @findex XSTR
220: Operands of expressions are accessed using the macros @code{XEXP},
1.1.1.4 ! root 221: @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
! 222: two arguments: an expression-pointer (RTX) and an operand number
! 223: (counting from zero). Thus,@refill
1.1 root 224:
225: @example
226: XEXP (@var{x}, 2)
227: @end example
228:
229: @noindent
230: accesses operand 2 of expression @var{x}, as an expression.
231:
232: @example
233: XINT (@var{x}, 2)
234: @end example
235:
236: @noindent
237: accesses the same operand as an integer. @code{XSTR}, used in the same
238: fashion, would access it as a string.
239:
240: Any operand can be accessed as an integer, as an expression or as a string.
241: You must choose the correct method of access for the kind of value actually
242: stored in the operand. You would do this based on the expression code of
243: the containing expression. That is also how you would know how many
244: operands there are.
245:
246: For example, if @var{x} is a @code{subreg} expression, you know that it has
247: two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
248: and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
249: would get the address of the expression operand but cast as an integer;
250: that might occasionally be useful, but it would be cleaner to write
251: @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
252: compile without error, and would return the second, integer operand cast as
253: an expression pointer, which would probably result in a crash when
254: accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
255: but this will access memory past the end of the expression with
256: unpredictable results.@refill
257:
258: Access to operands which are vectors is more complicated. You can use the
259: macro @code{XVEC} to get the vector-pointer itself, or the macros
260: @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
261: vector.
262:
263: @table @code
264: @findex XVEC
265: @item XVEC (@var{exp}, @var{idx})
266: Access the vector-pointer which is operand number @var{idx} in @var{exp}.
267:
268: @findex XVECLEN
269: @item XVECLEN (@var{exp}, @var{idx})
270: Access the length (number of elements) in the vector which is
271: in operand number @var{idx} in @var{exp}. This value is an @code{int}.
272:
273: @findex XVECEXP
274: @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
275: Access element number @var{eltnum} in the vector which is
276: in operand number @var{idx} in @var{exp}. This value is an RTX.
277:
278: It is up to you to make sure that @var{eltnum} is not negative
279: and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
280: @end table
281:
282: All the macros defined in this section expand into lvalues and therefore
283: can be used to assign the operands, lengths and vector elements as well as
284: to access them.
285:
286: @node Flags, Machine Modes, Accessors, RTL
287: @section Flags in an RTL Expression
288: @cindex flags in RTL expression
289:
290: RTL expressions contain several flags (one-bit bit-fields) that are used
291: in certain types of expression. Most often they are accessed with the
292: following macros:
293:
294: @table @code
295: @findex MEM_VOLATILE_P
296: @cindex @code{mem} and @samp{/v}
297: @cindex @code{volatil}, in @code{mem}
298: @cindex @samp{/v} in RTL dump
299: @item MEM_VOLATILE_P (@var{x})
300: In @code{mem} expressions, nonzero for volatile memory references.
301: Stored in the @code{volatil} field and printed as @samp{/v}.
302:
303: @findex MEM_IN_STRUCT_P
304: @cindex @code{mem} and @samp{/s}
305: @cindex @code{in_struct}, in @code{mem}
306: @cindex @samp{/s} in RTL dump
307: @item MEM_IN_STRUCT_P (@var{x})
308: In @code{mem} expressions, nonzero for reference to an entire
309: structure, union or array, or to a component of one. Zero for
310: references to a scalar variable or through a pointer to a scalar.
311: Stored in the @code{in_struct} field and printed as @samp{/s}.
312:
313: @findex REG_LOOP_TEST_P
314: @cindex @code{reg} and @samp{/s}
315: @cindex @code{in_struct}, in @code{reg}
316: @item REG_LOOP_TEST_P
317: In @code{reg} expressions, nonzero if this register's entire life is
318: contained in the exit test code for some loop. Stored in the
319: @code{in_struct} field and printed as @samp{/s}.
320:
321: @findex REG_USERVAR_P
322: @cindex @code{reg} and @samp{/v}
323: @cindex @code{volatil}, in @code{reg}
324: @item REG_USERVAR_P (@var{x})
325: In a @code{reg}, nonzero if it corresponds to a variable present in
326: the user's source code. Zero for temporaries generated internally by
327: the compiler. Stored in the @code{volatil} field and printed as
328: @samp{/v}.
329:
330: @cindex @samp{/i} in RTL dump
331: @findex REG_FUNCTION_VALUE_P
332: @cindex @code{reg} and @samp{/i}
333: @cindex @code{integrated}, in @code{reg}
334: @item REG_FUNCTION_VALUE_P (@var{x})
335: Nonzero in a @code{reg} if it is the place in which this function's
336: value is going to be returned. (This happens only in a hard
337: register.) Stored in the @code{integrated} field and printed as
338: @samp{/i}.
339:
340: The same hard register may be used also for collecting the values of
341: functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
342: in this kind of use.
343:
1.1.1.4 ! root 344: @findex SUBREG_PROMOTED_VAR_P
! 345: @cindex @code{subreg} and @samp{/s}
! 346: @cindex @code{in_struct}, in @code{subreg}
! 347: @item SUBREG_PROMOTED_VAR_P
! 348: Nonzero in a @code{subreg} if it was made when accessing an object that
! 349: was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
! 350: description macro (@pxref{Storage Layout}). In this case, the mode of
! 351: the @code{subreg} is the declared mode of the object and the mode of
! 352: @code{SUBREG_REG} is the mode of the register that holds the object.
! 353: Promoted variables are always either sign- or zero-extended to the wider
! 354: mode on every assignment. Stored in the @code{in_struct} field and
! 355: printed as @samp{/s}.
! 356:
! 357: @findex SUBREG_PROMOTED_UNSIGNED_P
! 358: @cindex @code{subreg} and @samp{/u}
! 359: @cindex @code{unchanging}, in @code{subreg}
! 360: @item SUBREG_PROMOTED_UNSIGNED_P
! 361: Nonzero in a @code{subreg} that has @code{SUBREG_PROMOTED_VAR_P} nonzero
! 362: if the object being referenced is kept zero-extended and zero if it
! 363: is kept sign-extended. Stored in the @code{unchanging} field and
! 364: printed as @samp{/u}.
! 365:
1.1 root 366: @findex RTX_UNCHANGING_P
367: @cindex @code{reg} and @samp{/u}
368: @cindex @code{mem} and @samp{/u}
369: @cindex @code{unchanging}, in @code{reg} and @code{mem}
370: @cindex @samp{/u} in RTL dump
371: @item RTX_UNCHANGING_P (@var{x})
372: Nonzero in a @code{reg} or @code{mem} if the value is not changed.
373: (This flag is not set for memory references via pointers to constants.
374: Such pointers only guarantee that the object will not be changed
375: explicitly by the current function. The object might be changed by
376: other functions or by aliasing.) Stored in the
377: @code{unchanging} field and printed as @samp{/u}.
378:
379: @findex RTX_INTEGRATED_P
380: @cindex @code{integrated}, in @code{insn}
381: @item RTX_INTEGRATED_P (@var{insn})
382: Nonzero in an insn if it resulted from an in-line function call.
383: Stored in the @code{integrated} field and printed as @samp{/i}. This
384: may be deleted; nothing currently depends on it.
385:
386: @findex SYMBOL_REF_USED
387: @cindex @code{used}, in @code{symbol_ref}
388: @item SYMBOL_REF_USED (@var{x})
389: In a @code{symbol_ref}, indicates that @var{x} has been used. This is
390: normally only used to ensure that @var{x} is only declared external
391: once. Stored in the @code{used} field.
392:
393: @findex SYMBOL_REF_FLAG
394: @cindex @code{symbol_ref} and @samp{/v}
395: @cindex @code{volatil}, in @code{symbol_ref}
396: @item SYMBOL_REF_FLAG (@var{x})
397: In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
398: Stored in the @code{volatil} field and printed as @samp{/v}.
399:
400: @findex LABEL_OUTSIDE_LOOP_P
401: @cindex @code{label_ref} and @samp{/s}
402: @cindex @code{in_struct}, in @code{label_ref}
403: @item LABEL_OUTSIDE_LOOP_P
404: In @code{label_ref} expressions, nonzero if this is a reference to a
405: label that is outside the innermost loop containing the reference to the
406: label. Stored in the @code{in_struct} field and printed as @samp{/s}.
407:
408: @findex INSN_DELETED_P
409: @cindex @code{volatil}, in @code{insn}
410: @item INSN_DELETED_P (@var{insn})
411: In an insn, nonzero if the insn has been deleted. Stored in the
412: @code{volatil} field and printed as @samp{/v}.
413:
414: @findex INSN_ANNULLED_BRANCH_P
415: @cindex @code{insn} and @samp{/u}
416: @cindex @code{unchanging}, in @code{insn}
417: @item INSN_ANNULLED_BRANCH_P (@var{insn})
418: In an @code{insn} in the delay slot of a branch insn, indicates that an
419: annulling branch should be used. See the discussion under
420: @code{sequence} below. Stored in the @code{unchanging} field and printed
421: as @samp{/u}.
422:
423: @findex INSN_FROM_TARGET_P
424: @cindex @code{insn} and @samp{/s}
425: @cindex @code{in_struct}, in @code{insn}
426: @cindex @samp{/s} in RTL dump
427: @item INSN_FROM_TARGET_P (@var{insn})
428: In an @code{insn} in a delay slot of a branch, indicates that the insn
429: is from the target of the branch. If the branch insn has
430: @code{INSN_ANNULLED_BRANCH_P} set, this insn should only be executed if
431: the branch is taken. For annulled branches with this bit clear, the
432: insn should be executed only if the branch is not taken. Stored in the
433: @code{in_struct} field and printed as @samp{/s}.
434:
435: @findex CONSTANT_POOL_ADDRESS_P
436: @cindex @code{symbol_ref} and @samp{/u}
437: @cindex @code{unchanging}, in @code{symbol_ref}
438: @item CONSTANT_POOL_ADDRESS_P (@var{x})
439: Nonzero in a @code{symbol_ref} if it refers to part of the current
440: function's ``constants pool''. These are addresses close to the
441: beginning of the function, and GNU CC assumes they can be addressed
442: directly (perhaps with the help of base registers). Stored in the
443: @code{unchanging} field and printed as @samp{/u}.
444:
445: @findex CONST_CALL_P
446: @cindex @code{call_insn} and @samp{/u}
447: @cindex @code{unchanging}, in @code{call_insn}
448: @item CONST_CALL_P (@var{x})
449: In a @code{call_insn}, indicates that the insn represents a call to a const
450: function. Stored in the @code{unchanging} field and printed as @samp{/u}.
451:
452: @findex LABEL_PRESERVE_P
453: @cindex @code{code_label} and @samp{/i}
454: @cindex @code{in_struct}, in @code{code_label}
455: @item LABEL_PRESERVE_P (@var{x})
456: In a @code{code_label}, indicates that the label can never be deleted.
1.1.1.4 ! root 457: Labels referenced by a non-local goto will have this bit set. Stored
1.1 root 458: in the @code{in_struct} field and printed as @samp{/s}.
459:
460: @findex SCHED_GROUP_P
461: @cindex @code{insn} and @samp{/i}
462: @cindex @code{in_struct}, in @code{insn}
463: @item SCHED_GROUP_P (@var{insn})
464: During instruction scheduling, in an insn, indicates that the previous insn
465: must be scheduled together with this insn. This is used to ensure that
466: certain groups of instructions will not be split up by the instruction
467: scheduling pass, for example, @code{use} insns before a @code{call_insn} may
468: not be separated from the @code{call_insn}. Stored in the @code{in_struct}
469: field and printed as @samp{/s}.
470: @end table
471:
472: These are the fields which the above macros refer to:
473:
474: @table @code
475: @findex used
476: @item used
477: Normally, this flag is used only momentarily, at the end of RTL
478: generation for a function, to count the number of times an expression
479: appears in insns. Expressions that appear more than once are copied,
480: according to the rules for shared structure (@pxref{Sharing}).
481:
482: In a @code{symbol_ref}, it indicates that an external declaration for
483: the symbol has already been written.
484:
485: In a @code{reg}, it is used by the leaf register renumbering code to ensure
486: that each register is only renumbered once.
487:
488: @findex volatil
489: @item volatil
1.1.1.4 ! root 490: This flag is used in @code{mem}, @code{symbol_ref} and @code{reg}
1.1 root 491: expressions and in insns. In RTL dump files, it is printed as
492: @samp{/v}.
493:
494: @cindex volatile memory references
495: In a @code{mem} expression, it is 1 if the memory reference is volatile.
496: Volatile memory references may not be deleted, reordered or combined.
497:
498: In a @code{symbol_ref} expression, it is used for machine-specific
499: purposes.
500:
501: In a @code{reg} expression, it is 1 if the value is a user-level variable.
502: 0 indicates an internal compiler temporary.
503:
504: In an insn, 1 means the insn has been deleted.
505:
506: @findex in_struct
507: @item in_struct
508: In @code{mem} expressions, it is 1 if the memory datum referred to is
509: all or part of a structure or array; 0 if it is (or might be) a scalar
510: variable. A reference through a C pointer has 0 because the pointer
511: might point to a scalar variable. This information allows the compiler
512: to determine something about possible cases of aliasing.
513:
514: In an insn in the delay slot of a branch, 1 means that this insn is from
515: the target of the branch.
516:
517: During instruction scheduling, in an insn, 1 means that this insn must be
518: scheduled as part of a group together with the previous insn.
519:
520: In @code{reg} expressions, it is 1 if the register has its entire life
521: contained within the test expression of some loopl.
522:
1.1.1.4 ! root 523: In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
! 524: an object that has had its mode promoted from a wider mode.
! 525:
1.1 root 526: In @code{label_ref} expressions, 1 means that the referenced label is
527: outside the innermost loop containing the insn in which the @code{label_ref}
528: was found.
529:
530: In @code{code_label} expressions, it is 1 if the label may never be deleted.
531: This is used for labels which are the target of non-local gotos.
532:
533: In an RTL dump, this flag is represented as @samp{/s}.
534:
535: @findex unchanging
536: @item unchanging
537: In @code{reg} and @code{mem} expressions, 1 means
538: that the value of the expression never changes.
539:
1.1.1.4 ! root 540: In @code{subreg} expressions, it is 1 if the @code{subreg} references an
! 541: unsigned object whose mode has been promoted to a wider mode.
! 542:
1.1 root 543: In an insn, 1 means that this is an annulling branch.
544:
545: In a @code{symbol_ref} expression, 1 means that this symbol addresses
546: something in the per-function constants pool.
547:
548: In a @code{call_insn}, 1 means that this instruction is a call to a
549: const function.
550:
551: In an RTL dump, this flag is represented as @samp{/u}.
552:
553: @findex integrated
554: @item integrated
555: In some kinds of expressions, including insns, this flag means the
556: rtl was produced by procedure integration.
557:
558: In a @code{reg} expression, this flag indicates the register
559: containing the value to be returned by the current function. On
560: machines that pass parameters in registers, the same register number
561: may be used for parameters as well, but this flag is not set on such
562: uses.
563: @end table
564:
565: @node Machine Modes, Constants, Flags, RTL
566: @section Machine Modes
567: @cindex machine modes
568:
569: @findex enum machine_mode
570: A machine mode describes a size of data object and the representation used
571: for it. In the C code, machine modes are represented by an enumeration
572: type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
573: expression has room for a machine mode and so do certain kinds of tree
574: expressions (declarations and types, to be precise).
575:
576: In debugging dumps and machine descriptions, the machine mode of an RTL
577: expression is written after the expression code with a colon to separate
578: them. The letters @samp{mode} which appear at the end of each machine mode
579: name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
580: expression with machine mode @code{SImode}. If the mode is
581: @code{VOIDmode}, it is not written at all.
582:
583: Here is a table of machine modes. The term ``byte'' below refers to an
584: object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
585:
586: @table @code
587: @findex QImode
588: @item QImode
589: ``Quarter-Integer'' mode represents a single byte treated as an integer.
590:
591: @findex HImode
592: @item HImode
593: ``Half-Integer'' mode represents a two-byte integer.
594:
595: @findex PSImode
596: @item PSImode
597: ``Partial Single Integer'' mode represents an integer which occupies
598: four bytes but which doesn't really use all four. On some machines,
599: this is the right mode to use for pointers.
600:
601: @findex SImode
602: @item SImode
603: ``Single Integer'' mode represents a four-byte integer.
604:
605: @findex PDImode
606: @item PDImode
607: ``Partial Double Integer'' mode represents an integer which occupies
608: eight bytes but which doesn't really use all eight. On some machines,
609: this is the right mode to use for certain pointers.
610:
611: @findex DImode
612: @item DImode
613: ``Double Integer'' mode represents an eight-byte integer.
614:
615: @findex TImode
616: @item TImode
617: ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
618:
619: @findex SFmode
620: @item SFmode
621: ``Single Floating'' mode represents a single-precision (four byte) floating
622: point number.
623:
624: @findex DFmode
625: @item DFmode
626: ``Double Floating'' mode represents a double-precision (eight byte) floating
627: point number.
628:
629: @findex XFmode
630: @item XFmode
631: ``Extended Floating'' mode represents a triple-precision (twelve byte)
632: floating point number. This mode is used for IEEE extended floating
633: point.
634:
635: @findex TFmode
636: @item TFmode
637: ``Tetra Floating'' mode represents a quadruple-precision (sixteen byte)
638: floating point number.
639:
640: @findex CCmode
641: @item CCmode
642: ``Condition Code'' mode represents the value of a condition code, which
643: is a machine-specific set of bits used to represent the result of a
644: comparison operation. Other machine-specific modes may also be used for
645: the condition code. These modes are not used on machines that use
646: @code{cc0} (see @pxref{Condition Code}).
647:
648: @findex BLKmode
649: @item BLKmode
650: ``Block'' mode represents values that are aggregates to which none of
651: the other modes apply. In RTL, only memory references can have this mode,
652: and only if they appear in string-move or vector instructions. On machines
653: which have no such instructions, @code{BLKmode} will not appear in RTL.
654:
655: @findex VOIDmode
656: @item VOIDmode
657: Void mode means the absence of a mode or an unspecified mode.
658: For example, RTL expressions of code @code{const_int} have mode
659: @code{VOIDmode} because they can be taken to have whatever mode the context
660: requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
661: the absence of any mode.
662:
663: @findex SCmode
664: @findex DCmode
665: @findex XCmode
666: @findex TCmode
667: @item SCmode, DCmode, XCmode, TCmode
668: These modes stand for a complex number represented as a pair of
669: floating point values. The values are in @code{SFmode}, @code{DFmode},
670: @code{XFmode}, and @code{TFmode}, respectively. Since C does not
671: support complex numbers, these machine modes are only partially
672: implemented.
673: @end table
674:
675: The machine description defines @code{Pmode} as a C macro which expands
676: into the machine mode used for addresses. Normally this is the mode
677: whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
678:
679: The only modes which a machine description @i{must} support are
680: @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
681: @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
682: The compiler will attempt to use @code{DImode} for 8-byte structures and
683: unions, but this can be prevented by overriding the definition of
684: @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
685: use @code{TImode} for 16-byte structures and unions. Likewise, you can
686: arrange for the C type @code{short int} to avoid using @code{HImode}.
687:
688: @cindex mode classes
689: Very few explicit references to machine modes remain in the compiler and
690: these few references will soon be removed. Instead, the machine modes
691: are divided into mode classes. These are represented by the enumeration
692: type @code{enum mode_class} defined in @file{machmode.h}. The possible
693: mode classes are:
694:
695: @table @code
696: @findex MODE_INT
697: @item MODE_INT
698: Integer modes. By default these are @code{QImode}, @code{HImode},
699: @code{SImode}, @code{DImode}, and @code{TImode}.
700:
701: @findex MODE_PARTIAL_INT
702: @item MODE_PARTIAL_INT
703: The ``partial integer'' modes, @code{PSImode} and @code{PDImode}.
704:
705: @findex MODE_FLOAT
706: @item MODE_FLOAT
707: floating point modes. By default these are @code{SFmode}, @code{DFmode},
708: @code{XFmode} and @code{TFmode}.
709:
710: @findex MODE_COMPLEX_INT
711: @item MODE_COMPLEX_INT
712: Complex integer modes. (These are not currently implemented).
713:
714: @findex MODE_COMPLEX_FLOAT
715: @item MODE_COMPLEX_FLOAT
716: Complex floating point modes. By default these are @code{SCmode},
717: @code{DCmode}, @code{XCmode}, and @code{TCmode}.
718:
719: @findex MODE_FUNCTION
720: @item MODE_FUNCTION
721: Algol or Pascal function variables including a static chain.
722: (These are not currently implemented).
723:
724: @findex MODE_CC
725: @item MODE_CC
726: Modes representing condition code values. These are @code{CCmode} plus
727: any modes listed in the @code{EXTRA_CC_MODES} macro. @xref{Jump Patterns},
728: also see @ref{Condition Code}.
729:
730: @findex MODE_RANDOM
731: @item MODE_RANDOM
732: This is a catchall mode class for modes which don't fit into the above
733: classes. Currently @code{VOIDmode} and @code{BLKmode} are in
734: @code{MODE_RANDOM}.
735: @end table
736:
737: Here are some C macros that relate to machine modes:
738:
739: @table @code
740: @findex GET_MODE
741: @item GET_MODE (@var{x})
742: Returns the machine mode of the RTX @var{x}.
743:
744: @findex PUT_MODE
745: @item PUT_MODE (@var{x}, @var{newmode})
746: Alters the machine mode of the RTX @var{x} to be @var{newmode}.
747:
748: @findex NUM_MACHINE_MODES
749: @item NUM_MACHINE_MODES
750: Stands for the number of machine modes available on the target
751: machine. This is one greater than the largest numeric value of any
752: machine mode.
753:
754: @findex GET_MODE_NAME
755: @item GET_MODE_NAME (@var{m})
756: Returns the name of mode @var{m} as a string.
757:
758: @findex GET_MODE_CLASS
759: @item GET_MODE_CLASS (@var{m})
760: Returns the mode class of mode @var{m}.
761:
762: @findex GET_MODE_WIDER_MODE
763: @item GET_MODE_WIDER_MODE (@var{m})
764: Returns the next wider natural mode. E.g.,
765: @code{GET_WIDER_MODE(QImode)} returns @code{HImode}.
766:
767: @findex GET_MODE_SIZE
768: @item GET_MODE_SIZE (@var{m})
769: Returns the size in bytes of a datum of mode @var{m}.
770:
771: @findex GET_MODE_BITSIZE
772: @item GET_MODE_BITSIZE (@var{m})
773: Returns the size in bits of a datum of mode @var{m}.
774:
775: @findex GET_MODE_MASK
776: @item GET_MODE_MASK (@var{m})
777: Returns a bitmask containing 1 for all bits in a word that fit within
778: mode @var{m}. This macro can only be used for modes whose bitsize is
779: less than or equal to @code{HOST_BITS_PER_INT}.
780:
781: @findex GET_MODE_ALIGNMENT
782: @item GET_MODE_ALIGNMENT (@var{m)})
783: Return the required alignment, in bits, for an object of mode @var{m}.
784:
785: @findex GET_MODE_UNIT_SIZE
786: @item GET_MODE_UNIT_SIZE (@var{m})
787: Returns the size in bytes of the subunits of a datum of mode @var{m}.
788: This is the same as @code{GET_MODE_SIZE} except in the case of complex
789: modes. For them, the unit size is the size of the real or imaginary
790: part.
791:
792: @findex GET_MODE_NUNITS
793: @item GET_MODE_NUNITS (@var{m})
794: Returns the number of units contained in a mode, i.e.,
795: @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
796:
797: @findex GET_CLASS_NARROWEST_MODE
798: @item GET_CLASS_NARROWEST_MODE (@var{c})
799: Returns the narrowest mode in mode class @var{c}.
800: @end table
801:
802: @findex byte_mode
803: @findex word_mode
804: The global variables @code{byte_mode} and @code{word_mode} contain
805: modes whose classes are @code{MODE_INT} and whose bitsizes are
806: @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
807: machines, these are @code{QImode} and @code{SImode}, respectively.
808:
809: @node Constants, Regs and Memory, Machine Modes, RTL
810: @section Constant Expression Types
811: @cindex RTL constants
812: @cindex RTL constant expression types
813:
814: The simplest RTL expressions are those that represent constant values.
815:
816: @table @code
817: @findex const_int
818: @item (const_int @var{i})
819: This type of expression represents the integer value @var{i}. @var{i}
820: is customarily accessed with the macro @code{INTVAL} as in
1.1.1.4 ! root 821: @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1.1 root 822:
823: @findex const0_rtx
824: @findex const1_rtx
825: @findex const2_rtx
826: @findex constm1_rtx
827: There is only one expression object for the integer value zero; it is
828: the value of the variable @code{const0_rtx}. Likewise, the only
829: expression for integer value one is found in @code{const1_rtx}, the only
830: expression for integer value two is found in @code{const2_rtx}, and the
831: only expression for integer value negative one is found in
832: @code{constm1_rtx}. Any attempt to create an expression of code
833: @code{const_int} and value zero, one, two or negative one will return
834: @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
835: @code{constm1_rtx} as appropriate.@refill
836:
837: @findex const_true_rtx
838: Similarly, there is only one object for the integer whose value is
839: @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
840: @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
841: @code{const1_rtx} will point to the same object. If
842: @code{STORE_FLAG_VALUE} is -1, @code{const_true_rtx} and
843: @code{constm1_rtx} will point to the same object.@refill
844:
845: @findex const_double
846: @item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
847: Represents either a floating-point constant of mode @var{m} or an
1.1.1.4 ! root 848: integer constant that is too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1.1 root 849: bits but small enough to fit within twice that number of bits (GNU CC
850: does not provide a mechanism to represent even larger constants). In
851: the latter case, @var{m} will be @code{VOIDmode}.
852:
853: @findex CONST_DOUBLE_MEM
854: @findex CONST_DOUBLE_CHAIN
855: @var{addr} is used to contain the @code{mem} expression that corresponds
856: to the location in memory that at which the constant can be found. If
857: it has not been allocated a memory location, but is on the chain of all
858: @code{const_double} expressions in this compilation (maintained using an
859: undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
860: on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
861: customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
862: chain field via @code{CONST_DOUBLE_CHAIN}.@refill
863:
864: @findex CONST_DOUBLE_LOW
1.1.1.2 root 865: If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1.1 root 866: @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
867: @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
868:
869: If the constant is floating point (either single or double precision),
870: then the number of integers used to store the value depends on the size
871: of @code{REAL_VALUE_TYPE} (@pxref{Cross-compilation}). The integers
872: represent a @code{double}. To convert them to a @code{double}, do
873:
874: @example
875: union real_extract u;
876: bcopy (&CONST_DOUBLE_LOW (x), &u, sizeof u);
877: @end example
878:
879: @noindent
880: and then refer to @code{u.d}.
881:
882: @findex CONST0_RTX
883: @findex CONST1_RTX
884: @findex CONST2_RTX
885: The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
886: value 0 in mode @var{mode}. If mode @var{mode} is of mode class
887: @code{MODE_INT}, it returns @code{const0_rtx}. Otherwise, it returns a
888: @code{CONST_DOUBLE} expression in mode @var{mode}. Similarly, the macro
889: @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
890: mode @var{mode} and similarly for @code{CONST2_RTX}.
891:
892: @findex const_string
893: @item (const_string @var{str})
894: Represents a constant string with value @var{str}. Currently this is
895: used only for insn attributes (@pxref{Insn Attributes}) since constant
896: strings in C are placed in memory.
897:
898: @findex symbol_ref
1.1.1.2 root 899: @item (symbol_ref:@var{mode} @var{symbol})
1.1 root 900: Represents the value of an assembler label for data. @var{symbol} is
901: a string that describes the name of the assembler label. If it starts
902: with a @samp{*}, the label is the rest of @var{symbol} not including
903: the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
904: with @samp{_}.
905:
1.1.1.2 root 906: The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
907: Usually that is the only mode for which a symbol is directly valid.
908:
1.1 root 909: @findex label_ref
910: @item (label_ref @var{label})
911: Represents the value of an assembler label for code. It contains one
912: operand, an expression, which must be a @code{code_label} that appears
913: in the instruction sequence to identify the place where the label
914: should go.
915:
916: The reason for using a distinct expression type for code label
917: references is so that jump optimization can distinguish them.
918:
919: @item (const:@var{m} @var{exp})
920: Represents a constant that is the result of an assembly-time
921: arithmetic computation. The operand, @var{exp}, is an expression that
922: contains only constants (@code{const_int}, @code{symbol_ref} and
923: @code{label_ref} expressions) combined with @code{plus} and
924: @code{minus}. However, not all combinations are valid, since the
925: assembler cannot do arbitrary arithmetic on relocatable symbols.
926:
927: @var{m} should be @code{Pmode}.
928:
929: @findex high
930: @item (high:@var{m} @var{exp})
931: Represents the high-order bits of @var{exp}, usually a
932: @code{symbol_ref}. The number of bits is machine-dependent and is
933: normally the number of bits specified in an instruction that initializes
934: the high order bits of a register. It is used with @code{lo_sum} to
935: represent the typical two-instruction sequence used in RISC machines to
936: reference a global memory location.
937:
938: @var{m} should be @code{Pmode}.
939: @end table
940:
941: @node Regs and Memory, Arithmetic, Constants, RTL
942: @section Registers and Memory
943: @cindex RTL register expressions
944: @cindex RTL memory expressions
945:
946: Here are the RTL expression types for describing access to machine
947: registers and to main memory.
948:
949: @table @code
950: @findex reg
951: @cindex hard registers
952: @cindex pseudo registers
953: @item (reg:@var{m} @var{n})
954: For small values of the integer @var{n} (less than
955: @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
956: register number @var{n}: a @dfn{hard register}. For larger values of
957: @var{n}, it stands for a temporary value or @dfn{pseudo register}.
958: The compiler's strategy is to generate code assuming an unlimited
959: number of such pseudo registers, and later convert them into hard
960: registers or into memory references.
961:
962: @var{m} is the machine mode of the reference. It is necessary because
963: machines can generally refer to each register in more than one mode.
964: For example, a register may contain a full word but there may be
965: instructions to refer to it as a half word or as a single byte, as
966: well as instructions to refer to it as a floating point number of
967: various precisions.
968:
969: Even for a register that the machine can access in only one mode,
970: the mode must always be specified.
971:
972: The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
973: description, since the number of hard registers on the machine is an
974: invariant characteristic of the machine. Note, however, that not
975: all of the machine registers must be general registers. All the
976: machine registers that can be used for storage of data are given
977: hard register numbers, even those that can be used only in certain
978: instructions or can hold only certain types of data.
979:
980: A hard register may be accessed in various modes throughout one
981: function, but each pseudo register is given a natural mode
982: and is accessed only in that mode. When it is necessary to describe
983: an access to a pseudo register using a nonnatural mode, a @code{subreg}
984: expression is used.
985:
986: A @code{reg} expression with a machine mode that specifies more than
987: one word of data may actually stand for several consecutive registers.
988: If in addition the register number specifies a hardware register, then
989: it actually represents several consecutive hardware registers starting
990: with the specified one.
991:
992: Each pseudo register number used in a function's RTL code is
993: represented by a unique @code{reg} expression.
994:
995: @findex FIRST_VIRTUAL_REGISTER
996: @findex LAST_VIRTUAL_REGISTER
997: Some pseudo register numbers, those within the range of
998: @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
999: appear during the RTL generation phase and are eliminated before the
1000: optimization phases. These represent locations in the stack frame that
1001: cannot be determined until RTL generation for the function has been
1002: completed. The following virtual register numbers are defined:
1003:
1004: @table @code
1005: @findex VIRTUAL_INCOMING_ARGS_REGNUM
1006: @item VIRTUAL_INCOMING_ARGS_REGNUM
1007: This points to the first word of the incoming arguments passed on the
1008: stack. Normally these arguments are placed there by the caller, but the
1009: callee may have pushed some arguments that were previously passed in
1010: registers.
1011:
1012: @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1013: @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1014: When RTL generation is complete, this virtual register is replaced
1015: by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1016: value of @code{FIRST_PARM_OFFSET}.
1017:
1018: @findex VIRTUAL_STACK_VARS_REGNUM
1019: @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1020: @item VIRTUAL_STACK_VARS_REGNUM
1021: If @code{FRAME_GROWS_DOWNWARDS} is defined, this points to immediately
1022: above the first variable on the stack. Otherwise, it points to the
1023: first variable on the stack.
1024:
1025: @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1026: @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1027: It is replaced with the sum of the register given by
1028: @code{FRAME_POINTER_REGNUM} and the value @code{STARTING_FRAME_OFFSET}.
1029:
1030: @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1031: @item VIRTUAL_STACK_DYNAMIC_REGNUM
1032: This points to the location of dynamically allocated memory on the stack
1033: immediately after the stack pointer has been adjusted by the amount of
1034: memory desired.
1035:
1036: @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1037: @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1038: It is replaced by the sum of the register given by
1039: @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1040:
1041: @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1042: @item VIRTUAL_OUTGOING_ARGS_REGNUM
1043: This points to the location in the stack at which outgoing arguments
1044: should be written when the stack is pre-pushed (arguments pushed using
1045: push insns should always use @code{STACK_POINTER_REGNUM}).
1046:
1047: @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1048: It is replaced by the sum of the register given by
1049: @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1050: @end table
1051:
1052: @findex subreg
1053: @item (subreg:@var{m} @var{reg} @var{wordnum})
1054: @code{subreg} expressions are used to refer to a register in a machine
1055: mode other than its natural one, or to refer to one register of
1056: a multi-word @code{reg} that actually refers to several registers.
1057:
1058: Each pseudo-register has a natural mode. If it is necessary to
1059: operate on it in a different mode---for example, to perform a fullword
1060: move instruction on a pseudo-register that contains a single
1061: byte---the pseudo-register must be enclosed in a @code{subreg}. In
1062: such a case, @var{wordnum} is zero.
1063:
1064: Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
1065: case it is restricting consideration to only the bits of @var{reg} that
1066: are in @var{m}. However, sometimes @var{m} is wider than the mode of
1067: @var{reg}. These @code{subreg} expressions are often called
1068: @dfn{paradoxical}. They are used in cases where we want to refer to an
1069: object in a wider mode but do not care what value the additional bits
1070: have. The reload pass ensures that paradoxical references are only
1071: made to hard registers.
1072:
1073: The other use of @code{subreg} is to extract the individual registers of
1074: a multi-register value. Machine modes such as @code{DImode} and
1075: @code{TImode} can indicate values longer than a word, values which
1076: usually require two or more consecutive registers. To access one of the
1077: registers, use a @code{subreg} with mode @code{SImode} and a
1078: @var{wordnum} that says which register.
1079:
1080: @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1081: The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
1082: that word number zero is the most significant part; otherwise, it is
1083: the least significant part.
1084:
1085: @cindex combiner pass
1086: @cindex reload pass
1087: @cindex @code{subreg}, special reload handling
1088: Between the combiner pass and the reload pass, it is possible to have a
1089: paradoxical @code{subreg} which contains a @code{mem} instead of a
1090: @code{reg} as its first operand. After the reload pass, it is also
1091: possible to have a non-paradoxical @code{subreg} which contains a
1092: @code{mem}; this usually occurs when the @code{mem} is a stack slot
1093: which replaced a pseudo register.
1094:
1095: Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
1096: using a @code{subreg}. On some machines the most significant part of a
1097: @code{DFmode} value does not have the same format as a single-precision
1098: floating value.
1099:
1100: It is also not valid to access a single word of a multi-word value in a
1101: hard register when less registers can hold the value than would be
1102: expected from its size. For example, some 32-bit machines have
1103: floating-point registers that can hold an entire @code{DFmode} value.
1104: If register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)}
1105: would be invalid because there is no way to convert that reference to
1106: a single machine register. The reload pass prevents @code{subreg}
1107: expressions such as these from being formed.
1108:
1109: @findex SUBREG_REG
1110: @findex SUBREG_WORD
1111: The first operand of a @code{subreg} expression is customarily accessed
1112: with the @code{SUBREG_REG} macro and the second operand is customarily
1113: accessed with the @code{SUBREG_WORD} macro.
1114:
1115: @findex scratch
1116: @cindex scratch operands
1117: @item (scratch:@var{m})
1118: This represents a scratch register that will be required for the
1119: execution of a single instruction and not used subsequently. It is
1120: converted into a @code{reg} by either the local register allocator or
1121: the reload pass.
1122:
1123: @code{scratch} is usually present inside a @code{clobber} operation
1124: (@pxref{Side Effects}).
1125:
1126: @findex cc0
1127: @cindex condition code register
1128: @item (cc0)
1129: This refers to the machine's condition code register. It has no
1130: operands and may not have a machine mode. There are two ways to use it:
1131:
1132: @itemize @bullet
1133: @item
1134: To stand for a complete set of condition code flags. This is best on
1135: most machines, where each comparison sets the entire series of flags.
1136:
1137: With this technique, @code{(cc0)} may be validly used in only two
1138: contexts: as the destination of an assignment (in test and compare
1139: instructions) and in comparison operators comparing against zero
1140: (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1141:
1142: @item
1143: To stand for a single flag that is the result of a single condition.
1144: This is useful on machines that have only a single flag bit, and in
1145: which comparison instructions must specify the condition to test.
1146:
1147: With this technique, @code{(cc0)} may be validly used in only two
1148: contexts: as the destination of an assignment (in test and compare
1149: instructions) where the source is a comparison operator, and as the
1150: first operand of @code{if_then_else} (in a conditional branch).
1151: @end itemize
1152:
1153: @findex cc0_rtx
1154: There is only one expression object of code @code{cc0}; it is the
1155: value of the variable @code{cc0_rtx}. Any attempt to create an
1156: expression of code @code{cc0} will return @code{cc0_rtx}.
1157:
1158: Instructions can set the condition code implicitly. On many machines,
1159: nearly all instructions set the condition code based on the value that
1160: they compute or store. It is not necessary to record these actions
1161: explicitly in the RTL because the machine description includes a
1162: prescription for recognizing the instructions that do so (by means of
1163: the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
1164: instructions whose sole purpose is to set the condition code, and
1165: instructions that use the condition code, need mention @code{(cc0)}.
1166:
1167: On some machines, the condition code register is given a register number
1168: and a @code{reg} is used instead of @code{(cc0)}. This is usually the
1169: preferable approach if only a small subset of instructions modify the
1170: condition code. Other machines store condition codes in general
1171: registers; in such cases a pseudo register should be used.
1172:
1173: Some machines, such as the Sparc and RS/6000, have two sets of
1174: arithmetic instructions, one that sets and one that does not set the
1175: condition code. This is best handled by normally generating the
1176: instruction that does not set the condition code, and making a pattern
1177: that both performs the arithmetic and sets the condition code register
1178: (which would not be @code{(cc0)} in this case). For examples, search
1179: for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
1180:
1181: @findex pc
1182: @item (pc)
1183: @cindex program counter
1184: This represents the machine's program counter. It has no operands and
1185: may not have a machine mode. @code{(pc)} may be validly used only in
1186: certain specific contexts in jump instructions.
1187:
1188: @findex pc_rtx
1189: There is only one expression object of code @code{pc}; it is the value
1190: of the variable @code{pc_rtx}. Any attempt to create an expression of
1191: code @code{pc} will return @code{pc_rtx}.
1192:
1193: All instructions that do not jump alter the program counter implicitly
1194: by incrementing it, but there is no need to mention this in the RTL.
1195:
1196: @findex mem
1197: @item (mem:@var{m} @var{addr})
1198: This RTX represents a reference to main memory at an address
1199: represented by the expression @var{addr}. @var{m} specifies how large
1200: a unit of memory is accessed.
1201: @end table
1202:
1203: @node Arithmetic, Comparisons, Regs and Memory, RTL
1204: @section RTL Expressions for Arithmetic
1205: @cindex arithmetic, in RTL
1206: @cindex math, in RTL
1207: @cindex RTL expressions for arithmetic
1208:
1209: Unless otherwise specified, all the operands of arithmetic expressions
1210: must be valid for mode @var{m}. An operand is valid for mode @var{m}
1211: if it has mode @var{m}, or if it is a @code{const_int} or
1212: @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
1213:
1214: For commutative binary operations, constants should be placed in the
1215: second operand.
1216:
1217: @table @code
1218: @findex plus
1219: @cindex RTL addition
1220: @cindex RTL sum
1221: @item (plus:@var{m} @var{x} @var{y})
1222: Represents the sum of the values represented by @var{x} and @var{y}
1223: carried out in machine mode @var{m}.
1224:
1225: @findex lo_sum
1226: @item (lo_sum:@var{m} @var{x} @var{y})
1227: Like @code{plus}, except that it represents that sum of @var{x} and the
1228: low-order bits of @var{y}. The number of low order bits is
1229: machine-dependent but is normally the number of bits in a @code{Pmode}
1230: item minus the number of bits set by the @code{high} code
1231: (@pxref{Constants}).
1232:
1233: @var{m} should be @code{Pmode}.
1234:
1235: @findex minus
1236: @cindex RTL subtraction
1237: @cindex RTL difference
1238: @item (minus:@var{m} @var{x} @var{y})
1239: Like @code{plus} but represents subtraction.
1240:
1241: @findex compare
1242: @cindex RTL comparison
1243: @item (compare:@var{m} @var{x} @var{y})
1244: Represents the result of subtracting @var{y} from @var{x} for purposes
1245: of comparison. The result is computed without overflow, as if with
1246: infinite precision.
1247:
1248: Of course, machines can't really subtract with infinite precision.
1249: However, they can pretend to do so when only the sign of the
1250: result will be used, which is the case when the result is stored
1251: in the condition code. And that is the only way this kind of expression
1252: may validly be used: as a value to be stored in the condition codes.
1253:
1254: The mode @var{m} is not related to the modes of @var{x} and @var{y},
1255: but instead is the mode of the condition code value. If @code{(cc0)}
1256: is used, it is @code{VOIDmode}. Otherwise it is some mode in class
1257: @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}.
1258:
1259: Normally, @var{x} and @var{y} must have the same mode. Otherwise,
1260: @code{compare} is valid only if the mode of @var{x} is in class
1261: @code{MODE_INT} and @var{y} is a @code{const_int} or
1262: @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
1263: determines what mode the comparison is to be done in; thus it must not
1264: be @code{VOIDmode}.
1265:
1266: If one of the operands is a constant, it should be placed in the
1267: second operand and the comparison code adjusted as appropriate.
1268:
1269: A @code{compare} specifying two @code{VOIDmode} constants is not valid
1270: since there is no way to know in what mode the comparison is to be
1271: performed; the comparison must either be folded during the compilation
1272: or the first operand must be loaded into a register while its mode is
1273: still known.
1274:
1275: @findex neg
1276: @item (neg:@var{m} @var{x})
1277: Represents the negation (subtraction from zero) of the value represented
1278: by @var{x}, carried out in mode @var{m}.
1279:
1280: @findex mult
1281: @cindex multiplication
1282: @cindex product
1283: @item (mult:@var{m} @var{x} @var{y})
1284: Represents the signed product of the values represented by @var{x} and
1285: @var{y} carried out in machine mode @var{m}.
1286:
1287: Some machines support a multiplication that generates a product wider
1288: than the operands. Write the pattern for this as
1289:
1290: @example
1291: (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
1292: @end example
1293:
1294: where @var{m} is wider than the modes of @var{x} and @var{y}, which need
1295: not be the same.
1296:
1297: Write patterns for unsigned widening multiplication similarly using
1298: @code{zero_extend}.
1299:
1300: @findex div
1301: @cindex division
1302: @cindex signed division
1303: @cindex quotient
1304: @item (div:@var{m} @var{x} @var{y})
1305: Represents the quotient in signed division of @var{x} by @var{y},
1306: carried out in machine mode @var{m}. If @var{m} is a floating point
1307: mode, it represents the exact quotient; otherwise, the integerized
1308: quotient.
1309:
1310: Some machines have division instructions in which the operands and
1311: quotient widths are not all the same; you should represent
1312: such instructions using @code{truncate} and @code{sign_extend} as in,
1313:
1314: @example
1315: (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
1316: @end example
1317:
1318: @findex udiv
1319: @cindex unsigned division
1320: @cindex division
1321: @item (udiv:@var{m} @var{x} @var{y})
1322: Like @code{div} but represents unsigned division.
1323:
1324: @findex mod
1325: @findex umod
1326: @cindex remainder
1327: @cindex division
1328: @item (mod:@var{m} @var{x} @var{y})
1329: @itemx (umod:@var{m} @var{x} @var{y})
1330: Like @code{div} and @code{udiv} but represent the remainder instead of
1331: the quotient.
1332:
1333: @findex smin
1334: @findex smax
1335: @cindex signed minimum
1336: @cindex signed maximum
1337: @item (smin:@var{m} @var{x} @var{y})
1338: @itemx (smax:@var{m} @var{x} @var{y})
1339: Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
1340: @var{x} and @var{y}, interpreted as signed integers in mode @var{m}.
1341:
1342: @findex umin
1343: @findex umax
1344: @cindex unsigned minimum and maximum
1345: @item (umin:@var{m} @var{x} @var{y})
1346: @itemx (umax:@var{m} @var{x} @var{y})
1347: Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
1348: integers.
1349:
1350: @findex not
1351: @cindex complement, bitwise
1352: @cindex bitwise complement
1353: @item (not:@var{m} @var{x})
1354: Represents the bitwise complement of the value represented by @var{x},
1355: carried out in mode @var{m}, which must be a fixed-point machine mode.
1356:
1357: @findex and
1358: @cindex logical-and, bitwise
1359: @cindex bitwise logical-and
1360: @item (and:@var{m} @var{x} @var{y})
1361: Represents the bitwise logical-and of the values represented by
1362: @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
1363: a fixed-point machine mode.
1364:
1365: @findex ior
1366: @cindex inclusive-or, bitwise
1367: @cindex bitwise inclusive-or
1368: @item (ior:@var{m} @var{x} @var{y})
1369: Represents the bitwise inclusive-or of the values represented by @var{x}
1370: and @var{y}, carried out in machine mode @var{m}, which must be a
1371: fixed-point mode.
1372:
1373: @findex xor
1374: @cindex exclusive-or, bitwise
1375: @cindex bitwise exclusive-or
1376: @item (xor:@var{m} @var{x} @var{y})
1377: Represents the bitwise exclusive-or of the values represented by @var{x}
1378: and @var{y}, carried out in machine mode @var{m}, which must be a
1379: fixed-point mode.
1380:
1381: @findex ashift
1382: @cindex left shift
1383: @cindex shift
1384: @cindex arithmetic shift
1385: @item (ashift:@var{m} @var{x} @var{c})
1386: Represents the result of arithmetically shifting @var{x} left by @var{c}
1387: places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
1388: be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
1389: mode is determined by the mode called for in the machine description
1390: entry for the left-shift instruction. For example, on the Vax, the mode
1391: of @var{c} is @code{QImode} regardless of @var{m}.
1392:
1393: @findex lshift
1394: @cindex left shift
1395: @cindex logical shift
1396: @item (lshift:@var{m} @var{x} @var{c})
1.1.1.2 root 1397: Like @code{ashift} but for logical left shift. @code{ashift} and
1.1 root 1398: @code{lshift} are identical operations; we customarily use @code{ashift}
1399: for both.
1400:
1401: @findex lshiftrt
1402: @cindex right shift
1403: @findex ashiftrt
1404: @item (lshiftrt:@var{m} @var{x} @var{c})
1405: @itemx (ashiftrt:@var{m} @var{x} @var{c})
1406: Like @code{lshift} and @code{ashift} but for right shift. Unlike
1407: the case for left shift, these two operations are distinct.
1408:
1409: @findex rotate
1410: @cindex rotate
1411: @cindex left rotate
1412: @findex rotatert
1413: @cindex right rotate
1414: @item (rotate:@var{m} @var{x} @var{c})
1415: @itemx (rotatert:@var{m} @var{x} @var{c})
1416: Similar but represent left and right rotate. If @var{c} is a constant,
1417: use @code{rotate}.
1418:
1419: @findex abs
1420: @cindex absolute value
1421: @item (abs:@var{m} @var{x})
1422: Represents the absolute value of @var{x}, computed in mode @var{m}.
1423:
1424: @findex sqrt
1425: @cindex square root
1426: @item (sqrt:@var{m} @var{x})
1427: Represents the square root of @var{x}, computed in mode @var{m}.
1428: Most often @var{m} will be a floating point mode.
1429:
1430: @findex ffs
1431: @item (ffs:@var{m} @var{x})
1432: Represents one plus the index of the least significant 1-bit in
1433: @var{x}, represented as an integer of mode @var{m}. (The value is
1434: zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
1435: depending on the target machine, various mode combinations may be
1436: valid.
1437: @end table
1438:
1439: @node Comparisons, Bit Fields, Arithmetic, RTL
1440: @section Comparison Operations
1441: @cindex RTL comparison operations
1442:
1443: Comparison operators test a relation on two operands and are considered
1444: to represent a machine-dependent nonzero value described by, but not
1445: necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
1446: if the relation holds, or zero if it does not. The mode of the
1447: comparison operation is independent of the mode of the data being
1448: compared. If the comparison operation is being tested (e.g., the first
1449: operand of an @code{if_then_else}), the mode must be @code{VOIDmode}.
1450: If the comparison operation is producing data to be stored in some
1451: variable, the mode must be in class @code{MODE_INT}. All comparison
1452: operations producing data must use the same mode, which is
1453: machine-specific.
1454:
1455: @cindex condition codes
1456: There are two ways that comparison operations may be used. The
1457: comparison operators may be used to compare the condition codes
1458: @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
1459: a construct actually refers to the result of the preceding instruction
1460: in which the condition codes were set. The instructing setting the
1461: condition code must be adjacent to the instruction using the condition
1462: code; only @code{note} insns may separate them.
1463:
1464: Alternatively, a comparison operation may directly compare two data
1465: objects. The mode of the comparison is determined by the operands; they
1466: must both be valid for a common machine mode. A comparison with both
1467: operands constant would be invalid as the machine mode could not be
1468: deduced from it, but such a comparison should never exist in RTL due to
1469: constant folding.
1470:
1471: In the example above, if @code{(cc0)} were last set to
1472: @code{(compare @var{x} @var{y})}, the comparison operation is
1473: identical to @code{(eq @var{x} @var{y})}. Usually only one style
1474: of comparisons is supported on a particular machine, but the combine
1475: pass will try to merge the operations to produce the @code{eq} shown
1476: in case it exists in the context of the particular insn involved.
1477:
1478: Inequality comparisons come in two flavors, signed and unsigned. Thus,
1479: there are distinct expression codes @code{gt} and @code{gtu} for signed and
1480: unsigned greater-than. These can produce different results for the same
1481: pair of integer values: for example, 1 is signed greater-than -1 but not
1482: unsigned greater-than, because -1 when regarded as unsigned is actually
1483: @code{0xffffffff} which is greater than 1.
1484:
1485: The signed comparisons are also used for floating point values. Floating
1486: point comparisons are distinguished by the machine modes of the operands.
1487:
1488: @table @code
1489: @findex eq
1490: @cindex equal
1491: @item (eq:@var{m} @var{x} @var{y})
1492: 1 if the values represented by @var{x} and @var{y} are equal,
1493: otherwise 0.
1494:
1495: @findex ne
1496: @cindex not equal
1497: @item (ne:@var{m} @var{x} @var{y})
1498: 1 if the values represented by @var{x} and @var{y} are not equal,
1499: otherwise 0.
1500:
1501: @findex gt
1502: @cindex greater than
1503: @item (gt:@var{m} @var{x} @var{y})
1504: 1 if the @var{x} is greater than @var{y}. If they are fixed-point,
1505: the comparison is done in a signed sense.
1506:
1507: @findex gtu
1508: @cindex greater than
1509: @cindex unsigned greater than
1510: @item (gtu:@var{m} @var{x} @var{y})
1511: Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
1512:
1513: @findex lt
1514: @cindex less than
1515: @findex ltu
1516: @cindex unsigned less than
1517: @item (lt:@var{m} @var{x} @var{y})
1518: @itemx (ltu:@var{m} @var{x} @var{y})
1519: Like @code{gt} and @code{gtu} but test for ``less than''.
1520:
1521: @findex ge
1522: @cindex greater than
1523: @findex geu
1524: @cindex unsigned greater than
1525: @item (ge:@var{m} @var{x} @var{y})
1526: @itemx (geu:@var{m} @var{x} @var{y})
1527: Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
1528:
1529: @findex le
1530: @cindex less than or equal
1531: @findex leu
1532: @cindex unsigned less than
1533: @item (le:@var{m} @var{x} @var{y})
1534: @itemx (leu:@var{m} @var{x} @var{y})
1535: Like @code{gt} and @code{gtu} but test for ``less than or equal''.
1536:
1537: @findex if_then_else
1538: @item (if_then_else @var{cond} @var{then} @var{else})
1539: This is not a comparison operation but is listed here because it is
1540: always used in conjunction with a comparison operation. To be
1541: precise, @var{cond} is a comparison expression. This expression
1542: represents a choice, according to @var{cond}, between the value
1543: represented by @var{then} and the one represented by @var{else}.
1544:
1545: On most machines, @code{if_then_else} expressions are valid only
1546: to express conditional jumps.
1547:
1548: @findex cond
1549: @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
1550: Similar to @code{if_then_else}, but more general. Each of @var{test1},
1551: @var{test2}, @dots{} is performed in turn. The result of this expression is
1552: the @var{value} corresponding to the first non-zero test, or @var{default} if
1553: none of the tests are non-zero expressions.
1554:
1555: This is currently not valid for instruction patterns and is supported only
1556: for insn attributes. @xref{Insn Attributes}.
1557: @end table
1558:
1559: @node Bit Fields, Conversions, Comparisons, RTL
1560: @section Bit Fields
1561: @cindex bit fields
1562:
1563: Special expression codes exist to represent bit-field instructions.
1564: These types of expressions are lvalues in RTL; they may appear
1565: on the left side of an assignment, indicating insertion of a value
1566: into the specified bit field.
1567:
1568: @table @code
1569: @findex sign_extract
1570: @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
1571: @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
1572: This represents a reference to a sign-extended bit field contained or
1573: starting in @var{loc} (a memory or register reference). The bit field
1574: is @var{size} bits wide and starts at bit @var{pos}. The compilation
1575: option @code{BITS_BIG_ENDIAN} says which end of the memory unit
1576: @var{pos} counts from.
1577:
1578: If @var{loc} is in memory, its mode must be a single-byte integer mode.
1579: If @var{loc} is in a register, the mode to use is specified by the
1580: operand of the @code{insv} or @code{extv} pattern
1581: (@pxref{Standard Names}) and is usually a full-word integer mode.
1582:
1583: The mode of @var{pos} is machine-specific and is also specified
1584: in the @code{insv} or @code{extv} pattern.
1585:
1586: The mode @var{m} is the same as the mode that would be used for
1587: @var{loc} if it were a register.
1588:
1589: @findex zero_extract
1590: @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
1591: Like @code{sign_extract} but refers to an unsigned or zero-extended
1592: bit field. The same sequence of bits are extracted, but they
1593: are filled to an entire word with zeros instead of by sign-extension.
1594: @end table
1595:
1596: @node Conversions, RTL Declarations, Bit Fields, RTL
1597: @section Conversions
1598: @cindex conversions
1599: @cindex machine mode conversions
1600:
1601: All conversions between machine modes must be represented by
1602: explicit conversion operations. For example, an expression
1603: which is the sum of a byte and a full word cannot be written as
1604: @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
1605: operation requires two operands of the same machine mode.
1606: Therefore, the byte-sized operand is enclosed in a conversion
1607: operation, as in
1608:
1609: @example
1610: (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
1611: @end example
1612:
1613: The conversion operation is not a mere placeholder, because there
1614: may be more than one way of converting from a given starting mode
1615: to the desired final mode. The conversion operation code says how
1616: to do it.
1617:
1618: For all conversion operations, @var{x} must not be @code{VOIDmode}
1619: because the mode in which to do the conversion would not be known.
1620: The conversion must either be done at compile-time or @var{x}
1621: must be placed into a register.
1622:
1623: @table @code
1624: @findex sign_extend
1625: @item (sign_extend:@var{m} @var{x})
1626: Represents the result of sign-extending the value @var{x}
1627: to machine mode @var{m}. @var{m} must be a fixed-point mode
1628: and @var{x} a fixed-point value of a mode narrower than @var{m}.
1629:
1630: @findex zero_extend
1631: @item (zero_extend:@var{m} @var{x})
1632: Represents the result of zero-extending the value @var{x}
1633: to machine mode @var{m}. @var{m} must be a fixed-point mode
1634: and @var{x} a fixed-point value of a mode narrower than @var{m}.
1635:
1636: @findex float_extend
1637: @item (float_extend:@var{m} @var{x})
1638: Represents the result of extending the value @var{x}
1639: to machine mode @var{m}. @var{m} must be a floating point mode
1640: and @var{x} a floating point value of a mode narrower than @var{m}.
1641:
1642: @findex truncate
1643: @item (truncate:@var{m} @var{x})
1644: Represents the result of truncating the value @var{x}
1645: to machine mode @var{m}. @var{m} must be a fixed-point mode
1646: and @var{x} a fixed-point value of a mode wider than @var{m}.
1647:
1648: @findex float_truncate
1649: @item (float_truncate:@var{m} @var{x})
1650: Represents the result of truncating the value @var{x}
1651: to machine mode @var{m}. @var{m} must be a floating point mode
1652: and @var{x} a floating point value of a mode wider than @var{m}.
1653:
1654: @findex float
1655: @item (float:@var{m} @var{x})
1656: Represents the result of converting fixed point value @var{x},
1657: regarded as signed, to floating point mode @var{m}.
1658:
1659: @findex unsigned_float
1660: @item (unsigned_float:@var{m} @var{x})
1661: Represents the result of converting fixed point value @var{x},
1662: regarded as unsigned, to floating point mode @var{m}.
1663:
1664: @findex fix
1665: @item (fix:@var{m} @var{x})
1666: When @var{m} is a fixed point mode, represents the result of
1667: converting floating point value @var{x} to mode @var{m}, regarded as
1668: signed. How rounding is done is not specified, so this operation may
1669: be used validly in compiling C code only for integer-valued operands.
1670:
1671: @findex unsigned_fix
1672: @item (unsigned_fix:@var{m} @var{x})
1673: Represents the result of converting floating point value @var{x} to
1674: fixed point mode @var{m}, regarded as unsigned. How rounding is done
1675: is not specified.
1676:
1677: @findex fix
1678: @item (fix:@var{m} @var{x})
1679: When @var{m} is a floating point mode, represents the result of
1680: converting floating point value @var{x} (valid for mode @var{m}) to an
1681: integer, still represented in floating point mode @var{m}, by rounding
1682: towards zero.
1683: @end table
1684:
1685: @node RTL Declarations, Side Effects, Conversions, RTL
1686: @section Declarations
1687: @cindex RTL declarations
1688: @cindex declarations, RTL
1689:
1690: Declaration expression codes do not represent arithmetic operations
1691: but rather state assertions about their operands.
1692:
1693: @table @code
1694: @findex strict_low_part
1695: @cindex @code{subreg}, in @code{strict_low_part}
1696: @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
1.1.1.4 ! root 1697: This expression code is used in only one context: as the destination operand of a
1.1 root 1698: @code{set} expression. In addition, the operand of this expression
1699: must be a non-paradoxical @code{subreg} expression.
1700:
1701: The presence of @code{strict_low_part} says that the part of the
1702: register which is meaningful in mode @var{n}, but is not part of
1703: mode @var{m}, is not to be altered. Normally, an assignment to such
1704: a subreg is allowed to have undefined effects on the rest of the
1705: register when @var{m} is less than a word.
1706: @end table
1707:
1708: @node Side Effects, Incdec, RTL Declarations, RTL
1709: @section Side Effect Expressions
1710: @cindex RTL side effect expressions
1711:
1712: The expression codes described so far represent values, not actions.
1713: But machine instructions never produce values; they are meaningful
1714: only for their side effects on the state of the machine. Special
1715: expression codes are used to represent side effects.
1716:
1717: The body of an instruction is always one of these side effect codes;
1718: the codes described above, which represent values, appear only as
1719: the operands of these.
1720:
1721: @table @code
1722: @findex set
1723: @item (set @var{lval} @var{x})
1724: Represents the action of storing the value of @var{x} into the place
1725: represented by @var{lval}. @var{lval} must be an expression
1726: representing a place that can be stored in: @code{reg} (or
1727: @code{subreg} or @code{strict_low_part}), @code{mem}, @code{pc} or
1728: @code{cc0}.@refill
1729:
1730: If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
1731: machine mode; then @var{x} must be valid for that mode.@refill
1732:
1733: If @var{lval} is a @code{reg} whose machine mode is less than the full
1734: width of the register, then it means that the part of the register
1735: specified by the machine mode is given the specified value and the
1736: rest of the register receives an undefined value. Likewise, if
1737: @var{lval} is a @code{subreg} whose machine mode is narrower than
1738: the mode of the register, the rest of the register can be changed in
1739: an undefined way.
1740:
1741: If @var{lval} is a @code{strict_low_part} of a @code{subreg}, then the
1742: part of the register specified by the machine mode of the
1743: @code{subreg} is given the value @var{x} and the rest of the register
1744: is not changed.@refill
1745:
1746: If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
1747: be either a @code{compare} expression or a value that may have any mode.
1748: The latter case represents a ``test'' instruction. The expression
1749: @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
1750: @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
1751: Use the former expression to save space during the compilation.
1752:
1753: @cindex jump instructions and @code{set}
1754: @cindex @code{if_then_else} usage
1755: If @var{lval} is @code{(pc)}, we have a jump instruction, and the
1756: possibilities for @var{x} are very limited. It may be a
1757: @code{label_ref} expression (unconditional jump). It may be an
1758: @code{if_then_else} (conditional jump), in which case either the
1759: second or the third operand must be @code{(pc)} (for the case which
1760: does not jump) and the other of the two must be a @code{label_ref}
1761: (for the case which does jump). @var{x} may also be a @code{mem} or
1762: @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
1763: @code{mem}; these unusual patterns are used to represent jumps through
1764: branch tables.@refill
1765:
1766: If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
1767: @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
1768: valid for the mode of @var{lval}.
1769:
1770: @findex SET_DEST
1771: @findex SET_SRC
1772: @var{lval} is customarily accessed with the @code{SET_DEST} macro and
1773: @var{x} with the @code{SET_SRC} macro.
1774:
1775: @findex return
1776: @item (return)
1777: As the sole expression in a pattern, represents a return from the
1778: current function, on machines where this can be done with one
1779: instruction, such as Vaxes. On machines where a multi-instruction
1780: ``epilogue'' must be executed in order to return from the function,
1781: returning is done by jumping to a label which precedes the epilogue, and
1782: the @code{return} expression code is never used.
1783:
1784: Inside an @code{if_then_else} expression, represents the value to be
1785: placed in @code{pc} to return to the caller.
1786:
1787: Note that an insn pattern of @code{(return)} is logically equivalent to
1788: @code{(set (pc) (return))}, but the latter form is never used.
1789:
1790: @findex call
1791: @item (call @var{function} @var{nargs})
1792: Represents a function call. @var{function} is a @code{mem} expression
1793: whose address is the address of the function to be called.
1794: @var{nargs} is an expression which can be used for two purposes: on
1795: some machines it represents the number of bytes of stack argument; on
1796: others, it represents the number of argument registers.
1797:
1798: Each machine has a standard machine mode which @var{function} must
1799: have. The machine description defines macro @code{FUNCTION_MODE} to
1800: expand into the requisite mode name. The purpose of this mode is to
1801: specify what kind of addressing is allowed, on machines where the
1802: allowed kinds of addressing depend on the machine mode being
1803: addressed.
1804:
1805: @findex clobber
1806: @item (clobber @var{x})
1807: Represents the storing or possible storing of an unpredictable,
1808: undescribed value into @var{x}, which must be a @code{reg},
1809: @code{scratch} or @code{mem} expression.
1810:
1811: One place this is used is in string instructions that store standard
1812: values into particular hard registers. It may not be worth the
1813: trouble to describe the values that are stored, but it is essential to
1814: inform the compiler that the registers will be altered, lest it
1815: attempt to keep data in them across the string instruction.
1816:
1817: If @var{x} is @code{(mem:BLK (const_int 0))}, it means that all memory
1818: locations must be presumed clobbered.
1819:
1820: Note that the machine description classifies certain hard registers as
1821: ``call-clobbered''. All function call instructions are assumed by
1822: default to clobber these registers, so there is no need to use
1823: @code{clobber} expressions to indicate this fact. Also, each function
1824: call is assumed to have the potential to alter any memory location,
1825: unless the function is declared @code{const}.
1826:
1827: If the last group of expressions in a @code{parallel} are each a
1828: @code{clobber} expression whose arguments are @code{reg} or
1829: @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
1830: phase can add the appropriate @code{clobber} expressions to an insn it
1831: has constructed when doing so will cause a pattern to be matched.
1832:
1833: This feature can be used, for example, on a machine that whose multiply
1834: and add instructions don't use an MQ register but which has an
1835: add-accumulate instruction that does clobber the MQ register. Similarly,
1836: a combined instruction might require a temporary register while the
1837: constituent instructions might not.
1838:
1839: When a @code{clobber} expression for a register appears inside a
1840: @code{parallel} with other side effects, the register allocator
1841: guarantees that the register is unoccupied both before and after that
1842: insn. However, the reload phase may allocate a register used for one of
1843: the inputs unless the @samp{&} constraint is specified for the selected
1844: alternative (@pxref{Modifiers}). You can clobber either a specific hard
1845: register, a pseudo register, or a @code{scratch} expression; in the
1846: latter two cases, GNU CC will allocate a hard register that is available
1847: there for use as a temporary.
1848:
1849: For instructions that require a temporary register, you should use
1850: @code{scratch} instead of a pseudo-register because this will allow the
1851: combiner phase to add the @code{clobber} when required. You do this by
1852: coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
1853: clobber a pseudo register, use one which appears nowhere else---generate
1854: a new one each time. Otherwise, you may confuse CSE.
1855:
1856: There is one other known use for clobbering a pseudo register in a
1857: @code{parallel}: when one of the input operands of the insn is also
1858: clobbered by the insn. In this case, using the same pseudo register in
1859: the clobber and elsewhere in the insn produces the expected results.
1860:
1861: @findex use
1862: @item (use @var{x})
1863: Represents the use of the value of @var{x}. It indicates that the
1864: value in @var{x} at this point in the program is needed, even though
1865: it may not be apparent why this is so. Therefore, the compiler will
1866: not attempt to delete previous instructions whose only effect is to
1867: store a value in @var{x}. @var{x} must be a @code{reg} expression.
1868:
1869: During the delayed branch scheduling phase, @var{x} may be an insn.
1870: This indicates that @var{x} previously was located at this place in the
1871: code and its data dependencies need to be taken into account. These
1872: @code{use} insns will be deleted before the delayed branch scheduling
1873: phase exits.
1874:
1875: @findex parallel
1876: @item (parallel [@var{x0} @var{x1} @dots{}])
1877: Represents several side effects performed in parallel. The square
1878: brackets stand for a vector; the operand of @code{parallel} is a
1879: vector of expressions. @var{x0}, @var{x1} and so on are individual
1880: side effect expressions---expressions of code @code{set}, @code{call},
1881: @code{return}, @code{clobber} or @code{use}.@refill
1882:
1883: ``In parallel'' means that first all the values used in the individual
1884: side-effects are computed, and second all the actual side-effects are
1885: performed. For example,
1886:
1887: @example
1888: (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
1889: (set (mem:SI (reg:SI 1)) (reg:SI 1))])
1890: @end example
1891:
1892: @noindent
1893: says unambiguously that the values of hard register 1 and the memory
1894: location addressed by it are interchanged. In both places where
1895: @code{(reg:SI 1)} appears as a memory address it refers to the value
1896: in register 1 @emph{before} the execution of the insn.
1897:
1898: It follows that it is @emph{incorrect} to use @code{parallel} and
1899: expect the result of one @code{set} to be available for the next one.
1900: For example, people sometimes attempt to represent a jump-if-zero
1901: instruction this way:
1902:
1903: @example
1904: (parallel [(set (cc0) (reg:SI 34))
1905: (set (pc) (if_then_else
1906: (eq (cc0) (const_int 0))
1907: (label_ref @dots{})
1908: (pc)))])
1909: @end example
1910:
1911: @noindent
1912: But this is incorrect, because it says that the jump condition depends
1913: on the condition code value @emph{before} this instruction, not on the
1914: new value that is set by this instruction.
1915:
1916: @cindex peephole optimization, RTL representation
1917: Peephole optimization, which takes place together with final assembly
1918: code output, can produce insns whose patterns consist of a @code{parallel}
1919: whose elements are the operands needed to output the resulting
1920: assembler code---often @code{reg}, @code{mem} or constant expressions.
1921: This would not be well-formed RTL at any other stage in compilation,
1922: but it is ok then because no further optimization remains to be done.
1923: However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
1924: any, must deal with such insns if you define any peephole optimizations.
1925:
1926: @findex sequence
1927: @item (sequence [@var{insns} @dots{}])
1928: Represents a sequence of insns. Each of the @var{insns} that appears
1929: in the vector is suitable for appearing in the chain of insns, so it
1930: must be an @code{insn}, @code{jump_insn}, @code{call_insn},
1931: @code{code_label}, @code{barrier} or @code{note}.
1932:
1933: A @code{sequence} RTX is never placed in an actual insn during RTL
1934: generation. It represents the sequence of insns that result from a
1935: @code{define_expand} @emph{before} those insns are passed to
1936: @code{emit_insn} to insert them in the chain of insns. When actually
1937: inserted, the individual sub-insns are separated out and the
1938: @code{sequence} is forgotten.
1939:
1940: After delay-slot scheduling is completed, an insn and all the insns that
1941: reside in its delay slots are grouped together into a @code{sequence}.
1942: The insn requiring the delay slot is the first insn in the vector;
1943: subsequent insns are to be placed in the delay slot.
1944:
1945: @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
1946: indicate that a branch insn should be used that will conditionally annul
1947: the effect of the insns in the delay slots. In such a case,
1948: @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
1949: the branch and should be executed only if the branch is taken; otherwise
1950: the insn should be executed only if the branch is not taken.
1951: @xref{Delay Slots}.
1952: @end table
1953:
1954: These expression codes appear in place of a side effect, as the body of
1955: an insn, though strictly speaking they do not always describe side
1956: effects as such:
1957:
1958: @table @code
1959: @findex asm_input
1960: @item (asm_input @var{s})
1961: Represents literal assembler code as described by the string @var{s}.
1962:
1963: @findex unspec
1964: @findex unspec_volatile
1965: @item (unspec [@var{operands} @dots{}] @var{index})
1.1.1.2 root 1966: @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
1.1 root 1967: Represents a machine-specific operation on @var{operands}. @var{index}
1.1.1.2 root 1968: selects between multiple machine-specific operations.
1.1 root 1969: @code{unspec_volatile} is used for volatile operations and operations
1970: that may trap; @code{unspec} is used for other operations.
1971:
1.1.1.2 root 1972: These codes may appear inside a @code{pattern} of an
1.1 root 1973: insn, inside a @code{parallel}, or inside an expression.
1974:
1975: @findex addr_vec
1976: @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
1977: Represents a table of jump addresses. The vector elements @var{lr0},
1978: etc., are @code{label_ref} expressions. The mode @var{m} specifies
1979: how much space is given to each address; normally @var{m} would be
1980: @code{Pmode}.
1981:
1982: @findex addr_diff_vec
1983: @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}])
1984: Represents a table of jump addresses expressed as offsets from
1985: @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
1986: expressions and so is @var{base}. The mode @var{m} specifies how much
1987: space is given to each address-difference.@refill
1988: @end table
1989:
1990: @node Incdec, Assembler, Side Effects, RTL
1991: @section Embedded Side-Effects on Addresses
1992: @cindex RTL preincrement
1993: @cindex RTL postincrement
1994: @cindex RTL predecrement
1995: @cindex RTL postdecrement
1996:
1997: Four special side-effect expression codes appear as memory addresses.
1998:
1999: @table @code
2000: @findex pre_dec
2001: @item (pre_dec:@var{m} @var{x})
2002: Represents the side effect of decrementing @var{x} by a standard
2003: amount and represents also the value that @var{x} has after being
2004: decremented. @var{x} must be a @code{reg} or @code{mem}, but most
2005: machines allow only a @code{reg}. @var{m} must be the machine mode
2006: for pointers on the machine in use. The amount @var{x} is decremented
2007: by is the length in bytes of the machine mode of the containing memory
2008: reference of which this expression serves as the address. Here is an
2009: example of its use:@refill
2010:
2011: @example
2012: (mem:DF (pre_dec:SI (reg:SI 39)))
2013: @end example
2014:
2015: @noindent
2016: This says to decrement pseudo register 39 by the length of a @code{DFmode}
2017: value and use the result to address a @code{DFmode} value.
2018:
2019: @findex pre_inc
2020: @item (pre_inc:@var{m} @var{x})
2021: Similar, but specifies incrementing @var{x} instead of decrementing it.
2022:
2023: @findex post_dec
2024: @item (post_dec:@var{m} @var{x})
2025: Represents the same side effect as @code{pre_dec} but a different
2026: value. The value represented here is the value @var{x} has @i{before}
2027: being decremented.
2028:
2029: @findex post_inc
2030: @item (post_inc:@var{m} @var{x})
2031: Similar, but specifies incrementing @var{x} instead of decrementing it.
2032: @end table
2033:
2034: These embedded side effect expressions must be used with care. Instruction
2035: patterns may not use them. Until the @samp{flow} pass of the compiler,
2036: they may occur only to represent pushes onto the stack. The @samp{flow}
2037: pass finds cases where registers are incremented or decremented in one
2038: instruction and used as an address shortly before or after; these cases are
2039: then transformed to use pre- or post-increment or -decrement.
2040:
2041: If a register used as the operand of these expressions is used in
2042: another address in an insn, the original value of the register is used.
2043: Uses of the register outside of an address are not permitted within the
2044: same insn as a use in an embedded side effect expression because such
2045: insns behave differently on different machines and hence must be treated
2046: as ambiguous and disallowed.
2047:
2048: An instruction that can be represented with an embedded side effect
2049: could also be represented using @code{parallel} containing an additional
2050: @code{set} to describe how the address register is altered. This is not
2051: done because machines that allow these operations at all typically
2052: allow them wherever a memory address is called for. Describing them as
2053: additional parallel stores would require doubling the number of entries
2054: in the machine description.
2055:
2056: @node Assembler, Insns, IncDec, RTL
2057: @section Assembler Instructions as Expressions
2058: @cindex assembler instructions in RTL
2059:
2060: @cindex @code{asm_operands}, usage
2061: The RTX code @code{asm_operands} represents a value produced by a
2062: user-specified assembler instruction. It is used to represent
2063: an @code{asm} statement with arguments. An @code{asm} statement with
2064: a single output operand, like this:
2065:
2066: @example
2067: asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
2068: @end example
2069:
2070: @noindent
2071: is represented using a single @code{asm_operands} RTX which represents
2072: the value that is stored in @code{outputvar}:
2073:
2074: @example
2075: (set @var{rtx-for-outputvar}
2076: (asm_operands "foo %1,%2,%0" "a" 0
2077: [@var{rtx-for-addition-result} @var{rtx-for-*z}]
2078: [(asm_input:@var{m1} "g")
2079: (asm_input:@var{m2} "di")]))
2080: @end example
2081:
2082: @noindent
2083: Here the operands of the @code{asm_operands} RTX are the assembler
2084: template string, the output-operand's constraint, the index-number of the
2085: output operand among the output operands specified, a vector of input
2086: operand RTX's, and a vector of input-operand modes and constraints. The
2087: mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
2088: @code{*z}.
2089:
2090: When an @code{asm} statement has multiple output values, its insn has
2091: several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
2092: contains a @code{asm_operands}; all of these share the same assembler
2093: template and vectors, but each contains the constraint for the respective
2094: output operand. They are also distinguished by the output-operand index
2095: number, which is 0, 1, @dots{} for successive output operands.
2096:
2097: @node Insns, Calls, Assembler, RTL
2098: @section Insns
2099: @cindex insns
2100:
2101: The RTL representation of the code for a function is a doubly-linked
2102: chain of objects called @dfn{insns}. Insns are expressions with
2103: special codes that are used for no other purpose. Some insns are
2104: actual instructions; others represent dispatch tables for @code{switch}
2105: statements; others represent labels to jump to or various sorts of
2106: declarative information.
2107:
2108: In addition to its own specific data, each insn must have a unique
2109: id-number that distinguishes it from all other insns in the current
2110: function (after delayed branch scheduling, copies of an insn with the
2111: same id-number may be present in multiple places in a function, but
2112: these copies will always be identical and will only appear inside a
2113: @code{sequence}), and chain pointers to the preceding and following
2114: insns. These three fields occupy the same position in every insn,
2115: independent of the expression code of the insn. They could be accessed
2116: with @code{XEXP} and @code{XINT}, but instead three special macros are
2117: always used:
2118:
2119: @table @code
2120: @findex INSN_UID
2121: @item INSN_UID (@var{i})
2122: Accesses the unique id of insn @var{i}.
2123:
2124: @findex PREV_INSN
2125: @item PREV_INSN (@var{i})
2126: Accesses the chain pointer to the insn preceding @var{i}.
2127: If @var{i} is the first insn, this is a null pointer.
2128:
2129: @findex NEXT_INSN
2130: @item NEXT_INSN (@var{i})
2131: Accesses the chain pointer to the insn following @var{i}.
2132: If @var{i} is the last insn, this is a null pointer.
2133: @end table
2134:
2135: @findex get_insns
2136: @findex get_last_insn
2137: The first insn in the chain is obtained by calling @code{get_insns}; the
2138: last insn is the result of calling @code{get_last_insn}. Within the
2139: chain delimited by these insns, the @code{NEXT_INSN} and
2140: @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
2141: the first insn,
2142:
2143: @example
2144: NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
2145: @end example
2146:
2147: @noindent
2148: is always true and if @var{insn} is not the last insn,
2149:
2150: @example
2151: PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
2152: @end example
2153:
2154: @noindent
2155: is always true.
2156:
2157: After delay slot scheduling, some of the insns in the chain might be
2158: @code{sequence} expressions, which contain a vector of insns. The value
2159: of @code{NEXT_INSN} in all but the last of these insns is the next insn
2160: in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
2161: is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
2162: which it is contained. Similar rules apply for @code{PREV_INSN}.
2163:
2164: This means that the above invariants are not necessarily true for insns
2165: inside @code{sequence} expressions. Specifically, if @var{insn} is the
2166: first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
2167: is the insn containing the @code{sequence} expression, as is the value
2168: of @code{PREV_INSN (NEXT_INSN (@var{insn}))} is @var{insn} is the last
2169: insn in the @code{sequence} expression. You can use these expressions
2170: to find the containing @code{sequence} expression.@refill
2171:
2172: Every insn has one of the following six expression codes:
2173:
2174: @table @code
2175: @findex insn
2176: @item insn
2177: The expression code @code{insn} is used for instructions that do not jump
2178: and do not do function calls. @code{sequence} expressions are always
2179: contained in insns with code @code{insn} even if one of those insns
2180: should jump or do function calls.
2181:
2182: Insns with code @code{insn} have four additional fields beyond the three
2183: mandatory ones listed above. These four are described in a table below.
2184:
2185: @findex jump_insn
2186: @item jump_insn
2187: The expression code @code{jump_insn} is used for instructions that may
2188: jump (or, more generally, may contain @code{label_ref} expressions). If
2189: there is an instruction to return from the current function, it is
2190: recorded as a @code{jump_insn}.
2191:
2192: @findex JUMP_LABEL
2193: @code{jump_insn} insns have the same extra fields as @code{insn} insns,
2194: accessed in the same way and in addition contains a field
2195: @code{JUMP_LABEL} which is defined once jump optimization has completed.
2196:
2197: For simple conditional and unconditional jumps, this field contains the
2198: @code{code_label} to which this insn will (possibly conditionally)
2199: branch. In a more complex jump, @code{JUMP_LABEL} records one of the
2200: labels that the insn refers to; the only way to find the others
2201: is to scan the entire body of the insn.
2202:
2203: Return insns count as jumps, but since they do not refer to any labels,
2204: they have zero in the @code{JUMP_LABEL} field.
2205:
2206: @findex call_insn
2207: @item call_insn
2208: The expression code @code{call_insn} is used for instructions that may do
2209: function calls. It is important to distinguish these instructions because
2210: they imply that certain registers and memory locations may be altered
2211: unpredictably.
2212:
1.1.1.2 root 2213: A @code{call_insn} insn may be preceded by insns that contain a single
1.1 root 2214: @code{use} expression and be followed by insns the contain a single
2215: @code{clobber} expression. If so, these @code{use} and @code{clobber}
2216: expressions are treated as being part of the function call.
2217: There must not even be a @code{note} between the @code{call_insn} and
2218: the @code{use} or @code{clobber} insns for this special treatment to
2219: take place. This is somewhat of a kludge and will be removed in a later
2220: version of GNU CC.
2221:
2222: @code{call_insn} insns have the same extra fields as @code{insn} insns,
2223: accessed in the same way.
2224:
2225: @findex code_label
2226: @findex CODE_LABEL_NUMBER
2227: @item code_label
2228: A @code{code_label} insn represents a label that a jump insn can jump
2229: to. It contains two special fields of data in addition to the three
2230: standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
2231: number}, a number that identifies this label uniquely among all the
2232: labels in the compilation (not just in the current function).
2233: Ultimately, the label is represented in the assembler output as an
2234: assembler label, usually of the form @samp{L@var{n}} where @var{n} is
2235: the label number.
2236:
2237: When a @code{code_label} appears in an RTL expression, it normally
2238: appears within a @code{label_ref} which represents the address of
2239: the label, as a number.
2240:
2241: @findex LABEL_NUSES
2242: The field @code{LABEL_NUSES} is only defined once the jump optimization
2243: phase is completed and contains the number of times this label is
2244: referenced in the current function.
2245:
2246: @findex barrier
2247: @item barrier
2248: Barriers are placed in the instruction stream when control cannot flow
2249: past them. They are placed after unconditional jump instructions to
2250: indicate that the jumps are unconditional and after calls to
2251: @code{volatile} functions, which do not return (e.g., @code{exit}).
2252: They contain no information beyond the three standard fields.
2253:
2254: @findex note
2255: @findex NOTE_LINE_NUMBER
2256: @findex NOTE_SOURCE_FILE
2257: @item note
2258: @code{note} insns are used to represent additional debugging and
2259: declarative information. They contain two nonstandard fields, an
2260: integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
2261: string accessed with @code{NOTE_SOURCE_FILE}.
2262:
2263: If @code{NOTE_LINE_NUMBER} is positive, the note represents the
2264: position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
2265: that the line came from. These notes control generation of line
2266: number data in the assembler output.
2267:
2268: Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
2269: code with one of the following values (and @code{NOTE_SOURCE_FILE}
2270: must contain a null pointer):
2271:
2272: @table @code
2273: @findex NOTE_INSN_DELETED
2274: @item NOTE_INSN_DELETED
2275: Such a note is completely ignorable. Some passes of the compiler
2276: delete insns by altering them into notes of this kind.
2277:
2278: @findex NOTE_INSN_BLOCK_BEG
2279: @findex NOTE_INSN_BLOCK_END
2280: @item NOTE_INSN_BLOCK_BEG
2281: @itemx NOTE_INSN_BLOCK_END
2282: These types of notes indicate the position of the beginning and end
2283: of a level of scoping of variable names. They control the output
2284: of debugging information.
2285:
2286: @findex NOTE_INSN_LOOP_BEG
2287: @findex NOTE_INSN_LOOP_END
2288: @item NOTE_INSN_LOOP_BEG
2289: @itemx NOTE_INSN_LOOP_END
2290: These types of notes indicate the position of the beginning and end
2291: of a @code{while} or @code{for} loop. They enable the loop optimizer
2292: to find loops quickly.
2293:
2294: @findex NOTE_INSN_LOOP_CONT
2295: @item NOTE_INSN_LOOP_CONT
2296: Appears at the place in a loop that @code{continue} statements jump to.
2297:
2298: @findex NOTE_INSN_LOOP_VTOP
2299: @item NOTE_INSN_LOOP_VTOP
2300: This note indicates the place in a loop where the exit test begins for
2301: those loops in which the exit test has been duplicated. This position
2302: becomes another virtual start of the loop when considering loop
2303: invariants.
2304:
2305: @findex NOTE_INSN_FUNCTION_END
2306: @item NOTE_INSN_FUNCTION_END
2307: Appears near the end of the function body, just before the label that
2308: @code{return} statements jump to (on machine where a single instruction
2309: does not suffice for returning). This note may be deleted by jump
2310: optimization.
2311:
2312: @findex NOTE_INSN_SETJMP
2313: @item NOTE_INSN_SETJMP
2314: Appears following each call to @code{setjmp} or a related function.
2315: @end table
2316:
2317: These codes are printed symbolically when they appear in debugging dumps.
2318: @end table
2319:
2320: @cindex @code{HImode}, in @code{insn}
2321: @cindex @code{QImode}, in @code{insn}
2322: The machine mode of an insn is normally @code{VOIDmode}, but some
2323: phases use the mode for various purposes; for example, the reload pass
2324: sets it to @code{HImode} if the insn needs reloading but not register
2325: elimination and @code{QImode} if both are required. The common
2326: subexpression elimination pass sets the mode of an insn to @code{QImode}
2327: when it is the first insn in a block that has already been processed.
2328:
2329: Here is a table of the extra fields of @code{insn}, @code{jump_insn}
2330: and @code{call_insn} insns:
2331:
2332: @table @code
2333: @findex PATTERN
2334: @item PATTERN (@var{i})
2335: An expression for the side effect performed by this insn. This must be
2336: one of the following codes: @code{set}, @code{call}, @code{use},
2337: @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
2338: @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
1.1.1.4 ! root 2339: @code{unspec_volatile}, @code{parallel}, or @code{sequence}. If it is a @code{parallel},
1.1 root 2340: each element of the @code{parallel} must be one these codes, except that
2341: @code{parallel} expressions cannot be nested and @code{addr_vec} and
2342: @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
2343:
2344: @findex INSN_CODE
2345: @item INSN_CODE (@var{i})
2346: An integer that says which pattern in the machine description matches
2347: this insn, or -1 if the matching has not yet been attempted.
2348:
2349: Such matching is never attempted and this field remains -1 on an insn
2350: whose pattern consists of a single @code{use}, @code{clobber},
2351: @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
2352:
2353: @findex asm_noperands
2354: Matching is also never attempted on insns that result from an @code{asm}
2355: statement. These contain at least one @code{asm_operands} expression.
2356: The function @code{asm_noperands} returns a non-negative value for
2357: such insns.
2358:
2359: In the debugging output, this field is printed as a number followed by
2360: a symbolic representation that locates the pattern in the @file{md}
2361: file as some small positive or negative offset from a named pattern.
2362:
2363: @findex LOG_LINKS
2364: @item LOG_LINKS (@var{i})
2365: A list (chain of @code{insn_list} expressions) giving information about
2366: dependencies between instructions within a basic block. Neither a jump
2367: nor a label may come between the related insns.
2368:
2369: @findex REG_NOTES
2370: @item REG_NOTES (@var{i})
2371: A list (chain of @code{expr_list} and @code{insn_list} expressions)
2372: giving miscellaneous information about the insn. It is often information
2373: pertaining to the registers used in this insn.
2374: @end table
2375:
2376: The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
2377: expressions. Each of these has two operands: the first is an insn,
2378: and the second is another @code{insn_list} expression (the next one in
2379: the chain). The last @code{insn_list} in the chain has a null pointer
2380: as second operand. The significant thing about the chain is which
2381: insns appear in it (as first operands of @code{insn_list}
2382: expressions). Their order is not significant.
2383:
2384: This list is originally set up by the flow analysis pass; it is a null
2385: pointer until then. Flow only adds links for those data dependencies
2386: which can be used for instruction combination. For each insn, the flow
2387: analysis pass adds a link to insns which store into registers values
2388: that are used for the first time in this insn. The instruction
2389: scheduling pass adds extra links so that every dependence will be
2390: represented. Links represent data dependencies, antidependencies and
2391: output dependencies; the machine mode of the link distinguishes these
2392: three types: antidependencies have mode @code{REG_DEP_ANTI}, output
2393: dependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have
2394: mode @code{VOIDmode}.
2395:
2396: The @code{REG_NOTES} field of an insn is a chain similar to the
2397: @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
2398: addition to @code{insn_list} expressions. There are several kinds
2399: of register notes, which are distinguished by the machine mode, which
2400: in a register note is really understood as being an @code{enum reg_note}.
2401: The first operand @var{op} of the note is data whose meaning depends on
2402: the kind of note.
2403:
2404: @findex REG_NOTE_KIND
2405: @findex PUT_REG_NOTE_KIND
1.1.1.4 ! root 2406: The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
1.1 root 2407: register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
2408: (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
2409: @var{newkind}.
2410:
2411: Register notes are of three classes: They may say something about an
2412: input to an insn, they may say something about an output of an insn, or
2413: they may create a linkage between two insns. There are also a set
2414: of values that are only used in @code{LOG_LINKS}.
2415:
2416: These register notes annotate inputs to an insn:
2417:
2418: @table @code
2419: @findex REG_DEAD
2420: @item REG_DEAD
2421: The value in @var{op} dies in this insn; that is to say, altering the
2422: value immediately after this insn would not affect the future behavior
2423: of the program.
2424:
2425: This does not necessarily mean that the register @var{op} has no useful
2426: value after this insn since it may also be an output of the insn. In
2427: such a case, however, a @code{REG_DEAD} note would be redundant and is
2428: usually not present until after the reload pass, but no code relies on
2429: this fact.
2430:
2431: @findex REG_INC
2432: @item REG_INC
2433: The register @var{op} is incremented (or decremented; at this level
2434: there is no distinction) by an embedded side effect inside this insn.
2435: This means it appears in a @code{post_inc}, @code{pre_inc},
2436: @code{post_dec} or @code{pre_dec} expression.
2437:
2438: @findex REG_NONNEG
2439: @item REG_NONNEG
2440: The register @var{op} is known to have a nonnegative value when this
2441: insn is reached. This is used so that decrement and branch until zero
2442: instructions, such as the m68k dbra, can be matched.
2443:
2444: The @code{REG_NONNEG} note is added to insns only if the machine
2445: description contains a pattern named
2446: @samp{decrement_and_branch_until_zero}.
2447:
2448: @findex REG_NO_CONFLICT
2449: @item REG_NO_CONFLICT
2450: This insn does not cause a conflict between @var{op} and the item
2451: being set by this insn even though it might appear that it does.
2452: In other words, if the destination register and @var{op} could
2453: otherwise be assigned the same register, this insn does not
2454: prevent that assignment.
2455:
2456: Insns with this note are usually part of a block that begins with a
2457: @code{clobber} insn specifying a multi-word pseudo register (which will
2458: be the output of the block), a group of insns that each set one word of
2459: the value and have the @code{REG_NO_CONFLICT} note attached, and a final
2460: insn that copies the output to itself with an attached @code{REG_EQUAL}
2461: note giving the expression being computed. This block is encapsulated
2462: with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
2463: last insns, respectively.
2464:
2465: @findex REG_LABEL
2466: @item REG_LABEL
2467: This insn uses @var{op}, a @code{code_label}, but is not a
2468: @code{jump_insn}. The presence of this note allows jump optimization to
2469: be aware that @var{op} is, in fact, being used.
2470: @end table
2471:
2472: The following notes describe attributes of outputs of an insn:
2473:
2474: @table @code
2475: @findex REG_EQUIV
2476: @findex REG_EQUAL
2477: @item REG_EQUIV
2478: @itemx REG_EQUAL
2479: This note is only valid on an insn that sets only one register and
2480: indicates that that register will be equal to @var{op} at run time; the
2481: scope of this equivalence differs between the two types of notes. The
2482: value which the insn explicitly copies into the register may look
2483: different from @var{op}, but they will be equal at run time. If the
2484: output of the single @code{set} is a @code{strict_low_part} expression,
2485: the note refers to the register that is contained in @code{SUBREG_REG}
2486: of the @code{subreg} expression.
2487:
2488: For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
2489: the entire function, and could validly be replaced in all its
2490: occurrences by @var{op}. (``Validly'' here refers to the data flow of
2491: the program; simple replacement may make some insns invalid.) For
2492: example, when a constant is loaded into a register that is never
2493: assigned any other value, this kind of note is used.
2494:
2495: When a parameter is copied into a pseudo-register at entry to a function,
2496: a note of this kind records that the register is equivalent to the stack
2497: slot where the parameter was passed. Although in this case the register
2498: may be set by other insns, it is still valid to replace the register
2499: by the stack slot throughout the function.
2500:
2501: In the case of @code{REG_EQUAL}, the register that is set by this insn
2502: will be equal to @var{op} at run time at the end of this insn but not
2503: necessarily elsewhere in the function. In this case, @var{op}
2504: is typically an arithmetic expression. For example, when a sequence of
2505: insns such as a library call is used to perform an arithmetic operation,
2506: this kind of note is attached to the insn that produces or copies the
2507: final value.
2508:
2509: These two notes are used in different ways by the compiler passes.
2510: @code{REG_EQUAL} is used by passes prior to register allocation (such as
2511: common subexpression elimination and loop optimization) to tell them how
2512: to think of that value. @code{REG_EQUIV} notes are used by register
2513: allocation to indicate that there is an available substitute expression
2514: (either a constant or a @code{mem} expression for the location of a
2515: parameter on the stack) that may be used in place of a register if
2516: insufficient registers are available.
2517:
2518: Except for stack homes for parameters, which are indicated by a
2519: @code{REG_EQUIV} note and are not useful to the early optimization
2520: passes and pseudo registers that are equivalent to a memory location
2521: throughout there entire life, which is not detected until later in
2522: the compilation, all equivalences are initially indicated by an attached
2523: @code{REG_EQUAL} note. In the early stages of register allocation, a
2524: @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
2525: @var{op} is a constant and the insn represents the only set of its
2526: destination register.
2527:
2528: Thus, compiler passes prior to register allocation need only check for
2529: @code{REG_EQUAL} notes and passes subsequent to register allocation
2530: need only check for @code{REG_EQUIV} notes.
2531:
2532: @findex REG_UNUSED
2533: @item REG_UNUSED
2534: The register @var{op} being set by this insn will not be used in a
2535: subsequent insn. This differs from a @code{REG_DEAD} note, which
2536: indicates that the value in an input will not be used subsequently.
2537: These two notes are independent; both may be present for the same
2538: register.
2539:
2540: @findex REG_WAS_0
2541: @item REG_WAS_0
2542: The single output of this insn contained zero before this insn.
2543: @var{op} is the insn that set it to zero. You can rely on this note if
2544: it is present and @var{op} has not been deleted or turned into a @code{note};
2545: its absence implies nothing.
2546: @end table
2547:
2548: These notes describe linkages between insns. They occur in pairs: one
2549: insn has one of a pair of notes that points to a second insn, which has
2550: the inverse note pointing back to the first insn.
2551:
2552: @table @code
2553: @findex REG_RETVAL
2554: @item REG_RETVAL
2555: This insn copies the value of a multi-insn sequence (for example, a
2556: library call), and @var{op} is the first insn of the sequence (for a
2557: library call, the first insn that was generated to set up the arguments
2558: for the library call).
2559:
2560: Loop optimization uses this note to treat such a sequence as a single
2561: operation for code motion purposes and flow analysis uses this note to
2562: delete such sequences whose results are dead.
2563:
2564: A @code{REG_EQUAL} note will also usually be attached to this insn to
2565: provide the expression being computed by the sequence.
2566:
2567: @findex REG_LIBCALL
2568: @item REG_LIBCALL
2569: This is the inverse of @code{REG_RETVAL}: it is placed on the first
2570: insn of a multi-insn sequence, and it points to the last one.
2571:
2572: @findex REG_CC_SETTER
2573: @findex REG_CC_USER
2574: @item REG_CC_SETTER
2575: @itemx REG_CC_USER
2576: On machines that use @code{cc0}, the insns which set and use @code{cc0}
2577: set and use @code{cc0} are adjacent. However, when branch delay slot
2578: filling is done, this may no longer be true. In this case a
2579: @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
2580: point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
2581: be placed on the insn using @code{cc0} to point to the insn setting
2582: @code{cc0}.@refill
2583: @end table
2584:
2585: These values are only used in the @code{LOG_LINKS} field, and indicate
2586: the type of dependency that each link represents. Links which indicate
2587: a data dependence (a read after write dependence) do not use any code,
2588: they simply have mode @code{VOIDmode}, and are printed without any
2589: descriptive text.
2590:
2591: @table @code
2592: @findex REG_DEP_ANTI
2593: @item REG_DEP_ANTI
2594: This indicates an anti dependence (a write after read dependence).
2595:
2596: @findex REG_DEP_OUTPUT
2597: @item REG_DEP_OUTPUT
2598: This indicates an output dependence (a write after write dependence).
2599: @end table
2600:
2601: For convenience, the machine mode in an @code{insn_list} or
2602: @code{expr_list} is printed using these symbolic codes in debugging dumps.
2603:
2604: @findex insn_list
2605: @findex expr_list
2606: The only difference between the expression codes @code{insn_list} and
2607: @code{expr_list} is that the first operand of an @code{insn_list} is
2608: assumed to be an insn and is printed in debugging dumps as the insn's
2609: unique id; the first operand of an @code{expr_list} is printed in the
2610: ordinary way as an expression.
2611:
2612: @node Calls, Sharing, Insns, RTL
2613: @section RTL Representation of Function-Call Insns
2614: @cindex calling functions in RTL
2615: @cindex RTL function-call insns
2616: @cindex function-call insns
2617:
2618: Insns that call subroutines have the RTL expression code @code{call_insn}.
2619: These insns must satisfy special rules, and their bodies must use a special
2620: RTL expression code, @code{call}.
2621:
2622: @cindex @code{call} usage
2623: A @code{call} expression has two operands, as follows:
2624:
2625: @example
2626: (call (mem:@var{fm} @var{addr}) @var{nbytes})
2627: @end example
2628:
2629: @noindent
2630: Here @var{nbytes} is an operand that represents the number of bytes of
2631: argument data being passed to the subroutine, @var{fm} is a machine mode
2632: (which must equal as the definition of the @code{FUNCTION_MODE} macro in
2633: the machine description) and @var{addr} represents the address of the
2634: subroutine.
2635:
2636: For a subroutine that returns no value, the @code{call} expression as
2637: shown above is the entire body of the insn, except that the insn might
2638: also contain @code{use} or @code{clobber} expressions.
2639:
2640: @cindex @code{BLKmode}, and function return values
2641: For a subroutine that returns a value whose mode is not @code{BLKmode},
2642: the value is returned in a hard register. If this register's number is
2643: @var{r}, then the body of the call insn looks like this:
2644:
2645: @example
2646: (set (reg:@var{m} @var{r})
2647: (call (mem:@var{fm} @var{addr}) @var{nbytes}))
2648: @end example
2649:
2650: @noindent
2651: This RTL expression makes it clear (to the optimizer passes) that the
2652: appropriate register receives a useful value in this insn.
2653:
2654: When a subroutine returns a @code{BLKmode} value, it is handled by
2655: passing to the subroutine the address of a place to store the value.
2656: So the call insn itself does not ``return'' any value, and it has the
2657: same RTL form as a call that returns nothing.
2658:
2659: On some machines, the call instruction itself clobbers some register,
2660: for example to contain the return address. @code{call_insn} insns
2661: on these machines should have a body which is a @code{parallel}
2662: that contains both the @code{call} expression and @code{clobber}
2663: expressions that indicate which registers are destroyed. Similarly,
2664: if the call instruction requires some register other than the stack
2665: pointer that is not explicitly mentioned it its RTL, a @code{use}
2666: subexpression should mention that register.
2667:
2668: Functions that are called are assumed to modify all registers listed in
2669: the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
2670: Basics}) and, with the exception of @code{const} functions and library
2671: calls, to modify all of memory.
2672:
2673: Insns containing just @code{use} expressions directly precede the
2674: @code{call_insn} insn to indicate which registers contain inputs to the
2675: function. Similarly, if registers other than those in
2676: @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
2677: containing a single @code{clobber} follow immediately after the call to
2678: indicate which registers.
2679:
2680: @node Sharing,, Calls, RTL
2681: @section Structure Sharing Assumptions
2682: @cindex sharing of RTL components
2683: @cindex RTL structure sharing assumptions
2684:
2685: The compiler assumes that certain kinds of RTL expressions are unique;
2686: there do not exist two distinct objects representing the same value.
2687: In other cases, it makes an opposite assumption: that no RTL expression
2688: object of a certain kind appears in more than one place in the
2689: containing structure.
2690:
2691: These assumptions refer to a single function; except for the RTL
2692: objects that describe global variables and external functions,
2693: and a few standard objects such as small integer constants,
2694: no RTL objects are common to two functions.
2695:
2696: @itemize @bullet
2697: @cindex @code{reg}, RTL sharing
2698: @item
2699: Each pseudo-register has only a single @code{reg} object to represent it,
2700: and therefore only a single machine mode.
2701:
2702: @cindex symbolic label
2703: @cindex @code{symbol_ref}, RTL sharing
2704: @item
2705: For any symbolic label, there is only one @code{symbol_ref} object
2706: referring to it.
2707:
2708: @cindex @code{const_int}, RTL sharing
2709: @item
2710: There is only one @code{const_int} expression with value 0, only
2711: one with value 1, and only one with value @minus{}1.
2712: Some other integer values are also stored uniquely.
2713:
2714: @cindex @code{pc}, RTL sharing
2715: @item
2716: There is only one @code{pc} expression.
2717:
2718: @cindex @code{cc0}, RTL sharing
2719: @item
2720: There is only one @code{cc0} expression.
2721:
2722: @cindex @code{const_double}, RTL sharing
2723: @item
2724: There is only one @code{const_double} expression with value 0 for
2725: each floating point mode. Likewise for values 1 and 2.
2726:
2727: @cindex @code{label_ref}, RTL sharing
2728: @cindex @code{scratch}, RTL sharing
2729: @item
2730: No @code{label_ref} or @code{scratch} appears in more than one place in
2731: the RTL structure; in other words, it is safe to do a tree-walk of all
2732: the insns in the function and assume that each time a @code{label_ref}
2733: or @code{scratch} is seen it is distinct from all others that are seen.
2734:
2735: @cindex @code{mem}, RTL sharing
2736: @item
2737: Only one @code{mem} object is normally created for each static
2738: variable or stack slot, so these objects are frequently shared in all
2739: the places they appear. However, separate but equal objects for these
2740: variables are occasionally made.
2741:
2742: @cindex @code{asm_operands}, RTL sharing
2743: @item
2744: When a single @code{asm} statement has multiple output operands, a
2745: distinct @code{asm_operands} expression is made for each output operand.
2746: However, these all share the vector which contains the sequence of input
2747: operands. This sharing is used later on to test whether two
2748: @code{asm_operands} expressions come from the same statement, so all
2749: optimizations must carefully preserve the sharing if they copy the
2750: vector at all.
2751:
2752: @item
2753: No RTL object appears in more than one place in the RTL structure
2754: except as described above. Many passes of the compiler rely on this
2755: by assuming that they can modify RTL objects in place without unwanted
2756: side-effects on other insns.
2757:
2758: @findex unshare_all_rtl
2759: @item
2760: During initial RTL generation, shared structure is freely introduced.
2761: After all the RTL for a function has been generated, all shared
2762: structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
2763: after which the above rules are guaranteed to be followed.
2764:
2765: @findex copy_rtx_if_shared
2766: @item
2767: During the combiner pass, shared structure within an insn can exist
2768: temporarily. However, the shared structure is copied before the
2769: combiner is finished with the insn. This is done by calling
2770: @code{copy_rtx_if_shared}, which is a subroutine of
2771: @code{unshare_all_rtl}.
2772: @end itemize
2773: @end ifset
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