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1.1 root 1: @c Copyright (C) 1988, 1989, 1992 Free Software Foundation, Inc.
2: @c This is part of the GCC manual.
3: @c For copying conditions, see the file gcc.texi.
4:
1.1.1.3 root 5: @node RTL
1.1 root 6: @chapter RTL Representation
7: @cindex RTL representation
8: @cindex representation of RTL
9: @cindex Register Transfer Language (RTL)
10:
11: Most of the work of the compiler is done on an intermediate representation
12: called register transfer language. In this language, the instructions to be
13: output are described, pretty much one by one, in an algebraic form that
14: describes what the instruction does.
15:
16: RTL is inspired by Lisp lists. It has both an internal form, made up of
17: structures that point at other structures, and a textual form that is used
18: in the machine description and in printed debugging dumps. The textual
19: form uses nested parentheses to indicate the pointers in the internal form.
20:
21: @menu
22: * RTL Objects:: Expressions vs vectors vs strings vs integers.
23: * Accessors:: Macros to access expression operands or vector elts.
24: * Flags:: Other flags in an RTL expression.
25: * Machine Modes:: Describing the size and format of a datum.
26: * Constants:: Expressions with constant values.
27: * Regs and Memory:: Expressions representing register contents or memory.
28: * Arithmetic:: Expressions representing arithmetic on other expressions.
29: * Comparisons:: Expressions representing comparison of expressions.
1.1.1.5 ! root 30: * Bit Fields:: Expressions representing bitfields in memory or reg.
1.1 root 31: * Conversions:: Extending, truncating, floating or fixing.
32: * RTL Declarations:: Declaring volatility, constancy, etc.
33: * Side Effects:: Expressions for storing in registers, etc.
34: * Incdec:: Embedded side-effects for autoincrement addressing.
35: * Assembler:: Representing @code{asm} with operands.
36: * Insns:: Expression types for entire insns.
37: * Calls:: RTL representation of function call insns.
38: * Sharing:: Some expressions are unique; others *must* be copied.
1.1.1.5 ! root 39: * Reading RTL:: Reading textual RTL from a file.
1.1 root 40: @end menu
41:
42: @node RTL Objects, Accessors, RTL, RTL
43: @section RTL Object Types
44: @cindex RTL object types
45:
46: @cindex RTL integers
47: @cindex RTL strings
48: @cindex RTL vectors
49: @cindex RTL expression
50: @cindex RTX (See RTL)
1.1.1.4 root 51: RTL uses five kinds of objects: expressions, integers, wide integers,
52: strings and vectors. Expressions are the most important ones. An RTL
53: expression (``RTX'', for short) is a C structure, but it is usually
54: referred to with a pointer; a type that is given the typedef name
55: @code{rtx}.
1.1 root 56:
57: An integer is simply an @code{int}; their written form uses decimal digits.
1.1.1.4 root 58: A wide integer is an integral object whose type is @code{HOST_WIDE_INT}
1.1.1.5 ! root 59: (@pxref{Config}); their written form uses decimal digits.
1.1 root 60:
61: A string is a sequence of characters. In core it is represented as a
62: @code{char *} in usual C fashion, and it is written in C syntax as well.
63: However, strings in RTL may never be null. If you write an empty string in
64: a machine description, it is represented in core as a null pointer rather
65: than as a pointer to a null character. In certain contexts, these null
66: pointers instead of strings are valid. Within RTL code, strings are most
67: commonly found inside @code{symbol_ref} expressions, but they appear in
68: other contexts in the RTL expressions that make up machine descriptions.
69:
70: A vector contains an arbitrary number of pointers to expressions. The
71: number of elements in the vector is explicitly present in the vector.
72: The written form of a vector consists of square brackets
73: (@samp{[@dots{}]}) surrounding the elements, in sequence and with
74: whitespace separating them. Vectors of length zero are not created;
75: null pointers are used instead.
76:
77: @cindex expression codes
78: @cindex codes, RTL expression
79: @findex GET_CODE
80: @findex PUT_CODE
81: Expressions are classified by @dfn{expression codes} (also called RTX
82: codes). The expression code is a name defined in @file{rtl.def}, which is
83: also (in upper case) a C enumeration constant. The possible expression
84: codes and their meanings are machine-independent. The code of an RTX can
85: be extracted with the macro @code{GET_CODE (@var{x})} and altered with
86: @code{PUT_CODE (@var{x}, @var{newcode})}.
87:
88: The expression code determines how many operands the expression contains,
89: and what kinds of objects they are. In RTL, unlike Lisp, you cannot tell
90: by looking at an operand what kind of object it is. Instead, you must know
91: from its context---from the expression code of the containing expression.
92: For example, in an expression of code @code{subreg}, the first operand is
93: to be regarded as an expression and the second operand as an integer. In
94: an expression of code @code{plus}, there are two operands, both of which
95: are to be regarded as expressions. In a @code{symbol_ref} expression,
96: there is one operand, which is to be regarded as a string.
97:
98: Expressions are written as parentheses containing the name of the
99: expression type, its flags and machine mode if any, and then the operands
100: of the expression (separated by spaces).
101:
102: Expression code names in the @samp{md} file are written in lower case,
103: but when they appear in C code they are written in upper case. In this
104: manual, they are shown as follows: @code{const_int}.
105:
106: @cindex (nil)
107: @cindex nil
108: In a few contexts a null pointer is valid where an expression is normally
109: wanted. The written form of this is @code{(nil)}.
110:
111: @node Accessors, Flags, RTL Objects, RTL
112: @section Access to Operands
113: @cindex accessors
114: @cindex access to operands
115: @cindex operand access
116:
117: @cindex RTL format
1.1.1.4 root 118: For each expression type @file{rtl.def} specifies the number of
119: contained objects and their kinds, with four possibilities: @samp{e} for
120: expression (actually a pointer to an expression), @samp{i} for integer,
121: @samp{w} for wide integer, @samp{s} for string, and @samp{E} for vector
122: of expressions. The sequence of letters for an expression code is
123: called its @dfn{format}. Thus, the format of @code{subreg} is
124: @samp{ei}.@refill
1.1 root 125:
126: @cindex RTL format characters
127: A few other format characters are used occasionally:
128:
129: @table @code
130: @item u
131: @samp{u} is equivalent to @samp{e} except that it is printed differently
132: in debugging dumps. It is used for pointers to insns.
133:
134: @item n
135: @samp{n} is equivalent to @samp{i} except that it is printed differently
136: in debugging dumps. It is used for the line number or code number of a
137: @code{note} insn.
138:
139: @item S
140: @samp{S} indicates a string which is optional. In the RTL objects in
141: core, @samp{S} is equivalent to @samp{s}, but when the object is read,
142: from an @samp{md} file, the string value of this operand may be omitted.
143: An omitted string is taken to be the null string.
144:
145: @item V
146: @samp{V} indicates a vector which is optional. In the RTL objects in
147: core, @samp{V} is equivalent to @samp{E}, but when the object is read
148: from an @samp{md} file, the vector value of this operand may be omitted.
149: An omitted vector is effectively the same as a vector of no elements.
150:
151: @item 0
152: @samp{0} means a slot whose contents do not fit any normal category.
153: @samp{0} slots are not printed at all in dumps, and are often used in
154: special ways by small parts of the compiler.
155: @end table
156:
157: There are macros to get the number of operands, the format, and the
158: class of an expression code:
159:
160: @table @code
161: @findex GET_RTX_LENGTH
162: @item GET_RTX_LENGTH (@var{code})
163: Number of operands of an RTX of code @var{code}.
164:
165: @findex GET_RTX_FORMAT
166: @item GET_RTX_FORMAT (@var{code})
167: The format of an RTX of code @var{code}, as a C string.
168:
169: @findex GET_RTX_CLASS
170: @cindex classes of RTX codes
171: @item GET_RTX_CLASS (@var{code})
172: A single character representing the type of RTX operation that code
173: @var{code} performs.
174:
175: The following classes are defined:
176:
177: @table @code
178: @item o
179: An RTX code that represents an actual object, such as @code{reg} or
180: @code{mem}. @code{subreg} is not in this class.
181:
182: @item <
183: An RTX code for a comparison. The codes in this class are
184: @code{NE}, @code{EQ}, @code{LE}, @code{LT}, @code{GE}, @code{GT},
185: @code{LEU}, @code{LTU}, @code{GEU}, @code{GTU}.@refill
186:
187: @item 1
188: An RTX code for a unary arithmetic operation, such as @code{neg}.
189:
190: @item c
191: An RTX code for a commutative binary operation, other than @code{NE}
192: and @code{EQ} (which have class @samp{<}).
193:
194: @item 2
195: An RTX code for a noncommutative binary operation, such as @code{MINUS}.
196:
197: @item b
1.1.1.5 ! root 198: An RTX code for a bitfield operation, either @code{ZERO_EXTRACT} or
! 199: @code{SIGN_EXTRACT}.
1.1 root 200:
201: @item 3
202: An RTX code for other three input operations, such as @code{IF_THEN_ELSE}.
203:
204: @item i
205: An RTX code for a machine insn (@code{INSN}, @code{JUMP_INSN}, and
206: @code{CALL_INSN}).@refill
207:
208: @item m
209: An RTX code for something that matches in insns, such as @code{MATCH_DUP}.
210:
211: @item x
212: All other RTX codes.
213: @end table
214: @end table
215:
216: @findex XEXP
217: @findex XINT
1.1.1.4 root 218: @findex XWINT
1.1 root 219: @findex XSTR
220: Operands of expressions are accessed using the macros @code{XEXP},
1.1.1.4 root 221: @code{XINT}, @code{XWINT} and @code{XSTR}. Each of these macros takes
222: two arguments: an expression-pointer (RTX) and an operand number
223: (counting from zero). Thus,@refill
1.1 root 224:
225: @example
226: XEXP (@var{x}, 2)
227: @end example
228:
229: @noindent
230: accesses operand 2 of expression @var{x}, as an expression.
231:
232: @example
233: XINT (@var{x}, 2)
234: @end example
235:
236: @noindent
237: accesses the same operand as an integer. @code{XSTR}, used in the same
238: fashion, would access it as a string.
239:
240: Any operand can be accessed as an integer, as an expression or as a string.
241: You must choose the correct method of access for the kind of value actually
242: stored in the operand. You would do this based on the expression code of
243: the containing expression. That is also how you would know how many
244: operands there are.
245:
246: For example, if @var{x} is a @code{subreg} expression, you know that it has
247: two operands which can be correctly accessed as @code{XEXP (@var{x}, 0)}
248: and @code{XINT (@var{x}, 1)}. If you did @code{XINT (@var{x}, 0)}, you
249: would get the address of the expression operand but cast as an integer;
250: that might occasionally be useful, but it would be cleaner to write
251: @code{(int) XEXP (@var{x}, 0)}. @code{XEXP (@var{x}, 1)} would also
252: compile without error, and would return the second, integer operand cast as
253: an expression pointer, which would probably result in a crash when
254: accessed. Nothing stops you from writing @code{XEXP (@var{x}, 28)} either,
255: but this will access memory past the end of the expression with
256: unpredictable results.@refill
257:
258: Access to operands which are vectors is more complicated. You can use the
259: macro @code{XVEC} to get the vector-pointer itself, or the macros
260: @code{XVECEXP} and @code{XVECLEN} to access the elements and length of a
261: vector.
262:
263: @table @code
264: @findex XVEC
265: @item XVEC (@var{exp}, @var{idx})
266: Access the vector-pointer which is operand number @var{idx} in @var{exp}.
267:
268: @findex XVECLEN
269: @item XVECLEN (@var{exp}, @var{idx})
270: Access the length (number of elements) in the vector which is
271: in operand number @var{idx} in @var{exp}. This value is an @code{int}.
272:
273: @findex XVECEXP
274: @item XVECEXP (@var{exp}, @var{idx}, @var{eltnum})
275: Access element number @var{eltnum} in the vector which is
276: in operand number @var{idx} in @var{exp}. This value is an RTX.
277:
278: It is up to you to make sure that @var{eltnum} is not negative
279: and is less than @code{XVECLEN (@var{exp}, @var{idx})}.
280: @end table
281:
282: All the macros defined in this section expand into lvalues and therefore
283: can be used to assign the operands, lengths and vector elements as well as
284: to access them.
285:
286: @node Flags, Machine Modes, Accessors, RTL
287: @section Flags in an RTL Expression
288: @cindex flags in RTL expression
289:
1.1.1.5 ! root 290: RTL expressions contain several flags (one-bit bitfields) that are used
1.1 root 291: in certain types of expression. Most often they are accessed with the
292: following macros:
293:
294: @table @code
295: @findex MEM_VOLATILE_P
296: @cindex @code{mem} and @samp{/v}
297: @cindex @code{volatil}, in @code{mem}
298: @cindex @samp{/v} in RTL dump
299: @item MEM_VOLATILE_P (@var{x})
300: In @code{mem} expressions, nonzero for volatile memory references.
301: Stored in the @code{volatil} field and printed as @samp{/v}.
302:
303: @findex MEM_IN_STRUCT_P
304: @cindex @code{mem} and @samp{/s}
305: @cindex @code{in_struct}, in @code{mem}
306: @cindex @samp{/s} in RTL dump
307: @item MEM_IN_STRUCT_P (@var{x})
308: In @code{mem} expressions, nonzero for reference to an entire
309: structure, union or array, or to a component of one. Zero for
310: references to a scalar variable or through a pointer to a scalar.
311: Stored in the @code{in_struct} field and printed as @samp{/s}.
312:
313: @findex REG_LOOP_TEST_P
314: @cindex @code{reg} and @samp{/s}
315: @cindex @code{in_struct}, in @code{reg}
316: @item REG_LOOP_TEST_P
317: In @code{reg} expressions, nonzero if this register's entire life is
318: contained in the exit test code for some loop. Stored in the
319: @code{in_struct} field and printed as @samp{/s}.
320:
321: @findex REG_USERVAR_P
322: @cindex @code{reg} and @samp{/v}
323: @cindex @code{volatil}, in @code{reg}
324: @item REG_USERVAR_P (@var{x})
325: In a @code{reg}, nonzero if it corresponds to a variable present in
326: the user's source code. Zero for temporaries generated internally by
327: the compiler. Stored in the @code{volatil} field and printed as
328: @samp{/v}.
329:
330: @cindex @samp{/i} in RTL dump
331: @findex REG_FUNCTION_VALUE_P
332: @cindex @code{reg} and @samp{/i}
333: @cindex @code{integrated}, in @code{reg}
334: @item REG_FUNCTION_VALUE_P (@var{x})
335: Nonzero in a @code{reg} if it is the place in which this function's
336: value is going to be returned. (This happens only in a hard
337: register.) Stored in the @code{integrated} field and printed as
338: @samp{/i}.
339:
340: The same hard register may be used also for collecting the values of
341: functions called by this one, but @code{REG_FUNCTION_VALUE_P} is zero
342: in this kind of use.
343:
1.1.1.4 root 344: @findex SUBREG_PROMOTED_VAR_P
345: @cindex @code{subreg} and @samp{/s}
346: @cindex @code{in_struct}, in @code{subreg}
347: @item SUBREG_PROMOTED_VAR_P
348: Nonzero in a @code{subreg} if it was made when accessing an object that
349: was promoted to a wider mode in accord with the @code{PROMOTED_MODE} machine
350: description macro (@pxref{Storage Layout}). In this case, the mode of
351: the @code{subreg} is the declared mode of the object and the mode of
352: @code{SUBREG_REG} is the mode of the register that holds the object.
353: Promoted variables are always either sign- or zero-extended to the wider
354: mode on every assignment. Stored in the @code{in_struct} field and
355: printed as @samp{/s}.
356:
357: @findex SUBREG_PROMOTED_UNSIGNED_P
358: @cindex @code{subreg} and @samp{/u}
359: @cindex @code{unchanging}, in @code{subreg}
360: @item SUBREG_PROMOTED_UNSIGNED_P
361: Nonzero in a @code{subreg} that has @code{SUBREG_PROMOTED_VAR_P} nonzero
362: if the object being referenced is kept zero-extended and zero if it
363: is kept sign-extended. Stored in the @code{unchanging} field and
364: printed as @samp{/u}.
365:
1.1 root 366: @findex RTX_UNCHANGING_P
367: @cindex @code{reg} and @samp{/u}
368: @cindex @code{mem} and @samp{/u}
369: @cindex @code{unchanging}, in @code{reg} and @code{mem}
370: @cindex @samp{/u} in RTL dump
371: @item RTX_UNCHANGING_P (@var{x})
372: Nonzero in a @code{reg} or @code{mem} if the value is not changed.
373: (This flag is not set for memory references via pointers to constants.
374: Such pointers only guarantee that the object will not be changed
375: explicitly by the current function. The object might be changed by
376: other functions or by aliasing.) Stored in the
377: @code{unchanging} field and printed as @samp{/u}.
378:
379: @findex RTX_INTEGRATED_P
380: @cindex @code{integrated}, in @code{insn}
381: @item RTX_INTEGRATED_P (@var{insn})
382: Nonzero in an insn if it resulted from an in-line function call.
383: Stored in the @code{integrated} field and printed as @samp{/i}. This
384: may be deleted; nothing currently depends on it.
385:
386: @findex SYMBOL_REF_USED
387: @cindex @code{used}, in @code{symbol_ref}
388: @item SYMBOL_REF_USED (@var{x})
389: In a @code{symbol_ref}, indicates that @var{x} has been used. This is
390: normally only used to ensure that @var{x} is only declared external
391: once. Stored in the @code{used} field.
392:
393: @findex SYMBOL_REF_FLAG
394: @cindex @code{symbol_ref} and @samp{/v}
395: @cindex @code{volatil}, in @code{symbol_ref}
396: @item SYMBOL_REF_FLAG (@var{x})
397: In a @code{symbol_ref}, this is used as a flag for machine-specific purposes.
398: Stored in the @code{volatil} field and printed as @samp{/v}.
399:
400: @findex LABEL_OUTSIDE_LOOP_P
401: @cindex @code{label_ref} and @samp{/s}
402: @cindex @code{in_struct}, in @code{label_ref}
403: @item LABEL_OUTSIDE_LOOP_P
404: In @code{label_ref} expressions, nonzero if this is a reference to a
405: label that is outside the innermost loop containing the reference to the
406: label. Stored in the @code{in_struct} field and printed as @samp{/s}.
407:
408: @findex INSN_DELETED_P
409: @cindex @code{volatil}, in @code{insn}
410: @item INSN_DELETED_P (@var{insn})
411: In an insn, nonzero if the insn has been deleted. Stored in the
412: @code{volatil} field and printed as @samp{/v}.
413:
414: @findex INSN_ANNULLED_BRANCH_P
415: @cindex @code{insn} and @samp{/u}
416: @cindex @code{unchanging}, in @code{insn}
417: @item INSN_ANNULLED_BRANCH_P (@var{insn})
418: In an @code{insn} in the delay slot of a branch insn, indicates that an
419: annulling branch should be used. See the discussion under
420: @code{sequence} below. Stored in the @code{unchanging} field and printed
421: as @samp{/u}.
422:
423: @findex INSN_FROM_TARGET_P
424: @cindex @code{insn} and @samp{/s}
425: @cindex @code{in_struct}, in @code{insn}
426: @cindex @samp{/s} in RTL dump
427: @item INSN_FROM_TARGET_P (@var{insn})
428: In an @code{insn} in a delay slot of a branch, indicates that the insn
429: is from the target of the branch. If the branch insn has
430: @code{INSN_ANNULLED_BRANCH_P} set, this insn should only be executed if
431: the branch is taken. For annulled branches with this bit clear, the
432: insn should be executed only if the branch is not taken. Stored in the
433: @code{in_struct} field and printed as @samp{/s}.
434:
435: @findex CONSTANT_POOL_ADDRESS_P
436: @cindex @code{symbol_ref} and @samp{/u}
437: @cindex @code{unchanging}, in @code{symbol_ref}
438: @item CONSTANT_POOL_ADDRESS_P (@var{x})
439: Nonzero in a @code{symbol_ref} if it refers to part of the current
440: function's ``constants pool''. These are addresses close to the
441: beginning of the function, and GNU CC assumes they can be addressed
442: directly (perhaps with the help of base registers). Stored in the
443: @code{unchanging} field and printed as @samp{/u}.
444:
445: @findex CONST_CALL_P
446: @cindex @code{call_insn} and @samp{/u}
447: @cindex @code{unchanging}, in @code{call_insn}
448: @item CONST_CALL_P (@var{x})
449: In a @code{call_insn}, indicates that the insn represents a call to a const
450: function. Stored in the @code{unchanging} field and printed as @samp{/u}.
451:
452: @findex LABEL_PRESERVE_P
453: @cindex @code{code_label} and @samp{/i}
454: @cindex @code{in_struct}, in @code{code_label}
455: @item LABEL_PRESERVE_P (@var{x})
456: In a @code{code_label}, indicates that the label can never be deleted.
1.1.1.4 root 457: Labels referenced by a non-local goto will have this bit set. Stored
1.1 root 458: in the @code{in_struct} field and printed as @samp{/s}.
459:
460: @findex SCHED_GROUP_P
461: @cindex @code{insn} and @samp{/i}
462: @cindex @code{in_struct}, in @code{insn}
463: @item SCHED_GROUP_P (@var{insn})
464: During instruction scheduling, in an insn, indicates that the previous insn
465: must be scheduled together with this insn. This is used to ensure that
466: certain groups of instructions will not be split up by the instruction
467: scheduling pass, for example, @code{use} insns before a @code{call_insn} may
468: not be separated from the @code{call_insn}. Stored in the @code{in_struct}
469: field and printed as @samp{/s}.
470: @end table
471:
472: These are the fields which the above macros refer to:
473:
474: @table @code
475: @findex used
476: @item used
477: Normally, this flag is used only momentarily, at the end of RTL
478: generation for a function, to count the number of times an expression
479: appears in insns. Expressions that appear more than once are copied,
480: according to the rules for shared structure (@pxref{Sharing}).
481:
482: In a @code{symbol_ref}, it indicates that an external declaration for
483: the symbol has already been written.
484:
485: In a @code{reg}, it is used by the leaf register renumbering code to ensure
486: that each register is only renumbered once.
487:
488: @findex volatil
489: @item volatil
1.1.1.4 root 490: This flag is used in @code{mem}, @code{symbol_ref} and @code{reg}
1.1 root 491: expressions and in insns. In RTL dump files, it is printed as
492: @samp{/v}.
493:
494: @cindex volatile memory references
495: In a @code{mem} expression, it is 1 if the memory reference is volatile.
496: Volatile memory references may not be deleted, reordered or combined.
497:
498: In a @code{symbol_ref} expression, it is used for machine-specific
499: purposes.
500:
501: In a @code{reg} expression, it is 1 if the value is a user-level variable.
502: 0 indicates an internal compiler temporary.
503:
504: In an insn, 1 means the insn has been deleted.
505:
506: @findex in_struct
507: @item in_struct
508: In @code{mem} expressions, it is 1 if the memory datum referred to is
509: all or part of a structure or array; 0 if it is (or might be) a scalar
510: variable. A reference through a C pointer has 0 because the pointer
511: might point to a scalar variable. This information allows the compiler
512: to determine something about possible cases of aliasing.
513:
514: In an insn in the delay slot of a branch, 1 means that this insn is from
515: the target of the branch.
516:
517: During instruction scheduling, in an insn, 1 means that this insn must be
518: scheduled as part of a group together with the previous insn.
519:
520: In @code{reg} expressions, it is 1 if the register has its entire life
1.1.1.5 ! root 521: contained within the test expression of some loop.
1.1 root 522:
1.1.1.4 root 523: In @code{subreg} expressions, 1 means that the @code{subreg} is accessing
524: an object that has had its mode promoted from a wider mode.
525:
1.1 root 526: In @code{label_ref} expressions, 1 means that the referenced label is
527: outside the innermost loop containing the insn in which the @code{label_ref}
528: was found.
529:
530: In @code{code_label} expressions, it is 1 if the label may never be deleted.
531: This is used for labels which are the target of non-local gotos.
532:
533: In an RTL dump, this flag is represented as @samp{/s}.
534:
535: @findex unchanging
536: @item unchanging
537: In @code{reg} and @code{mem} expressions, 1 means
538: that the value of the expression never changes.
539:
1.1.1.4 root 540: In @code{subreg} expressions, it is 1 if the @code{subreg} references an
541: unsigned object whose mode has been promoted to a wider mode.
542:
1.1 root 543: In an insn, 1 means that this is an annulling branch.
544:
545: In a @code{symbol_ref} expression, 1 means that this symbol addresses
546: something in the per-function constants pool.
547:
548: In a @code{call_insn}, 1 means that this instruction is a call to a
549: const function.
550:
551: In an RTL dump, this flag is represented as @samp{/u}.
552:
553: @findex integrated
554: @item integrated
555: In some kinds of expressions, including insns, this flag means the
556: rtl was produced by procedure integration.
557:
558: In a @code{reg} expression, this flag indicates the register
559: containing the value to be returned by the current function. On
560: machines that pass parameters in registers, the same register number
561: may be used for parameters as well, but this flag is not set on such
562: uses.
563: @end table
564:
565: @node Machine Modes, Constants, Flags, RTL
566: @section Machine Modes
567: @cindex machine modes
568:
569: @findex enum machine_mode
570: A machine mode describes a size of data object and the representation used
571: for it. In the C code, machine modes are represented by an enumeration
572: type, @code{enum machine_mode}, defined in @file{machmode.def}. Each RTL
573: expression has room for a machine mode and so do certain kinds of tree
574: expressions (declarations and types, to be precise).
575:
576: In debugging dumps and machine descriptions, the machine mode of an RTL
577: expression is written after the expression code with a colon to separate
578: them. The letters @samp{mode} which appear at the end of each machine mode
579: name are omitted. For example, @code{(reg:SI 38)} is a @code{reg}
580: expression with machine mode @code{SImode}. If the mode is
581: @code{VOIDmode}, it is not written at all.
582:
583: Here is a table of machine modes. The term ``byte'' below refers to an
584: object of @code{BITS_PER_UNIT} bits (@pxref{Storage Layout}).
585:
586: @table @code
587: @findex QImode
588: @item QImode
589: ``Quarter-Integer'' mode represents a single byte treated as an integer.
590:
591: @findex HImode
592: @item HImode
593: ``Half-Integer'' mode represents a two-byte integer.
594:
595: @findex PSImode
596: @item PSImode
597: ``Partial Single Integer'' mode represents an integer which occupies
598: four bytes but which doesn't really use all four. On some machines,
599: this is the right mode to use for pointers.
600:
601: @findex SImode
602: @item SImode
603: ``Single Integer'' mode represents a four-byte integer.
604:
605: @findex PDImode
606: @item PDImode
607: ``Partial Double Integer'' mode represents an integer which occupies
608: eight bytes but which doesn't really use all eight. On some machines,
609: this is the right mode to use for certain pointers.
610:
611: @findex DImode
612: @item DImode
613: ``Double Integer'' mode represents an eight-byte integer.
614:
615: @findex TImode
616: @item TImode
617: ``Tetra Integer'' (?) mode represents a sixteen-byte integer.
618:
619: @findex SFmode
620: @item SFmode
621: ``Single Floating'' mode represents a single-precision (four byte) floating
622: point number.
623:
624: @findex DFmode
625: @item DFmode
626: ``Double Floating'' mode represents a double-precision (eight byte) floating
627: point number.
628:
629: @findex XFmode
630: @item XFmode
631: ``Extended Floating'' mode represents a triple-precision (twelve byte)
632: floating point number. This mode is used for IEEE extended floating
633: point.
634:
635: @findex TFmode
636: @item TFmode
637: ``Tetra Floating'' mode represents a quadruple-precision (sixteen byte)
638: floating point number.
639:
640: @findex CCmode
641: @item CCmode
642: ``Condition Code'' mode represents the value of a condition code, which
643: is a machine-specific set of bits used to represent the result of a
644: comparison operation. Other machine-specific modes may also be used for
645: the condition code. These modes are not used on machines that use
646: @code{cc0} (see @pxref{Condition Code}).
647:
648: @findex BLKmode
649: @item BLKmode
650: ``Block'' mode represents values that are aggregates to which none of
651: the other modes apply. In RTL, only memory references can have this mode,
652: and only if they appear in string-move or vector instructions. On machines
653: which have no such instructions, @code{BLKmode} will not appear in RTL.
654:
655: @findex VOIDmode
656: @item VOIDmode
657: Void mode means the absence of a mode or an unspecified mode.
658: For example, RTL expressions of code @code{const_int} have mode
659: @code{VOIDmode} because they can be taken to have whatever mode the context
660: requires. In debugging dumps of RTL, @code{VOIDmode} is expressed by
661: the absence of any mode.
662:
663: @findex SCmode
664: @findex DCmode
665: @findex XCmode
666: @findex TCmode
667: @item SCmode, DCmode, XCmode, TCmode
668: These modes stand for a complex number represented as a pair of
669: floating point values. The values are in @code{SFmode}, @code{DFmode},
670: @code{XFmode}, and @code{TFmode}, respectively. Since C does not
671: support complex numbers, these machine modes are only partially
672: implemented.
673: @end table
674:
675: The machine description defines @code{Pmode} as a C macro which expands
676: into the machine mode used for addresses. Normally this is the mode
677: whose size is @code{BITS_PER_WORD}, @code{SImode} on 32-bit machines.
678:
679: The only modes which a machine description @i{must} support are
680: @code{QImode}, and the modes corresponding to @code{BITS_PER_WORD},
681: @code{FLOAT_TYPE_SIZE} and @code{DOUBLE_TYPE_SIZE}.
682: The compiler will attempt to use @code{DImode} for 8-byte structures and
683: unions, but this can be prevented by overriding the definition of
684: @code{MAX_FIXED_MODE_SIZE}. Alternatively, you can have the compiler
685: use @code{TImode} for 16-byte structures and unions. Likewise, you can
686: arrange for the C type @code{short int} to avoid using @code{HImode}.
687:
688: @cindex mode classes
689: Very few explicit references to machine modes remain in the compiler and
690: these few references will soon be removed. Instead, the machine modes
691: are divided into mode classes. These are represented by the enumeration
692: type @code{enum mode_class} defined in @file{machmode.h}. The possible
693: mode classes are:
694:
695: @table @code
696: @findex MODE_INT
697: @item MODE_INT
698: Integer modes. By default these are @code{QImode}, @code{HImode},
699: @code{SImode}, @code{DImode}, and @code{TImode}.
700:
701: @findex MODE_PARTIAL_INT
702: @item MODE_PARTIAL_INT
703: The ``partial integer'' modes, @code{PSImode} and @code{PDImode}.
704:
705: @findex MODE_FLOAT
706: @item MODE_FLOAT
707: floating point modes. By default these are @code{SFmode}, @code{DFmode},
708: @code{XFmode} and @code{TFmode}.
709:
710: @findex MODE_COMPLEX_INT
711: @item MODE_COMPLEX_INT
712: Complex integer modes. (These are not currently implemented).
713:
714: @findex MODE_COMPLEX_FLOAT
715: @item MODE_COMPLEX_FLOAT
716: Complex floating point modes. By default these are @code{SCmode},
717: @code{DCmode}, @code{XCmode}, and @code{TCmode}.
718:
719: @findex MODE_FUNCTION
720: @item MODE_FUNCTION
721: Algol or Pascal function variables including a static chain.
722: (These are not currently implemented).
723:
724: @findex MODE_CC
725: @item MODE_CC
726: Modes representing condition code values. These are @code{CCmode} plus
727: any modes listed in the @code{EXTRA_CC_MODES} macro. @xref{Jump Patterns},
728: also see @ref{Condition Code}.
729:
730: @findex MODE_RANDOM
731: @item MODE_RANDOM
732: This is a catchall mode class for modes which don't fit into the above
733: classes. Currently @code{VOIDmode} and @code{BLKmode} are in
734: @code{MODE_RANDOM}.
735: @end table
736:
737: Here are some C macros that relate to machine modes:
738:
739: @table @code
740: @findex GET_MODE
741: @item GET_MODE (@var{x})
742: Returns the machine mode of the RTX @var{x}.
743:
744: @findex PUT_MODE
745: @item PUT_MODE (@var{x}, @var{newmode})
746: Alters the machine mode of the RTX @var{x} to be @var{newmode}.
747:
748: @findex NUM_MACHINE_MODES
749: @item NUM_MACHINE_MODES
750: Stands for the number of machine modes available on the target
751: machine. This is one greater than the largest numeric value of any
752: machine mode.
753:
754: @findex GET_MODE_NAME
755: @item GET_MODE_NAME (@var{m})
756: Returns the name of mode @var{m} as a string.
757:
758: @findex GET_MODE_CLASS
759: @item GET_MODE_CLASS (@var{m})
760: Returns the mode class of mode @var{m}.
761:
762: @findex GET_MODE_WIDER_MODE
763: @item GET_MODE_WIDER_MODE (@var{m})
1.1.1.5 ! root 764: Returns the next wider natural mode. For example, the expression
! 765: @code{GET_MODE_WIDER_MODE (QImode)} returns @code{HImode}.
1.1 root 766:
767: @findex GET_MODE_SIZE
768: @item GET_MODE_SIZE (@var{m})
769: Returns the size in bytes of a datum of mode @var{m}.
770:
771: @findex GET_MODE_BITSIZE
772: @item GET_MODE_BITSIZE (@var{m})
773: Returns the size in bits of a datum of mode @var{m}.
774:
775: @findex GET_MODE_MASK
776: @item GET_MODE_MASK (@var{m})
777: Returns a bitmask containing 1 for all bits in a word that fit within
778: mode @var{m}. This macro can only be used for modes whose bitsize is
779: less than or equal to @code{HOST_BITS_PER_INT}.
780:
781: @findex GET_MODE_ALIGNMENT
782: @item GET_MODE_ALIGNMENT (@var{m)})
783: Return the required alignment, in bits, for an object of mode @var{m}.
784:
785: @findex GET_MODE_UNIT_SIZE
786: @item GET_MODE_UNIT_SIZE (@var{m})
787: Returns the size in bytes of the subunits of a datum of mode @var{m}.
788: This is the same as @code{GET_MODE_SIZE} except in the case of complex
789: modes. For them, the unit size is the size of the real or imaginary
790: part.
791:
792: @findex GET_MODE_NUNITS
793: @item GET_MODE_NUNITS (@var{m})
794: Returns the number of units contained in a mode, i.e.,
795: @code{GET_MODE_SIZE} divided by @code{GET_MODE_UNIT_SIZE}.
796:
797: @findex GET_CLASS_NARROWEST_MODE
798: @item GET_CLASS_NARROWEST_MODE (@var{c})
799: Returns the narrowest mode in mode class @var{c}.
800: @end table
801:
802: @findex byte_mode
803: @findex word_mode
1.1.1.5 ! root 804: The global variables @code{byte_mode} and @code{word_mode} contain modes
! 805: whose classes are @code{MODE_INT} and whose bitsizes are either
1.1 root 806: @code{BITS_PER_UNIT} or @code{BITS_PER_WORD}, respectively. On 32-bit
807: machines, these are @code{QImode} and @code{SImode}, respectively.
808:
809: @node Constants, Regs and Memory, Machine Modes, RTL
810: @section Constant Expression Types
811: @cindex RTL constants
812: @cindex RTL constant expression types
813:
814: The simplest RTL expressions are those that represent constant values.
815:
816: @table @code
817: @findex const_int
818: @item (const_int @var{i})
819: This type of expression represents the integer value @var{i}. @var{i}
820: is customarily accessed with the macro @code{INTVAL} as in
1.1.1.4 root 821: @code{INTVAL (@var{exp})}, which is equivalent to @code{XWINT (@var{exp}, 0)}.
1.1 root 822:
823: @findex const0_rtx
824: @findex const1_rtx
825: @findex const2_rtx
826: @findex constm1_rtx
827: There is only one expression object for the integer value zero; it is
828: the value of the variable @code{const0_rtx}. Likewise, the only
829: expression for integer value one is found in @code{const1_rtx}, the only
830: expression for integer value two is found in @code{const2_rtx}, and the
831: only expression for integer value negative one is found in
832: @code{constm1_rtx}. Any attempt to create an expression of code
833: @code{const_int} and value zero, one, two or negative one will return
834: @code{const0_rtx}, @code{const1_rtx}, @code{const2_rtx} or
835: @code{constm1_rtx} as appropriate.@refill
836:
837: @findex const_true_rtx
838: Similarly, there is only one object for the integer whose value is
839: @code{STORE_FLAG_VALUE}. It is found in @code{const_true_rtx}. If
840: @code{STORE_FLAG_VALUE} is one, @code{const_true_rtx} and
841: @code{const1_rtx} will point to the same object. If
842: @code{STORE_FLAG_VALUE} is -1, @code{const_true_rtx} and
843: @code{constm1_rtx} will point to the same object.@refill
844:
845: @findex const_double
846: @item (const_double:@var{m} @var{addr} @var{i0} @var{i1} @dots{})
847: Represents either a floating-point constant of mode @var{m} or an
1.1.1.5 ! root 848: integer constant too large to fit into @code{HOST_BITS_PER_WIDE_INT}
1.1 root 849: bits but small enough to fit within twice that number of bits (GNU CC
850: does not provide a mechanism to represent even larger constants). In
851: the latter case, @var{m} will be @code{VOIDmode}.
852:
853: @findex CONST_DOUBLE_MEM
854: @findex CONST_DOUBLE_CHAIN
855: @var{addr} is used to contain the @code{mem} expression that corresponds
856: to the location in memory that at which the constant can be found. If
857: it has not been allocated a memory location, but is on the chain of all
858: @code{const_double} expressions in this compilation (maintained using an
859: undisplayed field), @var{addr} contains @code{const0_rtx}. If it is not
860: on the chain, @var{addr} contains @code{cc0_rtx}. @var{addr} is
861: customarily accessed with the macro @code{CONST_DOUBLE_MEM} and the
862: chain field via @code{CONST_DOUBLE_CHAIN}.@refill
863:
864: @findex CONST_DOUBLE_LOW
1.1.1.2 root 865: If @var{m} is @code{VOIDmode}, the bits of the value are stored in
1.1 root 866: @var{i0} and @var{i1}. @var{i0} is customarily accessed with the macro
867: @code{CONST_DOUBLE_LOW} and @var{i1} with @code{CONST_DOUBLE_HIGH}.
868:
1.1.1.5 ! root 869: If the constant is floating point (regardless of its precision), then
! 870: the number of integers used to store the value depends on the size of
! 871: @code{REAL_VALUE_TYPE} (@pxref{Cross-compilation}). The integers
! 872: represent a floating point number, but not precisely in the target
! 873: machine's or host machine's floating point format. To convert them to
! 874: the precise bit pattern used by the target machine, use the macro
! 875: @code{REAL_VALUE_TO_TARGET_DOUBLE} and friends (@pxref{Data Output}).
1.1 root 876:
877: @findex CONST0_RTX
878: @findex CONST1_RTX
879: @findex CONST2_RTX
880: The macro @code{CONST0_RTX (@var{mode})} refers to an expression with
1.1.1.5 ! root 881: value 0 in mode @var{mode}. If mode @var{mode} is of mode class
1.1 root 882: @code{MODE_INT}, it returns @code{const0_rtx}. Otherwise, it returns a
883: @code{CONST_DOUBLE} expression in mode @var{mode}. Similarly, the macro
884: @code{CONST1_RTX (@var{mode})} refers to an expression with value 1 in
885: mode @var{mode} and similarly for @code{CONST2_RTX}.
886:
887: @findex const_string
888: @item (const_string @var{str})
889: Represents a constant string with value @var{str}. Currently this is
890: used only for insn attributes (@pxref{Insn Attributes}) since constant
891: strings in C are placed in memory.
892:
893: @findex symbol_ref
1.1.1.2 root 894: @item (symbol_ref:@var{mode} @var{symbol})
1.1 root 895: Represents the value of an assembler label for data. @var{symbol} is
896: a string that describes the name of the assembler label. If it starts
897: with a @samp{*}, the label is the rest of @var{symbol} not including
898: the @samp{*}. Otherwise, the label is @var{symbol}, usually prefixed
899: with @samp{_}.
900:
1.1.1.2 root 901: The @code{symbol_ref} contains a mode, which is usually @code{Pmode}.
902: Usually that is the only mode for which a symbol is directly valid.
903:
1.1 root 904: @findex label_ref
905: @item (label_ref @var{label})
906: Represents the value of an assembler label for code. It contains one
907: operand, an expression, which must be a @code{code_label} that appears
908: in the instruction sequence to identify the place where the label
909: should go.
910:
911: The reason for using a distinct expression type for code label
912: references is so that jump optimization can distinguish them.
913:
914: @item (const:@var{m} @var{exp})
915: Represents a constant that is the result of an assembly-time
916: arithmetic computation. The operand, @var{exp}, is an expression that
917: contains only constants (@code{const_int}, @code{symbol_ref} and
918: @code{label_ref} expressions) combined with @code{plus} and
919: @code{minus}. However, not all combinations are valid, since the
920: assembler cannot do arbitrary arithmetic on relocatable symbols.
921:
922: @var{m} should be @code{Pmode}.
923:
924: @findex high
925: @item (high:@var{m} @var{exp})
926: Represents the high-order bits of @var{exp}, usually a
927: @code{symbol_ref}. The number of bits is machine-dependent and is
928: normally the number of bits specified in an instruction that initializes
929: the high order bits of a register. It is used with @code{lo_sum} to
930: represent the typical two-instruction sequence used in RISC machines to
931: reference a global memory location.
932:
933: @var{m} should be @code{Pmode}.
934: @end table
935:
936: @node Regs and Memory, Arithmetic, Constants, RTL
937: @section Registers and Memory
938: @cindex RTL register expressions
939: @cindex RTL memory expressions
940:
941: Here are the RTL expression types for describing access to machine
942: registers and to main memory.
943:
944: @table @code
945: @findex reg
946: @cindex hard registers
947: @cindex pseudo registers
948: @item (reg:@var{m} @var{n})
1.1.1.5 ! root 949: For small values of the integer @var{n} (those that are less than
1.1 root 950: @code{FIRST_PSEUDO_REGISTER}), this stands for a reference to machine
951: register number @var{n}: a @dfn{hard register}. For larger values of
952: @var{n}, it stands for a temporary value or @dfn{pseudo register}.
953: The compiler's strategy is to generate code assuming an unlimited
954: number of such pseudo registers, and later convert them into hard
955: registers or into memory references.
956:
957: @var{m} is the machine mode of the reference. It is necessary because
958: machines can generally refer to each register in more than one mode.
959: For example, a register may contain a full word but there may be
960: instructions to refer to it as a half word or as a single byte, as
961: well as instructions to refer to it as a floating point number of
962: various precisions.
963:
964: Even for a register that the machine can access in only one mode,
965: the mode must always be specified.
966:
967: The symbol @code{FIRST_PSEUDO_REGISTER} is defined by the machine
968: description, since the number of hard registers on the machine is an
969: invariant characteristic of the machine. Note, however, that not
970: all of the machine registers must be general registers. All the
971: machine registers that can be used for storage of data are given
972: hard register numbers, even those that can be used only in certain
973: instructions or can hold only certain types of data.
974:
975: A hard register may be accessed in various modes throughout one
976: function, but each pseudo register is given a natural mode
977: and is accessed only in that mode. When it is necessary to describe
978: an access to a pseudo register using a nonnatural mode, a @code{subreg}
979: expression is used.
980:
981: A @code{reg} expression with a machine mode that specifies more than
982: one word of data may actually stand for several consecutive registers.
983: If in addition the register number specifies a hardware register, then
984: it actually represents several consecutive hardware registers starting
985: with the specified one.
986:
987: Each pseudo register number used in a function's RTL code is
988: represented by a unique @code{reg} expression.
989:
990: @findex FIRST_VIRTUAL_REGISTER
991: @findex LAST_VIRTUAL_REGISTER
992: Some pseudo register numbers, those within the range of
993: @code{FIRST_VIRTUAL_REGISTER} to @code{LAST_VIRTUAL_REGISTER} only
994: appear during the RTL generation phase and are eliminated before the
995: optimization phases. These represent locations in the stack frame that
996: cannot be determined until RTL generation for the function has been
997: completed. The following virtual register numbers are defined:
998:
999: @table @code
1000: @findex VIRTUAL_INCOMING_ARGS_REGNUM
1001: @item VIRTUAL_INCOMING_ARGS_REGNUM
1002: This points to the first word of the incoming arguments passed on the
1003: stack. Normally these arguments are placed there by the caller, but the
1004: callee may have pushed some arguments that were previously passed in
1005: registers.
1006:
1007: @cindex @code{FIRST_PARM_OFFSET} and virtual registers
1008: @cindex @code{ARG_POINTER_REGNUM} and virtual registers
1009: When RTL generation is complete, this virtual register is replaced
1010: by the sum of the register given by @code{ARG_POINTER_REGNUM} and the
1011: value of @code{FIRST_PARM_OFFSET}.
1012:
1013: @findex VIRTUAL_STACK_VARS_REGNUM
1014: @cindex @code{FRAME_GROWS_DOWNWARD} and virtual registers
1015: @item VIRTUAL_STACK_VARS_REGNUM
1016: If @code{FRAME_GROWS_DOWNWARDS} is defined, this points to immediately
1017: above the first variable on the stack. Otherwise, it points to the
1018: first variable on the stack.
1019:
1020: @cindex @code{STARTING_FRAME_OFFSET} and virtual registers
1021: @cindex @code{FRAME_POINTER_REGNUM} and virtual registers
1.1.1.5 ! root 1022: @code{VIRTUAL_STACK_VARS_REGNUM} is replaced with the sum of the
! 1023: register given by @code{FRAME_POINTER_REGNUM} and the value
! 1024: @code{STARTING_FRAME_OFFSET}.
1.1 root 1025:
1026: @findex VIRTUAL_STACK_DYNAMIC_REGNUM
1027: @item VIRTUAL_STACK_DYNAMIC_REGNUM
1028: This points to the location of dynamically allocated memory on the stack
1029: immediately after the stack pointer has been adjusted by the amount of
1030: memory desired.
1031:
1032: @cindex @code{STACK_DYNAMIC_OFFSET} and virtual registers
1033: @cindex @code{STACK_POINTER_REGNUM} and virtual registers
1.1.1.5 ! root 1034: This virtual register is replaced by the sum of the register given by
1.1 root 1035: @code{STACK_POINTER_REGNUM} and the value @code{STACK_DYNAMIC_OFFSET}.
1036:
1037: @findex VIRTUAL_OUTGOING_ARGS_REGNUM
1038: @item VIRTUAL_OUTGOING_ARGS_REGNUM
1039: This points to the location in the stack at which outgoing arguments
1040: should be written when the stack is pre-pushed (arguments pushed using
1041: push insns should always use @code{STACK_POINTER_REGNUM}).
1042:
1043: @cindex @code{STACK_POINTER_OFFSET} and virtual registers
1.1.1.5 ! root 1044: This virtual register is replaced by the sum of the register given by
1.1 root 1045: @code{STACK_POINTER_REGNUM} and the value @code{STACK_POINTER_OFFSET}.
1046: @end table
1047:
1048: @findex subreg
1049: @item (subreg:@var{m} @var{reg} @var{wordnum})
1050: @code{subreg} expressions are used to refer to a register in a machine
1051: mode other than its natural one, or to refer to one register of
1052: a multi-word @code{reg} that actually refers to several registers.
1053:
1054: Each pseudo-register has a natural mode. If it is necessary to
1055: operate on it in a different mode---for example, to perform a fullword
1056: move instruction on a pseudo-register that contains a single
1057: byte---the pseudo-register must be enclosed in a @code{subreg}. In
1058: such a case, @var{wordnum} is zero.
1059:
1060: Usually @var{m} is at least as narrow as the mode of @var{reg}, in which
1061: case it is restricting consideration to only the bits of @var{reg} that
1062: are in @var{m}. However, sometimes @var{m} is wider than the mode of
1063: @var{reg}. These @code{subreg} expressions are often called
1064: @dfn{paradoxical}. They are used in cases where we want to refer to an
1065: object in a wider mode but do not care what value the additional bits
1066: have. The reload pass ensures that paradoxical references are only
1067: made to hard registers.
1068:
1069: The other use of @code{subreg} is to extract the individual registers of
1070: a multi-register value. Machine modes such as @code{DImode} and
1071: @code{TImode} can indicate values longer than a word, values which
1072: usually require two or more consecutive registers. To access one of the
1073: registers, use a @code{subreg} with mode @code{SImode} and a
1074: @var{wordnum} that says which register.
1075:
1076: @cindex @code{WORDS_BIG_ENDIAN}, effect on @code{subreg}
1077: The compilation parameter @code{WORDS_BIG_ENDIAN}, if set to 1, says
1078: that word number zero is the most significant part; otherwise, it is
1079: the least significant part.
1080:
1081: @cindex combiner pass
1082: @cindex reload pass
1083: @cindex @code{subreg}, special reload handling
1084: Between the combiner pass and the reload pass, it is possible to have a
1085: paradoxical @code{subreg} which contains a @code{mem} instead of a
1086: @code{reg} as its first operand. After the reload pass, it is also
1087: possible to have a non-paradoxical @code{subreg} which contains a
1088: @code{mem}; this usually occurs when the @code{mem} is a stack slot
1089: which replaced a pseudo register.
1090:
1091: Note that it is not valid to access a @code{DFmode} value in @code{SFmode}
1092: using a @code{subreg}. On some machines the most significant part of a
1093: @code{DFmode} value does not have the same format as a single-precision
1094: floating value.
1095:
1096: It is also not valid to access a single word of a multi-word value in a
1097: hard register when less registers can hold the value than would be
1098: expected from its size. For example, some 32-bit machines have
1099: floating-point registers that can hold an entire @code{DFmode} value.
1100: If register 10 were such a register @code{(subreg:SI (reg:DF 10) 1)}
1101: would be invalid because there is no way to convert that reference to
1102: a single machine register. The reload pass prevents @code{subreg}
1103: expressions such as these from being formed.
1104:
1105: @findex SUBREG_REG
1106: @findex SUBREG_WORD
1107: The first operand of a @code{subreg} expression is customarily accessed
1108: with the @code{SUBREG_REG} macro and the second operand is customarily
1109: accessed with the @code{SUBREG_WORD} macro.
1110:
1111: @findex scratch
1112: @cindex scratch operands
1113: @item (scratch:@var{m})
1114: This represents a scratch register that will be required for the
1115: execution of a single instruction and not used subsequently. It is
1116: converted into a @code{reg} by either the local register allocator or
1117: the reload pass.
1118:
1119: @code{scratch} is usually present inside a @code{clobber} operation
1120: (@pxref{Side Effects}).
1121:
1122: @findex cc0
1123: @cindex condition code register
1124: @item (cc0)
1125: This refers to the machine's condition code register. It has no
1126: operands and may not have a machine mode. There are two ways to use it:
1127:
1128: @itemize @bullet
1129: @item
1130: To stand for a complete set of condition code flags. This is best on
1131: most machines, where each comparison sets the entire series of flags.
1132:
1133: With this technique, @code{(cc0)} may be validly used in only two
1134: contexts: as the destination of an assignment (in test and compare
1135: instructions) and in comparison operators comparing against zero
1136: (@code{const_int} with value zero; that is to say, @code{const0_rtx}).
1137:
1138: @item
1139: To stand for a single flag that is the result of a single condition.
1140: This is useful on machines that have only a single flag bit, and in
1141: which comparison instructions must specify the condition to test.
1142:
1143: With this technique, @code{(cc0)} may be validly used in only two
1144: contexts: as the destination of an assignment (in test and compare
1145: instructions) where the source is a comparison operator, and as the
1146: first operand of @code{if_then_else} (in a conditional branch).
1147: @end itemize
1148:
1149: @findex cc0_rtx
1150: There is only one expression object of code @code{cc0}; it is the
1151: value of the variable @code{cc0_rtx}. Any attempt to create an
1152: expression of code @code{cc0} will return @code{cc0_rtx}.
1153:
1154: Instructions can set the condition code implicitly. On many machines,
1155: nearly all instructions set the condition code based on the value that
1156: they compute or store. It is not necessary to record these actions
1157: explicitly in the RTL because the machine description includes a
1158: prescription for recognizing the instructions that do so (by means of
1159: the macro @code{NOTICE_UPDATE_CC}). @xref{Condition Code}. Only
1160: instructions whose sole purpose is to set the condition code, and
1161: instructions that use the condition code, need mention @code{(cc0)}.
1162:
1163: On some machines, the condition code register is given a register number
1164: and a @code{reg} is used instead of @code{(cc0)}. This is usually the
1165: preferable approach if only a small subset of instructions modify the
1166: condition code. Other machines store condition codes in general
1167: registers; in such cases a pseudo register should be used.
1168:
1169: Some machines, such as the Sparc and RS/6000, have two sets of
1170: arithmetic instructions, one that sets and one that does not set the
1171: condition code. This is best handled by normally generating the
1172: instruction that does not set the condition code, and making a pattern
1173: that both performs the arithmetic and sets the condition code register
1174: (which would not be @code{(cc0)} in this case). For examples, search
1175: for @samp{addcc} and @samp{andcc} in @file{sparc.md}.
1176:
1177: @findex pc
1178: @item (pc)
1179: @cindex program counter
1180: This represents the machine's program counter. It has no operands and
1181: may not have a machine mode. @code{(pc)} may be validly used only in
1182: certain specific contexts in jump instructions.
1183:
1184: @findex pc_rtx
1185: There is only one expression object of code @code{pc}; it is the value
1186: of the variable @code{pc_rtx}. Any attempt to create an expression of
1187: code @code{pc} will return @code{pc_rtx}.
1188:
1189: All instructions that do not jump alter the program counter implicitly
1190: by incrementing it, but there is no need to mention this in the RTL.
1191:
1192: @findex mem
1193: @item (mem:@var{m} @var{addr})
1194: This RTX represents a reference to main memory at an address
1195: represented by the expression @var{addr}. @var{m} specifies how large
1196: a unit of memory is accessed.
1197: @end table
1198:
1199: @node Arithmetic, Comparisons, Regs and Memory, RTL
1200: @section RTL Expressions for Arithmetic
1201: @cindex arithmetic, in RTL
1202: @cindex math, in RTL
1203: @cindex RTL expressions for arithmetic
1204:
1205: Unless otherwise specified, all the operands of arithmetic expressions
1206: must be valid for mode @var{m}. An operand is valid for mode @var{m}
1207: if it has mode @var{m}, or if it is a @code{const_int} or
1208: @code{const_double} and @var{m} is a mode of class @code{MODE_INT}.
1209:
1210: For commutative binary operations, constants should be placed in the
1211: second operand.
1212:
1213: @table @code
1214: @findex plus
1215: @cindex RTL addition
1216: @cindex RTL sum
1217: @item (plus:@var{m} @var{x} @var{y})
1218: Represents the sum of the values represented by @var{x} and @var{y}
1219: carried out in machine mode @var{m}.
1220:
1221: @findex lo_sum
1222: @item (lo_sum:@var{m} @var{x} @var{y})
1223: Like @code{plus}, except that it represents that sum of @var{x} and the
1224: low-order bits of @var{y}. The number of low order bits is
1225: machine-dependent but is normally the number of bits in a @code{Pmode}
1226: item minus the number of bits set by the @code{high} code
1227: (@pxref{Constants}).
1228:
1229: @var{m} should be @code{Pmode}.
1230:
1231: @findex minus
1232: @cindex RTL subtraction
1233: @cindex RTL difference
1234: @item (minus:@var{m} @var{x} @var{y})
1235: Like @code{plus} but represents subtraction.
1236:
1237: @findex compare
1238: @cindex RTL comparison
1239: @item (compare:@var{m} @var{x} @var{y})
1240: Represents the result of subtracting @var{y} from @var{x} for purposes
1241: of comparison. The result is computed without overflow, as if with
1242: infinite precision.
1243:
1244: Of course, machines can't really subtract with infinite precision.
1245: However, they can pretend to do so when only the sign of the
1246: result will be used, which is the case when the result is stored
1247: in the condition code. And that is the only way this kind of expression
1248: may validly be used: as a value to be stored in the condition codes.
1249:
1250: The mode @var{m} is not related to the modes of @var{x} and @var{y},
1251: but instead is the mode of the condition code value. If @code{(cc0)}
1252: is used, it is @code{VOIDmode}. Otherwise it is some mode in class
1253: @code{MODE_CC}, often @code{CCmode}. @xref{Condition Code}.
1254:
1255: Normally, @var{x} and @var{y} must have the same mode. Otherwise,
1256: @code{compare} is valid only if the mode of @var{x} is in class
1257: @code{MODE_INT} and @var{y} is a @code{const_int} or
1258: @code{const_double} with mode @code{VOIDmode}. The mode of @var{x}
1259: determines what mode the comparison is to be done in; thus it must not
1260: be @code{VOIDmode}.
1261:
1262: If one of the operands is a constant, it should be placed in the
1263: second operand and the comparison code adjusted as appropriate.
1264:
1265: A @code{compare} specifying two @code{VOIDmode} constants is not valid
1266: since there is no way to know in what mode the comparison is to be
1267: performed; the comparison must either be folded during the compilation
1268: or the first operand must be loaded into a register while its mode is
1269: still known.
1270:
1271: @findex neg
1272: @item (neg:@var{m} @var{x})
1273: Represents the negation (subtraction from zero) of the value represented
1274: by @var{x}, carried out in mode @var{m}.
1275:
1276: @findex mult
1277: @cindex multiplication
1278: @cindex product
1279: @item (mult:@var{m} @var{x} @var{y})
1280: Represents the signed product of the values represented by @var{x} and
1281: @var{y} carried out in machine mode @var{m}.
1282:
1283: Some machines support a multiplication that generates a product wider
1284: than the operands. Write the pattern for this as
1285:
1286: @example
1287: (mult:@var{m} (sign_extend:@var{m} @var{x}) (sign_extend:@var{m} @var{y}))
1288: @end example
1289:
1290: where @var{m} is wider than the modes of @var{x} and @var{y}, which need
1291: not be the same.
1292:
1293: Write patterns for unsigned widening multiplication similarly using
1294: @code{zero_extend}.
1295:
1296: @findex div
1297: @cindex division
1298: @cindex signed division
1299: @cindex quotient
1300: @item (div:@var{m} @var{x} @var{y})
1301: Represents the quotient in signed division of @var{x} by @var{y},
1302: carried out in machine mode @var{m}. If @var{m} is a floating point
1303: mode, it represents the exact quotient; otherwise, the integerized
1304: quotient.
1305:
1306: Some machines have division instructions in which the operands and
1307: quotient widths are not all the same; you should represent
1308: such instructions using @code{truncate} and @code{sign_extend} as in,
1309:
1310: @example
1311: (truncate:@var{m1} (div:@var{m2} @var{x} (sign_extend:@var{m2} @var{y})))
1312: @end example
1313:
1314: @findex udiv
1315: @cindex unsigned division
1316: @cindex division
1317: @item (udiv:@var{m} @var{x} @var{y})
1318: Like @code{div} but represents unsigned division.
1319:
1320: @findex mod
1321: @findex umod
1322: @cindex remainder
1323: @cindex division
1324: @item (mod:@var{m} @var{x} @var{y})
1325: @itemx (umod:@var{m} @var{x} @var{y})
1326: Like @code{div} and @code{udiv} but represent the remainder instead of
1327: the quotient.
1328:
1329: @findex smin
1330: @findex smax
1331: @cindex signed minimum
1332: @cindex signed maximum
1333: @item (smin:@var{m} @var{x} @var{y})
1334: @itemx (smax:@var{m} @var{x} @var{y})
1335: Represents the smaller (for @code{smin}) or larger (for @code{smax}) of
1336: @var{x} and @var{y}, interpreted as signed integers in mode @var{m}.
1337:
1338: @findex umin
1339: @findex umax
1340: @cindex unsigned minimum and maximum
1341: @item (umin:@var{m} @var{x} @var{y})
1342: @itemx (umax:@var{m} @var{x} @var{y})
1343: Like @code{smin} and @code{smax}, but the values are interpreted as unsigned
1344: integers.
1345:
1346: @findex not
1347: @cindex complement, bitwise
1348: @cindex bitwise complement
1349: @item (not:@var{m} @var{x})
1350: Represents the bitwise complement of the value represented by @var{x},
1351: carried out in mode @var{m}, which must be a fixed-point machine mode.
1352:
1353: @findex and
1354: @cindex logical-and, bitwise
1355: @cindex bitwise logical-and
1356: @item (and:@var{m} @var{x} @var{y})
1357: Represents the bitwise logical-and of the values represented by
1358: @var{x} and @var{y}, carried out in machine mode @var{m}, which must be
1359: a fixed-point machine mode.
1360:
1361: @findex ior
1362: @cindex inclusive-or, bitwise
1363: @cindex bitwise inclusive-or
1364: @item (ior:@var{m} @var{x} @var{y})
1365: Represents the bitwise inclusive-or of the values represented by @var{x}
1366: and @var{y}, carried out in machine mode @var{m}, which must be a
1367: fixed-point mode.
1368:
1369: @findex xor
1370: @cindex exclusive-or, bitwise
1371: @cindex bitwise exclusive-or
1372: @item (xor:@var{m} @var{x} @var{y})
1373: Represents the bitwise exclusive-or of the values represented by @var{x}
1374: and @var{y}, carried out in machine mode @var{m}, which must be a
1375: fixed-point mode.
1376:
1377: @findex ashift
1378: @cindex left shift
1379: @cindex shift
1380: @cindex arithmetic shift
1381: @item (ashift:@var{m} @var{x} @var{c})
1382: Represents the result of arithmetically shifting @var{x} left by @var{c}
1383: places. @var{x} have mode @var{m}, a fixed-point machine mode. @var{c}
1384: be a fixed-point mode or be a constant with mode @code{VOIDmode}; which
1385: mode is determined by the mode called for in the machine description
1386: entry for the left-shift instruction. For example, on the Vax, the mode
1387: of @var{c} is @code{QImode} regardless of @var{m}.
1388:
1389: @findex lshift
1390: @cindex left shift
1391: @cindex logical shift
1392: @item (lshift:@var{m} @var{x} @var{c})
1.1.1.2 root 1393: Like @code{ashift} but for logical left shift. @code{ashift} and
1.1 root 1394: @code{lshift} are identical operations; we customarily use @code{ashift}
1395: for both.
1396:
1397: @findex lshiftrt
1398: @cindex right shift
1399: @findex ashiftrt
1400: @item (lshiftrt:@var{m} @var{x} @var{c})
1401: @itemx (ashiftrt:@var{m} @var{x} @var{c})
1402: Like @code{lshift} and @code{ashift} but for right shift. Unlike
1403: the case for left shift, these two operations are distinct.
1404:
1405: @findex rotate
1406: @cindex rotate
1407: @cindex left rotate
1408: @findex rotatert
1409: @cindex right rotate
1410: @item (rotate:@var{m} @var{x} @var{c})
1411: @itemx (rotatert:@var{m} @var{x} @var{c})
1412: Similar but represent left and right rotate. If @var{c} is a constant,
1413: use @code{rotate}.
1414:
1415: @findex abs
1416: @cindex absolute value
1417: @item (abs:@var{m} @var{x})
1418: Represents the absolute value of @var{x}, computed in mode @var{m}.
1419:
1420: @findex sqrt
1421: @cindex square root
1422: @item (sqrt:@var{m} @var{x})
1423: Represents the square root of @var{x}, computed in mode @var{m}.
1424: Most often @var{m} will be a floating point mode.
1425:
1426: @findex ffs
1427: @item (ffs:@var{m} @var{x})
1428: Represents one plus the index of the least significant 1-bit in
1429: @var{x}, represented as an integer of mode @var{m}. (The value is
1430: zero if @var{x} is zero.) The mode of @var{x} need not be @var{m};
1431: depending on the target machine, various mode combinations may be
1432: valid.
1433: @end table
1434:
1435: @node Comparisons, Bit Fields, Arithmetic, RTL
1436: @section Comparison Operations
1437: @cindex RTL comparison operations
1438:
1439: Comparison operators test a relation on two operands and are considered
1440: to represent a machine-dependent nonzero value described by, but not
1441: necessarily equal to, @code{STORE_FLAG_VALUE} (@pxref{Misc})
1442: if the relation holds, or zero if it does not. The mode of the
1443: comparison operation is independent of the mode of the data being
1444: compared. If the comparison operation is being tested (e.g., the first
1445: operand of an @code{if_then_else}), the mode must be @code{VOIDmode}.
1446: If the comparison operation is producing data to be stored in some
1447: variable, the mode must be in class @code{MODE_INT}. All comparison
1448: operations producing data must use the same mode, which is
1449: machine-specific.
1450:
1451: @cindex condition codes
1452: There are two ways that comparison operations may be used. The
1453: comparison operators may be used to compare the condition codes
1454: @code{(cc0)} against zero, as in @code{(eq (cc0) (const_int 0))}. Such
1455: a construct actually refers to the result of the preceding instruction
1456: in which the condition codes were set. The instructing setting the
1457: condition code must be adjacent to the instruction using the condition
1458: code; only @code{note} insns may separate them.
1459:
1460: Alternatively, a comparison operation may directly compare two data
1461: objects. The mode of the comparison is determined by the operands; they
1462: must both be valid for a common machine mode. A comparison with both
1463: operands constant would be invalid as the machine mode could not be
1464: deduced from it, but such a comparison should never exist in RTL due to
1465: constant folding.
1466:
1467: In the example above, if @code{(cc0)} were last set to
1468: @code{(compare @var{x} @var{y})}, the comparison operation is
1469: identical to @code{(eq @var{x} @var{y})}. Usually only one style
1470: of comparisons is supported on a particular machine, but the combine
1471: pass will try to merge the operations to produce the @code{eq} shown
1472: in case it exists in the context of the particular insn involved.
1473:
1474: Inequality comparisons come in two flavors, signed and unsigned. Thus,
1475: there are distinct expression codes @code{gt} and @code{gtu} for signed and
1476: unsigned greater-than. These can produce different results for the same
1477: pair of integer values: for example, 1 is signed greater-than -1 but not
1478: unsigned greater-than, because -1 when regarded as unsigned is actually
1479: @code{0xffffffff} which is greater than 1.
1480:
1481: The signed comparisons are also used for floating point values. Floating
1482: point comparisons are distinguished by the machine modes of the operands.
1483:
1484: @table @code
1485: @findex eq
1486: @cindex equal
1487: @item (eq:@var{m} @var{x} @var{y})
1488: 1 if the values represented by @var{x} and @var{y} are equal,
1489: otherwise 0.
1490:
1491: @findex ne
1492: @cindex not equal
1493: @item (ne:@var{m} @var{x} @var{y})
1494: 1 if the values represented by @var{x} and @var{y} are not equal,
1495: otherwise 0.
1496:
1497: @findex gt
1498: @cindex greater than
1499: @item (gt:@var{m} @var{x} @var{y})
1500: 1 if the @var{x} is greater than @var{y}. If they are fixed-point,
1501: the comparison is done in a signed sense.
1502:
1503: @findex gtu
1504: @cindex greater than
1505: @cindex unsigned greater than
1506: @item (gtu:@var{m} @var{x} @var{y})
1507: Like @code{gt} but does unsigned comparison, on fixed-point numbers only.
1508:
1509: @findex lt
1510: @cindex less than
1511: @findex ltu
1512: @cindex unsigned less than
1513: @item (lt:@var{m} @var{x} @var{y})
1514: @itemx (ltu:@var{m} @var{x} @var{y})
1515: Like @code{gt} and @code{gtu} but test for ``less than''.
1516:
1517: @findex ge
1518: @cindex greater than
1519: @findex geu
1520: @cindex unsigned greater than
1521: @item (ge:@var{m} @var{x} @var{y})
1522: @itemx (geu:@var{m} @var{x} @var{y})
1523: Like @code{gt} and @code{gtu} but test for ``greater than or equal''.
1524:
1525: @findex le
1526: @cindex less than or equal
1527: @findex leu
1528: @cindex unsigned less than
1529: @item (le:@var{m} @var{x} @var{y})
1530: @itemx (leu:@var{m} @var{x} @var{y})
1531: Like @code{gt} and @code{gtu} but test for ``less than or equal''.
1532:
1533: @findex if_then_else
1534: @item (if_then_else @var{cond} @var{then} @var{else})
1535: This is not a comparison operation but is listed here because it is
1536: always used in conjunction with a comparison operation. To be
1537: precise, @var{cond} is a comparison expression. This expression
1538: represents a choice, according to @var{cond}, between the value
1539: represented by @var{then} and the one represented by @var{else}.
1540:
1541: On most machines, @code{if_then_else} expressions are valid only
1542: to express conditional jumps.
1543:
1544: @findex cond
1545: @item (cond [@var{test1} @var{value1} @var{test2} @var{value2} @dots{}] @var{default})
1546: Similar to @code{if_then_else}, but more general. Each of @var{test1},
1547: @var{test2}, @dots{} is performed in turn. The result of this expression is
1548: the @var{value} corresponding to the first non-zero test, or @var{default} if
1549: none of the tests are non-zero expressions.
1550:
1551: This is currently not valid for instruction patterns and is supported only
1552: for insn attributes. @xref{Insn Attributes}.
1553: @end table
1554:
1555: @node Bit Fields, Conversions, Comparisons, RTL
1556: @section Bit Fields
1557: @cindex bit fields
1558:
1.1.1.5 ! root 1559: Special expression codes exist to represent bitfield instructions.
1.1 root 1560: These types of expressions are lvalues in RTL; they may appear
1561: on the left side of an assignment, indicating insertion of a value
1562: into the specified bit field.
1563:
1564: @table @code
1565: @findex sign_extract
1566: @cindex @code{BITS_BIG_ENDIAN}, effect on @code{sign_extract}
1567: @item (sign_extract:@var{m} @var{loc} @var{size} @var{pos})
1568: This represents a reference to a sign-extended bit field contained or
1569: starting in @var{loc} (a memory or register reference). The bit field
1570: is @var{size} bits wide and starts at bit @var{pos}. The compilation
1571: option @code{BITS_BIG_ENDIAN} says which end of the memory unit
1572: @var{pos} counts from.
1573:
1574: If @var{loc} is in memory, its mode must be a single-byte integer mode.
1575: If @var{loc} is in a register, the mode to use is specified by the
1576: operand of the @code{insv} or @code{extv} pattern
1577: (@pxref{Standard Names}) and is usually a full-word integer mode.
1578:
1579: The mode of @var{pos} is machine-specific and is also specified
1580: in the @code{insv} or @code{extv} pattern.
1581:
1582: The mode @var{m} is the same as the mode that would be used for
1583: @var{loc} if it were a register.
1584:
1585: @findex zero_extract
1586: @item (zero_extract:@var{m} @var{loc} @var{size} @var{pos})
1587: Like @code{sign_extract} but refers to an unsigned or zero-extended
1588: bit field. The same sequence of bits are extracted, but they
1589: are filled to an entire word with zeros instead of by sign-extension.
1590: @end table
1591:
1592: @node Conversions, RTL Declarations, Bit Fields, RTL
1593: @section Conversions
1594: @cindex conversions
1595: @cindex machine mode conversions
1596:
1597: All conversions between machine modes must be represented by
1598: explicit conversion operations. For example, an expression
1599: which is the sum of a byte and a full word cannot be written as
1600: @code{(plus:SI (reg:QI 34) (reg:SI 80))} because the @code{plus}
1601: operation requires two operands of the same machine mode.
1602: Therefore, the byte-sized operand is enclosed in a conversion
1603: operation, as in
1604:
1605: @example
1606: (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
1607: @end example
1608:
1609: The conversion operation is not a mere placeholder, because there
1610: may be more than one way of converting from a given starting mode
1611: to the desired final mode. The conversion operation code says how
1612: to do it.
1613:
1614: For all conversion operations, @var{x} must not be @code{VOIDmode}
1615: because the mode in which to do the conversion would not be known.
1616: The conversion must either be done at compile-time or @var{x}
1617: must be placed into a register.
1618:
1619: @table @code
1620: @findex sign_extend
1621: @item (sign_extend:@var{m} @var{x})
1622: Represents the result of sign-extending the value @var{x}
1623: to machine mode @var{m}. @var{m} must be a fixed-point mode
1624: and @var{x} a fixed-point value of a mode narrower than @var{m}.
1625:
1626: @findex zero_extend
1627: @item (zero_extend:@var{m} @var{x})
1628: Represents the result of zero-extending the value @var{x}
1629: to machine mode @var{m}. @var{m} must be a fixed-point mode
1630: and @var{x} a fixed-point value of a mode narrower than @var{m}.
1631:
1632: @findex float_extend
1633: @item (float_extend:@var{m} @var{x})
1634: Represents the result of extending the value @var{x}
1635: to machine mode @var{m}. @var{m} must be a floating point mode
1636: and @var{x} a floating point value of a mode narrower than @var{m}.
1637:
1638: @findex truncate
1639: @item (truncate:@var{m} @var{x})
1640: Represents the result of truncating the value @var{x}
1641: to machine mode @var{m}. @var{m} must be a fixed-point mode
1642: and @var{x} a fixed-point value of a mode wider than @var{m}.
1643:
1644: @findex float_truncate
1645: @item (float_truncate:@var{m} @var{x})
1646: Represents the result of truncating the value @var{x}
1647: to machine mode @var{m}. @var{m} must be a floating point mode
1648: and @var{x} a floating point value of a mode wider than @var{m}.
1649:
1650: @findex float
1651: @item (float:@var{m} @var{x})
1652: Represents the result of converting fixed point value @var{x},
1653: regarded as signed, to floating point mode @var{m}.
1654:
1655: @findex unsigned_float
1656: @item (unsigned_float:@var{m} @var{x})
1657: Represents the result of converting fixed point value @var{x},
1658: regarded as unsigned, to floating point mode @var{m}.
1659:
1660: @findex fix
1661: @item (fix:@var{m} @var{x})
1662: When @var{m} is a fixed point mode, represents the result of
1663: converting floating point value @var{x} to mode @var{m}, regarded as
1664: signed. How rounding is done is not specified, so this operation may
1665: be used validly in compiling C code only for integer-valued operands.
1666:
1667: @findex unsigned_fix
1668: @item (unsigned_fix:@var{m} @var{x})
1669: Represents the result of converting floating point value @var{x} to
1670: fixed point mode @var{m}, regarded as unsigned. How rounding is done
1671: is not specified.
1672:
1673: @findex fix
1674: @item (fix:@var{m} @var{x})
1675: When @var{m} is a floating point mode, represents the result of
1676: converting floating point value @var{x} (valid for mode @var{m}) to an
1677: integer, still represented in floating point mode @var{m}, by rounding
1678: towards zero.
1679: @end table
1680:
1681: @node RTL Declarations, Side Effects, Conversions, RTL
1682: @section Declarations
1683: @cindex RTL declarations
1684: @cindex declarations, RTL
1685:
1686: Declaration expression codes do not represent arithmetic operations
1687: but rather state assertions about their operands.
1688:
1689: @table @code
1690: @findex strict_low_part
1691: @cindex @code{subreg}, in @code{strict_low_part}
1692: @item (strict_low_part (subreg:@var{m} (reg:@var{n} @var{r}) 0))
1.1.1.4 root 1693: This expression code is used in only one context: as the destination operand of a
1.1 root 1694: @code{set} expression. In addition, the operand of this expression
1695: must be a non-paradoxical @code{subreg} expression.
1696:
1697: The presence of @code{strict_low_part} says that the part of the
1698: register which is meaningful in mode @var{n}, but is not part of
1699: mode @var{m}, is not to be altered. Normally, an assignment to such
1700: a subreg is allowed to have undefined effects on the rest of the
1701: register when @var{m} is less than a word.
1702: @end table
1703:
1704: @node Side Effects, Incdec, RTL Declarations, RTL
1705: @section Side Effect Expressions
1706: @cindex RTL side effect expressions
1707:
1708: The expression codes described so far represent values, not actions.
1709: But machine instructions never produce values; they are meaningful
1710: only for their side effects on the state of the machine. Special
1711: expression codes are used to represent side effects.
1712:
1713: The body of an instruction is always one of these side effect codes;
1714: the codes described above, which represent values, appear only as
1715: the operands of these.
1716:
1717: @table @code
1718: @findex set
1719: @item (set @var{lval} @var{x})
1720: Represents the action of storing the value of @var{x} into the place
1721: represented by @var{lval}. @var{lval} must be an expression
1722: representing a place that can be stored in: @code{reg} (or
1723: @code{subreg} or @code{strict_low_part}), @code{mem}, @code{pc} or
1724: @code{cc0}.@refill
1725:
1726: If @var{lval} is a @code{reg}, @code{subreg} or @code{mem}, it has a
1727: machine mode; then @var{x} must be valid for that mode.@refill
1728:
1729: If @var{lval} is a @code{reg} whose machine mode is less than the full
1730: width of the register, then it means that the part of the register
1731: specified by the machine mode is given the specified value and the
1732: rest of the register receives an undefined value. Likewise, if
1733: @var{lval} is a @code{subreg} whose machine mode is narrower than
1734: the mode of the register, the rest of the register can be changed in
1735: an undefined way.
1736:
1737: If @var{lval} is a @code{strict_low_part} of a @code{subreg}, then the
1738: part of the register specified by the machine mode of the
1739: @code{subreg} is given the value @var{x} and the rest of the register
1740: is not changed.@refill
1741:
1742: If @var{lval} is @code{(cc0)}, it has no machine mode, and @var{x} may
1743: be either a @code{compare} expression or a value that may have any mode.
1744: The latter case represents a ``test'' instruction. The expression
1745: @code{(set (cc0) (reg:@var{m} @var{n}))} is equivalent to
1746: @code{(set (cc0) (compare (reg:@var{m} @var{n}) (const_int 0)))}.
1747: Use the former expression to save space during the compilation.
1748:
1749: @cindex jump instructions and @code{set}
1750: @cindex @code{if_then_else} usage
1751: If @var{lval} is @code{(pc)}, we have a jump instruction, and the
1752: possibilities for @var{x} are very limited. It may be a
1753: @code{label_ref} expression (unconditional jump). It may be an
1754: @code{if_then_else} (conditional jump), in which case either the
1755: second or the third operand must be @code{(pc)} (for the case which
1756: does not jump) and the other of the two must be a @code{label_ref}
1757: (for the case which does jump). @var{x} may also be a @code{mem} or
1758: @code{(plus:SI (pc) @var{y})}, where @var{y} may be a @code{reg} or a
1759: @code{mem}; these unusual patterns are used to represent jumps through
1760: branch tables.@refill
1761:
1762: If @var{lval} is neither @code{(cc0)} nor @code{(pc)}, the mode of
1763: @var{lval} must not be @code{VOIDmode} and the mode of @var{x} must be
1764: valid for the mode of @var{lval}.
1765:
1766: @findex SET_DEST
1767: @findex SET_SRC
1768: @var{lval} is customarily accessed with the @code{SET_DEST} macro and
1769: @var{x} with the @code{SET_SRC} macro.
1770:
1771: @findex return
1772: @item (return)
1773: As the sole expression in a pattern, represents a return from the
1774: current function, on machines where this can be done with one
1775: instruction, such as Vaxes. On machines where a multi-instruction
1776: ``epilogue'' must be executed in order to return from the function,
1777: returning is done by jumping to a label which precedes the epilogue, and
1778: the @code{return} expression code is never used.
1779:
1780: Inside an @code{if_then_else} expression, represents the value to be
1781: placed in @code{pc} to return to the caller.
1782:
1783: Note that an insn pattern of @code{(return)} is logically equivalent to
1784: @code{(set (pc) (return))}, but the latter form is never used.
1785:
1786: @findex call
1787: @item (call @var{function} @var{nargs})
1788: Represents a function call. @var{function} is a @code{mem} expression
1789: whose address is the address of the function to be called.
1790: @var{nargs} is an expression which can be used for two purposes: on
1791: some machines it represents the number of bytes of stack argument; on
1792: others, it represents the number of argument registers.
1793:
1794: Each machine has a standard machine mode which @var{function} must
1795: have. The machine description defines macro @code{FUNCTION_MODE} to
1796: expand into the requisite mode name. The purpose of this mode is to
1797: specify what kind of addressing is allowed, on machines where the
1798: allowed kinds of addressing depend on the machine mode being
1799: addressed.
1800:
1801: @findex clobber
1802: @item (clobber @var{x})
1803: Represents the storing or possible storing of an unpredictable,
1804: undescribed value into @var{x}, which must be a @code{reg},
1805: @code{scratch} or @code{mem} expression.
1806:
1807: One place this is used is in string instructions that store standard
1808: values into particular hard registers. It may not be worth the
1809: trouble to describe the values that are stored, but it is essential to
1810: inform the compiler that the registers will be altered, lest it
1811: attempt to keep data in them across the string instruction.
1812:
1813: If @var{x} is @code{(mem:BLK (const_int 0))}, it means that all memory
1814: locations must be presumed clobbered.
1815:
1816: Note that the machine description classifies certain hard registers as
1817: ``call-clobbered''. All function call instructions are assumed by
1818: default to clobber these registers, so there is no need to use
1819: @code{clobber} expressions to indicate this fact. Also, each function
1820: call is assumed to have the potential to alter any memory location,
1821: unless the function is declared @code{const}.
1822:
1823: If the last group of expressions in a @code{parallel} are each a
1824: @code{clobber} expression whose arguments are @code{reg} or
1825: @code{match_scratch} (@pxref{RTL Template}) expressions, the combiner
1826: phase can add the appropriate @code{clobber} expressions to an insn it
1827: has constructed when doing so will cause a pattern to be matched.
1828:
1829: This feature can be used, for example, on a machine that whose multiply
1830: and add instructions don't use an MQ register but which has an
1831: add-accumulate instruction that does clobber the MQ register. Similarly,
1832: a combined instruction might require a temporary register while the
1833: constituent instructions might not.
1834:
1835: When a @code{clobber} expression for a register appears inside a
1836: @code{parallel} with other side effects, the register allocator
1837: guarantees that the register is unoccupied both before and after that
1838: insn. However, the reload phase may allocate a register used for one of
1839: the inputs unless the @samp{&} constraint is specified for the selected
1840: alternative (@pxref{Modifiers}). You can clobber either a specific hard
1841: register, a pseudo register, or a @code{scratch} expression; in the
1842: latter two cases, GNU CC will allocate a hard register that is available
1843: there for use as a temporary.
1844:
1845: For instructions that require a temporary register, you should use
1846: @code{scratch} instead of a pseudo-register because this will allow the
1847: combiner phase to add the @code{clobber} when required. You do this by
1848: coding (@code{clobber} (@code{match_scratch} @dots{})). If you do
1849: clobber a pseudo register, use one which appears nowhere else---generate
1850: a new one each time. Otherwise, you may confuse CSE.
1851:
1852: There is one other known use for clobbering a pseudo register in a
1853: @code{parallel}: when one of the input operands of the insn is also
1854: clobbered by the insn. In this case, using the same pseudo register in
1855: the clobber and elsewhere in the insn produces the expected results.
1856:
1857: @findex use
1858: @item (use @var{x})
1859: Represents the use of the value of @var{x}. It indicates that the
1860: value in @var{x} at this point in the program is needed, even though
1861: it may not be apparent why this is so. Therefore, the compiler will
1862: not attempt to delete previous instructions whose only effect is to
1863: store a value in @var{x}. @var{x} must be a @code{reg} expression.
1864:
1865: During the delayed branch scheduling phase, @var{x} may be an insn.
1866: This indicates that @var{x} previously was located at this place in the
1867: code and its data dependencies need to be taken into account. These
1868: @code{use} insns will be deleted before the delayed branch scheduling
1869: phase exits.
1870:
1871: @findex parallel
1872: @item (parallel [@var{x0} @var{x1} @dots{}])
1873: Represents several side effects performed in parallel. The square
1874: brackets stand for a vector; the operand of @code{parallel} is a
1875: vector of expressions. @var{x0}, @var{x1} and so on are individual
1876: side effect expressions---expressions of code @code{set}, @code{call},
1877: @code{return}, @code{clobber} or @code{use}.@refill
1878:
1879: ``In parallel'' means that first all the values used in the individual
1880: side-effects are computed, and second all the actual side-effects are
1881: performed. For example,
1882:
1883: @example
1884: (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
1885: (set (mem:SI (reg:SI 1)) (reg:SI 1))])
1886: @end example
1887:
1888: @noindent
1889: says unambiguously that the values of hard register 1 and the memory
1890: location addressed by it are interchanged. In both places where
1891: @code{(reg:SI 1)} appears as a memory address it refers to the value
1892: in register 1 @emph{before} the execution of the insn.
1893:
1894: It follows that it is @emph{incorrect} to use @code{parallel} and
1895: expect the result of one @code{set} to be available for the next one.
1896: For example, people sometimes attempt to represent a jump-if-zero
1897: instruction this way:
1898:
1899: @example
1900: (parallel [(set (cc0) (reg:SI 34))
1901: (set (pc) (if_then_else
1902: (eq (cc0) (const_int 0))
1903: (label_ref @dots{})
1904: (pc)))])
1905: @end example
1906:
1907: @noindent
1908: But this is incorrect, because it says that the jump condition depends
1909: on the condition code value @emph{before} this instruction, not on the
1910: new value that is set by this instruction.
1911:
1912: @cindex peephole optimization, RTL representation
1913: Peephole optimization, which takes place together with final assembly
1914: code output, can produce insns whose patterns consist of a @code{parallel}
1915: whose elements are the operands needed to output the resulting
1916: assembler code---often @code{reg}, @code{mem} or constant expressions.
1917: This would not be well-formed RTL at any other stage in compilation,
1918: but it is ok then because no further optimization remains to be done.
1919: However, the definition of the macro @code{NOTICE_UPDATE_CC}, if
1920: any, must deal with such insns if you define any peephole optimizations.
1921:
1922: @findex sequence
1923: @item (sequence [@var{insns} @dots{}])
1924: Represents a sequence of insns. Each of the @var{insns} that appears
1925: in the vector is suitable for appearing in the chain of insns, so it
1926: must be an @code{insn}, @code{jump_insn}, @code{call_insn},
1927: @code{code_label}, @code{barrier} or @code{note}.
1928:
1929: A @code{sequence} RTX is never placed in an actual insn during RTL
1930: generation. It represents the sequence of insns that result from a
1931: @code{define_expand} @emph{before} those insns are passed to
1932: @code{emit_insn} to insert them in the chain of insns. When actually
1933: inserted, the individual sub-insns are separated out and the
1934: @code{sequence} is forgotten.
1935:
1936: After delay-slot scheduling is completed, an insn and all the insns that
1937: reside in its delay slots are grouped together into a @code{sequence}.
1938: The insn requiring the delay slot is the first insn in the vector;
1939: subsequent insns are to be placed in the delay slot.
1940:
1941: @code{INSN_ANNULLED_BRANCH_P} is set on an insn in a delay slot to
1942: indicate that a branch insn should be used that will conditionally annul
1943: the effect of the insns in the delay slots. In such a case,
1944: @code{INSN_FROM_TARGET_P} indicates that the insn is from the target of
1945: the branch and should be executed only if the branch is taken; otherwise
1946: the insn should be executed only if the branch is not taken.
1947: @xref{Delay Slots}.
1948: @end table
1949:
1950: These expression codes appear in place of a side effect, as the body of
1951: an insn, though strictly speaking they do not always describe side
1952: effects as such:
1953:
1954: @table @code
1955: @findex asm_input
1956: @item (asm_input @var{s})
1957: Represents literal assembler code as described by the string @var{s}.
1958:
1959: @findex unspec
1960: @findex unspec_volatile
1961: @item (unspec [@var{operands} @dots{}] @var{index})
1.1.1.2 root 1962: @itemx (unspec_volatile [@var{operands} @dots{}] @var{index})
1.1 root 1963: Represents a machine-specific operation on @var{operands}. @var{index}
1.1.1.2 root 1964: selects between multiple machine-specific operations.
1.1 root 1965: @code{unspec_volatile} is used for volatile operations and operations
1966: that may trap; @code{unspec} is used for other operations.
1967:
1.1.1.2 root 1968: These codes may appear inside a @code{pattern} of an
1.1 root 1969: insn, inside a @code{parallel}, or inside an expression.
1970:
1971: @findex addr_vec
1972: @item (addr_vec:@var{m} [@var{lr0} @var{lr1} @dots{}])
1973: Represents a table of jump addresses. The vector elements @var{lr0},
1974: etc., are @code{label_ref} expressions. The mode @var{m} specifies
1975: how much space is given to each address; normally @var{m} would be
1976: @code{Pmode}.
1977:
1978: @findex addr_diff_vec
1979: @item (addr_diff_vec:@var{m} @var{base} [@var{lr0} @var{lr1} @dots{}])
1980: Represents a table of jump addresses expressed as offsets from
1981: @var{base}. The vector elements @var{lr0}, etc., are @code{label_ref}
1982: expressions and so is @var{base}. The mode @var{m} specifies how much
1983: space is given to each address-difference.@refill
1984: @end table
1985:
1986: @node Incdec, Assembler, Side Effects, RTL
1987: @section Embedded Side-Effects on Addresses
1988: @cindex RTL preincrement
1989: @cindex RTL postincrement
1990: @cindex RTL predecrement
1991: @cindex RTL postdecrement
1992:
1993: Four special side-effect expression codes appear as memory addresses.
1994:
1995: @table @code
1996: @findex pre_dec
1997: @item (pre_dec:@var{m} @var{x})
1998: Represents the side effect of decrementing @var{x} by a standard
1999: amount and represents also the value that @var{x} has after being
2000: decremented. @var{x} must be a @code{reg} or @code{mem}, but most
2001: machines allow only a @code{reg}. @var{m} must be the machine mode
2002: for pointers on the machine in use. The amount @var{x} is decremented
2003: by is the length in bytes of the machine mode of the containing memory
2004: reference of which this expression serves as the address. Here is an
2005: example of its use:@refill
2006:
2007: @example
2008: (mem:DF (pre_dec:SI (reg:SI 39)))
2009: @end example
2010:
2011: @noindent
2012: This says to decrement pseudo register 39 by the length of a @code{DFmode}
2013: value and use the result to address a @code{DFmode} value.
2014:
2015: @findex pre_inc
2016: @item (pre_inc:@var{m} @var{x})
2017: Similar, but specifies incrementing @var{x} instead of decrementing it.
2018:
2019: @findex post_dec
2020: @item (post_dec:@var{m} @var{x})
2021: Represents the same side effect as @code{pre_dec} but a different
2022: value. The value represented here is the value @var{x} has @i{before}
2023: being decremented.
2024:
2025: @findex post_inc
2026: @item (post_inc:@var{m} @var{x})
2027: Similar, but specifies incrementing @var{x} instead of decrementing it.
2028: @end table
2029:
2030: These embedded side effect expressions must be used with care. Instruction
2031: patterns may not use them. Until the @samp{flow} pass of the compiler,
2032: they may occur only to represent pushes onto the stack. The @samp{flow}
2033: pass finds cases where registers are incremented or decremented in one
2034: instruction and used as an address shortly before or after; these cases are
2035: then transformed to use pre- or post-increment or -decrement.
2036:
2037: If a register used as the operand of these expressions is used in
2038: another address in an insn, the original value of the register is used.
2039: Uses of the register outside of an address are not permitted within the
2040: same insn as a use in an embedded side effect expression because such
2041: insns behave differently on different machines and hence must be treated
2042: as ambiguous and disallowed.
2043:
2044: An instruction that can be represented with an embedded side effect
2045: could also be represented using @code{parallel} containing an additional
2046: @code{set} to describe how the address register is altered. This is not
2047: done because machines that allow these operations at all typically
2048: allow them wherever a memory address is called for. Describing them as
2049: additional parallel stores would require doubling the number of entries
2050: in the machine description.
2051:
1.1.1.5 ! root 2052: @node Assembler, Insns, Incdec, RTL
1.1 root 2053: @section Assembler Instructions as Expressions
2054: @cindex assembler instructions in RTL
2055:
2056: @cindex @code{asm_operands}, usage
2057: The RTX code @code{asm_operands} represents a value produced by a
2058: user-specified assembler instruction. It is used to represent
2059: an @code{asm} statement with arguments. An @code{asm} statement with
2060: a single output operand, like this:
2061:
1.1.1.5 ! root 2062: @smallexample
1.1 root 2063: asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
1.1.1.5 ! root 2064: @end smallexample
1.1 root 2065:
2066: @noindent
2067: is represented using a single @code{asm_operands} RTX which represents
2068: the value that is stored in @code{outputvar}:
2069:
1.1.1.5 ! root 2070: @smallexample
1.1 root 2071: (set @var{rtx-for-outputvar}
2072: (asm_operands "foo %1,%2,%0" "a" 0
2073: [@var{rtx-for-addition-result} @var{rtx-for-*z}]
2074: [(asm_input:@var{m1} "g")
2075: (asm_input:@var{m2} "di")]))
1.1.1.5 ! root 2076: @end smallexample
1.1 root 2077:
2078: @noindent
2079: Here the operands of the @code{asm_operands} RTX are the assembler
2080: template string, the output-operand's constraint, the index-number of the
2081: output operand among the output operands specified, a vector of input
2082: operand RTX's, and a vector of input-operand modes and constraints. The
2083: mode @var{m1} is the mode of the sum @code{x+y}; @var{m2} is that of
2084: @code{*z}.
2085:
2086: When an @code{asm} statement has multiple output values, its insn has
2087: several such @code{set} RTX's inside of a @code{parallel}. Each @code{set}
2088: contains a @code{asm_operands}; all of these share the same assembler
2089: template and vectors, but each contains the constraint for the respective
2090: output operand. They are also distinguished by the output-operand index
2091: number, which is 0, 1, @dots{} for successive output operands.
2092:
2093: @node Insns, Calls, Assembler, RTL
2094: @section Insns
2095: @cindex insns
2096:
2097: The RTL representation of the code for a function is a doubly-linked
2098: chain of objects called @dfn{insns}. Insns are expressions with
2099: special codes that are used for no other purpose. Some insns are
2100: actual instructions; others represent dispatch tables for @code{switch}
2101: statements; others represent labels to jump to or various sorts of
2102: declarative information.
2103:
2104: In addition to its own specific data, each insn must have a unique
2105: id-number that distinguishes it from all other insns in the current
2106: function (after delayed branch scheduling, copies of an insn with the
2107: same id-number may be present in multiple places in a function, but
2108: these copies will always be identical and will only appear inside a
2109: @code{sequence}), and chain pointers to the preceding and following
2110: insns. These three fields occupy the same position in every insn,
2111: independent of the expression code of the insn. They could be accessed
2112: with @code{XEXP} and @code{XINT}, but instead three special macros are
2113: always used:
2114:
2115: @table @code
2116: @findex INSN_UID
2117: @item INSN_UID (@var{i})
2118: Accesses the unique id of insn @var{i}.
2119:
2120: @findex PREV_INSN
2121: @item PREV_INSN (@var{i})
2122: Accesses the chain pointer to the insn preceding @var{i}.
2123: If @var{i} is the first insn, this is a null pointer.
2124:
2125: @findex NEXT_INSN
2126: @item NEXT_INSN (@var{i})
2127: Accesses the chain pointer to the insn following @var{i}.
2128: If @var{i} is the last insn, this is a null pointer.
2129: @end table
2130:
2131: @findex get_insns
2132: @findex get_last_insn
2133: The first insn in the chain is obtained by calling @code{get_insns}; the
2134: last insn is the result of calling @code{get_last_insn}. Within the
2135: chain delimited by these insns, the @code{NEXT_INSN} and
2136: @code{PREV_INSN} pointers must always correspond: if @var{insn} is not
2137: the first insn,
2138:
2139: @example
2140: NEXT_INSN (PREV_INSN (@var{insn})) == @var{insn}
2141: @end example
2142:
2143: @noindent
2144: is always true and if @var{insn} is not the last insn,
2145:
2146: @example
2147: PREV_INSN (NEXT_INSN (@var{insn})) == @var{insn}
2148: @end example
2149:
2150: @noindent
2151: is always true.
2152:
2153: After delay slot scheduling, some of the insns in the chain might be
2154: @code{sequence} expressions, which contain a vector of insns. The value
2155: of @code{NEXT_INSN} in all but the last of these insns is the next insn
2156: in the vector; the value of @code{NEXT_INSN} of the last insn in the vector
2157: is the same as the value of @code{NEXT_INSN} for the @code{sequence} in
2158: which it is contained. Similar rules apply for @code{PREV_INSN}.
2159:
2160: This means that the above invariants are not necessarily true for insns
2161: inside @code{sequence} expressions. Specifically, if @var{insn} is the
2162: first insn in a @code{sequence}, @code{NEXT_INSN (PREV_INSN (@var{insn}))}
2163: is the insn containing the @code{sequence} expression, as is the value
2164: of @code{PREV_INSN (NEXT_INSN (@var{insn}))} is @var{insn} is the last
2165: insn in the @code{sequence} expression. You can use these expressions
2166: to find the containing @code{sequence} expression.@refill
2167:
2168: Every insn has one of the following six expression codes:
2169:
2170: @table @code
2171: @findex insn
2172: @item insn
2173: The expression code @code{insn} is used for instructions that do not jump
2174: and do not do function calls. @code{sequence} expressions are always
2175: contained in insns with code @code{insn} even if one of those insns
2176: should jump or do function calls.
2177:
2178: Insns with code @code{insn} have four additional fields beyond the three
2179: mandatory ones listed above. These four are described in a table below.
2180:
2181: @findex jump_insn
2182: @item jump_insn
2183: The expression code @code{jump_insn} is used for instructions that may
2184: jump (or, more generally, may contain @code{label_ref} expressions). If
2185: there is an instruction to return from the current function, it is
2186: recorded as a @code{jump_insn}.
2187:
2188: @findex JUMP_LABEL
2189: @code{jump_insn} insns have the same extra fields as @code{insn} insns,
2190: accessed in the same way and in addition contains a field
2191: @code{JUMP_LABEL} which is defined once jump optimization has completed.
2192:
2193: For simple conditional and unconditional jumps, this field contains the
2194: @code{code_label} to which this insn will (possibly conditionally)
2195: branch. In a more complex jump, @code{JUMP_LABEL} records one of the
2196: labels that the insn refers to; the only way to find the others
2197: is to scan the entire body of the insn.
2198:
2199: Return insns count as jumps, but since they do not refer to any labels,
2200: they have zero in the @code{JUMP_LABEL} field.
2201:
2202: @findex call_insn
2203: @item call_insn
2204: The expression code @code{call_insn} is used for instructions that may do
2205: function calls. It is important to distinguish these instructions because
2206: they imply that certain registers and memory locations may be altered
2207: unpredictably.
2208:
1.1.1.2 root 2209: A @code{call_insn} insn may be preceded by insns that contain a single
1.1 root 2210: @code{use} expression and be followed by insns the contain a single
2211: @code{clobber} expression. If so, these @code{use} and @code{clobber}
2212: expressions are treated as being part of the function call.
2213: There must not even be a @code{note} between the @code{call_insn} and
2214: the @code{use} or @code{clobber} insns for this special treatment to
2215: take place. This is somewhat of a kludge and will be removed in a later
2216: version of GNU CC.
2217:
2218: @code{call_insn} insns have the same extra fields as @code{insn} insns,
2219: accessed in the same way.
2220:
2221: @findex code_label
2222: @findex CODE_LABEL_NUMBER
2223: @item code_label
2224: A @code{code_label} insn represents a label that a jump insn can jump
2225: to. It contains two special fields of data in addition to the three
2226: standard ones. @code{CODE_LABEL_NUMBER} is used to hold the @dfn{label
2227: number}, a number that identifies this label uniquely among all the
2228: labels in the compilation (not just in the current function).
2229: Ultimately, the label is represented in the assembler output as an
2230: assembler label, usually of the form @samp{L@var{n}} where @var{n} is
2231: the label number.
2232:
2233: When a @code{code_label} appears in an RTL expression, it normally
2234: appears within a @code{label_ref} which represents the address of
2235: the label, as a number.
2236:
2237: @findex LABEL_NUSES
2238: The field @code{LABEL_NUSES} is only defined once the jump optimization
2239: phase is completed and contains the number of times this label is
2240: referenced in the current function.
2241:
2242: @findex barrier
2243: @item barrier
2244: Barriers are placed in the instruction stream when control cannot flow
2245: past them. They are placed after unconditional jump instructions to
2246: indicate that the jumps are unconditional and after calls to
2247: @code{volatile} functions, which do not return (e.g., @code{exit}).
2248: They contain no information beyond the three standard fields.
2249:
2250: @findex note
2251: @findex NOTE_LINE_NUMBER
2252: @findex NOTE_SOURCE_FILE
2253: @item note
2254: @code{note} insns are used to represent additional debugging and
2255: declarative information. They contain two nonstandard fields, an
2256: integer which is accessed with the macro @code{NOTE_LINE_NUMBER} and a
2257: string accessed with @code{NOTE_SOURCE_FILE}.
2258:
2259: If @code{NOTE_LINE_NUMBER} is positive, the note represents the
2260: position of a source line and @code{NOTE_SOURCE_FILE} is the source file name
2261: that the line came from. These notes control generation of line
2262: number data in the assembler output.
2263:
2264: Otherwise, @code{NOTE_LINE_NUMBER} is not really a line number but a
2265: code with one of the following values (and @code{NOTE_SOURCE_FILE}
2266: must contain a null pointer):
2267:
2268: @table @code
2269: @findex NOTE_INSN_DELETED
2270: @item NOTE_INSN_DELETED
2271: Such a note is completely ignorable. Some passes of the compiler
2272: delete insns by altering them into notes of this kind.
2273:
2274: @findex NOTE_INSN_BLOCK_BEG
2275: @findex NOTE_INSN_BLOCK_END
2276: @item NOTE_INSN_BLOCK_BEG
2277: @itemx NOTE_INSN_BLOCK_END
2278: These types of notes indicate the position of the beginning and end
2279: of a level of scoping of variable names. They control the output
2280: of debugging information.
2281:
2282: @findex NOTE_INSN_LOOP_BEG
2283: @findex NOTE_INSN_LOOP_END
2284: @item NOTE_INSN_LOOP_BEG
2285: @itemx NOTE_INSN_LOOP_END
2286: These types of notes indicate the position of the beginning and end
2287: of a @code{while} or @code{for} loop. They enable the loop optimizer
2288: to find loops quickly.
2289:
2290: @findex NOTE_INSN_LOOP_CONT
2291: @item NOTE_INSN_LOOP_CONT
2292: Appears at the place in a loop that @code{continue} statements jump to.
2293:
2294: @findex NOTE_INSN_LOOP_VTOP
2295: @item NOTE_INSN_LOOP_VTOP
2296: This note indicates the place in a loop where the exit test begins for
2297: those loops in which the exit test has been duplicated. This position
2298: becomes another virtual start of the loop when considering loop
2299: invariants.
2300:
2301: @findex NOTE_INSN_FUNCTION_END
2302: @item NOTE_INSN_FUNCTION_END
2303: Appears near the end of the function body, just before the label that
2304: @code{return} statements jump to (on machine where a single instruction
2305: does not suffice for returning). This note may be deleted by jump
2306: optimization.
2307:
2308: @findex NOTE_INSN_SETJMP
2309: @item NOTE_INSN_SETJMP
2310: Appears following each call to @code{setjmp} or a related function.
2311: @end table
2312:
2313: These codes are printed symbolically when they appear in debugging dumps.
2314: @end table
2315:
2316: @cindex @code{HImode}, in @code{insn}
2317: @cindex @code{QImode}, in @code{insn}
2318: The machine mode of an insn is normally @code{VOIDmode}, but some
2319: phases use the mode for various purposes; for example, the reload pass
2320: sets it to @code{HImode} if the insn needs reloading but not register
2321: elimination and @code{QImode} if both are required. The common
2322: subexpression elimination pass sets the mode of an insn to @code{QImode}
2323: when it is the first insn in a block that has already been processed.
2324:
2325: Here is a table of the extra fields of @code{insn}, @code{jump_insn}
2326: and @code{call_insn} insns:
2327:
2328: @table @code
2329: @findex PATTERN
2330: @item PATTERN (@var{i})
2331: An expression for the side effect performed by this insn. This must be
2332: one of the following codes: @code{set}, @code{call}, @code{use},
2333: @code{clobber}, @code{return}, @code{asm_input}, @code{asm_output},
2334: @code{addr_vec}, @code{addr_diff_vec}, @code{trap_if}, @code{unspec},
1.1.1.4 root 2335: @code{unspec_volatile}, @code{parallel}, or @code{sequence}. If it is a @code{parallel},
1.1 root 2336: each element of the @code{parallel} must be one these codes, except that
2337: @code{parallel} expressions cannot be nested and @code{addr_vec} and
2338: @code{addr_diff_vec} are not permitted inside a @code{parallel} expression.
2339:
2340: @findex INSN_CODE
2341: @item INSN_CODE (@var{i})
2342: An integer that says which pattern in the machine description matches
2343: this insn, or -1 if the matching has not yet been attempted.
2344:
2345: Such matching is never attempted and this field remains -1 on an insn
2346: whose pattern consists of a single @code{use}, @code{clobber},
2347: @code{asm_input}, @code{addr_vec} or @code{addr_diff_vec} expression.
2348:
2349: @findex asm_noperands
2350: Matching is also never attempted on insns that result from an @code{asm}
2351: statement. These contain at least one @code{asm_operands} expression.
2352: The function @code{asm_noperands} returns a non-negative value for
2353: such insns.
2354:
2355: In the debugging output, this field is printed as a number followed by
2356: a symbolic representation that locates the pattern in the @file{md}
2357: file as some small positive or negative offset from a named pattern.
2358:
2359: @findex LOG_LINKS
2360: @item LOG_LINKS (@var{i})
2361: A list (chain of @code{insn_list} expressions) giving information about
2362: dependencies between instructions within a basic block. Neither a jump
2363: nor a label may come between the related insns.
2364:
2365: @findex REG_NOTES
2366: @item REG_NOTES (@var{i})
2367: A list (chain of @code{expr_list} and @code{insn_list} expressions)
2368: giving miscellaneous information about the insn. It is often information
2369: pertaining to the registers used in this insn.
2370: @end table
2371:
2372: The @code{LOG_LINKS} field of an insn is a chain of @code{insn_list}
2373: expressions. Each of these has two operands: the first is an insn,
2374: and the second is another @code{insn_list} expression (the next one in
2375: the chain). The last @code{insn_list} in the chain has a null pointer
2376: as second operand. The significant thing about the chain is which
2377: insns appear in it (as first operands of @code{insn_list}
2378: expressions). Their order is not significant.
2379:
2380: This list is originally set up by the flow analysis pass; it is a null
2381: pointer until then. Flow only adds links for those data dependencies
2382: which can be used for instruction combination. For each insn, the flow
2383: analysis pass adds a link to insns which store into registers values
2384: that are used for the first time in this insn. The instruction
2385: scheduling pass adds extra links so that every dependence will be
2386: represented. Links represent data dependencies, antidependencies and
2387: output dependencies; the machine mode of the link distinguishes these
2388: three types: antidependencies have mode @code{REG_DEP_ANTI}, output
2389: dependencies have mode @code{REG_DEP_OUTPUT}, and data dependencies have
2390: mode @code{VOIDmode}.
2391:
2392: The @code{REG_NOTES} field of an insn is a chain similar to the
2393: @code{LOG_LINKS} field but it includes @code{expr_list} expressions in
2394: addition to @code{insn_list} expressions. There are several kinds
2395: of register notes, which are distinguished by the machine mode, which
2396: in a register note is really understood as being an @code{enum reg_note}.
2397: The first operand @var{op} of the note is data whose meaning depends on
2398: the kind of note.
2399:
2400: @findex REG_NOTE_KIND
2401: @findex PUT_REG_NOTE_KIND
1.1.1.4 root 2402: The macro @code{REG_NOTE_KIND (@var{x})} returns the kind of
1.1 root 2403: register note. Its counterpart, the macro @code{PUT_REG_NOTE_KIND
2404: (@var{x}, @var{newkind})} sets the register note type of @var{x} to be
2405: @var{newkind}.
2406:
2407: Register notes are of three classes: They may say something about an
2408: input to an insn, they may say something about an output of an insn, or
2409: they may create a linkage between two insns. There are also a set
2410: of values that are only used in @code{LOG_LINKS}.
2411:
2412: These register notes annotate inputs to an insn:
2413:
2414: @table @code
2415: @findex REG_DEAD
2416: @item REG_DEAD
2417: The value in @var{op} dies in this insn; that is to say, altering the
2418: value immediately after this insn would not affect the future behavior
2419: of the program.
2420:
2421: This does not necessarily mean that the register @var{op} has no useful
2422: value after this insn since it may also be an output of the insn. In
2423: such a case, however, a @code{REG_DEAD} note would be redundant and is
2424: usually not present until after the reload pass, but no code relies on
2425: this fact.
2426:
2427: @findex REG_INC
2428: @item REG_INC
2429: The register @var{op} is incremented (or decremented; at this level
2430: there is no distinction) by an embedded side effect inside this insn.
2431: This means it appears in a @code{post_inc}, @code{pre_inc},
2432: @code{post_dec} or @code{pre_dec} expression.
2433:
2434: @findex REG_NONNEG
2435: @item REG_NONNEG
2436: The register @var{op} is known to have a nonnegative value when this
2437: insn is reached. This is used so that decrement and branch until zero
2438: instructions, such as the m68k dbra, can be matched.
2439:
2440: The @code{REG_NONNEG} note is added to insns only if the machine
1.1.1.5 ! root 2441: description has a @samp{decrement_and_branch_until_zero} pattern.
1.1 root 2442:
2443: @findex REG_NO_CONFLICT
2444: @item REG_NO_CONFLICT
2445: This insn does not cause a conflict between @var{op} and the item
2446: being set by this insn even though it might appear that it does.
2447: In other words, if the destination register and @var{op} could
2448: otherwise be assigned the same register, this insn does not
2449: prevent that assignment.
2450:
2451: Insns with this note are usually part of a block that begins with a
2452: @code{clobber} insn specifying a multi-word pseudo register (which will
2453: be the output of the block), a group of insns that each set one word of
2454: the value and have the @code{REG_NO_CONFLICT} note attached, and a final
2455: insn that copies the output to itself with an attached @code{REG_EQUAL}
2456: note giving the expression being computed. This block is encapsulated
2457: with @code{REG_LIBCALL} and @code{REG_RETVAL} notes on the first and
2458: last insns, respectively.
2459:
2460: @findex REG_LABEL
2461: @item REG_LABEL
2462: This insn uses @var{op}, a @code{code_label}, but is not a
2463: @code{jump_insn}. The presence of this note allows jump optimization to
2464: be aware that @var{op} is, in fact, being used.
2465: @end table
2466:
2467: The following notes describe attributes of outputs of an insn:
2468:
2469: @table @code
2470: @findex REG_EQUIV
2471: @findex REG_EQUAL
2472: @item REG_EQUIV
2473: @itemx REG_EQUAL
2474: This note is only valid on an insn that sets only one register and
2475: indicates that that register will be equal to @var{op} at run time; the
2476: scope of this equivalence differs between the two types of notes. The
2477: value which the insn explicitly copies into the register may look
2478: different from @var{op}, but they will be equal at run time. If the
2479: output of the single @code{set} is a @code{strict_low_part} expression,
2480: the note refers to the register that is contained in @code{SUBREG_REG}
2481: of the @code{subreg} expression.
2482:
2483: For @code{REG_EQUIV}, the register is equivalent to @var{op} throughout
2484: the entire function, and could validly be replaced in all its
2485: occurrences by @var{op}. (``Validly'' here refers to the data flow of
2486: the program; simple replacement may make some insns invalid.) For
2487: example, when a constant is loaded into a register that is never
2488: assigned any other value, this kind of note is used.
2489:
2490: When a parameter is copied into a pseudo-register at entry to a function,
2491: a note of this kind records that the register is equivalent to the stack
2492: slot where the parameter was passed. Although in this case the register
2493: may be set by other insns, it is still valid to replace the register
2494: by the stack slot throughout the function.
2495:
2496: In the case of @code{REG_EQUAL}, the register that is set by this insn
2497: will be equal to @var{op} at run time at the end of this insn but not
2498: necessarily elsewhere in the function. In this case, @var{op}
2499: is typically an arithmetic expression. For example, when a sequence of
2500: insns such as a library call is used to perform an arithmetic operation,
2501: this kind of note is attached to the insn that produces or copies the
2502: final value.
2503:
2504: These two notes are used in different ways by the compiler passes.
2505: @code{REG_EQUAL} is used by passes prior to register allocation (such as
2506: common subexpression elimination and loop optimization) to tell them how
2507: to think of that value. @code{REG_EQUIV} notes are used by register
2508: allocation to indicate that there is an available substitute expression
2509: (either a constant or a @code{mem} expression for the location of a
2510: parameter on the stack) that may be used in place of a register if
2511: insufficient registers are available.
2512:
2513: Except for stack homes for parameters, which are indicated by a
2514: @code{REG_EQUIV} note and are not useful to the early optimization
2515: passes and pseudo registers that are equivalent to a memory location
2516: throughout there entire life, which is not detected until later in
2517: the compilation, all equivalences are initially indicated by an attached
2518: @code{REG_EQUAL} note. In the early stages of register allocation, a
2519: @code{REG_EQUAL} note is changed into a @code{REG_EQUIV} note if
2520: @var{op} is a constant and the insn represents the only set of its
2521: destination register.
2522:
2523: Thus, compiler passes prior to register allocation need only check for
2524: @code{REG_EQUAL} notes and passes subsequent to register allocation
2525: need only check for @code{REG_EQUIV} notes.
2526:
2527: @findex REG_UNUSED
2528: @item REG_UNUSED
2529: The register @var{op} being set by this insn will not be used in a
2530: subsequent insn. This differs from a @code{REG_DEAD} note, which
2531: indicates that the value in an input will not be used subsequently.
2532: These two notes are independent; both may be present for the same
2533: register.
2534:
2535: @findex REG_WAS_0
2536: @item REG_WAS_0
2537: The single output of this insn contained zero before this insn.
2538: @var{op} is the insn that set it to zero. You can rely on this note if
2539: it is present and @var{op} has not been deleted or turned into a @code{note};
2540: its absence implies nothing.
2541: @end table
2542:
2543: These notes describe linkages between insns. They occur in pairs: one
2544: insn has one of a pair of notes that points to a second insn, which has
2545: the inverse note pointing back to the first insn.
2546:
2547: @table @code
2548: @findex REG_RETVAL
2549: @item REG_RETVAL
2550: This insn copies the value of a multi-insn sequence (for example, a
2551: library call), and @var{op} is the first insn of the sequence (for a
2552: library call, the first insn that was generated to set up the arguments
2553: for the library call).
2554:
2555: Loop optimization uses this note to treat such a sequence as a single
2556: operation for code motion purposes and flow analysis uses this note to
2557: delete such sequences whose results are dead.
2558:
2559: A @code{REG_EQUAL} note will also usually be attached to this insn to
2560: provide the expression being computed by the sequence.
2561:
2562: @findex REG_LIBCALL
2563: @item REG_LIBCALL
2564: This is the inverse of @code{REG_RETVAL}: it is placed on the first
2565: insn of a multi-insn sequence, and it points to the last one.
2566:
2567: @findex REG_CC_SETTER
2568: @findex REG_CC_USER
2569: @item REG_CC_SETTER
2570: @itemx REG_CC_USER
2571: On machines that use @code{cc0}, the insns which set and use @code{cc0}
2572: set and use @code{cc0} are adjacent. However, when branch delay slot
2573: filling is done, this may no longer be true. In this case a
2574: @code{REG_CC_USER} note will be placed on the insn setting @code{cc0} to
2575: point to the insn using @code{cc0} and a @code{REG_CC_SETTER} note will
2576: be placed on the insn using @code{cc0} to point to the insn setting
2577: @code{cc0}.@refill
2578: @end table
2579:
2580: These values are only used in the @code{LOG_LINKS} field, and indicate
2581: the type of dependency that each link represents. Links which indicate
2582: a data dependence (a read after write dependence) do not use any code,
2583: they simply have mode @code{VOIDmode}, and are printed without any
2584: descriptive text.
2585:
2586: @table @code
2587: @findex REG_DEP_ANTI
2588: @item REG_DEP_ANTI
2589: This indicates an anti dependence (a write after read dependence).
2590:
2591: @findex REG_DEP_OUTPUT
2592: @item REG_DEP_OUTPUT
2593: This indicates an output dependence (a write after write dependence).
2594: @end table
2595:
2596: For convenience, the machine mode in an @code{insn_list} or
2597: @code{expr_list} is printed using these symbolic codes in debugging dumps.
2598:
2599: @findex insn_list
2600: @findex expr_list
2601: The only difference between the expression codes @code{insn_list} and
2602: @code{expr_list} is that the first operand of an @code{insn_list} is
2603: assumed to be an insn and is printed in debugging dumps as the insn's
2604: unique id; the first operand of an @code{expr_list} is printed in the
2605: ordinary way as an expression.
2606:
2607: @node Calls, Sharing, Insns, RTL
2608: @section RTL Representation of Function-Call Insns
2609: @cindex calling functions in RTL
2610: @cindex RTL function-call insns
2611: @cindex function-call insns
2612:
2613: Insns that call subroutines have the RTL expression code @code{call_insn}.
2614: These insns must satisfy special rules, and their bodies must use a special
2615: RTL expression code, @code{call}.
2616:
2617: @cindex @code{call} usage
2618: A @code{call} expression has two operands, as follows:
2619:
2620: @example
2621: (call (mem:@var{fm} @var{addr}) @var{nbytes})
2622: @end example
2623:
2624: @noindent
2625: Here @var{nbytes} is an operand that represents the number of bytes of
2626: argument data being passed to the subroutine, @var{fm} is a machine mode
2627: (which must equal as the definition of the @code{FUNCTION_MODE} macro in
2628: the machine description) and @var{addr} represents the address of the
2629: subroutine.
2630:
2631: For a subroutine that returns no value, the @code{call} expression as
2632: shown above is the entire body of the insn, except that the insn might
2633: also contain @code{use} or @code{clobber} expressions.
2634:
2635: @cindex @code{BLKmode}, and function return values
2636: For a subroutine that returns a value whose mode is not @code{BLKmode},
2637: the value is returned in a hard register. If this register's number is
2638: @var{r}, then the body of the call insn looks like this:
2639:
2640: @example
2641: (set (reg:@var{m} @var{r})
2642: (call (mem:@var{fm} @var{addr}) @var{nbytes}))
2643: @end example
2644:
2645: @noindent
2646: This RTL expression makes it clear (to the optimizer passes) that the
2647: appropriate register receives a useful value in this insn.
2648:
2649: When a subroutine returns a @code{BLKmode} value, it is handled by
2650: passing to the subroutine the address of a place to store the value.
2651: So the call insn itself does not ``return'' any value, and it has the
2652: same RTL form as a call that returns nothing.
2653:
2654: On some machines, the call instruction itself clobbers some register,
2655: for example to contain the return address. @code{call_insn} insns
2656: on these machines should have a body which is a @code{parallel}
2657: that contains both the @code{call} expression and @code{clobber}
2658: expressions that indicate which registers are destroyed. Similarly,
2659: if the call instruction requires some register other than the stack
2660: pointer that is not explicitly mentioned it its RTL, a @code{use}
2661: subexpression should mention that register.
2662:
2663: Functions that are called are assumed to modify all registers listed in
2664: the configuration macro @code{CALL_USED_REGISTERS} (@pxref{Register
2665: Basics}) and, with the exception of @code{const} functions and library
2666: calls, to modify all of memory.
2667:
2668: Insns containing just @code{use} expressions directly precede the
2669: @code{call_insn} insn to indicate which registers contain inputs to the
2670: function. Similarly, if registers other than those in
2671: @code{CALL_USED_REGISTERS} are clobbered by the called function, insns
2672: containing a single @code{clobber} follow immediately after the call to
2673: indicate which registers.
2674:
1.1.1.5 ! root 2675: @node Sharing
1.1 root 2676: @section Structure Sharing Assumptions
2677: @cindex sharing of RTL components
2678: @cindex RTL structure sharing assumptions
2679:
2680: The compiler assumes that certain kinds of RTL expressions are unique;
2681: there do not exist two distinct objects representing the same value.
2682: In other cases, it makes an opposite assumption: that no RTL expression
2683: object of a certain kind appears in more than one place in the
2684: containing structure.
2685:
2686: These assumptions refer to a single function; except for the RTL
2687: objects that describe global variables and external functions,
2688: and a few standard objects such as small integer constants,
2689: no RTL objects are common to two functions.
2690:
2691: @itemize @bullet
2692: @cindex @code{reg}, RTL sharing
2693: @item
2694: Each pseudo-register has only a single @code{reg} object to represent it,
2695: and therefore only a single machine mode.
2696:
2697: @cindex symbolic label
2698: @cindex @code{symbol_ref}, RTL sharing
2699: @item
2700: For any symbolic label, there is only one @code{symbol_ref} object
2701: referring to it.
2702:
2703: @cindex @code{const_int}, RTL sharing
2704: @item
2705: There is only one @code{const_int} expression with value 0, only
2706: one with value 1, and only one with value @minus{}1.
2707: Some other integer values are also stored uniquely.
2708:
2709: @cindex @code{pc}, RTL sharing
2710: @item
2711: There is only one @code{pc} expression.
2712:
2713: @cindex @code{cc0}, RTL sharing
2714: @item
2715: There is only one @code{cc0} expression.
2716:
2717: @cindex @code{const_double}, RTL sharing
2718: @item
2719: There is only one @code{const_double} expression with value 0 for
2720: each floating point mode. Likewise for values 1 and 2.
2721:
2722: @cindex @code{label_ref}, RTL sharing
2723: @cindex @code{scratch}, RTL sharing
2724: @item
2725: No @code{label_ref} or @code{scratch} appears in more than one place in
2726: the RTL structure; in other words, it is safe to do a tree-walk of all
2727: the insns in the function and assume that each time a @code{label_ref}
2728: or @code{scratch} is seen it is distinct from all others that are seen.
2729:
2730: @cindex @code{mem}, RTL sharing
2731: @item
2732: Only one @code{mem} object is normally created for each static
2733: variable or stack slot, so these objects are frequently shared in all
2734: the places they appear. However, separate but equal objects for these
2735: variables are occasionally made.
2736:
2737: @cindex @code{asm_operands}, RTL sharing
2738: @item
2739: When a single @code{asm} statement has multiple output operands, a
2740: distinct @code{asm_operands} expression is made for each output operand.
2741: However, these all share the vector which contains the sequence of input
2742: operands. This sharing is used later on to test whether two
2743: @code{asm_operands} expressions come from the same statement, so all
2744: optimizations must carefully preserve the sharing if they copy the
2745: vector at all.
2746:
2747: @item
2748: No RTL object appears in more than one place in the RTL structure
2749: except as described above. Many passes of the compiler rely on this
2750: by assuming that they can modify RTL objects in place without unwanted
2751: side-effects on other insns.
2752:
2753: @findex unshare_all_rtl
2754: @item
2755: During initial RTL generation, shared structure is freely introduced.
2756: After all the RTL for a function has been generated, all shared
2757: structure is copied by @code{unshare_all_rtl} in @file{emit-rtl.c},
2758: after which the above rules are guaranteed to be followed.
2759:
2760: @findex copy_rtx_if_shared
2761: @item
2762: During the combiner pass, shared structure within an insn can exist
2763: temporarily. However, the shared structure is copied before the
2764: combiner is finished with the insn. This is done by calling
2765: @code{copy_rtx_if_shared}, which is a subroutine of
2766: @code{unshare_all_rtl}.
2767: @end itemize
1.1.1.5 ! root 2768:
! 2769: @node Reading RTL
! 2770: @section Reading RTL
! 2771:
! 2772: To read an RTL object from a file, call @code{read_rtx}. It takes one
! 2773: argument, a stdio stream, and returns a single RTL object.
! 2774:
! 2775: Reading RTL from a file is very slow. This is no currently not a
! 2776: problem because reading RTL occurs only as part of building the
! 2777: compiler.
! 2778:
! 2779: People frequently have the idea of using RTL stored as text in a file as
! 2780: an interface between a language front end and the bulk of GNU CC. This
! 2781: idea is not feasible.
! 2782:
! 2783: GNU CC was designed to use RTL internally only. Correct RTL for a given
! 2784: program is very dependent on the particular target machine. And the RTL
! 2785: does not contain all the information about the program.
! 2786:
! 2787: The proper way to interface GNU CC to a new language front end is with
! 2788: the ``tree'' data structure. There is no manual for this data
! 2789: structure, but it is described in the files @file{tree.h} and
! 2790: @file{tree.def}.
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