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1.1 root 1: /* Definitions of target machine for GNU compiler. Convex version.
2: Copyright (C) 1989 Free Software Foundation, Inc.
3:
4: This file is part of GNU CC.
5:
1.1.1.2 ! root 6: GNU CC is free software; you can redistribute it and/or modify
! 7: it under the terms of the GNU General Public License as published by
! 8: the Free Software Foundation; either version 1, or (at your option)
! 9: any later version.
! 10:
1.1 root 11: GNU CC is distributed in the hope that it will be useful,
1.1.1.2 ! root 12: but WITHOUT ANY WARRANTY; without even the implied warranty of
! 13: MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
! 14: GNU General Public License for more details.
! 15:
! 16: You should have received a copy of the GNU General Public License
! 17: along with GNU CC; see the file COPYING. If not, write to
! 18: the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
1.1 root 19:
20:
21: /* Names to predefine in the preprocessor for this target machine. */
22:
23: #define CPP_PREDEFINES "-Dconvex -Dunix"
24:
25: /* Print subsidiary information on the compiler version in use. */
26:
27: #define TARGET_VERSION fprintf (stderr, " (convex)");
28:
29: /* Run-time compilation parameters selecting different hardware subsets. */
30:
31: extern int target_flags;
32:
33: /* Macros used in the machine description to test the flags. */
34:
35: /*
36: -mc1 avoid C2-only instructions; default on C1 host
37: -mc2 use C2-only instructions; default on C2 host
38: -margcount use standard calling sequence, with arg count word
39: -mnoargcount don't push arg count (it's in the symbol table) (usually)
40: */
41:
42: #define TARGET_C1 (target_flags & 1)
43: #define TARGET_C2 (target_flags & 2)
44: #define TARGET_ARGCOUNT (target_flags & 4)
45:
46: /* Macro to define tables used to set the flags.
47: This is a list in braces of pairs in braces,
48: each pair being { "NAME", VALUE }
49: where VALUE is the bits to set or minus the bits to clear.
50: An empty string NAME is used to identify the default VALUE. */
51:
52: #define TARGET_SWITCHES \
53: { { "c1", 1 }, \
54: { "c2", 2 }, \
55: { "noc1", -1 }, \
56: { "noc2", -2 }, \
57: { "argcount", 4 }, \
58: { "noargcount", -4 }, \
59: { "", TARGET_DEFAULT }}
60:
61: /* Default target_flags if no switches specified. */
62:
1.1.1.2 ! root 63: #ifndef TARGET_DEFAULT
1.1 root 64: #define TARGET_DEFAULT 0
1.1.1.2 ! root 65: #endif
1.1 root 66:
67: /* Pick a target if none was specified */
68:
69: #define OVERRIDE_OPTIONS override_options ();
70:
71: /* Allow $ in identifiers */
72:
1.1.1.2 ! root 73: #define DOLLARS_IN_IDENTIFIERS 1
1.1 root 74:
75: /* Target machine storage layout */
76:
77: /* Define this if most significant bit is lowest numbered
78: in instructions that operate on numbered bit-fields. */
79: #define BITS_BIG_ENDIAN
80:
81: /* Define this if most significant byte of a word is the lowest numbered. */
82: #define BYTES_BIG_ENDIAN
83:
84: /* Define this if most significant word of a multiword number is numbered. */
1.1.1.2 ! root 85: /* Lie, so that gcc will take the low part of double reg N in reg N. */
1.1 root 86: /* #define WORDS_BIG_ENDIAN */
87:
88: /* Number of bits in an addressible storage unit */
89: #define BITS_PER_UNIT 8
90:
91: /* Width in bits of a "word", which is the contents of a machine register.
92: Note that this is not necessarily the width of data type `int';
93: if using 16-bit ints on a 68000, this would still be 32.
94: But on a machine with 16-bit registers, this would be 16. */
95: #define BITS_PER_WORD 32
96:
97: /* Width of a word, in units (bytes). */
98: #define UNITS_PER_WORD 4
99:
100: /* Width in bits of a pointer.
101: See also the macro `Pmode' defined below. */
102: #define POINTER_SIZE 32
103:
104: /* Allocation boundary (in *bits*) for storing pointers in memory. */
105: #define POINTER_BOUNDARY 32
106:
107: /* Allocation boundary (in *bits*) for storing arguments in argument list. */
108: #define PARM_BOUNDARY 32
109:
110: /* Boundary (in *bits*) on which stack pointer should be aligned. */
111: #define STACK_BOUNDARY 32
112:
113: /* Allocation boundary (in *bits*) for the code of a function. */
114: #define FUNCTION_BOUNDARY 16
115:
116: /* Alignment of field after `int : 0' in a structure. */
117: #define EMPTY_FIELD_BOUNDARY 32
118:
119: /* Every structure's size must be a multiple of this. */
120: #define STRUCTURE_SIZE_BOUNDARY 8
121:
122: /* No data type wants to be aligned rounder than this. */
123: /* beware of doubles in structs -- 64 is incompatible with pcc */
124: #define BIGGEST_ALIGNMENT 32
125:
126: /* Define this if move instructions will actually fail to work
127: when given unaligned data. */
128: /* #define STRICT_ALIGNMENT */
129:
130: /* Standard register usage. */
131:
132: /* Number of actual hardware registers.
133: The hardware registers are assigned numbers for the compiler
134: from 0 to just below FIRST_PSEUDO_REGISTER.
135: All registers that the compiler knows about must be given numbers,
136: even those that are not normally considered general registers. */
137: #define FIRST_PSEUDO_REGISTER 16
138:
139: /* 1 for registers that have pervasive standard uses
140: and are not available for the register allocator.
141: For Convex, these are AP, FP, and SP. */
142: #define FIXED_REGISTERS {0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 1}
143:
144: /* 1 for registers not available across function calls.
145: These must include the FIXED_REGISTERS and also any
146: registers that can be used without being saved.
147: The latter must include the registers where values are returned
148: and the register where structure-value addresses are passed.
149: Aside from that, you can include as many other registers as you like. */
150: #define CALL_USED_REGISTERS {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1}
151:
152: /* Return number of consecutive hard regs needed starting at reg REGNO
153: to hold something of mode MODE.
154: This is ordinarily the length in words of a value of mode MODE
155: but can be less for certain modes in special long registers.
156: On Convex, all values fit in one register. */
157: #define HARD_REGNO_NREGS(REGNO, MODE) 1
158:
159: /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
160: On Convex, S registers can hold any type, A registers can any nonfloat */
161: #define HARD_REGNO_MODE_OK(REGNO, MODE) \
162: ((REGNO) < 8 || ((MODE) != SFmode && (MODE) != DFmode && (MODE) != DImode))
163:
164: /* Value is 1 if it is a good idea to tie two pseudo registers
165: when one has mode MODE1 and one has mode MODE2.
166: If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
167: for any hard reg, then this must be 0 for correct output. */
168: #define MODES_TIEABLE_P(MODE1, MODE2) \
169: (((MODE1) == SFmode || (MODE1) == DFmode || (MODE1) == DImode) \
170: == ((MODE2) == SFmode || (MODE2) == DFmode || (MODE2) == DImode))
171:
172: /* Specify the registers used for certain standard purposes.
173: The values of these macros are register numbers. */
174:
175: /* Register to use for pushing function arguments. */
176: #define STACK_POINTER_REGNUM 8
177:
178: /* Base register for access to local variables of the function. */
179: #define FRAME_POINTER_REGNUM 15
180:
181: /* Value should be nonzero if functions must have frame pointers.
182: Zero means the frame pointer need not be set up (and parms
183: may be accessed via the stack pointer) in functions that seem suitable.
184: This is computed in `reload', in reload1.c. */
185: #define FRAME_POINTER_REQUIRED 1
186:
187: /* Base register for access to arguments of the function. */
188: #define ARG_POINTER_REGNUM 14
189:
190: /* Register in which static-chain is passed to a function. */
1.1.1.2 ! root 191: #define STATIC_CHAIN_REGNUM 0
1.1 root 192:
193: /* Register in which address to store a structure value
194: is passed to a function. */
195: #define STRUCT_VALUE_REGNUM 9
196:
197: /* Define the classes of registers for register constraints in the
198: machine description. Also define ranges of constants.
199:
200: One of the classes must always be named ALL_REGS and include all hard regs.
201: If there is more than one class, another class must be named NO_REGS
202: and contain no registers.
203:
204: The name GENERAL_REGS must be the name of a class (or an alias for
205: another name such as ALL_REGS). This is the class of registers
206: that is allowed by "g" or "r" in a register constraint.
207: Also, registers outside this class are allocated only when
208: instructions express preferences for them.
209:
210: The classes must be numbered in nondecreasing order; that is,
211: a larger-numbered class must never be contained completely
212: in a smaller-numbered class.
213:
214: For any two classes, it is very desirable that there be another
215: class that represents their union. */
216:
217: /* Convex has classes A (address) and S (scalar). Seems to work
218: better to put S first, here and in the md. */
219:
220: enum reg_class { NO_REGS, S_REGS, A_REGS, ALL_REGS, LIM_REG_CLASSES };
221:
222: #define N_REG_CLASSES (int) LIM_REG_CLASSES
223:
224: /* Since GENERAL_REGS is the same class as ALL_REGS,
225: don't give it a different class number; just make it an alias. */
226:
227: #define GENERAL_REGS ALL_REGS
228:
229: /* Give names of register classes as strings for dump file. */
230:
231: #define REG_CLASS_NAMES \
232: {"NO_REGS", "S_REGS", "A_REGS", "ALL_REGS" }
233:
234: /* Define which registers fit in which classes.
235: This is an initializer for a vector of HARD_REG_SET
236: of length N_REG_CLASSES. */
237:
238: #define REG_CLASS_CONTENTS {0, 0x00ff, 0xff00, 0xffff}
239:
240: /* The same information, inverted:
241: Return the class number of the smallest class containing
242: reg number REGNO. This could be a conditional expression
243: or could index an array. */
244:
245: #define S_REGNO_P(REGNO) ((REGNO) < 8)
246: #define A_REGNO_P(REGNO) ((REGNO) >= 8)
247:
248: #define REGNO_REG_CLASS(REGNO) \
249: (S_REGNO_P (REGNO) ? S_REGS : A_REGS)
250:
251: /* The class value for index registers, and the one for base regs. */
252:
253: #define INDEX_REG_CLASS A_REGS
254: #define BASE_REG_CLASS A_REGS
255:
256: /* Get reg_class from a letter such as appears in the machine description. */
257: /* S regs use the letter 'd' because 's' is taken. */
258:
259: #define REG_CLASS_FROM_LETTER(C) \
260: ((C) == 'a' ? A_REGS : (C) == 'd' ? S_REGS : NO_REGS)
261:
262: /* The letters I, J, K, L and M in a register constraint string
263: can be used to stand for particular ranges of immediate operands.
264: This macro defines what the ranges are.
265: C is the letter, and VALUE is a constant value.
266: Return 1 if VALUE is in the range specified by C. */
267:
268: /* Convex uses only I:
269: 32-bit value with sign bit off, usable as immediate in DImode logical
270: instructions and, or, xor */
271:
272: #define CONST_OK_FOR_LETTER_P(VALUE, C) ((VALUE) >= 0)
273:
274: /* Similar, but for floating constants, and defining letters G and H.
275: Here VALUE is the CONST_DOUBLE rtx itself. */
276: /* Convex uses only G:
277: value usable in ld.d (low word 0) or ld.l (high word all sign) */
278:
279: #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
280: (LD_D_P (VALUE) || LD_L_P (VALUE))
281:
1.1.1.2 ! root 282: #define LD_D_P(X) (const_double_low_int (X) == 0)
! 283:
! 284: #define LD_L_P(X) (const_double_low_int (X) >= 0 \
! 285: ? const_double_high_int (X) == 0 \
! 286: : const_double_high_int (X) == -1)
! 287:
! 288: extern int const_double_low_int ();
! 289: extern int const_double_high_int ();
! 290: extern int const_double_float_int ();
1.1 root 291:
292: /* Given an rtx X being reloaded into a reg required to be
293: in class CLASS, return the class of reg to actually use.
294: In general this is just CLASS; but on some machines
295: in some cases it is preferable to use a more restrictive class. */
296:
297: #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
298:
299: /* Return the maximum number of consecutive registers
300: needed to represent mode MODE in a register of class CLASS. */
301: #define CLASS_MAX_NREGS(CLASS, MODE) 1
302:
303: /* Stack layout; function entry, exit and calling. */
304:
305: /* Define this if pushing a word on the stack
306: makes the stack pointer a smaller address. */
307: #define STACK_GROWS_DOWNWARD
308:
309: /* Define this if the nominal address of the stack frame
310: is at the high-address end of the local variables;
311: that is, each additional local variable allocated
312: goes at a more negative offset in the frame. */
313: #define FRAME_GROWS_DOWNWARD
314:
1.1.1.2 ! root 315: /* Define this if should default to -fcaller-saves. */
! 316:
! 317: #define DEFAULT_CALLER_SAVES
! 318:
1.1 root 319: /* Offset within stack frame to start allocating local variables at.
320: If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
321: first local allocated. Otherwise, it is the offset to the BEGINNING
322: of the first local allocated. */
323: #define STARTING_FRAME_OFFSET 0
324:
325: /* If we generate an insn to push BYTES bytes,
326: this says how many the stack pointer really advances by. */
1.1.1.2 ! root 327: #define PUSH_ROUNDING(BYTES) (((BYTES) + 3) & ~3)
1.1 root 328:
329: /* Offset of first parameter from the argument pointer register value. */
330: #define FIRST_PARM_OFFSET(FNDECL) 0
331:
332: /* Value is 1 if returning from a function call automatically
333: pops the arguments described by the number-of-args field in the call.
334: FUNTYPE is the data type of the function (as a tree),
335: or for a library call it is an identifier node for the subroutine name. */
336: /* The standard Convex call, with arg count word, includes popping the
337: args as part of the call template. We optionally omit the arg count
338: word and let gcc combine the arg pops. */
339: #define RETURN_POPS_ARGS(FUNTYPE) TARGET_ARGCOUNT
340:
341: /* Define how to find the value returned by a function.
342: VALTYPE is the data type of the value (as a tree).
343: If the precise function being called is known, FUNC is its FUNCTION_DECL;
344: otherwise, FUNC is 0. */
345:
346: /* On Convex the return value is in S0 regardless. */
347:
348: #define FUNCTION_VALUE(VALTYPE, FUNC) \
349: gen_rtx (REG, TYPE_MODE (VALTYPE), 0)
350:
351: /* Define how to find the value returned by a library function
352: assuming the value has mode MODE. */
353:
354: /* On Convex the return value is in S0 regardless. */
355:
356: #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, 0)
357:
1.1.1.2 ! root 358: /* Define this if PCC uses the nonreentrant convention for returning
! 359: structure and union values. */
! 360:
! 361: #define PCC_STATIC_STRUCT_RETURN
! 362:
1.1 root 363: /* 1 if N is a possible register number for a function value.
364: On the Convex, S0 is the only register thus used. */
365:
366: #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
367:
368: /* 1 if N is a possible register number for function argument passing. */
369:
370: #define FUNCTION_ARG_REGNO_P(N) 0
371:
372: /* Define a data type for recording info about an argument list
373: during the scan of that argument list. This data type should
374: hold all necessary information about the function itself
375: and about the args processed so far, enough to enable macros
376: such as FUNCTION_ARG to determine where the next arg should go.
377:
378: On the vax, this is a single integer, which is a number of bytes
379: of arguments scanned so far. */
380:
381: #define CUMULATIVE_ARGS int
382:
383: /* Initialize a variable CUM of type CUMULATIVE_ARGS
384: for a call to a function whose data type is FNTYPE.
385: For a library call, FNTYPE is 0.
386:
387: On Convex, the offset starts at 0. */
388:
389: #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE) \
390: ((CUM) = 0)
391:
392: /* Update the data in CUM to advance over an argument
393: of mode MODE and data type TYPE.
394: (TYPE is null for libcalls where that information may not be available.) */
395:
396: #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
397: ((CUM) += ((MODE) != BLKmode \
398: ? (GET_MODE_SIZE (MODE) + 3) & ~3 \
399: : (int_size_in_bytes (TYPE) + 3) & ~3))
400:
401: /* Define where to put the arguments to a function.
402: Value is zero to push the argument on the stack,
403: or a hard register in which to store the argument.
404:
405: MODE is the argument's machine mode.
406: TYPE is the data type of the argument (as a tree).
407: This is null for libcalls where that information may
408: not be available.
409: CUM is a variable of type CUMULATIVE_ARGS which gives info about
410: the preceding args and about the function being called.
411: NAMED is nonzero if this argument is a named parameter
412: (otherwise it is an extra parameter matching an ellipsis). */
413:
414: /* On Convex, all args are pushed. */
415:
416: #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) 0
417:
418: /* This macro generates the assembly code for function entry.
419: FILE is a stdio stream to output the code to.
420: SIZE is an int: how many units of temporary storage to allocate.
421: Refer to the array `regs_ever_live' to determine which registers
422: to save; `regs_ever_live[I]' is nonzero if register number I
423: is ever used in the function. This macro is responsible for
424: knowing which registers should not be saved even if used. */
425:
426: #define FUNCTION_PROLOGUE(FILE, SIZE) \
1.1.1.2 ! root 427: { if ((SIZE) != 0) fprintf (FILE, "\tsub.w #%d,sp\n", ((SIZE) + 3) & -4);}
1.1 root 428:
429: /* Output assembler code to FILE to increment profiler label # LABELNO
430: for profiling a function entry. */
431:
432: #define FUNCTION_PROFILER(FILE, LABELNO) \
433: fprintf (FILE, "\tldea LP%d,a1\n\tcallq mcount\n", (LABELNO));
434:
435: /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
436: the stack pointer does not matter. The value is tested only in
437: functions that have frame pointers.
438: No definition is equivalent to always zero. */
439:
440: #define EXIT_IGNORE_STACK 1
441:
442: /* This macro generates the assembly code for function exit,
443: on machines that need it. If FUNCTION_EPILOGUE is not defined
444: then individual return instructions are generated for each
445: return statement. Args are same as for FUNCTION_PROLOGUE. */
446:
447: /* #define FUNCTION_EPILOGUE(FILE, SIZE) */
448:
449: /* If the memory address ADDR is relative to the frame pointer,
450: correct it to be relative to the stack pointer instead.
451: This is for when we don't use a frame pointer.
452: ADDR should be a variable name. */
453:
454: #define FIX_FRAME_POINTER_ADDRESS(ADDR,DEPTH) abort ();
455:
456: /* Addressing modes, and classification of registers for them. */
457:
458: /* #define HAVE_POST_INCREMENT */
459: /* #define HAVE_POST_DECREMENT */
460:
461: /* #define HAVE_PRE_DECREMENT */
462: /* #define HAVE_PRE_INCREMENT */
463:
464: /* Macros to check register numbers against specific register classes. */
465:
466: /* These assume that REGNO is a hard or pseudo reg number.
467: They give nonzero only if REGNO is a hard reg of the suitable class
468: or a pseudo reg currently allocated to a suitable hard reg.
469: Since they use reg_renumber, they are safe only once reg_renumber
470: has been allocated, which happens in local-alloc.c. */
471:
472: #define REGNO_OK_FOR_INDEX_P(regno) \
473: (((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0)
474: #define REGNO_OK_FOR_BASE_P(regno) \
475: (((regno) ^ 010) < 8 || ((reg_renumber[regno] ^ 010) & -8) == 0)
476:
477: /* Maximum number of registers that can appear in a valid memory address. */
478:
479: #define MAX_REGS_PER_ADDRESS 1
480:
481: /* 1 if X is an rtx for a constant that is a valid address. */
482:
483: #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
484:
485: /* Nonzero if the constant value X is a legitimate general operand.
486: It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
487:
488: /* For convex, any single-word constant is ok; the only contexts
489: allowing general_operand of mode DI or DF are movdi and movdf. */
490:
491: #define LEGITIMATE_CONSTANT_P(X) \
492: (GET_CODE (X) != CONST_DOUBLE ? 1 : (LD_D_P (X) || LD_L_P (X)))
493:
494: /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
495: and check its validity for a certain class.
496: We have two alternate definitions for each of them.
497: The usual definition accepts all pseudo regs; the other rejects
498: them unless they have been allocated suitable hard regs.
499: The symbol REG_OK_STRICT causes the latter definition to be used.
500:
501: Most source files want to accept pseudo regs in the hope that
502: they will get allocated to the class that the insn wants them to be in.
503: Source files for reload pass need to be strict.
504: After reload, it makes no difference, since pseudo regs have
505: been eliminated by then. */
506:
507: #ifndef REG_OK_STRICT
508:
509: /* Nonzero if X is a hard reg that can be used as an index
510: or if it is a pseudo reg. */
511: #define REG_OK_FOR_INDEX_P(X) (REGNO (X) >= 8)
512: /* Nonzero if X is a hard reg that can be used as a base reg
513: or if it is a pseudo reg. */
514: #define REG_OK_FOR_BASE_P(X) (REGNO (X) >= 8)
515:
516: #else
517:
518: /* Nonzero if X is a hard reg that can be used as an index. */
519: #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
520: /* Nonzero if X is a hard reg that can be used as a base reg. */
521: #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
522:
523: #endif
524:
525: /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
526: that is a valid memory address for an instruction.
527: The MODE argument is the machine mode for the MEM expression
528: that wants to use this address.
529:
530: For Convex, valid addresses are
531: indirectable or (MEM indirectable)
532: where indirectable is
533: const, reg, (PLUS reg const) */
534:
535: /* 1 if X is an address that we could indirect through. */
536: #define INDIRECTABLE_ADDRESS_P(X) \
537: (CONSTANT_ADDRESS_P (X) \
538: || (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X)) \
539: || (GET_CODE (X) == PLUS \
540: && GET_CODE (XEXP (X, 0)) == REG \
541: && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
542: && CONSTANT_ADDRESS_P (XEXP (X, 1))) \
543: || (GET_CODE (X) == PLUS \
544: && GET_CODE (XEXP (X, 1)) == REG \
545: && REG_OK_FOR_BASE_P (XEXP (X, 1)) \
546: && CONSTANT_ADDRESS_P (XEXP (X, 0))))
547:
548: /* Go to ADDR if X is a valid address. */
549: #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
550: { register rtx xfoob = (X); \
551: if (GET_CODE (xfoob) == REG) goto ADDR; \
552: if (INDIRECTABLE_ADDRESS_P (xfoob)) goto ADDR; \
553: xfoob = XEXP (X, 0); \
554: if (GET_CODE (X) == MEM && INDIRECTABLE_ADDRESS_P (xfoob)) \
555: goto ADDR; \
556: if (GET_CODE (X) == PRE_DEC && REG_P (xfoob) \
557: && REGNO (xfoob) == STACK_POINTER_REGNUM) \
558: goto ADDR; }
559:
560: /* Try machine-dependent ways of modifying an illegitimate address
561: to be legitimate. If we find one, return the new, valid address.
562: This macro is used in only one place: `memory_address' in explow.c.
563:
564: OLDX is the address as it was before break_out_memory_refs was called.
565: In some cases it is useful to look at this to decide what needs to be done.
566:
567: MODE and WIN are passed so that this macro can use
568: GO_IF_LEGITIMATE_ADDRESS.
569:
570: It is always safe for this macro to do nothing. It exists to recognize
571: opportunities to optimize the output.
572:
573: For Convex, nothing needs to be done. */
574:
575: #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) {}
576:
577: /* Go to LABEL if ADDR (a legitimate address expression)
578: has an effect that depends on the machine mode it is used for. */
579:
580: #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) {}
581:
582: /* Specify the machine mode that this machine uses
583: for the index in the tablejump instruction. */
584: #define CASE_VECTOR_MODE SImode
585:
586: /* Define this if the case instruction expects the table
587: to contain offsets from the address of the table.
588: Do not define this if the table should contain absolute addresses. */
589: /* #define CASE_VECTOR_PC_RELATIVE */
590:
591: /* Define this if the case instruction drops through after the table
592: when the index is out of range. Don't define it if the case insn
593: jumps to the default label instead. */
594: /* #define CASE_DROPS_THROUGH */
595:
596: /* Specify the tree operation to be used to convert reals to integers. */
597: #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
598:
599: /* This is the kind of divide that is easiest to do in the general case. */
600: #define EASY_DIV_EXPR TRUNC_DIV_EXPR
601:
602: /* Define this as 1 if `char' should by default be signed; else as 0. */
603: #define DEFAULT_SIGNED_CHAR 1
604:
605: /* This flag, if defined, says the same insns that convert to a signed fixnum
606: also convert validly to an unsigned one. */
607: #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
608:
609: /* Max number of bytes we can move from memory to memory
610: in one reasonably fast instruction. */
611: #define MOVE_MAX 8
612:
613: /* Define this if zero-extension is slow (more than one real instruction). */
614: /* #define SLOW_ZERO_EXTEND */
615:
616: /* Nonzero if access to memory by bytes is slow and undesirable. */
617: #define SLOW_BYTE_ACCESS 0
618:
619: /* Define if shifts truncate the shift count
620: which implies one can omit a sign-extension or zero-extension
621: of a shift count. */
622: #define SHIFT_COUNT_TRUNCATED
623:
624: /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
625: is done just by pretending it is already truncated. */
626: #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
627:
628: /* On Convex, it is as good to call a constant function address as to
629: call an address kept in a register. */
630: #define NO_FUNCTION_CSE
631:
632: /* When a prototype says `char' or `short', really pass an `int'. */
633: #define PROMOTE_PROTOTYPES
634:
635: /* Specify the machine mode that pointers have.
636: After generation of rtl, the compiler makes no further distinction
637: between pointers and any other objects of this machine mode. */
638: #define Pmode SImode
639:
640: /* A function address in a call instruction
641: is a byte address (for indexing purposes)
642: so give the MEM rtx a byte's mode. */
643: #define FUNCTION_MODE QImode
644:
645: /* Compute the cost of computing a constant rtl expression RTX
646: whose rtx-code is CODE. The body of this macro is a portion
647: of a switch statement. If the code is computed here,
648: return it with a return statement. Otherwise, break from the switch. */
649:
650: #define CONST_COSTS(RTX,CODE) \
651: case CONST: \
652: case LABEL_REF: \
653: case SYMBOL_REF: \
654: case CONST_INT: \
655: return 0; \
656: case CONST_DOUBLE: \
657: return 2;
658:
659: /* Check a `double' value for validity for a particular machine mode. */
660:
661: #define CHECK_FLOAT_VALUE(mode, d) \
662: if ((mode) == SFmode) \
663: { \
664: if ((d) > 1.7014117331926443e+38) \
665: { error ("magnitude of constant too large for `float'"); \
666: (d) = 1.7014117331926443e+38; } \
667: else if ((d) < -1.7014117331926443e+38) \
668: { error ("magnitude of constant too large for `float'"); \
669: (d) = -1.7014117331926443e+38; } \
670: else if (((d) > 0) && ((d) < 2.9387358770557188e-39)) \
671: { warning ("`float' constant truncated to zero"); \
672: (d) = 0.0; } \
673: else if (((d) < 0) && ((d) > -2.9387358770557188e-39)) \
674: { warning ("`float' constant truncated to zero"); \
675: (d) = 0.0; } \
676: }
677:
678: /* Tell final.c how to eliminate redundant test instructions. */
679:
680: /* Here we define machine-dependent flags and fields in cc_status
681: (see `conditions.h'). No extra ones are needed for convex. */
682:
683: /* Store in cc_status the expressions
684: that the condition codes will describe
685: after execution of an instruction whose pattern is EXP.
686: Do not alter them if the instruction would not alter the cc's. */
687:
688: #define NOTICE_UPDATE_CC(EXP,INSN) {CC_STATUS_INIT;}
689:
690: /* Control the assembler format that we output. */
691:
692: /* Output at beginning of assembler file. */
693:
694: #define ASM_FILE_START(FILE) fprintf (FILE, ";NO_APP\n")
695:
696: /* Output to assembler file text saying following lines
697: may contain character constants, extra white space, comments, etc. */
698:
699: #define ASM_APP_ON ";APP\n"
700:
701: /* Output to assembler file text saying following lines
702: no longer contain unusual constructs. */
703:
704: #define ASM_APP_OFF ";NO_APP\n"
705:
706: /* Alignment with Convex's assembler goes like this:
707: .text will allow .align 1 or .align 2
708: .data allows 1,2,4,8 (at least; but those are all we need).
709: there is no .lcomm, must use explicit decls in .bss instead.
710: .text and .data have subsections, each starts on an 8-byte boundary.
711: So, since alignment is worth having,
712: use ".text <n>" for 2**<n>-byte aligned text section --
713: this assumes that all lengths are multiples of their alignment.
714: use .align in .text if possible, and it's always possible in .data.
715: gcc arranges that everything in .bss is a multiple of 8, so it
716: stays aligned.
717: This is all handled in two routines in output-convex.c. */
718:
719: extern char *set_section ();
720: extern char *align_section ();
721:
722: /* Output before read-only data. */
723:
724: #define TEXT_SECTION_ASM_OP set_section (".text")
725:
726: /* Output before writable data. */
727:
728: #define DATA_SECTION_ASM_OP set_section (".data")
729:
730: /* How to refer to registers in assembler output.
731: This sequence is indexed by compiler's hard-register-number (see above). */
732:
733: #define REGISTER_NAMES \
734: {"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \
735: "sp", "a1", "a2", "a3", "a4", "a5", "ap", "fp"}
736:
737: /* This is BSD, so it wants DBX format. */
738:
739: #define DBX_DEBUGGING_INFO
740:
741: /* How to renumber registers for dbx and gdb. */
742:
743: #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
744:
745: /* Do not break .stabs pseudos into continuations. */
746:
747: #define DBX_CONTIN_LENGTH 0
748:
749: /* This is the char to use for continuation (in case we need to turn
750: continuation back on). */
751:
752: #define DBX_CONTIN_CHAR '?'
753:
754: /* Don't use the `xsfoo;' construct in DBX output; this system
755: doesn't support it. */
756:
757: #define DBX_NO_XREFS
758:
759: /* This is how to output the definition of a user-level label named NAME,
760: such as the label on a static function or variable NAME. */
761:
762: #define ASM_OUTPUT_LABEL(FILE,NAME) \
763: do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
764:
765: /* This is how to output a command to make the user-level label named NAME
766: defined for reference from other files. */
767:
768: #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
769: do { fputs (".globl ", FILE); assemble_name (FILE, NAME); fputs ("\n", FILE);} while (0)
770:
771: /* This is how to output a reference to a user-level label named NAME. */
772:
773: #define ASM_OUTPUT_LABELREF(FILE,NAME) \
774: fprintf (FILE, "_%s", NAME)
775:
776: /* This is how to output an internal numbered label where
777: PREFIX is the class of label and NUM is the number within the class. */
778:
779: #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
780: fprintf (FILE, "%s%d:\n", PREFIX, NUM)
781:
782: /* Put case tables in .text 2, where they will be word-aligned */
783:
784: #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLE) \
785: fprintf (FILE, ".text 2\n"); \
786: ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM)
787:
788: #define ASM_OUTPUT_CASE_END(FILE,NUM,TABLE) \
789: fprintf (FILE, ".text\n");
790:
791: /* This is how to store into the string LABEL
792: the symbol_ref name of an internal numbered label where
793: PREFIX is the class of label and NUM is the number within the class.
794: This is suitable for output with `assemble_name'. */
795:
796: #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
797: sprintf (LABEL, "*%s%d", PREFIX, NUM)
798:
1.1.1.2 ! root 799: /* This is how to output an assembler line defining a `double' constant. */
1.1 root 800:
801: #define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1.1.1.2 ! root 802: fprintf (FILE, "\tds.d %.17#g\n", (VALUE))
1.1 root 803:
804: /* This is how to output an assembler line defining a `float' constant. */
805:
806: #define ASM_OUTPUT_FLOAT(FILE,VALUE) \
807: fprintf (FILE, "\tds.s %.9#g\n", (VALUE))
808:
809: /* This is how to output an assembler line defining an `int' constant. */
810:
811: #define ASM_OUTPUT_INT(FILE,VALUE) \
812: ( fprintf (FILE, "\tds.w "), \
813: output_addr_const (FILE, (VALUE)), \
814: fprintf (FILE, "\n"))
815:
816: /* Likewise for `char' and `short' constants. */
817:
818: #define ASM_OUTPUT_SHORT(FILE,VALUE) \
819: ( fprintf (FILE, "\tds.h "), \
820: output_addr_const (FILE, (VALUE)), \
821: fprintf (FILE, "\n"))
822:
823: #define ASM_OUTPUT_CHAR(FILE,VALUE) \
824: ( fprintf (FILE, "\tds.b "), \
825: output_addr_const (FILE, (VALUE)), \
826: fprintf (FILE, "\n"))
827:
828: /* This is how to output an assembler line for a numeric constant byte. */
829:
830: #define ASM_OUTPUT_BYTE(FILE,VALUE) \
831: fprintf (FILE, "\tds.b %#x\n", (VALUE))
832:
833: /* This is how to output a string */
834:
835: #define ASM_OUTPUT_ASCII(FILE,STR,SIZE) do { \
836: int i; \
837: fprintf (FILE, "\tds.b \""); \
838: for (i = 0; i < (SIZE); i++) { \
839: register int c = (STR)[i] & 0377; \
840: if (c >= ' ' && c < 0177 && c != '\\' && c != '"') \
841: putc (c, FILE); \
842: else \
843: fprintf (FILE, "\\%03o", c);} \
844: fprintf (FILE, "\"\n");} while (0)
845:
846: /* This is how to output an insn to push a register on the stack.
847: It need not be very fast code. */
848:
849: #define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
850: fprintf (FILE, "\tpsh.%c %s\n", \
851: S_REGNO_P (REGNO) ? 'l' : 'w', \
852: reg_names[REGNO])
853:
854: /* This is how to output an insn to pop a register from the stack.
855: It need not be very fast code. */
856:
857: #define ASM_OUTPUT_REG_POP(FILE,REGNO) \
858: fprintf (FILE, "\tpop.%c %s\n", \
859: S_REGNO_P (REGNO) ? 'l' : 'w', \
860: reg_names[REGNO])
861:
862: /* This is how to output an element of a case-vector that is absolute. */
863:
864: #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
865: fprintf (FILE, "\tds.w L%d\n", VALUE)
866:
867: /* This is how to output an element of a case-vector that is relative.
868: (not used on Convex) */
869:
870: #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
871: fprintf (FILE, "\tds.w L%d-L%d\n", VALUE, REL)
872:
873: /* This is how to output an assembler line
874: that says to advance the location counter
875: to a multiple of 2**LOG bytes. */
876:
877: #define ASM_OUTPUT_ALIGN(FILE,LOG) \
878: fprintf (FILE, align_section (LOG));
879:
880: /* This is how to output an assembler line
881: that says to advance the location counter by SIZE bytes. */
882:
883: #define ASM_OUTPUT_SKIP(FILE,SIZE) \
884: fprintf (FILE, "\tds.b %d(0)\n", (SIZE))
885:
886: /* This says how to output an assembler line
887: to define a global common symbol. */
888:
889: #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
890: ( fputs (".comm ", (FILE)), \
891: assemble_name ((FILE), (NAME)), \
892: fprintf ((FILE), ",%d\n", (ROUNDED)))
893:
894: /* This says how to output an assembler line
895: to define a local common symbol. */
896:
897: #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
898: ( fprintf ((FILE), "%s\n", set_section (".bss")), \
899: assemble_name ((FILE), (NAME)), \
900: fprintf ((FILE), ":\tbs.b %d\n", (ROUNDED)), \
901: fprintf ((FILE), "%s\n", set_section (0)))
902:
903: /* Store in OUTPUT a string (made with alloca) containing
904: an assembler-name for a local static variable named NAME.
905: LABELNO is an integer which is different for each call. */
906:
907: #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
908: ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
909: sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
910:
911: /* Define the parentheses used to group arithmetic operations
912: in assembler code. */
913:
914: #define ASM_OPEN_PAREN "("
915: #define ASM_CLOSE_PAREN ")"
916:
917: /* Define results of standard character escape sequences. */
918: #define TARGET_BELL 007
919: #define TARGET_BS 010
920: #define TARGET_TAB 011
921: #define TARGET_NEWLINE 012
922: #define TARGET_VT 013
923: #define TARGET_FF 014
924: #define TARGET_CR 015
925:
926: /* Print an instruction operand X on file FILE.
927: CODE is the code from the %-spec that requested printing this operand;
928: if `%z3' was used to print operand 3, then CODE is 'z'. */
929:
930: #define PRINT_OPERAND(FILE, X, CODE) \
931: { if (GET_CODE (X) == REG) \
932: fprintf (FILE, "%s", reg_name [REGNO (X)]); \
933: else if (GET_CODE (X) == MEM) \
934: output_address (XEXP (X, 0)); \
935: else if (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != DImode) \
936: { union { double d; int i[2]; } u; \
937: u.i[0] = CONST_DOUBLE_LOW (X); u.i[1] = CONST_DOUBLE_HIGH (X); \
1.1.1.2 ! root 938: fprintf (FILE, "#%.9#g", u.d); } \
1.1 root 939: else { putc ('#', FILE); output_addr_const (FILE, X); }}
940:
941: /* Print a memory operand whose address is X, on file FILE. */
942:
943: #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
944: { \
945: register rtx addr = ADDR; \
946: register rtx index = 0; \
947: register rtx offset = 0; \
948: \
949: if (GET_CODE (addr) == MEM) \
950: { \
951: fprintf (FILE, "@"); \
952: addr = XEXP (addr, 0); \
953: } \
954: \
955: switch (GET_CODE (addr)) \
956: { \
957: case REG: \
958: index = addr; \
959: break; \
960: \
961: case PLUS: \
962: index = XEXP (addr, 0); \
963: if (REG_P (index)) \
964: offset = XEXP (addr, 1); \
965: else \
966: { \
967: offset = XEXP (addr, 0); \
968: index = XEXP (addr, 1); \
969: if (! REG_P (index)) abort (); \
970: } \
971: break; \
972: \
973: default: \
974: offset = addr; \
975: break; \
976: } \
977: \
978: if (offset) \
979: output_addr_const (FILE, offset); \
980: \
981: if (index) \
982: fprintf (FILE, "(%s)", reg_name[REGNO (index)]); \
983: }
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