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1.1 root 1: /*****************************************************************************
2: *
3: * z80.c
4: * Portable Z80 emulator V2.5
5: *
6: * Copyright (C) 1998,1999 Juergen Buchmueller, all rights reserved.
7: *
8: * - This source code is released as freeware for non-commercial purposes.
9: * - You are free to use and redistribute this code in modified or
10: * unmodified form, provided you list me in the credits.
11: * - If you modify this source code, you must add a notice to each modified
12: * source file that it has been changed. If you're a nice person, you
13: * will clearly mark each change too. :)
14: * - If you wish to use this for commercial purposes, please contact me at
15: * [email protected]
16: * - The author of this copywritten work reserves the right to change the
17: * terms of its usage and license at any time, including retroactively
18: * - This entire notice must remain in the source code.
19: *
20: * Changes in 2.5:
21: * - Burning cycles always adjusts the ICount by a multiple of 4.
22: * - In REPEAT_AT_ONCE cases the R register wasn't incremented twice
23: * per repetition as it should have been. Those repeated opcodes
24: * could also underflow the ICount.
25: * - Simplified TIME_LOOP_HACKS for BC and added two more for DE + HL
26: * timing loops. I think those hacks weren't endian safe before too.
27: * Changes in 2.4:
28: * - z80_reset zaps the entire context, sets IX and IY to 0xffff(!) and
29: * sets the Z flag. With these changes the Tehkan World Cup driver
30: * _seems_ to work again.
31: * Changes in 2.3:
32: * - External termination of the execution loop calls z80_burn() and
33: * z80_vm_burn() to burn an amount of cycles (R adjustment)
34: * - Shortcuts which burn CPU cycles (BUSY_LOOP_HACKS and TIME_LOOP_HACKS)
35: * now also adjust the R register depending on the skipped opcodes.
36: * Changes in 2.2:
37: * - Fixed bugs in CPL, SCF and CCF instructions flag handling.
38: * - Changed variable EA and ARG16() function to UINT32; this
39: * produces slightly more efficient code.
40: * - The DD/FD XY CB opcodes where XY is 40-7F and Y is not 6/E
41: * are changed to calls to the X6/XE opcodes to reduce object size.
42: * They're hardly ever used so this should not yield a speed penalty.
43: * New in 2.0:
44: * - Optional more exact Z80 emulation (#define Z80_EXACT 1) according
45: * to a detailed description by Sean Young which can be found at:
46: * http://www.msxnet.org/tech/Z80/z80undoc.txt
47: *****************************************************************************/
48:
49: /* #include "driver.h" */
50: /* #include "cpuintrf.h" */
51: /* #include "state.h" */
52: /* #include "mamedbg.h" */
53: #include "genz80.h"
54: #if Z80_VM
55: #include "z80_vm.h"
56: #else
57: #include "z80.h"
58: #endif
59:
60: #define VERBOSE 0
61:
62: #if VERBOSE
63: #define LOG(x) if( errorlog ) fprintf x
64: #else
65: #define LOG(x)
66: #endif
67:
68: /* execute main opcodes inside a big switch statement */
69: #ifndef BIG_SWITCH
70: #define BIG_SWITCH 1
71: #endif
72:
73: /* big flags array for ADD/ADC/SUB/SBC/CP results */
74: #define BIG_FLAGS_ARRAY 1
75:
76: /* Set to 1 for a more exact (but somewhat slower) Z80 emulation */
77: #define Z80_EXACT 1
78:
79: /* repetitive commands (ldir,cpdr etc.) repeat at
80: once until cycles used up or B(C) counted down. */
81: #define REPEAT_AT_ONCE 1
82:
83: /* on JP and JR opcodes check for tight loops */
84: #define BUSY_LOOP_HACKS 1
85:
86: /* check for delay loops counting down BC */
87: #define TIME_LOOP_HACKS 1
88:
89: #ifdef X86_ASM
90: #undef BIG_FLAGS_ARRAY
91: #define BIG_FLAGS_ARRAY 0
92: #endif
93:
94: #if Z80_VM
95: static UINT8 z80_reg_layout[] = {
96: Z80_PC, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL, -1,
97: Z80_IX, Z80_IY, Z80_AF2,Z80_BC2,Z80_DE2,Z80_HL2,-1,
98: Z80_R, Z80_I, Z80_IM, Z80_IFF1,Z80_IFF2, -1,
99: Z80_NMI_STATE,Z80_IRQ_STATE,Z80_DC0,Z80_DC1,Z80_DC2,Z80_DC3, -1,
100: Z80_BANK0, Z80_BANK1, Z80_BANK2, Z80_BANK3, -1,
101: Z80_BANK4, Z80_BANK5, Z80_BANK6, Z80_BANK7, 0
102: };
103:
104:
105: static UINT8 z80_win_layout[] = {
106: 27, 0,53, 6, /* register window (top rows) */
107: 0, 0,26,22, /* disassembler window (left colums) */
108: 27, 7,53, 6, /* memory #1 window (right, upper middle) */
109: 27,14,53, 8, /* memory #2 window (right, lower middle) */
110: 0,23,80, 1, /* command line window (bottom rows) */
111: };
112:
113: #define BURN z80_vm_burn
114:
115: #else
116:
117: static UINT8 z80_reg_layout[] = {
118: Z80_PC, Z80_SP, Z80_AF, Z80_BC, Z80_DE, Z80_HL, -1,
119: Z80_IX, Z80_IY, Z80_AF2,Z80_BC2,Z80_DE2,Z80_HL2,-1,
120: Z80_R, Z80_I, Z80_IM, Z80_IFF1,Z80_IFF2, -1,
121: Z80_NMI_STATE,Z80_IRQ_STATE,Z80_DC0,Z80_DC1,Z80_DC2,Z80_DC3, 0
122: };
123:
124: static UINT8 z80_win_layout[] = {
125: 27, 0,53, 4, /* register window (top rows) */
126: 0, 0,26,22, /* disassembler window (left colums) */
127: 27, 5,53, 8, /* memory #1 window (right, upper middle) */
128: 27,14,53, 8, /* memory #2 window (right, lower middle) */
129: 0,23,80, 1, /* command line window (bottom rows) */
130: };
131:
132: #define BURN z80_burn
133:
134: #endif
135:
136: /****************************************************************************/
137: /* The Z80 registers. HALT is set to 1 when the CPU is halted, the refresh */
138: /* register is calculated as follows: refresh=(Regs.R&127)|(Regs.R2&128) */
139: /****************************************************************************/
140: typedef struct {
141: /* 00 */ PAIR PREPC,PC,SP,AF,BC,DE,HL,IX,IY;
142: /* 24 */ PAIR AF2,BC2,DE2,HL2;
143: /* 34 */ UINT8 R,R2,IFF1,IFF2,HALT,IM,I;
144: /* 3B */ UINT8 irq_max; /* number of daisy chain devices */
145: /* 3C */ INT8 request_irq; /* daisy chain next request device */
146: /* 3D */ INT8 service_irq; /* daisy chain next reti handling device */
147: /* 3E */ UINT8 nmi_state; /* nmi line state */
148: /* 3F */ UINT8 irq_state; /* irq line state */
149: /* 40 */ UINT8 int_state[Z80_MAXDAISY];
150: /* 44 */ Z80_DaisyChain irq[Z80_MAXDAISY];
151: /* 84 */ int (*irq_callback)(int irqline);
152: /* 88 */ int extra_cycles; /* extra cycles for interrupts */
153: #if Z80_VM
154: /* 8C */ UINT32 bank[8]; /* bank memory address (24 bit) */
155: #endif
156: } Z80_Regs;
157:
158: #define CF 0x01
159: #define NF 0x02
160: #define PF 0x04
161: #define VF PF
162: #define XF 0x08
163: #define HF 0x10
164: #define YF 0x20
165: #define ZF 0x40
166: #define SF 0x80
167:
168: #define INT_IRQ 0x01
169: #define NMI_IRQ 0x02
170:
171: #define _PPC Z80.PREPC.d /* previous program counter */
172:
173: #define _PCD Z80.PC.d
174: #define _PC Z80.PC.w.l
175:
176: #define _SPD Z80.SP.d
177: #define _SP Z80.SP.w.l
178:
179: #define _AFD Z80.AF.d
180: #define _AF Z80.AF.w.l
181: #define _A Z80.AF.b.h
182: #define _F Z80.AF.b.l
183:
184: #define _BCD Z80.BC.d
185: #define _BC Z80.BC.w.l
186: #define _B Z80.BC.b.h
187: #define _C Z80.BC.b.l
188:
189: #define _DED Z80.DE.d
190: #define _DE Z80.DE.w.l
191: #define _D Z80.DE.b.h
192: #define _E Z80.DE.b.l
193:
194: #define _HLD Z80.HL.d
195: #define _HL Z80.HL.w.l
196: #define _H Z80.HL.b.h
197: #define _L Z80.HL.b.l
198:
199: #define _IXD Z80.IX.d
200: #define _IX Z80.IX.w.l
201: #define _HX Z80.IX.b.h
202: #define _LX Z80.IX.b.l
203:
204: #define _IYD Z80.IY.d
205: #define _IY Z80.IY.w.l
206: #define _HY Z80.IY.b.h
207: #define _LY Z80.IY.b.l
208:
209: #define _I Z80.I
210: #define _R Z80.R
211: #define _R2 Z80.R2
212: #define _IM Z80.IM
213: #define _IFF1 Z80.IFF1
214: #define _IFF2 Z80.IFF2
215: #define _HALT Z80.HALT
216:
217: int z80_ICount;
218: static Z80_Regs Z80;
219: static UINT32 EA;
220: static int after_EI = 0;
221:
222: static UINT8 SZ[256]; /* zero and sign flags */
223: static UINT8 SZ_BIT[256]; /* zero, sign and parity/overflow (=zero) flags for BIT opcode */
224: static UINT8 SZP[256]; /* zero, sign and parity flags */
225: static UINT8 SZHV_inc[256]; /* zero, sign, half carry and overflow flags INC r8 */
226: static UINT8 SZHV_dec[256]; /* zero, sign, half carry and overflow flags DEC r8 */
227: #include "z80daa.h"
228: #if BIG_FLAGS_ARRAY
229: #include <signal.h>
230: static UINT8 *SZHVC_add = 0;
231: static UINT8 *SZHVC_sub = 0;
232: #endif
233:
234: #if Z80_EXACT
235: /* tmp1 value for ini/inir/outi/otir for [C.1-0][io.1-0] */
236: static UINT8 irep_tmp1[4][4] = {
237: {0,0,1,0},{0,1,0,1},{1,0,1,1},{0,1,1,0}
238: };
239:
240: /* tmp1 value for ind/indr/outd/otdr for [C.1-0][io.1-0] */
241: static UINT8 drep_tmp1[4][4] = {
242: {0,1,0,0},{1,0,0,1},{0,0,1,0},{0,1,0,1}
243: };
244:
245: /* tmp2 value for all in/out repeated opcodes for B.7-0 */
246: static UINT8 breg_tmp2[256] = {
247: 0,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
248: 0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
249: 1,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
250: 1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
251: 0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
252: 1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
253: 0,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
254: 0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
255: 1,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
256: 1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
257: 0,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
258: 0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
259: 1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,
260: 0,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
261: 1,1,0,0,1,0,1,1,0,0,1,1,0,1,0,0,
262: 1,0,1,1,0,1,0,0,1,1,0,0,1,0,1,1
263: };
264: #endif
265:
266: static UINT8 cc_op[0x100] = {
267: 4,10, 7, 6, 4, 4, 7, 4, 4,11, 7, 6, 4, 4, 7, 4,
268: 8,10, 7, 6, 4, 4, 7, 4,12,11, 7, 6, 4, 4, 7, 4,
269: 7,10,16, 6, 4, 4, 7, 4, 7,11,16, 6, 4, 4, 7, 4,
270: 7,10,13, 6,11,11,10, 4, 7,11,13, 6, 4, 4, 7, 4,
271: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
272: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
273: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
274: 7, 7, 7, 7, 7, 7, 4, 7, 4, 4, 4, 4, 4, 4, 7, 4,
275: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
276: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
277: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
278: 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
279: 5,10,10,10,10,11, 7,11, 5, 4,10, 0,10,10, 7,11,
280: 5,10,10,11,10,11, 7,11, 5, 4,10,11,10, 0, 7,11,
281: 5,10,10,19,10,11, 7,11, 5, 4,10, 4,10, 0, 7,11,
282: 5,10,10, 4,10,11, 7,11, 5, 6,10, 4,10, 0, 7,11};
283:
284:
285: static UINT8 cc_cb[0x100] = {
286: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
287: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
288: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
289: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
290: 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
291: 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
292: 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
293: 8, 8, 8, 8, 8, 8,12, 8, 8, 8, 8, 8, 8, 8,12, 8,
294: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
295: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
296: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
297: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
298: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
299: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
300: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8,
301: 8, 8, 8, 8, 8, 8,15, 8, 8, 8, 8, 8, 8, 8,15, 8};
302:
303: static UINT8 cc_dd[0x100] = {
304: 4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
305: 4, 4, 4, 4, 4, 4, 4, 4, 4,15, 4, 4, 4, 4, 4, 4,
306: 4,14,20,10, 9, 9, 9, 4, 4,15,20,10, 9, 9, 9, 4,
307: 4, 4, 4, 4,23,23,19, 4, 4,15, 4, 4, 4, 4, 4, 4,
308: 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
309: 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
310: 9, 9, 9, 9, 9, 9,19, 9, 9, 9, 9, 9, 9, 9,19, 9,
311: 19,19,19,19,19,19, 4,19, 4, 4, 4, 4, 9, 9,19, 4,
312: 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
313: 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
314: 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
315: 4, 4, 4, 4, 9, 9,19, 4, 4, 4, 4, 4, 9, 9,19, 4,
316: 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 0, 4, 4, 4, 4,
317: 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4,
318: 4,14, 4,23, 4,15, 4, 4, 4, 8, 4, 4, 4, 4, 4, 4,
319: 4, 4, 4, 4, 4, 4, 4, 4, 4,10, 4, 4, 4, 4, 4, 4};
320:
321: // dd/fd cycles are identical
322: #define cc_fd cc_dd
323:
324: static UINT8 cc_xxcb[0x100] = {
325: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
326: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
327: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
328: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
329: 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
330: 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
331: 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
332: 20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,20,
333: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
334: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
335: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
336: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
337: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
338: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
339: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,
340: 23,23,23,23,23,23,23,23,23,23,23,23,23,23,23,23};
341:
342: static UINT8 cc_ed[0x100] = {
343: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
344: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
345: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
346: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
347: 12,12,15,20, 8, 8, 8, 9,12,12,15,20, 8, 8, 8, 9,
348: 12,12,15,20, 8, 8, 8, 9,12,12,15,20, 8, 8, 8, 9,
349: 12,12,15,20, 8, 8, 8,18,12,12,15,20, 8, 8, 8,18,
350: 12,12,15,20, 8, 8, 8, 8,12,12,15,20, 8, 8, 8, 8,
351: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
352: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
353: 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
354: 16,16,16,16, 8, 8, 8, 8,16,16,16,16, 8, 8, 8, 8,
355: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
356: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
357: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8,
358: 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8};
359:
360: static void take_interrupt(void);
361:
362: #define PROTOTYPES(tablename,prefix) \
363: INLINE void prefix ## _00(void); INLINE void prefix##_01(void); INLINE void prefix##_02(void); INLINE void prefix##_03(void); \
364: INLINE void prefix##_04(void); INLINE void prefix##_05(void); INLINE void prefix##_06(void); INLINE void prefix##_07(void); \
365: INLINE void prefix##_08(void); INLINE void prefix##_09(void); INLINE void prefix##_0a(void); INLINE void prefix##_0b(void); \
366: INLINE void prefix##_0c(void); INLINE void prefix##_0d(void); INLINE void prefix##_0e(void); INLINE void prefix##_0f(void); \
367: INLINE void prefix##_10(void); INLINE void prefix##_11(void); INLINE void prefix##_12(void); INLINE void prefix##_13(void); \
368: INLINE void prefix##_14(void); INLINE void prefix##_15(void); INLINE void prefix##_16(void); INLINE void prefix##_17(void); \
369: INLINE void prefix##_18(void); INLINE void prefix##_19(void); INLINE void prefix##_1a(void); INLINE void prefix##_1b(void); \
370: INLINE void prefix##_1c(void); INLINE void prefix##_1d(void); INLINE void prefix##_1e(void); INLINE void prefix##_1f(void); \
371: INLINE void prefix##_20(void); INLINE void prefix##_21(void); INLINE void prefix##_22(void); INLINE void prefix##_23(void); \
372: INLINE void prefix##_24(void); INLINE void prefix##_25(void); INLINE void prefix##_26(void); INLINE void prefix##_27(void); \
373: INLINE void prefix##_28(void); INLINE void prefix##_29(void); INLINE void prefix##_2a(void); INLINE void prefix##_2b(void); \
374: INLINE void prefix##_2c(void); INLINE void prefix##_2d(void); INLINE void prefix##_2e(void); INLINE void prefix##_2f(void); \
375: INLINE void prefix##_30(void); INLINE void prefix##_31(void); INLINE void prefix##_32(void); INLINE void prefix##_33(void); \
376: INLINE void prefix##_34(void); INLINE void prefix##_35(void); INLINE void prefix##_36(void); INLINE void prefix##_37(void); \
377: INLINE void prefix##_38(void); INLINE void prefix##_39(void); INLINE void prefix##_3a(void); INLINE void prefix##_3b(void); \
378: INLINE void prefix##_3c(void); INLINE void prefix##_3d(void); INLINE void prefix##_3e(void); INLINE void prefix##_3f(void); \
379: INLINE void prefix##_40(void); INLINE void prefix##_41(void); INLINE void prefix##_42(void); INLINE void prefix##_43(void); \
380: INLINE void prefix##_44(void); INLINE void prefix##_45(void); INLINE void prefix##_46(void); INLINE void prefix##_47(void); \
381: INLINE void prefix##_48(void); INLINE void prefix##_49(void); INLINE void prefix##_4a(void); INLINE void prefix##_4b(void); \
382: INLINE void prefix##_4c(void); INLINE void prefix##_4d(void); INLINE void prefix##_4e(void); INLINE void prefix##_4f(void); \
383: INLINE void prefix##_50(void); INLINE void prefix##_51(void); INLINE void prefix##_52(void); INLINE void prefix##_53(void); \
384: INLINE void prefix##_54(void); INLINE void prefix##_55(void); INLINE void prefix##_56(void); INLINE void prefix##_57(void); \
385: INLINE void prefix##_58(void); INLINE void prefix##_59(void); INLINE void prefix##_5a(void); INLINE void prefix##_5b(void); \
386: INLINE void prefix##_5c(void); INLINE void prefix##_5d(void); INLINE void prefix##_5e(void); INLINE void prefix##_5f(void); \
387: INLINE void prefix##_60(void); INLINE void prefix##_61(void); INLINE void prefix##_62(void); INLINE void prefix##_63(void); \
388: INLINE void prefix##_64(void); INLINE void prefix##_65(void); INLINE void prefix##_66(void); INLINE void prefix##_67(void); \
389: INLINE void prefix##_68(void); INLINE void prefix##_69(void); INLINE void prefix##_6a(void); INLINE void prefix##_6b(void); \
390: INLINE void prefix##_6c(void); INLINE void prefix##_6d(void); INLINE void prefix##_6e(void); INLINE void prefix##_6f(void); \
391: INLINE void prefix##_70(void); INLINE void prefix##_71(void); INLINE void prefix##_72(void); INLINE void prefix##_73(void); \
392: INLINE void prefix##_74(void); INLINE void prefix##_75(void); INLINE void prefix##_76(void); INLINE void prefix##_77(void); \
393: INLINE void prefix##_78(void); INLINE void prefix##_79(void); INLINE void prefix##_7a(void); INLINE void prefix##_7b(void); \
394: INLINE void prefix##_7c(void); INLINE void prefix##_7d(void); INLINE void prefix##_7e(void); INLINE void prefix##_7f(void); \
395: INLINE void prefix##_80(void); INLINE void prefix##_81(void); INLINE void prefix##_82(void); INLINE void prefix##_83(void); \
396: INLINE void prefix##_84(void); INLINE void prefix##_85(void); INLINE void prefix##_86(void); INLINE void prefix##_87(void); \
397: INLINE void prefix##_88(void); INLINE void prefix##_89(void); INLINE void prefix##_8a(void); INLINE void prefix##_8b(void); \
398: INLINE void prefix##_8c(void); INLINE void prefix##_8d(void); INLINE void prefix##_8e(void); INLINE void prefix##_8f(void); \
399: INLINE void prefix##_90(void); INLINE void prefix##_91(void); INLINE void prefix##_92(void); INLINE void prefix##_93(void); \
400: INLINE void prefix##_94(void); INLINE void prefix##_95(void); INLINE void prefix##_96(void); INLINE void prefix##_97(void); \
401: INLINE void prefix##_98(void); INLINE void prefix##_99(void); INLINE void prefix##_9a(void); INLINE void prefix##_9b(void); \
402: INLINE void prefix##_9c(void); INLINE void prefix##_9d(void); INLINE void prefix##_9e(void); INLINE void prefix##_9f(void); \
403: INLINE void prefix##_a0(void); INLINE void prefix##_a1(void); INLINE void prefix##_a2(void); INLINE void prefix##_a3(void); \
404: INLINE void prefix##_a4(void); INLINE void prefix##_a5(void); INLINE void prefix##_a6(void); INLINE void prefix##_a7(void); \
405: INLINE void prefix##_a8(void); INLINE void prefix##_a9(void); INLINE void prefix##_aa(void); INLINE void prefix##_ab(void); \
406: INLINE void prefix##_ac(void); INLINE void prefix##_ad(void); INLINE void prefix##_ae(void); INLINE void prefix##_af(void); \
407: INLINE void prefix##_b0(void); INLINE void prefix##_b1(void); INLINE void prefix##_b2(void); INLINE void prefix##_b3(void); \
408: INLINE void prefix##_b4(void); INLINE void prefix##_b5(void); INLINE void prefix##_b6(void); INLINE void prefix##_b7(void); \
409: INLINE void prefix##_b8(void); INLINE void prefix##_b9(void); INLINE void prefix##_ba(void); INLINE void prefix##_bb(void); \
410: INLINE void prefix##_bc(void); INLINE void prefix##_bd(void); INLINE void prefix##_be(void); INLINE void prefix##_bf(void); \
411: INLINE void prefix##_c0(void); INLINE void prefix##_c1(void); INLINE void prefix##_c2(void); INLINE void prefix##_c3(void); \
412: INLINE void prefix##_c4(void); INLINE void prefix##_c5(void); INLINE void prefix##_c6(void); INLINE void prefix##_c7(void); \
413: INLINE void prefix##_c8(void); INLINE void prefix##_c9(void); INLINE void prefix##_ca(void); INLINE void prefix##_cb(void); \
414: INLINE void prefix##_cc(void); INLINE void prefix##_cd(void); INLINE void prefix##_ce(void); INLINE void prefix##_cf(void); \
415: INLINE void prefix##_d0(void); INLINE void prefix##_d1(void); INLINE void prefix##_d2(void); INLINE void prefix##_d3(void); \
416: INLINE void prefix##_d4(void); INLINE void prefix##_d5(void); INLINE void prefix##_d6(void); INLINE void prefix##_d7(void); \
417: INLINE void prefix##_d8(void); INLINE void prefix##_d9(void); INLINE void prefix##_da(void); INLINE void prefix##_db(void); \
418: INLINE void prefix##_dc(void); INLINE void prefix##_dd(void); INLINE void prefix##_de(void); INLINE void prefix##_df(void); \
419: INLINE void prefix##_e0(void); INLINE void prefix##_e1(void); INLINE void prefix##_e2(void); INLINE void prefix##_e3(void); \
420: INLINE void prefix##_e4(void); INLINE void prefix##_e5(void); INLINE void prefix##_e6(void); INLINE void prefix##_e7(void); \
421: INLINE void prefix##_e8(void); INLINE void prefix##_e9(void); INLINE void prefix##_ea(void); INLINE void prefix##_eb(void); \
422: INLINE void prefix##_ec(void); INLINE void prefix##_ed(void); INLINE void prefix##_ee(void); INLINE void prefix##_ef(void); \
423: INLINE void prefix##_f0(void); INLINE void prefix##_f1(void); INLINE void prefix##_f2(void); INLINE void prefix##_f3(void); \
424: INLINE void prefix##_f4(void); INLINE void prefix##_f5(void); INLINE void prefix##_f6(void); INLINE void prefix##_f7(void); \
425: INLINE void prefix##_f8(void); INLINE void prefix##_f9(void); INLINE void prefix##_fa(void); INLINE void prefix##_fb(void); \
426: INLINE void prefix##_fc(void); INLINE void prefix##_fd(void); INLINE void prefix##_fe(void); INLINE void prefix##_ff(void); \
427: static void (*tablename[0x100])(void) = { \
428: prefix##_00,prefix##_01,prefix##_02,prefix##_03,prefix##_04,prefix##_05,prefix##_06,prefix##_07, \
429: prefix##_08,prefix##_09,prefix##_0a,prefix##_0b,prefix##_0c,prefix##_0d,prefix##_0e,prefix##_0f, \
430: prefix##_10,prefix##_11,prefix##_12,prefix##_13,prefix##_14,prefix##_15,prefix##_16,prefix##_17, \
431: prefix##_18,prefix##_19,prefix##_1a,prefix##_1b,prefix##_1c,prefix##_1d,prefix##_1e,prefix##_1f, \
432: prefix##_20,prefix##_21,prefix##_22,prefix##_23,prefix##_24,prefix##_25,prefix##_26,prefix##_27, \
433: prefix##_28,prefix##_29,prefix##_2a,prefix##_2b,prefix##_2c,prefix##_2d,prefix##_2e,prefix##_2f, \
434: prefix##_30,prefix##_31,prefix##_32,prefix##_33,prefix##_34,prefix##_35,prefix##_36,prefix##_37, \
435: prefix##_38,prefix##_39,prefix##_3a,prefix##_3b,prefix##_3c,prefix##_3d,prefix##_3e,prefix##_3f, \
436: prefix##_40,prefix##_41,prefix##_42,prefix##_43,prefix##_44,prefix##_45,prefix##_46,prefix##_47, \
437: prefix##_48,prefix##_49,prefix##_4a,prefix##_4b,prefix##_4c,prefix##_4d,prefix##_4e,prefix##_4f, \
438: prefix##_50,prefix##_51,prefix##_52,prefix##_53,prefix##_54,prefix##_55,prefix##_56,prefix##_57, \
439: prefix##_58,prefix##_59,prefix##_5a,prefix##_5b,prefix##_5c,prefix##_5d,prefix##_5e,prefix##_5f, \
440: prefix##_60,prefix##_61,prefix##_62,prefix##_63,prefix##_64,prefix##_65,prefix##_66,prefix##_67, \
441: prefix##_68,prefix##_69,prefix##_6a,prefix##_6b,prefix##_6c,prefix##_6d,prefix##_6e,prefix##_6f, \
442: prefix##_70,prefix##_71,prefix##_72,prefix##_73,prefix##_74,prefix##_75,prefix##_76,prefix##_77, \
443: prefix##_78,prefix##_79,prefix##_7a,prefix##_7b,prefix##_7c,prefix##_7d,prefix##_7e,prefix##_7f, \
444: prefix##_80,prefix##_81,prefix##_82,prefix##_83,prefix##_84,prefix##_85,prefix##_86,prefix##_87, \
445: prefix##_88,prefix##_89,prefix##_8a,prefix##_8b,prefix##_8c,prefix##_8d,prefix##_8e,prefix##_8f, \
446: prefix##_90,prefix##_91,prefix##_92,prefix##_93,prefix##_94,prefix##_95,prefix##_96,prefix##_97, \
447: prefix##_98,prefix##_99,prefix##_9a,prefix##_9b,prefix##_9c,prefix##_9d,prefix##_9e,prefix##_9f, \
448: prefix##_a0,prefix##_a1,prefix##_a2,prefix##_a3,prefix##_a4,prefix##_a5,prefix##_a6,prefix##_a7, \
449: prefix##_a8,prefix##_a9,prefix##_aa,prefix##_ab,prefix##_ac,prefix##_ad,prefix##_ae,prefix##_af, \
450: prefix##_b0,prefix##_b1,prefix##_b2,prefix##_b3,prefix##_b4,prefix##_b5,prefix##_b6,prefix##_b7, \
451: prefix##_b8,prefix##_b9,prefix##_ba,prefix##_bb,prefix##_bc,prefix##_bd,prefix##_be,prefix##_bf, \
452: prefix##_c0,prefix##_c1,prefix##_c2,prefix##_c3,prefix##_c4,prefix##_c5,prefix##_c6,prefix##_c7, \
453: prefix##_c8,prefix##_c9,prefix##_ca,prefix##_cb,prefix##_cc,prefix##_cd,prefix##_ce,prefix##_cf, \
454: prefix##_d0,prefix##_d1,prefix##_d2,prefix##_d3,prefix##_d4,prefix##_d5,prefix##_d6,prefix##_d7, \
455: prefix##_d8,prefix##_d9,prefix##_da,prefix##_db,prefix##_dc,prefix##_dd,prefix##_de,prefix##_df, \
456: prefix##_e0,prefix##_e1,prefix##_e2,prefix##_e3,prefix##_e4,prefix##_e5,prefix##_e6,prefix##_e7, \
457: prefix##_e8,prefix##_e9,prefix##_ea,prefix##_eb,prefix##_ec,prefix##_ed,prefix##_ee,prefix##_ef, \
458: prefix##_f0,prefix##_f1,prefix##_f2,prefix##_f3,prefix##_f4,prefix##_f5,prefix##_f6,prefix##_f7, \
459: prefix##_f8,prefix##_f9,prefix##_fa,prefix##_fb,prefix##_fc,prefix##_fd,prefix##_fe,prefix##_ff \
460: }
461:
462: PROTOTYPES(Z80op,op);
463: PROTOTYPES(Z80cb,cb);
464: PROTOTYPES(Z80dd,dd);
465: PROTOTYPES(Z80ed,ed);
466: PROTOTYPES(Z80fd,fd);
467: PROTOTYPES(Z80xxcb,xxcb);
468:
469: /****************************************************************************/
470: /* Burn an odd amount of cycles, that is instructions taking something */
471: /* different from 4 T-states per opcode (and R increment) */
472: /****************************************************************************/
473: INLINE void BURNODD(int cycles, int opcodes, int cyclesum)
474: {
475: if( cycles > 0 )
476: {
477: _R += (cycles / cyclesum) * opcodes;
478: z80_ICount -= (cycles / cyclesum) * cyclesum;
479: }
480: }
481:
482: /***************************************************************
483: * define an opcode function
484: ***************************************************************/
485: #define OP(prefix,opcode) INLINE void prefix##_##opcode(void)
486:
487: /***************************************************************
488: * adjust cycle count by n T-states
489: ***************************************************************/
490: #define CY(cycles) z80_ICount -= cycles
491:
492: /***************************************************************
493: * execute an opcode
494: ***************************************************************/
495: #define EXEC(prefix,opcode) \
496: { \
497: unsigned op = opcode; \
498: CY(cc_##prefix[op]); \
499: (*Z80##prefix[op])(); \
500: }
501:
502: #if BIG_SWITCH
503: #define EXEC_INLINE(prefix,opcode) \
504: { \
505: unsigned op = opcode; \
506: CY(cc_##prefix[op]); \
507: switch(op) \
508: { \
509: case 0x00:prefix##_##00();break; case 0x01:prefix##_##01();break; case 0x02:prefix##_##02();break; case 0x03:prefix##_##03();break; \
510: case 0x04:prefix##_##04();break; case 0x05:prefix##_##05();break; case 0x06:prefix##_##06();break; case 0x07:prefix##_##07();break; \
511: case 0x08:prefix##_##08();break; case 0x09:prefix##_##09();break; case 0x0a:prefix##_##0a();break; case 0x0b:prefix##_##0b();break; \
512: case 0x0c:prefix##_##0c();break; case 0x0d:prefix##_##0d();break; case 0x0e:prefix##_##0e();break; case 0x0f:prefix##_##0f();break; \
513: case 0x10:prefix##_##10();break; case 0x11:prefix##_##11();break; case 0x12:prefix##_##12();break; case 0x13:prefix##_##13();break; \
514: case 0x14:prefix##_##14();break; case 0x15:prefix##_##15();break; case 0x16:prefix##_##16();break; case 0x17:prefix##_##17();break; \
515: case 0x18:prefix##_##18();break; case 0x19:prefix##_##19();break; case 0x1a:prefix##_##1a();break; case 0x1b:prefix##_##1b();break; \
516: case 0x1c:prefix##_##1c();break; case 0x1d:prefix##_##1d();break; case 0x1e:prefix##_##1e();break; case 0x1f:prefix##_##1f();break; \
517: case 0x20:prefix##_##20();break; case 0x21:prefix##_##21();break; case 0x22:prefix##_##22();break; case 0x23:prefix##_##23();break; \
518: case 0x24:prefix##_##24();break; case 0x25:prefix##_##25();break; case 0x26:prefix##_##26();break; case 0x27:prefix##_##27();break; \
519: case 0x28:prefix##_##28();break; case 0x29:prefix##_##29();break; case 0x2a:prefix##_##2a();break; case 0x2b:prefix##_##2b();break; \
520: case 0x2c:prefix##_##2c();break; case 0x2d:prefix##_##2d();break; case 0x2e:prefix##_##2e();break; case 0x2f:prefix##_##2f();break; \
521: case 0x30:prefix##_##30();break; case 0x31:prefix##_##31();break; case 0x32:prefix##_##32();break; case 0x33:prefix##_##33();break; \
522: case 0x34:prefix##_##34();break; case 0x35:prefix##_##35();break; case 0x36:prefix##_##36();break; case 0x37:prefix##_##37();break; \
523: case 0x38:prefix##_##38();break; case 0x39:prefix##_##39();break; case 0x3a:prefix##_##3a();break; case 0x3b:prefix##_##3b();break; \
524: case 0x3c:prefix##_##3c();break; case 0x3d:prefix##_##3d();break; case 0x3e:prefix##_##3e();break; case 0x3f:prefix##_##3f();break; \
525: case 0x40:prefix##_##40();break; case 0x41:prefix##_##41();break; case 0x42:prefix##_##42();break; case 0x43:prefix##_##43();break; \
526: case 0x44:prefix##_##44();break; case 0x45:prefix##_##45();break; case 0x46:prefix##_##46();break; case 0x47:prefix##_##47();break; \
527: case 0x48:prefix##_##48();break; case 0x49:prefix##_##49();break; case 0x4a:prefix##_##4a();break; case 0x4b:prefix##_##4b();break; \
528: case 0x4c:prefix##_##4c();break; case 0x4d:prefix##_##4d();break; case 0x4e:prefix##_##4e();break; case 0x4f:prefix##_##4f();break; \
529: case 0x50:prefix##_##50();break; case 0x51:prefix##_##51();break; case 0x52:prefix##_##52();break; case 0x53:prefix##_##53();break; \
530: case 0x54:prefix##_##54();break; case 0x55:prefix##_##55();break; case 0x56:prefix##_##56();break; case 0x57:prefix##_##57();break; \
531: case 0x58:prefix##_##58();break; case 0x59:prefix##_##59();break; case 0x5a:prefix##_##5a();break; case 0x5b:prefix##_##5b();break; \
532: case 0x5c:prefix##_##5c();break; case 0x5d:prefix##_##5d();break; case 0x5e:prefix##_##5e();break; case 0x5f:prefix##_##5f();break; \
533: case 0x60:prefix##_##60();break; case 0x61:prefix##_##61();break; case 0x62:prefix##_##62();break; case 0x63:prefix##_##63();break; \
534: case 0x64:prefix##_##64();break; case 0x65:prefix##_##65();break; case 0x66:prefix##_##66();break; case 0x67:prefix##_##67();break; \
535: case 0x68:prefix##_##68();break; case 0x69:prefix##_##69();break; case 0x6a:prefix##_##6a();break; case 0x6b:prefix##_##6b();break; \
536: case 0x6c:prefix##_##6c();break; case 0x6d:prefix##_##6d();break; case 0x6e:prefix##_##6e();break; case 0x6f:prefix##_##6f();break; \
537: case 0x70:prefix##_##70();break; case 0x71:prefix##_##71();break; case 0x72:prefix##_##72();break; case 0x73:prefix##_##73();break; \
538: case 0x74:prefix##_##74();break; case 0x75:prefix##_##75();break; case 0x76:prefix##_##76();break; case 0x77:prefix##_##77();break; \
539: case 0x78:prefix##_##78();break; case 0x79:prefix##_##79();break; case 0x7a:prefix##_##7a();break; case 0x7b:prefix##_##7b();break; \
540: case 0x7c:prefix##_##7c();break; case 0x7d:prefix##_##7d();break; case 0x7e:prefix##_##7e();break; case 0x7f:prefix##_##7f();break; \
541: case 0x80:prefix##_##80();break; case 0x81:prefix##_##81();break; case 0x82:prefix##_##82();break; case 0x83:prefix##_##83();break; \
542: case 0x84:prefix##_##84();break; case 0x85:prefix##_##85();break; case 0x86:prefix##_##86();break; case 0x87:prefix##_##87();break; \
543: case 0x88:prefix##_##88();break; case 0x89:prefix##_##89();break; case 0x8a:prefix##_##8a();break; case 0x8b:prefix##_##8b();break; \
544: case 0x8c:prefix##_##8c();break; case 0x8d:prefix##_##8d();break; case 0x8e:prefix##_##8e();break; case 0x8f:prefix##_##8f();break; \
545: case 0x90:prefix##_##90();break; case 0x91:prefix##_##91();break; case 0x92:prefix##_##92();break; case 0x93:prefix##_##93();break; \
546: case 0x94:prefix##_##94();break; case 0x95:prefix##_##95();break; case 0x96:prefix##_##96();break; case 0x97:prefix##_##97();break; \
547: case 0x98:prefix##_##98();break; case 0x99:prefix##_##99();break; case 0x9a:prefix##_##9a();break; case 0x9b:prefix##_##9b();break; \
548: case 0x9c:prefix##_##9c();break; case 0x9d:prefix##_##9d();break; case 0x9e:prefix##_##9e();break; case 0x9f:prefix##_##9f();break; \
549: case 0xa0:prefix##_##a0();break; case 0xa1:prefix##_##a1();break; case 0xa2:prefix##_##a2();break; case 0xa3:prefix##_##a3();break; \
550: case 0xa4:prefix##_##a4();break; case 0xa5:prefix##_##a5();break; case 0xa6:prefix##_##a6();break; case 0xa7:prefix##_##a7();break; \
551: case 0xa8:prefix##_##a8();break; case 0xa9:prefix##_##a9();break; case 0xaa:prefix##_##aa();break; case 0xab:prefix##_##ab();break; \
552: case 0xac:prefix##_##ac();break; case 0xad:prefix##_##ad();break; case 0xae:prefix##_##ae();break; case 0xaf:prefix##_##af();break; \
553: case 0xb0:prefix##_##b0();break; case 0xb1:prefix##_##b1();break; case 0xb2:prefix##_##b2();break; case 0xb3:prefix##_##b3();break; \
554: case 0xb4:prefix##_##b4();break; case 0xb5:prefix##_##b5();break; case 0xb6:prefix##_##b6();break; case 0xb7:prefix##_##b7();break; \
555: case 0xb8:prefix##_##b8();break; case 0xb9:prefix##_##b9();break; case 0xba:prefix##_##ba();break; case 0xbb:prefix##_##bb();break; \
556: case 0xbc:prefix##_##bc();break; case 0xbd:prefix##_##bd();break; case 0xbe:prefix##_##be();break; case 0xbf:prefix##_##bf();break; \
557: case 0xc0:prefix##_##c0();break; case 0xc1:prefix##_##c1();break; case 0xc2:prefix##_##c2();break; case 0xc3:prefix##_##c3();break; \
558: case 0xc4:prefix##_##c4();break; case 0xc5:prefix##_##c5();break; case 0xc6:prefix##_##c6();break; case 0xc7:prefix##_##c7();break; \
559: case 0xc8:prefix##_##c8();break; case 0xc9:prefix##_##c9();break; case 0xca:prefix##_##ca();break; case 0xcb:prefix##_##cb();break; \
560: case 0xcc:prefix##_##cc();break; case 0xcd:prefix##_##cd();break; case 0xce:prefix##_##ce();break; case 0xcf:prefix##_##cf();break; \
561: case 0xd0:prefix##_##d0();break; case 0xd1:prefix##_##d1();break; case 0xd2:prefix##_##d2();break; case 0xd3:prefix##_##d3();break; \
562: case 0xd4:prefix##_##d4();break; case 0xd5:prefix##_##d5();break; case 0xd6:prefix##_##d6();break; case 0xd7:prefix##_##d7();break; \
563: case 0xd8:prefix##_##d8();break; case 0xd9:prefix##_##d9();break; case 0xda:prefix##_##da();break; case 0xdb:prefix##_##db();break; \
564: case 0xdc:prefix##_##dc();break; case 0xdd:prefix##_##dd();break; case 0xde:prefix##_##de();break; case 0xdf:prefix##_##df();break; \
565: case 0xe0:prefix##_##e0();break; case 0xe1:prefix##_##e1();break; case 0xe2:prefix##_##e2();break; case 0xe3:prefix##_##e3();break; \
566: case 0xe4:prefix##_##e4();break; case 0xe5:prefix##_##e5();break; case 0xe6:prefix##_##e6();break; case 0xe7:prefix##_##e7();break; \
567: case 0xe8:prefix##_##e8();break; case 0xe9:prefix##_##e9();break; case 0xea:prefix##_##ea();break; case 0xeb:prefix##_##eb();break; \
568: case 0xec:prefix##_##ec();break; case 0xed:prefix##_##ed();break; case 0xee:prefix##_##ee();break; case 0xef:prefix##_##ef();break; \
569: case 0xf0:prefix##_##f0();break; case 0xf1:prefix##_##f1();break; case 0xf2:prefix##_##f2();break; case 0xf3:prefix##_##f3();break; \
570: case 0xf4:prefix##_##f4();break; case 0xf5:prefix##_##f5();break; case 0xf6:prefix##_##f6();break; case 0xf7:prefix##_##f7();break; \
571: case 0xf8:prefix##_##f8();break; case 0xf9:prefix##_##f9();break; case 0xfa:prefix##_##fa();break; case 0xfb:prefix##_##fb();break; \
572: case 0xfc:prefix##_##fc();break; case 0xfd:prefix##_##fd();break; case 0xfe:prefix##_##fe();break; case 0xff:prefix##_##ff();break; \
573: } \
574: }
575: #else
576: #define EXEC_INLINE EXEC
577: #endif
578:
579:
580: /***************************************************************
581: * Enter HALT state; write 1 to fake port on first execution
582: ***************************************************************/
583: #define ENTER_HALT { \
584: _PC--; \
585: _HALT = 1; \
586: if( !after_EI ) \
587: BURN( z80_ICount ); \
588: }
589:
590: /***************************************************************
591: * Leave HALT state; write 0 to fake port
592: ***************************************************************/
593: #define LEAVE_HALT { \
594: if( _HALT ) \
595: { \
596: _HALT = 0; \
597: _PC++; \
598: } \
599: }
600:
601: /***************************************************************
602: * Input a byte from given I/O port
603: ***************************************************************/
604: #define IN(port) ((UINT8)cpu_readport(port))
605:
606: /***************************************************************
607: * Output a byte to given I/O port
608: ***************************************************************/
609: #define OUT(port,value) cpu_writeport(port,value)
610:
611: /***************************************************************
612: * Read a byte from given memory location
613: ***************************************************************/
614: #if Z80_VM
615: INLINE UINT8 RM( UINT32 addr )
616: {
617: unsigned vm = Z80.bank[addr >> 13] + (addr & 0x1fff);
618: return cpu_readmem16(vm);
619: }
620: #else
621: #define RM(addr) (UINT8)cpu_readmem16(addr)
622: #endif
623:
624: /***************************************************************
625: * Read a word from given memory location
626: ***************************************************************/
627: INLINE void RM16( UINT32 addr, PAIR *r )
628: {
629: r->b.l = RM(addr);
630: r->b.h = RM((addr+1)&0xffff);
631: }
632:
633: /***************************************************************
634: * Write a byte to given memory location
635: ***************************************************************/
636: #if Z80_VM
637: INLINE void WM( UINT32 addr, UINT8 value )
638: {
639: unsigned vm = Z80.bank[addr >> 13] + (addr & 0x1fff);
640: cpu_writemem16( vm, value );
641: }
642: #else
643: #define WM(addr,value) cpu_writemem16(addr,value)
644: #endif
645:
646: /***************************************************************
647: * Write a word to given memory location
648: ***************************************************************/
649: INLINE void WM16( UINT32 addr, PAIR *r )
650: {
651: WM(addr,r->b.l);
652: WM((addr+1)&0xffff,r->b.h);
653: }
654:
655: /***************************************************************
656: * ROP() is identical to RM() except it is used for
657: * reading opcodes. In case of system with memory mapped I/O,
658: * this function can be used to greatly speed up emulation
659: ***************************************************************/
660: #if Z80_VM
661: INLINE UINT8 ROP(void)
662: {
663: unsigned pc = Z80.bank[_PCD >> 13] + (_PCD & 0x1fff);
664: _PC++;
665: return cpu_readop(pc);
666: }
667: #else
668: INLINE UINT8 ROP(void)
669: {
670: unsigned pc = _PCD;
671: _PC++;
672: return cpu_readop(pc);
673: }
674: #endif
675:
676: /****************************************************************
677: * ARG() is identical to ROP() except it is used
678: * for reading opcode arguments. This difference can be used to
679: * support systems that use different encoding mechanisms for
680: * opcodes and opcode arguments
681: ***************************************************************/
682: #if Z80_VM
683: INLINE UINT8 ARG(void)
684: {
685: unsigned pc = Z80.bank[_PCD >> 13] + (_PCD & 0x1fff);
686: _PC++;
687: return cpu_readop_arg(pc);
688: }
689: #else
690: INLINE UINT8 ARG(void)
691: {
692: unsigned pc = _PCD;
693: _PC++;
694: return cpu_readop_arg(pc);
695: }
696: #endif
697:
698: #if Z80_VM
699: INLINE UINT32 ARG16(void)
700: {
701: UINT32 result = ARG();
702: result |= ARG() << 8;
703: return result;
704: }
705: #else
706: INLINE UINT32 ARG16(void)
707: {
708: unsigned pc = _PCD;
709: _PC += 2;
710: return cpu_readop_arg(pc) | (cpu_readop_arg((pc+1)&0xffff) << 8);
711: }
712: #endif
713:
714: /***************************************************************
715: * Calculate the effective address EA of an opcode using
716: * IX+offset resp. IY+offset addressing.
717: ***************************************************************/
718: #define EAX EA = (UINT32)(UINT16)(_IX+(INT8)ARG())
719: #define EAY EA = (UINT32)(UINT16)(_IY+(INT8)ARG())
720:
721: /***************************************************************
722: * POP
723: ***************************************************************/
724: #define POP(DR) { RM16( _SPD, &Z80.DR ); _SP += 2; }
725:
726: /***************************************************************
727: * PUSH
728: ***************************************************************/
729: #define PUSH(SR) { _SP -= 2; WM16( _SPD, &Z80.SR ); }
730:
731: /***************************************************************
732: * JP
733: ***************************************************************/
734: #if BUSY_LOOP_HACKS
735: #define JP { \
736: unsigned oldpc = _PCD-1; \
737: _PCD = ARG16(); \
738: /* speed up busy loop */ \
739: if( _PCD == oldpc ) \
740: { \
741: if( !after_EI ) \
742: BURNODD( z80_ICount, 1, 10 ); \
743: } \
744: else \
745: { \
746: UINT8 op = cpu_readop(_PCD); \
747: if( _PCD == oldpc-1 ) \
748: { \
749: /* NOP - JP $-1 or EI - JP $-1 */ \
750: if ( op == 0x00 || op == 0xfb ) \
751: { \
752: if( !after_EI ) \
753: BURNODD( z80_ICount-4, 2, 4+10 ); \
754: } \
755: } \
756: else \
757: /* LD SP,#xxxx - JP $-3 (Galaga) */ \
758: if( _PCD == oldpc-3 && op == 0x31 ) \
759: { \
760: if( !after_EI ) \
761: BURNODD( z80_ICount-10, 2, 10+10 ); \
762: } \
763: } \
764: change_pc16(_PCD); \
765: }
766: #else
767: #define JP { \
768: _PCD = ARG16(); \
769: change_pc16(_PCD); \
770: }
771: #endif
772:
773: /***************************************************************
774: * JP_COND
775: ***************************************************************/
776:
777: #define JP_COND(cond) \
778: if( cond ) \
779: { \
780: _PCD = ARG16(); \
781: change_pc16(_PCD); \
782: } \
783: else \
784: { \
785: _PC += 2; \
786: }
787:
788: /***************************************************************
789: * JR
790: ***************************************************************/
791: #define JR() \
792: { \
793: unsigned oldpc = _PCD-1; \
794: INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
795: _PC += arg; /* so don't do _PC += ARG() */ \
796: /* speed up busy loop */ \
797: if( _PCD == oldpc ) \
798: { \
799: if( !after_EI ) \
800: BURNODD( z80_ICount, 1, 12 ); \
801: } \
802: else \
803: { \
804: UINT8 op = cpu_readop(_PCD); \
805: if( _PCD == oldpc-1 ) \
806: { \
807: /* NOP - JR $-1 or EI - JR $-1 */ \
808: if ( op == 0x00 || op == 0xfb ) \
809: { \
810: if( !after_EI ) \
811: BURNODD( z80_ICount-4, 2, 4+12 ); \
812: } \
813: } \
814: else \
815: /* LD SP,#xxxx - JR $-3 */ \
816: if( _PCD == oldpc-3 && op == 0x31 ) \
817: { \
818: if( !after_EI ) \
819: BURNODD( z80_ICount-12, 2, 10+12 ); \
820: } \
821: } \
822: change_pc16(_PCD); \
823: }
824:
825: /***************************************************************
826: * JR_COND
827: ***************************************************************/
828: #define JR_COND(cond) \
829: if( cond ) \
830: { \
831: INT8 arg = (INT8)ARG(); /* ARG() also increments _PC */ \
832: _PC += arg; /* so don't do _PC += ARG() */ \
833: CY(5); \
834: change_pc16(_PCD); \
835: } \
836: else _PC++; \
837:
838: /***************************************************************
839: * CALL
840: ***************************************************************/
841: #define CALL(cond) \
842: if( cond ) \
843: { \
844: EA = ARG16(); \
845: PUSH( PC ); \
846: _PCD = EA; \
847: CY(7); \
848: change_pc16(_PCD); \
849: } \
850: else \
851: { \
852: _PC+=2; \
853: }
854:
855: /***************************************************************
856: * RET
857: ***************************************************************/
858: #define RET(cond) \
859: if( cond ) \
860: { \
861: POP(PC); \
862: change_pc16(_PCD); \
863: CY(6); \
864: }
865:
866: /***************************************************************
867: * RETN
868: ***************************************************************/
869: #define RETN { \
870: LOG((errorlog,"Z80#%d RETN IFF1:%d IFF2:%d\n", cpu_getactivecpu(), _IFF1, _IFF2)); \
871: RET(1); \
872: if( _IFF1 == 0 && _IFF2 == 1 ) \
873: { \
874: _IFF1 = 1; \
875: if( Z80.irq_state != CLEAR_LINE || \
876: Z80.request_irq >= 0 ) \
877: { \
878: LOG((errorlog, "Z80#%d RETN takes IRQ\n", \
879: cpu_getactivecpu())); \
880: take_interrupt(); \
881: } \
882: } \
883: else _IFF1 = _IFF2; \
884: }
885:
886: /***************************************************************
887: * RETI
888: ***************************************************************/
889: #define RETI { \
890: int device = Z80.service_irq; \
891: RET(1); \
892: /* according to http://www.msxnet.org/tech/Z80/z80undoc.txt */ \
893: /* _IFF1 = _IFF2; */ \
894: if( device >= 0 ) \
895: { \
896: LOG((errorlog,"Z80#%d RETI device %d: $%02x\n", \
897: cpu_getactivecpu(), device, Z80.irq[device].irq_param)); \
898: Z80.irq[device].interrupt_reti(Z80.irq[device].irq_param); \
899: } \
900: }
901:
902: /***************************************************************
903: * LD R,A
904: ***************************************************************/
905: #define LD_R_A { \
906: _R = _A; \
907: _R2 = _A & 0x80; /* keep bit 7 of R */ \
908: }
909:
910: /***************************************************************
911: * LD A,R
912: ***************************************************************/
913: #define LD_A_R { \
914: _A = (_R & 0x7f) | _R2; \
915: _F = (_F & CF) | SZ[_A] | ( _IFF2 << 2 ); \
916: }
917:
918: /***************************************************************
919: * LD I,A
920: ***************************************************************/
921: #define LD_I_A { \
922: _I = _A; \
923: }
924:
925: /***************************************************************
926: * LD A,I
927: ***************************************************************/
928: #define LD_A_I { \
929: _A = _I; \
930: _F = (_F & CF) | SZ[_A] | ( _IFF2 << 2 ); \
931: }
932:
933: /***************************************************************
934: * RST
935: ***************************************************************/
936: #define RST(addr) \
937: PUSH( PC ); \
938: _PCD = addr; \
939: change_pc16(_PCD)
940:
941: /***************************************************************
942: * INC r8
943: ***************************************************************/
944: INLINE UINT8 INC(UINT8 value)
945: {
946: UINT8 res = value + 1;
947: _F = (_F & CF) | SZHV_inc[res];
948: return (UINT8)res;
949: }
950:
951: /***************************************************************
952: * DEC r8
953: ***************************************************************/
954: INLINE UINT8 DEC(UINT8 value)
955: {
956: UINT8 res = value - 1;
957: _F = (_F & CF) | SZHV_dec[res];
958: return res;
959: }
960:
961: /***************************************************************
962: * RLCA
963: ***************************************************************/
964: #if Z80_EXACT
965: #define RLCA \
966: _A = (_A << 1) | (_A >> 7); \
967: _F = (_F & (SF | ZF | PF)) | (_A & (YF | XF | CF))
968: #else
969: #define RLCA \
970: _A = (_A << 1) | (_A >> 7); \
971: _F = (_F & (SF | ZF | YF | XF | PF)) | (_A & CF)
972: #endif
973:
974: /***************************************************************
975: * RRCA
976: ***************************************************************/
977: #if Z80_EXACT
978: #define RRCA \
979: _F = (_F & (SF | ZF | PF)) | (_A & (YF | XF | CF)); \
980: _A = (_A >> 1) | (_A << 7)
981: #else
982: #define RRCA \
983: _F = (_F & (SF | ZF | YF | XF | PF)) | (_A & CF); \
984: _A = (_A >> 1) | (_A << 7)
985: #endif
986:
987: /***************************************************************
988: * RLA
989: ***************************************************************/
990: #if Z80_EXACT
991: #define RLA { \
992: UINT8 res = (_A << 1) | (_F & CF); \
993: UINT8 c = (_A & 0x80) ? CF : 0; \
994: _F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
995: _A = res; \
996: }
997: #else
998: #define RLA { \
999: UINT8 res = (_A << 1) | (_F & CF); \
1000: UINT8 c = (_A & 0x80) ? CF : 0; \
1001: _F = (_F & (SF | ZF | YF | XF | PF)) | c; \
1002: _A = res; \
1003: }
1004: #endif
1005:
1006: /***************************************************************
1007: * RRA
1008: ***************************************************************/
1009: #if Z80_EXACT
1010: #define RRA { \
1011: UINT8 res = (_A >> 1) | (_F << 7); \
1012: UINT8 c = (_A & 0x01) ? CF : 0; \
1013: _F = (_F & (SF | ZF | PF)) | c | (res & (YF | XF)); \
1014: _A = res; \
1015: }
1016: #else
1017: #define RRA { \
1018: UINT8 res = (_A >> 1) | (_F << 7); \
1019: UINT8 c = (_A & 0x01) ? CF : 0; \
1020: _F = (_F & (SF | ZF | YF | XF | PF)) | c; \
1021: _A = res; \
1022: }
1023: #endif
1024:
1025: /***************************************************************
1026: * RRD
1027: ***************************************************************/
1028: #define RRD { \
1029: UINT8 n = RM(_HL); \
1030: WM( _HL, (n >> 4) | (_A << 4) ); \
1031: _A = (_A & 0xf0) | (n & 0x0f); \
1032: _F = (_F & CF) | SZP[_A]; \
1033: }
1034:
1035: /***************************************************************
1036: * RLD
1037: ***************************************************************/
1038: #define RLD { \
1039: UINT8 n = RM(_HL); \
1040: WM( _HL, (n << 4) | (_A & 0x0f) ); \
1041: _A = (_A & 0xf0) | (n >> 4); \
1042: _F = (_F & CF) | SZP[_A]; \
1043: }
1044:
1045: /***************************************************************
1046: * ADD A,n
1047: ***************************************************************/
1048: #ifdef X86_ASM
1049: #if Z80_EXACT
1050: #define ADD(value) \
1051: asm ( \
1052: " addb %2,%0 \n" \
1053: " lahf \n" \
1054: " setob %1 \n" /* al = 1 if overflow */ \
1055: " addb %1,%1 \n" \
1056: " addb %1,%1 \n" /* shift to P/V bit position */ \
1057: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1058: " orb %%ah,%1 \n" \
1059: " movb %0,%%ah \n" /* get result */ \
1060: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1061: " orb %%ah,%1 \n" /* put them into flags */ \
1062: :"=r" (_A), "=r" (_F) \
1063: :"r" (value), "1" (_F), "0" (_A) \
1064: )
1065: #else
1066: #define ADD(value) \
1067: asm ( \
1068: " addb %2,%0 \n" \
1069: " lahf \n" \
1070: " setob %1 \n" /* al = 1 if overflow */ \
1071: " addb %1,%1 \n" \
1072: " addb %1,%1 \n" /* shift to P/V bit position */ \
1073: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1074: " orb %%ah,%1 \n" \
1075: :"=r" (_A), "=r" (_F) \
1076: :"r" (value), "1" (_F), "0" (_A) \
1077: )
1078: #endif
1079: #else
1080: #if BIG_FLAGS_ARRAY
1081: #define ADD(value) \
1082: { \
1083: UINT32 ah = _AFD & 0xff00; \
1084: UINT32 res = (UINT8)((ah >> 8) + value); \
1085: _F = SZHVC_add[ah | res]; \
1086: _A = res; \
1087: }
1088: #else
1089: #define ADD(value) \
1090: { \
1091: unsigned val = value; \
1092: unsigned res = _A + val; \
1093: _F = SZ[(UINT8)res] | ((res >> 8) & CF) | \
1094: ((_A ^ res ^ val) & HF) | \
1095: (((val ^ _A ^ 0x80) & (val ^ res) & 0x80) >> 5); \
1096: _A = (UINT8)res; \
1097: }
1098: #endif
1099: #endif
1100:
1101: /***************************************************************
1102: * ADC A,n
1103: ***************************************************************/
1104: #ifdef X86_ASM
1105: #if Z80_EXACT
1106: #define ADC(value) \
1107: asm ( \
1108: " shrb $1,%1 \n" \
1109: " adcb %2,%0 \n" \
1110: " lahf \n" \
1111: " setob %1 \n" /* al = 1 if overflow */ \
1112: " addb %1,%1 \n" /* shift to P/V bit position */ \
1113: " addb %1,%1 \n" \
1114: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1115: " orb %%ah,%1 \n" /* combine with P/V */ \
1116: " movb %0,%%ah \n" /* get result */ \
1117: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1118: " orb %%ah,%1 \n" /* put them into flags */ \
1119: :"=r" (_A), "=r" (_F) \
1120: :"r" (value), "1" (_F), "0" (_A) \
1121: )
1122: #else
1123: #define ADC(value) \
1124: asm ( \
1125: " shrb $1,%1 \n" \
1126: " adcb %2,%0 \n" \
1127: " lahf \n" \
1128: " setob %1 \n" /* al = 1 if overflow */ \
1129: " addb %1,%1 \n" /* shift to P/V bit position */ \
1130: " addb %1,%1 \n" \
1131: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1132: " orb %%ah,%1 \n" /* combine with P/V */ \
1133: :"=r" (_A), "=r" (_F) \
1134: :"r" (value), "1" (_F), "0" (_A) \
1135: )
1136: #endif
1137: #else
1138: #if BIG_FLAGS_ARRAY
1139: #define ADC(value) \
1140: { \
1141: UINT32 ah = _AFD & 0xff00, c = _AFD & 1; \
1142: UINT32 res = (UINT8)((ah >> 8) + value + c); \
1143: _F = SZHVC_add[(c << 16) | ah | res]; \
1144: _A = res; \
1145: }
1146: #else
1147: #define ADC(value) \
1148: { \
1149: unsigned val = value; \
1150: unsigned res = _A + val + (_F & CF); \
1151: _F = SZ[res & 0xff] | ((res >> 8) & CF) | \
1152: ((_A ^ res ^ val) & HF) | \
1153: (((val ^ _A ^ 0x80) & (val ^ res) & 0x80) >> 5); \
1154: _A = res; \
1155: }
1156: #endif
1157: #endif
1158:
1159: /***************************************************************
1160: * SUB n
1161: ***************************************************************/
1162: #ifdef X86_ASM
1163: #if Z80_EXACT
1164: #define SUB(value) \
1165: asm ( \
1166: " subb %2,%0 \n" \
1167: " lahf \n" \
1168: " setob %1 \n" /* al = 1 if overflow */ \
1169: " stc \n" /* prepare to set N flag */ \
1170: " adcb %1,%1 \n" /* shift to P/V bit position */ \
1171: " addb %1,%1 \n" \
1172: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1173: " orb %%ah,%1 \n" /* combine with P/V */ \
1174: " movb %0,%%ah \n" /* get result */ \
1175: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1176: " orb %%ah,%1 \n" /* put them into flags */ \
1177: :"=r" (_A), "=r" (_F) \
1178: :"r" (value), "1" (_F), "0" (_A) \
1179: )
1180: #else
1181: #define SUB(value) \
1182: asm ( \
1183: " subb %2,%0 \n" \
1184: " lahf \n" \
1185: " setob %1 \n" /* al = 1 if overflow */ \
1186: " stc \n" /* prepare to set N flag */ \
1187: " adcb %1,%1 \n" /* shift to P/V bit position */ \
1188: " addb %1,%1 \n" \
1189: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1190: " orb %%ah,%1 \n" /* combine with P/V */ \
1191: :"=r" (_A), "=r" (_F) \
1192: :"r" (value), "1" (_F), "0" (_A) \
1193: )
1194: #endif
1195: #else
1196: #if BIG_FLAGS_ARRAY
1197: #define SUB(value) \
1198: { \
1199: UINT32 ah = _AFD & 0xff00; \
1200: UINT32 res = (UINT8)((ah >> 8) - value); \
1201: _F = SZHVC_sub[ah | res]; \
1202: _A = res; \
1203: }
1204: #else
1205: #define SUB(value) \
1206: { \
1207: unsigned val = value; \
1208: unsigned res = _A - val; \
1209: _F = SZ[res & 0xff] | ((res >> 8) & CF) | NF | \
1210: ((_A ^ res ^ val) & HF) | \
1211: (((val ^ _A) & (_A ^ res) & 0x80) >> 5); \
1212: _A = res; \
1213: }
1214: #endif
1215: #endif
1216:
1217: /***************************************************************
1218: * SBC A,n
1219: ***************************************************************/
1220: #ifdef X86_ASM
1221: #if Z80_EXACT
1222: #define SBC(value) \
1223: asm ( \
1224: " shrb $1,%1 \n" \
1225: " sbbb %2,%0 \n" \
1226: " lahf \n" \
1227: " setob %1 \n" /* al = 1 if overflow */ \
1228: " stc \n" /* prepare to set N flag */ \
1229: " adcb %1,%1 \n" /* shift to P/V bit position */ \
1230: " addb %1,%1 \n" \
1231: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1232: " orb %%ah,%1 \n" /* combine with P/V */ \
1233: " movb %0,%%ah \n" /* get result */ \
1234: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1235: " orb %%ah,%1 \n" /* put them into flags */ \
1236: :"=r" (_A), "=r" (_F) \
1237: :"r" (value), "1" (_F), "0" (_A) \
1238: )
1239: #else
1240: #define SBC(value) \
1241: asm ( \
1242: " shrb $1,%1 \n" \
1243: " sbbb %2,%0 \n" \
1244: " lahf \n" \
1245: " setob %1 \n" /* al = 1 if overflow */ \
1246: " stc \n" /* prepare to set N flag */ \
1247: " adcb %1,%1 \n" /* shift to P/V bit position */ \
1248: " addb %1,%1 \n" \
1249: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1250: " orb %%ah,%1 \n" /* combine with P/V */ \
1251: :"=r" (_A), "=r" (_F) \
1252: :"r" (value), "1" (_F), "0" (_A) \
1253: )
1254: #endif
1255: #else
1256: #if BIG_FLAGS_ARRAY
1257: #define SBC(value) \
1258: { \
1259: UINT32 ah = _AFD & 0xff00, c = _AFD & 1; \
1260: UINT32 res = (UINT8)((ah >> 8) - value - c); \
1261: _F = SZHVC_sub[(c<<16) | ah | res]; \
1262: _A = res; \
1263: }
1264: #else
1265: #define SBC(value) \
1266: { \
1267: unsigned val = value; \
1268: unsigned res = _A - val - (_F & CF); \
1269: _F = SZ[res & 0xff] | ((res >> 8) & CF) | NF | \
1270: ((_A ^ res ^ val) & HF) | \
1271: (((val ^ _A) & (_A ^ res) & 0x80) >> 5); \
1272: _A = res; \
1273: }
1274: #endif
1275: #endif
1276:
1277: /***************************************************************
1278: * NEG
1279: ***************************************************************/
1280: #define NEG { \
1281: UINT8 value = _A; \
1282: _A = 0; \
1283: SUB(value); \
1284: }
1285:
1286: /***************************************************************
1287: * DAA
1288: ***************************************************************/
1289: #define DAA { \
1290: int idx = _A; \
1291: if( _F & CF ) idx |= 0x100; \
1292: if( _F & HF ) idx |= 0x200; \
1293: if( _F & NF ) idx |= 0x400; \
1294: _AF = DAATable[idx]; \
1295: }
1296:
1297: /***************************************************************
1298: * AND n
1299: ***************************************************************/
1300: #define AND(value) \
1301: _A &= value; \
1302: _F = SZP[_A] | HF
1303:
1304: /***************************************************************
1305: * OR n
1306: ***************************************************************/
1307: #define OR(value) \
1308: _A |= value; \
1309: _F = SZP[_A]
1310:
1311: /***************************************************************
1312: * XOR n
1313: ***************************************************************/
1314: #define XOR(value) \
1315: _A ^= value; \
1316: _F = SZP[_A]
1317:
1318: /***************************************************************
1319: * CP n
1320: ***************************************************************/
1321: #ifdef X86_ASM
1322: #if Z80_EXACT
1323: #define CP(value) \
1324: asm ( \
1325: " cmpb %2,%0 \n" \
1326: " lahf \n" \
1327: " setob %1 \n" /* al = 1 if overflow */ \
1328: " stc \n" /* prepare to set N flag */ \
1329: " adcb %1,%1 \n" /* shift to P/V bit position */ \
1330: " addb %1,%1 \n" \
1331: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1332: " orb %%ah,%1 \n" /* combine with P/V */ \
1333: " movb %2,%%ah \n" /* get result */ \
1334: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1335: " orb %%ah,%1 \n" /* put them into flags */ \
1336: :"=r" (_A), "=r" (_F) \
1337: :"r" (value), "1" (_F), "0" (_A) \
1338: )
1339: #else
1340: #define CP(value) \
1341: asm ( \
1342: " cmpb %2,%0 \n" \
1343: " lahf \n" \
1344: " setob %1 \n" /* al = 1 if overflow */ \
1345: " stc \n" /* prepare to set N flag */ \
1346: " adcb %1,%1 \n" /* shift to P/V bit position */ \
1347: " addb %1,%1 \n" \
1348: " andb $0xd1,%%ah \n" /* sign, zero, half carry, carry */ \
1349: " orb %%ah,%1 \n" /* combine with P/V */ \
1350: :"=r" (_A), "=r" (_F) \
1351: :"r" (value), "1" (_F), "0" (_A) \
1352: )
1353: #endif
1354: #else
1355: #if BIG_FLAGS_ARRAY
1356: #define CP(value) \
1357: { \
1358: UINT32 ah = _AFD & 0xff00; \
1359: UINT32 res = (UINT8)((ah >> 8) - value); \
1360: _F = SZHVC_sub[ah | res]; \
1361: }
1362: #else
1363: #define CP(value) \
1364: { \
1365: unsigned val = value; \
1366: unsigned res = _A - val; \
1367: _F = SZ[res & 0xff] | ((res >> 8) & CF) | NF | \
1368: ((_A ^ res ^ val) & HF) | \
1369: ((((val ^ _A) & (_A ^ res)) >> 5) & VF); \
1370: }
1371: #endif
1372: #endif
1373:
1374: /***************************************************************
1375: * EX AF,AF'
1376: ***************************************************************/
1377: #define EX_AF { \
1378: PAIR tmp; \
1379: tmp = Z80.AF; Z80.AF = Z80.AF2; Z80.AF2 = tmp; \
1380: }
1381:
1382: /***************************************************************
1383: * EX DE,HL
1384: ***************************************************************/
1385: #define EX_DE_HL { \
1386: PAIR tmp; \
1387: tmp = Z80.DE; Z80.DE = Z80.HL; Z80.HL = tmp; \
1388: }
1389:
1390: /***************************************************************
1391: * EXX
1392: ***************************************************************/
1393: #define EXX { \
1394: PAIR tmp; \
1395: tmp = Z80.BC; Z80.BC = Z80.BC2; Z80.BC2 = tmp; \
1396: tmp = Z80.DE; Z80.DE = Z80.DE2; Z80.DE2 = tmp; \
1397: tmp = Z80.HL; Z80.HL = Z80.HL2; Z80.HL2 = tmp; \
1398: }
1399:
1400: /***************************************************************
1401: * EX (SP),r16
1402: ***************************************************************/
1403: #define EXSP(DR) \
1404: { \
1405: PAIR tmp = { { 0, 0, 0, 0 } }; \
1406: RM16( _SPD, &tmp ); \
1407: WM16( _SPD, &Z80.DR ); \
1408: Z80.DR = tmp; \
1409: }
1410:
1411:
1412: /***************************************************************
1413: * ADD16
1414: ***************************************************************/
1415: #ifdef X86_ASM
1416: #if Z80_EXACT
1417: #define ADD16(DR,SR) \
1418: asm ( \
1419: " andb $0xc4,%1 \n" \
1420: " addb %%dl,%%cl \n" \
1421: " adcb %%dh,%%ch \n" \
1422: " lahf \n" \
1423: " andb $0x11,%%ah \n" \
1424: " orb %%ah,%1 \n" \
1425: " movb %%ch,%%ah \n" /* get result MSB */ \
1426: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1427: " orb %%ah,%1 \n" /* put them into flags */ \
1428: :"=c" (Z80.DR.d), "=r" (_F) \
1429: :"0" (Z80.DR.d), "1" (_F), "d" (Z80.SR.d) \
1430: )
1431: #else
1432: #define ADD16(DR,SR) \
1433: asm ( \
1434: " andb $0xc4,%1 \n" \
1435: " addb %%dl,%%cl \n" \
1436: " adcb %%dh,%%ch \n" \
1437: " lahf \n" \
1438: " andb $0x11,%%ah \n" \
1439: " orb %%ah,%1 \n" \
1440: :"=c" (Z80.DR.d), "=r" (_F) \
1441: :"0" (Z80.DR.d), "1" (_F), "d" (Z80.SR.d) \
1442: )
1443: #endif
1444: #else
1445: #define ADD16(DR,SR) \
1446: { \
1447: UINT32 res = Z80.DR.d + Z80.SR.d; \
1448: _F = (_F & (SF | ZF | VF)) | \
1449: (((Z80.DR.d ^ res ^ Z80.SR.d) >> 8) & HF) | \
1450: ((res >> 16) & CF); \
1451: Z80.DR.w.l = (UINT16)res; \
1452: }
1453: #endif
1454:
1455: /***************************************************************
1456: * ADC r16,r16
1457: ***************************************************************/
1458: #ifdef X86_ASM
1459: #if Z80_EXACT
1460: #define ADC16(Reg) \
1461: asm ( \
1462: " shrb $1,%1 \n" \
1463: " adcb %%dl,%%cl \n" \
1464: " lahf \n" \
1465: " movb %%ah,%%dl \n" \
1466: " adcb %%dh,%%ch \n" \
1467: " lahf \n" \
1468: " setob %1 \n" \
1469: " orb $0xbf,%%dl \n" /* set all but zero */ \
1470: " addb %1,%1 \n" \
1471: " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1472: " addb %1,%1 \n" \
1473: " orb %%ah,%1 \n" /* overflow into P/V */ \
1474: " andb %%dl,%1 \n" /* mask zero */ \
1475: " movb %%ch,%%ah \n" /* get result MSB */ \
1476: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1477: " orb %%ah,%1 \n" /* put them into flags */ \
1478: :"=c" (_HLD), "=r" (_F) \
1479: :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1480: )
1481: #else
1482: #define ADC16(Reg) \
1483: asm ( \
1484: " shrb $1,%1 \n" \
1485: " adcb %%dl,%%cl \n" \
1486: " lahf \n" \
1487: " movb %%ah,%%dl \n" \
1488: " adcb %%dh,%%ch \n" \
1489: " lahf \n" \
1490: " setob %1 \n" \
1491: " orb $0xbf,%%dl \n" /* set all but zero */ \
1492: " addb %1,%1 \n" \
1493: " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1494: " addb %1,%1 \n" \
1495: " orb %%ah,%1 \n" /* overflow into P/V */ \
1496: " andb %%dl,%1 \n" /* mask zero */ \
1497: :"=c" (_HLD), "=r" (_F) \
1498: :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1499: )
1500: #endif
1501: #else
1502: #define ADC16(Reg) \
1503: { \
1504: UINT32 res = _HLD + Z80.Reg.d + (_F & CF); \
1505: _F = (((_HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | \
1506: ((res >> 16) & CF) | \
1507: ((res >> 8) & SF) | \
1508: ((res & 0xffff) ? 0 : ZF) | \
1509: (((Z80.Reg.d ^ _HLD ^ 0x8000) & (Z80.Reg.d ^ res) & 0x8000) >> 13); \
1510: _HL = (UINT16)res; \
1511: }
1512: #endif
1513:
1514: /***************************************************************
1515: * SBC r16,r16
1516: ***************************************************************/
1517: #ifdef X86_ASM
1518: #if Z80_EXACT
1519: #define SBC16(Reg) \
1520: asm ( \
1521: " shrb $1,%1 \n" \
1522: " sbbb %%dl,%%cl \n" \
1523: " lahf \n" \
1524: " movb %%ah,%%dl \n" \
1525: " sbbb %%dh,%%ch \n" \
1526: " lahf \n" \
1527: " setob %1 \n" \
1528: " orb $0xbf,%%dl \n" /* set all but zero */ \
1529: " stc \n" \
1530: " adcb %1,%1 \n" \
1531: " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1532: " addb %1,%1 \n" \
1533: " orb %%ah,%1 \n" /* overflow into P/V */ \
1534: " andb %%dl,%1 \n" /* mask zero */ \
1535: " movb %%ch,%%ah \n" /* get result MSB */ \
1536: " andb $0x28,%%ah \n" /* maks flags 5+3 */ \
1537: " orb %%ah,%1 \n" /* put them into flags */ \
1538: :"=c" (_HLD), "=r" (_F) \
1539: :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1540: )
1541: #else
1542: #define SBC16(Reg) \
1543: asm ( \
1544: " shrb $1,%1 \n" \
1545: " sbbb %%dl,%%cl \n" \
1546: " lahf \n" \
1547: " movb %%ah,%%dl \n" \
1548: " sbbb %%dh,%%ch \n" \
1549: " lahf \n" \
1550: " setob %1 \n" \
1551: " orb $0xbf,%%dl \n" /* set all but zero */ \
1552: " stc \n" \
1553: " adcb %1,%1 \n" \
1554: " andb $0xd1,%%ah \n" /* sign,zero,half carry and carry */\
1555: " addb %1,%1 \n" \
1556: " orb %%ah,%1 \n" /* overflow into P/V */ \
1557: " andb %%dl,%1 \n" /* mask zero */ \
1558: :"=c" (_HLD), "=r" (_F) \
1559: :"0" (_HLD), "1" (_F), "d" (Z80.Reg.d) \
1560: )
1561: #endif
1562: #else
1563: #define SBC16(Reg) \
1564: { \
1565: UINT32 res = _HLD - Z80.Reg.d - (_F & CF); \
1566: _F = (((_HLD ^ res ^ Z80.Reg.d) >> 8) & HF) | NF | \
1567: ((res >> 16) & CF) | \
1568: ((res >> 8) & SF) | \
1569: ((res & 0xffff) ? 0 : ZF) | \
1570: (((Z80.Reg.d ^ _HLD) & (_HLD ^ res) &0x8000) >> 13); \
1571: _HL = (UINT16)res; \
1572: }
1573: #endif
1574:
1575: /***************************************************************
1576: * RLC r8
1577: ***************************************************************/
1578: INLINE UINT8 RLC(UINT8 value)
1579: {
1580: unsigned res = value;
1581: unsigned c = (res & 0x80) ? CF : 0;
1582: res = ((res << 1) | (res >> 7)) & 0xff;
1583: _F = SZP[res] | c;
1584: return res;
1585: }
1586:
1587: /***************************************************************
1588: * RRC r8
1589: ***************************************************************/
1590: INLINE UINT8 RRC(UINT8 value)
1591: {
1592: unsigned res = value;
1593: unsigned c = (res & 0x01) ? CF : 0;
1594: res = ((res >> 1) | (res << 7)) & 0xff;
1595: _F = SZP[res] | c;
1596: return res;
1597: }
1598:
1599: /***************************************************************
1600: * RL r8
1601: ***************************************************************/
1602: INLINE UINT8 RL(UINT8 value)
1603: {
1604: unsigned res = value;
1605: unsigned c = (res & 0x80) ? CF : 0;
1606: res = ((res << 1) | (_F & CF)) & 0xff;
1607: _F = SZP[res] | c;
1608: return res;
1609: }
1610:
1611: /***************************************************************
1612: * RR r8
1613: ***************************************************************/
1614: INLINE UINT8 RR(UINT8 value)
1615: {
1616: unsigned res = value;
1617: unsigned c = (res & 0x01) ? CF : 0;
1618: res = ((res >> 1) | (_F << 7)) & 0xff;
1619: _F = SZP[res] | c;
1620: return res;
1621: }
1622:
1623: /***************************************************************
1624: * SLA r8
1625: ***************************************************************/
1626: INLINE UINT8 SLA(UINT8 value)
1627: {
1628: unsigned res = value;
1629: unsigned c = (res & 0x80) ? CF : 0;
1630: res = (res << 1) & 0xff;
1631: _F = SZP[res] | c;
1632: return res;
1633: }
1634:
1635: /***************************************************************
1636: * SRA r8
1637: ***************************************************************/
1638: INLINE UINT8 SRA(UINT8 value)
1639: {
1640: unsigned res = value;
1641: unsigned c = (res & 0x01) ? CF : 0;
1642: res = ((res >> 1) | (res & 0x80)) & 0xff;
1643: _F = SZP[res] | c;
1644: return res;
1645: }
1646:
1647: /***************************************************************
1648: * SLL r8
1649: ***************************************************************/
1650: INLINE UINT8 SLL(UINT8 value)
1651: {
1652: unsigned res = value;
1653: unsigned c = (res & 0x80) ? CF : 0;
1654: res = ((res << 1) | 0x01) & 0xff;
1655: _F = SZP[res] | c;
1656: return res;
1657: }
1658:
1659: /***************************************************************
1660: * SRL r8
1661: ***************************************************************/
1662: INLINE UINT8 SRL(UINT8 value)
1663: {
1664: unsigned res = value;
1665: unsigned c = (res & 0x01) ? CF : 0;
1666: res = (res >> 1) & 0xff;
1667: _F = SZP[res] | c;
1668: return res;
1669: }
1670:
1671: /***************************************************************
1672: * BIT bit,r8
1673: ***************************************************************/
1674: #define BIT(bit,reg) \
1675: _F = (_F & CF) | HF | SZ_BIT[reg & (1<<bit)]
1676:
1677: /***************************************************************
1678: * BIT bit,(IX/Y+o)
1679: ***************************************************************/
1680: #if Z80_EXACT
1681: #define BIT_XY(bit,reg) \
1682: _F = (_F & CF) | HF | (SZ_BIT[reg & (1<<bit)] & ~(YF|XF)) | ((EA>>8) & (YF|XF))
1683: #else
1684: #define BIT_XY BIT
1685: #endif
1686:
1687: /***************************************************************
1688: * RES bit,r8
1689: ***************************************************************/
1690: INLINE UINT8 RES(UINT8 bit, UINT8 value)
1691: {
1692: return value & ~(1<<bit);
1693: }
1694:
1695: /***************************************************************
1696: * SET bit,r8
1697: ***************************************************************/
1698: INLINE UINT8 SET(UINT8 bit, UINT8 value)
1699: {
1700: return value | (1<<bit);
1701: }
1702:
1703: /***************************************************************
1704: * LDI
1705: ***************************************************************/
1706: #if Z80_EXACT
1707: #define LDI { \
1708: UINT8 io = RM(_HL); \
1709: WM( _DE, io ); \
1710: _F &= SF | ZF | CF; \
1711: if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1712: if( (_A + io) & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1713: _HL++; _DE++; _BC--; \
1714: if( _BC ) _F |= VF; \
1715: }
1716: #else
1717: #define LDI { \
1718: WM( _DE, RM(_HL) ); \
1719: _F &= SF | ZF | YF | XF | CF; \
1720: _HL++; _DE++; _BC--; \
1721: if( _BC ) _F |= VF; \
1722: }
1723: #endif
1724:
1725: /***************************************************************
1726: * CPI
1727: ***************************************************************/
1728: #if Z80_EXACT
1729: #define CPI { \
1730: UINT8 val = RM(_HL); \
1731: UINT8 res = _A - val; \
1732: _HL++; _BC--; \
1733: _F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF; \
1734: if( _F & HF ) res -= 1; \
1735: if( res & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1736: if( res & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1737: if( _BC ) _F |= VF; \
1738: }
1739: #else
1740: #define CPI { \
1741: UINT8 val = RM(_HL); \
1742: UINT8 res = _A - val; \
1743: _HL++; _BC--; \
1744: _F = (_F & CF) | SZ[res] | ((_A ^ val ^ res) & HF) | NF; \
1745: if( _BC ) _F |= VF; \
1746: }
1747: #endif
1748:
1749: /***************************************************************
1750: * INI
1751: ***************************************************************/
1752: #if Z80_EXACT
1753: #define INI { \
1754: UINT8 io = IN(_BC); \
1755: _B--; \
1756: WM( _HL, io ); \
1757: _HL++; \
1758: _F = SZ[_B]; \
1759: if( io & SF ) _F |= NF; \
1760: if( (_C + io + 1) & 0x100 ) _F |= HF | CF; \
1761: if( (irep_tmp1[_C & 3][io & 3] ^ \
1762: breg_tmp2[_B] ^ \
1763: (_C >> 2) ^ \
1764: (io >> 2)) & 1 ) \
1765: _F |= PF; \
1766: }
1767: #else
1768: #define INI { \
1769: _B--; \
1770: WM( _HL, IN(_BC) ); \
1771: _HL++; \
1772: _F = (_B) ? NF : NF | ZF; \
1773: }
1774: #endif
1775:
1776: /***************************************************************
1777: * OUTI
1778: ***************************************************************/
1779: #if Z80_EXACT
1780: #define OUTI { \
1781: UINT8 io = RM(_HL); \
1782: OUT( _BC, io ); \
1783: _B--; \
1784: _HL++; \
1785: _F = SZ[_B]; \
1786: if( io & SF ) _F |= NF; \
1787: if( (_C + io + 1) & 0x100 ) _F |= HF | CF; \
1788: if( (irep_tmp1[_C & 3][io & 3] ^ \
1789: breg_tmp2[_B] ^ \
1790: (_C >> 2) ^ \
1791: (io >> 2)) & 1 ) \
1792: _F |= PF; \
1793: }
1794: #else
1795: #define OUTI { \
1796: OUT( _BC, RM(_HL) ); \
1797: _B--; \
1798: _HL++; \
1799: _F = (_B) ? NF : NF | ZF; \
1800: }
1801: #endif
1802:
1803: /***************************************************************
1804: * LDD
1805: ***************************************************************/
1806: #if Z80_EXACT
1807: #define LDD { \
1808: UINT8 io = RM(_HL); \
1809: WM( _DE, io ); \
1810: _F &= SF | ZF | CF; \
1811: if( (_A + io) & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1812: if( (_A + io) & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1813: _HL--; _DE--; _BC--; \
1814: if( _BC ) _F |= VF; \
1815: }
1816: #else
1817: #define LDD { \
1818: WM( _DE, RM(_HL) ); \
1819: _F &= SF | ZF | YF | XF | CF; \
1820: _HL--; _DE--; _BC--; \
1821: if( _BC ) _F |= VF; \
1822: }
1823: #endif
1824:
1825: /***************************************************************
1826: * CPD
1827: ***************************************************************/
1828: #if Z80_EXACT
1829: #define CPD { \
1830: UINT8 val = RM(_HL); \
1831: UINT8 res = _A - val; \
1832: _HL--; _BC--; \
1833: _F = (_F & CF) | (SZ[res] & ~(YF|XF)) | ((_A ^ val ^ res) & HF) | NF; \
1834: if( _F & HF ) res -= 1; \
1835: if( res & 0x02 ) _F |= YF; /* bit 1 -> flag 5 */ \
1836: if( res & 0x08 ) _F |= XF; /* bit 3 -> flag 3 */ \
1837: if( _BC ) _F |= VF; \
1838: }
1839: #else
1840: #define CPD { \
1841: UINT8 val = RM(_HL); \
1842: UINT8 res = _A - val; \
1843: _HL--; _BC--; \
1844: _F = (_F & CF) | SZ[res] | ((_A ^ val ^ res) & HF) | NF; \
1845: if( _BC ) _F |= VF; \
1846: }
1847: #endif
1848:
1849: /***************************************************************
1850: * IND
1851: ***************************************************************/
1852: #if Z80_EXACT
1853: #define IND { \
1854: UINT8 io = IN(_BC); \
1855: _B--; \
1856: WM( _HL, io ); \
1857: _HL--; \
1858: _F = SZ[_B]; \
1859: if( io & SF ) _F |= NF; \
1860: if( (_C + io - 1) & 0x100 ) _F |= HF | CF; \
1861: if( (drep_tmp1[_C & 3][io & 3] ^ \
1862: breg_tmp2[_B] ^ \
1863: (_C >> 2) ^ \
1864: (io >> 2)) & 1 ) \
1865: _F |= PF; \
1866: }
1867: #else
1868: #define IND { \
1869: _B--; \
1870: WM( _HL, IN(_BC) ); \
1871: _HL--; \
1872: _F = (_B) ? NF : NF | ZF; \
1873: }
1874: #endif
1875:
1876: /***************************************************************
1877: * OUTD
1878: ***************************************************************/
1879: #if Z80_EXACT
1880: #define OUTD { \
1881: UINT8 io = RM(_HL); \
1882: OUT( _BC, io ); \
1883: _B--; \
1884: _HL--; \
1885: _F = SZ[_B]; \
1886: if( io & SF ) _F |= NF; \
1887: if( (_C + io - 1) & 0x100 ) _F |= HF | CF; \
1888: if( (drep_tmp1[_C & 3][io & 3] ^ \
1889: breg_tmp2[_B] ^ \
1890: (_C >> 2) ^ \
1891: (io >> 2)) & 1 ) \
1892: _F |= PF; \
1893: }
1894: #else
1895: #define OUTD { \
1896: OUT( _BC, RM(_HL) ); \
1897: _B--; \
1898: _HL--; \
1899: _F = (_B) ? NF : NF | ZF; \
1900: }
1901: #endif
1902:
1903: /***************************************************************
1904: * LDIR
1905: ***************************************************************/
1906: #if REPEAT_AT_ONCE
1907: #define LDIR { \
1908: CY(5); \
1909: _PC -= 2; \
1910: do \
1911: { \
1912: LDI; \
1913: if( _BC ) \
1914: { \
1915: if( z80_ICount > 0 ) \
1916: { \
1917: _R += 2; /* increment R twice */ \
1918: CY(21); \
1919: } \
1920: else break; \
1921: } \
1922: else \
1923: { \
1924: _PC += 2; \
1925: z80_ICount += 5; \
1926: break; \
1927: } \
1928: } while( z80_ICount > 0 ); \
1929: }
1930: #else
1931: #define LDIR LDI; if( _BC ) { _PC -= 2; CY(5); }
1932: #endif
1933:
1934: /***************************************************************
1935: * CPIR
1936: ***************************************************************/
1937: #if REPEAT_AT_ONCE
1938: #define CPIR { \
1939: CY(5); \
1940: _PC -= 2; \
1941: do \
1942: { \
1943: CPI; \
1944: if( _BC && !(_F & ZF) ) \
1945: { \
1946: if( z80_ICount > 0 ) \
1947: { \
1948: _R += 2; /* increment R twice */ \
1949: CY(21); \
1950: } \
1951: else break; \
1952: } \
1953: else \
1954: { \
1955: _PC += 2; \
1956: z80_ICount += 5; \
1957: break; \
1958: } \
1959: } while( z80_ICount > 0 ); \
1960: }
1961: #else
1962: #define CPIR CPI; if( _BC && !(_F & ZF) ) { _PC -= 2; CY(5); }
1963: #endif
1964:
1965: /***************************************************************
1966: * INIR
1967: ***************************************************************/
1968: #if REPEAT_AT_ONCE
1969: #define INIR { \
1970: CY(5); \
1971: _PC -= 2; \
1972: do \
1973: { \
1974: INI; \
1975: if( _B ) \
1976: { \
1977: if( z80_ICount > 0 ) \
1978: { \
1979: _R += 2; /* increment R twice */ \
1980: CY(21); \
1981: } \
1982: else break; \
1983: } \
1984: else \
1985: { \
1986: _PC += 2; \
1987: z80_ICount += 5; \
1988: break; \
1989: } \
1990: } while( z80_ICount > 0 ); \
1991: }
1992: #else
1993: #define INIR INI; if( _B ) { _PC -= 2; CY(5); }
1994: #endif
1995:
1996: /***************************************************************
1997: * OTIR
1998: ***************************************************************/
1999: #if REPEAT_AT_ONCE
2000: #define OTIR { \
2001: CY(5); \
2002: _PC -= 2; \
2003: do \
2004: { \
2005: OUTI; \
2006: if( _B ) \
2007: { \
2008: if( z80_ICount > 0 ) \
2009: { \
2010: _R += 2; /* increment R twice */ \
2011: CY(21); \
2012: } \
2013: else break; \
2014: } \
2015: else \
2016: { \
2017: _PC += 2; \
2018: z80_ICount += 5; \
2019: break; \
2020: } \
2021: } while( z80_ICount > 0 ); \
2022: }
2023: #else
2024: #define OTIR OUTI; if( _B ) { _PC -= 2; CY(5); }
2025: #endif
2026:
2027: /***************************************************************
2028: * LDDR
2029: ***************************************************************/
2030: #if REPEAT_AT_ONCE
2031: #define LDDR { \
2032: CY(5); \
2033: _PC -= 2; \
2034: do \
2035: { \
2036: LDD; \
2037: if( _BC ) \
2038: { \
2039: if( z80_ICount > 0 ) \
2040: { \
2041: _R += 2; /* increment R twice */ \
2042: CY(21); \
2043: } \
2044: else break; \
2045: } \
2046: else \
2047: { \
2048: _PC += 2; \
2049: z80_ICount += 5; \
2050: break; \
2051: } \
2052: } while( z80_ICount > 0 ); \
2053: }
2054: #else
2055: #define LDDR LDD; if( _BC ) { _PC -= 2; CY(5); }
2056: #endif
2057:
2058: /***************************************************************
2059: * CPDR
2060: ***************************************************************/
2061: #if REPEAT_AT_ONCE
2062: #define CPDR { \
2063: CY(5); \
2064: _PC -= 2; \
2065: do \
2066: { \
2067: CPD; \
2068: if( _BC && !(_F & ZF) ) \
2069: { \
2070: if( z80_ICount > 0 ) \
2071: { \
2072: _R += 2; /* increment R twice */ \
2073: CY(21); \
2074: } \
2075: else break; \
2076: } \
2077: else \
2078: { \
2079: _PC += 2; \
2080: z80_ICount += 5; \
2081: break; \
2082: } \
2083: } while( z80_ICount > 0 ); \
2084: }
2085: #else
2086: #define CPDR CPD; if( _BC && !(_F & ZF) ) { _PC -= 2; CY(5); }
2087: #endif
2088:
2089: /***************************************************************
2090: * INDR
2091: ***************************************************************/
2092: #if REPEAT_AT_ONCE
2093: #define INDR { \
2094: CY(5); \
2095: _PC -= 2; \
2096: do \
2097: { \
2098: IND; \
2099: if( _B ) \
2100: { \
2101: if( z80_ICount > 0 ) \
2102: { \
2103: _R += 2; /* increment R twice */ \
2104: CY(21); \
2105: } \
2106: else break; \
2107: } \
2108: else \
2109: { \
2110: _PC += 2; \
2111: z80_ICount += 5; \
2112: break; \
2113: } \
2114: } while( z80_ICount > 0 ); \
2115: }
2116: #else
2117: #define INDR IND; if( _B ) { _PC -= 2; CY(5); }
2118: #endif
2119:
2120: /***************************************************************
2121: * OTDR
2122: ***************************************************************/
2123: #if REPEAT_AT_ONCE
2124: #define OTDR { \
2125: CY(5); \
2126: _PC -= 2; \
2127: do \
2128: { \
2129: OUTD; \
2130: if( _B ) \
2131: { \
2132: if( z80_ICount > 0 ) \
2133: { \
2134: _R += 2; /* increment R twice */ \
2135: CY(21); \
2136: } \
2137: else break; \
2138: } \
2139: else \
2140: { \
2141: _PC += 2; \
2142: z80_ICount += 5; \
2143: break; \
2144: } \
2145: } while( z80_ICount > 0 ); \
2146: }
2147: #else
2148: #define OTDR OUTD; if( _B ) { _PC -= 2; CY(5); }
2149: #endif
2150:
2151: /***************************************************************
2152: * EI
2153: ***************************************************************/
2154: #define EI { \
2155: /* If interrupts were disabled, execute one more \
2156: * instruction and check the IRQ line. \
2157: * If not, simply set interrupt flip-flop 2 \
2158: */ \
2159: if( _IFF1 == 0 ) \
2160: { \
2161: _IFF1 = _IFF2 = 1; \
2162: _PPC = _PCD; \
2163: CALL_MAME_DEBUG; \
2164: _R++; \
2165: if( Z80.irq_state != CLEAR_LINE || \
2166: Z80.request_irq >= 0 ) \
2167: { \
2168: after_EI = 1; /* avoid cycle skip hacks */ \
2169: EXEC(op,ROP()); \
2170: after_EI = 0; \
2171: LOG((errorlog, "Z80#%d EI takes irq\n", cpu_getactivecpu())); \
2172: take_interrupt(); \
2173: } \
2174: else EXEC(op,ROP()); \
2175: } else _IFF2 = 1; \
2176: }
2177:
2178: /**********************************************************
2179: * opcodes with CB prefix
2180: * rotate, shift and bit operations
2181: **********************************************************/
2182: OP(cb,00) { _B = RLC(_B); } /* RLC B */
2183: OP(cb,01) { _C = RLC(_C); } /* RLC C */
2184: OP(cb,02) { _D = RLC(_D); } /* RLC D */
2185: OP(cb,03) { _E = RLC(_E); } /* RLC E */
2186: OP(cb,04) { _H = RLC(_H); } /* RLC H */
2187: OP(cb,05) { _L = RLC(_L); } /* RLC L */
2188: OP(cb,06) { WM( _HL, RLC(RM(_HL)) ); } /* RLC (HL) */
2189: OP(cb,07) { _A = RLC(_A); } /* RLC A */
2190:
2191: OP(cb,08) { _B = RRC(_B); } /* RRC B */
2192: OP(cb,09) { _C = RRC(_C); } /* RRC C */
2193: OP(cb,0a) { _D = RRC(_D); } /* RRC D */
2194: OP(cb,0b) { _E = RRC(_E); } /* RRC E */
2195: OP(cb,0c) { _H = RRC(_H); } /* RRC H */
2196: OP(cb,0d) { _L = RRC(_L); } /* RRC L */
2197: OP(cb,0e) { WM( _HL, RRC(RM(_HL)) ); } /* RRC (HL) */
2198: OP(cb,0f) { _A = RRC(_A); } /* RRC A */
2199:
2200: OP(cb,10) { _B = RL(_B); } /* RL B */
2201: OP(cb,11) { _C = RL(_C); } /* RL C */
2202: OP(cb,12) { _D = RL(_D); } /* RL D */
2203: OP(cb,13) { _E = RL(_E); } /* RL E */
2204: OP(cb,14) { _H = RL(_H); } /* RL H */
2205: OP(cb,15) { _L = RL(_L); } /* RL L */
2206: OP(cb,16) { WM( _HL, RL(RM(_HL)) ); } /* RL (HL) */
2207: OP(cb,17) { _A = RL(_A); } /* RL A */
2208:
2209: OP(cb,18) { _B = RR(_B); } /* RR B */
2210: OP(cb,19) { _C = RR(_C); } /* RR C */
2211: OP(cb,1a) { _D = RR(_D); } /* RR D */
2212: OP(cb,1b) { _E = RR(_E); } /* RR E */
2213: OP(cb,1c) { _H = RR(_H); } /* RR H */
2214: OP(cb,1d) { _L = RR(_L); } /* RR L */
2215: OP(cb,1e) { WM( _HL, RR(RM(_HL)) ); } /* RR (HL) */
2216: OP(cb,1f) { _A = RR(_A); } /* RR A */
2217:
2218: OP(cb,20) { _B = SLA(_B); } /* SLA B */
2219: OP(cb,21) { _C = SLA(_C); } /* SLA C */
2220: OP(cb,22) { _D = SLA(_D); } /* SLA D */
2221: OP(cb,23) { _E = SLA(_E); } /* SLA E */
2222: OP(cb,24) { _H = SLA(_H); } /* SLA H */
2223: OP(cb,25) { _L = SLA(_L); } /* SLA L */
2224: OP(cb,26) { WM( _HL, SLA(RM(_HL)) ); } /* SLA (HL) */
2225: OP(cb,27) { _A = SLA(_A); } /* SLA A */
2226:
2227: OP(cb,28) { _B = SRA(_B); } /* SRA B */
2228: OP(cb,29) { _C = SRA(_C); } /* SRA C */
2229: OP(cb,2a) { _D = SRA(_D); } /* SRA D */
2230: OP(cb,2b) { _E = SRA(_E); } /* SRA E */
2231: OP(cb,2c) { _H = SRA(_H); } /* SRA H */
2232: OP(cb,2d) { _L = SRA(_L); } /* SRA L */
2233: OP(cb,2e) { WM( _HL, SRA(RM(_HL)) ); } /* SRA (HL) */
2234: OP(cb,2f) { _A = SRA(_A); } /* SRA A */
2235:
2236: OP(cb,30) { _B = SLL(_B); } /* SLL B */
2237: OP(cb,31) { _C = SLL(_C); } /* SLL C */
2238: OP(cb,32) { _D = SLL(_D); } /* SLL D */
2239: OP(cb,33) { _E = SLL(_E); } /* SLL E */
2240: OP(cb,34) { _H = SLL(_H); } /* SLL H */
2241: OP(cb,35) { _L = SLL(_L); } /* SLL L */
2242: OP(cb,36) { WM( _HL, SLL(RM(_HL)) ); } /* SLL (HL) */
2243: OP(cb,37) { _A = SLL(_A); } /* SLL A */
2244:
2245: OP(cb,38) { _B = SRL(_B); } /* SRL B */
2246: OP(cb,39) { _C = SRL(_C); } /* SRL C */
2247: OP(cb,3a) { _D = SRL(_D); } /* SRL D */
2248: OP(cb,3b) { _E = SRL(_E); } /* SRL E */
2249: OP(cb,3c) { _H = SRL(_H); } /* SRL H */
2250: OP(cb,3d) { _L = SRL(_L); } /* SRL L */
2251: OP(cb,3e) { WM( _HL, SRL(RM(_HL)) ); } /* SRL (HL) */
2252: OP(cb,3f) { _A = SRL(_A); } /* SRL A */
2253:
2254: OP(cb,40) { BIT(0,_B); } /* BIT 0,B */
2255: OP(cb,41) { BIT(0,_C); } /* BIT 0,C */
2256: OP(cb,42) { BIT(0,_D); } /* BIT 0,D */
2257: OP(cb,43) { BIT(0,_E); } /* BIT 0,E */
2258: OP(cb,44) { BIT(0,_H); } /* BIT 0,H */
2259: OP(cb,45) { BIT(0,_L); } /* BIT 0,L */
2260: OP(cb,46) { BIT(0,RM(_HL)); } /* BIT 0,(HL) */
2261: OP(cb,47) { BIT(0,_A); } /* BIT 0,A */
2262:
2263: OP(cb,48) { BIT(1,_B); } /* BIT 1,B */
2264: OP(cb,49) { BIT(1,_C); } /* BIT 1,C */
2265: OP(cb,4a) { BIT(1,_D); } /* BIT 1,D */
2266: OP(cb,4b) { BIT(1,_E); } /* BIT 1,E */
2267: OP(cb,4c) { BIT(1,_H); } /* BIT 1,H */
2268: OP(cb,4d) { BIT(1,_L); } /* BIT 1,L */
2269: OP(cb,4e) { BIT(1,RM(_HL)); } /* BIT 1,(HL) */
2270: OP(cb,4f) { BIT(1,_A); } /* BIT 1,A */
2271:
2272: OP(cb,50) { BIT(2,_B); } /* BIT 2,B */
2273: OP(cb,51) { BIT(2,_C); } /* BIT 2,C */
2274: OP(cb,52) { BIT(2,_D); } /* BIT 2,D */
2275: OP(cb,53) { BIT(2,_E); } /* BIT 2,E */
2276: OP(cb,54) { BIT(2,_H); } /* BIT 2,H */
2277: OP(cb,55) { BIT(2,_L); } /* BIT 2,L */
2278: OP(cb,56) { BIT(2,RM(_HL)); } /* BIT 2,(HL) */
2279: OP(cb,57) { BIT(2,_A); } /* BIT 2,A */
2280:
2281: OP(cb,58) { BIT(3,_B); } /* BIT 3,B */
2282: OP(cb,59) { BIT(3,_C); } /* BIT 3,C */
2283: OP(cb,5a) { BIT(3,_D); } /* BIT 3,D */
2284: OP(cb,5b) { BIT(3,_E); } /* BIT 3,E */
2285: OP(cb,5c) { BIT(3,_H); } /* BIT 3,H */
2286: OP(cb,5d) { BIT(3,_L); } /* BIT 3,L */
2287: OP(cb,5e) { BIT(3,RM(_HL)); } /* BIT 3,(HL) */
2288: OP(cb,5f) { BIT(3,_A); } /* BIT 3,A */
2289:
2290: OP(cb,60) { BIT(4,_B); } /* BIT 4,B */
2291: OP(cb,61) { BIT(4,_C); } /* BIT 4,C */
2292: OP(cb,62) { BIT(4,_D); } /* BIT 4,D */
2293: OP(cb,63) { BIT(4,_E); } /* BIT 4,E */
2294: OP(cb,64) { BIT(4,_H); } /* BIT 4,H */
2295: OP(cb,65) { BIT(4,_L); } /* BIT 4,L */
2296: OP(cb,66) { BIT(4,RM(_HL)); } /* BIT 4,(HL) */
2297: OP(cb,67) { BIT(4,_A); } /* BIT 4,A */
2298:
2299: OP(cb,68) { BIT(5,_B); } /* BIT 5,B */
2300: OP(cb,69) { BIT(5,_C); } /* BIT 5,C */
2301: OP(cb,6a) { BIT(5,_D); } /* BIT 5,D */
2302: OP(cb,6b) { BIT(5,_E); } /* BIT 5,E */
2303: OP(cb,6c) { BIT(5,_H); } /* BIT 5,H */
2304: OP(cb,6d) { BIT(5,_L); } /* BIT 5,L */
2305: OP(cb,6e) { BIT(5,RM(_HL)); } /* BIT 5,(HL) */
2306: OP(cb,6f) { BIT(5,_A); } /* BIT 5,A */
2307:
2308: OP(cb,70) { BIT(6,_B); } /* BIT 6,B */
2309: OP(cb,71) { BIT(6,_C); } /* BIT 6,C */
2310: OP(cb,72) { BIT(6,_D); } /* BIT 6,D */
2311: OP(cb,73) { BIT(6,_E); } /* BIT 6,E */
2312: OP(cb,74) { BIT(6,_H); } /* BIT 6,H */
2313: OP(cb,75) { BIT(6,_L); } /* BIT 6,L */
2314: OP(cb,76) { BIT(6,RM(_HL)); } /* BIT 6,(HL) */
2315: OP(cb,77) { BIT(6,_A); } /* BIT 6,A */
2316:
2317: OP(cb,78) { BIT(7,_B); } /* BIT 7,B */
2318: OP(cb,79) { BIT(7,_C); } /* BIT 7,C */
2319: OP(cb,7a) { BIT(7,_D); } /* BIT 7,D */
2320: OP(cb,7b) { BIT(7,_E); } /* BIT 7,E */
2321: OP(cb,7c) { BIT(7,_H); } /* BIT 7,H */
2322: OP(cb,7d) { BIT(7,_L); } /* BIT 7,L */
2323: OP(cb,7e) { BIT(7,RM(_HL)); } /* BIT 7,(HL) */
2324: OP(cb,7f) { BIT(7,_A); } /* BIT 7,A */
2325:
2326: OP(cb,80) { _B = RES(0,_B); } /* RES 0,B */
2327: OP(cb,81) { _C = RES(0,_C); } /* RES 0,C */
2328: OP(cb,82) { _D = RES(0,_D); } /* RES 0,D */
2329: OP(cb,83) { _E = RES(0,_E); } /* RES 0,E */
2330: OP(cb,84) { _H = RES(0,_H); } /* RES 0,H */
2331: OP(cb,85) { _L = RES(0,_L); } /* RES 0,L */
2332: OP(cb,86) { WM( _HL, RES(0,RM(_HL)) ); } /* RES 0,(HL) */
2333: OP(cb,87) { _A = RES(0,_A); } /* RES 0,A */
2334:
2335: OP(cb,88) { _B = RES(1,_B); } /* RES 1,B */
2336: OP(cb,89) { _C = RES(1,_C); } /* RES 1,C */
2337: OP(cb,8a) { _D = RES(1,_D); } /* RES 1,D */
2338: OP(cb,8b) { _E = RES(1,_E); } /* RES 1,E */
2339: OP(cb,8c) { _H = RES(1,_H); } /* RES 1,H */
2340: OP(cb,8d) { _L = RES(1,_L); } /* RES 1,L */
2341: OP(cb,8e) { WM( _HL, RES(1,RM(_HL)) ); } /* RES 1,(HL) */
2342: OP(cb,8f) { _A = RES(1,_A); } /* RES 1,A */
2343:
2344: OP(cb,90) { _B = RES(2,_B); } /* RES 2,B */
2345: OP(cb,91) { _C = RES(2,_C); } /* RES 2,C */
2346: OP(cb,92) { _D = RES(2,_D); } /* RES 2,D */
2347: OP(cb,93) { _E = RES(2,_E); } /* RES 2,E */
2348: OP(cb,94) { _H = RES(2,_H); } /* RES 2,H */
2349: OP(cb,95) { _L = RES(2,_L); } /* RES 2,L */
2350: OP(cb,96) { WM( _HL, RES(2,RM(_HL)) ); } /* RES 2,(HL) */
2351: OP(cb,97) { _A = RES(2,_A); } /* RES 2,A */
2352:
2353: OP(cb,98) { _B = RES(3,_B); } /* RES 3,B */
2354: OP(cb,99) { _C = RES(3,_C); } /* RES 3,C */
2355: OP(cb,9a) { _D = RES(3,_D); } /* RES 3,D */
2356: OP(cb,9b) { _E = RES(3,_E); } /* RES 3,E */
2357: OP(cb,9c) { _H = RES(3,_H); } /* RES 3,H */
2358: OP(cb,9d) { _L = RES(3,_L); } /* RES 3,L */
2359: OP(cb,9e) { WM( _HL, RES(3,RM(_HL)) ); } /* RES 3,(HL) */
2360: OP(cb,9f) { _A = RES(3,_A); } /* RES 3,A */
2361:
2362: OP(cb,a0) { _B = RES(4,_B); } /* RES 4,B */
2363: OP(cb,a1) { _C = RES(4,_C); } /* RES 4,C */
2364: OP(cb,a2) { _D = RES(4,_D); } /* RES 4,D */
2365: OP(cb,a3) { _E = RES(4,_E); } /* RES 4,E */
2366: OP(cb,a4) { _H = RES(4,_H); } /* RES 4,H */
2367: OP(cb,a5) { _L = RES(4,_L); } /* RES 4,L */
2368: OP(cb,a6) { WM( _HL, RES(4,RM(_HL)) ); } /* RES 4,(HL) */
2369: OP(cb,a7) { _A = RES(4,_A); } /* RES 4,A */
2370:
2371: OP(cb,a8) { _B = RES(5,_B); } /* RES 5,B */
2372: OP(cb,a9) { _C = RES(5,_C); } /* RES 5,C */
2373: OP(cb,aa) { _D = RES(5,_D); } /* RES 5,D */
2374: OP(cb,ab) { _E = RES(5,_E); } /* RES 5,E */
2375: OP(cb,ac) { _H = RES(5,_H); } /* RES 5,H */
2376: OP(cb,ad) { _L = RES(5,_L); } /* RES 5,L */
2377: OP(cb,ae) { WM( _HL, RES(5,RM(_HL)) ); } /* RES 5,(HL) */
2378: OP(cb,af) { _A = RES(5,_A); } /* RES 5,A */
2379:
2380: OP(cb,b0) { _B = RES(6,_B); } /* RES 6,B */
2381: OP(cb,b1) { _C = RES(6,_C); } /* RES 6,C */
2382: OP(cb,b2) { _D = RES(6,_D); } /* RES 6,D */
2383: OP(cb,b3) { _E = RES(6,_E); } /* RES 6,E */
2384: OP(cb,b4) { _H = RES(6,_H); } /* RES 6,H */
2385: OP(cb,b5) { _L = RES(6,_L); } /* RES 6,L */
2386: OP(cb,b6) { WM( _HL, RES(6,RM(_HL)) ); } /* RES 6,(HL) */
2387: OP(cb,b7) { _A = RES(6,_A); } /* RES 6,A */
2388:
2389: OP(cb,b8) { _B = RES(7,_B); } /* RES 7,B */
2390: OP(cb,b9) { _C = RES(7,_C); } /* RES 7,C */
2391: OP(cb,ba) { _D = RES(7,_D); } /* RES 7,D */
2392: OP(cb,bb) { _E = RES(7,_E); } /* RES 7,E */
2393: OP(cb,bc) { _H = RES(7,_H); } /* RES 7,H */
2394: OP(cb,bd) { _L = RES(7,_L); } /* RES 7,L */
2395: OP(cb,be) { WM( _HL, RES(7,RM(_HL)) ); } /* RES 7,(HL) */
2396: OP(cb,bf) { _A = RES(7,_A); } /* RES 7,A */
2397:
2398: OP(cb,c0) { _B = SET(0,_B); } /* SET 0,B */
2399: OP(cb,c1) { _C = SET(0,_C); } /* SET 0,C */
2400: OP(cb,c2) { _D = SET(0,_D); } /* SET 0,D */
2401: OP(cb,c3) { _E = SET(0,_E); } /* SET 0,E */
2402: OP(cb,c4) { _H = SET(0,_H); } /* SET 0,H */
2403: OP(cb,c5) { _L = SET(0,_L); } /* SET 0,L */
2404: OP(cb,c6) { WM( _HL, SET(0,RM(_HL)) ); } /* SET 0,(HL) */
2405: OP(cb,c7) { _A = SET(0,_A); } /* SET 0,A */
2406:
2407: OP(cb,c8) { _B = SET(1,_B); } /* SET 1,B */
2408: OP(cb,c9) { _C = SET(1,_C); } /* SET 1,C */
2409: OP(cb,ca) { _D = SET(1,_D); } /* SET 1,D */
2410: OP(cb,cb) { _E = SET(1,_E); } /* SET 1,E */
2411: OP(cb,cc) { _H = SET(1,_H); } /* SET 1,H */
2412: OP(cb,cd) { _L = SET(1,_L); } /* SET 1,L */
2413: OP(cb,ce) { WM( _HL, SET(1,RM(_HL)) ); } /* SET 1,(HL) */
2414: OP(cb,cf) { _A = SET(1,_A); } /* SET 1,A */
2415:
2416: OP(cb,d0) { _B = SET(2,_B); } /* SET 2,B */
2417: OP(cb,d1) { _C = SET(2,_C); } /* SET 2,C */
2418: OP(cb,d2) { _D = SET(2,_D); } /* SET 2,D */
2419: OP(cb,d3) { _E = SET(2,_E); } /* SET 2,E */
2420: OP(cb,d4) { _H = SET(2,_H); } /* SET 2,H */
2421: OP(cb,d5) { _L = SET(2,_L); } /* SET 2,L */
2422: OP(cb,d6) { WM( _HL, SET(2,RM(_HL)) ); }/* SET 2,(HL) */
2423: OP(cb,d7) { _A = SET(2,_A); } /* SET 2,A */
2424:
2425: OP(cb,d8) { _B = SET(3,_B); } /* SET 3,B */
2426: OP(cb,d9) { _C = SET(3,_C); } /* SET 3,C */
2427: OP(cb,da) { _D = SET(3,_D); } /* SET 3,D */
2428: OP(cb,db) { _E = SET(3,_E); } /* SET 3,E */
2429: OP(cb,dc) { _H = SET(3,_H); } /* SET 3,H */
2430: OP(cb,dd) { _L = SET(3,_L); } /* SET 3,L */
2431: OP(cb,de) { WM( _HL, SET(3,RM(_HL)) ); } /* SET 3,(HL) */
2432: OP(cb,df) { _A = SET(3,_A); } /* SET 3,A */
2433:
2434: OP(cb,e0) { _B = SET(4,_B); } /* SET 4,B */
2435: OP(cb,e1) { _C = SET(4,_C); } /* SET 4,C */
2436: OP(cb,e2) { _D = SET(4,_D); } /* SET 4,D */
2437: OP(cb,e3) { _E = SET(4,_E); } /* SET 4,E */
2438: OP(cb,e4) { _H = SET(4,_H); } /* SET 4,H */
2439: OP(cb,e5) { _L = SET(4,_L); } /* SET 4,L */
2440: OP(cb,e6) { WM( _HL, SET(4,RM(_HL)) ); } /* SET 4,(HL) */
2441: OP(cb,e7) { _A = SET(4,_A); } /* SET 4,A */
2442:
2443: OP(cb,e8) { _B = SET(5,_B); } /* SET 5,B */
2444: OP(cb,e9) { _C = SET(5,_C); } /* SET 5,C */
2445: OP(cb,ea) { _D = SET(5,_D); } /* SET 5,D */
2446: OP(cb,eb) { _E = SET(5,_E); } /* SET 5,E */
2447: OP(cb,ec) { _H = SET(5,_H); } /* SET 5,H */
2448: OP(cb,ed) { _L = SET(5,_L); } /* SET 5,L */
2449: OP(cb,ee) { WM( _HL, SET(5,RM(_HL)) ); } /* SET 5,(HL) */
2450: OP(cb,ef) { _A = SET(5,_A); } /* SET 5,A */
2451:
2452: OP(cb,f0) { _B = SET(6,_B); } /* SET 6,B */
2453: OP(cb,f1) { _C = SET(6,_C); } /* SET 6,C */
2454: OP(cb,f2) { _D = SET(6,_D); } /* SET 6,D */
2455: OP(cb,f3) { _E = SET(6,_E); } /* SET 6,E */
2456: OP(cb,f4) { _H = SET(6,_H); } /* SET 6,H */
2457: OP(cb,f5) { _L = SET(6,_L); } /* SET 6,L */
2458: OP(cb,f6) { WM( _HL, SET(6,RM(_HL)) ); } /* SET 6,(HL) */
2459: OP(cb,f7) { _A = SET(6,_A); } /* SET 6,A */
2460:
2461: OP(cb,f8) { _B = SET(7,_B); } /* SET 7,B */
2462: OP(cb,f9) { _C = SET(7,_C); } /* SET 7,C */
2463: OP(cb,fa) { _D = SET(7,_D); } /* SET 7,D */
2464: OP(cb,fb) { _E = SET(7,_E); } /* SET 7,E */
2465: OP(cb,fc) { _H = SET(7,_H); } /* SET 7,H */
2466: OP(cb,fd) { _L = SET(7,_L); } /* SET 7,L */
2467: OP(cb,fe) { WM( _HL, SET(7,RM(_HL)) ); } /* SET 7,(HL) */
2468: OP(cb,ff) { _A = SET(7,_A); } /* SET 7,A */
2469:
2470:
2471: /**********************************************************
2472: * opcodes with DD/FD CB prefix
2473: * rotate, shift and bit operations with (IX+o)
2474: **********************************************************/
2475: OP(xxcb,00) { _B = RLC( RM(EA) ); WM( EA,_B ); } /* RLC B=(XY+o) */
2476: OP(xxcb,01) { _C = RLC( RM(EA) ); WM( EA,_C ); } /* RLC C=(XY+o) */
2477: OP(xxcb,02) { _D = RLC( RM(EA) ); WM( EA,_D ); } /* RLC D=(XY+o) */
2478: OP(xxcb,03) { _E = RLC( RM(EA) ); WM( EA,_E ); } /* RLC E=(XY+o) */
2479: OP(xxcb,04) { _H = RLC( RM(EA) ); WM( EA,_H ); } /* RLC H=(XY+o) */
2480: OP(xxcb,05) { _L = RLC( RM(EA) ); WM( EA,_L ); } /* RLC L=(XY+o) */
2481: OP(xxcb,06) { WM( EA, RLC( RM(EA) ) ); } /* RLC (XY+o) */
2482: OP(xxcb,07) { _A = RLC( RM(EA) ); WM( EA,_A ); } /* RLC A=(XY+o) */
2483:
2484: OP(xxcb,08) { _B = RRC( RM(EA) ); WM( EA,_B ); } /* RRC B=(XY+o) */
2485: OP(xxcb,09) { _C = RRC( RM(EA) ); WM( EA,_C ); } /* RRC C=(XY+o) */
2486: OP(xxcb,0a) { _D = RRC( RM(EA) ); WM( EA,_D ); } /* RRC D=(XY+o) */
2487: OP(xxcb,0b) { _E = RRC( RM(EA) ); WM( EA,_E ); } /* RRC E=(XY+o) */
2488: OP(xxcb,0c) { _H = RRC( RM(EA) ); WM( EA,_H ); } /* RRC H=(XY+o) */
2489: OP(xxcb,0d) { _L = RRC( RM(EA) ); WM( EA,_L ); } /* RRC L=(XY+o) */
2490: OP(xxcb,0e) { WM( EA,RRC( RM(EA) ) ); } /* RRC (XY+o) */
2491: OP(xxcb,0f) { _A = RRC( RM(EA) ); WM( EA,_A ); } /* RRC A=(XY+o) */
2492:
2493: OP(xxcb,10) { _B = RL( RM(EA) ); WM( EA,_B ); } /* RL B=(XY+o) */
2494: OP(xxcb,11) { _C = RL( RM(EA) ); WM( EA,_C ); } /* RL C=(XY+o) */
2495: OP(xxcb,12) { _D = RL( RM(EA) ); WM( EA,_D ); } /* RL D=(XY+o) */
2496: OP(xxcb,13) { _E = RL( RM(EA) ); WM( EA,_E ); } /* RL E=(XY+o) */
2497: OP(xxcb,14) { _H = RL( RM(EA) ); WM( EA,_H ); } /* RL H=(XY+o) */
2498: OP(xxcb,15) { _L = RL( RM(EA) ); WM( EA,_L ); } /* RL L=(XY+o) */
2499: OP(xxcb,16) { WM( EA,RL( RM(EA) ) ); } /* RL (XY+o) */
2500: OP(xxcb,17) { _A = RL( RM(EA) ); WM( EA,_A ); } /* RL A=(XY+o) */
2501:
2502: OP(xxcb,18) { _B = RR( RM(EA) ); WM( EA,_B ); } /* RR B=(XY+o) */
2503: OP(xxcb,19) { _C = RR( RM(EA) ); WM( EA,_C ); } /* RR C=(XY+o) */
2504: OP(xxcb,1a) { _D = RR( RM(EA) ); WM( EA,_D ); } /* RR D=(XY+o) */
2505: OP(xxcb,1b) { _E = RR( RM(EA) ); WM( EA,_E ); } /* RR E=(XY+o) */
2506: OP(xxcb,1c) { _H = RR( RM(EA) ); WM( EA,_H ); } /* RR H=(XY+o) */
2507: OP(xxcb,1d) { _L = RR( RM(EA) ); WM( EA,_L ); } /* RR L=(XY+o) */
2508: OP(xxcb,1e) { WM( EA,RR( RM(EA) ) ); } /* RR (XY+o) */
2509: OP(xxcb,1f) { _A = RR( RM(EA) ); WM( EA,_A ); } /* RR A=(XY+o) */
2510:
2511: OP(xxcb,20) { _B = SLA( RM(EA) ); WM( EA,_B ); } /* SLA B=(XY+o) */
2512: OP(xxcb,21) { _C = SLA( RM(EA) ); WM( EA,_C ); } /* SLA C=(XY+o) */
2513: OP(xxcb,22) { _D = SLA( RM(EA) ); WM( EA,_D ); } /* SLA D=(XY+o) */
2514: OP(xxcb,23) { _E = SLA( RM(EA) ); WM( EA,_E ); } /* SLA E=(XY+o) */
2515: OP(xxcb,24) { _H = SLA( RM(EA) ); WM( EA,_H ); } /* SLA H=(XY+o) */
2516: OP(xxcb,25) { _L = SLA( RM(EA) ); WM( EA,_L ); } /* SLA L=(XY+o) */
2517: OP(xxcb,26) { WM( EA,SLA( RM(EA) ) ); } /* SLA (XY+o) */
2518: OP(xxcb,27) { _A = SLA( RM(EA) ); WM( EA,_A ); } /* SLA A=(XY+o) */
2519:
2520: OP(xxcb,28) { _B = SRA( RM(EA) ); WM( EA,_B ); } /* SRA B=(XY+o) */
2521: OP(xxcb,29) { _C = SRA( RM(EA) ); WM( EA,_C ); } /* SRA C=(XY+o) */
2522: OP(xxcb,2a) { _D = SRA( RM(EA) ); WM( EA,_D ); } /* SRA D=(XY+o) */
2523: OP(xxcb,2b) { _E = SRA( RM(EA) ); WM( EA,_E ); } /* SRA E=(XY+o) */
2524: OP(xxcb,2c) { _H = SRA( RM(EA) ); WM( EA,_H ); } /* SRA H=(XY+o) */
2525: OP(xxcb,2d) { _L = SRA( RM(EA) ); WM( EA,_L ); } /* SRA L=(XY+o) */
2526: OP(xxcb,2e) { WM( EA,SRA( RM(EA) ) ); } /* SRA (XY+o) */
2527: OP(xxcb,2f) { _A = SRA( RM(EA) ); WM( EA,_A ); } /* SRA A=(XY+o) */
2528:
2529: OP(xxcb,30) { _B = SLL( RM(EA) ); WM( EA,_B ); } /* SLL B=(XY+o) */
2530: OP(xxcb,31) { _C = SLL( RM(EA) ); WM( EA,_C ); } /* SLL C=(XY+o) */
2531: OP(xxcb,32) { _D = SLL( RM(EA) ); WM( EA,_D ); } /* SLL D=(XY+o) */
2532: OP(xxcb,33) { _E = SLL( RM(EA) ); WM( EA,_E ); } /* SLL E=(XY+o) */
2533: OP(xxcb,34) { _H = SLL( RM(EA) ); WM( EA,_H ); } /* SLL H=(XY+o) */
2534: OP(xxcb,35) { _L = SLL( RM(EA) ); WM( EA,_L ); } /* SLL L=(XY+o) */
2535: OP(xxcb,36) { WM( EA,SLL( RM(EA) ) ); } /* SLL (XY+o) */
2536: OP(xxcb,37) { _A = SLL( RM(EA) ); WM( EA,_A ); } /* SLL A=(XY+o) */
2537:
2538: OP(xxcb,38) { _B = SRL( RM(EA) ); WM( EA,_B ); } /* SRL B=(XY+o) */
2539: OP(xxcb,39) { _C = SRL( RM(EA) ); WM( EA,_C ); } /* SRL C=(XY+o) */
2540: OP(xxcb,3a) { _D = SRL( RM(EA) ); WM( EA,_D ); } /* SRL D=(XY+o) */
2541: OP(xxcb,3b) { _E = SRL( RM(EA) ); WM( EA,_E ); } /* SRL E=(XY+o) */
2542: OP(xxcb,3c) { _H = SRL( RM(EA) ); WM( EA,_H ); } /* SRL H=(XY+o) */
2543: OP(xxcb,3d) { _L = SRL( RM(EA) ); WM( EA,_L ); } /* SRL L=(XY+o) */
2544: OP(xxcb,3e) { WM( EA,SRL( RM(EA) ) ); } /* SRL (XY+o) */
2545: OP(xxcb,3f) { _A = SRL( RM(EA) ); WM( EA,_A ); } /* SRL A=(XY+o) */
2546:
2547: OP(xxcb,40) { xxcb_46(); } /* BIT 0,B=(XY+o) */
2548: OP(xxcb,41) { xxcb_46(); } /* BIT 0,C=(XY+o) */
2549: OP(xxcb,42) { xxcb_46(); } /* BIT 0,D=(XY+o) */
2550: OP(xxcb,43) { xxcb_46(); } /* BIT 0,E=(XY+o) */
2551: OP(xxcb,44) { xxcb_46(); } /* BIT 0,H=(XY+o) */
2552: OP(xxcb,45) { xxcb_46(); } /* BIT 0,L=(XY+o) */
2553: OP(xxcb,46) { BIT_XY(0,RM(EA)); } /* BIT 0,(XY+o) */
2554: OP(xxcb,47) { xxcb_46(); } /* BIT 0,A=(XY+o) */
2555:
2556: OP(xxcb,48) { xxcb_4e(); } /* BIT 1,B=(XY+o) */
2557: OP(xxcb,49) { xxcb_4e(); } /* BIT 1,C=(XY+o) */
2558: OP(xxcb,4a) { xxcb_4e(); } /* BIT 1,D=(XY+o) */
2559: OP(xxcb,4b) { xxcb_4e(); } /* BIT 1,E=(XY+o) */
2560: OP(xxcb,4c) { xxcb_4e(); } /* BIT 1,H=(XY+o) */
2561: OP(xxcb,4d) { xxcb_4e(); } /* BIT 1,L=(XY+o) */
2562: OP(xxcb,4e) { BIT_XY(1,RM(EA)); } /* BIT 1,(XY+o) */
2563: OP(xxcb,4f) { xxcb_4e(); } /* BIT 1,A=(XY+o) */
2564:
2565: OP(xxcb,50) { xxcb_56(); } /* BIT 2,B=(XY+o) */
2566: OP(xxcb,51) { xxcb_56(); } /* BIT 2,C=(XY+o) */
2567: OP(xxcb,52) { xxcb_56(); } /* BIT 2,D=(XY+o) */
2568: OP(xxcb,53) { xxcb_56(); } /* BIT 2,E=(XY+o) */
2569: OP(xxcb,54) { xxcb_56(); } /* BIT 2,H=(XY+o) */
2570: OP(xxcb,55) { xxcb_56(); } /* BIT 2,L=(XY+o) */
2571: OP(xxcb,56) { BIT_XY(2,RM(EA)); } /* BIT 2,(XY+o) */
2572: OP(xxcb,57) { xxcb_56(); } /* BIT 2,A=(XY+o) */
2573:
2574: OP(xxcb,58) { xxcb_5e(); } /* BIT 3,B=(XY+o) */
2575: OP(xxcb,59) { xxcb_5e(); } /* BIT 3,C=(XY+o) */
2576: OP(xxcb,5a) { xxcb_5e(); } /* BIT 3,D=(XY+o) */
2577: OP(xxcb,5b) { xxcb_5e(); } /* BIT 3,E=(XY+o) */
2578: OP(xxcb,5c) { xxcb_5e(); } /* BIT 3,H=(XY+o) */
2579: OP(xxcb,5d) { xxcb_5e(); } /* BIT 3,L=(XY+o) */
2580: OP(xxcb,5e) { BIT_XY(3,RM(EA)); } /* BIT 3,(XY+o) */
2581: OP(xxcb,5f) { xxcb_5e(); } /* BIT 3,A=(XY+o) */
2582:
2583: OP(xxcb,60) { xxcb_66(); } /* BIT 4,B=(XY+o) */
2584: OP(xxcb,61) { xxcb_66(); } /* BIT 4,C=(XY+o) */
2585: OP(xxcb,62) { xxcb_66(); } /* BIT 4,D=(XY+o) */
2586: OP(xxcb,63) { xxcb_66(); } /* BIT 4,E=(XY+o) */
2587: OP(xxcb,64) { xxcb_66(); } /* BIT 4,H=(XY+o) */
2588: OP(xxcb,65) { xxcb_66(); } /* BIT 4,L=(XY+o) */
2589: OP(xxcb,66) { BIT_XY(4,RM(EA)); } /* BIT 4,(XY+o) */
2590: OP(xxcb,67) { xxcb_66(); } /* BIT 4,A=(XY+o) */
2591:
2592: OP(xxcb,68) { xxcb_6e(); } /* BIT 5,B=(XY+o) */
2593: OP(xxcb,69) { xxcb_6e(); } /* BIT 5,C=(XY+o) */
2594: OP(xxcb,6a) { xxcb_6e(); } /* BIT 5,D=(XY+o) */
2595: OP(xxcb,6b) { xxcb_6e(); } /* BIT 5,E=(XY+o) */
2596: OP(xxcb,6c) { xxcb_6e(); } /* BIT 5,H=(XY+o) */
2597: OP(xxcb,6d) { xxcb_6e(); } /* BIT 5,L=(XY+o) */
2598: OP(xxcb,6e) { BIT_XY(5,RM(EA)); } /* BIT 5,(XY+o) */
2599: OP(xxcb,6f) { xxcb_6e(); } /* BIT 5,A=(XY+o) */
2600:
2601: OP(xxcb,70) { xxcb_76(); } /* BIT 6,B=(XY+o) */
2602: OP(xxcb,71) { xxcb_76(); } /* BIT 6,C=(XY+o) */
2603: OP(xxcb,72) { xxcb_76(); } /* BIT 6,D=(XY+o) */
2604: OP(xxcb,73) { xxcb_76(); } /* BIT 6,E=(XY+o) */
2605: OP(xxcb,74) { xxcb_76(); } /* BIT 6,H=(XY+o) */
2606: OP(xxcb,75) { xxcb_76(); } /* BIT 6,L=(XY+o) */
2607: OP(xxcb,76) { BIT_XY(6,RM(EA)); } /* BIT 6,(XY+o) */
2608: OP(xxcb,77) { xxcb_76(); } /* BIT 6,A=(XY+o) */
2609:
2610: OP(xxcb,78) { xxcb_7e(); } /* BIT 7,B=(XY+o) */
2611: OP(xxcb,79) { xxcb_7e(); } /* BIT 7,C=(XY+o) */
2612: OP(xxcb,7a) { xxcb_7e(); } /* BIT 7,D=(XY+o) */
2613: OP(xxcb,7b) { xxcb_7e(); } /* BIT 7,E=(XY+o) */
2614: OP(xxcb,7c) { xxcb_7e(); } /* BIT 7,H=(XY+o) */
2615: OP(xxcb,7d) { xxcb_7e(); } /* BIT 7,L=(XY+o) */
2616: OP(xxcb,7e) { BIT_XY(7,RM(EA)); } /* BIT 7,(XY+o) */
2617: OP(xxcb,7f) { xxcb_7e(); } /* BIT 7,A=(XY+o) */
2618:
2619: OP(xxcb,80) { _B = RES(0, RM(EA) ); WM( EA,_B ); } /* RES 0,B=(XY+o) */
2620: OP(xxcb,81) { _C = RES(0, RM(EA) ); WM( EA,_C ); } /* RES 0,C=(XY+o) */
2621: OP(xxcb,82) { _D = RES(0, RM(EA) ); WM( EA,_D ); } /* RES 0,D=(XY+o) */
2622: OP(xxcb,83) { _E = RES(0, RM(EA) ); WM( EA,_E ); } /* RES 0,E=(XY+o) */
2623: OP(xxcb,84) { _H = RES(0, RM(EA) ); WM( EA,_H ); } /* RES 0,H=(XY+o) */
2624: OP(xxcb,85) { _L = RES(0, RM(EA) ); WM( EA,_L ); } /* RES 0,L=(XY+o) */
2625: OP(xxcb,86) { WM( EA, RES(0,RM(EA)) ); } /* RES 0,(XY+o) */
2626: OP(xxcb,87) { _A = RES(0, RM(EA) ); WM( EA,_A ); } /* RES 0,A=(XY+o) */
2627:
2628: OP(xxcb,88) { _B = RES(1, RM(EA) ); WM( EA,_B ); } /* RES 1,B=(XY+o) */
2629: OP(xxcb,89) { _C = RES(1, RM(EA) ); WM( EA,_C ); } /* RES 1,C=(XY+o) */
2630: OP(xxcb,8a) { _D = RES(1, RM(EA) ); WM( EA,_D ); } /* RES 1,D=(XY+o) */
2631: OP(xxcb,8b) { _E = RES(1, RM(EA) ); WM( EA,_E ); } /* RES 1,E=(XY+o) */
2632: OP(xxcb,8c) { _H = RES(1, RM(EA) ); WM( EA,_H ); } /* RES 1,H=(XY+o) */
2633: OP(xxcb,8d) { _L = RES(1, RM(EA) ); WM( EA,_L ); } /* RES 1,L=(XY+o) */
2634: OP(xxcb,8e) { WM( EA, RES(1,RM(EA)) ); } /* RES 1,(XY+o) */
2635: OP(xxcb,8f) { _A = RES(1, RM(EA) ); WM( EA,_A ); } /* RES 1,A=(XY+o) */
2636:
2637: OP(xxcb,90) { _B = RES(2, RM(EA) ); WM( EA,_B ); } /* RES 2,B=(XY+o) */
2638: OP(xxcb,91) { _C = RES(2, RM(EA) ); WM( EA,_C ); } /* RES 2,C=(XY+o) */
2639: OP(xxcb,92) { _D = RES(2, RM(EA) ); WM( EA,_D ); } /* RES 2,D=(XY+o) */
2640: OP(xxcb,93) { _E = RES(2, RM(EA) ); WM( EA,_E ); } /* RES 2,E=(XY+o) */
2641: OP(xxcb,94) { _H = RES(2, RM(EA) ); WM( EA,_H ); } /* RES 2,H=(XY+o) */
2642: OP(xxcb,95) { _L = RES(2, RM(EA) ); WM( EA,_L ); } /* RES 2,L=(XY+o) */
2643: OP(xxcb,96) { WM( EA, RES(2,RM(EA)) ); } /* RES 2,(XY+o) */
2644: OP(xxcb,97) { _A = RES(2, RM(EA) ); WM( EA,_A ); } /* RES 2,A=(XY+o) */
2645:
2646: OP(xxcb,98) { _B = RES(3, RM(EA) ); WM( EA,_B ); } /* RES 3,B=(XY+o) */
2647: OP(xxcb,99) { _C = RES(3, RM(EA) ); WM( EA,_C ); } /* RES 3,C=(XY+o) */
2648: OP(xxcb,9a) { _D = RES(3, RM(EA) ); WM( EA,_D ); } /* RES 3,D=(XY+o) */
2649: OP(xxcb,9b) { _E = RES(3, RM(EA) ); WM( EA,_E ); } /* RES 3,E=(XY+o) */
2650: OP(xxcb,9c) { _H = RES(3, RM(EA) ); WM( EA,_H ); } /* RES 3,H=(XY+o) */
2651: OP(xxcb,9d) { _L = RES(3, RM(EA) ); WM( EA,_L ); } /* RES 3,L=(XY+o) */
2652: OP(xxcb,9e) { WM( EA, RES(3,RM(EA)) ); } /* RES 3,(XY+o) */
2653: OP(xxcb,9f) { _A = RES(3, RM(EA) ); WM( EA,_A ); } /* RES 3,A=(XY+o) */
2654:
2655: OP(xxcb,a0) { _B = RES(4, RM(EA) ); WM( EA,_B ); } /* RES 4,B=(XY+o) */
2656: OP(xxcb,a1) { _C = RES(4, RM(EA) ); WM( EA,_C ); } /* RES 4,C=(XY+o) */
2657: OP(xxcb,a2) { _D = RES(4, RM(EA) ); WM( EA,_D ); } /* RES 4,D=(XY+o) */
2658: OP(xxcb,a3) { _E = RES(4, RM(EA) ); WM( EA,_E ); } /* RES 4,E=(XY+o) */
2659: OP(xxcb,a4) { _H = RES(4, RM(EA) ); WM( EA,_H ); } /* RES 4,H=(XY+o) */
2660: OP(xxcb,a5) { _L = RES(4, RM(EA) ); WM( EA,_L ); } /* RES 4,L=(XY+o) */
2661: OP(xxcb,a6) { WM( EA, RES(4,RM(EA)) ); } /* RES 4,(XY+o) */
2662: OP(xxcb,a7) { _A = RES(4, RM(EA) ); WM( EA,_A ); } /* RES 4,A=(XY+o) */
2663:
2664: OP(xxcb,a8) { _B = RES(5, RM(EA) ); WM( EA,_B ); } /* RES 5,B=(XY+o) */
2665: OP(xxcb,a9) { _C = RES(5, RM(EA) ); WM( EA,_C ); } /* RES 5,C=(XY+o) */
2666: OP(xxcb,aa) { _D = RES(5, RM(EA) ); WM( EA,_D ); } /* RES 5,D=(XY+o) */
2667: OP(xxcb,ab) { _E = RES(5, RM(EA) ); WM( EA,_E ); } /* RES 5,E=(XY+o) */
2668: OP(xxcb,ac) { _H = RES(5, RM(EA) ); WM( EA,_H ); } /* RES 5,H=(XY+o) */
2669: OP(xxcb,ad) { _L = RES(5, RM(EA) ); WM( EA,_L ); } /* RES 5,L=(XY+o) */
2670: OP(xxcb,ae) { WM( EA, RES(5,RM(EA)) ); } /* RES 5,(XY+o) */
2671: OP(xxcb,af) { _A = RES(5, RM(EA) ); WM( EA,_A ); } /* RES 5,A=(XY+o) */
2672:
2673: OP(xxcb,b0) { _B = RES(6, RM(EA) ); WM( EA,_B ); } /* RES 6,B=(XY+o) */
2674: OP(xxcb,b1) { _C = RES(6, RM(EA) ); WM( EA,_C ); } /* RES 6,C=(XY+o) */
2675: OP(xxcb,b2) { _D = RES(6, RM(EA) ); WM( EA,_D ); } /* RES 6,D=(XY+o) */
2676: OP(xxcb,b3) { _E = RES(6, RM(EA) ); WM( EA,_E ); } /* RES 6,E=(XY+o) */
2677: OP(xxcb,b4) { _H = RES(6, RM(EA) ); WM( EA,_H ); } /* RES 6,H=(XY+o) */
2678: OP(xxcb,b5) { _L = RES(6, RM(EA) ); WM( EA,_L ); } /* RES 6,L=(XY+o) */
2679: OP(xxcb,b6) { WM( EA, RES(6,RM(EA)) ); } /* RES 6,(XY+o) */
2680: OP(xxcb,b7) { _A = RES(6, RM(EA) ); WM( EA,_A ); } /* RES 6,A=(XY+o) */
2681:
2682: OP(xxcb,b8) { _B = RES(7, RM(EA) ); WM( EA,_B ); } /* RES 7,B=(XY+o) */
2683: OP(xxcb,b9) { _C = RES(7, RM(EA) ); WM( EA,_C ); } /* RES 7,C=(XY+o) */
2684: OP(xxcb,ba) { _D = RES(7, RM(EA) ); WM( EA,_D ); } /* RES 7,D=(XY+o) */
2685: OP(xxcb,bb) { _E = RES(7, RM(EA) ); WM( EA,_E ); } /* RES 7,E=(XY+o) */
2686: OP(xxcb,bc) { _H = RES(7, RM(EA) ); WM( EA,_H ); } /* RES 7,H=(XY+o) */
2687: OP(xxcb,bd) { _L = RES(7, RM(EA) ); WM( EA,_L ); } /* RES 7,L=(XY+o) */
2688: OP(xxcb,be) { WM( EA, RES(7,RM(EA)) ); } /* RES 7,(XY+o) */
2689: OP(xxcb,bf) { _A = RES(7, RM(EA) ); WM( EA,_A ); } /* RES 7,A=(XY+o) */
2690:
2691: OP(xxcb,c0) { _B = SET(0, RM(EA) ); WM( EA,_B ); } /* SET 0,B=(XY+o) */
2692: OP(xxcb,c1) { _C = SET(0, RM(EA) ); WM( EA,_C ); } /* SET 0,C=(XY+o) */
2693: OP(xxcb,c2) { _D = SET(0, RM(EA) ); WM( EA,_D ); } /* SET 0,D=(XY+o) */
2694: OP(xxcb,c3) { _E = SET(0, RM(EA) ); WM( EA,_E ); } /* SET 0,E=(XY+o) */
2695: OP(xxcb,c4) { _H = SET(0, RM(EA) ); WM( EA,_H ); } /* SET 0,H=(XY+o) */
2696: OP(xxcb,c5) { _L = SET(0, RM(EA) ); WM( EA,_L ); } /* SET 0,L=(XY+o) */
2697: OP(xxcb,c6) { WM( EA, SET(0,RM(EA)) ); } /* SET 0,(XY+o) */
2698: OP(xxcb,c7) { _A = SET(0, RM(EA) ); WM( EA,_A ); } /* SET 0,A=(XY+o) */
2699:
2700: OP(xxcb,c8) { _B = SET(1, RM(EA) ); WM( EA,_B ); } /* SET 1,B=(XY+o) */
2701: OP(xxcb,c9) { _C = SET(1, RM(EA) ); WM( EA,_C ); } /* SET 1,C=(XY+o) */
2702: OP(xxcb,ca) { _D = SET(1, RM(EA) ); WM( EA,_D ); } /* SET 1,D=(XY+o) */
2703: OP(xxcb,cb) { _E = SET(1, RM(EA) ); WM( EA,_E ); } /* SET 1,E=(XY+o) */
2704: OP(xxcb,cc) { _H = SET(1, RM(EA) ); WM( EA,_H ); } /* SET 1,H=(XY+o) */
2705: OP(xxcb,cd) { _L = SET(1, RM(EA) ); WM( EA,_L ); } /* SET 1,L=(XY+o) */
2706: OP(xxcb,ce) { WM( EA, SET(1,RM(EA)) ); } /* SET 1,(XY+o) */
2707: OP(xxcb,cf) { _A = SET(1, RM(EA) ); WM( EA,_A ); } /* SET 1,A=(XY+o) */
2708:
2709: OP(xxcb,d0) { _B = SET(2, RM(EA) ); WM( EA,_B ); } /* SET 2,B=(XY+o) */
2710: OP(xxcb,d1) { _C = SET(2, RM(EA) ); WM( EA,_C ); } /* SET 2,C=(XY+o) */
2711: OP(xxcb,d2) { _D = SET(2, RM(EA) ); WM( EA,_D ); } /* SET 2,D=(XY+o) */
2712: OP(xxcb,d3) { _E = SET(2, RM(EA) ); WM( EA,_E ); } /* SET 2,E=(XY+o) */
2713: OP(xxcb,d4) { _H = SET(2, RM(EA) ); WM( EA,_H ); } /* SET 2,H=(XY+o) */
2714: OP(xxcb,d5) { _L = SET(2, RM(EA) ); WM( EA,_L ); } /* SET 2,L=(XY+o) */
2715: OP(xxcb,d6) { WM( EA, SET(2,RM(EA)) ); } /* SET 2,(XY+o) */
2716: OP(xxcb,d7) { _A = SET(2, RM(EA) ); WM( EA,_A ); } /* SET 2,A=(XY+o) */
2717:
2718: OP(xxcb,d8) { _B = SET(3, RM(EA) ); WM( EA,_B ); } /* SET 3,B=(XY+o) */
2719: OP(xxcb,d9) { _C = SET(3, RM(EA) ); WM( EA,_C ); } /* SET 3,C=(XY+o) */
2720: OP(xxcb,da) { _D = SET(3, RM(EA) ); WM( EA,_D ); } /* SET 3,D=(XY+o) */
2721: OP(xxcb,db) { _E = SET(3, RM(EA) ); WM( EA,_E ); } /* SET 3,E=(XY+o) */
2722: OP(xxcb,dc) { _H = SET(3, RM(EA) ); WM( EA,_H ); } /* SET 3,H=(XY+o) */
2723: OP(xxcb,dd) { _L = SET(3, RM(EA) ); WM( EA,_L ); } /* SET 3,L=(XY+o) */
2724: OP(xxcb,de) { WM( EA, SET(3,RM(EA)) ); } /* SET 3,(XY+o) */
2725: OP(xxcb,df) { _A = SET(3, RM(EA) ); WM( EA,_A ); } /* SET 3,A=(XY+o) */
2726:
2727: OP(xxcb,e0) { _B = SET(4, RM(EA) ); WM( EA,_B ); } /* SET 4,B=(XY+o) */
2728: OP(xxcb,e1) { _C = SET(4, RM(EA) ); WM( EA,_C ); } /* SET 4,C=(XY+o) */
2729: OP(xxcb,e2) { _D = SET(4, RM(EA) ); WM( EA,_D ); } /* SET 4,D=(XY+o) */
2730: OP(xxcb,e3) { _E = SET(4, RM(EA) ); WM( EA,_E ); } /* SET 4,E=(XY+o) */
2731: OP(xxcb,e4) { _H = SET(4, RM(EA) ); WM( EA,_H ); } /* SET 4,H=(XY+o) */
2732: OP(xxcb,e5) { _L = SET(4, RM(EA) ); WM( EA,_L ); } /* SET 4,L=(XY+o) */
2733: OP(xxcb,e6) { WM( EA, SET(4,RM(EA)) ); } /* SET 4,(XY+o) */
2734: OP(xxcb,e7) { _A = SET(4, RM(EA) ); WM( EA,_A ); } /* SET 4,A=(XY+o) */
2735:
2736: OP(xxcb,e8) { _B = SET(5, RM(EA) ); WM( EA,_B ); } /* SET 5,B=(XY+o) */
2737: OP(xxcb,e9) { _C = SET(5, RM(EA) ); WM( EA,_C ); } /* SET 5,C=(XY+o) */
2738: OP(xxcb,ea) { _D = SET(5, RM(EA) ); WM( EA,_D ); } /* SET 5,D=(XY+o) */
2739: OP(xxcb,eb) { _E = SET(5, RM(EA) ); WM( EA,_E ); } /* SET 5,E=(XY+o) */
2740: OP(xxcb,ec) { _H = SET(5, RM(EA) ); WM( EA,_H ); } /* SET 5,H=(XY+o) */
2741: OP(xxcb,ed) { _L = SET(5, RM(EA) ); WM( EA,_L ); } /* SET 5,L=(XY+o) */
2742: OP(xxcb,ee) { WM( EA, SET(5,RM(EA)) ); } /* SET 5,(XY+o) */
2743: OP(xxcb,ef) { _A = SET(5, RM(EA) ); WM( EA,_A ); } /* SET 5,A=(XY+o) */
2744:
2745: OP(xxcb,f0) { _B = SET(6, RM(EA) ); WM( EA,_B ); } /* SET 6,B=(XY+o) */
2746: OP(xxcb,f1) { _C = SET(6, RM(EA) ); WM( EA,_C ); } /* SET 6,C=(XY+o) */
2747: OP(xxcb,f2) { _D = SET(6, RM(EA) ); WM( EA,_D ); } /* SET 6,D=(XY+o) */
2748: OP(xxcb,f3) { _E = SET(6, RM(EA) ); WM( EA,_E ); } /* SET 6,E=(XY+o) */
2749: OP(xxcb,f4) { _H = SET(6, RM(EA) ); WM( EA,_H ); } /* SET 6,H=(XY+o) */
2750: OP(xxcb,f5) { _L = SET(6, RM(EA) ); WM( EA,_L ); } /* SET 6,L=(XY+o) */
2751: OP(xxcb,f6) { WM( EA, SET(6,RM(EA)) ); } /* SET 6,(XY+o) */
2752: OP(xxcb,f7) { _A = SET(6, RM(EA) ); WM( EA,_A ); } /* SET 6,A=(XY+o) */
2753:
2754: OP(xxcb,f8) { _B = SET(7, RM(EA) ); WM( EA,_B ); } /* SET 7,B=(XY+o) */
2755: OP(xxcb,f9) { _C = SET(7, RM(EA) ); WM( EA,_C ); } /* SET 7,C=(XY+o) */
2756: OP(xxcb,fa) { _D = SET(7, RM(EA) ); WM( EA,_D ); } /* SET 7,D=(XY+o) */
2757: OP(xxcb,fb) { _E = SET(7, RM(EA) ); WM( EA,_E ); } /* SET 7,E=(XY+o) */
2758: OP(xxcb,fc) { _H = SET(7, RM(EA) ); WM( EA,_H ); } /* SET 7,H=(XY+o) */
2759: OP(xxcb,fd) { _L = SET(7, RM(EA) ); WM( EA,_L ); } /* SET 7,L=(XY+o) */
2760: OP(xxcb,fe) { WM( EA, SET(7,RM(EA)) ); } /* SET 7,(XY+o) */
2761: OP(xxcb,ff) { _A = SET(7, RM(EA) ); WM( EA,_A ); } /* SET 7,A=(XY+o) */
2762:
2763: OP(illegal,1) {
2764: _PC--;
2765: if( errorlog )
2766: fprintf(errorlog, "Z80#%d ill. opcode $%02x $%02x\n",
2767: cpu_getactivecpu(), cpu_readop((_PCD-1)&0xffff), cpu_readop(_PCD));
2768: }
2769:
2770: /**********************************************************
2771: * IX register related opcodes (DD prefix)
2772: **********************************************************/
2773: OP(dd,00) { illegal_1(); } /* DB DD */
2774: OP(dd,01) { illegal_1(); } /* DB DD */
2775: OP(dd,02) { illegal_1(); } /* DB DD */
2776: OP(dd,03) { illegal_1(); } /* DB DD */
2777: OP(dd,04) { illegal_1(); } /* DB DD */
2778: OP(dd,05) { illegal_1(); } /* DB DD */
2779: OP(dd,06) { illegal_1(); } /* DB DD */
2780: OP(dd,07) { illegal_1(); } /* DB DD */
2781:
2782: OP(dd,08) { illegal_1(); } /* DB DD */
2783: OP(dd,09) { ADD16(IX,BC); } /* ADD IX,BC */
2784: OP(dd,0a) { illegal_1(); } /* DB DD */
2785: OP(dd,0b) { illegal_1(); } /* DB DD */
2786: OP(dd,0c) { illegal_1(); } /* DB DD */
2787: OP(dd,0d) { illegal_1(); } /* DB DD */
2788: OP(dd,0e) { illegal_1(); } /* DB DD */
2789: OP(dd,0f) { illegal_1(); } /* DB DD */
2790:
2791: OP(dd,10) { illegal_1(); } /* DB DD */
2792: OP(dd,11) { illegal_1(); } /* DB DD */
2793: OP(dd,12) { illegal_1(); } /* DB DD */
2794: OP(dd,13) { illegal_1(); } /* DB DD */
2795: OP(dd,14) { illegal_1(); } /* DB DD */
2796: OP(dd,15) { illegal_1(); } /* DB DD */
2797: OP(dd,16) { illegal_1(); } /* DB DD */
2798: OP(dd,17) { illegal_1(); } /* DB DD */
2799:
2800: OP(dd,18) { illegal_1(); } /* DB DD */
2801: OP(dd,19) { ADD16(IX,DE); } /* ADD IX,DE */
2802: OP(dd,1a) { illegal_1(); } /* DB DD */
2803: OP(dd,1b) { illegal_1(); } /* DB DD */
2804: OP(dd,1c) { illegal_1(); } /* DB DD */
2805: OP(dd,1d) { illegal_1(); } /* DB DD */
2806: OP(dd,1e) { illegal_1(); } /* DB DD */
2807: OP(dd,1f) { illegal_1(); } /* DB DD */
2808:
2809: OP(dd,20) { illegal_1(); } /* DB DD */
2810: OP(dd,21) { _IX = ARG16(); } /* LD IX,w */
2811: OP(dd,22) { EA = ARG16(); WM16( EA, &Z80.IX ); } /* LD (w),IX */
2812: OP(dd,23) { _IX++; } /* INC IX */
2813: OP(dd,24) { _HX = INC(_HX); } /* INC HX */
2814: OP(dd,25) { _HX = DEC(_HX); } /* DEC HX */
2815: OP(dd,26) { _HX = ARG(); } /* LD HX,n */
2816: OP(dd,27) { illegal_1(); } /* DB DD */
2817:
2818: OP(dd,28) { illegal_1(); } /* DB DD */
2819: OP(dd,29) { ADD16(IX,IX); } /* ADD IX,IX */
2820: OP(dd,2a) { EA = ARG16(); RM16( EA, &Z80.IX ); } /* LD IX,(w) */
2821: OP(dd,2b) { _IX--; } /* DEC IX */
2822: OP(dd,2c) { _LX = INC(_LX); } /* INC LX */
2823: OP(dd,2d) { _LX = DEC(_LX); } /* DEC LX */
2824: OP(dd,2e) { _LX = ARG(); } /* LD LX,n */
2825: OP(dd,2f) { illegal_1(); } /* DB DD */
2826:
2827: OP(dd,30) { illegal_1(); } /* DB DD */
2828: OP(dd,31) { illegal_1(); } /* DB DD */
2829: OP(dd,32) { illegal_1(); } /* DB DD */
2830: OP(dd,33) { illegal_1(); } /* DB DD */
2831: OP(dd,34) { EAX; WM( EA, INC(RM(EA)) ); } /* INC (IX+o) */
2832: OP(dd,35) { EAX; WM( EA, DEC(RM(EA)) ); } /* DEC (IX+o) */
2833: OP(dd,36) { EAX; WM( EA, ARG() ); } /* LD (IX+o),n */
2834: OP(dd,37) { illegal_1(); } /* DB DD */
2835:
2836: OP(dd,38) { illegal_1(); } /* DB DD */
2837: OP(dd,39) { ADD16(IX,SP); } /* ADD IX,SP */
2838: OP(dd,3a) { illegal_1(); } /* DB DD */
2839: OP(dd,3b) { illegal_1(); } /* DB DD */
2840: OP(dd,3c) { illegal_1(); } /* DB DD */
2841: OP(dd,3d) { illegal_1(); } /* DB DD */
2842: OP(dd,3e) { illegal_1(); } /* DB DD */
2843: OP(dd,3f) { illegal_1(); } /* DB DD */
2844:
2845: OP(dd,40) { illegal_1(); } /* DB DD */
2846: OP(dd,41) { illegal_1(); } /* DB DD */
2847: OP(dd,42) { illegal_1(); } /* DB DD */
2848: OP(dd,43) { illegal_1(); } /* DB DD */
2849: OP(dd,44) { _B = _HX; } /* LD B,HX */
2850: OP(dd,45) { _B = _LX; } /* LD B,LX */
2851: OP(dd,46) { EAX; _B = RM(EA); } /* LD B,(IX+o) */
2852: OP(dd,47) { illegal_1(); } /* DB DD */
2853:
2854: OP(dd,48) { illegal_1(); } /* DB DD */
2855: OP(dd,49) { illegal_1(); } /* DB DD */
2856: OP(dd,4a) { illegal_1(); } /* DB DD */
2857: OP(dd,4b) { illegal_1(); } /* DB DD */
2858: OP(dd,4c) { _C = _HX; } /* LD C,HX */
2859: OP(dd,4d) { _C = _LX; } /* LD C,LX */
2860: OP(dd,4e) { EAX; _C = RM(EA); } /* LD C,(IX+o) */
2861: OP(dd,4f) { illegal_1(); } /* DB DD */
2862:
2863: OP(dd,50) { illegal_1(); } /* DB DD */
2864: OP(dd,51) { illegal_1(); } /* DB DD */
2865: OP(dd,52) { illegal_1(); } /* DB DD */
2866: OP(dd,53) { illegal_1(); } /* DB DD */
2867: OP(dd,54) { _D = _HX; } /* LD D,HX */
2868: OP(dd,55) { _D = _LX; } /* LD D,LX */
2869: OP(dd,56) { EAX; _D = RM(EA); } /* LD D,(IX+o) */
2870: OP(dd,57) { illegal_1(); } /* DB DD */
2871:
2872: OP(dd,58) { illegal_1(); } /* DB DD */
2873: OP(dd,59) { illegal_1(); } /* DB DD */
2874: OP(dd,5a) { illegal_1(); } /* DB DD */
2875: OP(dd,5b) { illegal_1(); } /* DB DD */
2876: OP(dd,5c) { _E = _HX; } /* LD E,HX */
2877: OP(dd,5d) { _E = _LX; } /* LD E,LX */
2878: OP(dd,5e) { EAX; _E = RM(EA); } /* LD E,(IX+o) */
2879: OP(dd,5f) { illegal_1(); } /* DB DD */
2880:
2881: OP(dd,60) { _HX = _B; } /* LD HX,B */
2882: OP(dd,61) { _HX = _C; } /* LD HX,C */
2883: OP(dd,62) { _HX = _D; } /* LD HX,D */
2884: OP(dd,63) { _HX = _E; } /* LD HX,E */
2885: OP(dd,64) { } /* LD HX,HX */
2886: OP(dd,65) { _HX = _LX; } /* LD HX,LX */
2887: OP(dd,66) { EAX; _H = RM(EA); } /* LD H,(IX+o) */
2888: OP(dd,67) { _HX = _A; } /* LD HX,A */
2889:
2890: OP(dd,68) { _LX = _B; } /* LD LX,B */
2891: OP(dd,69) { _LX = _C; } /* LD LX,C */
2892: OP(dd,6a) { _LX = _D; } /* LD LX,D */
2893: OP(dd,6b) { _LX = _E; } /* LD LX,E */
2894: OP(dd,6c) { _LX = _HX; } /* LD LX,HX */
2895: OP(dd,6d) { } /* LD LX,LX */
2896: OP(dd,6e) { EAX; _L = RM(EA); } /* LD L,(IX+o) */
2897: OP(dd,6f) { _LX = _A; } /* LD LX,A */
2898:
2899: OP(dd,70) { EAX; WM( EA, _B ); } /* LD (IX+o),B */
2900: OP(dd,71) { EAX; WM( EA, _C ); } /* LD (IX+o),C */
2901: OP(dd,72) { EAX; WM( EA, _D ); } /* LD (IX+o),D */
2902: OP(dd,73) { EAX; WM( EA, _E ); } /* LD (IX+o),E */
2903: OP(dd,74) { EAX; WM( EA, _H ); } /* LD (IX+o),H */
2904: OP(dd,75) { EAX; WM( EA, _L ); } /* LD (IX+o),L */
2905: OP(dd,76) { illegal_1(); } /* DB DD */
2906: OP(dd,77) { EAX; WM( EA, _A ); } /* LD (IX+o),A */
2907:
2908: OP(dd,78) { illegal_1(); } /* DB DD */
2909: OP(dd,79) { illegal_1(); } /* DB DD */
2910: OP(dd,7a) { illegal_1(); } /* DB DD */
2911: OP(dd,7b) { illegal_1(); } /* DB DD */
2912: OP(dd,7c) { _A = _HX; } /* LD A,HX */
2913: OP(dd,7d) { _A = _LX; } /* LD A,LX */
2914: OP(dd,7e) { EAX; _A = RM(EA); } /* LD A,(IX+o) */
2915: OP(dd,7f) { illegal_1(); } /* DB DD */
2916:
2917: OP(dd,80) { illegal_1(); } /* DB DD */
2918: OP(dd,81) { illegal_1(); } /* DB DD */
2919: OP(dd,82) { illegal_1(); } /* DB DD */
2920: OP(dd,83) { illegal_1(); } /* DB DD */
2921: OP(dd,84) { ADD(_HX); } /* ADD A,HX */
2922: OP(dd,85) { ADD(_LX); } /* ADD A,LX */
2923: OP(dd,86) { EAX; ADD(RM(EA)); } /* ADD A,(IX+o) */
2924: OP(dd,87) { illegal_1(); } /* DB DD */
2925:
2926: OP(dd,88) { illegal_1(); } /* DB DD */
2927: OP(dd,89) { illegal_1(); } /* DB DD */
2928: OP(dd,8a) { illegal_1(); } /* DB DD */
2929: OP(dd,8b) { illegal_1(); } /* DB DD */
2930: OP(dd,8c) { ADC(_HX); } /* ADC A,HX */
2931: OP(dd,8d) { ADC(_LX); } /* ADC A,LX */
2932: OP(dd,8e) { EAX; ADC(RM(EA)); } /* ADC A,(IX+o) */
2933: OP(dd,8f) { illegal_1(); } /* DB DD */
2934:
2935: OP(dd,90) { illegal_1(); } /* DB DD */
2936: OP(dd,91) { illegal_1(); } /* DB DD */
2937: OP(dd,92) { illegal_1(); } /* DB DD */
2938: OP(dd,93) { illegal_1(); } /* DB DD */
2939: OP(dd,94) { SUB(_HX); } /* SUB HX */
2940: OP(dd,95) { SUB(_LX); } /* SUB LX */
2941: OP(dd,96) { EAX; SUB(RM(EA)); } /* SUB (IX+o) */
2942: OP(dd,97) { illegal_1(); } /* DB DD */
2943:
2944: OP(dd,98) { illegal_1(); } /* DB DD */
2945: OP(dd,99) { illegal_1(); } /* DB DD */
2946: OP(dd,9a) { illegal_1(); } /* DB DD */
2947: OP(dd,9b) { illegal_1(); } /* DB DD */
2948: OP(dd,9c) { SBC(_HX); } /* SBC A,HX */
2949: OP(dd,9d) { SBC(_LX); } /* SBC A,LX */
2950: OP(dd,9e) { EAX; SBC(RM(EA)); } /* SBC A,(IX+o) */
2951: OP(dd,9f) { illegal_1(); } /* DB DD */
2952:
2953: OP(dd,a0) { illegal_1(); } /* DB DD */
2954: OP(dd,a1) { illegal_1(); } /* DB DD */
2955: OP(dd,a2) { illegal_1(); } /* DB DD */
2956: OP(dd,a3) { illegal_1(); } /* DB DD */
2957: OP(dd,a4) { AND(_HX); } /* AND HX */
2958: OP(dd,a5) { AND(_LX); } /* AND LX */
2959: OP(dd,a6) { EAX; AND(RM(EA)); } /* AND (IX+o) */
2960: OP(dd,a7) { illegal_1(); } /* DB DD */
2961:
2962: OP(dd,a8) { illegal_1(); } /* DB DD */
2963: OP(dd,a9) { illegal_1(); } /* DB DD */
2964: OP(dd,aa) { illegal_1(); } /* DB DD */
2965: OP(dd,ab) { illegal_1(); } /* DB DD */
2966: OP(dd,ac) { XOR(_HX); } /* XOR HX */
2967: OP(dd,ad) { XOR(_LX); } /* XOR LX */
2968: OP(dd,ae) { EAX; XOR(RM(EA)); } /* XOR (IX+o) */
2969: OP(dd,af) { illegal_1(); } /* DB DD */
2970:
2971: OP(dd,b0) { illegal_1(); } /* DB DD */
2972: OP(dd,b1) { illegal_1(); } /* DB DD */
2973: OP(dd,b2) { illegal_1(); } /* DB DD */
2974: OP(dd,b3) { illegal_1(); } /* DB DD */
2975: OP(dd,b4) { OR(_HX); } /* OR HX */
2976: OP(dd,b5) { OR(_LX); } /* OR LX */
2977: OP(dd,b6) { EAX; OR(RM(EA)); } /* OR (IX+o) */
2978: OP(dd,b7) { illegal_1(); } /* DB DD */
2979:
2980: OP(dd,b8) { illegal_1(); } /* DB DD */
2981: OP(dd,b9) { illegal_1(); } /* DB DD */
2982: OP(dd,ba) { illegal_1(); } /* DB DD */
2983: OP(dd,bb) { illegal_1(); } /* DB DD */
2984: OP(dd,bc) { CP(_HX); } /* CP HX */
2985: OP(dd,bd) { CP(_LX); } /* CP LX */
2986: OP(dd,be) { EAX; CP(RM(EA)); } /* CP (IX+o) */
2987: OP(dd,bf) { illegal_1(); } /* DB DD */
2988:
2989: OP(dd,c0) { illegal_1(); } /* DB DD */
2990: OP(dd,c1) { illegal_1(); } /* DB DD */
2991: OP(dd,c2) { illegal_1(); } /* DB DD */
2992: OP(dd,c3) { illegal_1(); } /* DB DD */
2993: OP(dd,c4) { illegal_1(); } /* DB DD */
2994: OP(dd,c5) { illegal_1(); } /* DB DD */
2995: OP(dd,c6) { illegal_1(); } /* DB DD */
2996: OP(dd,c7) { illegal_1(); } /* DB DD */
2997:
2998: OP(dd,c8) { illegal_1(); } /* DB DD */
2999: OP(dd,c9) { illegal_1(); } /* DB DD */
3000: OP(dd,ca) { illegal_1(); } /* DB DD */
3001: OP(dd,cb) { EAX; EXEC(xxcb,ARG()); } /* ** DD CB xx */
3002: OP(dd,cc) { illegal_1(); } /* DB DD */
3003: OP(dd,cd) { illegal_1(); } /* DB DD */
3004: OP(dd,ce) { illegal_1(); } /* DB DD */
3005: OP(dd,cf) { illegal_1(); } /* DB DD */
3006:
3007: OP(dd,d0) { illegal_1(); } /* DB DD */
3008: OP(dd,d1) { illegal_1(); } /* DB DD */
3009: OP(dd,d2) { illegal_1(); } /* DB DD */
3010: OP(dd,d3) { illegal_1(); } /* DB DD */
3011: OP(dd,d4) { illegal_1(); } /* DB DD */
3012: OP(dd,d5) { illegal_1(); } /* DB DD */
3013: OP(dd,d6) { illegal_1(); } /* DB DD */
3014: OP(dd,d7) { illegal_1(); } /* DB DD */
3015:
3016: OP(dd,d8) { illegal_1(); } /* DB DD */
3017: OP(dd,d9) { illegal_1(); } /* DB DD */
3018: OP(dd,da) { illegal_1(); } /* DB DD */
3019: OP(dd,db) { illegal_1(); } /* DB DD */
3020: OP(dd,dc) { illegal_1(); } /* DB DD */
3021: OP(dd,dd) { illegal_1(); } /* DB DD */
3022: OP(dd,de) { illegal_1(); } /* DB DD */
3023: OP(dd,df) { illegal_1(); } /* DB DD */
3024:
3025: OP(dd,e0) { illegal_1(); } /* DB DD */
3026: OP(dd,e1) { POP(IX); } /* POP IX */
3027: OP(dd,e2) { illegal_1(); } /* DB DD */
3028: OP(dd,e3) { EXSP(IX); } /* EX (SP),IX */
3029: OP(dd,e4) { illegal_1(); } /* DB DD */
3030: OP(dd,e5) { PUSH( IX ); } /* PUSH IX */
3031: OP(dd,e6) { illegal_1(); } /* DB DD */
3032: OP(dd,e7) { illegal_1(); } /* DB DD */
3033:
3034: OP(dd,e8) { illegal_1(); } /* DB DD */
3035: OP(dd,e9) { _PC = _IX; change_pc16(_PCD); } /* JP (IX) */
3036: OP(dd,ea) { illegal_1(); } /* DB DD */
3037: OP(dd,eb) { illegal_1(); } /* DB DD */
3038: OP(dd,ec) { illegal_1(); } /* DB DD */
3039: OP(dd,ed) { illegal_1(); } /* DB DD */
3040: OP(dd,ee) { illegal_1(); } /* DB DD */
3041: OP(dd,ef) { illegal_1(); } /* DB DD */
3042:
3043: OP(dd,f0) { illegal_1(); } /* DB DD */
3044: OP(dd,f1) { illegal_1(); } /* DB DD */
3045: OP(dd,f2) { illegal_1(); } /* DB DD */
3046: OP(dd,f3) { illegal_1(); } /* DB DD */
3047: OP(dd,f4) { illegal_1(); } /* DB DD */
3048: OP(dd,f5) { illegal_1(); } /* DB DD */
3049: OP(dd,f6) { illegal_1(); } /* DB DD */
3050: OP(dd,f7) { illegal_1(); } /* DB DD */
3051:
3052: OP(dd,f8) { illegal_1(); } /* DB DD */
3053: OP(dd,f9) { _SP = _IX; } /* LD SP,IX */
3054: OP(dd,fa) { illegal_1(); } /* DB DD */
3055: OP(dd,fb) { illegal_1(); } /* DB DD */
3056: OP(dd,fc) { illegal_1(); } /* DB DD */
3057: OP(dd,fd) { illegal_1(); } /* DB DD */
3058: OP(dd,fe) { illegal_1(); } /* DB DD */
3059: OP(dd,ff) { illegal_1(); } /* DB DD */
3060:
3061: /**********************************************************
3062: * IY register related opcodes (FD prefix)
3063: **********************************************************/
3064: OP(fd,00) { illegal_1(); } /* DB FD */
3065: OP(fd,01) { illegal_1(); } /* DB FD */
3066: OP(fd,02) { illegal_1(); } /* DB FD */
3067: OP(fd,03) { illegal_1(); } /* DB FD */
3068: OP(fd,04) { illegal_1(); } /* DB FD */
3069: OP(fd,05) { illegal_1(); } /* DB FD */
3070: OP(fd,06) { illegal_1(); } /* DB FD */
3071: OP(fd,07) { illegal_1(); } /* DB FD */
3072:
3073: OP(fd,08) { illegal_1(); } /* DB FD */
3074: OP(fd,09) { ADD16(IY,BC); } /* ADD IY,BC */
3075: OP(fd,0a) { illegal_1(); } /* DB FD */
3076: OP(fd,0b) { illegal_1(); } /* DB FD */
3077: OP(fd,0c) { illegal_1(); } /* DB FD */
3078: OP(fd,0d) { illegal_1(); } /* DB FD */
3079: OP(fd,0e) { illegal_1(); } /* DB FD */
3080: OP(fd,0f) { illegal_1(); } /* DB FD */
3081:
3082: OP(fd,10) { illegal_1(); } /* DB FD */
3083: OP(fd,11) { illegal_1(); } /* DB FD */
3084: OP(fd,12) { illegal_1(); } /* DB FD */
3085: OP(fd,13) { illegal_1(); } /* DB FD */
3086: OP(fd,14) { illegal_1(); } /* DB FD */
3087: OP(fd,15) { illegal_1(); } /* DB FD */
3088: OP(fd,16) { illegal_1(); } /* DB FD */
3089: OP(fd,17) { illegal_1(); } /* DB FD */
3090:
3091: OP(fd,18) { illegal_1(); } /* DB FD */
3092: OP(fd,19) { ADD16(IY,DE); } /* ADD IY,DE */
3093: OP(fd,1a) { illegal_1(); } /* DB FD */
3094: OP(fd,1b) { illegal_1(); } /* DB FD */
3095: OP(fd,1c) { illegal_1(); } /* DB FD */
3096: OP(fd,1d) { illegal_1(); } /* DB FD */
3097: OP(fd,1e) { illegal_1(); } /* DB FD */
3098: OP(fd,1f) { illegal_1(); } /* DB FD */
3099:
3100: OP(fd,20) { illegal_1(); } /* DB FD */
3101: OP(fd,21) { _IY = ARG16(); } /* LD IY,w */
3102: OP(fd,22) { EA = ARG16(); WM16( EA, &Z80.IY ); } /* LD (w),IY */
3103: OP(fd,23) { _IY++; } /* INC IY */
3104: OP(fd,24) { _HY = INC(_HY); } /* INC HY */
3105: OP(fd,25) { _HY = DEC(_HY); } /* DEC HY */
3106: OP(fd,26) { _HY = ARG(); } /* LD HY,n */
3107: OP(fd,27) { illegal_1(); } /* DB FD */
3108:
3109: OP(fd,28) { illegal_1(); } /* DB FD */
3110: OP(fd,29) { ADD16(IY,IY); } /* ADD IY,IY */
3111: OP(fd,2a) { EA = ARG16(); RM16( EA, &Z80.IY ); } /* LD IY,(w) */
3112: OP(fd,2b) { _IY--; } /* DEC IY */
3113: OP(fd,2c) { _LY = INC(_LY); } /* INC LY */
3114: OP(fd,2d) { _LY = DEC(_LY); } /* DEC LY */
3115: OP(fd,2e) { _LY = ARG(); } /* LD LY,n */
3116: OP(fd,2f) { illegal_1(); } /* DB FD */
3117:
3118: OP(fd,30) { illegal_1(); } /* DB FD */
3119: OP(fd,31) { illegal_1(); } /* DB FD */
3120: OP(fd,32) { illegal_1(); } /* DB FD */
3121: OP(fd,33) { illegal_1(); } /* DB FD */
3122: OP(fd,34) { EAY; WM( EA, INC(RM(EA)) ); } /* INC (IY+o) */
3123: OP(fd,35) { EAY; WM( EA, DEC(RM(EA)) ); } /* DEC (IY+o) */
3124: OP(fd,36) { EAY; WM( EA, ARG() ); } /* LD (IY+o),n */
3125: OP(fd,37) { illegal_1(); } /* DB FD */
3126:
3127: OP(fd,38) { illegal_1(); } /* DB FD */
3128: OP(fd,39) { ADD16(IY,SP); } /* ADD IY,SP */
3129: OP(fd,3a) { illegal_1(); } /* DB FD */
3130: OP(fd,3b) { illegal_1(); } /* DB FD */
3131: OP(fd,3c) { illegal_1(); } /* DB FD */
3132: OP(fd,3d) { illegal_1(); } /* DB FD */
3133: OP(fd,3e) { illegal_1(); } /* DB FD */
3134: OP(fd,3f) { illegal_1(); } /* DB FD */
3135:
3136: OP(fd,40) { illegal_1(); } /* DB FD */
3137: OP(fd,41) { illegal_1(); } /* DB FD */
3138: OP(fd,42) { illegal_1(); } /* DB FD */
3139: OP(fd,43) { illegal_1(); } /* DB FD */
3140: OP(fd,44) { _B = _HY; } /* LD B,HY */
3141: OP(fd,45) { _B = _LY; } /* LD B,LY */
3142: OP(fd,46) { EAY; _B = RM(EA); } /* LD B,(IY+o) */
3143: OP(fd,47) { illegal_1(); } /* DB FD */
3144:
3145: OP(fd,48) { illegal_1(); } /* DB FD */
3146: OP(fd,49) { illegal_1(); } /* DB FD */
3147: OP(fd,4a) { illegal_1(); } /* DB FD */
3148: OP(fd,4b) { illegal_1(); } /* DB FD */
3149: OP(fd,4c) { _C = _HY; } /* LD C,HY */
3150: OP(fd,4d) { _C = _LY; } /* LD C,LY */
3151: OP(fd,4e) { EAY; _C = RM(EA); } /* LD C,(IY+o) */
3152: OP(fd,4f) { illegal_1(); } /* DB FD */
3153:
3154: OP(fd,50) { illegal_1(); } /* DB FD */
3155: OP(fd,51) { illegal_1(); } /* DB FD */
3156: OP(fd,52) { illegal_1(); } /* DB FD */
3157: OP(fd,53) { illegal_1(); } /* DB FD */
3158: OP(fd,54) { _D = _HY; } /* LD D,HY */
3159: OP(fd,55) { _D = _LY; } /* LD D,LY */
3160: OP(fd,56) { EAY; _D = RM(EA); } /* LD D,(IY+o) */
3161: OP(fd,57) { illegal_1(); } /* DB FD */
3162:
3163: OP(fd,58) { illegal_1(); } /* DB FD */
3164: OP(fd,59) { illegal_1(); } /* DB FD */
3165: OP(fd,5a) { illegal_1(); } /* DB FD */
3166: OP(fd,5b) { illegal_1(); } /* DB FD */
3167: OP(fd,5c) { _E = _HY; } /* LD E,HY */
3168: OP(fd,5d) { _E = _LY; } /* LD E,LY */
3169: OP(fd,5e) { EAY; _E = RM(EA); } /* LD E,(IY+o) */
3170: OP(fd,5f) { illegal_1(); } /* DB FD */
3171:
3172: OP(fd,60) { _HY = _B; } /* LD HY,B */
3173: OP(fd,61) { _HY = _C; } /* LD HY,C */
3174: OP(fd,62) { _HY = _D; } /* LD HY,D */
3175: OP(fd,63) { _HY = _E; } /* LD HY,E */
3176: OP(fd,64) { } /* LD HY,HY */
3177: OP(fd,65) { _HY = _LY; } /* LD HY,LY */
3178: OP(fd,66) { EAY; _H = RM(EA); } /* LD H,(IY+o) */
3179: OP(fd,67) { _HY = _A; } /* LD HY,A */
3180:
3181: OP(fd,68) { _LY = _B; } /* LD LY,B */
3182: OP(fd,69) { _LY = _C; } /* LD LY,C */
3183: OP(fd,6a) { _LY = _D; } /* LD LY,D */
3184: OP(fd,6b) { _LY = _E; } /* LD LY,E */
3185: OP(fd,6c) { _LY = _HY; } /* LD LY,HY */
3186: OP(fd,6d) { } /* LD LY,LY */
3187: OP(fd,6e) { EAY; _L = RM(EA); } /* LD L,(IY+o) */
3188: OP(fd,6f) { _LY = _A; } /* LD LY,A */
3189:
3190: OP(fd,70) { EAY; WM( EA, _B ); } /* LD (IY+o),B */
3191: OP(fd,71) { EAY; WM( EA, _C ); } /* LD (IY+o),C */
3192: OP(fd,72) { EAY; WM( EA, _D ); } /* LD (IY+o),D */
3193: OP(fd,73) { EAY; WM( EA, _E ); } /* LD (IY+o),E */
3194: OP(fd,74) { EAY; WM( EA, _H ); } /* LD (IY+o),H */
3195: OP(fd,75) { EAY; WM( EA, _L ); } /* LD (IY+o),L */
3196: OP(fd,76) { illegal_1(); } /* DB FD */
3197: OP(fd,77) { EAY; WM( EA, _A ); } /* LD (IY+o),A */
3198:
3199: OP(fd,78) { illegal_1(); } /* DB FD */
3200: OP(fd,79) { illegal_1(); } /* DB FD */
3201: OP(fd,7a) { illegal_1(); } /* DB FD */
3202: OP(fd,7b) { illegal_1(); } /* DB FD */
3203: OP(fd,7c) { _A = _HY; } /* LD A,HY */
3204: OP(fd,7d) { _A = _LY; } /* LD A,LY */
3205: OP(fd,7e) { EAY; _A = RM(EA); } /* LD A,(IY+o) */
3206: OP(fd,7f) { illegal_1(); } /* DB FD */
3207:
3208: OP(fd,80) { illegal_1(); } /* DB FD */
3209: OP(fd,81) { illegal_1(); } /* DB FD */
3210: OP(fd,82) { illegal_1(); } /* DB FD */
3211: OP(fd,83) { illegal_1(); } /* DB FD */
3212: OP(fd,84) { ADD(_HY); } /* ADD A,HY */
3213: OP(fd,85) { ADD(_LY); } /* ADD A,LY */
3214: OP(fd,86) { EAY; ADD(RM(EA)); } /* ADD A,(IY+o) */
3215: OP(fd,87) { illegal_1(); } /* DB FD */
3216:
3217: OP(fd,88) { illegal_1(); } /* DB FD */
3218: OP(fd,89) { illegal_1(); } /* DB FD */
3219: OP(fd,8a) { illegal_1(); } /* DB FD */
3220: OP(fd,8b) { illegal_1(); } /* DB FD */
3221: OP(fd,8c) { ADC(_HY); } /* ADC A,HY */
3222: OP(fd,8d) { ADC(_LY); } /* ADC A,LY */
3223: OP(fd,8e) { EAY; ADC(RM(EA)); } /* ADC A,(IY+o) */
3224: OP(fd,8f) { illegal_1(); } /* DB FD */
3225:
3226: OP(fd,90) { illegal_1(); } /* DB FD */
3227: OP(fd,91) { illegal_1(); } /* DB FD */
3228: OP(fd,92) { illegal_1(); } /* DB FD */
3229: OP(fd,93) { illegal_1(); } /* DB FD */
3230: OP(fd,94) { SUB(_HY); } /* SUB HY */
3231: OP(fd,95) { SUB(_LY); } /* SUB LY */
3232: OP(fd,96) { EAY; SUB(RM(EA)); } /* SUB (IY+o) */
3233: OP(fd,97) { illegal_1(); } /* DB FD */
3234:
3235: OP(fd,98) { illegal_1(); } /* DB FD */
3236: OP(fd,99) { illegal_1(); } /* DB FD */
3237: OP(fd,9a) { illegal_1(); } /* DB FD */
3238: OP(fd,9b) { illegal_1(); } /* DB FD */
3239: OP(fd,9c) { SBC(_HY); } /* SBC A,HY */
3240: OP(fd,9d) { SBC(_LY); } /* SBC A,LY */
3241: OP(fd,9e) { EAY; SBC(RM(EA)); } /* SBC A,(IY+o) */
3242: OP(fd,9f) { illegal_1(); } /* DB FD */
3243:
3244: OP(fd,a0) { illegal_1(); } /* DB FD */
3245: OP(fd,a1) { illegal_1(); } /* DB FD */
3246: OP(fd,a2) { illegal_1(); } /* DB FD */
3247: OP(fd,a3) { illegal_1(); } /* DB FD */
3248: OP(fd,a4) { AND(_HY); } /* AND HY */
3249: OP(fd,a5) { AND(_LY); } /* AND LY */
3250: OP(fd,a6) { EAY; AND(RM(EA)); } /* AND (IY+o) */
3251: OP(fd,a7) { illegal_1(); } /* DB FD */
3252:
3253: OP(fd,a8) { illegal_1(); } /* DB FD */
3254: OP(fd,a9) { illegal_1(); } /* DB FD */
3255: OP(fd,aa) { illegal_1(); } /* DB FD */
3256: OP(fd,ab) { illegal_1(); } /* DB FD */
3257: OP(fd,ac) { XOR(_HY); } /* XOR HY */
3258: OP(fd,ad) { XOR(_LY); } /* XOR LY */
3259: OP(fd,ae) { EAY; XOR(RM(EA)); } /* XOR (IY+o) */
3260: OP(fd,af) { illegal_1(); } /* DB FD */
3261:
3262: OP(fd,b0) { illegal_1(); } /* DB FD */
3263: OP(fd,b1) { illegal_1(); } /* DB FD */
3264: OP(fd,b2) { illegal_1(); } /* DB FD */
3265: OP(fd,b3) { illegal_1(); } /* DB FD */
3266: OP(fd,b4) { OR(_HY); } /* OR HY */
3267: OP(fd,b5) { OR(_LY); } /* OR LY */
3268: OP(fd,b6) { EAY; OR(RM(EA)); } /* OR (IY+o) */
3269: OP(fd,b7) { illegal_1(); } /* DB FD */
3270:
3271: OP(fd,b8) { illegal_1(); } /* DB FD */
3272: OP(fd,b9) { illegal_1(); } /* DB FD */
3273: OP(fd,ba) { illegal_1(); } /* DB FD */
3274: OP(fd,bb) { illegal_1(); } /* DB FD */
3275: OP(fd,bc) { CP(_HY); } /* CP HY */
3276: OP(fd,bd) { CP(_LY); } /* CP LY */
3277: OP(fd,be) { EAY; CP(RM(EA)); } /* CP (IY+o) */
3278: OP(fd,bf) { illegal_1(); } /* DB FD */
3279:
3280: OP(fd,c0) { illegal_1(); } /* DB FD */
3281: OP(fd,c1) { illegal_1(); } /* DB FD */
3282: OP(fd,c2) { illegal_1(); } /* DB FD */
3283: OP(fd,c3) { illegal_1(); } /* DB FD */
3284: OP(fd,c4) { illegal_1(); } /* DB FD */
3285: OP(fd,c5) { illegal_1(); } /* DB FD */
3286: OP(fd,c6) { illegal_1(); } /* DB FD */
3287: OP(fd,c7) { illegal_1(); } /* DB FD */
3288:
3289: OP(fd,c8) { illegal_1(); } /* DB FD */
3290: OP(fd,c9) { illegal_1(); } /* DB FD */
3291: OP(fd,ca) { illegal_1(); } /* DB FD */
3292: OP(fd,cb) { EAY; EXEC(xxcb,ARG()); } /* ** FD CB xx */
3293: OP(fd,cc) { illegal_1(); } /* DB FD */
3294: OP(fd,cd) { illegal_1(); } /* DB FD */
3295: OP(fd,ce) { illegal_1(); } /* DB FD */
3296: OP(fd,cf) { illegal_1(); } /* DB FD */
3297:
3298: OP(fd,d0) { illegal_1(); } /* DB FD */
3299: OP(fd,d1) { illegal_1(); } /* DB FD */
3300: OP(fd,d2) { illegal_1(); } /* DB FD */
3301: OP(fd,d3) { illegal_1(); } /* DB FD */
3302: OP(fd,d4) { illegal_1(); } /* DB FD */
3303: OP(fd,d5) { illegal_1(); } /* DB FD */
3304: OP(fd,d6) { illegal_1(); } /* DB FD */
3305: OP(fd,d7) { illegal_1(); } /* DB FD */
3306:
3307: OP(fd,d8) { illegal_1(); } /* DB FD */
3308: OP(fd,d9) { illegal_1(); } /* DB FD */
3309: OP(fd,da) { illegal_1(); } /* DB FD */
3310: OP(fd,db) { illegal_1(); } /* DB FD */
3311: OP(fd,dc) { illegal_1(); } /* DB FD */
3312: OP(fd,dd) { illegal_1(); } /* DB FD */
3313: OP(fd,de) { illegal_1(); } /* DB FD */
3314: OP(fd,df) { illegal_1(); } /* DB FD */
3315:
3316: OP(fd,e0) { illegal_1(); } /* DB FD */
3317: OP(fd,e1) { POP(IY); } /* POP IY */
3318: OP(fd,e2) { illegal_1(); } /* DB FD */
3319: OP(fd,e3) { EXSP(IY); } /* EX (SP),IY */
3320: OP(fd,e4) { illegal_1(); } /* DB FD */
3321: OP(fd,e5) { PUSH( IY ); } /* PUSH IY */
3322: OP(fd,e6) { illegal_1(); } /* DB FD */
3323: OP(fd,e7) { illegal_1(); } /* DB FD */
3324:
3325: OP(fd,e8) { illegal_1(); } /* DB FD */
3326: OP(fd,e9) { _PC = _IY; change_pc16(_PCD); } /* JP (IY) */
3327: OP(fd,ea) { illegal_1(); } /* DB FD */
3328: OP(fd,eb) { illegal_1(); } /* DB FD */
3329: OP(fd,ec) { illegal_1(); } /* DB FD */
3330: OP(fd,ed) { illegal_1(); } /* DB FD */
3331: OP(fd,ee) { illegal_1(); } /* DB FD */
3332: OP(fd,ef) { illegal_1(); } /* DB FD */
3333:
3334: OP(fd,f0) { illegal_1(); } /* DB FD */
3335: OP(fd,f1) { illegal_1(); } /* DB FD */
3336: OP(fd,f2) { illegal_1(); } /* DB FD */
3337: OP(fd,f3) { illegal_1(); } /* DB FD */
3338: OP(fd,f4) { illegal_1(); } /* DB FD */
3339: OP(fd,f5) { illegal_1(); } /* DB FD */
3340: OP(fd,f6) { illegal_1(); } /* DB FD */
3341: OP(fd,f7) { illegal_1(); } /* DB FD */
3342:
3343: OP(fd,f8) { illegal_1(); } /* DB FD */
3344: OP(fd,f9) { _SP = _IY; } /* LD SP,IY */
3345: OP(fd,fa) { illegal_1(); } /* DB FD */
3346: OP(fd,fb) { illegal_1(); } /* DB FD */
3347: OP(fd,fc) { illegal_1(); } /* DB FD */
3348: OP(fd,fd) { illegal_1(); } /* DB FD */
3349: OP(fd,fe) { illegal_1(); } /* DB FD */
3350: OP(fd,ff) { illegal_1(); } /* DB FD */
3351:
3352: OP(illegal,2)
3353: {
3354: if( errorlog )
3355: fprintf(errorlog, "Z80#%d ill. opcode $ed $%02x\n",
3356: cpu_getactivecpu(), cpu_readop((_PCD-1)&0xffff));
3357: }
3358:
3359: /**********************************************************
3360: * special opcodes (ED prefix)
3361: **********************************************************/
3362: OP(ed,00) { illegal_2(); } /* DB ED */
3363: OP(ed,01) { illegal_2(); } /* DB ED */
3364: OP(ed,02) { illegal_2(); } /* DB ED */
3365: OP(ed,03) { illegal_2(); } /* DB ED */
3366: OP(ed,04) { illegal_2(); } /* DB ED */
3367: OP(ed,05) { illegal_2(); } /* DB ED */
3368: OP(ed,06) { illegal_2(); } /* DB ED */
3369: OP(ed,07) { illegal_2(); } /* DB ED */
3370:
3371: OP(ed,08) { illegal_2(); } /* DB ED */
3372: OP(ed,09) { illegal_2(); } /* DB ED */
3373: OP(ed,0a) { illegal_2(); } /* DB ED */
3374: OP(ed,0b) { illegal_2(); } /* DB ED */
3375: OP(ed,0c) { illegal_2(); } /* DB ED */
3376: OP(ed,0d) { illegal_2(); } /* DB ED */
3377: OP(ed,0e) { illegal_2(); } /* DB ED */
3378: OP(ed,0f) { illegal_2(); } /* DB ED */
3379:
3380: OP(ed,10) { illegal_2(); } /* DB ED */
3381: OP(ed,11) { illegal_2(); } /* DB ED */
3382: OP(ed,12) { illegal_2(); } /* DB ED */
3383: OP(ed,13) { illegal_2(); } /* DB ED */
3384: OP(ed,14) { illegal_2(); } /* DB ED */
3385: OP(ed,15) { illegal_2(); } /* DB ED */
3386: OP(ed,16) { illegal_2(); } /* DB ED */
3387: OP(ed,17) { illegal_2(); } /* DB ED */
3388:
3389: OP(ed,18) { illegal_2(); } /* DB ED */
3390: OP(ed,19) { illegal_2(); } /* DB ED */
3391: OP(ed,1a) { illegal_2(); } /* DB ED */
3392: OP(ed,1b) { illegal_2(); } /* DB ED */
3393: OP(ed,1c) { illegal_2(); } /* DB ED */
3394: OP(ed,1d) { illegal_2(); } /* DB ED */
3395: OP(ed,1e) { illegal_2(); } /* DB ED */
3396: OP(ed,1f) { illegal_2(); } /* DB ED */
3397:
3398: OP(ed,20) { illegal_2(); } /* DB ED */
3399: OP(ed,21) { illegal_2(); } /* DB ED */
3400: OP(ed,22) { illegal_2(); } /* DB ED */
3401: OP(ed,23) { illegal_2(); } /* DB ED */
3402: OP(ed,24) { illegal_2(); } /* DB ED */
3403: OP(ed,25) { illegal_2(); } /* DB ED */
3404: OP(ed,26) { illegal_2(); } /* DB ED */
3405: OP(ed,27) { illegal_2(); } /* DB ED */
3406:
3407: OP(ed,28) { illegal_2(); } /* DB ED */
3408: OP(ed,29) { illegal_2(); } /* DB ED */
3409: OP(ed,2a) { illegal_2(); } /* DB ED */
3410: OP(ed,2b) { illegal_2(); } /* DB ED */
3411: OP(ed,2c) { illegal_2(); } /* DB ED */
3412: OP(ed,2d) { illegal_2(); } /* DB ED */
3413: OP(ed,2e) { illegal_2(); } /* DB ED */
3414: OP(ed,2f) { illegal_2(); } /* DB ED */
3415:
3416: OP(ed,30) { illegal_2(); } /* DB ED */
3417: OP(ed,31) { illegal_2(); } /* DB ED */
3418: OP(ed,32) { illegal_2(); } /* DB ED */
3419: OP(ed,33) { illegal_2(); } /* DB ED */
3420: OP(ed,34) { illegal_2(); } /* DB ED */
3421: OP(ed,35) { illegal_2(); } /* DB ED */
3422: OP(ed,36) { illegal_2(); } /* DB ED */
3423: OP(ed,37) { illegal_2(); } /* DB ED */
3424:
3425: OP(ed,38) { illegal_2(); } /* DB ED */
3426: OP(ed,39) { illegal_2(); } /* DB ED */
3427: OP(ed,3a) { illegal_2(); } /* DB ED */
3428: OP(ed,3b) { illegal_2(); } /* DB ED */
3429: OP(ed,3c) { illegal_2(); } /* DB ED */
3430: OP(ed,3d) { illegal_2(); } /* DB ED */
3431: OP(ed,3e) { illegal_2(); } /* DB ED */
3432: OP(ed,3f) { illegal_2(); } /* DB ED */
3433:
3434: OP(ed,40) { _B = IN(_BC); _F = (_F & CF) | SZP[_B]; } /* IN B,(C) */
3435: OP(ed,41) { OUT(_BC,_B); } /* OUT (C),B */
3436: OP(ed,42) { SBC16( BC ); } /* SBC HL,BC */
3437: OP(ed,43) { EA = ARG16(); WM16( EA, &Z80.BC ); } /* LD (w),BC */
3438: OP(ed,44) { NEG; } /* NEG */
3439: OP(ed,45) { RETN; } /* RETN; */
3440: OP(ed,46) { _IM = 0; } /* IM 0 */
3441: OP(ed,47) { LD_I_A; } /* LD I,A */
3442:
3443: OP(ed,48) { _C = IN(_BC); _F = (_F & CF) | SZP[_C]; } /* IN C,(C) */
3444: OP(ed,49) { OUT(_BC,_C); } /* OUT (C),C */
3445: OP(ed,4a) { ADC16( BC ); } /* ADC HL,BC */
3446: OP(ed,4b) { EA = ARG16(); RM16( EA, &Z80.BC ); } /* LD BC,(w) */
3447: OP(ed,4c) { NEG; } /* NEG */
3448: OP(ed,4d) { RETI; } /* RETI */
3449: OP(ed,4e) { _IM = 0; } /* IM 0 */
3450: OP(ed,4f) { LD_R_A; } /* LD R,A */
3451:
3452: OP(ed,50) { _D = IN(_BC); _F = (_F & CF) | SZP[_D]; } /* IN D,(C) */
3453: OP(ed,51) { OUT(_BC,_D); } /* OUT (C),D */
3454: OP(ed,52) { SBC16( DE ); } /* SBC HL,DE */
3455: OP(ed,53) { EA = ARG16(); WM16( EA, &Z80.DE ); } /* LD (w),DE */
3456: OP(ed,54) { NEG; } /* NEG */
3457: OP(ed,55) { RETN; } /* RETN; */
3458: OP(ed,56) { _IM = 1; } /* IM 1 */
3459: OP(ed,57) { LD_A_I; } /* LD A,I */
3460:
3461: OP(ed,58) { _E = IN(_BC); _F = (_F & CF) | SZP[_E]; } /* IN E,(C) */
3462: OP(ed,59) { OUT(_BC,_E); } /* OUT (C),E */
3463: OP(ed,5a) { ADC16( DE ); } /* ADC HL,DE */
3464: OP(ed,5b) { EA = ARG16(); RM16( EA, &Z80.DE ); } /* LD DE,(w) */
3465: OP(ed,5c) { NEG; } /* NEG */
3466: OP(ed,5d) { RETI; } /* RETI */
3467: OP(ed,5e) { _IM = 2; } /* IM 2 */
3468: OP(ed,5f) { LD_A_R; } /* LD A,R */
3469:
3470: OP(ed,60) { _H = IN(_BC); _F = (_F & CF) | SZP[_H]; } /* IN H,(C) */
3471: OP(ed,61) { OUT(_BC,_H); } /* OUT (C),H */
3472: OP(ed,62) { SBC16( HL ); } /* SBC HL,HL */
3473: OP(ed,63) { EA = ARG16(); WM16( EA, &Z80.HL ); } /* LD (w),HL */
3474: OP(ed,64) { NEG; } /* NEG */
3475: OP(ed,65) { RETN; } /* RETN; */
3476: OP(ed,66) { _IM = 0; } /* IM 0 */
3477: OP(ed,67) { RRD; } /* RRD (HL) */
3478:
3479: OP(ed,68) { _L = IN(_BC); _F = (_F & CF) | SZP[_L]; } /* IN L,(C) */
3480: OP(ed,69) { OUT(_BC,_L); } /* OUT (C),L */
3481: OP(ed,6a) { ADC16( HL ); } /* ADC HL,HL */
3482: OP(ed,6b) { EA = ARG16(); RM16( EA, &Z80.HL ); } /* LD HL,(w) */
3483: OP(ed,6c) { NEG; } /* NEG */
3484: OP(ed,6d) { RETI; } /* RETI */
3485: OP(ed,6e) { _IM = 0; } /* IM 0 */
3486: OP(ed,6f) { RLD; } /* RLD (HL) */
3487:
3488: OP(ed,70) { UINT8 res = IN(_BC); _F = (_F & CF) | SZP[res]; } /* IN 0,(C) */
3489: OP(ed,71) { OUT(_BC,0); } /* OUT (C),0 */
3490: OP(ed,72) { SBC16( SP ); } /* SBC HL,SP */
3491: OP(ed,73) { EA = ARG16(); WM16( EA, &Z80.SP ); } /* LD (w),SP */
3492: OP(ed,74) { NEG; } /* NEG */
3493: OP(ed,75) { RETN; } /* RETN; */
3494: OP(ed,76) { _IM = 1; } /* IM 1 */
3495: OP(ed,77) { illegal_2(); } /* DB ED,77 */
3496:
3497: OP(ed,78) { _A = IN(_BC); _F = (_F & CF) | SZP[_A]; } /* IN E,(C) */
3498: OP(ed,79) { OUT(_BC,_A); } /* OUT (C),E */
3499: OP(ed,7a) { ADC16( SP ); } /* ADC HL,SP */
3500: OP(ed,7b) { EA = ARG16(); RM16( EA, &Z80.SP ); } /* LD SP,(w) */
3501: OP(ed,7c) { NEG; } /* NEG */
3502: OP(ed,7d) { RETI; } /* RETI */
3503: OP(ed,7e) { _IM = 2; } /* IM 2 */
3504: OP(ed,7f) { illegal_2(); } /* DB ED,7F */
3505:
3506: OP(ed,80) { illegal_2(); } /* DB ED */
3507: OP(ed,81) { illegal_2(); } /* DB ED */
3508: OP(ed,82) { illegal_2(); } /* DB ED */
3509: OP(ed,83) { illegal_2(); } /* DB ED */
3510: OP(ed,84) { illegal_2(); } /* DB ED */
3511: OP(ed,85) { illegal_2(); } /* DB ED */
3512: OP(ed,86) { illegal_2(); } /* DB ED */
3513: OP(ed,87) { illegal_2(); } /* DB ED */
3514:
3515: OP(ed,88) { illegal_2(); } /* DB ED */
3516: OP(ed,89) { illegal_2(); } /* DB ED */
3517: OP(ed,8a) { illegal_2(); } /* DB ED */
3518: OP(ed,8b) { illegal_2(); } /* DB ED */
3519: OP(ed,8c) { illegal_2(); } /* DB ED */
3520: OP(ed,8d) { illegal_2(); } /* DB ED */
3521: OP(ed,8e) { illegal_2(); } /* DB ED */
3522: OP(ed,8f) { illegal_2(); } /* DB ED */
3523:
3524: OP(ed,90) { illegal_2(); } /* DB ED */
3525: OP(ed,91) { illegal_2(); } /* DB ED */
3526: OP(ed,92) { illegal_2(); } /* DB ED */
3527: OP(ed,93) { illegal_2(); } /* DB ED */
3528: OP(ed,94) { illegal_2(); } /* DB ED */
3529: OP(ed,95) { illegal_2(); } /* DB ED */
3530: OP(ed,96) { illegal_2(); } /* DB ED */
3531: OP(ed,97) { illegal_2(); } /* DB ED */
3532:
3533: OP(ed,98) { illegal_2(); } /* DB ED */
3534: OP(ed,99) { illegal_2(); } /* DB ED */
3535: OP(ed,9a) { illegal_2(); } /* DB ED */
3536: OP(ed,9b) { illegal_2(); } /* DB ED */
3537: OP(ed,9c) { illegal_2(); } /* DB ED */
3538: OP(ed,9d) { illegal_2(); } /* DB ED */
3539: OP(ed,9e) { illegal_2(); } /* DB ED */
3540: OP(ed,9f) { illegal_2(); } /* DB ED */
3541:
3542: OP(ed,a0) { LDI; } /* LDI */
3543: OP(ed,a1) { CPI; } /* CPI */
3544: OP(ed,a2) { INI; } /* INI */
3545: OP(ed,a3) { OUTI; } /* OUTI */
3546: OP(ed,a4) { illegal_2(); } /* DB ED */
3547: OP(ed,a5) { illegal_2(); } /* DB ED */
3548: OP(ed,a6) { illegal_2(); } /* DB ED */
3549: OP(ed,a7) { illegal_2(); } /* DB ED */
3550:
3551: OP(ed,a8) { LDD; } /* LDD */
3552: OP(ed,a9) { CPD; } /* CPD */
3553: OP(ed,aa) { IND; } /* IND */
3554: OP(ed,ab) { OUTD; } /* OUTD */
3555: OP(ed,ac) { illegal_2(); } /* DB ED */
3556: OP(ed,ad) { illegal_2(); } /* DB ED */
3557: OP(ed,ae) { illegal_2(); } /* DB ED */
3558: OP(ed,af) { illegal_2(); } /* DB ED */
3559:
3560: OP(ed,b0) { LDIR; } /* LDIR */
3561: OP(ed,b1) { CPIR; } /* CPIR */
3562: OP(ed,b2) { INIR; } /* INIR */
3563: OP(ed,b3) { OTIR; } /* OTIR */
3564: OP(ed,b4) { illegal_2(); } /* DB ED */
3565: OP(ed,b5) { illegal_2(); } /* DB ED */
3566: OP(ed,b6) { illegal_2(); } /* DB ED */
3567: OP(ed,b7) { illegal_2(); } /* DB ED */
3568:
3569: OP(ed,b8) { LDDR; } /* LDDR */
3570: OP(ed,b9) { CPDR; } /* CPDR */
3571: OP(ed,ba) { INDR; } /* INDR */
3572: OP(ed,bb) { OTDR; } /* OTDR */
3573: OP(ed,bc) { illegal_2(); } /* DB ED */
3574: OP(ed,bd) { illegal_2(); } /* DB ED */
3575: OP(ed,be) { illegal_2(); } /* DB ED */
3576: OP(ed,bf) { illegal_2(); } /* DB ED */
3577:
3578: OP(ed,c0) { illegal_2(); } /* DB ED */
3579: OP(ed,c1) { illegal_2(); } /* DB ED */
3580: OP(ed,c2) { illegal_2(); } /* DB ED */
3581: OP(ed,c3) { illegal_2(); } /* DB ED */
3582: OP(ed,c4) { illegal_2(); } /* DB ED */
3583: OP(ed,c5) { illegal_2(); } /* DB ED */
3584: OP(ed,c6) { illegal_2(); } /* DB ED */
3585: OP(ed,c7) { illegal_2(); } /* DB ED */
3586:
3587: OP(ed,c8) { illegal_2(); } /* DB ED */
3588: OP(ed,c9) { illegal_2(); } /* DB ED */
3589: OP(ed,ca) { illegal_2(); } /* DB ED */
3590: OP(ed,cb) { illegal_2(); } /* DB ED */
3591: OP(ed,cc) { illegal_2(); } /* DB ED */
3592: OP(ed,cd) { illegal_2(); } /* DB ED */
3593: OP(ed,ce) { illegal_2(); } /* DB ED */
3594: OP(ed,cf) { illegal_2(); } /* DB ED */
3595:
3596: OP(ed,d0) { illegal_2(); } /* DB ED */
3597: OP(ed,d1) { illegal_2(); } /* DB ED */
3598: OP(ed,d2) { illegal_2(); } /* DB ED */
3599: OP(ed,d3) { illegal_2(); } /* DB ED */
3600: OP(ed,d4) { illegal_2(); } /* DB ED */
3601: OP(ed,d5) { illegal_2(); } /* DB ED */
3602: OP(ed,d6) { illegal_2(); } /* DB ED */
3603: OP(ed,d7) { illegal_2(); } /* DB ED */
3604:
3605: OP(ed,d8) { illegal_2(); } /* DB ED */
3606: OP(ed,d9) { illegal_2(); } /* DB ED */
3607: OP(ed,da) { illegal_2(); } /* DB ED */
3608: OP(ed,db) { illegal_2(); } /* DB ED */
3609: OP(ed,dc) { illegal_2(); } /* DB ED */
3610: OP(ed,dd) { illegal_2(); } /* DB ED */
3611: OP(ed,de) { illegal_2(); } /* DB ED */
3612: OP(ed,df) { illegal_2(); } /* DB ED */
3613:
3614: OP(ed,e0) { illegal_2(); } /* DB ED */
3615: OP(ed,e1) { illegal_2(); } /* DB ED */
3616: OP(ed,e2) { illegal_2(); } /* DB ED */
3617: OP(ed,e3) { illegal_2(); } /* DB ED */
3618: OP(ed,e4) { illegal_2(); } /* DB ED */
3619: OP(ed,e5) { illegal_2(); } /* DB ED */
3620: OP(ed,e6) { illegal_2(); } /* DB ED */
3621: OP(ed,e7) { illegal_2(); } /* DB ED */
3622:
3623: OP(ed,e8) { illegal_2(); } /* DB ED */
3624: OP(ed,e9) { illegal_2(); } /* DB ED */
3625: OP(ed,ea) { illegal_2(); } /* DB ED */
3626: OP(ed,eb) { illegal_2(); } /* DB ED */
3627: OP(ed,ec) { illegal_2(); } /* DB ED */
3628: OP(ed,ed) { illegal_2(); } /* DB ED */
3629: OP(ed,ee) { illegal_2(); } /* DB ED */
3630: OP(ed,ef) { illegal_2(); } /* DB ED */
3631:
3632: OP(ed,f0) { illegal_2(); } /* DB ED */
3633: OP(ed,f1) { illegal_2(); } /* DB ED */
3634: OP(ed,f2) { illegal_2(); } /* DB ED */
3635: OP(ed,f3) { illegal_2(); } /* DB ED */
3636: OP(ed,f4) { illegal_2(); } /* DB ED */
3637: OP(ed,f5) { illegal_2(); } /* DB ED */
3638: OP(ed,f6) { illegal_2(); } /* DB ED */
3639: OP(ed,f7) { illegal_2(); } /* DB ED */
3640:
3641: OP(ed,f8) { illegal_2(); } /* DB ED */
3642: OP(ed,f9) { illegal_2(); } /* DB ED */
3643: OP(ed,fa) { illegal_2(); } /* DB ED */
3644: OP(ed,fb) { illegal_2(); } /* DB ED */
3645: OP(ed,fc) { illegal_2(); } /* DB ED */
3646: OP(ed,fd) { illegal_2(); } /* DB ED */
3647: OP(ed,fe) { illegal_2(); } /* DB ED */
3648: OP(ed,ff) { illegal_2(); } /* DB ED */
3649:
3650: #if TIME_LOOP_HACKS
3651:
3652: #define CHECK_BC_LOOP \
3653: if( _BC > 1 && _PCD < 0xfffc ) { \
3654: UINT8 op1 = cpu_readop(_PCD); \
3655: UINT8 op2 = cpu_readop(_PCD+1); \
3656: if( (op1==0x78 && op2==0xb1) || (op1==0x79 && op2==0xb0) ) \
3657: { \
3658: UINT8 op3 = cpu_readop(_PCD+2); \
3659: UINT8 op4 = cpu_readop(_PCD+3); \
3660: if( op3==0x20 && op4==0xfb ) \
3661: { \
3662: while( _BC > 0 && z80_ICount > 4+4+12+6 ) \
3663: { \
3664: BURNODD( 4+4+12+6, 4, 4+4+12+6 ); \
3665: _BC--; \
3666: } \
3667: } \
3668: else \
3669: if( op3 == 0xc2 ) \
3670: { \
3671: UINT8 ad1 = cpu_readop_arg(_PCD+3); \
3672: UINT8 ad2 = cpu_readop_arg(_PCD+4); \
3673: if( (ad1 + 256 * ad2) == (_PCD - 1) ) \
3674: { \
3675: while( _BC > 0 && z80_ICount > 4+4+10+6 ) \
3676: { \
3677: BURNODD( 4+4+10+6, 4, 4+4+10+6 ); \
3678: _BC--; \
3679: } \
3680: } \
3681: } \
3682: } \
3683: }
3684:
3685: #define CHECK_DE_LOOP \
3686: if( _DE > 1 && _PCD < 0xfffc ) { \
3687: UINT8 op1 = cpu_readop(_PCD); \
3688: UINT8 op2 = cpu_readop(_PCD+1); \
3689: if( (op1==0x7a && op2==0xb3) || (op1==0x7b && op2==0xb2) ) \
3690: { \
3691: UINT8 op3 = cpu_readop(_PCD+2); \
3692: UINT8 op4 = cpu_readop(_PCD+3); \
3693: if( op3==0x20 && op4==0xfb ) \
3694: { \
3695: while( _DE > 0 && z80_ICount > 4+4+12+6 ) \
3696: { \
3697: BURNODD( 4+4+12+6, 4, 4+4+12+6 ); \
3698: _DE--; \
3699: } \
3700: } \
3701: else \
3702: if( op3==0xc2 ) \
3703: { \
3704: UINT8 ad1 = cpu_readop_arg(_PCD+3); \
3705: UINT8 ad2 = cpu_readop_arg(_PCD+4); \
3706: if( (ad1 + 256 * ad2) == (_PCD - 1) ) \
3707: { \
3708: while( _DE > 0 && z80_ICount > 4+4+10+6 ) \
3709: { \
3710: BURNODD( 4+4+10+6, 4, 4+4+10+6 ); \
3711: _DE--; \
3712: } \
3713: } \
3714: } \
3715: } \
3716: }
3717:
3718: #define CHECK_HL_LOOP \
3719: if( _HL > 1 && _PCD < 0xfffc ) { \
3720: UINT8 op1 = cpu_readop(_PCD); \
3721: UINT8 op2 = cpu_readop(_PCD+1); \
3722: if( (op1==0x7c && op2==0xb5) || (op1==0x7d && op2==0xb4) ) \
3723: { \
3724: UINT8 op3 = cpu_readop(_PCD+2); \
3725: UINT8 op4 = cpu_readop(_PCD+3); \
3726: if( op3==0x20 && op4==0xfb ) \
3727: { \
3728: while( _HL > 0 && z80_ICount > 4+4+12+6 ) \
3729: { \
3730: BURNODD( 4+4+12+6, 4, 4+4+12+6 ); \
3731: _HL--; \
3732: } \
3733: } \
3734: else \
3735: if( op3==0xc2 ) \
3736: { \
3737: UINT8 ad1 = cpu_readop_arg(_PCD+3); \
3738: UINT8 ad2 = cpu_readop_arg(_PCD+4); \
3739: if( (ad1 + 256 * ad2) == (_PCD - 1) ) \
3740: { \
3741: while( _HL > 0 && z80_ICount > 4+4+10+6 ) \
3742: { \
3743: BURNODD( 4+4+10+6, 4, 4+4+10+6 ); \
3744: _HL--; \
3745: } \
3746: } \
3747: } \
3748: } \
3749: }
3750:
3751: #else
3752:
3753: #define CHECK_BC_LOOP
3754: #define CHECK_DE_LOOP
3755: #define CHECK_HL_LOOP
3756:
3757: #endif
3758:
3759: /**********************************************************
3760: * main opcodes
3761: **********************************************************/
3762: OP(op,00) { } /* NOP */
3763: OP(op,01) { _BC = ARG16(); } /* LD BC,w */
3764: OP(op,02) { WM( _BC, _A ); } /* LD (BC),A */
3765: OP(op,03) { _BC++; } /* INC BC */
3766: OP(op,04) { _B = INC(_B); } /* INC B */
3767: OP(op,05) { _B = DEC(_B); } /* DEC B */
3768: OP(op,06) { _B = ARG(); } /* LD B,n */
3769: OP(op,07) { RLCA; } /* RLCA */
3770:
3771: OP(op,08) { EX_AF; } /* EX AF,AF' */
3772: OP(op,09) { ADD16(HL,BC); } /* ADD HL,BC */
3773: OP(op,0a) { _A = RM(_BC); } /* LD A,(BC) */
3774: OP(op,0b) { _BC--; CHECK_BC_LOOP; } /* DEC BC */
3775: OP(op,0c) { _C = INC(_C); } /* INC C */
3776: OP(op,0d) { _C = DEC(_C); } /* DEC C */
3777: OP(op,0e) { _C = ARG(); } /* LD C,n */
3778: OP(op,0f) { RRCA; } /* RRCA */
3779:
3780: OP(op,10) { _B--; JR_COND(_B); } /* DJNZ o */
3781: OP(op,11) { _DE = ARG16(); } /* LD DE,w */
3782: OP(op,12) { WM( _DE, _A ); } /* LD (DE),A */
3783: OP(op,13) { _DE++; } /* INC DE */
3784: OP(op,14) { _D = INC(_D); } /* INC D */
3785: OP(op,15) { _D = DEC(_D); } /* DEC D */
3786: OP(op,16) { _D = ARG(); } /* LD D,n */
3787: OP(op,17) { RLA; } /* RLA */
3788:
3789: OP(op,18) { JR(); } /* JR o */
3790: OP(op,19) { ADD16(HL,DE); } /* ADD HL,DE */
3791: OP(op,1a) { _A = RM(_DE); } /* LD A,(DE) */
3792: OP(op,1b) { _DE--; CHECK_DE_LOOP; } /* DEC DE */
3793: OP(op,1c) { _E = INC(_E); } /* INC E */
3794: OP(op,1d) { _E = DEC(_E); } /* DEC E */
3795: OP(op,1e) { _E = ARG(); } /* LD E,n */
3796: OP(op,1f) { RRA; } /* RRA */
3797:
3798: OP(op,20) { JR_COND( !(_F & ZF) ); } /* JR NZ,o */
3799: OP(op,21) { _HL = ARG16(); } /* LD HL,w */
3800: OP(op,22) { EA = ARG16(); WM16( EA, &Z80.HL ); } /* LD (w),HL */
3801: OP(op,23) { _HL++; } /* INC HL */
3802: OP(op,24) { _H = INC(_H); } /* INC H */
3803: OP(op,25) { _H = DEC(_H); } /* DEC H */
3804: OP(op,26) { _H = ARG(); } /* LD H,n */
3805: OP(op,27) { DAA; } /* DAA */
3806:
3807: OP(op,28) { JR_COND( _F & ZF ); } /* JR Z,o */
3808: OP(op,29) { ADD16(HL,HL); } /* ADD HL,HL */
3809: OP(op,2a) { EA = ARG16(); RM16( EA, &Z80.HL ); } /* LD HL,(w) */
3810: OP(op,2b) { _HL--; CHECK_HL_LOOP; } /* DEC HL */
3811: OP(op,2c) { _L = INC(_L); } /* INC L */
3812: OP(op,2d) { _L = DEC(_L); } /* DEC L */
3813: OP(op,2e) { _L = ARG(); } /* LD L,n */
3814: OP(op,2f) { _A ^= 0xff; _F = (_F&(SF|ZF|PF|CF))|HF|NF|(_A&(YF|XF)); } /* CPL */
3815:
3816: OP(op,30) { JR_COND( !(_F & CF) ); } /* JR NC,o */
3817: OP(op,31) { _SP = ARG16(); } /* LD SP,w */
3818: OP(op,32) { EA = ARG16(); WM( EA, _A ); } /* LD (w),A */
3819: OP(op,33) { _SP++; } /* INC SP */
3820: OP(op,34) { WM( _HL, INC(RM(_HL)) ); } /* INC (HL) */
3821: OP(op,35) { WM( _HL, DEC(RM(_HL)) ); } /* DEC (HL) */
3822: OP(op,36) { WM( _HL, ARG() ); } /* LD (HL),n */
3823: OP(op,37) { _F = (_F & (SF|ZF|PF)) | CF | (_A & (YF|XF)); } /* SCF */
3824:
3825: OP(op,38) { JR_COND( _F & CF ); } /* JR C,o */
3826: OP(op,39) { ADD16(HL,SP); } /* ADD HL,SP */
3827: OP(op,3a) { EA = ARG16(); _A = RM( EA ); } /* LD A,(w) */
3828: OP(op,3b) { _SP--; } /* DEC SP */
3829: OP(op,3c) { _A = INC(_A); } /* INC A */
3830: OP(op,3d) { _A = DEC(_A); } /* DEC A */
3831: OP(op,3e) { _A = ARG(); } /* LD A,n */
3832: OP(op,3f) { _F = ((_F&(SF|ZF|PF|CF))|((_F&CF)<<4)|(_A&(YF|XF)))^CF; } /* CCF */
3833: //OP(op,3f) { _F = ((_F & ~(HF|NF)) | ((_F & CF)<<4)) ^ CF; } /* CCF */
3834:
3835: OP(op,40) { } /* LD B,B */
3836: OP(op,41) { _B = _C; } /* LD B,C */
3837: OP(op,42) { _B = _D; } /* LD B,D */
3838: OP(op,43) { _B = _E; } /* LD B,E */
3839: OP(op,44) { _B = _H; } /* LD B,H */
3840: OP(op,45) { _B = _L; } /* LD B,L */
3841: OP(op,46) { _B = RM(_HL); } /* LD B,(HL) */
3842: OP(op,47) { _B = _A; } /* LD B,A */
3843:
3844: OP(op,48) { _C = _B; } /* LD C,B */
3845: OP(op,49) { } /* LD C,C */
3846: OP(op,4a) { _C = _D; } /* LD C,D */
3847: OP(op,4b) { _C = _E; } /* LD C,E */
3848: OP(op,4c) { _C = _H; } /* LD C,H */
3849: OP(op,4d) { _C = _L; } /* LD C,L */
3850: OP(op,4e) { _C = RM(_HL); } /* LD C,(HL) */
3851: OP(op,4f) { _C = _A; } /* LD C,A */
3852:
3853: OP(op,50) { _D = _B; } /* LD D,B */
3854: OP(op,51) { _D = _C; } /* LD D,C */
3855: OP(op,52) { } /* LD D,D */
3856: OP(op,53) { _D = _E; } /* LD D,E */
3857: OP(op,54) { _D = _H; } /* LD D,H */
3858: OP(op,55) { _D = _L; } /* LD D,L */
3859: OP(op,56) { _D = RM(_HL); } /* LD D,(HL) */
3860: OP(op,57) { _D = _A; } /* LD D,A */
3861:
3862: OP(op,58) { _E = _B; } /* LD E,B */
3863: OP(op,59) { _E = _C; } /* LD E,C */
3864: OP(op,5a) { _E = _D; } /* LD E,D */
3865: OP(op,5b) { } /* LD E,E */
3866: OP(op,5c) { _E = _H; } /* LD E,H */
3867: OP(op,5d) { _E = _L; } /* LD E,L */
3868: OP(op,5e) { _E = RM(_HL); } /* LD E,(HL) */
3869: OP(op,5f) { _E = _A; } /* LD E,A */
3870:
3871: OP(op,60) { _H = _B; } /* LD H,B */
3872: OP(op,61) { _H = _C; } /* LD H,C */
3873: OP(op,62) { _H = _D; } /* LD H,D */
3874: OP(op,63) { _H = _E; } /* LD H,E */
3875: OP(op,64) { } /* LD H,H */
3876: OP(op,65) { _H = _L; } /* LD H,L */
3877: OP(op,66) { _H = RM(_HL); } /* LD H,(HL) */
3878: OP(op,67) { _H = _A; } /* LD H,A */
3879:
3880: OP(op,68) { _L = _B; } /* LD L,B */
3881: OP(op,69) { _L = _C; } /* LD L,C */
3882: OP(op,6a) { _L = _D; } /* LD L,D */
3883: OP(op,6b) { _L = _E; } /* LD L,E */
3884: OP(op,6c) { _L = _H; } /* LD L,H */
3885: OP(op,6d) { } /* LD L,L */
3886: OP(op,6e) { _L = RM(_HL); } /* LD L,(HL) */
3887: OP(op,6f) { _L = _A; } /* LD L,A */
3888:
3889: OP(op,70) { WM( _HL, _B ); } /* LD (HL),B */
3890: OP(op,71) { WM( _HL, _C ); } /* LD (HL),C */
3891: OP(op,72) { WM( _HL, _D ); } /* LD (HL),D */
3892: OP(op,73) { WM( _HL, _E ); } /* LD (HL),E */
3893: OP(op,74) { WM( _HL, _H ); } /* LD (HL),H */
3894: OP(op,75) { WM( _HL, _L ); } /* LD (HL),L */
3895: OP(op,76) { ENTER_HALT; } /* HALT */
3896: OP(op,77) { WM( _HL, _A ); } /* LD (HL),A */
3897:
3898: OP(op,78) { _A = _B; } /* LD A,B */
3899: OP(op,79) { _A = _C; } /* LD A,C */
3900: OP(op,7a) { _A = _D; } /* LD A,D */
3901: OP(op,7b) { _A = _E; } /* LD A,E */
3902: OP(op,7c) { _A = _H; } /* LD A,H */
3903: OP(op,7d) { _A = _L; } /* LD A,L */
3904: OP(op,7e) { _A = RM(_HL); } /* LD A,(HL) */
3905: OP(op,7f) { } /* LD A,A */
3906:
3907: OP(op,80) { ADD(_B); } /* ADD A,B */
3908: OP(op,81) { ADD(_C); } /* ADD A,C */
3909: OP(op,82) { ADD(_D); } /* ADD A,D */
3910: OP(op,83) { ADD(_E); } /* ADD A,E */
3911: OP(op,84) { ADD(_H); } /* ADD A,H */
3912: OP(op,85) { ADD(_L); } /* ADD A,L */
3913: OP(op,86) { ADD(RM(_HL)); } /* ADD A,(HL) */
3914: OP(op,87) { ADD(_A); } /* ADD A,A */
3915:
3916: OP(op,88) { ADC(_B); } /* ADC A,B */
3917: OP(op,89) { ADC(_C); } /* ADC A,C */
3918: OP(op,8a) { ADC(_D); } /* ADC A,D */
3919: OP(op,8b) { ADC(_E); } /* ADC A,E */
3920: OP(op,8c) { ADC(_H); } /* ADC A,H */
3921: OP(op,8d) { ADC(_L); } /* ADC A,L */
3922: OP(op,8e) { ADC(RM(_HL)); } /* ADC A,(HL) */
3923: OP(op,8f) { ADC(_A); } /* ADC A,A */
3924:
3925: OP(op,90) { SUB(_B); } /* SUB B */
3926: OP(op,91) { SUB(_C); } /* SUB C */
3927: OP(op,92) { SUB(_D); } /* SUB D */
3928: OP(op,93) { SUB(_E); } /* SUB E */
3929: OP(op,94) { SUB(_H); } /* SUB H */
3930: OP(op,95) { SUB(_L); } /* SUB L */
3931: OP(op,96) { SUB(RM(_HL)); } /* SUB (HL) */
3932: OP(op,97) { SUB(_A); } /* SUB A */
3933:
3934: OP(op,98) { SBC(_B); } /* SBC A,B */
3935: OP(op,99) { SBC(_C); } /* SBC A,C */
3936: OP(op,9a) { SBC(_D); } /* SBC A,D */
3937: OP(op,9b) { SBC(_E); } /* SBC A,E */
3938: OP(op,9c) { SBC(_H); } /* SBC A,H */
3939: OP(op,9d) { SBC(_L); } /* SBC A,L */
3940: OP(op,9e) { SBC(RM(_HL)); } /* SBC A,(HL) */
3941: OP(op,9f) { SBC(_A); } /* SBC A,A */
3942:
3943: OP(op,a0) { AND(_B); } /* AND B */
3944: OP(op,a1) { AND(_C); } /* AND C */
3945: OP(op,a2) { AND(_D); } /* AND D */
3946: OP(op,a3) { AND(_E); } /* AND E */
3947: OP(op,a4) { AND(_H); } /* AND H */
3948: OP(op,a5) { AND(_L); } /* AND L */
3949: OP(op,a6) { AND(RM(_HL)); } /* AND (HL) */
3950: OP(op,a7) { AND(_A); } /* AND A */
3951:
3952: OP(op,a8) { XOR(_B); } /* XOR B */
3953: OP(op,a9) { XOR(_C); } /* XOR C */
3954: OP(op,aa) { XOR(_D); } /* XOR D */
3955: OP(op,ab) { XOR(_E); } /* XOR E */
3956: OP(op,ac) { XOR(_H); } /* XOR H */
3957: OP(op,ad) { XOR(_L); } /* XOR L */
3958: OP(op,ae) { XOR(RM(_HL)); } /* XOR (HL) */
3959: OP(op,af) { XOR(_A); } /* XOR A */
3960:
3961: OP(op,b0) { OR(_B); } /* OR B */
3962: OP(op,b1) { OR(_C); } /* OR C */
3963: OP(op,b2) { OR(_D); } /* OR D */
3964: OP(op,b3) { OR(_E); } /* OR E */
3965: OP(op,b4) { OR(_H); } /* OR H */
3966: OP(op,b5) { OR(_L); } /* OR L */
3967: OP(op,b6) { OR(RM(_HL)); } /* OR (HL) */
3968: OP(op,b7) { OR(_A); } /* OR A */
3969:
3970: OP(op,b8) { CP(_B); } /* CP B */
3971: OP(op,b9) { CP(_C); } /* CP C */
3972: OP(op,ba) { CP(_D); } /* CP D */
3973: OP(op,bb) { CP(_E); } /* CP E */
3974: OP(op,bc) { CP(_H); } /* CP H */
3975: OP(op,bd) { CP(_L); } /* CP L */
3976: OP(op,be) { CP(RM(_HL)); } /* CP (HL) */
3977: OP(op,bf) { CP(_A); } /* CP A */
3978:
3979: OP(op,c0) { RET( !(_F & ZF) ); } /* RET NZ */
3980: OP(op,c1) { POP(BC); } /* POP BC */
3981: OP(op,c2) { JP_COND( !(_F & ZF) ); } /* JP NZ,a */
3982: OP(op,c3) { JP; } /* JP a */
3983: OP(op,c4) { CALL( !(_F & ZF) ); } /* CALL NZ,a */
3984: OP(op,c5) { PUSH( BC ); } /* PUSH BC */
3985: OP(op,c6) { ADD(ARG()); } /* ADD A,n */
3986: OP(op,c7) { RST(0x00); } /* RST 0 */
3987:
3988: OP(op,c8) { RET( _F & ZF ); } /* RET Z */
3989: OP(op,c9) { RET(1); } /* RET */
3990: OP(op,ca) { JP_COND( _F & ZF ); } /* JP Z,a */
3991: OP(op,cb) { _R++; EXEC(cb,ROP()); } /* **** CB xx */
3992: OP(op,cc) { CALL( _F & ZF ); } /* CALL Z,a */
3993: OP(op,cd) { CALL(1); } /* CALL a */
3994: OP(op,ce) { ADC(ARG()); } /* ADC A,n */
3995: OP(op,cf) { RST(0x08); } /* RST 1 */
3996:
3997: OP(op,d0) { RET( !(_F & CF) ); } /* RET NC */
3998: OP(op,d1) { POP(DE); } /* POP DE */
3999: OP(op,d2) { JP_COND( !(_F & CF) ); } /* JP NC,a */
4000: OP(op,d3) { unsigned n = ARG() | (_A << 8); OUT( n, _A ); } /* OUT (n),A */
4001: OP(op,d4) { CALL( !(_F & CF) ); } /* CALL NC,a */
4002: OP(op,d5) { PUSH( DE ); } /* PUSH DE */
4003: OP(op,d6) { SUB(ARG()); } /* SUB n */
4004: OP(op,d7) { RST(0x10); } /* RST 2 */
4005:
4006: OP(op,d8) { RET( _F & CF ); } /* RET C */
4007: OP(op,d9) { EXX; } /* EXX */
4008: OP(op,da) { JP_COND( _F & CF ); } /* JP C,a */
4009: OP(op,db) { unsigned n = ARG() | (_A << 8); _A = IN( n ); } /* IN A,(n) */
4010: OP(op,dc) { CALL( _F & CF ); } /* CALL C,a */
4011: OP(op,dd) { _R++; EXEC(dd,ROP()); } /* **** DD xx */
4012: OP(op,de) { SBC(ARG()); } /* SBC A,n */
4013: OP(op,df) { RST(0x18); } /* RST 3 */
4014:
4015: OP(op,e0) { RET( !(_F & PF) ); } /* RET PO */
4016: OP(op,e1) { POP(HL); } /* POP HL */
4017: OP(op,e2) { JP_COND( !(_F & PF) ); } /* JP PO,a */
4018: OP(op,e3) { EXSP(HL); } /* EX HL,(SP) */
4019: OP(op,e4) { CALL( !(_F & PF) ); } /* CALL PO,a */
4020: OP(op,e5) { PUSH( HL ); } /* PUSH HL */
4021: OP(op,e6) { AND(ARG()); } /* AND n */
4022: OP(op,e7) { RST(0x20); } /* RST 4 */
4023:
4024: OP(op,e8) { RET( _F & PF ); } /* RET PE */
4025: OP(op,e9) { _PC = _HL; change_pc16(_PCD); } /* JP (HL) */
4026: OP(op,ea) { JP_COND( _F & PF ); } /* JP PE,a */
4027: OP(op,eb) { EX_DE_HL; } /* EX DE,HL */
4028: OP(op,ec) { CALL( _F & PF ); } /* CALL PE,a */
4029: OP(op,ed) { _R++; EXEC(ed,ROP()); } /* **** ED xx */
4030: OP(op,ee) { XOR(ARG()); } /* XOR n */
4031: OP(op,ef) { RST(0x28); } /* RST 5 */
4032:
4033: OP(op,f0) { RET( !(_F & SF) ); } /* RET P */
4034: OP(op,f1) { POP(AF); } /* POP AF */
4035: OP(op,f2) { JP_COND( !(_F & SF) ); } /* JP P,a */
4036: OP(op,f3) { _IFF1 = _IFF2 = 0; } /* DI */
4037: OP(op,f4) { CALL( !(_F & SF) ); } /* CALL P,a */
4038: OP(op,f5) { PUSH( AF ); } /* PUSH AF */
4039: OP(op,f6) { OR(ARG()); } /* OR n */
4040: OP(op,f7) { RST(0x30); } /* RST 6 */
4041:
4042: OP(op,f8) { RET(_F & SF); } /* RET M */
4043: OP(op,f9) { _SP = _HL; } /* LD SP,HL */
4044: OP(op,fa) { JP_COND(_F & SF); } /* JP M,a */
4045: OP(op,fb) { EI; } /* EI */
4046: OP(op,fc) { CALL(_F & SF); } /* CALL M,a */
4047: OP(op,fd) { _R++; EXEC(fd,ROP()); } /* **** FD xx */
4048: OP(op,fe) { CP(ARG()); } /* CP n */
4049: OP(op,ff) { RST(0x38); } /* RST 7 */
4050:
4051:
4052: static void take_interrupt(void)
4053: {
4054: if( _IFF1 )
4055: {
4056: int irq_vector;
4057:
4058: /* there isn't a valid previous program counter */
4059: _PPC = -1;
4060:
4061: /* Check if processor was halted */
4062: LEAVE_HALT;
4063:
4064: if( Z80.irq_max ) /* daisy chain mode */
4065: {
4066: if( Z80.request_irq >= 0 )
4067: {
4068: /* Clear both interrupt flip flops */
4069: _IFF1 = _IFF2 = 0;
4070: irq_vector = Z80.irq[Z80.request_irq].interrupt_entry(Z80.irq[Z80.request_irq].irq_param);
4071: LOG((errorlog, "Z80#%d daisy chain irq_vector $%02x\n", cpu_getactivecpu(), irq_vector));
4072: Z80.request_irq = -1;
4073: } else return;
4074: }
4075: else
4076: {
4077: /* Clear both interrupt flip flops */
4078: _IFF1 = _IFF2 = 0;
4079: /* call back the cpu interface to retrieve the vector */
4080: irq_vector = (*Z80.irq_callback)(0);
4081: LOG((errorlog, "Z80#%d single int. irq_vector $%02x\n", cpu_getactivecpu(), irq_vector));
4082: }
4083:
4084: /* Interrupt mode 2. Call [Z80.I:databyte] */
4085: if( _IM == 2 )
4086: {
4087: irq_vector = (irq_vector & 0xff) | (_I << 8);
4088: PUSH( PC );
4089: RM16( irq_vector, &Z80.PC );
4090: LOG((errorlog, "Z80#%d IM2 [$%04x] = $%04x\n",cpu_getactivecpu() , irq_vector, _PCD));
4091: Z80.extra_cycles += 19;
4092: }
4093: else
4094: /* Interrupt mode 1. RST 38h */
4095: if( _IM == 1 )
4096: {
4097: LOG((errorlog, "Z80#%d IM1 $0038\n",cpu_getactivecpu() ));
4098: PUSH( PC );
4099: _PCD = 0x0038;
4100: Z80.extra_cycles += 11+2; /* RST $38 + 2 cycles */
4101: }
4102: else
4103: {
4104: /* Interrupt mode 0. We check for CALL and JP instructions, */
4105: /* if neither of these were found we assume a 1 byte opcode */
4106: /* was placed on the databus */
4107: LOG((errorlog, "Z80#%d IM0 $%04x\n",cpu_getactivecpu() , irq_vector));
4108: switch (irq_vector & 0xff0000)
4109: {
4110: case 0xcd0000: /* call */
4111: PUSH( PC );
4112: Z80.extra_cycles += 5; /* CALL $xxxx cycles (JP $xxxx follows)*/
4113: case 0xc30000: /* jump */
4114: _PCD = irq_vector & 0xffff;
4115: Z80.extra_cycles += 10 + 2; /* JP $xxxx + 2 cycles */
4116: break;
4117: default: /* rst */
4118: PUSH( PC );
4119: _PCD = irq_vector & 0x0038;
4120: Z80.extra_cycles += 11 + 2; /* RST $xx + 2 cycles */
4121: break;
4122: }
4123: }
4124: change_pc(_PCD);
4125: }
4126: }
4127:
4128: /****************************************************************************
4129: * Reset registers to their initial values
4130: ****************************************************************************/
4131: #if Z80_VM
4132: void z80_vm_reset(void *param)
4133: #else
4134: void z80_reset(void *param)
4135: #endif
4136: {
4137: Z80_DaisyChain *daisy_chain = (Z80_DaisyChain *)param;
4138: int i, p;
4139: #if BIG_FLAGS_ARRAY
4140: if( !SZHVC_add || !SZHVC_sub )
4141: {
4142: int oldval, newval, val;
4143: UINT8 *padd, *padc, *psub, *psbc;
4144: /* allocate big flag arrays once */
4145: SZHVC_add = (UINT8 *)malloc(2*256*256);
4146: SZHVC_sub = (UINT8 *)malloc(2*256*256);
4147: if( !SZHVC_add || !SZHVC_sub )
4148: {
4149: LOG((errorlog, "Z80: failed to allocate 2 * 128K flags arrays!!!\n"));
4150: raise(SIGABRT);
4151: }
4152: padd = &SZHVC_add[ 0*256];
4153: padc = &SZHVC_add[256*256];
4154: psub = &SZHVC_sub[ 0*256];
4155: psbc = &SZHVC_sub[256*256];
4156: for (oldval = 0; oldval < 256; oldval++)
4157: {
4158: for (newval = 0; newval < 256; newval++)
4159: {
4160: /* add or adc w/o carry set */
4161: val = newval - oldval;
4162: *padd = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
4163: #if Z80_EXACT
4164: *padd |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
4165: #endif
4166: if( (newval & 0x0f) < (oldval & 0x0f) ) *padd |= HF;
4167: if( newval < oldval ) *padd |= CF;
4168: if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padd |= VF;
4169: padd++;
4170:
4171: /* adc with carry set */
4172: val = newval - oldval - 1;
4173: *padc = (newval) ? ((newval & 0x80) ? SF : 0) : ZF;
4174: #if Z80_EXACT
4175: *padc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
4176: #endif
4177: if( (newval & 0x0f) <= (oldval & 0x0f) ) *padc |= HF;
4178: if( newval <= oldval ) *padc |= CF;
4179: if( (val^oldval^0x80) & (val^newval) & 0x80 ) *padc |= VF;
4180: padc++;
4181:
4182: /* cp, sub or sbc w/o carry set */
4183: val = oldval - newval;
4184: *psub = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
4185: #if Z80_EXACT
4186: *psub |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
4187: #endif
4188: if( (newval & 0x0f) > (oldval & 0x0f) ) *psub |= HF;
4189: if( newval > oldval ) *psub |= CF;
4190: if( (val^oldval) & (oldval^newval) & 0x80 ) *psub |= VF;
4191: psub++;
4192:
4193: /* sbc with carry set */
4194: val = oldval - newval - 1;
4195: *psbc = NF | ((newval) ? ((newval & 0x80) ? SF : 0) : ZF);
4196: #if Z80_EXACT
4197: *psbc |= (newval & (YF | XF)); /* undocumented flag bits 5+3 */
4198: #endif
4199: if( (newval & 0x0f) >= (oldval & 0x0f) ) *psbc |= HF;
4200: if( newval >= oldval ) *psbc |= CF;
4201: if( (val^oldval) & (oldval^newval) & 0x80 ) *psbc |= VF;
4202: psbc++;
4203: }
4204: }
4205: }
4206: #endif
4207: for (i = 0; i < 256; i++)
4208: {
4209: p = 0;
4210: if( i&0x01 ) ++p;
4211: if( i&0x02 ) ++p;
4212: if( i&0x04 ) ++p;
4213: if( i&0x08 ) ++p;
4214: if( i&0x10 ) ++p;
4215: if( i&0x20 ) ++p;
4216: if( i&0x40 ) ++p;
4217: if( i&0x80 ) ++p;
4218: SZ[i] = i ? i & SF : ZF;
4219: #if Z80_EXACT
4220: SZ[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
4221: #endif
4222: SZ_BIT[i] = i ? i & SF : ZF | PF;
4223: #if Z80_EXACT
4224: SZ_BIT[i] |= (i & (YF | XF)); /* undocumented flag bits 5+3 */
4225: #endif
4226: SZP[i] = SZ[i] | ((p & 1) ? 0 : PF);
4227: SZHV_inc[i] = SZ[i];
4228: if( i == 0x80 ) SZHV_inc[i] |= VF;
4229: if( (i & 0x0f) == 0x00 ) SZHV_inc[i] |= HF;
4230: SZHV_dec[i] = SZ[i] | NF;
4231: if( i == 0x7f ) SZHV_dec[i] |= VF;
4232: if( (i & 0x0f) == 0x0f ) SZHV_dec[i] |= HF;
4233: }
4234:
4235: memset(&Z80, 0, sizeof(Z80));
4236: _IX = _IY = 0xffff; /* IX and IY are FFFF after a reset! */
4237: _F = ZF; /* Zero flag is set */
4238: Z80.request_irq = -1;
4239: Z80.service_irq = -1;
4240: Z80.nmi_state = CLEAR_LINE;
4241: Z80.irq_state = CLEAR_LINE;
4242:
4243: #if Z80_VM
4244: /* reset the virtual memory offsets */
4245: Z80.bank[0] = 0x0000;
4246: Z80.bank[1] = 0x2000;
4247: Z80.bank[2] = 0x4000;
4248: Z80.bank[3] = 0x6000;
4249: Z80.bank[4] = 0x8000;
4250: Z80.bank[5] = 0xa000;
4251: Z80.bank[6] = 0xc000;
4252: Z80.bank[7] = 0xe000;
4253: #endif
4254:
4255: if( daisy_chain )
4256: {
4257: while( daisy_chain->irq_param != -1 && Z80.irq_max < Z80_MAXDAISY )
4258: {
4259: /* set callbackhandler after reti */
4260: Z80.irq[Z80.irq_max] = *daisy_chain;
4261: /* device reset */
4262: if( Z80.irq[Z80.irq_max].reset )
4263: Z80.irq[Z80.irq_max].reset(Z80.irq[Z80.irq_max].irq_param);
4264: Z80.irq_max++;
4265: daisy_chain++;
4266: }
4267: }
4268:
4269: change_pc(_PCD);
4270: }
4271:
4272: #if Z80_VM
4273: void z80_vm_exit(void)
4274: #else
4275: void z80_exit(void)
4276: #endif
4277: {
4278: #if BIG_FLAGS_ARRAY
4279: if (SZHVC_add) free(SZHVC_add);
4280: SZHVC_add = NULL;
4281: if (SZHVC_sub) free(SZHVC_sub);
4282: SZHVC_sub = NULL;
4283: #endif
4284: }
4285:
4286: /****************************************************************************
4287: * Execute 'cycles' T-states. Return number of T-states really executed
4288: ****************************************************************************/
4289: #if Z80_VM
4290: int z80_vm_execute(int cycles)
4291: #else
4292: int z80_execute(int cycles)
4293: #endif
4294: {
4295: z80_ICount = cycles;
4296:
4297: BURN( Z80.extra_cycles );
4298: Z80.extra_cycles = 0;
4299:
4300: do
4301: {
4302: _PPC = _PCD;
4303: CALL_MAME_DEBUG;
4304: _R++;
4305: EXEC_INLINE(op,ROP());
4306: } while( z80_ICount > 0 );
4307:
4308: BURN( Z80.extra_cycles );
4309: Z80.extra_cycles = 0;
4310:
4311: return cycles - z80_ICount;
4312: }
4313:
4314: /****************************************************************************
4315: * Burn 'cycles' T-states. Adjust R register for the lost time
4316: ****************************************************************************/
4317: #if Z80_VM
4318: void z80_vm_burn(int cycles)
4319: #else
4320: void z80_burn(int cycles)
4321: #endif
4322: {
4323: if( cycles > 0 )
4324: {
4325: /* NOP takes 4 cycles per instruction */
4326: int n = (cycles + 3) / 4;
4327: _R += n;
4328: z80_ICount -= 4 * n;
4329: }
4330: }
4331:
4332: /****************************************************************************
4333: * Get all registers in given buffer
4334: ****************************************************************************/
4335: #if Z80_VM
4336: unsigned z80_vm_get_context (void *dst)
4337: #else
4338: unsigned z80_get_context (void *dst)
4339: #endif
4340: {
4341: if( dst )
4342: *(Z80_Regs*)dst = Z80;
4343: return sizeof(Z80_Regs);
4344: }
4345:
4346: /****************************************************************************
4347: * Set all registers to given values
4348: ****************************************************************************/
4349: #if Z80_VM
4350: void z80_vm_set_context (void *src)
4351: #else
4352: void z80_set_context (void *src)
4353: #endif
4354: {
4355: if( src )
4356: Z80 = *(Z80_Regs*)src;
4357: change_pc(_PCD);
4358: }
4359:
4360: /****************************************************************************
4361: * Return program counter
4362: ****************************************************************************/
4363: #if Z80_VM
4364: unsigned z80_vm_get_pc (void)
4365: #else
4366: unsigned z80_get_pc (void)
4367: #endif
4368: {
4369: return _PCD;
4370: }
4371:
4372: /****************************************************************************
4373: * Set program counter
4374: ****************************************************************************/
4375: #if Z80_VM
4376: void z80_vm_set_pc (unsigned val)
4377: #else
4378: void z80_set_pc (unsigned val)
4379: #endif
4380: {
4381: _PC = val;
4382: change_pc(_PCD);
4383: }
4384:
4385: /****************************************************************************
4386: * Return stack pointer
4387: ****************************************************************************/
4388: #if Z80_VM
4389: unsigned z80_vm_get_sp (void)
4390: #else
4391: unsigned z80_get_sp (void)
4392: #endif
4393: {
4394: return _SPD;
4395: }
4396:
4397: /****************************************************************************
4398: * Set stack pointer
4399: ****************************************************************************/
4400: #if Z80_VM
4401: void z80_vm_set_sp (unsigned val)
4402: #else
4403: void z80_set_sp (unsigned val)
4404: #endif
4405: {
4406: _SP = val;
4407: }
4408:
4409: /****************************************************************************
4410: * Return a specific register
4411: ****************************************************************************/
4412: #if Z80_VM
4413: unsigned z80_vm_get_reg (int regnum)
4414: #else
4415: unsigned z80_get_reg (int regnum)
4416: #endif
4417: {
4418: switch( regnum )
4419: {
4420: case Z80_PC: return Z80.PC.w.l;
4421: case Z80_SP: return Z80.SP.w.l;
4422: case Z80_AF: return Z80.AF.w.l;
4423: case Z80_BC: return Z80.BC.w.l;
4424: case Z80_DE: return Z80.DE.w.l;
4425: case Z80_HL: return Z80.HL.w.l;
4426: case Z80_IX: return Z80.IX.w.l;
4427: case Z80_IY: return Z80.IY.w.l;
4428: case Z80_R: return (Z80.R & 0x7f) | (Z80.R2 & 0x80);
4429: case Z80_I: return Z80.I;
4430: case Z80_AF2: return Z80.AF2.w.l;
4431: case Z80_BC2: return Z80.BC2.w.l;
4432: case Z80_DE2: return Z80.DE2.w.l;
4433: case Z80_HL2: return Z80.HL2.w.l;
4434: case Z80_IM: return Z80.IM;
4435: case Z80_IFF1: return Z80.IFF1;
4436: case Z80_IFF2: return Z80.IFF2;
4437: case Z80_HALT: return Z80.HALT;
4438: case Z80_NMI_STATE: return Z80.nmi_state;
4439: case Z80_IRQ_STATE: return Z80.irq_state;
4440: case Z80_DC0: return Z80.int_state[0];
4441: case Z80_DC1: return Z80.int_state[1];
4442: case Z80_DC2: return Z80.int_state[2];
4443: case Z80_DC3: return Z80.int_state[3];
4444: #if Z80_VM
4445: case Z80_BANK0: return Z80.bank[0];
4446: case Z80_BANK1: return Z80.bank[1];
4447: case Z80_BANK2: return Z80.bank[2];
4448: case Z80_BANK3: return Z80.bank[3];
4449: case Z80_BANK4: return Z80.bank[4];
4450: case Z80_BANK5: return Z80.bank[5];
4451: case Z80_BANK6: return Z80.bank[6];
4452: case Z80_BANK7: return Z80.bank[7];
4453: #endif
4454: case REG_PREVIOUSPC: return Z80.PREPC.w.l;
4455: default:
4456: if( regnum <= REG_SP_CONTENTS )
4457: {
4458: unsigned offset = _SPD + 2 * (REG_SP_CONTENTS - regnum);
4459: if( offset < 0xffff )
4460: return RM( offset ) | ( RM( offset + 1) << 8 );
4461: }
4462: }
4463: return 0;
4464: }
4465:
4466: /****************************************************************************
4467: * Set a specific register
4468: ****************************************************************************/
4469: #if Z80_VM
4470: void z80_vm_set_reg (int regnum, unsigned val)
4471: #else
4472: void z80_set_reg (int regnum, unsigned val)
4473: #endif
4474: {
4475: switch( regnum )
4476: {
4477: case Z80_PC: Z80.PC.w.l = val; break;
4478: case Z80_SP: Z80.SP.w.l = val; break;
4479: case Z80_AF: Z80.AF.w.l = val; break;
4480: case Z80_BC: Z80.BC.w.l = val; break;
4481: case Z80_DE: Z80.DE.w.l = val; break;
4482: case Z80_HL: Z80.HL.w.l = val; break;
4483: case Z80_IX: Z80.IX.w.l = val; break;
4484: case Z80_IY: Z80.IY.w.l = val; break;
4485: case Z80_R: Z80.R = val; Z80.R2 = val & 0x80; break;
4486: case Z80_I: Z80.I = val; break;
4487: case Z80_AF2: Z80.AF2.w.l = val; break;
4488: case Z80_BC2: Z80.BC2.w.l = val; break;
4489: case Z80_DE2: Z80.DE2.w.l = val; break;
4490: case Z80_HL2: Z80.HL2.w.l = val; break;
4491: case Z80_IM: Z80.IM = val; break;
4492: case Z80_IFF1: Z80.IFF1 = val; break;
4493: case Z80_IFF2: Z80.IFF2 = val; break;
4494: case Z80_HALT: Z80.HALT = val; break;
4495: case Z80_NMI_STATE: z80_set_nmi_line(val); break;
4496: case Z80_IRQ_STATE: z80_set_irq_line(0,val); break;
4497: case Z80_DC0: Z80.int_state[0] = val; break;
4498: case Z80_DC1: Z80.int_state[1] = val; break;
4499: case Z80_DC2: Z80.int_state[2] = val; break;
4500: case Z80_DC3: Z80.int_state[3] = val; break;
4501: #if Z80_VM
4502: case Z80_BANK0: Z80.bank[0] = val; break;
4503: case Z80_BANK1: Z80.bank[1] = val; break;
4504: case Z80_BANK2: Z80.bank[2] = val; break;
4505: case Z80_BANK3: Z80.bank[3] = val; break;
4506: case Z80_BANK4: Z80.bank[4] = val; break;
4507: case Z80_BANK5: Z80.bank[5] = val; break;
4508: case Z80_BANK6: Z80.bank[6] = val; break;
4509: case Z80_BANK7: Z80.bank[7] = val; break;
4510: #endif
4511: default:
4512: if( regnum <= REG_SP_CONTENTS )
4513: {
4514: unsigned offset = _SPD + 2 * (REG_SP_CONTENTS - regnum);
4515: if( offset < 0xffff )
4516: {
4517: WM( offset, val & 0xff );
4518: WM( offset+1, (val >> 8) & 0xff );
4519: }
4520: }
4521: }
4522: }
4523:
4524: /****************************************************************************
4525: * Set NMI line state
4526: ****************************************************************************/
4527: #if Z80_VM
4528: void z80_vm_set_nmi_line(int state)
4529: #else
4530: void z80_set_nmi_line(int state)
4531: #endif
4532: {
4533: if( Z80.nmi_state == state ) return;
4534:
4535: LOG((errorlog, "Z80#%d set_nmi_line %d\n", cpu_getactivecpu(), state));
4536: Z80.nmi_state = state;
4537: if( state == CLEAR_LINE ) return;
4538:
4539: LOG((errorlog, "Z80#%d take NMI\n", cpu_getactivecpu()));
4540: _PPC = -1; /* there isn't a valid previous program counter */
4541: LEAVE_HALT; /* Check if processor was halted */
4542:
4543: _IFF1 = 0;
4544: PUSH( PC );
4545: _PCD = 0x0066;
4546: Z80.extra_cycles += 11;
4547: }
4548:
4549: /****************************************************************************
4550: * Set IRQ line state
4551: ****************************************************************************/
4552: #if Z80_VM
4553: void z80_vm_set_irq_line(int irqline, int state)
4554: #else
4555: void z80_set_irq_line(int irqline, int state)
4556: #endif
4557: {
4558: LOG((errorlog, "Z80#%d set_irq_line %d\n",cpu_getactivecpu() , state));
4559: Z80.irq_state = state;
4560: if( state == CLEAR_LINE ) return;
4561:
4562: if( Z80.irq_max )
4563: {
4564: int daisychain, device, int_state;
4565: daisychain = (*Z80.irq_callback)(irqline);
4566: device = daisychain >> 8;
4567: int_state = daisychain & 0xff;
4568: LOG((errorlog, "Z80#%d daisy chain $%04x -> device %d, state $%02x",cpu_getactivecpu(), daisychain, device, int_state));
4569:
4570: if( Z80.int_state[device] != int_state )
4571: {
4572: LOG((errorlog, " change\n"));
4573: /* set new interrupt status */
4574: Z80.int_state[device] = int_state;
4575: /* check interrupt status */
4576: Z80.request_irq = Z80.service_irq = -1;
4577:
4578: /* search higher IRQ or IEO */
4579: for( device = 0 ; device < Z80.irq_max ; device ++ )
4580: {
4581: /* IEO = disable ? */
4582: if( Z80.int_state[device] & Z80_INT_IEO )
4583: {
4584: Z80.request_irq = -1; /* if IEO is disable , masking lower IRQ */
4585: Z80.service_irq = device; /* set highest interrupt service device */
4586: }
4587: /* IRQ = request ? */
4588: if( Z80.int_state[device] & Z80_INT_REQ )
4589: Z80.request_irq = device;
4590: }
4591: LOG((errorlog, "Z80#%d daisy chain service_irq $%02x, request_irq $%02x\n", cpu_getactivecpu(), Z80.service_irq, Z80.request_irq));
4592: if( Z80.request_irq < 0 ) return;
4593: }
4594: else
4595: {
4596: LOG((errorlog, " no change\n"));
4597: return;
4598: }
4599: }
4600: take_interrupt();
4601: }
4602:
4603: /****************************************************************************
4604: * Set IRQ vector callback
4605: ****************************************************************************/
4606: #if Z80_VM
4607: void z80_vm_set_irq_callback(int (*callback)(int))
4608: #else
4609: void z80_set_irq_callback(int (*callback)(int))
4610: #endif
4611: {
4612: LOG((errorlog, "Z80#%d set_irq_callback $%08x\n",cpu_getactivecpu() , (int)callback));
4613: Z80.irq_callback = callback;
4614: }
4615:
4616: /****************************************************************************
4617: * Save CPU state
4618: ****************************************************************************/
4619: #if Z80_VM
4620: void z80_vm_state_save(void *file)
4621: #else
4622: void z80_state_save(void *file)
4623: #endif
4624: {
4625: int cpu = cpu_getactivecpu();
4626: state_save_UINT16(file, "z80", cpu, "AF", &Z80.AF.w.l, 1);
4627: state_save_UINT16(file, "z80", cpu, "BC", &Z80.BC.w.l, 1);
4628: state_save_UINT16(file, "z80", cpu, "DE", &Z80.DE.w.l, 1);
4629: state_save_UINT16(file, "z80", cpu, "HL", &Z80.HL.w.l, 1);
4630: state_save_UINT16(file, "z80", cpu, "IX", &Z80.IX.w.l, 1);
4631: state_save_UINT16(file, "z80", cpu, "IY", &Z80.IY.w.l, 1);
4632: state_save_UINT16(file, "z80", cpu, "PC", &Z80.PC.w.l, 1);
4633: state_save_UINT16(file, "z80", cpu, "SP", &Z80.SP.w.l, 1);
4634: state_save_UINT16(file, "z80", cpu, "AF2", &Z80.AF2.w.l, 1);
4635: state_save_UINT16(file, "z80", cpu, "BC2", &Z80.BC2.w.l, 1);
4636: state_save_UINT16(file, "z80", cpu, "DE2", &Z80.DE2.w.l, 1);
4637: state_save_UINT16(file, "z80", cpu, "HL2", &Z80.HL2.w.l, 1);
4638: state_save_UINT8(file, "z80", cpu, "R", &Z80.R, 1);
4639: state_save_UINT8(file, "z80", cpu, "R2", &Z80.R2, 1);
4640: state_save_UINT8(file, "z80", cpu, "IFF1", &Z80.IFF1, 1);
4641: state_save_UINT8(file, "z80", cpu, "IFF2", &Z80.IFF2, 1);
4642: state_save_UINT8(file, "z80", cpu, "HALT", &Z80.HALT, 1);
4643: state_save_UINT8(file, "z80", cpu, "IM", &Z80.IM, 1);
4644: state_save_UINT8(file, "z80", cpu, "I", &Z80.I, 1);
4645: state_save_UINT8(file, "z80", cpu, "irq_max", &Z80.irq_max, 1);
4646: state_save_INT8(file, "z80", cpu, "request_irq", &Z80.request_irq, 1);
4647: state_save_INT8(file, "z80", cpu, "service_irq", &Z80.service_irq, 1);
4648: state_save_UINT8(file, "z80", cpu, "int_state", Z80.int_state, 4);
4649: state_save_UINT8(file, "z80", cpu, "nmi_state", &Z80.nmi_state, 1);
4650: state_save_UINT8(file, "z80", cpu, "irq_state", &Z80.irq_state, 1);
4651: /* daisy chain needs to be saved by z80ctc.c somehow */
4652: }
4653:
4654: /****************************************************************************
4655: * Load CPU state
4656: ****************************************************************************/
4657: #if Z80_VM
4658: void z80_vm_state_load(void *file)
4659: #else
4660: void z80_state_load(void *file)
4661: #endif
4662: {
4663: int cpu = cpu_getactivecpu();
4664: state_load_UINT16(file, "z80", cpu, "AF", &Z80.AF.w.l, 1);
4665: state_load_UINT16(file, "z80", cpu, "BC", &Z80.BC.w.l, 1);
4666: state_load_UINT16(file, "z80", cpu, "DE", &Z80.DE.w.l, 1);
4667: state_load_UINT16(file, "z80", cpu, "HL", &Z80.HL.w.l, 1);
4668: state_load_UINT16(file, "z80", cpu, "IX", &Z80.IX.w.l, 1);
4669: state_load_UINT16(file, "z80", cpu, "IY", &Z80.IY.w.l, 1);
4670: state_load_UINT16(file, "z80", cpu, "PC", &Z80.PC.w.l, 1);
4671: state_load_UINT16(file, "z80", cpu, "SP", &Z80.SP.w.l, 1);
4672: state_load_UINT16(file, "z80", cpu, "AF2", &Z80.AF2.w.l, 1);
4673: state_load_UINT16(file, "z80", cpu, "BC2", &Z80.BC2.w.l, 1);
4674: state_load_UINT16(file, "z80", cpu, "DE2", &Z80.DE2.w.l, 1);
4675: state_load_UINT16(file, "z80", cpu, "HL2", &Z80.HL2.w.l, 1);
4676: state_load_UINT8(file, "z80", cpu, "R", &Z80.R, 1);
4677: state_load_UINT8(file, "z80", cpu, "R2", &Z80.R2, 1);
4678: state_load_UINT8(file, "z80", cpu, "IFF1", &Z80.IFF1, 1);
4679: state_load_UINT8(file, "z80", cpu, "IFF2", &Z80.IFF2, 1);
4680: state_load_UINT8(file, "z80", cpu, "HALT", &Z80.HALT, 1);
4681: state_load_UINT8(file, "z80", cpu, "IM", &Z80.IM, 1);
4682: state_load_UINT8(file, "z80", cpu, "I", &Z80.I, 1);
4683: state_load_UINT8(file, "z80", cpu, "irq_max", &Z80.irq_max, 1);
4684: state_load_INT8(file, "z80", cpu, "request_irq", &Z80.request_irq, 1);
4685: state_load_INT8(file, "z80", cpu, "service_irq", &Z80.service_irq, 1);
4686: state_load_UINT8(file, "z80", cpu, "int_state", Z80.int_state, 4);
4687: state_load_UINT8(file, "z80", cpu, "nmi_state", &Z80.nmi_state, 1);
4688: state_load_UINT8(file, "z80", cpu, "irq_state", &Z80.irq_state, 1);
4689: /* daisy chain needs to be restored by z80ctc.c somehow */
4690: }
4691:
4692: /****************************************************************************
4693: * Return a formatted string for a register
4694: ****************************************************************************/
4695: #if Z80_VM
4696: const char *z80_vm_info(void *context, int regnum)
4697: #else
4698: const char *z80_info(void *context, int regnum)
4699: #endif
4700: {
4701: static char buffer[32][47+1];
4702: static int which = 0;
4703: Z80_Regs *r = context;
4704:
4705: which = ++which % 32;
4706: buffer[which][0] = '\0';
4707: if( !context )
4708: r = &Z80;
4709:
4710: switch( regnum )
4711: {
4712: case CPU_INFO_REG+Z80_PC: sprintf(buffer[which], "PC:%04X", r->PC.w.l); break;
4713: case CPU_INFO_REG+Z80_SP: sprintf(buffer[which], "SP:%04X", r->SP.w.l); break;
4714: case CPU_INFO_REG+Z80_AF: sprintf(buffer[which], "AF:%04X", r->AF.w.l); break;
4715: case CPU_INFO_REG+Z80_BC: sprintf(buffer[which], "BC:%04X", r->BC.w.l); break;
4716: case CPU_INFO_REG+Z80_DE: sprintf(buffer[which], "DE:%04X", r->DE.w.l); break;
4717: case CPU_INFO_REG+Z80_HL: sprintf(buffer[which], "HL:%04X", r->HL.w.l); break;
4718: case CPU_INFO_REG+Z80_IX: sprintf(buffer[which], "IX:%04X", r->IX.w.l); break;
4719: case CPU_INFO_REG+Z80_IY: sprintf(buffer[which], "IY:%04X", r->IY.w.l); break;
4720: case CPU_INFO_REG+Z80_R: sprintf(buffer[which], "R:%02X", (r->R & 0x7f) | (r->R2 & 0x80)); break;
4721: case CPU_INFO_REG+Z80_I: sprintf(buffer[which], "I:%02X", r->I); break;
4722: case CPU_INFO_REG+Z80_AF2: sprintf(buffer[which], "AF'%04X", r->AF2.w.l); break;
4723: case CPU_INFO_REG+Z80_BC2: sprintf(buffer[which], "BC'%04X", r->BC2.w.l); break;
4724: case CPU_INFO_REG+Z80_DE2: sprintf(buffer[which], "DE'%04X", r->DE2.w.l); break;
4725: case CPU_INFO_REG+Z80_HL2: sprintf(buffer[which], "HL'%04X", r->HL2.w.l); break;
4726: case CPU_INFO_REG+Z80_IM: sprintf(buffer[which], "IM:%X", r->IM); break;
4727: case CPU_INFO_REG+Z80_IFF1: sprintf(buffer[which], "IFF1:%X", r->IFF1); break;
4728: case CPU_INFO_REG+Z80_IFF2: sprintf(buffer[which], "IFF2:%X", r->IFF2); break;
4729: case CPU_INFO_REG+Z80_HALT: sprintf(buffer[which], "HALT:%X", r->HALT); break;
4730: case CPU_INFO_REG+Z80_NMI_STATE: sprintf(buffer[which], "NMI:%X", r->nmi_state); break;
4731: case CPU_INFO_REG+Z80_IRQ_STATE: sprintf(buffer[which], "IRQ:%X", r->irq_state); break;
4732: case CPU_INFO_REG+Z80_DC0: if(Z80.irq_max >= 1) sprintf(buffer[which], "DC0:%X", r->int_state[0]); break;
4733: case CPU_INFO_REG+Z80_DC1: if(Z80.irq_max >= 2) sprintf(buffer[which], "DC1:%X", r->int_state[1]); break;
4734: case CPU_INFO_REG+Z80_DC2: if(Z80.irq_max >= 3) sprintf(buffer[which], "DC2:%X", r->int_state[2]); break;
4735: case CPU_INFO_REG+Z80_DC3: if(Z80.irq_max >= 4) sprintf(buffer[which], "DC3:%X", r->int_state[3]); break;
4736: #if Z80_VM
4737: case CPU_INFO_REG+Z80_BANK0: sprintf(buffer[which], "0:%06X", r->bank[0]); break;
4738: case CPU_INFO_REG+Z80_BANK1: sprintf(buffer[which], "1:%06X", r->bank[1]); break;
4739: case CPU_INFO_REG+Z80_BANK2: sprintf(buffer[which], "2:%06X", r->bank[2]); break;
4740: case CPU_INFO_REG+Z80_BANK3: sprintf(buffer[which], "3:%06X", r->bank[3]); break;
4741: case CPU_INFO_REG+Z80_BANK4: sprintf(buffer[which], "4:%06X", r->bank[4]); break;
4742: case CPU_INFO_REG+Z80_BANK5: sprintf(buffer[which], "5:%06X", r->bank[5]); break;
4743: case CPU_INFO_REG+Z80_BANK6: sprintf(buffer[which], "6:%06X", r->bank[6]); break;
4744: case CPU_INFO_REG+Z80_BANK7: sprintf(buffer[which], "7:%06X", r->bank[7]); break;
4745: #endif
4746: case CPU_INFO_FLAGS:
4747: sprintf(buffer[which], "%c%c%c%c%c%c%c%c",
4748: r->AF.b.l & 0x80 ? 'S':'.',
4749: r->AF.b.l & 0x40 ? 'Z':'.',
4750: r->AF.b.l & 0x20 ? '5':'.',
4751: r->AF.b.l & 0x10 ? 'H':'.',
4752: r->AF.b.l & 0x08 ? '3':'.',
4753: r->AF.b.l & 0x04 ? 'P':'.',
4754: r->AF.b.l & 0x02 ? 'N':'.',
4755: r->AF.b.l & 0x01 ? 'C':'.');
4756: break;
4757: #if Z80_VM
4758: case CPU_INFO_NAME: return "Z80 VM";
4759: #else
4760: case CPU_INFO_NAME: return "Z80";
4761: #endif
4762: case CPU_INFO_FAMILY: return "Zilog Z80";
4763: case CPU_INFO_VERSION: return "2.5";
4764: case CPU_INFO_FILE: return __FILE__;
4765: case CPU_INFO_CREDITS: return "Copyright (C) 1998,1999 Juergen Buchmueller, all rights reserved.";
4766: case CPU_INFO_REG_LAYOUT: return (const char *)z80_reg_layout;
4767: case CPU_INFO_WIN_LAYOUT: return (const char *)z80_win_layout;
4768: }
4769: return buffer[which];
4770: }
4771:
4772: #if Z80_VM
4773: unsigned z80_vm_dasm( char *buffer, unsigned pc )
4774: #else
4775: unsigned z80_dasm( char *buffer, unsigned pc )
4776: #endif
4777: {
4778: #ifdef MAME_DEBUG
4779: return DasmZ80( buffer, pc );
4780: #else
4781: sprintf( buffer, "$%02X", cpu_readop(pc) );
4782: return 1;
4783: #endif
4784: }
4785:
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