![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to cpu68k-3.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Generator SEGA Genesis emulator] / generator / src / out|
Return to cpu68k-3.c CVS log | Up to [Generator SEGA Genesis emulator] / generator / src / out |
1.1 ! root 1: /*****************************************************************************/ ! 2: /* Generator - Sega Genesis emulation - (c) James Ponder 1997-1998 */ ! 3: /*****************************************************************************/ ! 4: /* */ ! 5: /* cpu68k-3.c */ ! 6: /* */ ! 7: /*****************************************************************************/ ! 8: ! 9: #include "generator.h" ! 10: #include "cpu68k.h" ! 11: #include "mem68k.h" ! 12: #include "reg68k.h" ! 13: ! 14: #include "cpu68k-inline.h" ! 15: ! 16: #include <stdio.h> ! 17: ! 18: void cpu_op_426a(t_ipc *ipc) /* MOVE */ { ! 19: /* mask f1f8, bits 3000, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 20: int srcreg = (ipc->opcode >> 0) & 7; ! 21: uint16 srcdata = DATAREG(srcreg); ! 22: int dstreg = (ipc->opcode >> 9) & 7; ! 23: uint16 outdata = srcdata; ! 24: ! 25: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 26: PC+= 2; ! 27: } ! 28: ! 29: void cpu_op_426b(t_ipc *ipc) /* MOVE */ { ! 30: /* mask f1f8, bits 3000, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 31: int srcreg = (ipc->opcode >> 0) & 7; ! 32: uint16 srcdata = DATAREG(srcreg); ! 33: int dstreg = (ipc->opcode >> 9) & 7; ! 34: uint16 outdata = srcdata; ! 35: ! 36: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 37: ! 38: VFLAG = 0; ! 39: CFLAG = 0; ! 40: NFLAG = ((sint16)outdata) < 0; ! 41: ZFLAG = !outdata; ! 42: PC+= 2; ! 43: } ! 44: ! 45: void cpu_op_427a(t_ipc *ipc) /* MOVE */ { ! 46: /* mask f1f8, bits 3080, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 47: int srcreg = (ipc->opcode >> 0) & 7; ! 48: uint16 srcdata = DATAREG(srcreg); ! 49: int dstreg = (ipc->opcode >> 9) & 7; ! 50: uint32 dstaddr = ADDRREG(dstreg); ! 51: uint16 outdata = srcdata; ! 52: ! 53: storeword(dstaddr, outdata); ! 54: PC+= 2; ! 55: } ! 56: ! 57: void cpu_op_427b(t_ipc *ipc) /* MOVE */ { ! 58: /* mask f1f8, bits 3080, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 59: int srcreg = (ipc->opcode >> 0) & 7; ! 60: uint16 srcdata = DATAREG(srcreg); ! 61: int dstreg = (ipc->opcode >> 9) & 7; ! 62: uint32 dstaddr = ADDRREG(dstreg); ! 63: uint16 outdata = srcdata; ! 64: ! 65: storeword(dstaddr, outdata); ! 66: ! 67: VFLAG = 0; ! 68: CFLAG = 0; ! 69: NFLAG = ((sint16)outdata) < 0; ! 70: ZFLAG = !outdata; ! 71: PC+= 2; ! 72: } ! 73: ! 74: void cpu_op_428a(t_ipc *ipc) /* MOVE */ { ! 75: /* mask f1f8, bits 30c0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 76: int srcreg = (ipc->opcode >> 0) & 7; ! 77: uint16 srcdata = DATAREG(srcreg); ! 78: int dstreg = (ipc->opcode >> 9) & 7; ! 79: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 80: uint16 outdata = srcdata; ! 81: ! 82: storeword(dstaddr, outdata); ! 83: PC+= 2; ! 84: } ! 85: ! 86: void cpu_op_428b(t_ipc *ipc) /* MOVE */ { ! 87: /* mask f1f8, bits 30c0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 88: int srcreg = (ipc->opcode >> 0) & 7; ! 89: uint16 srcdata = DATAREG(srcreg); ! 90: int dstreg = (ipc->opcode >> 9) & 7; ! 91: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 92: uint16 outdata = srcdata; ! 93: ! 94: storeword(dstaddr, outdata); ! 95: ! 96: VFLAG = 0; ! 97: CFLAG = 0; ! 98: NFLAG = ((sint16)outdata) < 0; ! 99: ZFLAG = !outdata; ! 100: PC+= 2; ! 101: } ! 102: ! 103: void cpu_op_429a(t_ipc *ipc) /* MOVE */ { ! 104: /* mask f1f8, bits 3100, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 105: int srcreg = (ipc->opcode >> 0) & 7; ! 106: uint16 srcdata = DATAREG(srcreg); ! 107: int dstreg = (ipc->opcode >> 9) & 7; ! 108: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 109: uint16 outdata = srcdata; ! 110: ! 111: storeword(dstaddr, outdata); ! 112: PC+= 2; ! 113: } ! 114: ! 115: void cpu_op_429b(t_ipc *ipc) /* MOVE */ { ! 116: /* mask f1f8, bits 3100, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 117: int srcreg = (ipc->opcode >> 0) & 7; ! 118: uint16 srcdata = DATAREG(srcreg); ! 119: int dstreg = (ipc->opcode >> 9) & 7; ! 120: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 121: uint16 outdata = srcdata; ! 122: ! 123: storeword(dstaddr, outdata); ! 124: ! 125: VFLAG = 0; ! 126: CFLAG = 0; ! 127: NFLAG = ((sint16)outdata) < 0; ! 128: ZFLAG = !outdata; ! 129: PC+= 2; ! 130: } ! 131: ! 132: void cpu_op_430a(t_ipc *ipc) /* MOVE */ { ! 133: /* mask f1f8, bits 3140, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 134: int srcreg = (ipc->opcode >> 0) & 7; ! 135: uint16 srcdata = DATAREG(srcreg); ! 136: int dstreg = (ipc->opcode >> 9) & 7; ! 137: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 138: uint16 outdata = srcdata; ! 139: ! 140: storeword(dstaddr, outdata); ! 141: PC+= 4; ! 142: } ! 143: ! 144: void cpu_op_430b(t_ipc *ipc) /* MOVE */ { ! 145: /* mask f1f8, bits 3140, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 146: int srcreg = (ipc->opcode >> 0) & 7; ! 147: uint16 srcdata = DATAREG(srcreg); ! 148: int dstreg = (ipc->opcode >> 9) & 7; ! 149: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 150: uint16 outdata = srcdata; ! 151: ! 152: storeword(dstaddr, outdata); ! 153: ! 154: VFLAG = 0; ! 155: CFLAG = 0; ! 156: NFLAG = ((sint16)outdata) < 0; ! 157: ZFLAG = !outdata; ! 158: PC+= 4; ! 159: } ! 160: ! 161: void cpu_op_431a(t_ipc *ipc) /* MOVE */ { ! 162: /* mask f1f8, bits 3180, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 163: int srcreg = (ipc->opcode >> 0) & 7; ! 164: uint16 srcdata = DATAREG(srcreg); ! 165: int dstreg = (ipc->opcode >> 9) & 7; ! 166: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 167: uint16 outdata = srcdata; ! 168: ! 169: storeword(dstaddr, outdata); ! 170: PC+= 4; ! 171: } ! 172: ! 173: void cpu_op_431b(t_ipc *ipc) /* MOVE */ { ! 174: /* mask f1f8, bits 3180, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 175: int srcreg = (ipc->opcode >> 0) & 7; ! 176: uint16 srcdata = DATAREG(srcreg); ! 177: int dstreg = (ipc->opcode >> 9) & 7; ! 178: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 179: uint16 outdata = srcdata; ! 180: ! 181: storeword(dstaddr, outdata); ! 182: ! 183: VFLAG = 0; ! 184: CFLAG = 0; ! 185: NFLAG = ((sint16)outdata) < 0; ! 186: ZFLAG = !outdata; ! 187: PC+= 4; ! 188: } ! 189: ! 190: void cpu_op_432a(t_ipc *ipc) /* MOVE */ { ! 191: /* mask fff8, bits 31c0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 192: int srcreg = (ipc->opcode >> 0) & 7; ! 193: uint16 srcdata = DATAREG(srcreg); ! 194: uint32 dstaddr = ipc->dst; ! 195: uint16 outdata = srcdata; ! 196: ! 197: storeword(dstaddr, outdata); ! 198: PC+= 4; ! 199: } ! 200: ! 201: void cpu_op_432b(t_ipc *ipc) /* MOVE */ { ! 202: /* mask fff8, bits 31c0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 203: int srcreg = (ipc->opcode >> 0) & 7; ! 204: uint16 srcdata = DATAREG(srcreg); ! 205: uint32 dstaddr = ipc->dst; ! 206: uint16 outdata = srcdata; ! 207: ! 208: storeword(dstaddr, outdata); ! 209: ! 210: VFLAG = 0; ! 211: CFLAG = 0; ! 212: NFLAG = ((sint16)outdata) < 0; ! 213: ZFLAG = !outdata; ! 214: PC+= 4; ! 215: } ! 216: ! 217: void cpu_op_433a(t_ipc *ipc) /* MOVE */ { ! 218: /* mask fff8, bits 33c0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 219: int srcreg = (ipc->opcode >> 0) & 7; ! 220: uint16 srcdata = DATAREG(srcreg); ! 221: uint32 dstaddr = ipc->dst; ! 222: uint16 outdata = srcdata; ! 223: ! 224: storeword(dstaddr, outdata); ! 225: PC+= 6; ! 226: } ! 227: ! 228: void cpu_op_433b(t_ipc *ipc) /* MOVE */ { ! 229: /* mask fff8, bits 33c0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 230: int srcreg = (ipc->opcode >> 0) & 7; ! 231: uint16 srcdata = DATAREG(srcreg); ! 232: uint32 dstaddr = ipc->dst; ! 233: uint16 outdata = srcdata; ! 234: ! 235: storeword(dstaddr, outdata); ! 236: ! 237: VFLAG = 0; ! 238: CFLAG = 0; ! 239: NFLAG = ((sint16)outdata) < 0; ! 240: ZFLAG = !outdata; ! 241: PC+= 6; ! 242: } ! 243: ! 244: void cpu_op_434a(t_ipc *ipc) /* MOVE */ { ! 245: /* mask f1f8, bits 3008, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 246: int srcreg = (ipc->opcode >> 0) & 7; ! 247: uint16 srcdata = ADDRREG(srcreg); ! 248: int dstreg = (ipc->opcode >> 9) & 7; ! 249: uint16 outdata = srcdata; ! 250: ! 251: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 252: PC+= 2; ! 253: } ! 254: ! 255: void cpu_op_434b(t_ipc *ipc) /* MOVE */ { ! 256: /* mask f1f8, bits 3008, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 257: int srcreg = (ipc->opcode >> 0) & 7; ! 258: uint16 srcdata = ADDRREG(srcreg); ! 259: int dstreg = (ipc->opcode >> 9) & 7; ! 260: uint16 outdata = srcdata; ! 261: ! 262: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 263: ! 264: VFLAG = 0; ! 265: CFLAG = 0; ! 266: NFLAG = ((sint16)outdata) < 0; ! 267: ZFLAG = !outdata; ! 268: PC+= 2; ! 269: } ! 270: ! 271: void cpu_op_435a(t_ipc *ipc) /* MOVE */ { ! 272: /* mask f1f8, bits 3088, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 273: int srcreg = (ipc->opcode >> 0) & 7; ! 274: uint16 srcdata = ADDRREG(srcreg); ! 275: int dstreg = (ipc->opcode >> 9) & 7; ! 276: uint32 dstaddr = ADDRREG(dstreg); ! 277: uint16 outdata = srcdata; ! 278: ! 279: storeword(dstaddr, outdata); ! 280: PC+= 2; ! 281: } ! 282: ! 283: void cpu_op_435b(t_ipc *ipc) /* MOVE */ { ! 284: /* mask f1f8, bits 3088, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 285: int srcreg = (ipc->opcode >> 0) & 7; ! 286: uint16 srcdata = ADDRREG(srcreg); ! 287: int dstreg = (ipc->opcode >> 9) & 7; ! 288: uint32 dstaddr = ADDRREG(dstreg); ! 289: uint16 outdata = srcdata; ! 290: ! 291: storeword(dstaddr, outdata); ! 292: ! 293: VFLAG = 0; ! 294: CFLAG = 0; ! 295: NFLAG = ((sint16)outdata) < 0; ! 296: ZFLAG = !outdata; ! 297: PC+= 2; ! 298: } ! 299: ! 300: void cpu_op_436a(t_ipc *ipc) /* MOVE */ { ! 301: /* mask f1f8, bits 30c8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 302: int srcreg = (ipc->opcode >> 0) & 7; ! 303: uint16 srcdata = ADDRREG(srcreg); ! 304: int dstreg = (ipc->opcode >> 9) & 7; ! 305: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 306: uint16 outdata = srcdata; ! 307: ! 308: storeword(dstaddr, outdata); ! 309: PC+= 2; ! 310: } ! 311: ! 312: void cpu_op_436b(t_ipc *ipc) /* MOVE */ { ! 313: /* mask f1f8, bits 30c8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 314: int srcreg = (ipc->opcode >> 0) & 7; ! 315: uint16 srcdata = ADDRREG(srcreg); ! 316: int dstreg = (ipc->opcode >> 9) & 7; ! 317: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 318: uint16 outdata = srcdata; ! 319: ! 320: storeword(dstaddr, outdata); ! 321: ! 322: VFLAG = 0; ! 323: CFLAG = 0; ! 324: NFLAG = ((sint16)outdata) < 0; ! 325: ZFLAG = !outdata; ! 326: PC+= 2; ! 327: } ! 328: ! 329: void cpu_op_437a(t_ipc *ipc) /* MOVE */ { ! 330: /* mask f1f8, bits 3108, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 331: int srcreg = (ipc->opcode >> 0) & 7; ! 332: uint16 srcdata = ADDRREG(srcreg); ! 333: int dstreg = (ipc->opcode >> 9) & 7; ! 334: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 335: uint16 outdata = srcdata; ! 336: ! 337: storeword(dstaddr, outdata); ! 338: PC+= 2; ! 339: } ! 340: ! 341: void cpu_op_437b(t_ipc *ipc) /* MOVE */ { ! 342: /* mask f1f8, bits 3108, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 343: int srcreg = (ipc->opcode >> 0) & 7; ! 344: uint16 srcdata = ADDRREG(srcreg); ! 345: int dstreg = (ipc->opcode >> 9) & 7; ! 346: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 347: uint16 outdata = srcdata; ! 348: ! 349: storeword(dstaddr, outdata); ! 350: ! 351: VFLAG = 0; ! 352: CFLAG = 0; ! 353: NFLAG = ((sint16)outdata) < 0; ! 354: ZFLAG = !outdata; ! 355: PC+= 2; ! 356: } ! 357: ! 358: void cpu_op_438a(t_ipc *ipc) /* MOVE */ { ! 359: /* mask f1f8, bits 3148, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 360: int srcreg = (ipc->opcode >> 0) & 7; ! 361: uint16 srcdata = ADDRREG(srcreg); ! 362: int dstreg = (ipc->opcode >> 9) & 7; ! 363: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 364: uint16 outdata = srcdata; ! 365: ! 366: storeword(dstaddr, outdata); ! 367: PC+= 4; ! 368: } ! 369: ! 370: void cpu_op_438b(t_ipc *ipc) /* MOVE */ { ! 371: /* mask f1f8, bits 3148, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 372: int srcreg = (ipc->opcode >> 0) & 7; ! 373: uint16 srcdata = ADDRREG(srcreg); ! 374: int dstreg = (ipc->opcode >> 9) & 7; ! 375: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 376: uint16 outdata = srcdata; ! 377: ! 378: storeword(dstaddr, outdata); ! 379: ! 380: VFLAG = 0; ! 381: CFLAG = 0; ! 382: NFLAG = ((sint16)outdata) < 0; ! 383: ZFLAG = !outdata; ! 384: PC+= 4; ! 385: } ! 386: ! 387: void cpu_op_439a(t_ipc *ipc) /* MOVE */ { ! 388: /* mask f1f8, bits 3188, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 389: int srcreg = (ipc->opcode >> 0) & 7; ! 390: uint16 srcdata = ADDRREG(srcreg); ! 391: int dstreg = (ipc->opcode >> 9) & 7; ! 392: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 393: uint16 outdata = srcdata; ! 394: ! 395: storeword(dstaddr, outdata); ! 396: PC+= 4; ! 397: } ! 398: ! 399: void cpu_op_439b(t_ipc *ipc) /* MOVE */ { ! 400: /* mask f1f8, bits 3188, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 401: int srcreg = (ipc->opcode >> 0) & 7; ! 402: uint16 srcdata = ADDRREG(srcreg); ! 403: int dstreg = (ipc->opcode >> 9) & 7; ! 404: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 405: uint16 outdata = srcdata; ! 406: ! 407: storeword(dstaddr, outdata); ! 408: ! 409: VFLAG = 0; ! 410: CFLAG = 0; ! 411: NFLAG = ((sint16)outdata) < 0; ! 412: ZFLAG = !outdata; ! 413: PC+= 4; ! 414: } ! 415: ! 416: void cpu_op_440a(t_ipc *ipc) /* MOVE */ { ! 417: /* mask fff8, bits 31c8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 418: int srcreg = (ipc->opcode >> 0) & 7; ! 419: uint16 srcdata = ADDRREG(srcreg); ! 420: uint32 dstaddr = ipc->dst; ! 421: uint16 outdata = srcdata; ! 422: ! 423: storeword(dstaddr, outdata); ! 424: PC+= 4; ! 425: } ! 426: ! 427: void cpu_op_440b(t_ipc *ipc) /* MOVE */ { ! 428: /* mask fff8, bits 31c8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 429: int srcreg = (ipc->opcode >> 0) & 7; ! 430: uint16 srcdata = ADDRREG(srcreg); ! 431: uint32 dstaddr = ipc->dst; ! 432: uint16 outdata = srcdata; ! 433: ! 434: storeword(dstaddr, outdata); ! 435: ! 436: VFLAG = 0; ! 437: CFLAG = 0; ! 438: NFLAG = ((sint16)outdata) < 0; ! 439: ZFLAG = !outdata; ! 440: PC+= 4; ! 441: } ! 442: ! 443: void cpu_op_441a(t_ipc *ipc) /* MOVE */ { ! 444: /* mask fff8, bits 33c8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 445: int srcreg = (ipc->opcode >> 0) & 7; ! 446: uint16 srcdata = ADDRREG(srcreg); ! 447: uint32 dstaddr = ipc->dst; ! 448: uint16 outdata = srcdata; ! 449: ! 450: storeword(dstaddr, outdata); ! 451: PC+= 6; ! 452: } ! 453: ! 454: void cpu_op_441b(t_ipc *ipc) /* MOVE */ { ! 455: /* mask fff8, bits 33c8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 456: int srcreg = (ipc->opcode >> 0) & 7; ! 457: uint16 srcdata = ADDRREG(srcreg); ! 458: uint32 dstaddr = ipc->dst; ! 459: uint16 outdata = srcdata; ! 460: ! 461: storeword(dstaddr, outdata); ! 462: ! 463: VFLAG = 0; ! 464: CFLAG = 0; ! 465: NFLAG = ((sint16)outdata) < 0; ! 466: ZFLAG = !outdata; ! 467: PC+= 6; ! 468: } ! 469: ! 470: void cpu_op_442a(t_ipc *ipc) /* MOVE */ { ! 471: /* mask f1f8, bits 3010, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 472: int srcreg = (ipc->opcode >> 0) & 7; ! 473: uint32 srcaddr = ADDRREG(srcreg); ! 474: uint16 srcdata = fetchword(srcaddr); ! 475: int dstreg = (ipc->opcode >> 9) & 7; ! 476: uint16 outdata = srcdata; ! 477: ! 478: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 479: PC+= 2; ! 480: } ! 481: ! 482: void cpu_op_442b(t_ipc *ipc) /* MOVE */ { ! 483: /* mask f1f8, bits 3010, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 484: int srcreg = (ipc->opcode >> 0) & 7; ! 485: uint32 srcaddr = ADDRREG(srcreg); ! 486: uint16 srcdata = fetchword(srcaddr); ! 487: int dstreg = (ipc->opcode >> 9) & 7; ! 488: uint16 outdata = srcdata; ! 489: ! 490: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 491: ! 492: VFLAG = 0; ! 493: CFLAG = 0; ! 494: NFLAG = ((sint16)outdata) < 0; ! 495: ZFLAG = !outdata; ! 496: PC+= 2; ! 497: } ! 498: ! 499: void cpu_op_443a(t_ipc *ipc) /* MOVE */ { ! 500: /* mask f1f8, bits 3090, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 501: int srcreg = (ipc->opcode >> 0) & 7; ! 502: uint32 srcaddr = ADDRREG(srcreg); ! 503: uint16 srcdata = fetchword(srcaddr); ! 504: int dstreg = (ipc->opcode >> 9) & 7; ! 505: uint32 dstaddr = ADDRREG(dstreg); ! 506: uint16 outdata = srcdata; ! 507: ! 508: storeword(dstaddr, outdata); ! 509: PC+= 2; ! 510: } ! 511: ! 512: void cpu_op_443b(t_ipc *ipc) /* MOVE */ { ! 513: /* mask f1f8, bits 3090, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 514: int srcreg = (ipc->opcode >> 0) & 7; ! 515: uint32 srcaddr = ADDRREG(srcreg); ! 516: uint16 srcdata = fetchword(srcaddr); ! 517: int dstreg = (ipc->opcode >> 9) & 7; ! 518: uint32 dstaddr = ADDRREG(dstreg); ! 519: uint16 outdata = srcdata; ! 520: ! 521: storeword(dstaddr, outdata); ! 522: ! 523: VFLAG = 0; ! 524: CFLAG = 0; ! 525: NFLAG = ((sint16)outdata) < 0; ! 526: ZFLAG = !outdata; ! 527: PC+= 2; ! 528: } ! 529: ! 530: void cpu_op_444a(t_ipc *ipc) /* MOVE */ { ! 531: /* mask f1f8, bits 30d0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 532: int srcreg = (ipc->opcode >> 0) & 7; ! 533: uint32 srcaddr = ADDRREG(srcreg); ! 534: uint16 srcdata = fetchword(srcaddr); ! 535: int dstreg = (ipc->opcode >> 9) & 7; ! 536: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 537: uint16 outdata = srcdata; ! 538: ! 539: storeword(dstaddr, outdata); ! 540: PC+= 2; ! 541: } ! 542: ! 543: void cpu_op_444b(t_ipc *ipc) /* MOVE */ { ! 544: /* mask f1f8, bits 30d0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 545: int srcreg = (ipc->opcode >> 0) & 7; ! 546: uint32 srcaddr = ADDRREG(srcreg); ! 547: uint16 srcdata = fetchword(srcaddr); ! 548: int dstreg = (ipc->opcode >> 9) & 7; ! 549: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 550: uint16 outdata = srcdata; ! 551: ! 552: storeword(dstaddr, outdata); ! 553: ! 554: VFLAG = 0; ! 555: CFLAG = 0; ! 556: NFLAG = ((sint16)outdata) < 0; ! 557: ZFLAG = !outdata; ! 558: PC+= 2; ! 559: } ! 560: ! 561: void cpu_op_445a(t_ipc *ipc) /* MOVE */ { ! 562: /* mask f1f8, bits 3110, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 563: int srcreg = (ipc->opcode >> 0) & 7; ! 564: uint32 srcaddr = ADDRREG(srcreg); ! 565: uint16 srcdata = fetchword(srcaddr); ! 566: int dstreg = (ipc->opcode >> 9) & 7; ! 567: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 568: uint16 outdata = srcdata; ! 569: ! 570: storeword(dstaddr, outdata); ! 571: PC+= 2; ! 572: } ! 573: ! 574: void cpu_op_445b(t_ipc *ipc) /* MOVE */ { ! 575: /* mask f1f8, bits 3110, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 576: int srcreg = (ipc->opcode >> 0) & 7; ! 577: uint32 srcaddr = ADDRREG(srcreg); ! 578: uint16 srcdata = fetchword(srcaddr); ! 579: int dstreg = (ipc->opcode >> 9) & 7; ! 580: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 581: uint16 outdata = srcdata; ! 582: ! 583: storeword(dstaddr, outdata); ! 584: ! 585: VFLAG = 0; ! 586: CFLAG = 0; ! 587: NFLAG = ((sint16)outdata) < 0; ! 588: ZFLAG = !outdata; ! 589: PC+= 2; ! 590: } ! 591: ! 592: void cpu_op_446a(t_ipc *ipc) /* MOVE */ { ! 593: /* mask f1f8, bits 3150, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 594: int srcreg = (ipc->opcode >> 0) & 7; ! 595: uint32 srcaddr = ADDRREG(srcreg); ! 596: uint16 srcdata = fetchword(srcaddr); ! 597: int dstreg = (ipc->opcode >> 9) & 7; ! 598: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 599: uint16 outdata = srcdata; ! 600: ! 601: storeword(dstaddr, outdata); ! 602: PC+= 4; ! 603: } ! 604: ! 605: void cpu_op_446b(t_ipc *ipc) /* MOVE */ { ! 606: /* mask f1f8, bits 3150, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 607: int srcreg = (ipc->opcode >> 0) & 7; ! 608: uint32 srcaddr = ADDRREG(srcreg); ! 609: uint16 srcdata = fetchword(srcaddr); ! 610: int dstreg = (ipc->opcode >> 9) & 7; ! 611: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 612: uint16 outdata = srcdata; ! 613: ! 614: storeword(dstaddr, outdata); ! 615: ! 616: VFLAG = 0; ! 617: CFLAG = 0; ! 618: NFLAG = ((sint16)outdata) < 0; ! 619: ZFLAG = !outdata; ! 620: PC+= 4; ! 621: } ! 622: ! 623: void cpu_op_447a(t_ipc *ipc) /* MOVE */ { ! 624: /* mask f1f8, bits 3190, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 625: int srcreg = (ipc->opcode >> 0) & 7; ! 626: uint32 srcaddr = ADDRREG(srcreg); ! 627: uint16 srcdata = fetchword(srcaddr); ! 628: int dstreg = (ipc->opcode >> 9) & 7; ! 629: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 630: uint16 outdata = srcdata; ! 631: ! 632: storeword(dstaddr, outdata); ! 633: PC+= 4; ! 634: } ! 635: ! 636: void cpu_op_447b(t_ipc *ipc) /* MOVE */ { ! 637: /* mask f1f8, bits 3190, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 638: int srcreg = (ipc->opcode >> 0) & 7; ! 639: uint32 srcaddr = ADDRREG(srcreg); ! 640: uint16 srcdata = fetchword(srcaddr); ! 641: int dstreg = (ipc->opcode >> 9) & 7; ! 642: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 643: uint16 outdata = srcdata; ! 644: ! 645: storeword(dstaddr, outdata); ! 646: ! 647: VFLAG = 0; ! 648: CFLAG = 0; ! 649: NFLAG = ((sint16)outdata) < 0; ! 650: ZFLAG = !outdata; ! 651: PC+= 4; ! 652: } ! 653: ! 654: void cpu_op_448a(t_ipc *ipc) /* MOVE */ { ! 655: /* mask fff8, bits 31d0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 656: int srcreg = (ipc->opcode >> 0) & 7; ! 657: uint32 srcaddr = ADDRREG(srcreg); ! 658: uint16 srcdata = fetchword(srcaddr); ! 659: uint32 dstaddr = ipc->dst; ! 660: uint16 outdata = srcdata; ! 661: ! 662: storeword(dstaddr, outdata); ! 663: PC+= 4; ! 664: } ! 665: ! 666: void cpu_op_448b(t_ipc *ipc) /* MOVE */ { ! 667: /* mask fff8, bits 31d0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 668: int srcreg = (ipc->opcode >> 0) & 7; ! 669: uint32 srcaddr = ADDRREG(srcreg); ! 670: uint16 srcdata = fetchword(srcaddr); ! 671: uint32 dstaddr = ipc->dst; ! 672: uint16 outdata = srcdata; ! 673: ! 674: storeword(dstaddr, outdata); ! 675: ! 676: VFLAG = 0; ! 677: CFLAG = 0; ! 678: NFLAG = ((sint16)outdata) < 0; ! 679: ZFLAG = !outdata; ! 680: PC+= 4; ! 681: } ! 682: ! 683: void cpu_op_449a(t_ipc *ipc) /* MOVE */ { ! 684: /* mask fff8, bits 33d0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 685: int srcreg = (ipc->opcode >> 0) & 7; ! 686: uint32 srcaddr = ADDRREG(srcreg); ! 687: uint16 srcdata = fetchword(srcaddr); ! 688: uint32 dstaddr = ipc->dst; ! 689: uint16 outdata = srcdata; ! 690: ! 691: storeword(dstaddr, outdata); ! 692: PC+= 6; ! 693: } ! 694: ! 695: void cpu_op_449b(t_ipc *ipc) /* MOVE */ { ! 696: /* mask fff8, bits 33d0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 697: int srcreg = (ipc->opcode >> 0) & 7; ! 698: uint32 srcaddr = ADDRREG(srcreg); ! 699: uint16 srcdata = fetchword(srcaddr); ! 700: uint32 dstaddr = ipc->dst; ! 701: uint16 outdata = srcdata; ! 702: ! 703: storeword(dstaddr, outdata); ! 704: ! 705: VFLAG = 0; ! 706: CFLAG = 0; ! 707: NFLAG = ((sint16)outdata) < 0; ! 708: ZFLAG = !outdata; ! 709: PC+= 6; ! 710: } ! 711: ! 712: void cpu_op_450a(t_ipc *ipc) /* MOVE */ { ! 713: /* mask f1f8, bits 3018, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 714: int srcreg = (ipc->opcode >> 0) & 7; ! 715: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 716: uint16 srcdata = fetchword(srcaddr); ! 717: int dstreg = (ipc->opcode >> 9) & 7; ! 718: uint16 outdata = srcdata; ! 719: ! 720: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 721: PC+= 2; ! 722: } ! 723: ! 724: void cpu_op_450b(t_ipc *ipc) /* MOVE */ { ! 725: /* mask f1f8, bits 3018, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 726: int srcreg = (ipc->opcode >> 0) & 7; ! 727: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 728: uint16 srcdata = fetchword(srcaddr); ! 729: int dstreg = (ipc->opcode >> 9) & 7; ! 730: uint16 outdata = srcdata; ! 731: ! 732: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 733: ! 734: VFLAG = 0; ! 735: CFLAG = 0; ! 736: NFLAG = ((sint16)outdata) < 0; ! 737: ZFLAG = !outdata; ! 738: PC+= 2; ! 739: } ! 740: ! 741: void cpu_op_451a(t_ipc *ipc) /* MOVE */ { ! 742: /* mask f1f8, bits 3098, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 743: int srcreg = (ipc->opcode >> 0) & 7; ! 744: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 745: uint16 srcdata = fetchword(srcaddr); ! 746: int dstreg = (ipc->opcode >> 9) & 7; ! 747: uint32 dstaddr = ADDRREG(dstreg); ! 748: uint16 outdata = srcdata; ! 749: ! 750: storeword(dstaddr, outdata); ! 751: PC+= 2; ! 752: } ! 753: ! 754: void cpu_op_451b(t_ipc *ipc) /* MOVE */ { ! 755: /* mask f1f8, bits 3098, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 756: int srcreg = (ipc->opcode >> 0) & 7; ! 757: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 758: uint16 srcdata = fetchword(srcaddr); ! 759: int dstreg = (ipc->opcode >> 9) & 7; ! 760: uint32 dstaddr = ADDRREG(dstreg); ! 761: uint16 outdata = srcdata; ! 762: ! 763: storeword(dstaddr, outdata); ! 764: ! 765: VFLAG = 0; ! 766: CFLAG = 0; ! 767: NFLAG = ((sint16)outdata) < 0; ! 768: ZFLAG = !outdata; ! 769: PC+= 2; ! 770: } ! 771: ! 772: void cpu_op_452a(t_ipc *ipc) /* MOVE */ { ! 773: /* mask f1f8, bits 30d8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 774: int srcreg = (ipc->opcode >> 0) & 7; ! 775: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 776: uint16 srcdata = fetchword(srcaddr); ! 777: int dstreg = (ipc->opcode >> 9) & 7; ! 778: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 779: uint16 outdata = srcdata; ! 780: ! 781: storeword(dstaddr, outdata); ! 782: PC+= 2; ! 783: } ! 784: ! 785: void cpu_op_452b(t_ipc *ipc) /* MOVE */ { ! 786: /* mask f1f8, bits 30d8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 787: int srcreg = (ipc->opcode >> 0) & 7; ! 788: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 789: uint16 srcdata = fetchword(srcaddr); ! 790: int dstreg = (ipc->opcode >> 9) & 7; ! 791: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 792: uint16 outdata = srcdata; ! 793: ! 794: storeword(dstaddr, outdata); ! 795: ! 796: VFLAG = 0; ! 797: CFLAG = 0; ! 798: NFLAG = ((sint16)outdata) < 0; ! 799: ZFLAG = !outdata; ! 800: PC+= 2; ! 801: } ! 802: ! 803: void cpu_op_453a(t_ipc *ipc) /* MOVE */ { ! 804: /* mask f1f8, bits 3118, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 805: int srcreg = (ipc->opcode >> 0) & 7; ! 806: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 807: uint16 srcdata = fetchword(srcaddr); ! 808: int dstreg = (ipc->opcode >> 9) & 7; ! 809: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 810: uint16 outdata = srcdata; ! 811: ! 812: storeword(dstaddr, outdata); ! 813: PC+= 2; ! 814: } ! 815: ! 816: void cpu_op_453b(t_ipc *ipc) /* MOVE */ { ! 817: /* mask f1f8, bits 3118, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 818: int srcreg = (ipc->opcode >> 0) & 7; ! 819: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 820: uint16 srcdata = fetchword(srcaddr); ! 821: int dstreg = (ipc->opcode >> 9) & 7; ! 822: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 823: uint16 outdata = srcdata; ! 824: ! 825: storeword(dstaddr, outdata); ! 826: ! 827: VFLAG = 0; ! 828: CFLAG = 0; ! 829: NFLAG = ((sint16)outdata) < 0; ! 830: ZFLAG = !outdata; ! 831: PC+= 2; ! 832: } ! 833: ! 834: void cpu_op_454a(t_ipc *ipc) /* MOVE */ { ! 835: /* mask f1f8, bits 3158, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 836: int srcreg = (ipc->opcode >> 0) & 7; ! 837: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 838: uint16 srcdata = fetchword(srcaddr); ! 839: int dstreg = (ipc->opcode >> 9) & 7; ! 840: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 841: uint16 outdata = srcdata; ! 842: ! 843: storeword(dstaddr, outdata); ! 844: PC+= 4; ! 845: } ! 846: ! 847: void cpu_op_454b(t_ipc *ipc) /* MOVE */ { ! 848: /* mask f1f8, bits 3158, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 849: int srcreg = (ipc->opcode >> 0) & 7; ! 850: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 851: uint16 srcdata = fetchword(srcaddr); ! 852: int dstreg = (ipc->opcode >> 9) & 7; ! 853: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 854: uint16 outdata = srcdata; ! 855: ! 856: storeword(dstaddr, outdata); ! 857: ! 858: VFLAG = 0; ! 859: CFLAG = 0; ! 860: NFLAG = ((sint16)outdata) < 0; ! 861: ZFLAG = !outdata; ! 862: PC+= 4; ! 863: } ! 864: ! 865: void cpu_op_455a(t_ipc *ipc) /* MOVE */ { ! 866: /* mask f1f8, bits 3198, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 867: int srcreg = (ipc->opcode >> 0) & 7; ! 868: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 869: uint16 srcdata = fetchword(srcaddr); ! 870: int dstreg = (ipc->opcode >> 9) & 7; ! 871: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 872: uint16 outdata = srcdata; ! 873: ! 874: storeword(dstaddr, outdata); ! 875: PC+= 4; ! 876: } ! 877: ! 878: void cpu_op_455b(t_ipc *ipc) /* MOVE */ { ! 879: /* mask f1f8, bits 3198, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 880: int srcreg = (ipc->opcode >> 0) & 7; ! 881: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 882: uint16 srcdata = fetchword(srcaddr); ! 883: int dstreg = (ipc->opcode >> 9) & 7; ! 884: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 885: uint16 outdata = srcdata; ! 886: ! 887: storeword(dstaddr, outdata); ! 888: ! 889: VFLAG = 0; ! 890: CFLAG = 0; ! 891: NFLAG = ((sint16)outdata) < 0; ! 892: ZFLAG = !outdata; ! 893: PC+= 4; ! 894: } ! 895: ! 896: void cpu_op_456a(t_ipc *ipc) /* MOVE */ { ! 897: /* mask fff8, bits 31d8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 898: int srcreg = (ipc->opcode >> 0) & 7; ! 899: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 900: uint16 srcdata = fetchword(srcaddr); ! 901: uint32 dstaddr = ipc->dst; ! 902: uint16 outdata = srcdata; ! 903: ! 904: storeword(dstaddr, outdata); ! 905: PC+= 4; ! 906: } ! 907: ! 908: void cpu_op_456b(t_ipc *ipc) /* MOVE */ { ! 909: /* mask fff8, bits 31d8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 910: int srcreg = (ipc->opcode >> 0) & 7; ! 911: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 912: uint16 srcdata = fetchword(srcaddr); ! 913: uint32 dstaddr = ipc->dst; ! 914: uint16 outdata = srcdata; ! 915: ! 916: storeword(dstaddr, outdata); ! 917: ! 918: VFLAG = 0; ! 919: CFLAG = 0; ! 920: NFLAG = ((sint16)outdata) < 0; ! 921: ZFLAG = !outdata; ! 922: PC+= 4; ! 923: } ! 924: ! 925: void cpu_op_457a(t_ipc *ipc) /* MOVE */ { ! 926: /* mask fff8, bits 33d8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 927: int srcreg = (ipc->opcode >> 0) & 7; ! 928: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 929: uint16 srcdata = fetchword(srcaddr); ! 930: uint32 dstaddr = ipc->dst; ! 931: uint16 outdata = srcdata; ! 932: ! 933: storeword(dstaddr, outdata); ! 934: PC+= 6; ! 935: } ! 936: ! 937: void cpu_op_457b(t_ipc *ipc) /* MOVE */ { ! 938: /* mask fff8, bits 33d8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 939: int srcreg = (ipc->opcode >> 0) & 7; ! 940: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 941: uint16 srcdata = fetchword(srcaddr); ! 942: uint32 dstaddr = ipc->dst; ! 943: uint16 outdata = srcdata; ! 944: ! 945: storeword(dstaddr, outdata); ! 946: ! 947: VFLAG = 0; ! 948: CFLAG = 0; ! 949: NFLAG = ((sint16)outdata) < 0; ! 950: ZFLAG = !outdata; ! 951: PC+= 6; ! 952: } ! 953: ! 954: void cpu_op_458a(t_ipc *ipc) /* MOVE */ { ! 955: /* mask f1f8, bits 3020, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 956: int srcreg = (ipc->opcode >> 0) & 7; ! 957: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 958: uint16 srcdata = fetchword(srcaddr); ! 959: int dstreg = (ipc->opcode >> 9) & 7; ! 960: uint16 outdata = srcdata; ! 961: ! 962: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 963: PC+= 2; ! 964: } ! 965: ! 966: void cpu_op_458b(t_ipc *ipc) /* MOVE */ { ! 967: /* mask f1f8, bits 3020, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 968: int srcreg = (ipc->opcode >> 0) & 7; ! 969: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 970: uint16 srcdata = fetchword(srcaddr); ! 971: int dstreg = (ipc->opcode >> 9) & 7; ! 972: uint16 outdata = srcdata; ! 973: ! 974: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 975: ! 976: VFLAG = 0; ! 977: CFLAG = 0; ! 978: NFLAG = ((sint16)outdata) < 0; ! 979: ZFLAG = !outdata; ! 980: PC+= 2; ! 981: } ! 982: ! 983: void cpu_op_459a(t_ipc *ipc) /* MOVE */ { ! 984: /* mask f1f8, bits 30a0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 985: int srcreg = (ipc->opcode >> 0) & 7; ! 986: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 987: uint16 srcdata = fetchword(srcaddr); ! 988: int dstreg = (ipc->opcode >> 9) & 7; ! 989: uint32 dstaddr = ADDRREG(dstreg); ! 990: uint16 outdata = srcdata; ! 991: ! 992: storeword(dstaddr, outdata); ! 993: PC+= 2; ! 994: } ! 995: ! 996: void cpu_op_459b(t_ipc *ipc) /* MOVE */ { ! 997: /* mask f1f8, bits 30a0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 998: int srcreg = (ipc->opcode >> 0) & 7; ! 999: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1000: uint16 srcdata = fetchword(srcaddr); ! 1001: int dstreg = (ipc->opcode >> 9) & 7; ! 1002: uint32 dstaddr = ADDRREG(dstreg); ! 1003: uint16 outdata = srcdata; ! 1004: ! 1005: storeword(dstaddr, outdata); ! 1006: ! 1007: VFLAG = 0; ! 1008: CFLAG = 0; ! 1009: NFLAG = ((sint16)outdata) < 0; ! 1010: ZFLAG = !outdata; ! 1011: PC+= 2; ! 1012: } ! 1013: ! 1014: void cpu_op_460a(t_ipc *ipc) /* MOVE */ { ! 1015: /* mask f1f8, bits 30e0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1016: int srcreg = (ipc->opcode >> 0) & 7; ! 1017: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1018: uint16 srcdata = fetchword(srcaddr); ! 1019: int dstreg = (ipc->opcode >> 9) & 7; ! 1020: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1021: uint16 outdata = srcdata; ! 1022: ! 1023: storeword(dstaddr, outdata); ! 1024: PC+= 2; ! 1025: } ! 1026: ! 1027: void cpu_op_460b(t_ipc *ipc) /* MOVE */ { ! 1028: /* mask f1f8, bits 30e0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1029: int srcreg = (ipc->opcode >> 0) & 7; ! 1030: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1031: uint16 srcdata = fetchword(srcaddr); ! 1032: int dstreg = (ipc->opcode >> 9) & 7; ! 1033: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1034: uint16 outdata = srcdata; ! 1035: ! 1036: storeword(dstaddr, outdata); ! 1037: ! 1038: VFLAG = 0; ! 1039: CFLAG = 0; ! 1040: NFLAG = ((sint16)outdata) < 0; ! 1041: ZFLAG = !outdata; ! 1042: PC+= 2; ! 1043: } ! 1044: ! 1045: void cpu_op_461a(t_ipc *ipc) /* MOVE */ { ! 1046: /* mask f1f8, bits 3120, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1047: int srcreg = (ipc->opcode >> 0) & 7; ! 1048: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1049: uint16 srcdata = fetchword(srcaddr); ! 1050: int dstreg = (ipc->opcode >> 9) & 7; ! 1051: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1052: uint16 outdata = srcdata; ! 1053: ! 1054: storeword(dstaddr, outdata); ! 1055: PC+= 2; ! 1056: } ! 1057: ! 1058: void cpu_op_461b(t_ipc *ipc) /* MOVE */ { ! 1059: /* mask f1f8, bits 3120, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1060: int srcreg = (ipc->opcode >> 0) & 7; ! 1061: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1062: uint16 srcdata = fetchword(srcaddr); ! 1063: int dstreg = (ipc->opcode >> 9) & 7; ! 1064: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1065: uint16 outdata = srcdata; ! 1066: ! 1067: storeword(dstaddr, outdata); ! 1068: ! 1069: VFLAG = 0; ! 1070: CFLAG = 0; ! 1071: NFLAG = ((sint16)outdata) < 0; ! 1072: ZFLAG = !outdata; ! 1073: PC+= 2; ! 1074: } ! 1075: ! 1076: void cpu_op_462a(t_ipc *ipc) /* MOVE */ { ! 1077: /* mask f1f8, bits 3160, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1078: int srcreg = (ipc->opcode >> 0) & 7; ! 1079: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1080: uint16 srcdata = fetchword(srcaddr); ! 1081: int dstreg = (ipc->opcode >> 9) & 7; ! 1082: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1083: uint16 outdata = srcdata; ! 1084: ! 1085: storeword(dstaddr, outdata); ! 1086: PC+= 4; ! 1087: } ! 1088: ! 1089: void cpu_op_462b(t_ipc *ipc) /* MOVE */ { ! 1090: /* mask f1f8, bits 3160, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1091: int srcreg = (ipc->opcode >> 0) & 7; ! 1092: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1093: uint16 srcdata = fetchword(srcaddr); ! 1094: int dstreg = (ipc->opcode >> 9) & 7; ! 1095: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1096: uint16 outdata = srcdata; ! 1097: ! 1098: storeword(dstaddr, outdata); ! 1099: ! 1100: VFLAG = 0; ! 1101: CFLAG = 0; ! 1102: NFLAG = ((sint16)outdata) < 0; ! 1103: ZFLAG = !outdata; ! 1104: PC+= 4; ! 1105: } ! 1106: ! 1107: void cpu_op_463a(t_ipc *ipc) /* MOVE */ { ! 1108: /* mask f1f8, bits 31a0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1109: int srcreg = (ipc->opcode >> 0) & 7; ! 1110: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1111: uint16 srcdata = fetchword(srcaddr); ! 1112: int dstreg = (ipc->opcode >> 9) & 7; ! 1113: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1114: uint16 outdata = srcdata; ! 1115: ! 1116: storeword(dstaddr, outdata); ! 1117: PC+= 4; ! 1118: } ! 1119: ! 1120: void cpu_op_463b(t_ipc *ipc) /* MOVE */ { ! 1121: /* mask f1f8, bits 31a0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1122: int srcreg = (ipc->opcode >> 0) & 7; ! 1123: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1124: uint16 srcdata = fetchword(srcaddr); ! 1125: int dstreg = (ipc->opcode >> 9) & 7; ! 1126: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1127: uint16 outdata = srcdata; ! 1128: ! 1129: storeword(dstaddr, outdata); ! 1130: ! 1131: VFLAG = 0; ! 1132: CFLAG = 0; ! 1133: NFLAG = ((sint16)outdata) < 0; ! 1134: ZFLAG = !outdata; ! 1135: PC+= 4; ! 1136: } ! 1137: ! 1138: void cpu_op_464a(t_ipc *ipc) /* MOVE */ { ! 1139: /* mask fff8, bits 31e0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1140: int srcreg = (ipc->opcode >> 0) & 7; ! 1141: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1142: uint16 srcdata = fetchword(srcaddr); ! 1143: uint32 dstaddr = ipc->dst; ! 1144: uint16 outdata = srcdata; ! 1145: ! 1146: storeword(dstaddr, outdata); ! 1147: PC+= 4; ! 1148: } ! 1149: ! 1150: void cpu_op_464b(t_ipc *ipc) /* MOVE */ { ! 1151: /* mask fff8, bits 31e0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1152: int srcreg = (ipc->opcode >> 0) & 7; ! 1153: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1154: uint16 srcdata = fetchword(srcaddr); ! 1155: uint32 dstaddr = ipc->dst; ! 1156: uint16 outdata = srcdata; ! 1157: ! 1158: storeword(dstaddr, outdata); ! 1159: ! 1160: VFLAG = 0; ! 1161: CFLAG = 0; ! 1162: NFLAG = ((sint16)outdata) < 0; ! 1163: ZFLAG = !outdata; ! 1164: PC+= 4; ! 1165: } ! 1166: ! 1167: void cpu_op_465a(t_ipc *ipc) /* MOVE */ { ! 1168: /* mask fff8, bits 33e0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1169: int srcreg = (ipc->opcode >> 0) & 7; ! 1170: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1171: uint16 srcdata = fetchword(srcaddr); ! 1172: uint32 dstaddr = ipc->dst; ! 1173: uint16 outdata = srcdata; ! 1174: ! 1175: storeword(dstaddr, outdata); ! 1176: PC+= 6; ! 1177: } ! 1178: ! 1179: void cpu_op_465b(t_ipc *ipc) /* MOVE */ { ! 1180: /* mask fff8, bits 33e0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1181: int srcreg = (ipc->opcode >> 0) & 7; ! 1182: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1183: uint16 srcdata = fetchword(srcaddr); ! 1184: uint32 dstaddr = ipc->dst; ! 1185: uint16 outdata = srcdata; ! 1186: ! 1187: storeword(dstaddr, outdata); ! 1188: ! 1189: VFLAG = 0; ! 1190: CFLAG = 0; ! 1191: NFLAG = ((sint16)outdata) < 0; ! 1192: ZFLAG = !outdata; ! 1193: PC+= 6; ! 1194: } ! 1195: ! 1196: void cpu_op_466a(t_ipc *ipc) /* MOVE */ { ! 1197: /* mask f1f8, bits 3028, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1198: int srcreg = (ipc->opcode >> 0) & 7; ! 1199: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1200: uint16 srcdata = fetchword(srcaddr); ! 1201: int dstreg = (ipc->opcode >> 9) & 7; ! 1202: uint16 outdata = srcdata; ! 1203: ! 1204: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1205: PC+= 4; ! 1206: } ! 1207: ! 1208: void cpu_op_466b(t_ipc *ipc) /* MOVE */ { ! 1209: /* mask f1f8, bits 3028, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1210: int srcreg = (ipc->opcode >> 0) & 7; ! 1211: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1212: uint16 srcdata = fetchword(srcaddr); ! 1213: int dstreg = (ipc->opcode >> 9) & 7; ! 1214: uint16 outdata = srcdata; ! 1215: ! 1216: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1217: ! 1218: VFLAG = 0; ! 1219: CFLAG = 0; ! 1220: NFLAG = ((sint16)outdata) < 0; ! 1221: ZFLAG = !outdata; ! 1222: PC+= 4; ! 1223: } ! 1224: ! 1225: void cpu_op_467a(t_ipc *ipc) /* MOVE */ { ! 1226: /* mask f1f8, bits 30a8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1227: int srcreg = (ipc->opcode >> 0) & 7; ! 1228: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1229: uint16 srcdata = fetchword(srcaddr); ! 1230: int dstreg = (ipc->opcode >> 9) & 7; ! 1231: uint32 dstaddr = ADDRREG(dstreg); ! 1232: uint16 outdata = srcdata; ! 1233: ! 1234: storeword(dstaddr, outdata); ! 1235: PC+= 4; ! 1236: } ! 1237: ! 1238: void cpu_op_467b(t_ipc *ipc) /* MOVE */ { ! 1239: /* mask f1f8, bits 30a8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1240: int srcreg = (ipc->opcode >> 0) & 7; ! 1241: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1242: uint16 srcdata = fetchword(srcaddr); ! 1243: int dstreg = (ipc->opcode >> 9) & 7; ! 1244: uint32 dstaddr = ADDRREG(dstreg); ! 1245: uint16 outdata = srcdata; ! 1246: ! 1247: storeword(dstaddr, outdata); ! 1248: ! 1249: VFLAG = 0; ! 1250: CFLAG = 0; ! 1251: NFLAG = ((sint16)outdata) < 0; ! 1252: ZFLAG = !outdata; ! 1253: PC+= 4; ! 1254: } ! 1255: ! 1256: void cpu_op_468a(t_ipc *ipc) /* MOVE */ { ! 1257: /* mask f1f8, bits 30e8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1258: int srcreg = (ipc->opcode >> 0) & 7; ! 1259: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1260: uint16 srcdata = fetchword(srcaddr); ! 1261: int dstreg = (ipc->opcode >> 9) & 7; ! 1262: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1263: uint16 outdata = srcdata; ! 1264: ! 1265: storeword(dstaddr, outdata); ! 1266: PC+= 4; ! 1267: } ! 1268: ! 1269: void cpu_op_468b(t_ipc *ipc) /* MOVE */ { ! 1270: /* mask f1f8, bits 30e8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1271: int srcreg = (ipc->opcode >> 0) & 7; ! 1272: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1273: uint16 srcdata = fetchword(srcaddr); ! 1274: int dstreg = (ipc->opcode >> 9) & 7; ! 1275: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1276: uint16 outdata = srcdata; ! 1277: ! 1278: storeword(dstaddr, outdata); ! 1279: ! 1280: VFLAG = 0; ! 1281: CFLAG = 0; ! 1282: NFLAG = ((sint16)outdata) < 0; ! 1283: ZFLAG = !outdata; ! 1284: PC+= 4; ! 1285: } ! 1286: ! 1287: void cpu_op_469a(t_ipc *ipc) /* MOVE */ { ! 1288: /* mask f1f8, bits 3128, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1289: int srcreg = (ipc->opcode >> 0) & 7; ! 1290: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1291: uint16 srcdata = fetchword(srcaddr); ! 1292: int dstreg = (ipc->opcode >> 9) & 7; ! 1293: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1294: uint16 outdata = srcdata; ! 1295: ! 1296: storeword(dstaddr, outdata); ! 1297: PC+= 4; ! 1298: } ! 1299: ! 1300: void cpu_op_469b(t_ipc *ipc) /* MOVE */ { ! 1301: /* mask f1f8, bits 3128, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1302: int srcreg = (ipc->opcode >> 0) & 7; ! 1303: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1304: uint16 srcdata = fetchword(srcaddr); ! 1305: int dstreg = (ipc->opcode >> 9) & 7; ! 1306: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1307: uint16 outdata = srcdata; ! 1308: ! 1309: storeword(dstaddr, outdata); ! 1310: ! 1311: VFLAG = 0; ! 1312: CFLAG = 0; ! 1313: NFLAG = ((sint16)outdata) < 0; ! 1314: ZFLAG = !outdata; ! 1315: PC+= 4; ! 1316: } ! 1317: ! 1318: void cpu_op_470a(t_ipc *ipc) /* MOVE */ { ! 1319: /* mask f1f8, bits 3168, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1320: int srcreg = (ipc->opcode >> 0) & 7; ! 1321: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1322: uint16 srcdata = fetchword(srcaddr); ! 1323: int dstreg = (ipc->opcode >> 9) & 7; ! 1324: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1325: uint16 outdata = srcdata; ! 1326: ! 1327: storeword(dstaddr, outdata); ! 1328: PC+= 6; ! 1329: } ! 1330: ! 1331: void cpu_op_470b(t_ipc *ipc) /* MOVE */ { ! 1332: /* mask f1f8, bits 3168, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1333: int srcreg = (ipc->opcode >> 0) & 7; ! 1334: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1335: uint16 srcdata = fetchword(srcaddr); ! 1336: int dstreg = (ipc->opcode >> 9) & 7; ! 1337: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1338: uint16 outdata = srcdata; ! 1339: ! 1340: storeword(dstaddr, outdata); ! 1341: ! 1342: VFLAG = 0; ! 1343: CFLAG = 0; ! 1344: NFLAG = ((sint16)outdata) < 0; ! 1345: ZFLAG = !outdata; ! 1346: PC+= 6; ! 1347: } ! 1348: ! 1349: void cpu_op_471a(t_ipc *ipc) /* MOVE */ { ! 1350: /* mask f1f8, bits 31a8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1351: int srcreg = (ipc->opcode >> 0) & 7; ! 1352: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1353: uint16 srcdata = fetchword(srcaddr); ! 1354: int dstreg = (ipc->opcode >> 9) & 7; ! 1355: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1356: uint16 outdata = srcdata; ! 1357: ! 1358: storeword(dstaddr, outdata); ! 1359: PC+= 6; ! 1360: } ! 1361: ! 1362: void cpu_op_471b(t_ipc *ipc) /* MOVE */ { ! 1363: /* mask f1f8, bits 31a8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1364: int srcreg = (ipc->opcode >> 0) & 7; ! 1365: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1366: uint16 srcdata = fetchword(srcaddr); ! 1367: int dstreg = (ipc->opcode >> 9) & 7; ! 1368: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1369: uint16 outdata = srcdata; ! 1370: ! 1371: storeword(dstaddr, outdata); ! 1372: ! 1373: VFLAG = 0; ! 1374: CFLAG = 0; ! 1375: NFLAG = ((sint16)outdata) < 0; ! 1376: ZFLAG = !outdata; ! 1377: PC+= 6; ! 1378: } ! 1379: ! 1380: void cpu_op_472a(t_ipc *ipc) /* MOVE */ { ! 1381: /* mask fff8, bits 31e8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1382: int srcreg = (ipc->opcode >> 0) & 7; ! 1383: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1384: uint16 srcdata = fetchword(srcaddr); ! 1385: uint32 dstaddr = ipc->dst; ! 1386: uint16 outdata = srcdata; ! 1387: ! 1388: storeword(dstaddr, outdata); ! 1389: PC+= 6; ! 1390: } ! 1391: ! 1392: void cpu_op_472b(t_ipc *ipc) /* MOVE */ { ! 1393: /* mask fff8, bits 31e8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1394: int srcreg = (ipc->opcode >> 0) & 7; ! 1395: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1396: uint16 srcdata = fetchword(srcaddr); ! 1397: uint32 dstaddr = ipc->dst; ! 1398: uint16 outdata = srcdata; ! 1399: ! 1400: storeword(dstaddr, outdata); ! 1401: ! 1402: VFLAG = 0; ! 1403: CFLAG = 0; ! 1404: NFLAG = ((sint16)outdata) < 0; ! 1405: ZFLAG = !outdata; ! 1406: PC+= 6; ! 1407: } ! 1408: ! 1409: void cpu_op_473a(t_ipc *ipc) /* MOVE */ { ! 1410: /* mask fff8, bits 33e8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1411: int srcreg = (ipc->opcode >> 0) & 7; ! 1412: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1413: uint16 srcdata = fetchword(srcaddr); ! 1414: uint32 dstaddr = ipc->dst; ! 1415: uint16 outdata = srcdata; ! 1416: ! 1417: storeword(dstaddr, outdata); ! 1418: PC+= 8; ! 1419: } ! 1420: ! 1421: void cpu_op_473b(t_ipc *ipc) /* MOVE */ { ! 1422: /* mask fff8, bits 33e8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1423: int srcreg = (ipc->opcode >> 0) & 7; ! 1424: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1425: uint16 srcdata = fetchword(srcaddr); ! 1426: uint32 dstaddr = ipc->dst; ! 1427: uint16 outdata = srcdata; ! 1428: ! 1429: storeword(dstaddr, outdata); ! 1430: ! 1431: VFLAG = 0; ! 1432: CFLAG = 0; ! 1433: NFLAG = ((sint16)outdata) < 0; ! 1434: ZFLAG = !outdata; ! 1435: PC+= 8; ! 1436: } ! 1437: ! 1438: void cpu_op_474a(t_ipc *ipc) /* MOVE */ { ! 1439: /* mask f1f8, bits 3030, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1440: int srcreg = (ipc->opcode >> 0) & 7; ! 1441: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1442: uint16 srcdata = fetchword(srcaddr); ! 1443: int dstreg = (ipc->opcode >> 9) & 7; ! 1444: uint16 outdata = srcdata; ! 1445: ! 1446: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1447: PC+= 4; ! 1448: } ! 1449: ! 1450: void cpu_op_474b(t_ipc *ipc) /* MOVE */ { ! 1451: /* mask f1f8, bits 3030, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1452: int srcreg = (ipc->opcode >> 0) & 7; ! 1453: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1454: uint16 srcdata = fetchword(srcaddr); ! 1455: int dstreg = (ipc->opcode >> 9) & 7; ! 1456: uint16 outdata = srcdata; ! 1457: ! 1458: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1459: ! 1460: VFLAG = 0; ! 1461: CFLAG = 0; ! 1462: NFLAG = ((sint16)outdata) < 0; ! 1463: ZFLAG = !outdata; ! 1464: PC+= 4; ! 1465: } ! 1466: ! 1467: void cpu_op_475a(t_ipc *ipc) /* MOVE */ { ! 1468: /* mask f1f8, bits 30b0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1469: int srcreg = (ipc->opcode >> 0) & 7; ! 1470: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1471: uint16 srcdata = fetchword(srcaddr); ! 1472: int dstreg = (ipc->opcode >> 9) & 7; ! 1473: uint32 dstaddr = ADDRREG(dstreg); ! 1474: uint16 outdata = srcdata; ! 1475: ! 1476: storeword(dstaddr, outdata); ! 1477: PC+= 4; ! 1478: } ! 1479: ! 1480: void cpu_op_475b(t_ipc *ipc) /* MOVE */ { ! 1481: /* mask f1f8, bits 30b0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1482: int srcreg = (ipc->opcode >> 0) & 7; ! 1483: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1484: uint16 srcdata = fetchword(srcaddr); ! 1485: int dstreg = (ipc->opcode >> 9) & 7; ! 1486: uint32 dstaddr = ADDRREG(dstreg); ! 1487: uint16 outdata = srcdata; ! 1488: ! 1489: storeword(dstaddr, outdata); ! 1490: ! 1491: VFLAG = 0; ! 1492: CFLAG = 0; ! 1493: NFLAG = ((sint16)outdata) < 0; ! 1494: ZFLAG = !outdata; ! 1495: PC+= 4; ! 1496: } ! 1497: ! 1498: void cpu_op_476a(t_ipc *ipc) /* MOVE */ { ! 1499: /* mask f1f8, bits 30f0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1500: int srcreg = (ipc->opcode >> 0) & 7; ! 1501: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1502: uint16 srcdata = fetchword(srcaddr); ! 1503: int dstreg = (ipc->opcode >> 9) & 7; ! 1504: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1505: uint16 outdata = srcdata; ! 1506: ! 1507: storeword(dstaddr, outdata); ! 1508: PC+= 4; ! 1509: } ! 1510: ! 1511: void cpu_op_476b(t_ipc *ipc) /* MOVE */ { ! 1512: /* mask f1f8, bits 30f0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1513: int srcreg = (ipc->opcode >> 0) & 7; ! 1514: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1515: uint16 srcdata = fetchword(srcaddr); ! 1516: int dstreg = (ipc->opcode >> 9) & 7; ! 1517: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1518: uint16 outdata = srcdata; ! 1519: ! 1520: storeword(dstaddr, outdata); ! 1521: ! 1522: VFLAG = 0; ! 1523: CFLAG = 0; ! 1524: NFLAG = ((sint16)outdata) < 0; ! 1525: ZFLAG = !outdata; ! 1526: PC+= 4; ! 1527: } ! 1528: ! 1529: void cpu_op_477a(t_ipc *ipc) /* MOVE */ { ! 1530: /* mask f1f8, bits 3130, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1531: int srcreg = (ipc->opcode >> 0) & 7; ! 1532: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1533: uint16 srcdata = fetchword(srcaddr); ! 1534: int dstreg = (ipc->opcode >> 9) & 7; ! 1535: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1536: uint16 outdata = srcdata; ! 1537: ! 1538: storeword(dstaddr, outdata); ! 1539: PC+= 4; ! 1540: } ! 1541: ! 1542: void cpu_op_477b(t_ipc *ipc) /* MOVE */ { ! 1543: /* mask f1f8, bits 3130, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1544: int srcreg = (ipc->opcode >> 0) & 7; ! 1545: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1546: uint16 srcdata = fetchword(srcaddr); ! 1547: int dstreg = (ipc->opcode >> 9) & 7; ! 1548: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1549: uint16 outdata = srcdata; ! 1550: ! 1551: storeword(dstaddr, outdata); ! 1552: ! 1553: VFLAG = 0; ! 1554: CFLAG = 0; ! 1555: NFLAG = ((sint16)outdata) < 0; ! 1556: ZFLAG = !outdata; ! 1557: PC+= 4; ! 1558: } ! 1559: ! 1560: void cpu_op_478a(t_ipc *ipc) /* MOVE */ { ! 1561: /* mask f1f8, bits 3170, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1562: int srcreg = (ipc->opcode >> 0) & 7; ! 1563: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1564: uint16 srcdata = fetchword(srcaddr); ! 1565: int dstreg = (ipc->opcode >> 9) & 7; ! 1566: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1567: uint16 outdata = srcdata; ! 1568: ! 1569: storeword(dstaddr, outdata); ! 1570: PC+= 6; ! 1571: } ! 1572: ! 1573: void cpu_op_478b(t_ipc *ipc) /* MOVE */ { ! 1574: /* mask f1f8, bits 3170, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1575: int srcreg = (ipc->opcode >> 0) & 7; ! 1576: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1577: uint16 srcdata = fetchword(srcaddr); ! 1578: int dstreg = (ipc->opcode >> 9) & 7; ! 1579: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1580: uint16 outdata = srcdata; ! 1581: ! 1582: storeword(dstaddr, outdata); ! 1583: ! 1584: VFLAG = 0; ! 1585: CFLAG = 0; ! 1586: NFLAG = ((sint16)outdata) < 0; ! 1587: ZFLAG = !outdata; ! 1588: PC+= 6; ! 1589: } ! 1590: ! 1591: void cpu_op_479a(t_ipc *ipc) /* MOVE */ { ! 1592: /* mask f1f8, bits 31b0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1593: int srcreg = (ipc->opcode >> 0) & 7; ! 1594: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1595: uint16 srcdata = fetchword(srcaddr); ! 1596: int dstreg = (ipc->opcode >> 9) & 7; ! 1597: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1598: uint16 outdata = srcdata; ! 1599: ! 1600: storeword(dstaddr, outdata); ! 1601: PC+= 6; ! 1602: } ! 1603: ! 1604: void cpu_op_479b(t_ipc *ipc) /* MOVE */ { ! 1605: /* mask f1f8, bits 31b0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1606: int srcreg = (ipc->opcode >> 0) & 7; ! 1607: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1608: uint16 srcdata = fetchword(srcaddr); ! 1609: int dstreg = (ipc->opcode >> 9) & 7; ! 1610: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1611: uint16 outdata = srcdata; ! 1612: ! 1613: storeword(dstaddr, outdata); ! 1614: ! 1615: VFLAG = 0; ! 1616: CFLAG = 0; ! 1617: NFLAG = ((sint16)outdata) < 0; ! 1618: ZFLAG = !outdata; ! 1619: PC+= 6; ! 1620: } ! 1621: ! 1622: void cpu_op_480a(t_ipc *ipc) /* MOVE */ { ! 1623: /* mask fff8, bits 31f0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1624: int srcreg = (ipc->opcode >> 0) & 7; ! 1625: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1626: uint16 srcdata = fetchword(srcaddr); ! 1627: uint32 dstaddr = ipc->dst; ! 1628: uint16 outdata = srcdata; ! 1629: ! 1630: storeword(dstaddr, outdata); ! 1631: PC+= 6; ! 1632: } ! 1633: ! 1634: void cpu_op_480b(t_ipc *ipc) /* MOVE */ { ! 1635: /* mask fff8, bits 31f0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1636: int srcreg = (ipc->opcode >> 0) & 7; ! 1637: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1638: uint16 srcdata = fetchword(srcaddr); ! 1639: uint32 dstaddr = ipc->dst; ! 1640: uint16 outdata = srcdata; ! 1641: ! 1642: storeword(dstaddr, outdata); ! 1643: ! 1644: VFLAG = 0; ! 1645: CFLAG = 0; ! 1646: NFLAG = ((sint16)outdata) < 0; ! 1647: ZFLAG = !outdata; ! 1648: PC+= 6; ! 1649: } ! 1650: ! 1651: void cpu_op_481a(t_ipc *ipc) /* MOVE */ { ! 1652: /* mask fff8, bits 33f0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1653: int srcreg = (ipc->opcode >> 0) & 7; ! 1654: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1655: uint16 srcdata = fetchword(srcaddr); ! 1656: uint32 dstaddr = ipc->dst; ! 1657: uint16 outdata = srcdata; ! 1658: ! 1659: storeword(dstaddr, outdata); ! 1660: PC+= 8; ! 1661: } ! 1662: ! 1663: void cpu_op_481b(t_ipc *ipc) /* MOVE */ { ! 1664: /* mask fff8, bits 33f0, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1665: int srcreg = (ipc->opcode >> 0) & 7; ! 1666: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1667: uint16 srcdata = fetchword(srcaddr); ! 1668: uint32 dstaddr = ipc->dst; ! 1669: uint16 outdata = srcdata; ! 1670: ! 1671: storeword(dstaddr, outdata); ! 1672: ! 1673: VFLAG = 0; ! 1674: CFLAG = 0; ! 1675: NFLAG = ((sint16)outdata) < 0; ! 1676: ZFLAG = !outdata; ! 1677: PC+= 8; ! 1678: } ! 1679: ! 1680: void cpu_op_482a(t_ipc *ipc) /* MOVE */ { ! 1681: /* mask f1ff, bits 3038, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1682: uint32 srcaddr = ipc->src; ! 1683: uint16 srcdata = fetchword(srcaddr); ! 1684: int dstreg = (ipc->opcode >> 9) & 7; ! 1685: uint16 outdata = srcdata; ! 1686: ! 1687: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1688: PC+= 4; ! 1689: } ! 1690: ! 1691: void cpu_op_482b(t_ipc *ipc) /* MOVE */ { ! 1692: /* mask f1ff, bits 3038, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1693: uint32 srcaddr = ipc->src; ! 1694: uint16 srcdata = fetchword(srcaddr); ! 1695: int dstreg = (ipc->opcode >> 9) & 7; ! 1696: uint16 outdata = srcdata; ! 1697: ! 1698: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1699: ! 1700: VFLAG = 0; ! 1701: CFLAG = 0; ! 1702: NFLAG = ((sint16)outdata) < 0; ! 1703: ZFLAG = !outdata; ! 1704: PC+= 4; ! 1705: } ! 1706: ! 1707: void cpu_op_483a(t_ipc *ipc) /* MOVE */ { ! 1708: /* mask f1ff, bits 30b8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1709: uint32 srcaddr = ipc->src; ! 1710: uint16 srcdata = fetchword(srcaddr); ! 1711: int dstreg = (ipc->opcode >> 9) & 7; ! 1712: uint32 dstaddr = ADDRREG(dstreg); ! 1713: uint16 outdata = srcdata; ! 1714: ! 1715: storeword(dstaddr, outdata); ! 1716: PC+= 4; ! 1717: } ! 1718: ! 1719: void cpu_op_483b(t_ipc *ipc) /* MOVE */ { ! 1720: /* mask f1ff, bits 30b8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1721: uint32 srcaddr = ipc->src; ! 1722: uint16 srcdata = fetchword(srcaddr); ! 1723: int dstreg = (ipc->opcode >> 9) & 7; ! 1724: uint32 dstaddr = ADDRREG(dstreg); ! 1725: uint16 outdata = srcdata; ! 1726: ! 1727: storeword(dstaddr, outdata); ! 1728: ! 1729: VFLAG = 0; ! 1730: CFLAG = 0; ! 1731: NFLAG = ((sint16)outdata) < 0; ! 1732: ZFLAG = !outdata; ! 1733: PC+= 4; ! 1734: } ! 1735: ! 1736: void cpu_op_484a(t_ipc *ipc) /* MOVE */ { ! 1737: /* mask f1ff, bits 30f8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1738: uint32 srcaddr = ipc->src; ! 1739: uint16 srcdata = fetchword(srcaddr); ! 1740: int dstreg = (ipc->opcode >> 9) & 7; ! 1741: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1742: uint16 outdata = srcdata; ! 1743: ! 1744: storeword(dstaddr, outdata); ! 1745: PC+= 4; ! 1746: } ! 1747: ! 1748: void cpu_op_484b(t_ipc *ipc) /* MOVE */ { ! 1749: /* mask f1ff, bits 30f8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1750: uint32 srcaddr = ipc->src; ! 1751: uint16 srcdata = fetchword(srcaddr); ! 1752: int dstreg = (ipc->opcode >> 9) & 7; ! 1753: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1754: uint16 outdata = srcdata; ! 1755: ! 1756: storeword(dstaddr, outdata); ! 1757: ! 1758: VFLAG = 0; ! 1759: CFLAG = 0; ! 1760: NFLAG = ((sint16)outdata) < 0; ! 1761: ZFLAG = !outdata; ! 1762: PC+= 4; ! 1763: } ! 1764: ! 1765: void cpu_op_485a(t_ipc *ipc) /* MOVE */ { ! 1766: /* mask f1ff, bits 3138, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1767: uint32 srcaddr = ipc->src; ! 1768: uint16 srcdata = fetchword(srcaddr); ! 1769: int dstreg = (ipc->opcode >> 9) & 7; ! 1770: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1771: uint16 outdata = srcdata; ! 1772: ! 1773: storeword(dstaddr, outdata); ! 1774: PC+= 4; ! 1775: } ! 1776: ! 1777: void cpu_op_485b(t_ipc *ipc) /* MOVE */ { ! 1778: /* mask f1ff, bits 3138, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1779: uint32 srcaddr = ipc->src; ! 1780: uint16 srcdata = fetchword(srcaddr); ! 1781: int dstreg = (ipc->opcode >> 9) & 7; ! 1782: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1783: uint16 outdata = srcdata; ! 1784: ! 1785: storeword(dstaddr, outdata); ! 1786: ! 1787: VFLAG = 0; ! 1788: CFLAG = 0; ! 1789: NFLAG = ((sint16)outdata) < 0; ! 1790: ZFLAG = !outdata; ! 1791: PC+= 4; ! 1792: } ! 1793: ! 1794: void cpu_op_486a(t_ipc *ipc) /* MOVE */ { ! 1795: /* mask f1ff, bits 3178, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1796: uint32 srcaddr = ipc->src; ! 1797: uint16 srcdata = fetchword(srcaddr); ! 1798: int dstreg = (ipc->opcode >> 9) & 7; ! 1799: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1800: uint16 outdata = srcdata; ! 1801: ! 1802: storeword(dstaddr, outdata); ! 1803: PC+= 6; ! 1804: } ! 1805: ! 1806: void cpu_op_486b(t_ipc *ipc) /* MOVE */ { ! 1807: /* mask f1ff, bits 3178, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1808: uint32 srcaddr = ipc->src; ! 1809: uint16 srcdata = fetchword(srcaddr); ! 1810: int dstreg = (ipc->opcode >> 9) & 7; ! 1811: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1812: uint16 outdata = srcdata; ! 1813: ! 1814: storeword(dstaddr, outdata); ! 1815: ! 1816: VFLAG = 0; ! 1817: CFLAG = 0; ! 1818: NFLAG = ((sint16)outdata) < 0; ! 1819: ZFLAG = !outdata; ! 1820: PC+= 6; ! 1821: } ! 1822: ! 1823: void cpu_op_487a(t_ipc *ipc) /* MOVE */ { ! 1824: /* mask f1ff, bits 31b8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1825: uint32 srcaddr = ipc->src; ! 1826: uint16 srcdata = fetchword(srcaddr); ! 1827: int dstreg = (ipc->opcode >> 9) & 7; ! 1828: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1829: uint16 outdata = srcdata; ! 1830: ! 1831: storeword(dstaddr, outdata); ! 1832: PC+= 6; ! 1833: } ! 1834: ! 1835: void cpu_op_487b(t_ipc *ipc) /* MOVE */ { ! 1836: /* mask f1ff, bits 31b8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1837: uint32 srcaddr = ipc->src; ! 1838: uint16 srcdata = fetchword(srcaddr); ! 1839: int dstreg = (ipc->opcode >> 9) & 7; ! 1840: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1841: uint16 outdata = srcdata; ! 1842: ! 1843: storeword(dstaddr, outdata); ! 1844: ! 1845: VFLAG = 0; ! 1846: CFLAG = 0; ! 1847: NFLAG = ((sint16)outdata) < 0; ! 1848: ZFLAG = !outdata; ! 1849: PC+= 6; ! 1850: } ! 1851: ! 1852: void cpu_op_488a(t_ipc *ipc) /* MOVE */ { ! 1853: /* mask ffff, bits 31f8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1854: uint32 srcaddr = ipc->src; ! 1855: uint16 srcdata = fetchword(srcaddr); ! 1856: uint32 dstaddr = ipc->dst; ! 1857: uint16 outdata = srcdata; ! 1858: ! 1859: storeword(dstaddr, outdata); ! 1860: PC+= 6; ! 1861: } ! 1862: ! 1863: void cpu_op_488b(t_ipc *ipc) /* MOVE */ { ! 1864: /* mask ffff, bits 31f8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1865: uint32 srcaddr = ipc->src; ! 1866: uint16 srcdata = fetchword(srcaddr); ! 1867: uint32 dstaddr = ipc->dst; ! 1868: uint16 outdata = srcdata; ! 1869: ! 1870: storeword(dstaddr, outdata); ! 1871: ! 1872: VFLAG = 0; ! 1873: CFLAG = 0; ! 1874: NFLAG = ((sint16)outdata) < 0; ! 1875: ZFLAG = !outdata; ! 1876: PC+= 6; ! 1877: } ! 1878: ! 1879: void cpu_op_489a(t_ipc *ipc) /* MOVE */ { ! 1880: /* mask ffff, bits 33f8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1881: uint32 srcaddr = ipc->src; ! 1882: uint16 srcdata = fetchword(srcaddr); ! 1883: uint32 dstaddr = ipc->dst; ! 1884: uint16 outdata = srcdata; ! 1885: ! 1886: storeword(dstaddr, outdata); ! 1887: PC+= 8; ! 1888: } ! 1889: ! 1890: void cpu_op_489b(t_ipc *ipc) /* MOVE */ { ! 1891: /* mask ffff, bits 33f8, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1892: uint32 srcaddr = ipc->src; ! 1893: uint16 srcdata = fetchword(srcaddr); ! 1894: uint32 dstaddr = ipc->dst; ! 1895: uint16 outdata = srcdata; ! 1896: ! 1897: storeword(dstaddr, outdata); ! 1898: ! 1899: VFLAG = 0; ! 1900: CFLAG = 0; ! 1901: NFLAG = ((sint16)outdata) < 0; ! 1902: ZFLAG = !outdata; ! 1903: PC+= 8; ! 1904: } ! 1905: ! 1906: void cpu_op_490a(t_ipc *ipc) /* MOVE */ { ! 1907: /* mask f1ff, bits 3039, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1908: uint32 srcaddr = ipc->src; ! 1909: uint16 srcdata = fetchword(srcaddr); ! 1910: int dstreg = (ipc->opcode >> 9) & 7; ! 1911: uint16 outdata = srcdata; ! 1912: ! 1913: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1914: PC+= 6; ! 1915: } ! 1916: ! 1917: void cpu_op_490b(t_ipc *ipc) /* MOVE */ { ! 1918: /* mask f1ff, bits 3039, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1919: uint32 srcaddr = ipc->src; ! 1920: uint16 srcdata = fetchword(srcaddr); ! 1921: int dstreg = (ipc->opcode >> 9) & 7; ! 1922: uint16 outdata = srcdata; ! 1923: ! 1924: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1925: ! 1926: VFLAG = 0; ! 1927: CFLAG = 0; ! 1928: NFLAG = ((sint16)outdata) < 0; ! 1929: ZFLAG = !outdata; ! 1930: PC+= 6; ! 1931: } ! 1932: ! 1933: void cpu_op_491a(t_ipc *ipc) /* MOVE */ { ! 1934: /* mask f1ff, bits 30b9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1935: uint32 srcaddr = ipc->src; ! 1936: uint16 srcdata = fetchword(srcaddr); ! 1937: int dstreg = (ipc->opcode >> 9) & 7; ! 1938: uint32 dstaddr = ADDRREG(dstreg); ! 1939: uint16 outdata = srcdata; ! 1940: ! 1941: storeword(dstaddr, outdata); ! 1942: PC+= 6; ! 1943: } ! 1944: ! 1945: void cpu_op_491b(t_ipc *ipc) /* MOVE */ { ! 1946: /* mask f1ff, bits 30b9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1947: uint32 srcaddr = ipc->src; ! 1948: uint16 srcdata = fetchword(srcaddr); ! 1949: int dstreg = (ipc->opcode >> 9) & 7; ! 1950: uint32 dstaddr = ADDRREG(dstreg); ! 1951: uint16 outdata = srcdata; ! 1952: ! 1953: storeword(dstaddr, outdata); ! 1954: ! 1955: VFLAG = 0; ! 1956: CFLAG = 0; ! 1957: NFLAG = ((sint16)outdata) < 0; ! 1958: ZFLAG = !outdata; ! 1959: PC+= 6; ! 1960: } ! 1961: ! 1962: void cpu_op_492a(t_ipc *ipc) /* MOVE */ { ! 1963: /* mask f1ff, bits 30f9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1964: uint32 srcaddr = ipc->src; ! 1965: uint16 srcdata = fetchword(srcaddr); ! 1966: int dstreg = (ipc->opcode >> 9) & 7; ! 1967: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1968: uint16 outdata = srcdata; ! 1969: ! 1970: storeword(dstaddr, outdata); ! 1971: PC+= 6; ! 1972: } ! 1973: ! 1974: void cpu_op_492b(t_ipc *ipc) /* MOVE */ { ! 1975: /* mask f1ff, bits 30f9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1976: uint32 srcaddr = ipc->src; ! 1977: uint16 srcdata = fetchword(srcaddr); ! 1978: int dstreg = (ipc->opcode >> 9) & 7; ! 1979: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1980: uint16 outdata = srcdata; ! 1981: ! 1982: storeword(dstaddr, outdata); ! 1983: ! 1984: VFLAG = 0; ! 1985: CFLAG = 0; ! 1986: NFLAG = ((sint16)outdata) < 0; ! 1987: ZFLAG = !outdata; ! 1988: PC+= 6; ! 1989: } ! 1990: ! 1991: void cpu_op_493a(t_ipc *ipc) /* MOVE */ { ! 1992: /* mask f1ff, bits 3139, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1993: uint32 srcaddr = ipc->src; ! 1994: uint16 srcdata = fetchword(srcaddr); ! 1995: int dstreg = (ipc->opcode >> 9) & 7; ! 1996: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1997: uint16 outdata = srcdata; ! 1998: ! 1999: storeword(dstaddr, outdata); ! 2000: PC+= 6; ! 2001: } ! 2002: ! 2003: void cpu_op_493b(t_ipc *ipc) /* MOVE */ { ! 2004: /* mask f1ff, bits 3139, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2005: uint32 srcaddr = ipc->src; ! 2006: uint16 srcdata = fetchword(srcaddr); ! 2007: int dstreg = (ipc->opcode >> 9) & 7; ! 2008: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2009: uint16 outdata = srcdata; ! 2010: ! 2011: storeword(dstaddr, outdata); ! 2012: ! 2013: VFLAG = 0; ! 2014: CFLAG = 0; ! 2015: NFLAG = ((sint16)outdata) < 0; ! 2016: ZFLAG = !outdata; ! 2017: PC+= 6; ! 2018: } ! 2019: ! 2020: void cpu_op_494a(t_ipc *ipc) /* MOVE */ { ! 2021: /* mask f1ff, bits 3179, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2022: uint32 srcaddr = ipc->src; ! 2023: uint16 srcdata = fetchword(srcaddr); ! 2024: int dstreg = (ipc->opcode >> 9) & 7; ! 2025: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2026: uint16 outdata = srcdata; ! 2027: ! 2028: storeword(dstaddr, outdata); ! 2029: PC+= 8; ! 2030: } ! 2031: ! 2032: void cpu_op_494b(t_ipc *ipc) /* MOVE */ { ! 2033: /* mask f1ff, bits 3179, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2034: uint32 srcaddr = ipc->src; ! 2035: uint16 srcdata = fetchword(srcaddr); ! 2036: int dstreg = (ipc->opcode >> 9) & 7; ! 2037: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2038: uint16 outdata = srcdata; ! 2039: ! 2040: storeword(dstaddr, outdata); ! 2041: ! 2042: VFLAG = 0; ! 2043: CFLAG = 0; ! 2044: NFLAG = ((sint16)outdata) < 0; ! 2045: ZFLAG = !outdata; ! 2046: PC+= 8; ! 2047: } ! 2048: ! 2049: void cpu_op_495a(t_ipc *ipc) /* MOVE */ { ! 2050: /* mask f1ff, bits 31b9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2051: uint32 srcaddr = ipc->src; ! 2052: uint16 srcdata = fetchword(srcaddr); ! 2053: int dstreg = (ipc->opcode >> 9) & 7; ! 2054: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2055: uint16 outdata = srcdata; ! 2056: ! 2057: storeword(dstaddr, outdata); ! 2058: PC+= 8; ! 2059: } ! 2060: ! 2061: void cpu_op_495b(t_ipc *ipc) /* MOVE */ { ! 2062: /* mask f1ff, bits 31b9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2063: uint32 srcaddr = ipc->src; ! 2064: uint16 srcdata = fetchword(srcaddr); ! 2065: int dstreg = (ipc->opcode >> 9) & 7; ! 2066: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2067: uint16 outdata = srcdata; ! 2068: ! 2069: storeword(dstaddr, outdata); ! 2070: ! 2071: VFLAG = 0; ! 2072: CFLAG = 0; ! 2073: NFLAG = ((sint16)outdata) < 0; ! 2074: ZFLAG = !outdata; ! 2075: PC+= 8; ! 2076: } ! 2077: ! 2078: void cpu_op_496a(t_ipc *ipc) /* MOVE */ { ! 2079: /* mask ffff, bits 31f9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2080: uint32 srcaddr = ipc->src; ! 2081: uint16 srcdata = fetchword(srcaddr); ! 2082: uint32 dstaddr = ipc->dst; ! 2083: uint16 outdata = srcdata; ! 2084: ! 2085: storeword(dstaddr, outdata); ! 2086: PC+= 8; ! 2087: } ! 2088: ! 2089: void cpu_op_496b(t_ipc *ipc) /* MOVE */ { ! 2090: /* mask ffff, bits 31f9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2091: uint32 srcaddr = ipc->src; ! 2092: uint16 srcdata = fetchword(srcaddr); ! 2093: uint32 dstaddr = ipc->dst; ! 2094: uint16 outdata = srcdata; ! 2095: ! 2096: storeword(dstaddr, outdata); ! 2097: ! 2098: VFLAG = 0; ! 2099: CFLAG = 0; ! 2100: NFLAG = ((sint16)outdata) < 0; ! 2101: ZFLAG = !outdata; ! 2102: PC+= 8; ! 2103: } ! 2104: ! 2105: void cpu_op_497a(t_ipc *ipc) /* MOVE */ { ! 2106: /* mask ffff, bits 33f9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2107: uint32 srcaddr = ipc->src; ! 2108: uint16 srcdata = fetchword(srcaddr); ! 2109: uint32 dstaddr = ipc->dst; ! 2110: uint16 outdata = srcdata; ! 2111: ! 2112: storeword(dstaddr, outdata); ! 2113: PC+= 10; ! 2114: } ! 2115: ! 2116: void cpu_op_497b(t_ipc *ipc) /* MOVE */ { ! 2117: /* mask ffff, bits 33f9, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2118: uint32 srcaddr = ipc->src; ! 2119: uint16 srcdata = fetchword(srcaddr); ! 2120: uint32 dstaddr = ipc->dst; ! 2121: uint16 outdata = srcdata; ! 2122: ! 2123: storeword(dstaddr, outdata); ! 2124: ! 2125: VFLAG = 0; ! 2126: CFLAG = 0; ! 2127: NFLAG = ((sint16)outdata) < 0; ! 2128: ZFLAG = !outdata; ! 2129: PC+= 10; ! 2130: } ! 2131: ! 2132: void cpu_op_498a(t_ipc *ipc) /* MOVE */ { ! 2133: /* mask f1ff, bits 303a, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2134: uint32 srcaddr = ipc->src; ! 2135: uint16 srcdata = fetchword(srcaddr); ! 2136: int dstreg = (ipc->opcode >> 9) & 7; ! 2137: uint16 outdata = srcdata; ! 2138: ! 2139: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 2140: PC+= 4; ! 2141: } ! 2142: ! 2143: void cpu_op_498b(t_ipc *ipc) /* MOVE */ { ! 2144: /* mask f1ff, bits 303a, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2145: uint32 srcaddr = ipc->src; ! 2146: uint16 srcdata = fetchword(srcaddr); ! 2147: int dstreg = (ipc->opcode >> 9) & 7; ! 2148: uint16 outdata = srcdata; ! 2149: ! 2150: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 2151: ! 2152: VFLAG = 0; ! 2153: CFLAG = 0; ! 2154: NFLAG = ((sint16)outdata) < 0; ! 2155: ZFLAG = !outdata; ! 2156: PC+= 4; ! 2157: } ! 2158: ! 2159: void cpu_op_499a(t_ipc *ipc) /* MOVE */ { ! 2160: /* mask f1ff, bits 30ba, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2161: uint32 srcaddr = ipc->src; ! 2162: uint16 srcdata = fetchword(srcaddr); ! 2163: int dstreg = (ipc->opcode >> 9) & 7; ! 2164: uint32 dstaddr = ADDRREG(dstreg); ! 2165: uint16 outdata = srcdata; ! 2166: ! 2167: storeword(dstaddr, outdata); ! 2168: PC+= 4; ! 2169: } ! 2170: ! 2171: void cpu_op_499b(t_ipc *ipc) /* MOVE */ { ! 2172: /* mask f1ff, bits 30ba, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2173: uint32 srcaddr = ipc->src; ! 2174: uint16 srcdata = fetchword(srcaddr); ! 2175: int dstreg = (ipc->opcode >> 9) & 7; ! 2176: uint32 dstaddr = ADDRREG(dstreg); ! 2177: uint16 outdata = srcdata; ! 2178: ! 2179: storeword(dstaddr, outdata); ! 2180: ! 2181: VFLAG = 0; ! 2182: CFLAG = 0; ! 2183: NFLAG = ((sint16)outdata) < 0; ! 2184: ZFLAG = !outdata; ! 2185: PC+= 4; ! 2186: } ! 2187: ! 2188: void cpu_op_500a(t_ipc *ipc) /* MOVE */ { ! 2189: /* mask f1ff, bits 30fa, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2190: uint32 srcaddr = ipc->src; ! 2191: uint16 srcdata = fetchword(srcaddr); ! 2192: int dstreg = (ipc->opcode >> 9) & 7; ! 2193: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2194: uint16 outdata = srcdata; ! 2195: ! 2196: storeword(dstaddr, outdata); ! 2197: PC+= 4; ! 2198: } ! 2199: ! 2200: void cpu_op_500b(t_ipc *ipc) /* MOVE */ { ! 2201: /* mask f1ff, bits 30fa, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2202: uint32 srcaddr = ipc->src; ! 2203: uint16 srcdata = fetchword(srcaddr); ! 2204: int dstreg = (ipc->opcode >> 9) & 7; ! 2205: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2206: uint16 outdata = srcdata; ! 2207: ! 2208: storeword(dstaddr, outdata); ! 2209: ! 2210: VFLAG = 0; ! 2211: CFLAG = 0; ! 2212: NFLAG = ((sint16)outdata) < 0; ! 2213: ZFLAG = !outdata; ! 2214: PC+= 4; ! 2215: } ! 2216: ! 2217: void cpu_op_501a(t_ipc *ipc) /* MOVE */ { ! 2218: /* mask f1ff, bits 313a, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2219: uint32 srcaddr = ipc->src; ! 2220: uint16 srcdata = fetchword(srcaddr); ! 2221: int dstreg = (ipc->opcode >> 9) & 7; ! 2222: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2223: uint16 outdata = srcdata; ! 2224: ! 2225: storeword(dstaddr, outdata); ! 2226: PC+= 4; ! 2227: } ! 2228: ! 2229: void cpu_op_501b(t_ipc *ipc) /* MOVE */ { ! 2230: /* mask f1ff, bits 313a, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2231: uint32 srcaddr = ipc->src; ! 2232: uint16 srcdata = fetchword(srcaddr); ! 2233: int dstreg = (ipc->opcode >> 9) & 7; ! 2234: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2235: uint16 outdata = srcdata; ! 2236: ! 2237: storeword(dstaddr, outdata); ! 2238: ! 2239: VFLAG = 0; ! 2240: CFLAG = 0; ! 2241: NFLAG = ((sint16)outdata) < 0; ! 2242: ZFLAG = !outdata; ! 2243: PC+= 4; ! 2244: } ! 2245: ! 2246: void cpu_op_502a(t_ipc *ipc) /* MOVE */ { ! 2247: /* mask f1ff, bits 317a, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2248: uint32 srcaddr = ipc->src; ! 2249: uint16 srcdata = fetchword(srcaddr); ! 2250: int dstreg = (ipc->opcode >> 9) & 7; ! 2251: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2252: uint16 outdata = srcdata; ! 2253: ! 2254: storeword(dstaddr, outdata); ! 2255: PC+= 6; ! 2256: } ! 2257: ! 2258: void cpu_op_502b(t_ipc *ipc) /* MOVE */ { ! 2259: /* mask f1ff, bits 317a, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2260: uint32 srcaddr = ipc->src; ! 2261: uint16 srcdata = fetchword(srcaddr); ! 2262: int dstreg = (ipc->opcode >> 9) & 7; ! 2263: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2264: uint16 outdata = srcdata; ! 2265: ! 2266: storeword(dstaddr, outdata); ! 2267: ! 2268: VFLAG = 0; ! 2269: CFLAG = 0; ! 2270: NFLAG = ((sint16)outdata) < 0; ! 2271: ZFLAG = !outdata; ! 2272: PC+= 6; ! 2273: } ! 2274: ! 2275: void cpu_op_503a(t_ipc *ipc) /* MOVE */ { ! 2276: /* mask f1ff, bits 31ba, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2277: uint32 srcaddr = ipc->src; ! 2278: uint16 srcdata = fetchword(srcaddr); ! 2279: int dstreg = (ipc->opcode >> 9) & 7; ! 2280: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2281: uint16 outdata = srcdata; ! 2282: ! 2283: storeword(dstaddr, outdata); ! 2284: PC+= 6; ! 2285: } ! 2286: ! 2287: void cpu_op_503b(t_ipc *ipc) /* MOVE */ { ! 2288: /* mask f1ff, bits 31ba, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2289: uint32 srcaddr = ipc->src; ! 2290: uint16 srcdata = fetchword(srcaddr); ! 2291: int dstreg = (ipc->opcode >> 9) & 7; ! 2292: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2293: uint16 outdata = srcdata; ! 2294: ! 2295: storeword(dstaddr, outdata); ! 2296: ! 2297: VFLAG = 0; ! 2298: CFLAG = 0; ! 2299: NFLAG = ((sint16)outdata) < 0; ! 2300: ZFLAG = !outdata; ! 2301: PC+= 6; ! 2302: } ! 2303: ! 2304: void cpu_op_504a(t_ipc *ipc) /* MOVE */ { ! 2305: /* mask ffff, bits 31fa, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2306: uint32 srcaddr = ipc->src; ! 2307: uint16 srcdata = fetchword(srcaddr); ! 2308: uint32 dstaddr = ipc->dst; ! 2309: uint16 outdata = srcdata; ! 2310: ! 2311: storeword(dstaddr, outdata); ! 2312: PC+= 6; ! 2313: } ! 2314: ! 2315: void cpu_op_504b(t_ipc *ipc) /* MOVE */ { ! 2316: /* mask ffff, bits 31fa, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2317: uint32 srcaddr = ipc->src; ! 2318: uint16 srcdata = fetchword(srcaddr); ! 2319: uint32 dstaddr = ipc->dst; ! 2320: uint16 outdata = srcdata; ! 2321: ! 2322: storeword(dstaddr, outdata); ! 2323: ! 2324: VFLAG = 0; ! 2325: CFLAG = 0; ! 2326: NFLAG = ((sint16)outdata) < 0; ! 2327: ZFLAG = !outdata; ! 2328: PC+= 6; ! 2329: } ! 2330: ! 2331: void cpu_op_505a(t_ipc *ipc) /* MOVE */ { ! 2332: /* mask ffff, bits 33fa, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2333: uint32 srcaddr = ipc->src; ! 2334: uint16 srcdata = fetchword(srcaddr); ! 2335: uint32 dstaddr = ipc->dst; ! 2336: uint16 outdata = srcdata; ! 2337: ! 2338: storeword(dstaddr, outdata); ! 2339: PC+= 8; ! 2340: } ! 2341: ! 2342: void cpu_op_505b(t_ipc *ipc) /* MOVE */ { ! 2343: /* mask ffff, bits 33fa, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2344: uint32 srcaddr = ipc->src; ! 2345: uint16 srcdata = fetchword(srcaddr); ! 2346: uint32 dstaddr = ipc->dst; ! 2347: uint16 outdata = srcdata; ! 2348: ! 2349: storeword(dstaddr, outdata); ! 2350: ! 2351: VFLAG = 0; ! 2352: CFLAG = 0; ! 2353: NFLAG = ((sint16)outdata) < 0; ! 2354: ZFLAG = !outdata; ! 2355: PC+= 8; ! 2356: } ! 2357: ! 2358: void cpu_op_506a(t_ipc *ipc) /* MOVE */ { ! 2359: /* mask f1ff, bits 303b, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2360: uint32 srcaddr = idxval_src(ipc); ! 2361: uint16 srcdata = fetchword(srcaddr); ! 2362: int dstreg = (ipc->opcode >> 9) & 7; ! 2363: uint16 outdata = srcdata; ! 2364: ! 2365: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 2366: PC+= 4; ! 2367: } ! 2368: ! 2369: void cpu_op_506b(t_ipc *ipc) /* MOVE */ { ! 2370: /* mask f1ff, bits 303b, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2371: uint32 srcaddr = idxval_src(ipc); ! 2372: uint16 srcdata = fetchword(srcaddr); ! 2373: int dstreg = (ipc->opcode >> 9) & 7; ! 2374: uint16 outdata = srcdata; ! 2375: ! 2376: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 2377: ! 2378: VFLAG = 0; ! 2379: CFLAG = 0; ! 2380: NFLAG = ((sint16)outdata) < 0; ! 2381: ZFLAG = !outdata; ! 2382: PC+= 4; ! 2383: } ! 2384: ! 2385: void cpu_op_507a(t_ipc *ipc) /* MOVE */ { ! 2386: /* mask f1ff, bits 30bb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2387: uint32 srcaddr = idxval_src(ipc); ! 2388: uint16 srcdata = fetchword(srcaddr); ! 2389: int dstreg = (ipc->opcode >> 9) & 7; ! 2390: uint32 dstaddr = ADDRREG(dstreg); ! 2391: uint16 outdata = srcdata; ! 2392: ! 2393: storeword(dstaddr, outdata); ! 2394: PC+= 4; ! 2395: } ! 2396: ! 2397: void cpu_op_507b(t_ipc *ipc) /* MOVE */ { ! 2398: /* mask f1ff, bits 30bb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2399: uint32 srcaddr = idxval_src(ipc); ! 2400: uint16 srcdata = fetchword(srcaddr); ! 2401: int dstreg = (ipc->opcode >> 9) & 7; ! 2402: uint32 dstaddr = ADDRREG(dstreg); ! 2403: uint16 outdata = srcdata; ! 2404: ! 2405: storeword(dstaddr, outdata); ! 2406: ! 2407: VFLAG = 0; ! 2408: CFLAG = 0; ! 2409: NFLAG = ((sint16)outdata) < 0; ! 2410: ZFLAG = !outdata; ! 2411: PC+= 4; ! 2412: } ! 2413: ! 2414: void cpu_op_508a(t_ipc *ipc) /* MOVE */ { ! 2415: /* mask f1ff, bits 30fb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2416: uint32 srcaddr = idxval_src(ipc); ! 2417: uint16 srcdata = fetchword(srcaddr); ! 2418: int dstreg = (ipc->opcode >> 9) & 7; ! 2419: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2420: uint16 outdata = srcdata; ! 2421: ! 2422: storeword(dstaddr, outdata); ! 2423: PC+= 4; ! 2424: } ! 2425: ! 2426: void cpu_op_508b(t_ipc *ipc) /* MOVE */ { ! 2427: /* mask f1ff, bits 30fb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2428: uint32 srcaddr = idxval_src(ipc); ! 2429: uint16 srcdata = fetchword(srcaddr); ! 2430: int dstreg = (ipc->opcode >> 9) & 7; ! 2431: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2432: uint16 outdata = srcdata; ! 2433: ! 2434: storeword(dstaddr, outdata); ! 2435: ! 2436: VFLAG = 0; ! 2437: CFLAG = 0; ! 2438: NFLAG = ((sint16)outdata) < 0; ! 2439: ZFLAG = !outdata; ! 2440: PC+= 4; ! 2441: } ! 2442: ! 2443: void cpu_op_509a(t_ipc *ipc) /* MOVE */ { ! 2444: /* mask f1ff, bits 313b, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2445: uint32 srcaddr = idxval_src(ipc); ! 2446: uint16 srcdata = fetchword(srcaddr); ! 2447: int dstreg = (ipc->opcode >> 9) & 7; ! 2448: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2449: uint16 outdata = srcdata; ! 2450: ! 2451: storeword(dstaddr, outdata); ! 2452: PC+= 4; ! 2453: } ! 2454: ! 2455: void cpu_op_509b(t_ipc *ipc) /* MOVE */ { ! 2456: /* mask f1ff, bits 313b, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2457: uint32 srcaddr = idxval_src(ipc); ! 2458: uint16 srcdata = fetchword(srcaddr); ! 2459: int dstreg = (ipc->opcode >> 9) & 7; ! 2460: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2461: uint16 outdata = srcdata; ! 2462: ! 2463: storeword(dstaddr, outdata); ! 2464: ! 2465: VFLAG = 0; ! 2466: CFLAG = 0; ! 2467: NFLAG = ((sint16)outdata) < 0; ! 2468: ZFLAG = !outdata; ! 2469: PC+= 4; ! 2470: } ! 2471: ! 2472: void cpu_op_510a(t_ipc *ipc) /* MOVE */ { ! 2473: /* mask f1ff, bits 317b, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2474: uint32 srcaddr = idxval_src(ipc); ! 2475: uint16 srcdata = fetchword(srcaddr); ! 2476: int dstreg = (ipc->opcode >> 9) & 7; ! 2477: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2478: uint16 outdata = srcdata; ! 2479: ! 2480: storeword(dstaddr, outdata); ! 2481: PC+= 6; ! 2482: } ! 2483: ! 2484: void cpu_op_510b(t_ipc *ipc) /* MOVE */ { ! 2485: /* mask f1ff, bits 317b, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2486: uint32 srcaddr = idxval_src(ipc); ! 2487: uint16 srcdata = fetchword(srcaddr); ! 2488: int dstreg = (ipc->opcode >> 9) & 7; ! 2489: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2490: uint16 outdata = srcdata; ! 2491: ! 2492: storeword(dstaddr, outdata); ! 2493: ! 2494: VFLAG = 0; ! 2495: CFLAG = 0; ! 2496: NFLAG = ((sint16)outdata) < 0; ! 2497: ZFLAG = !outdata; ! 2498: PC+= 6; ! 2499: } ! 2500: ! 2501: void cpu_op_511a(t_ipc *ipc) /* MOVE */ { ! 2502: /* mask f1ff, bits 31bb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2503: uint32 srcaddr = idxval_src(ipc); ! 2504: uint16 srcdata = fetchword(srcaddr); ! 2505: int dstreg = (ipc->opcode >> 9) & 7; ! 2506: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2507: uint16 outdata = srcdata; ! 2508: ! 2509: storeword(dstaddr, outdata); ! 2510: PC+= 6; ! 2511: } ! 2512: ! 2513: void cpu_op_511b(t_ipc *ipc) /* MOVE */ { ! 2514: /* mask f1ff, bits 31bb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2515: uint32 srcaddr = idxval_src(ipc); ! 2516: uint16 srcdata = fetchword(srcaddr); ! 2517: int dstreg = (ipc->opcode >> 9) & 7; ! 2518: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2519: uint16 outdata = srcdata; ! 2520: ! 2521: storeword(dstaddr, outdata); ! 2522: ! 2523: VFLAG = 0; ! 2524: CFLAG = 0; ! 2525: NFLAG = ((sint16)outdata) < 0; ! 2526: ZFLAG = !outdata; ! 2527: PC+= 6; ! 2528: } ! 2529: ! 2530: void cpu_op_512a(t_ipc *ipc) /* MOVE */ { ! 2531: /* mask ffff, bits 31fb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2532: uint32 srcaddr = idxval_src(ipc); ! 2533: uint16 srcdata = fetchword(srcaddr); ! 2534: uint32 dstaddr = ipc->dst; ! 2535: uint16 outdata = srcdata; ! 2536: ! 2537: storeword(dstaddr, outdata); ! 2538: PC+= 6; ! 2539: } ! 2540: ! 2541: void cpu_op_512b(t_ipc *ipc) /* MOVE */ { ! 2542: /* mask ffff, bits 31fb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2543: uint32 srcaddr = idxval_src(ipc); ! 2544: uint16 srcdata = fetchword(srcaddr); ! 2545: uint32 dstaddr = ipc->dst; ! 2546: uint16 outdata = srcdata; ! 2547: ! 2548: storeword(dstaddr, outdata); ! 2549: ! 2550: VFLAG = 0; ! 2551: CFLAG = 0; ! 2552: NFLAG = ((sint16)outdata) < 0; ! 2553: ZFLAG = !outdata; ! 2554: PC+= 6; ! 2555: } ! 2556: ! 2557: void cpu_op_513a(t_ipc *ipc) /* MOVE */ { ! 2558: /* mask ffff, bits 33fb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2559: uint32 srcaddr = idxval_src(ipc); ! 2560: uint16 srcdata = fetchword(srcaddr); ! 2561: uint32 dstaddr = ipc->dst; ! 2562: uint16 outdata = srcdata; ! 2563: ! 2564: storeword(dstaddr, outdata); ! 2565: PC+= 8; ! 2566: } ! 2567: ! 2568: void cpu_op_513b(t_ipc *ipc) /* MOVE */ { ! 2569: /* mask ffff, bits 33fb, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2570: uint32 srcaddr = idxval_src(ipc); ! 2571: uint16 srcdata = fetchword(srcaddr); ! 2572: uint32 dstaddr = ipc->dst; ! 2573: uint16 outdata = srcdata; ! 2574: ! 2575: storeword(dstaddr, outdata); ! 2576: ! 2577: VFLAG = 0; ! 2578: CFLAG = 0; ! 2579: NFLAG = ((sint16)outdata) < 0; ! 2580: ZFLAG = !outdata; ! 2581: PC+= 8; ! 2582: } ! 2583: ! 2584: void cpu_op_514a(t_ipc *ipc) /* MOVE */ { ! 2585: /* mask f1ff, bits 303c, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2586: uint16 srcdata = ipc->src; ! 2587: int dstreg = (ipc->opcode >> 9) & 7; ! 2588: uint16 outdata = srcdata; ! 2589: ! 2590: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 2591: PC+= 4; ! 2592: } ! 2593: ! 2594: void cpu_op_514b(t_ipc *ipc) /* MOVE */ { ! 2595: /* mask f1ff, bits 303c, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2596: uint16 srcdata = ipc->src; ! 2597: int dstreg = (ipc->opcode >> 9) & 7; ! 2598: uint16 outdata = srcdata; ! 2599: ! 2600: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 2601: ! 2602: VFLAG = 0; ! 2603: CFLAG = 0; ! 2604: NFLAG = ((sint16)outdata) < 0; ! 2605: ZFLAG = !outdata; ! 2606: PC+= 4; ! 2607: } ! 2608: ! 2609: void cpu_op_515a(t_ipc *ipc) /* MOVE */ { ! 2610: /* mask f1ff, bits 30bc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2611: uint16 srcdata = ipc->src; ! 2612: int dstreg = (ipc->opcode >> 9) & 7; ! 2613: uint32 dstaddr = ADDRREG(dstreg); ! 2614: uint16 outdata = srcdata; ! 2615: ! 2616: storeword(dstaddr, outdata); ! 2617: PC+= 4; ! 2618: } ! 2619: ! 2620: void cpu_op_515b(t_ipc *ipc) /* MOVE */ { ! 2621: /* mask f1ff, bits 30bc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 2, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2622: uint16 srcdata = ipc->src; ! 2623: int dstreg = (ipc->opcode >> 9) & 7; ! 2624: uint32 dstaddr = ADDRREG(dstreg); ! 2625: uint16 outdata = srcdata; ! 2626: ! 2627: storeword(dstaddr, outdata); ! 2628: ! 2629: VFLAG = 0; ! 2630: CFLAG = 0; ! 2631: NFLAG = ((sint16)outdata) < 0; ! 2632: ZFLAG = !outdata; ! 2633: PC+= 4; ! 2634: } ! 2635: ! 2636: void cpu_op_516a(t_ipc *ipc) /* MOVE */ { ! 2637: /* mask f1ff, bits 30fc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2638: uint16 srcdata = ipc->src; ! 2639: int dstreg = (ipc->opcode >> 9) & 7; ! 2640: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2641: uint16 outdata = srcdata; ! 2642: ! 2643: storeword(dstaddr, outdata); ! 2644: PC+= 4; ! 2645: } ! 2646: ! 2647: void cpu_op_516b(t_ipc *ipc) /* MOVE */ { ! 2648: /* mask f1ff, bits 30fc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2649: uint16 srcdata = ipc->src; ! 2650: int dstreg = (ipc->opcode >> 9) & 7; ! 2651: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2652: uint16 outdata = srcdata; ! 2653: ! 2654: storeword(dstaddr, outdata); ! 2655: ! 2656: VFLAG = 0; ! 2657: CFLAG = 0; ! 2658: NFLAG = ((sint16)outdata) < 0; ! 2659: ZFLAG = !outdata; ! 2660: PC+= 4; ! 2661: } ! 2662: ! 2663: void cpu_op_517a(t_ipc *ipc) /* MOVE */ { ! 2664: /* mask f1ff, bits 313c, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2665: uint16 srcdata = ipc->src; ! 2666: int dstreg = (ipc->opcode >> 9) & 7; ! 2667: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2668: uint16 outdata = srcdata; ! 2669: ! 2670: storeword(dstaddr, outdata); ! 2671: PC+= 4; ! 2672: } ! 2673: ! 2674: void cpu_op_517b(t_ipc *ipc) /* MOVE */ { ! 2675: /* mask f1ff, bits 313c, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2676: uint16 srcdata = ipc->src; ! 2677: int dstreg = (ipc->opcode >> 9) & 7; ! 2678: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 2679: uint16 outdata = srcdata; ! 2680: ! 2681: storeword(dstaddr, outdata); ! 2682: ! 2683: VFLAG = 0; ! 2684: CFLAG = 0; ! 2685: NFLAG = ((sint16)outdata) < 0; ! 2686: ZFLAG = !outdata; ! 2687: PC+= 4; ! 2688: } ! 2689: ! 2690: void cpu_op_518a(t_ipc *ipc) /* MOVE */ { ! 2691: /* mask f1ff, bits 317c, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2692: uint16 srcdata = ipc->src; ! 2693: int dstreg = (ipc->opcode >> 9) & 7; ! 2694: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2695: uint16 outdata = srcdata; ! 2696: ! 2697: storeword(dstaddr, outdata); ! 2698: PC+= 6; ! 2699: } ! 2700: ! 2701: void cpu_op_518b(t_ipc *ipc) /* MOVE */ { ! 2702: /* mask f1ff, bits 317c, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 5, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2703: uint16 srcdata = ipc->src; ! 2704: int dstreg = (ipc->opcode >> 9) & 7; ! 2705: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 2706: uint16 outdata = srcdata; ! 2707: ! 2708: storeword(dstaddr, outdata); ! 2709: ! 2710: VFLAG = 0; ! 2711: CFLAG = 0; ! 2712: NFLAG = ((sint16)outdata) < 0; ! 2713: ZFLAG = !outdata; ! 2714: PC+= 6; ! 2715: } ! 2716: ! 2717: void cpu_op_519a(t_ipc *ipc) /* MOVE */ { ! 2718: /* mask f1ff, bits 31bc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2719: uint16 srcdata = ipc->src; ! 2720: int dstreg = (ipc->opcode >> 9) & 7; ! 2721: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2722: uint16 outdata = srcdata; ! 2723: ! 2724: storeword(dstaddr, outdata); ! 2725: PC+= 6; ! 2726: } ! 2727: ! 2728: void cpu_op_519b(t_ipc *ipc) /* MOVE */ { ! 2729: /* mask f1ff, bits 31bc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 6, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2730: uint16 srcdata = ipc->src; ! 2731: int dstreg = (ipc->opcode >> 9) & 7; ! 2732: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2733: uint16 outdata = srcdata; ! 2734: ! 2735: storeword(dstaddr, outdata); ! 2736: ! 2737: VFLAG = 0; ! 2738: CFLAG = 0; ! 2739: NFLAG = ((sint16)outdata) < 0; ! 2740: ZFLAG = !outdata; ! 2741: PC+= 6; ! 2742: } ! 2743: ! 2744: void cpu_op_520a(t_ipc *ipc) /* MOVE */ { ! 2745: /* mask ffff, bits 31fc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2746: uint16 srcdata = ipc->src; ! 2747: uint32 dstaddr = ipc->dst; ! 2748: uint16 outdata = srcdata; ! 2749: ! 2750: storeword(dstaddr, outdata); ! 2751: PC+= 6; ! 2752: } ! 2753: ! 2754: void cpu_op_520b(t_ipc *ipc) /* MOVE */ { ! 2755: /* mask ffff, bits 31fc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 7, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2756: uint16 srcdata = ipc->src; ! 2757: uint32 dstaddr = ipc->dst; ! 2758: uint16 outdata = srcdata; ! 2759: ! 2760: storeword(dstaddr, outdata); ! 2761: ! 2762: VFLAG = 0; ! 2763: CFLAG = 0; ! 2764: NFLAG = ((sint16)outdata) < 0; ! 2765: ZFLAG = !outdata; ! 2766: PC+= 6; ! 2767: } ! 2768: ! 2769: void cpu_op_521a(t_ipc *ipc) /* MOVE */ { ! 2770: /* mask ffff, bits 33fc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2771: uint16 srcdata = ipc->src; ! 2772: uint32 dstaddr = ipc->dst; ! 2773: uint16 outdata = srcdata; ! 2774: ! 2775: storeword(dstaddr, outdata); ! 2776: PC+= 8; ! 2777: } ! 2778: ! 2779: void cpu_op_521b(t_ipc *ipc) /* MOVE */ { ! 2780: /* mask ffff, bits 33fc, mnemonic 21, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 8, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2781: uint16 srcdata = ipc->src; ! 2782: uint32 dstaddr = ipc->dst; ! 2783: uint16 outdata = srcdata; ! 2784: ! 2785: storeword(dstaddr, outdata); ! 2786: ! 2787: VFLAG = 0; ! 2788: CFLAG = 0; ! 2789: NFLAG = ((sint16)outdata) < 0; ! 2790: ZFLAG = !outdata; ! 2791: PC+= 8; ! 2792: } ! 2793: ! 2794: void cpu_op_522a(t_ipc *ipc) /* MOVEA */ { ! 2795: /* mask f1f8, bits 3040, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 0, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2796: int srcreg = (ipc->opcode >> 0) & 7; ! 2797: uint16 srcdata = DATAREG(srcreg); ! 2798: int dstreg = (ipc->opcode >> 9) & 7; ! 2799: ! 2800: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2801: PC+= 2; ! 2802: } ! 2803: ! 2804: void cpu_op_523a(t_ipc *ipc) /* MOVEA */ { ! 2805: /* mask f1f8, bits 3048, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 1, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2806: int srcreg = (ipc->opcode >> 0) & 7; ! 2807: uint16 srcdata = ADDRREG(srcreg); ! 2808: int dstreg = (ipc->opcode >> 9) & 7; ! 2809: ! 2810: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2811: PC+= 2; ! 2812: } ! 2813: ! 2814: void cpu_op_524a(t_ipc *ipc) /* MOVEA */ { ! 2815: /* mask f1f8, bits 3050, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 2, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2816: int srcreg = (ipc->opcode >> 0) & 7; ! 2817: uint32 srcaddr = ADDRREG(srcreg); ! 2818: uint16 srcdata = fetchword(srcaddr); ! 2819: int dstreg = (ipc->opcode >> 9) & 7; ! 2820: ! 2821: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2822: PC+= 2; ! 2823: } ! 2824: ! 2825: void cpu_op_525a(t_ipc *ipc) /* MOVEA */ { ! 2826: /* mask f1f8, bits 3058, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 3, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2827: int srcreg = (ipc->opcode >> 0) & 7; ! 2828: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 2829: uint16 srcdata = fetchword(srcaddr); ! 2830: int dstreg = (ipc->opcode >> 9) & 7; ! 2831: ! 2832: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2833: PC+= 2; ! 2834: } ! 2835: ! 2836: void cpu_op_526a(t_ipc *ipc) /* MOVEA */ { ! 2837: /* mask f1f8, bits 3060, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 4, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2838: int srcreg = (ipc->opcode >> 0) & 7; ! 2839: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 2840: uint16 srcdata = fetchword(srcaddr); ! 2841: int dstreg = (ipc->opcode >> 9) & 7; ! 2842: ! 2843: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2844: PC+= 2; ! 2845: } ! 2846: ! 2847: void cpu_op_527a(t_ipc *ipc) /* MOVEA */ { ! 2848: /* mask f1f8, bits 3068, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 5, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2849: int srcreg = (ipc->opcode >> 0) & 7; ! 2850: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 2851: uint16 srcdata = fetchword(srcaddr); ! 2852: int dstreg = (ipc->opcode >> 9) & 7; ! 2853: ! 2854: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2855: PC+= 4; ! 2856: } ! 2857: ! 2858: void cpu_op_528a(t_ipc *ipc) /* MOVEA */ { ! 2859: /* mask f1f8, bits 3070, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 6, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2860: int srcreg = (ipc->opcode >> 0) & 7; ! 2861: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 2862: uint16 srcdata = fetchword(srcaddr); ! 2863: int dstreg = (ipc->opcode >> 9) & 7; ! 2864: ! 2865: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2866: PC+= 4; ! 2867: } ! 2868: ! 2869: void cpu_op_529a(t_ipc *ipc) /* MOVEA */ { ! 2870: /* mask f1ff, bits 3078, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 7, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2871: uint32 srcaddr = ipc->src; ! 2872: uint16 srcdata = fetchword(srcaddr); ! 2873: int dstreg = (ipc->opcode >> 9) & 7; ! 2874: ! 2875: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2876: PC+= 4; ! 2877: } ! 2878: ! 2879: void cpu_op_530a(t_ipc *ipc) /* MOVEA */ { ! 2880: /* mask f1ff, bits 3079, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 8, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2881: uint32 srcaddr = ipc->src; ! 2882: uint16 srcdata = fetchword(srcaddr); ! 2883: int dstreg = (ipc->opcode >> 9) & 7; ! 2884: ! 2885: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2886: PC+= 6; ! 2887: } ! 2888: ! 2889: void cpu_op_531a(t_ipc *ipc) /* MOVEA */ { ! 2890: /* mask f1ff, bits 307a, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 9, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2891: uint32 srcaddr = ipc->src; ! 2892: uint16 srcdata = fetchword(srcaddr); ! 2893: int dstreg = (ipc->opcode >> 9) & 7; ! 2894: ! 2895: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2896: PC+= 4; ! 2897: } ! 2898: ! 2899: void cpu_op_532a(t_ipc *ipc) /* MOVEA */ { ! 2900: /* mask f1ff, bits 307b, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 10, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2901: uint32 srcaddr = idxval_src(ipc); ! 2902: uint16 srcdata = fetchword(srcaddr); ! 2903: int dstreg = (ipc->opcode >> 9) & 7; ! 2904: ! 2905: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2906: PC+= 4; ! 2907: } ! 2908: ! 2909: void cpu_op_533a(t_ipc *ipc) /* MOVEA */ { ! 2910: /* mask f1ff, bits 307c, mnemonic 22, priv 0, endblk 0, imm_notzero 0, used 0 set 0, size 2, stype 12, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2911: uint16 srcdata = ipc->src; ! 2912: int dstreg = (ipc->opcode >> 9) & 7; ! 2913: ! 2914: ADDRREG(dstreg) = (sint32)(sint16)srcdata; ! 2915: PC+= 4; ! 2916: } ! 2917:
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.