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1.1 root 1: /*****************************************************************************/
2: /* Generator - Sega Genesis emulation - (c) James Ponder 1997-1998 */
3: /*****************************************************************************/
4: /* */
5: /* cpu68k-6.c */
6: /* */
7: /*****************************************************************************/
8:
9: #include "generator.h"
10: #include "cpu68k.h"
11: #include "mem68k.h"
12: #include "reg68k.h"
13:
14: #include "cpu68k-inline.h"
15:
16: #include <stdio.h>
17:
18: void cpu_op_1031a(t_ipc *ipc) /* Bcc */ {
19: /* mask ffff, bits 6000, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
20: uint32 srcdata = ipc->src;
21: uint8 cc = 1;
22:
23: if (cc)
24: PC = srcdata;
25: else
26: PC+= 4;
27: }
28:
29: void cpu_op_1032a(t_ipc *ipc) /* Bcc */ {
30: /* mask ffff, bits 6200, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
31: uint32 srcdata = ipc->src;
32: uint8 cc = !(CFLAG || ZFLAG);
33:
34: if (cc)
35: PC = srcdata;
36: else
37: PC+= 4;
38: }
39:
40: void cpu_op_1033a(t_ipc *ipc) /* Bcc */ {
41: /* mask ffff, bits 6300, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
42: uint32 srcdata = ipc->src;
43: uint8 cc = CFLAG || ZFLAG;
44:
45: if (cc)
46: PC = srcdata;
47: else
48: PC+= 4;
49: }
50:
51: void cpu_op_1034a(t_ipc *ipc) /* Bcc */ {
52: /* mask ffff, bits 6400, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
53: uint32 srcdata = ipc->src;
54: uint8 cc = !CFLAG;
55:
56: if (cc)
57: PC = srcdata;
58: else
59: PC+= 4;
60: }
61:
62: void cpu_op_1035a(t_ipc *ipc) /* Bcc */ {
63: /* mask ffff, bits 6500, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
64: uint32 srcdata = ipc->src;
65: uint8 cc = CFLAG;
66:
67: if (cc)
68: PC = srcdata;
69: else
70: PC+= 4;
71: }
72:
73: void cpu_op_1036a(t_ipc *ipc) /* Bcc */ {
74: /* mask ffff, bits 6600, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
75: uint32 srcdata = ipc->src;
76: uint8 cc = !ZFLAG;
77:
78: if (cc)
79: PC = srcdata;
80: else
81: PC+= 4;
82: }
83:
84: void cpu_op_1037a(t_ipc *ipc) /* Bcc */ {
85: /* mask ffff, bits 6700, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
86: uint32 srcdata = ipc->src;
87: uint8 cc = ZFLAG;
88:
89: if (cc)
90: PC = srcdata;
91: else
92: PC+= 4;
93: }
94:
95: void cpu_op_1038a(t_ipc *ipc) /* Bcc */ {
96: /* mask ffff, bits 6800, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
97: uint32 srcdata = ipc->src;
98: uint8 cc = !VFLAG;
99:
100: if (cc)
101: PC = srcdata;
102: else
103: PC+= 4;
104: }
105:
106: void cpu_op_1039a(t_ipc *ipc) /* Bcc */ {
107: /* mask ffff, bits 6900, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
108: uint32 srcdata = ipc->src;
109: uint8 cc = VFLAG;
110:
111: if (cc)
112: PC = srcdata;
113: else
114: PC+= 4;
115: }
116:
117: void cpu_op_1040a(t_ipc *ipc) /* Bcc */ {
118: /* mask ffff, bits 6a00, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
119: uint32 srcdata = ipc->src;
120: uint8 cc = !NFLAG;
121:
122: if (cc)
123: PC = srcdata;
124: else
125: PC+= 4;
126: }
127:
128: void cpu_op_1041a(t_ipc *ipc) /* Bcc */ {
129: /* mask ffff, bits 6b00, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
130: uint32 srcdata = ipc->src;
131: uint8 cc = NFLAG;
132:
133: if (cc)
134: PC = srcdata;
135: else
136: PC+= 4;
137: }
138:
139: void cpu_op_1042a(t_ipc *ipc) /* Bcc */ {
140: /* mask ffff, bits 6c00, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
141: uint32 srcdata = ipc->src;
142: uint8 cc = (NFLAG == VFLAG);
143:
144: if (cc)
145: PC = srcdata;
146: else
147: PC+= 4;
148: }
149:
150: void cpu_op_1043a(t_ipc *ipc) /* Bcc */ {
151: /* mask ffff, bits 6d00, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
152: uint32 srcdata = ipc->src;
153: uint8 cc = (NFLAG != VFLAG);
154:
155: if (cc)
156: PC = srcdata;
157: else
158: PC+= 4;
159: }
160:
161: void cpu_op_1044a(t_ipc *ipc) /* Bcc */ {
162: /* mask ffff, bits 6e00, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
163: uint32 srcdata = ipc->src;
164: uint8 cc = !ZFLAG && (NFLAG == VFLAG);
165:
166: if (cc)
167: PC = srcdata;
168: else
169: PC+= 4;
170: }
171:
172: void cpu_op_1045a(t_ipc *ipc) /* Bcc */ {
173: /* mask ffff, bits 6f00, mnemonic 62, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
174: uint32 srcdata = ipc->src;
175: uint8 cc = ZFLAG || (NFLAG != VFLAG);
176:
177: if (cc)
178: PC = srcdata;
179: else
180: PC+= 4;
181: }
182:
183: void cpu_op_1046a(t_ipc *ipc) /* BSR */ {
184: /* mask ffff, bits 6100, mnemonic 63, priv 0, endblk -1, imm_notzero 0, used -1 set 0, size 2, stype 12, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
185: uint32 srcdata = ipc->src;
186:
187: ADDRREG(7)-= 4;
188: storelong(ADDRREG(7), PC+4);
189: PC = srcdata;
190: }
191:
192: void cpu_op_1047a(t_ipc *ipc) /* Bcc */ {
193: /* mask ff00, bits 6000, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
194: uint32 srcdata = ipc->src;
195: uint8 cc = 1;
196:
197: if (cc)
198: PC = srcdata;
199: else
200: PC+= 2;
201: }
202:
203: void cpu_op_1048a(t_ipc *ipc) /* Bcc */ {
204: /* mask ff00, bits 6200, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
205: uint32 srcdata = ipc->src;
206: uint8 cc = !(CFLAG || ZFLAG);
207:
208: if (cc)
209: PC = srcdata;
210: else
211: PC+= 2;
212: }
213:
214: void cpu_op_1049a(t_ipc *ipc) /* Bcc */ {
215: /* mask ff00, bits 6300, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
216: uint32 srcdata = ipc->src;
217: uint8 cc = CFLAG || ZFLAG;
218:
219: if (cc)
220: PC = srcdata;
221: else
222: PC+= 2;
223: }
224:
225: void cpu_op_1050a(t_ipc *ipc) /* Bcc */ {
226: /* mask ff00, bits 6400, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
227: uint32 srcdata = ipc->src;
228: uint8 cc = !CFLAG;
229:
230: if (cc)
231: PC = srcdata;
232: else
233: PC+= 2;
234: }
235:
236: void cpu_op_1051a(t_ipc *ipc) /* Bcc */ {
237: /* mask ff00, bits 6500, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
238: uint32 srcdata = ipc->src;
239: uint8 cc = CFLAG;
240:
241: if (cc)
242: PC = srcdata;
243: else
244: PC+= 2;
245: }
246:
247: void cpu_op_1052a(t_ipc *ipc) /* Bcc */ {
248: /* mask ff00, bits 6600, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
249: uint32 srcdata = ipc->src;
250: uint8 cc = !ZFLAG;
251:
252: if (cc)
253: PC = srcdata;
254: else
255: PC+= 2;
256: }
257:
258: void cpu_op_1053a(t_ipc *ipc) /* Bcc */ {
259: /* mask ff00, bits 6700, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
260: uint32 srcdata = ipc->src;
261: uint8 cc = ZFLAG;
262:
263: if (cc)
264: PC = srcdata;
265: else
266: PC+= 2;
267: }
268:
269: void cpu_op_1054a(t_ipc *ipc) /* Bcc */ {
270: /* mask ff00, bits 6800, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
271: uint32 srcdata = ipc->src;
272: uint8 cc = !VFLAG;
273:
274: if (cc)
275: PC = srcdata;
276: else
277: PC+= 2;
278: }
279:
280: void cpu_op_1055a(t_ipc *ipc) /* Bcc */ {
281: /* mask ff00, bits 6900, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
282: uint32 srcdata = ipc->src;
283: uint8 cc = VFLAG;
284:
285: if (cc)
286: PC = srcdata;
287: else
288: PC+= 2;
289: }
290:
291: void cpu_op_1056a(t_ipc *ipc) /* Bcc */ {
292: /* mask ff00, bits 6a00, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
293: uint32 srcdata = ipc->src;
294: uint8 cc = !NFLAG;
295:
296: if (cc)
297: PC = srcdata;
298: else
299: PC+= 2;
300: }
301:
302: void cpu_op_1057a(t_ipc *ipc) /* Bcc */ {
303: /* mask ff00, bits 6b00, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
304: uint32 srcdata = ipc->src;
305: uint8 cc = NFLAG;
306:
307: if (cc)
308: PC = srcdata;
309: else
310: PC+= 2;
311: }
312:
313: void cpu_op_1058a(t_ipc *ipc) /* Bcc */ {
314: /* mask ff00, bits 6c00, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
315: uint32 srcdata = ipc->src;
316: uint8 cc = (NFLAG == VFLAG);
317:
318: if (cc)
319: PC = srcdata;
320: else
321: PC+= 2;
322: }
323:
324: void cpu_op_1059a(t_ipc *ipc) /* Bcc */ {
325: /* mask ff00, bits 6d00, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
326: uint32 srcdata = ipc->src;
327: uint8 cc = (NFLAG != VFLAG);
328:
329: if (cc)
330: PC = srcdata;
331: else
332: PC+= 2;
333: }
334:
335: void cpu_op_1060a(t_ipc *ipc) /* Bcc */ {
336: /* mask ff00, bits 6e00, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
337: uint32 srcdata = ipc->src;
338: uint8 cc = !ZFLAG && (NFLAG == VFLAG);
339:
340: if (cc)
341: PC = srcdata;
342: else
343: PC+= 2;
344: }
345:
346: void cpu_op_1061a(t_ipc *ipc) /* Bcc */ {
347: /* mask ff00, bits 6f00, mnemonic 62, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
348: uint32 srcdata = ipc->src;
349: uint8 cc = ZFLAG || (NFLAG != VFLAG);
350:
351: if (cc)
352: PC = srcdata;
353: else
354: PC+= 2;
355: }
356:
357: void cpu_op_1062a(t_ipc *ipc) /* BSR */ {
358: /* mask ff00, bits 6100, mnemonic 63, priv 0, endblk -1, imm_notzero -1, used -1 set 0, size 1, stype 17, dtype 20, sbitpos 0, dbitpos 0, immvalue 0 */
359: uint32 srcdata = ipc->src;
360:
361: ADDRREG(7)-= 4;
362: storelong(ADDRREG(7), PC+2);
363: PC = srcdata;
364: }
365:
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