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1.1 ! root 1: /*****************************************************************************/ ! 2: /* Generator - Sega Genesis emulation - (c) James Ponder 1997-1998 */ ! 3: /*****************************************************************************/ ! 4: /* */ ! 5: /* cpu68k-8.c */ ! 6: /* */ ! 7: /*****************************************************************************/ ! 8: ! 9: #include "generator.h" ! 10: #include "cpu68k.h" ! 11: #include "mem68k.h" ! 12: #include "reg68k.h" ! 13: ! 14: #include "cpu68k-inline.h" ! 15: ! 16: #include <stdio.h> ! 17: ! 18: void cpu_op_1064a(t_ipc *ipc) /* OR */ { ! 19: /* mask f1f8, bits 8000, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 20: int srcreg = (ipc->opcode >> 0) & 7; ! 21: uint8 srcdata = DATAREG(srcreg); ! 22: int dstreg = (ipc->opcode >> 9) & 7; ! 23: uint8 dstdata = DATAREG(dstreg); ! 24: uint8 outdata = dstdata; ! 25: ! 26: outdata|= srcdata; ! 27: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 28: PC+= 2; ! 29: } ! 30: ! 31: void cpu_op_1064b(t_ipc *ipc) /* OR */ { ! 32: /* mask f1f8, bits 8000, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 33: int srcreg = (ipc->opcode >> 0) & 7; ! 34: uint8 srcdata = DATAREG(srcreg); ! 35: int dstreg = (ipc->opcode >> 9) & 7; ! 36: uint8 dstdata = DATAREG(dstreg); ! 37: uint8 outdata = dstdata; ! 38: ! 39: outdata|= srcdata; ! 40: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 41: ! 42: NFLAG = ((sint8)outdata) < 0; ! 43: ZFLAG = !outdata; ! 44: VFLAG = 0; ! 45: CFLAG = 0; ! 46: PC+= 2; ! 47: } ! 48: ! 49: void cpu_op_1065a(t_ipc *ipc) /* OR */ { ! 50: /* mask f1f8, bits 8010, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 51: int srcreg = (ipc->opcode >> 0) & 7; ! 52: uint32 srcaddr = ADDRREG(srcreg); ! 53: uint8 srcdata = fetchbyte(srcaddr); ! 54: int dstreg = (ipc->opcode >> 9) & 7; ! 55: uint8 dstdata = DATAREG(dstreg); ! 56: uint8 outdata = dstdata; ! 57: ! 58: outdata|= srcdata; ! 59: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 60: PC+= 2; ! 61: } ! 62: ! 63: void cpu_op_1065b(t_ipc *ipc) /* OR */ { ! 64: /* mask f1f8, bits 8010, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 65: int srcreg = (ipc->opcode >> 0) & 7; ! 66: uint32 srcaddr = ADDRREG(srcreg); ! 67: uint8 srcdata = fetchbyte(srcaddr); ! 68: int dstreg = (ipc->opcode >> 9) & 7; ! 69: uint8 dstdata = DATAREG(dstreg); ! 70: uint8 outdata = dstdata; ! 71: ! 72: outdata|= srcdata; ! 73: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 74: ! 75: NFLAG = ((sint8)outdata) < 0; ! 76: ZFLAG = !outdata; ! 77: VFLAG = 0; ! 78: CFLAG = 0; ! 79: PC+= 2; ! 80: } ! 81: ! 82: void cpu_op_1066a(t_ipc *ipc) /* OR */ { ! 83: /* mask f1f8, bits 8018, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 84: int srcreg = (ipc->opcode >> 0) & 7; ! 85: uint32 srcaddr = ADDRREG(srcreg); ! 86: uint32 srcaddr_tmp = (ADDRREG(srcreg)+= (srcreg == 7 ? 2 : 1), 0); ! 87: uint8 srcdata = fetchbyte(srcaddr); ! 88: int dstreg = (ipc->opcode >> 9) & 7; ! 89: uint8 dstdata = DATAREG(dstreg); ! 90: uint8 outdata = dstdata; ! 91: ! 92: outdata|= srcdata; ! 93: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 94: PC+= 2; ! 95: } ! 96: ! 97: void cpu_op_1066b(t_ipc *ipc) /* OR */ { ! 98: /* mask f1f8, bits 8018, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 99: int srcreg = (ipc->opcode >> 0) & 7; ! 100: uint32 srcaddr = ADDRREG(srcreg); ! 101: uint32 srcaddr_tmp = (ADDRREG(srcreg)+= (srcreg == 7 ? 2 : 1), 0); ! 102: uint8 srcdata = fetchbyte(srcaddr); ! 103: int dstreg = (ipc->opcode >> 9) & 7; ! 104: uint8 dstdata = DATAREG(dstreg); ! 105: uint8 outdata = dstdata; ! 106: ! 107: outdata|= srcdata; ! 108: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 109: ! 110: NFLAG = ((sint8)outdata) < 0; ! 111: ZFLAG = !outdata; ! 112: VFLAG = 0; ! 113: CFLAG = 0; ! 114: PC+= 2; ! 115: } ! 116: ! 117: void cpu_op_1067a(t_ipc *ipc) /* OR */ { ! 118: /* mask f1f8, bits 8020, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 119: int srcreg = (ipc->opcode >> 0) & 7; ! 120: uint32 srcaddr = (ADDRREG(srcreg)-= (srcreg == 7 ? 2 : 1)); ! 121: uint8 srcdata = fetchbyte(srcaddr); ! 122: int dstreg = (ipc->opcode >> 9) & 7; ! 123: uint8 dstdata = DATAREG(dstreg); ! 124: uint8 outdata = dstdata; ! 125: ! 126: outdata|= srcdata; ! 127: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 128: PC+= 2; ! 129: } ! 130: ! 131: void cpu_op_1067b(t_ipc *ipc) /* OR */ { ! 132: /* mask f1f8, bits 8020, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 133: int srcreg = (ipc->opcode >> 0) & 7; ! 134: uint32 srcaddr = (ADDRREG(srcreg)-= (srcreg == 7 ? 2 : 1)); ! 135: uint8 srcdata = fetchbyte(srcaddr); ! 136: int dstreg = (ipc->opcode >> 9) & 7; ! 137: uint8 dstdata = DATAREG(dstreg); ! 138: uint8 outdata = dstdata; ! 139: ! 140: outdata|= srcdata; ! 141: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 142: ! 143: NFLAG = ((sint8)outdata) < 0; ! 144: ZFLAG = !outdata; ! 145: VFLAG = 0; ! 146: CFLAG = 0; ! 147: PC+= 2; ! 148: } ! 149: ! 150: void cpu_op_1068a(t_ipc *ipc) /* OR */ { ! 151: /* mask f1f8, bits 8028, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 152: int srcreg = (ipc->opcode >> 0) & 7; ! 153: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 154: uint8 srcdata = fetchbyte(srcaddr); ! 155: int dstreg = (ipc->opcode >> 9) & 7; ! 156: uint8 dstdata = DATAREG(dstreg); ! 157: uint8 outdata = dstdata; ! 158: ! 159: outdata|= srcdata; ! 160: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 161: PC+= 4; ! 162: } ! 163: ! 164: void cpu_op_1068b(t_ipc *ipc) /* OR */ { ! 165: /* mask f1f8, bits 8028, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 166: int srcreg = (ipc->opcode >> 0) & 7; ! 167: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 168: uint8 srcdata = fetchbyte(srcaddr); ! 169: int dstreg = (ipc->opcode >> 9) & 7; ! 170: uint8 dstdata = DATAREG(dstreg); ! 171: uint8 outdata = dstdata; ! 172: ! 173: outdata|= srcdata; ! 174: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 175: ! 176: NFLAG = ((sint8)outdata) < 0; ! 177: ZFLAG = !outdata; ! 178: VFLAG = 0; ! 179: CFLAG = 0; ! 180: PC+= 4; ! 181: } ! 182: ! 183: void cpu_op_1069a(t_ipc *ipc) /* OR */ { ! 184: /* mask f1f8, bits 8030, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 185: int srcreg = (ipc->opcode >> 0) & 7; ! 186: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 187: uint8 srcdata = fetchbyte(srcaddr); ! 188: int dstreg = (ipc->opcode >> 9) & 7; ! 189: uint8 dstdata = DATAREG(dstreg); ! 190: uint8 outdata = dstdata; ! 191: ! 192: outdata|= srcdata; ! 193: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 194: PC+= 4; ! 195: } ! 196: ! 197: void cpu_op_1069b(t_ipc *ipc) /* OR */ { ! 198: /* mask f1f8, bits 8030, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 199: int srcreg = (ipc->opcode >> 0) & 7; ! 200: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 201: uint8 srcdata = fetchbyte(srcaddr); ! 202: int dstreg = (ipc->opcode >> 9) & 7; ! 203: uint8 dstdata = DATAREG(dstreg); ! 204: uint8 outdata = dstdata; ! 205: ! 206: outdata|= srcdata; ! 207: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 208: ! 209: NFLAG = ((sint8)outdata) < 0; ! 210: ZFLAG = !outdata; ! 211: VFLAG = 0; ! 212: CFLAG = 0; ! 213: PC+= 4; ! 214: } ! 215: ! 216: void cpu_op_1070a(t_ipc *ipc) /* OR */ { ! 217: /* mask f1ff, bits 8038, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 218: uint32 srcaddr = ipc->src; ! 219: uint8 srcdata = fetchbyte(srcaddr); ! 220: int dstreg = (ipc->opcode >> 9) & 7; ! 221: uint8 dstdata = DATAREG(dstreg); ! 222: uint8 outdata = dstdata; ! 223: ! 224: outdata|= srcdata; ! 225: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 226: PC+= 4; ! 227: } ! 228: ! 229: void cpu_op_1070b(t_ipc *ipc) /* OR */ { ! 230: /* mask f1ff, bits 8038, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 231: uint32 srcaddr = ipc->src; ! 232: uint8 srcdata = fetchbyte(srcaddr); ! 233: int dstreg = (ipc->opcode >> 9) & 7; ! 234: uint8 dstdata = DATAREG(dstreg); ! 235: uint8 outdata = dstdata; ! 236: ! 237: outdata|= srcdata; ! 238: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 239: ! 240: NFLAG = ((sint8)outdata) < 0; ! 241: ZFLAG = !outdata; ! 242: VFLAG = 0; ! 243: CFLAG = 0; ! 244: PC+= 4; ! 245: } ! 246: ! 247: void cpu_op_1071a(t_ipc *ipc) /* OR */ { ! 248: /* mask f1ff, bits 8039, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 249: uint32 srcaddr = ipc->src; ! 250: uint8 srcdata = fetchbyte(srcaddr); ! 251: int dstreg = (ipc->opcode >> 9) & 7; ! 252: uint8 dstdata = DATAREG(dstreg); ! 253: uint8 outdata = dstdata; ! 254: ! 255: outdata|= srcdata; ! 256: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 257: PC+= 6; ! 258: } ! 259: ! 260: void cpu_op_1071b(t_ipc *ipc) /* OR */ { ! 261: /* mask f1ff, bits 8039, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 262: uint32 srcaddr = ipc->src; ! 263: uint8 srcdata = fetchbyte(srcaddr); ! 264: int dstreg = (ipc->opcode >> 9) & 7; ! 265: uint8 dstdata = DATAREG(dstreg); ! 266: uint8 outdata = dstdata; ! 267: ! 268: outdata|= srcdata; ! 269: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 270: ! 271: NFLAG = ((sint8)outdata) < 0; ! 272: ZFLAG = !outdata; ! 273: VFLAG = 0; ! 274: CFLAG = 0; ! 275: PC+= 6; ! 276: } ! 277: ! 278: void cpu_op_1072a(t_ipc *ipc) /* OR */ { ! 279: /* mask f1ff, bits 803a, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 280: uint32 srcaddr = ipc->src; ! 281: uint8 srcdata = fetchbyte(srcaddr); ! 282: int dstreg = (ipc->opcode >> 9) & 7; ! 283: uint8 dstdata = DATAREG(dstreg); ! 284: uint8 outdata = dstdata; ! 285: ! 286: outdata|= srcdata; ! 287: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 288: PC+= 4; ! 289: } ! 290: ! 291: void cpu_op_1072b(t_ipc *ipc) /* OR */ { ! 292: /* mask f1ff, bits 803a, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 293: uint32 srcaddr = ipc->src; ! 294: uint8 srcdata = fetchbyte(srcaddr); ! 295: int dstreg = (ipc->opcode >> 9) & 7; ! 296: uint8 dstdata = DATAREG(dstreg); ! 297: uint8 outdata = dstdata; ! 298: ! 299: outdata|= srcdata; ! 300: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 301: ! 302: NFLAG = ((sint8)outdata) < 0; ! 303: ZFLAG = !outdata; ! 304: VFLAG = 0; ! 305: CFLAG = 0; ! 306: PC+= 4; ! 307: } ! 308: ! 309: void cpu_op_1073a(t_ipc *ipc) /* OR */ { ! 310: /* mask f1ff, bits 803b, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 311: uint32 srcaddr = idxval_src(ipc); ! 312: uint8 srcdata = fetchbyte(srcaddr); ! 313: int dstreg = (ipc->opcode >> 9) & 7; ! 314: uint8 dstdata = DATAREG(dstreg); ! 315: uint8 outdata = dstdata; ! 316: ! 317: outdata|= srcdata; ! 318: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 319: PC+= 4; ! 320: } ! 321: ! 322: void cpu_op_1073b(t_ipc *ipc) /* OR */ { ! 323: /* mask f1ff, bits 803b, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 324: uint32 srcaddr = idxval_src(ipc); ! 325: uint8 srcdata = fetchbyte(srcaddr); ! 326: int dstreg = (ipc->opcode >> 9) & 7; ! 327: uint8 dstdata = DATAREG(dstreg); ! 328: uint8 outdata = dstdata; ! 329: ! 330: outdata|= srcdata; ! 331: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 332: ! 333: NFLAG = ((sint8)outdata) < 0; ! 334: ZFLAG = !outdata; ! 335: VFLAG = 0; ! 336: CFLAG = 0; ! 337: PC+= 4; ! 338: } ! 339: ! 340: void cpu_op_1074a(t_ipc *ipc) /* OR */ { ! 341: /* mask f1ff, bits 803c, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 11, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 342: uint8 srcdata = ipc->src; ! 343: int dstreg = (ipc->opcode >> 9) & 7; ! 344: uint8 dstdata = DATAREG(dstreg); ! 345: uint8 outdata = dstdata; ! 346: ! 347: outdata|= srcdata; ! 348: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 349: PC+= 4; ! 350: } ! 351: ! 352: void cpu_op_1074b(t_ipc *ipc) /* OR */ { ! 353: /* mask f1ff, bits 803c, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 11, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 354: uint8 srcdata = ipc->src; ! 355: int dstreg = (ipc->opcode >> 9) & 7; ! 356: uint8 dstdata = DATAREG(dstreg); ! 357: uint8 outdata = dstdata; ! 358: ! 359: outdata|= srcdata; ! 360: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 361: ! 362: NFLAG = ((sint8)outdata) < 0; ! 363: ZFLAG = !outdata; ! 364: VFLAG = 0; ! 365: CFLAG = 0; ! 366: PC+= 4; ! 367: } ! 368: ! 369: void cpu_op_1075a(t_ipc *ipc) /* OR */ { ! 370: /* mask f1f8, bits 8040, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 371: int srcreg = (ipc->opcode >> 0) & 7; ! 372: uint16 srcdata = DATAREG(srcreg); ! 373: int dstreg = (ipc->opcode >> 9) & 7; ! 374: uint16 dstdata = DATAREG(dstreg); ! 375: uint16 outdata = dstdata; ! 376: ! 377: outdata|= srcdata; ! 378: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 379: PC+= 2; ! 380: } ! 381: ! 382: void cpu_op_1075b(t_ipc *ipc) /* OR */ { ! 383: /* mask f1f8, bits 8040, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 384: int srcreg = (ipc->opcode >> 0) & 7; ! 385: uint16 srcdata = DATAREG(srcreg); ! 386: int dstreg = (ipc->opcode >> 9) & 7; ! 387: uint16 dstdata = DATAREG(dstreg); ! 388: uint16 outdata = dstdata; ! 389: ! 390: outdata|= srcdata; ! 391: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 392: ! 393: NFLAG = ((sint16)outdata) < 0; ! 394: ZFLAG = !outdata; ! 395: VFLAG = 0; ! 396: CFLAG = 0; ! 397: PC+= 2; ! 398: } ! 399: ! 400: void cpu_op_1076a(t_ipc *ipc) /* OR */ { ! 401: /* mask f1f8, bits 8050, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 402: int srcreg = (ipc->opcode >> 0) & 7; ! 403: uint32 srcaddr = ADDRREG(srcreg); ! 404: uint16 srcdata = fetchword(srcaddr); ! 405: int dstreg = (ipc->opcode >> 9) & 7; ! 406: uint16 dstdata = DATAREG(dstreg); ! 407: uint16 outdata = dstdata; ! 408: ! 409: outdata|= srcdata; ! 410: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 411: PC+= 2; ! 412: } ! 413: ! 414: void cpu_op_1076b(t_ipc *ipc) /* OR */ { ! 415: /* mask f1f8, bits 8050, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 416: int srcreg = (ipc->opcode >> 0) & 7; ! 417: uint32 srcaddr = ADDRREG(srcreg); ! 418: uint16 srcdata = fetchword(srcaddr); ! 419: int dstreg = (ipc->opcode >> 9) & 7; ! 420: uint16 dstdata = DATAREG(dstreg); ! 421: uint16 outdata = dstdata; ! 422: ! 423: outdata|= srcdata; ! 424: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 425: ! 426: NFLAG = ((sint16)outdata) < 0; ! 427: ZFLAG = !outdata; ! 428: VFLAG = 0; ! 429: CFLAG = 0; ! 430: PC+= 2; ! 431: } ! 432: ! 433: void cpu_op_1077a(t_ipc *ipc) /* OR */ { ! 434: /* mask f1f8, bits 8058, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 435: int srcreg = (ipc->opcode >> 0) & 7; ! 436: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 437: uint16 srcdata = fetchword(srcaddr); ! 438: int dstreg = (ipc->opcode >> 9) & 7; ! 439: uint16 dstdata = DATAREG(dstreg); ! 440: uint16 outdata = dstdata; ! 441: ! 442: outdata|= srcdata; ! 443: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 444: PC+= 2; ! 445: } ! 446: ! 447: void cpu_op_1077b(t_ipc *ipc) /* OR */ { ! 448: /* mask f1f8, bits 8058, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 449: int srcreg = (ipc->opcode >> 0) & 7; ! 450: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 451: uint16 srcdata = fetchword(srcaddr); ! 452: int dstreg = (ipc->opcode >> 9) & 7; ! 453: uint16 dstdata = DATAREG(dstreg); ! 454: uint16 outdata = dstdata; ! 455: ! 456: outdata|= srcdata; ! 457: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 458: ! 459: NFLAG = ((sint16)outdata) < 0; ! 460: ZFLAG = !outdata; ! 461: VFLAG = 0; ! 462: CFLAG = 0; ! 463: PC+= 2; ! 464: } ! 465: ! 466: void cpu_op_1078a(t_ipc *ipc) /* OR */ { ! 467: /* mask f1f8, bits 8060, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 468: int srcreg = (ipc->opcode >> 0) & 7; ! 469: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 470: uint16 srcdata = fetchword(srcaddr); ! 471: int dstreg = (ipc->opcode >> 9) & 7; ! 472: uint16 dstdata = DATAREG(dstreg); ! 473: uint16 outdata = dstdata; ! 474: ! 475: outdata|= srcdata; ! 476: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 477: PC+= 2; ! 478: } ! 479: ! 480: void cpu_op_1078b(t_ipc *ipc) /* OR */ { ! 481: /* mask f1f8, bits 8060, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 482: int srcreg = (ipc->opcode >> 0) & 7; ! 483: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 484: uint16 srcdata = fetchword(srcaddr); ! 485: int dstreg = (ipc->opcode >> 9) & 7; ! 486: uint16 dstdata = DATAREG(dstreg); ! 487: uint16 outdata = dstdata; ! 488: ! 489: outdata|= srcdata; ! 490: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 491: ! 492: NFLAG = ((sint16)outdata) < 0; ! 493: ZFLAG = !outdata; ! 494: VFLAG = 0; ! 495: CFLAG = 0; ! 496: PC+= 2; ! 497: } ! 498: ! 499: void cpu_op_1079a(t_ipc *ipc) /* OR */ { ! 500: /* mask f1f8, bits 8068, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 501: int srcreg = (ipc->opcode >> 0) & 7; ! 502: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 503: uint16 srcdata = fetchword(srcaddr); ! 504: int dstreg = (ipc->opcode >> 9) & 7; ! 505: uint16 dstdata = DATAREG(dstreg); ! 506: uint16 outdata = dstdata; ! 507: ! 508: outdata|= srcdata; ! 509: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 510: PC+= 4; ! 511: } ! 512: ! 513: void cpu_op_1079b(t_ipc *ipc) /* OR */ { ! 514: /* mask f1f8, bits 8068, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 515: int srcreg = (ipc->opcode >> 0) & 7; ! 516: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 517: uint16 srcdata = fetchword(srcaddr); ! 518: int dstreg = (ipc->opcode >> 9) & 7; ! 519: uint16 dstdata = DATAREG(dstreg); ! 520: uint16 outdata = dstdata; ! 521: ! 522: outdata|= srcdata; ! 523: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 524: ! 525: NFLAG = ((sint16)outdata) < 0; ! 526: ZFLAG = !outdata; ! 527: VFLAG = 0; ! 528: CFLAG = 0; ! 529: PC+= 4; ! 530: } ! 531: ! 532: void cpu_op_1080a(t_ipc *ipc) /* OR */ { ! 533: /* mask f1f8, bits 8070, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 534: int srcreg = (ipc->opcode >> 0) & 7; ! 535: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 536: uint16 srcdata = fetchword(srcaddr); ! 537: int dstreg = (ipc->opcode >> 9) & 7; ! 538: uint16 dstdata = DATAREG(dstreg); ! 539: uint16 outdata = dstdata; ! 540: ! 541: outdata|= srcdata; ! 542: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 543: PC+= 4; ! 544: } ! 545: ! 546: void cpu_op_1080b(t_ipc *ipc) /* OR */ { ! 547: /* mask f1f8, bits 8070, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 548: int srcreg = (ipc->opcode >> 0) & 7; ! 549: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 550: uint16 srcdata = fetchword(srcaddr); ! 551: int dstreg = (ipc->opcode >> 9) & 7; ! 552: uint16 dstdata = DATAREG(dstreg); ! 553: uint16 outdata = dstdata; ! 554: ! 555: outdata|= srcdata; ! 556: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 557: ! 558: NFLAG = ((sint16)outdata) < 0; ! 559: ZFLAG = !outdata; ! 560: VFLAG = 0; ! 561: CFLAG = 0; ! 562: PC+= 4; ! 563: } ! 564: ! 565: void cpu_op_1081a(t_ipc *ipc) /* OR */ { ! 566: /* mask f1ff, bits 8078, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 567: uint32 srcaddr = ipc->src; ! 568: uint16 srcdata = fetchword(srcaddr); ! 569: int dstreg = (ipc->opcode >> 9) & 7; ! 570: uint16 dstdata = DATAREG(dstreg); ! 571: uint16 outdata = dstdata; ! 572: ! 573: outdata|= srcdata; ! 574: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 575: PC+= 4; ! 576: } ! 577: ! 578: void cpu_op_1081b(t_ipc *ipc) /* OR */ { ! 579: /* mask f1ff, bits 8078, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 580: uint32 srcaddr = ipc->src; ! 581: uint16 srcdata = fetchword(srcaddr); ! 582: int dstreg = (ipc->opcode >> 9) & 7; ! 583: uint16 dstdata = DATAREG(dstreg); ! 584: uint16 outdata = dstdata; ! 585: ! 586: outdata|= srcdata; ! 587: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 588: ! 589: NFLAG = ((sint16)outdata) < 0; ! 590: ZFLAG = !outdata; ! 591: VFLAG = 0; ! 592: CFLAG = 0; ! 593: PC+= 4; ! 594: } ! 595: ! 596: void cpu_op_1082a(t_ipc *ipc) /* OR */ { ! 597: /* mask f1ff, bits 8079, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 598: uint32 srcaddr = ipc->src; ! 599: uint16 srcdata = fetchword(srcaddr); ! 600: int dstreg = (ipc->opcode >> 9) & 7; ! 601: uint16 dstdata = DATAREG(dstreg); ! 602: uint16 outdata = dstdata; ! 603: ! 604: outdata|= srcdata; ! 605: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 606: PC+= 6; ! 607: } ! 608: ! 609: void cpu_op_1082b(t_ipc *ipc) /* OR */ { ! 610: /* mask f1ff, bits 8079, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 611: uint32 srcaddr = ipc->src; ! 612: uint16 srcdata = fetchword(srcaddr); ! 613: int dstreg = (ipc->opcode >> 9) & 7; ! 614: uint16 dstdata = DATAREG(dstreg); ! 615: uint16 outdata = dstdata; ! 616: ! 617: outdata|= srcdata; ! 618: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 619: ! 620: NFLAG = ((sint16)outdata) < 0; ! 621: ZFLAG = !outdata; ! 622: VFLAG = 0; ! 623: CFLAG = 0; ! 624: PC+= 6; ! 625: } ! 626: ! 627: void cpu_op_1083a(t_ipc *ipc) /* OR */ { ! 628: /* mask f1ff, bits 807a, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 629: uint32 srcaddr = ipc->src; ! 630: uint16 srcdata = fetchword(srcaddr); ! 631: int dstreg = (ipc->opcode >> 9) & 7; ! 632: uint16 dstdata = DATAREG(dstreg); ! 633: uint16 outdata = dstdata; ! 634: ! 635: outdata|= srcdata; ! 636: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 637: PC+= 4; ! 638: } ! 639: ! 640: void cpu_op_1083b(t_ipc *ipc) /* OR */ { ! 641: /* mask f1ff, bits 807a, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 642: uint32 srcaddr = ipc->src; ! 643: uint16 srcdata = fetchword(srcaddr); ! 644: int dstreg = (ipc->opcode >> 9) & 7; ! 645: uint16 dstdata = DATAREG(dstreg); ! 646: uint16 outdata = dstdata; ! 647: ! 648: outdata|= srcdata; ! 649: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 650: ! 651: NFLAG = ((sint16)outdata) < 0; ! 652: ZFLAG = !outdata; ! 653: VFLAG = 0; ! 654: CFLAG = 0; ! 655: PC+= 4; ! 656: } ! 657: ! 658: void cpu_op_1084a(t_ipc *ipc) /* OR */ { ! 659: /* mask f1ff, bits 807b, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 660: uint32 srcaddr = idxval_src(ipc); ! 661: uint16 srcdata = fetchword(srcaddr); ! 662: int dstreg = (ipc->opcode >> 9) & 7; ! 663: uint16 dstdata = DATAREG(dstreg); ! 664: uint16 outdata = dstdata; ! 665: ! 666: outdata|= srcdata; ! 667: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 668: PC+= 4; ! 669: } ! 670: ! 671: void cpu_op_1084b(t_ipc *ipc) /* OR */ { ! 672: /* mask f1ff, bits 807b, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 673: uint32 srcaddr = idxval_src(ipc); ! 674: uint16 srcdata = fetchword(srcaddr); ! 675: int dstreg = (ipc->opcode >> 9) & 7; ! 676: uint16 dstdata = DATAREG(dstreg); ! 677: uint16 outdata = dstdata; ! 678: ! 679: outdata|= srcdata; ! 680: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 681: ! 682: NFLAG = ((sint16)outdata) < 0; ! 683: ZFLAG = !outdata; ! 684: VFLAG = 0; ! 685: CFLAG = 0; ! 686: PC+= 4; ! 687: } ! 688: ! 689: void cpu_op_1085a(t_ipc *ipc) /* OR */ { ! 690: /* mask f1ff, bits 807c, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 691: uint16 srcdata = ipc->src; ! 692: int dstreg = (ipc->opcode >> 9) & 7; ! 693: uint16 dstdata = DATAREG(dstreg); ! 694: uint16 outdata = dstdata; ! 695: ! 696: outdata|= srcdata; ! 697: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 698: PC+= 4; ! 699: } ! 700: ! 701: void cpu_op_1085b(t_ipc *ipc) /* OR */ { ! 702: /* mask f1ff, bits 807c, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 703: uint16 srcdata = ipc->src; ! 704: int dstreg = (ipc->opcode >> 9) & 7; ! 705: uint16 dstdata = DATAREG(dstreg); ! 706: uint16 outdata = dstdata; ! 707: ! 708: outdata|= srcdata; ! 709: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 710: ! 711: NFLAG = ((sint16)outdata) < 0; ! 712: ZFLAG = !outdata; ! 713: VFLAG = 0; ! 714: CFLAG = 0; ! 715: PC+= 4; ! 716: } ! 717: ! 718: void cpu_op_1086a(t_ipc *ipc) /* OR */ { ! 719: /* mask f1f8, bits 8080, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 720: int srcreg = (ipc->opcode >> 0) & 7; ! 721: uint32 srcdata = DATAREG(srcreg); ! 722: int dstreg = (ipc->opcode >> 9) & 7; ! 723: uint32 dstdata = DATAREG(dstreg); ! 724: uint32 outdata = dstdata; ! 725: ! 726: outdata|= srcdata; ! 727: DATAREG(dstreg) = outdata; ! 728: PC+= 2; ! 729: } ! 730: ! 731: void cpu_op_1086b(t_ipc *ipc) /* OR */ { ! 732: /* mask f1f8, bits 8080, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 733: int srcreg = (ipc->opcode >> 0) & 7; ! 734: uint32 srcdata = DATAREG(srcreg); ! 735: int dstreg = (ipc->opcode >> 9) & 7; ! 736: uint32 dstdata = DATAREG(dstreg); ! 737: uint32 outdata = dstdata; ! 738: ! 739: outdata|= srcdata; ! 740: DATAREG(dstreg) = outdata; ! 741: ! 742: NFLAG = ((sint32)outdata) < 0; ! 743: ZFLAG = !outdata; ! 744: VFLAG = 0; ! 745: CFLAG = 0; ! 746: PC+= 2; ! 747: } ! 748: ! 749: void cpu_op_1087a(t_ipc *ipc) /* OR */ { ! 750: /* mask f1f8, bits 8090, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 751: int srcreg = (ipc->opcode >> 0) & 7; ! 752: uint32 srcaddr = ADDRREG(srcreg); ! 753: uint32 srcdata = fetchlong(srcaddr); ! 754: int dstreg = (ipc->opcode >> 9) & 7; ! 755: uint32 dstdata = DATAREG(dstreg); ! 756: uint32 outdata = dstdata; ! 757: ! 758: outdata|= srcdata; ! 759: DATAREG(dstreg) = outdata; ! 760: PC+= 2; ! 761: } ! 762: ! 763: void cpu_op_1087b(t_ipc *ipc) /* OR */ { ! 764: /* mask f1f8, bits 8090, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 765: int srcreg = (ipc->opcode >> 0) & 7; ! 766: uint32 srcaddr = ADDRREG(srcreg); ! 767: uint32 srcdata = fetchlong(srcaddr); ! 768: int dstreg = (ipc->opcode >> 9) & 7; ! 769: uint32 dstdata = DATAREG(dstreg); ! 770: uint32 outdata = dstdata; ! 771: ! 772: outdata|= srcdata; ! 773: DATAREG(dstreg) = outdata; ! 774: ! 775: NFLAG = ((sint32)outdata) < 0; ! 776: ZFLAG = !outdata; ! 777: VFLAG = 0; ! 778: CFLAG = 0; ! 779: PC+= 2; ! 780: } ! 781: ! 782: void cpu_op_1088a(t_ipc *ipc) /* OR */ { ! 783: /* mask f1f8, bits 8098, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 784: int srcreg = (ipc->opcode >> 0) & 7; ! 785: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 786: uint32 srcdata = fetchlong(srcaddr); ! 787: int dstreg = (ipc->opcode >> 9) & 7; ! 788: uint32 dstdata = DATAREG(dstreg); ! 789: uint32 outdata = dstdata; ! 790: ! 791: outdata|= srcdata; ! 792: DATAREG(dstreg) = outdata; ! 793: PC+= 2; ! 794: } ! 795: ! 796: void cpu_op_1088b(t_ipc *ipc) /* OR */ { ! 797: /* mask f1f8, bits 8098, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 798: int srcreg = (ipc->opcode >> 0) & 7; ! 799: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 800: uint32 srcdata = fetchlong(srcaddr); ! 801: int dstreg = (ipc->opcode >> 9) & 7; ! 802: uint32 dstdata = DATAREG(dstreg); ! 803: uint32 outdata = dstdata; ! 804: ! 805: outdata|= srcdata; ! 806: DATAREG(dstreg) = outdata; ! 807: ! 808: NFLAG = ((sint32)outdata) < 0; ! 809: ZFLAG = !outdata; ! 810: VFLAG = 0; ! 811: CFLAG = 0; ! 812: PC+= 2; ! 813: } ! 814: ! 815: void cpu_op_1089a(t_ipc *ipc) /* OR */ { ! 816: /* mask f1f8, bits 80a0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 817: int srcreg = (ipc->opcode >> 0) & 7; ! 818: uint32 srcaddr = ADDRREG(srcreg)-=4; ! 819: uint32 srcdata = fetchlong(srcaddr); ! 820: int dstreg = (ipc->opcode >> 9) & 7; ! 821: uint32 dstdata = DATAREG(dstreg); ! 822: uint32 outdata = dstdata; ! 823: ! 824: outdata|= srcdata; ! 825: DATAREG(dstreg) = outdata; ! 826: PC+= 2; ! 827: } ! 828: ! 829: void cpu_op_1089b(t_ipc *ipc) /* OR */ { ! 830: /* mask f1f8, bits 80a0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 831: int srcreg = (ipc->opcode >> 0) & 7; ! 832: uint32 srcaddr = ADDRREG(srcreg)-=4; ! 833: uint32 srcdata = fetchlong(srcaddr); ! 834: int dstreg = (ipc->opcode >> 9) & 7; ! 835: uint32 dstdata = DATAREG(dstreg); ! 836: uint32 outdata = dstdata; ! 837: ! 838: outdata|= srcdata; ! 839: DATAREG(dstreg) = outdata; ! 840: ! 841: NFLAG = ((sint32)outdata) < 0; ! 842: ZFLAG = !outdata; ! 843: VFLAG = 0; ! 844: CFLAG = 0; ! 845: PC+= 2; ! 846: } ! 847: ! 848: void cpu_op_1090a(t_ipc *ipc) /* OR */ { ! 849: /* mask f1f8, bits 80a8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 850: int srcreg = (ipc->opcode >> 0) & 7; ! 851: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 852: uint32 srcdata = fetchlong(srcaddr); ! 853: int dstreg = (ipc->opcode >> 9) & 7; ! 854: uint32 dstdata = DATAREG(dstreg); ! 855: uint32 outdata = dstdata; ! 856: ! 857: outdata|= srcdata; ! 858: DATAREG(dstreg) = outdata; ! 859: PC+= 4; ! 860: } ! 861: ! 862: void cpu_op_1090b(t_ipc *ipc) /* OR */ { ! 863: /* mask f1f8, bits 80a8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 864: int srcreg = (ipc->opcode >> 0) & 7; ! 865: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 866: uint32 srcdata = fetchlong(srcaddr); ! 867: int dstreg = (ipc->opcode >> 9) & 7; ! 868: uint32 dstdata = DATAREG(dstreg); ! 869: uint32 outdata = dstdata; ! 870: ! 871: outdata|= srcdata; ! 872: DATAREG(dstreg) = outdata; ! 873: ! 874: NFLAG = ((sint32)outdata) < 0; ! 875: ZFLAG = !outdata; ! 876: VFLAG = 0; ! 877: CFLAG = 0; ! 878: PC+= 4; ! 879: } ! 880: ! 881: void cpu_op_1091a(t_ipc *ipc) /* OR */ { ! 882: /* mask f1f8, bits 80b0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 883: int srcreg = (ipc->opcode >> 0) & 7; ! 884: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 885: uint32 srcdata = fetchlong(srcaddr); ! 886: int dstreg = (ipc->opcode >> 9) & 7; ! 887: uint32 dstdata = DATAREG(dstreg); ! 888: uint32 outdata = dstdata; ! 889: ! 890: outdata|= srcdata; ! 891: DATAREG(dstreg) = outdata; ! 892: PC+= 4; ! 893: } ! 894: ! 895: void cpu_op_1091b(t_ipc *ipc) /* OR */ { ! 896: /* mask f1f8, bits 80b0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 897: int srcreg = (ipc->opcode >> 0) & 7; ! 898: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 899: uint32 srcdata = fetchlong(srcaddr); ! 900: int dstreg = (ipc->opcode >> 9) & 7; ! 901: uint32 dstdata = DATAREG(dstreg); ! 902: uint32 outdata = dstdata; ! 903: ! 904: outdata|= srcdata; ! 905: DATAREG(dstreg) = outdata; ! 906: ! 907: NFLAG = ((sint32)outdata) < 0; ! 908: ZFLAG = !outdata; ! 909: VFLAG = 0; ! 910: CFLAG = 0; ! 911: PC+= 4; ! 912: } ! 913: ! 914: void cpu_op_1092a(t_ipc *ipc) /* OR */ { ! 915: /* mask f1ff, bits 80b8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 916: uint32 srcaddr = ipc->src; ! 917: uint32 srcdata = fetchlong(srcaddr); ! 918: int dstreg = (ipc->opcode >> 9) & 7; ! 919: uint32 dstdata = DATAREG(dstreg); ! 920: uint32 outdata = dstdata; ! 921: ! 922: outdata|= srcdata; ! 923: DATAREG(dstreg) = outdata; ! 924: PC+= 4; ! 925: } ! 926: ! 927: void cpu_op_1092b(t_ipc *ipc) /* OR */ { ! 928: /* mask f1ff, bits 80b8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 929: uint32 srcaddr = ipc->src; ! 930: uint32 srcdata = fetchlong(srcaddr); ! 931: int dstreg = (ipc->opcode >> 9) & 7; ! 932: uint32 dstdata = DATAREG(dstreg); ! 933: uint32 outdata = dstdata; ! 934: ! 935: outdata|= srcdata; ! 936: DATAREG(dstreg) = outdata; ! 937: ! 938: NFLAG = ((sint32)outdata) < 0; ! 939: ZFLAG = !outdata; ! 940: VFLAG = 0; ! 941: CFLAG = 0; ! 942: PC+= 4; ! 943: } ! 944: ! 945: void cpu_op_1093a(t_ipc *ipc) /* OR */ { ! 946: /* mask f1ff, bits 80b9, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 947: uint32 srcaddr = ipc->src; ! 948: uint32 srcdata = fetchlong(srcaddr); ! 949: int dstreg = (ipc->opcode >> 9) & 7; ! 950: uint32 dstdata = DATAREG(dstreg); ! 951: uint32 outdata = dstdata; ! 952: ! 953: outdata|= srcdata; ! 954: DATAREG(dstreg) = outdata; ! 955: PC+= 6; ! 956: } ! 957: ! 958: void cpu_op_1093b(t_ipc *ipc) /* OR */ { ! 959: /* mask f1ff, bits 80b9, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 960: uint32 srcaddr = ipc->src; ! 961: uint32 srcdata = fetchlong(srcaddr); ! 962: int dstreg = (ipc->opcode >> 9) & 7; ! 963: uint32 dstdata = DATAREG(dstreg); ! 964: uint32 outdata = dstdata; ! 965: ! 966: outdata|= srcdata; ! 967: DATAREG(dstreg) = outdata; ! 968: ! 969: NFLAG = ((sint32)outdata) < 0; ! 970: ZFLAG = !outdata; ! 971: VFLAG = 0; ! 972: CFLAG = 0; ! 973: PC+= 6; ! 974: } ! 975: ! 976: void cpu_op_1094a(t_ipc *ipc) /* OR */ { ! 977: /* mask f1ff, bits 80ba, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 978: uint32 srcaddr = ipc->src; ! 979: uint32 srcdata = fetchlong(srcaddr); ! 980: int dstreg = (ipc->opcode >> 9) & 7; ! 981: uint32 dstdata = DATAREG(dstreg); ! 982: uint32 outdata = dstdata; ! 983: ! 984: outdata|= srcdata; ! 985: DATAREG(dstreg) = outdata; ! 986: PC+= 4; ! 987: } ! 988: ! 989: void cpu_op_1094b(t_ipc *ipc) /* OR */ { ! 990: /* mask f1ff, bits 80ba, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 991: uint32 srcaddr = ipc->src; ! 992: uint32 srcdata = fetchlong(srcaddr); ! 993: int dstreg = (ipc->opcode >> 9) & 7; ! 994: uint32 dstdata = DATAREG(dstreg); ! 995: uint32 outdata = dstdata; ! 996: ! 997: outdata|= srcdata; ! 998: DATAREG(dstreg) = outdata; ! 999: ! 1000: NFLAG = ((sint32)outdata) < 0; ! 1001: ZFLAG = !outdata; ! 1002: VFLAG = 0; ! 1003: CFLAG = 0; ! 1004: PC+= 4; ! 1005: } ! 1006: ! 1007: void cpu_op_1095a(t_ipc *ipc) /* OR */ { ! 1008: /* mask f1ff, bits 80bb, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1009: uint32 srcaddr = idxval_src(ipc); ! 1010: uint32 srcdata = fetchlong(srcaddr); ! 1011: int dstreg = (ipc->opcode >> 9) & 7; ! 1012: uint32 dstdata = DATAREG(dstreg); ! 1013: uint32 outdata = dstdata; ! 1014: ! 1015: outdata|= srcdata; ! 1016: DATAREG(dstreg) = outdata; ! 1017: PC+= 4; ! 1018: } ! 1019: ! 1020: void cpu_op_1095b(t_ipc *ipc) /* OR */ { ! 1021: /* mask f1ff, bits 80bb, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1022: uint32 srcaddr = idxval_src(ipc); ! 1023: uint32 srcdata = fetchlong(srcaddr); ! 1024: int dstreg = (ipc->opcode >> 9) & 7; ! 1025: uint32 dstdata = DATAREG(dstreg); ! 1026: uint32 outdata = dstdata; ! 1027: ! 1028: outdata|= srcdata; ! 1029: DATAREG(dstreg) = outdata; ! 1030: ! 1031: NFLAG = ((sint32)outdata) < 0; ! 1032: ZFLAG = !outdata; ! 1033: VFLAG = 0; ! 1034: CFLAG = 0; ! 1035: PC+= 4; ! 1036: } ! 1037: ! 1038: void cpu_op_1096a(t_ipc *ipc) /* OR */ { ! 1039: /* mask f1ff, bits 80bc, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 13, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1040: uint32 srcdata = ipc->src; ! 1041: int dstreg = (ipc->opcode >> 9) & 7; ! 1042: uint32 dstdata = DATAREG(dstreg); ! 1043: uint32 outdata = dstdata; ! 1044: ! 1045: outdata|= srcdata; ! 1046: DATAREG(dstreg) = outdata; ! 1047: PC+= 6; ! 1048: } ! 1049: ! 1050: void cpu_op_1096b(t_ipc *ipc) /* OR */ { ! 1051: /* mask f1ff, bits 80bc, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 13, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1052: uint32 srcdata = ipc->src; ! 1053: int dstreg = (ipc->opcode >> 9) & 7; ! 1054: uint32 dstdata = DATAREG(dstreg); ! 1055: uint32 outdata = dstdata; ! 1056: ! 1057: outdata|= srcdata; ! 1058: DATAREG(dstreg) = outdata; ! 1059: ! 1060: NFLAG = ((sint32)outdata) < 0; ! 1061: ZFLAG = !outdata; ! 1062: VFLAG = 0; ! 1063: CFLAG = 0; ! 1064: PC+= 6; ! 1065: } ! 1066: ! 1067: void cpu_op_1097a(t_ipc *ipc) /* OR */ { ! 1068: /* mask f1f8, bits 8110, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1069: int srcreg = (ipc->opcode >> 9) & 7; ! 1070: uint8 srcdata = DATAREG(srcreg); ! 1071: int dstreg = (ipc->opcode >> 0) & 7; ! 1072: uint32 dstaddr = ADDRREG(dstreg); ! 1073: uint8 dstdata = fetchbyte(dstaddr); ! 1074: uint8 outdata = dstdata; ! 1075: ! 1076: outdata|= srcdata; ! 1077: storebyte(dstaddr, outdata); ! 1078: PC+= 2; ! 1079: } ! 1080: ! 1081: void cpu_op_1097b(t_ipc *ipc) /* OR */ { ! 1082: /* mask f1f8, bits 8110, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1083: int srcreg = (ipc->opcode >> 9) & 7; ! 1084: uint8 srcdata = DATAREG(srcreg); ! 1085: int dstreg = (ipc->opcode >> 0) & 7; ! 1086: uint32 dstaddr = ADDRREG(dstreg); ! 1087: uint8 dstdata = fetchbyte(dstaddr); ! 1088: uint8 outdata = dstdata; ! 1089: ! 1090: outdata|= srcdata; ! 1091: storebyte(dstaddr, outdata); ! 1092: ! 1093: NFLAG = ((sint8)outdata) < 0; ! 1094: ZFLAG = !outdata; ! 1095: VFLAG = 0; ! 1096: CFLAG = 0; ! 1097: PC+= 2; ! 1098: } ! 1099: ! 1100: void cpu_op_1098a(t_ipc *ipc) /* OR */ { ! 1101: /* mask f1f8, bits 8118, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1102: int srcreg = (ipc->opcode >> 9) & 7; ! 1103: uint8 srcdata = DATAREG(srcreg); ! 1104: int dstreg = (ipc->opcode >> 0) & 7; ! 1105: uint32 dstaddr = ADDRREG(dstreg); ! 1106: uint32 dstaddr_tmp = (ADDRREG(dstreg)+= (dstreg == 7 ? 2 : 1), 0); ! 1107: uint8 dstdata = fetchbyte(dstaddr); ! 1108: uint8 outdata = dstdata; ! 1109: ! 1110: outdata|= srcdata; ! 1111: storebyte(dstaddr, outdata); ! 1112: PC+= 2; ! 1113: } ! 1114: ! 1115: void cpu_op_1098b(t_ipc *ipc) /* OR */ { ! 1116: /* mask f1f8, bits 8118, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1117: int srcreg = (ipc->opcode >> 9) & 7; ! 1118: uint8 srcdata = DATAREG(srcreg); ! 1119: int dstreg = (ipc->opcode >> 0) & 7; ! 1120: uint32 dstaddr = ADDRREG(dstreg); ! 1121: uint32 dstaddr_tmp = (ADDRREG(dstreg)+= (dstreg == 7 ? 2 : 1), 0); ! 1122: uint8 dstdata = fetchbyte(dstaddr); ! 1123: uint8 outdata = dstdata; ! 1124: ! 1125: outdata|= srcdata; ! 1126: storebyte(dstaddr, outdata); ! 1127: ! 1128: NFLAG = ((sint8)outdata) < 0; ! 1129: ZFLAG = !outdata; ! 1130: VFLAG = 0; ! 1131: CFLAG = 0; ! 1132: PC+= 2; ! 1133: } ! 1134: ! 1135: void cpu_op_1099a(t_ipc *ipc) /* OR */ { ! 1136: /* mask f1f8, bits 8120, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1137: int srcreg = (ipc->opcode >> 9) & 7; ! 1138: uint8 srcdata = DATAREG(srcreg); ! 1139: int dstreg = (ipc->opcode >> 0) & 7; ! 1140: uint32 dstaddr = (ADDRREG(dstreg)-= (dstreg == 7 ? 2 : 1)); ! 1141: uint8 dstdata = fetchbyte(dstaddr); ! 1142: uint8 outdata = dstdata; ! 1143: ! 1144: outdata|= srcdata; ! 1145: storebyte(dstaddr, outdata); ! 1146: PC+= 2; ! 1147: } ! 1148: ! 1149: void cpu_op_1099b(t_ipc *ipc) /* OR */ { ! 1150: /* mask f1f8, bits 8120, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1151: int srcreg = (ipc->opcode >> 9) & 7; ! 1152: uint8 srcdata = DATAREG(srcreg); ! 1153: int dstreg = (ipc->opcode >> 0) & 7; ! 1154: uint32 dstaddr = (ADDRREG(dstreg)-= (dstreg == 7 ? 2 : 1)); ! 1155: uint8 dstdata = fetchbyte(dstaddr); ! 1156: uint8 outdata = dstdata; ! 1157: ! 1158: outdata|= srcdata; ! 1159: storebyte(dstaddr, outdata); ! 1160: ! 1161: NFLAG = ((sint8)outdata) < 0; ! 1162: ZFLAG = !outdata; ! 1163: VFLAG = 0; ! 1164: CFLAG = 0; ! 1165: PC+= 2; ! 1166: } ! 1167: ! 1168: void cpu_op_1100a(t_ipc *ipc) /* OR */ { ! 1169: /* mask f1f8, bits 8128, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1170: int srcreg = (ipc->opcode >> 9) & 7; ! 1171: uint8 srcdata = DATAREG(srcreg); ! 1172: int dstreg = (ipc->opcode >> 0) & 7; ! 1173: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1174: uint8 dstdata = fetchbyte(dstaddr); ! 1175: uint8 outdata = dstdata; ! 1176: ! 1177: outdata|= srcdata; ! 1178: storebyte(dstaddr, outdata); ! 1179: PC+= 4; ! 1180: } ! 1181: ! 1182: void cpu_op_1100b(t_ipc *ipc) /* OR */ { ! 1183: /* mask f1f8, bits 8128, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1184: int srcreg = (ipc->opcode >> 9) & 7; ! 1185: uint8 srcdata = DATAREG(srcreg); ! 1186: int dstreg = (ipc->opcode >> 0) & 7; ! 1187: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1188: uint8 dstdata = fetchbyte(dstaddr); ! 1189: uint8 outdata = dstdata; ! 1190: ! 1191: outdata|= srcdata; ! 1192: storebyte(dstaddr, outdata); ! 1193: ! 1194: NFLAG = ((sint8)outdata) < 0; ! 1195: ZFLAG = !outdata; ! 1196: VFLAG = 0; ! 1197: CFLAG = 0; ! 1198: PC+= 4; ! 1199: } ! 1200: ! 1201: void cpu_op_1101a(t_ipc *ipc) /* OR */ { ! 1202: /* mask f1f8, bits 8130, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1203: int srcreg = (ipc->opcode >> 9) & 7; ! 1204: uint8 srcdata = DATAREG(srcreg); ! 1205: int dstreg = (ipc->opcode >> 0) & 7; ! 1206: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1207: uint8 dstdata = fetchbyte(dstaddr); ! 1208: uint8 outdata = dstdata; ! 1209: ! 1210: outdata|= srcdata; ! 1211: storebyte(dstaddr, outdata); ! 1212: PC+= 4; ! 1213: } ! 1214: ! 1215: void cpu_op_1101b(t_ipc *ipc) /* OR */ { ! 1216: /* mask f1f8, bits 8130, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1217: int srcreg = (ipc->opcode >> 9) & 7; ! 1218: uint8 srcdata = DATAREG(srcreg); ! 1219: int dstreg = (ipc->opcode >> 0) & 7; ! 1220: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1221: uint8 dstdata = fetchbyte(dstaddr); ! 1222: uint8 outdata = dstdata; ! 1223: ! 1224: outdata|= srcdata; ! 1225: storebyte(dstaddr, outdata); ! 1226: ! 1227: NFLAG = ((sint8)outdata) < 0; ! 1228: ZFLAG = !outdata; ! 1229: VFLAG = 0; ! 1230: CFLAG = 0; ! 1231: PC+= 4; ! 1232: } ! 1233: ! 1234: void cpu_op_1102a(t_ipc *ipc) /* OR */ { ! 1235: /* mask f1ff, bits 8138, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1236: int srcreg = (ipc->opcode >> 9) & 7; ! 1237: uint8 srcdata = DATAREG(srcreg); ! 1238: uint32 dstaddr = ipc->dst; ! 1239: uint8 dstdata = fetchbyte(dstaddr); ! 1240: uint8 outdata = dstdata; ! 1241: ! 1242: outdata|= srcdata; ! 1243: storebyte(dstaddr, outdata); ! 1244: PC+= 4; ! 1245: } ! 1246: ! 1247: void cpu_op_1102b(t_ipc *ipc) /* OR */ { ! 1248: /* mask f1ff, bits 8138, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1249: int srcreg = (ipc->opcode >> 9) & 7; ! 1250: uint8 srcdata = DATAREG(srcreg); ! 1251: uint32 dstaddr = ipc->dst; ! 1252: uint8 dstdata = fetchbyte(dstaddr); ! 1253: uint8 outdata = dstdata; ! 1254: ! 1255: outdata|= srcdata; ! 1256: storebyte(dstaddr, outdata); ! 1257: ! 1258: NFLAG = ((sint8)outdata) < 0; ! 1259: ZFLAG = !outdata; ! 1260: VFLAG = 0; ! 1261: CFLAG = 0; ! 1262: PC+= 4; ! 1263: } ! 1264: ! 1265: void cpu_op_1103a(t_ipc *ipc) /* OR */ { ! 1266: /* mask f1ff, bits 8139, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1267: int srcreg = (ipc->opcode >> 9) & 7; ! 1268: uint8 srcdata = DATAREG(srcreg); ! 1269: uint32 dstaddr = ipc->dst; ! 1270: uint8 dstdata = fetchbyte(dstaddr); ! 1271: uint8 outdata = dstdata; ! 1272: ! 1273: outdata|= srcdata; ! 1274: storebyte(dstaddr, outdata); ! 1275: PC+= 6; ! 1276: } ! 1277: ! 1278: void cpu_op_1103b(t_ipc *ipc) /* OR */ { ! 1279: /* mask f1ff, bits 8139, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1280: int srcreg = (ipc->opcode >> 9) & 7; ! 1281: uint8 srcdata = DATAREG(srcreg); ! 1282: uint32 dstaddr = ipc->dst; ! 1283: uint8 dstdata = fetchbyte(dstaddr); ! 1284: uint8 outdata = dstdata; ! 1285: ! 1286: outdata|= srcdata; ! 1287: storebyte(dstaddr, outdata); ! 1288: ! 1289: NFLAG = ((sint8)outdata) < 0; ! 1290: ZFLAG = !outdata; ! 1291: VFLAG = 0; ! 1292: CFLAG = 0; ! 1293: PC+= 6; ! 1294: } ! 1295: ! 1296: void cpu_op_1104a(t_ipc *ipc) /* OR */ { ! 1297: /* mask f1f8, bits 8150, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1298: int srcreg = (ipc->opcode >> 9) & 7; ! 1299: uint16 srcdata = DATAREG(srcreg); ! 1300: int dstreg = (ipc->opcode >> 0) & 7; ! 1301: uint32 dstaddr = ADDRREG(dstreg); ! 1302: uint16 dstdata = fetchword(dstaddr); ! 1303: uint16 outdata = dstdata; ! 1304: ! 1305: outdata|= srcdata; ! 1306: storeword(dstaddr, outdata); ! 1307: PC+= 2; ! 1308: } ! 1309: ! 1310: void cpu_op_1104b(t_ipc *ipc) /* OR */ { ! 1311: /* mask f1f8, bits 8150, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1312: int srcreg = (ipc->opcode >> 9) & 7; ! 1313: uint16 srcdata = DATAREG(srcreg); ! 1314: int dstreg = (ipc->opcode >> 0) & 7; ! 1315: uint32 dstaddr = ADDRREG(dstreg); ! 1316: uint16 dstdata = fetchword(dstaddr); ! 1317: uint16 outdata = dstdata; ! 1318: ! 1319: outdata|= srcdata; ! 1320: storeword(dstaddr, outdata); ! 1321: ! 1322: NFLAG = ((sint16)outdata) < 0; ! 1323: ZFLAG = !outdata; ! 1324: VFLAG = 0; ! 1325: CFLAG = 0; ! 1326: PC+= 2; ! 1327: } ! 1328: ! 1329: void cpu_op_1105a(t_ipc *ipc) /* OR */ { ! 1330: /* mask f1f8, bits 8158, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1331: int srcreg = (ipc->opcode >> 9) & 7; ! 1332: uint16 srcdata = DATAREG(srcreg); ! 1333: int dstreg = (ipc->opcode >> 0) & 7; ! 1334: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1335: uint16 dstdata = fetchword(dstaddr); ! 1336: uint16 outdata = dstdata; ! 1337: ! 1338: outdata|= srcdata; ! 1339: storeword(dstaddr, outdata); ! 1340: PC+= 2; ! 1341: } ! 1342: ! 1343: void cpu_op_1105b(t_ipc *ipc) /* OR */ { ! 1344: /* mask f1f8, bits 8158, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1345: int srcreg = (ipc->opcode >> 9) & 7; ! 1346: uint16 srcdata = DATAREG(srcreg); ! 1347: int dstreg = (ipc->opcode >> 0) & 7; ! 1348: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1349: uint16 dstdata = fetchword(dstaddr); ! 1350: uint16 outdata = dstdata; ! 1351: ! 1352: outdata|= srcdata; ! 1353: storeword(dstaddr, outdata); ! 1354: ! 1355: NFLAG = ((sint16)outdata) < 0; ! 1356: ZFLAG = !outdata; ! 1357: VFLAG = 0; ! 1358: CFLAG = 0; ! 1359: PC+= 2; ! 1360: } ! 1361: ! 1362: void cpu_op_1106a(t_ipc *ipc) /* OR */ { ! 1363: /* mask f1f8, bits 8160, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1364: int srcreg = (ipc->opcode >> 9) & 7; ! 1365: uint16 srcdata = DATAREG(srcreg); ! 1366: int dstreg = (ipc->opcode >> 0) & 7; ! 1367: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1368: uint16 dstdata = fetchword(dstaddr); ! 1369: uint16 outdata = dstdata; ! 1370: ! 1371: outdata|= srcdata; ! 1372: storeword(dstaddr, outdata); ! 1373: PC+= 2; ! 1374: } ! 1375: ! 1376: void cpu_op_1106b(t_ipc *ipc) /* OR */ { ! 1377: /* mask f1f8, bits 8160, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1378: int srcreg = (ipc->opcode >> 9) & 7; ! 1379: uint16 srcdata = DATAREG(srcreg); ! 1380: int dstreg = (ipc->opcode >> 0) & 7; ! 1381: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1382: uint16 dstdata = fetchword(dstaddr); ! 1383: uint16 outdata = dstdata; ! 1384: ! 1385: outdata|= srcdata; ! 1386: storeword(dstaddr, outdata); ! 1387: ! 1388: NFLAG = ((sint16)outdata) < 0; ! 1389: ZFLAG = !outdata; ! 1390: VFLAG = 0; ! 1391: CFLAG = 0; ! 1392: PC+= 2; ! 1393: } ! 1394: ! 1395: void cpu_op_1107a(t_ipc *ipc) /* OR */ { ! 1396: /* mask f1f8, bits 8168, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1397: int srcreg = (ipc->opcode >> 9) & 7; ! 1398: uint16 srcdata = DATAREG(srcreg); ! 1399: int dstreg = (ipc->opcode >> 0) & 7; ! 1400: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1401: uint16 dstdata = fetchword(dstaddr); ! 1402: uint16 outdata = dstdata; ! 1403: ! 1404: outdata|= srcdata; ! 1405: storeword(dstaddr, outdata); ! 1406: PC+= 4; ! 1407: } ! 1408: ! 1409: void cpu_op_1107b(t_ipc *ipc) /* OR */ { ! 1410: /* mask f1f8, bits 8168, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1411: int srcreg = (ipc->opcode >> 9) & 7; ! 1412: uint16 srcdata = DATAREG(srcreg); ! 1413: int dstreg = (ipc->opcode >> 0) & 7; ! 1414: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1415: uint16 dstdata = fetchword(dstaddr); ! 1416: uint16 outdata = dstdata; ! 1417: ! 1418: outdata|= srcdata; ! 1419: storeword(dstaddr, outdata); ! 1420: ! 1421: NFLAG = ((sint16)outdata) < 0; ! 1422: ZFLAG = !outdata; ! 1423: VFLAG = 0; ! 1424: CFLAG = 0; ! 1425: PC+= 4; ! 1426: } ! 1427: ! 1428: void cpu_op_1108a(t_ipc *ipc) /* OR */ { ! 1429: /* mask f1f8, bits 8170, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1430: int srcreg = (ipc->opcode >> 9) & 7; ! 1431: uint16 srcdata = DATAREG(srcreg); ! 1432: int dstreg = (ipc->opcode >> 0) & 7; ! 1433: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1434: uint16 dstdata = fetchword(dstaddr); ! 1435: uint16 outdata = dstdata; ! 1436: ! 1437: outdata|= srcdata; ! 1438: storeword(dstaddr, outdata); ! 1439: PC+= 4; ! 1440: } ! 1441: ! 1442: void cpu_op_1108b(t_ipc *ipc) /* OR */ { ! 1443: /* mask f1f8, bits 8170, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1444: int srcreg = (ipc->opcode >> 9) & 7; ! 1445: uint16 srcdata = DATAREG(srcreg); ! 1446: int dstreg = (ipc->opcode >> 0) & 7; ! 1447: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1448: uint16 dstdata = fetchword(dstaddr); ! 1449: uint16 outdata = dstdata; ! 1450: ! 1451: outdata|= srcdata; ! 1452: storeword(dstaddr, outdata); ! 1453: ! 1454: NFLAG = ((sint16)outdata) < 0; ! 1455: ZFLAG = !outdata; ! 1456: VFLAG = 0; ! 1457: CFLAG = 0; ! 1458: PC+= 4; ! 1459: } ! 1460: ! 1461: void cpu_op_1109a(t_ipc *ipc) /* OR */ { ! 1462: /* mask f1ff, bits 8178, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1463: int srcreg = (ipc->opcode >> 9) & 7; ! 1464: uint16 srcdata = DATAREG(srcreg); ! 1465: uint32 dstaddr = ipc->dst; ! 1466: uint16 dstdata = fetchword(dstaddr); ! 1467: uint16 outdata = dstdata; ! 1468: ! 1469: outdata|= srcdata; ! 1470: storeword(dstaddr, outdata); ! 1471: PC+= 4; ! 1472: } ! 1473: ! 1474: void cpu_op_1109b(t_ipc *ipc) /* OR */ { ! 1475: /* mask f1ff, bits 8178, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1476: int srcreg = (ipc->opcode >> 9) & 7; ! 1477: uint16 srcdata = DATAREG(srcreg); ! 1478: uint32 dstaddr = ipc->dst; ! 1479: uint16 dstdata = fetchword(dstaddr); ! 1480: uint16 outdata = dstdata; ! 1481: ! 1482: outdata|= srcdata; ! 1483: storeword(dstaddr, outdata); ! 1484: ! 1485: NFLAG = ((sint16)outdata) < 0; ! 1486: ZFLAG = !outdata; ! 1487: VFLAG = 0; ! 1488: CFLAG = 0; ! 1489: PC+= 4; ! 1490: } ! 1491: ! 1492: void cpu_op_1110a(t_ipc *ipc) /* OR */ { ! 1493: /* mask f1ff, bits 8179, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1494: int srcreg = (ipc->opcode >> 9) & 7; ! 1495: uint16 srcdata = DATAREG(srcreg); ! 1496: uint32 dstaddr = ipc->dst; ! 1497: uint16 dstdata = fetchword(dstaddr); ! 1498: uint16 outdata = dstdata; ! 1499: ! 1500: outdata|= srcdata; ! 1501: storeword(dstaddr, outdata); ! 1502: PC+= 6; ! 1503: } ! 1504: ! 1505: void cpu_op_1110b(t_ipc *ipc) /* OR */ { ! 1506: /* mask f1ff, bits 8179, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1507: int srcreg = (ipc->opcode >> 9) & 7; ! 1508: uint16 srcdata = DATAREG(srcreg); ! 1509: uint32 dstaddr = ipc->dst; ! 1510: uint16 dstdata = fetchword(dstaddr); ! 1511: uint16 outdata = dstdata; ! 1512: ! 1513: outdata|= srcdata; ! 1514: storeword(dstaddr, outdata); ! 1515: ! 1516: NFLAG = ((sint16)outdata) < 0; ! 1517: ZFLAG = !outdata; ! 1518: VFLAG = 0; ! 1519: CFLAG = 0; ! 1520: PC+= 6; ! 1521: } ! 1522: ! 1523: void cpu_op_1111a(t_ipc *ipc) /* OR */ { ! 1524: /* mask f1f8, bits 8190, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1525: int srcreg = (ipc->opcode >> 9) & 7; ! 1526: uint32 srcdata = DATAREG(srcreg); ! 1527: int dstreg = (ipc->opcode >> 0) & 7; ! 1528: uint32 dstaddr = ADDRREG(dstreg); ! 1529: uint32 dstdata = fetchlong(dstaddr); ! 1530: uint32 outdata = dstdata; ! 1531: ! 1532: outdata|= srcdata; ! 1533: storelong(dstaddr, outdata); ! 1534: PC+= 2; ! 1535: } ! 1536: ! 1537: void cpu_op_1111b(t_ipc *ipc) /* OR */ { ! 1538: /* mask f1f8, bits 8190, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1539: int srcreg = (ipc->opcode >> 9) & 7; ! 1540: uint32 srcdata = DATAREG(srcreg); ! 1541: int dstreg = (ipc->opcode >> 0) & 7; ! 1542: uint32 dstaddr = ADDRREG(dstreg); ! 1543: uint32 dstdata = fetchlong(dstaddr); ! 1544: uint32 outdata = dstdata; ! 1545: ! 1546: outdata|= srcdata; ! 1547: storelong(dstaddr, outdata); ! 1548: ! 1549: NFLAG = ((sint32)outdata) < 0; ! 1550: ZFLAG = !outdata; ! 1551: VFLAG = 0; ! 1552: CFLAG = 0; ! 1553: PC+= 2; ! 1554: } ! 1555: ! 1556: void cpu_op_1112a(t_ipc *ipc) /* OR */ { ! 1557: /* mask f1f8, bits 8198, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1558: int srcreg = (ipc->opcode >> 9) & 7; ! 1559: uint32 srcdata = DATAREG(srcreg); ! 1560: int dstreg = (ipc->opcode >> 0) & 7; ! 1561: uint32 dstaddr = (ADDRREG(dstreg)+=4, ADDRREG(dstreg)-4); ! 1562: uint32 dstdata = fetchlong(dstaddr); ! 1563: uint32 outdata = dstdata; ! 1564: ! 1565: outdata|= srcdata; ! 1566: storelong(dstaddr, outdata); ! 1567: PC+= 2; ! 1568: } ! 1569: ! 1570: void cpu_op_1112b(t_ipc *ipc) /* OR */ { ! 1571: /* mask f1f8, bits 8198, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1572: int srcreg = (ipc->opcode >> 9) & 7; ! 1573: uint32 srcdata = DATAREG(srcreg); ! 1574: int dstreg = (ipc->opcode >> 0) & 7; ! 1575: uint32 dstaddr = (ADDRREG(dstreg)+=4, ADDRREG(dstreg)-4); ! 1576: uint32 dstdata = fetchlong(dstaddr); ! 1577: uint32 outdata = dstdata; ! 1578: ! 1579: outdata|= srcdata; ! 1580: storelong(dstaddr, outdata); ! 1581: ! 1582: NFLAG = ((sint32)outdata) < 0; ! 1583: ZFLAG = !outdata; ! 1584: VFLAG = 0; ! 1585: CFLAG = 0; ! 1586: PC+= 2; ! 1587: } ! 1588: ! 1589: void cpu_op_1113a(t_ipc *ipc) /* OR */ { ! 1590: /* mask f1f8, bits 81a0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1591: int srcreg = (ipc->opcode >> 9) & 7; ! 1592: uint32 srcdata = DATAREG(srcreg); ! 1593: int dstreg = (ipc->opcode >> 0) & 7; ! 1594: uint32 dstaddr = ADDRREG(dstreg)-=4; ! 1595: uint32 dstdata = fetchlong(dstaddr); ! 1596: uint32 outdata = dstdata; ! 1597: ! 1598: outdata|= srcdata; ! 1599: storelong(dstaddr, outdata); ! 1600: PC+= 2; ! 1601: } ! 1602: ! 1603: void cpu_op_1113b(t_ipc *ipc) /* OR */ { ! 1604: /* mask f1f8, bits 81a0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1605: int srcreg = (ipc->opcode >> 9) & 7; ! 1606: uint32 srcdata = DATAREG(srcreg); ! 1607: int dstreg = (ipc->opcode >> 0) & 7; ! 1608: uint32 dstaddr = ADDRREG(dstreg)-=4; ! 1609: uint32 dstdata = fetchlong(dstaddr); ! 1610: uint32 outdata = dstdata; ! 1611: ! 1612: outdata|= srcdata; ! 1613: storelong(dstaddr, outdata); ! 1614: ! 1615: NFLAG = ((sint32)outdata) < 0; ! 1616: ZFLAG = !outdata; ! 1617: VFLAG = 0; ! 1618: CFLAG = 0; ! 1619: PC+= 2; ! 1620: } ! 1621: ! 1622: void cpu_op_1114a(t_ipc *ipc) /* OR */ { ! 1623: /* mask f1f8, bits 81a8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1624: int srcreg = (ipc->opcode >> 9) & 7; ! 1625: uint32 srcdata = DATAREG(srcreg); ! 1626: int dstreg = (ipc->opcode >> 0) & 7; ! 1627: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1628: uint32 dstdata = fetchlong(dstaddr); ! 1629: uint32 outdata = dstdata; ! 1630: ! 1631: outdata|= srcdata; ! 1632: storelong(dstaddr, outdata); ! 1633: PC+= 4; ! 1634: } ! 1635: ! 1636: void cpu_op_1114b(t_ipc *ipc) /* OR */ { ! 1637: /* mask f1f8, bits 81a8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1638: int srcreg = (ipc->opcode >> 9) & 7; ! 1639: uint32 srcdata = DATAREG(srcreg); ! 1640: int dstreg = (ipc->opcode >> 0) & 7; ! 1641: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1642: uint32 dstdata = fetchlong(dstaddr); ! 1643: uint32 outdata = dstdata; ! 1644: ! 1645: outdata|= srcdata; ! 1646: storelong(dstaddr, outdata); ! 1647: ! 1648: NFLAG = ((sint32)outdata) < 0; ! 1649: ZFLAG = !outdata; ! 1650: VFLAG = 0; ! 1651: CFLAG = 0; ! 1652: PC+= 4; ! 1653: } ! 1654: ! 1655: void cpu_op_1115a(t_ipc *ipc) /* OR */ { ! 1656: /* mask f1f8, bits 81b0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1657: int srcreg = (ipc->opcode >> 9) & 7; ! 1658: uint32 srcdata = DATAREG(srcreg); ! 1659: int dstreg = (ipc->opcode >> 0) & 7; ! 1660: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1661: uint32 dstdata = fetchlong(dstaddr); ! 1662: uint32 outdata = dstdata; ! 1663: ! 1664: outdata|= srcdata; ! 1665: storelong(dstaddr, outdata); ! 1666: PC+= 4; ! 1667: } ! 1668: ! 1669: void cpu_op_1115b(t_ipc *ipc) /* OR */ { ! 1670: /* mask f1f8, bits 81b0, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1671: int srcreg = (ipc->opcode >> 9) & 7; ! 1672: uint32 srcdata = DATAREG(srcreg); ! 1673: int dstreg = (ipc->opcode >> 0) & 7; ! 1674: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1675: uint32 dstdata = fetchlong(dstaddr); ! 1676: uint32 outdata = dstdata; ! 1677: ! 1678: outdata|= srcdata; ! 1679: storelong(dstaddr, outdata); ! 1680: ! 1681: NFLAG = ((sint32)outdata) < 0; ! 1682: ZFLAG = !outdata; ! 1683: VFLAG = 0; ! 1684: CFLAG = 0; ! 1685: PC+= 4; ! 1686: } ! 1687: ! 1688: void cpu_op_1116a(t_ipc *ipc) /* OR */ { ! 1689: /* mask f1ff, bits 81b8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1690: int srcreg = (ipc->opcode >> 9) & 7; ! 1691: uint32 srcdata = DATAREG(srcreg); ! 1692: uint32 dstaddr = ipc->dst; ! 1693: uint32 dstdata = fetchlong(dstaddr); ! 1694: uint32 outdata = dstdata; ! 1695: ! 1696: outdata|= srcdata; ! 1697: storelong(dstaddr, outdata); ! 1698: PC+= 4; ! 1699: } ! 1700: ! 1701: void cpu_op_1116b(t_ipc *ipc) /* OR */ { ! 1702: /* mask f1ff, bits 81b8, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1703: int srcreg = (ipc->opcode >> 9) & 7; ! 1704: uint32 srcdata = DATAREG(srcreg); ! 1705: uint32 dstaddr = ipc->dst; ! 1706: uint32 dstdata = fetchlong(dstaddr); ! 1707: uint32 outdata = dstdata; ! 1708: ! 1709: outdata|= srcdata; ! 1710: storelong(dstaddr, outdata); ! 1711: ! 1712: NFLAG = ((sint32)outdata) < 0; ! 1713: ZFLAG = !outdata; ! 1714: VFLAG = 0; ! 1715: CFLAG = 0; ! 1716: PC+= 4; ! 1717: } ! 1718: ! 1719: void cpu_op_1117a(t_ipc *ipc) /* OR */ { ! 1720: /* mask f1ff, bits 81b9, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1721: int srcreg = (ipc->opcode >> 9) & 7; ! 1722: uint32 srcdata = DATAREG(srcreg); ! 1723: uint32 dstaddr = ipc->dst; ! 1724: uint32 dstdata = fetchlong(dstaddr); ! 1725: uint32 outdata = dstdata; ! 1726: ! 1727: outdata|= srcdata; ! 1728: storelong(dstaddr, outdata); ! 1729: PC+= 6; ! 1730: } ! 1731: ! 1732: void cpu_op_1117b(t_ipc *ipc) /* OR */ { ! 1733: /* mask f1ff, bits 81b9, mnemonic 1, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1734: int srcreg = (ipc->opcode >> 9) & 7; ! 1735: uint32 srcdata = DATAREG(srcreg); ! 1736: uint32 dstaddr = ipc->dst; ! 1737: uint32 dstdata = fetchlong(dstaddr); ! 1738: uint32 outdata = dstdata; ! 1739: ! 1740: outdata|= srcdata; ! 1741: storelong(dstaddr, outdata); ! 1742: ! 1743: NFLAG = ((sint32)outdata) < 0; ! 1744: ZFLAG = !outdata; ! 1745: VFLAG = 0; ! 1746: CFLAG = 0; ! 1747: PC+= 6; ! 1748: } ! 1749: ! 1750: void cpu_op_1118a(t_ipc *ipc) /* DIVU */ { ! 1751: /* mask f1f8, bits 80c0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1752: int srcreg = (ipc->opcode >> 0) & 7; ! 1753: uint16 srcdata = DATAREG(srcreg); ! 1754: int dstreg = (ipc->opcode >> 9) & 7; ! 1755: uint32 dstdata = DATAREG(dstreg); ! 1756: uint32 quotient; ! 1757: ! 1758: if (srcdata == 0) { ! 1759: reg68k_vector(V_ZERO, PC+2); ! 1760: return; ! 1761: } ! 1762: quotient = dstdata / srcdata; ! 1763: if ((quotient & 0xffff0000) == 0) { ! 1764: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1765: } ! 1766: PC+= 2; ! 1767: } ! 1768: ! 1769: void cpu_op_1118b(t_ipc *ipc) /* DIVU */ { ! 1770: /* mask f1f8, bits 80c0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1771: int srcreg = (ipc->opcode >> 0) & 7; ! 1772: uint16 srcdata = DATAREG(srcreg); ! 1773: int dstreg = (ipc->opcode >> 9) & 7; ! 1774: uint32 dstdata = DATAREG(dstreg); ! 1775: uint32 quotient; ! 1776: ! 1777: if (srcdata == 0) { ! 1778: reg68k_vector(V_ZERO, PC+2); ! 1779: return; ! 1780: } ! 1781: quotient = dstdata / srcdata; ! 1782: if ((quotient & 0xffff0000) == 0) { ! 1783: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1784: VFLAG = 0; ! 1785: NFLAG = ((sint16)quotient) < 0; ! 1786: ZFLAG = !((uint16)quotient); ! 1787: } else { ! 1788: VFLAG = 1; ! 1789: NFLAG = 1; ! 1790: } ! 1791: CFLAG = 0; ! 1792: PC+= 2; ! 1793: } ! 1794: ! 1795: void cpu_op_1119a(t_ipc *ipc) /* DIVU */ { ! 1796: /* mask f1f8, bits 80d0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1797: int srcreg = (ipc->opcode >> 0) & 7; ! 1798: uint32 srcaddr = ADDRREG(srcreg); ! 1799: uint16 srcdata = fetchword(srcaddr); ! 1800: int dstreg = (ipc->opcode >> 9) & 7; ! 1801: uint32 dstdata = DATAREG(dstreg); ! 1802: uint32 quotient; ! 1803: ! 1804: if (srcdata == 0) { ! 1805: reg68k_vector(V_ZERO, PC+2); ! 1806: return; ! 1807: } ! 1808: quotient = dstdata / srcdata; ! 1809: if ((quotient & 0xffff0000) == 0) { ! 1810: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1811: } ! 1812: PC+= 2; ! 1813: } ! 1814: ! 1815: void cpu_op_1119b(t_ipc *ipc) /* DIVU */ { ! 1816: /* mask f1f8, bits 80d0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1817: int srcreg = (ipc->opcode >> 0) & 7; ! 1818: uint32 srcaddr = ADDRREG(srcreg); ! 1819: uint16 srcdata = fetchword(srcaddr); ! 1820: int dstreg = (ipc->opcode >> 9) & 7; ! 1821: uint32 dstdata = DATAREG(dstreg); ! 1822: uint32 quotient; ! 1823: ! 1824: if (srcdata == 0) { ! 1825: reg68k_vector(V_ZERO, PC+2); ! 1826: return; ! 1827: } ! 1828: quotient = dstdata / srcdata; ! 1829: if ((quotient & 0xffff0000) == 0) { ! 1830: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1831: VFLAG = 0; ! 1832: NFLAG = ((sint16)quotient) < 0; ! 1833: ZFLAG = !((uint16)quotient); ! 1834: } else { ! 1835: VFLAG = 1; ! 1836: NFLAG = 1; ! 1837: } ! 1838: CFLAG = 0; ! 1839: PC+= 2; ! 1840: } ! 1841: ! 1842: void cpu_op_1120a(t_ipc *ipc) /* DIVU */ { ! 1843: /* mask f1f8, bits 80d8, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1844: int srcreg = (ipc->opcode >> 0) & 7; ! 1845: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 1846: uint16 srcdata = fetchword(srcaddr); ! 1847: int dstreg = (ipc->opcode >> 9) & 7; ! 1848: uint32 dstdata = DATAREG(dstreg); ! 1849: uint32 quotient; ! 1850: ! 1851: if (srcdata == 0) { ! 1852: reg68k_vector(V_ZERO, PC+2); ! 1853: return; ! 1854: } ! 1855: quotient = dstdata / srcdata; ! 1856: if ((quotient & 0xffff0000) == 0) { ! 1857: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1858: } ! 1859: PC+= 2; ! 1860: } ! 1861: ! 1862: void cpu_op_1120b(t_ipc *ipc) /* DIVU */ { ! 1863: /* mask f1f8, bits 80d8, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1864: int srcreg = (ipc->opcode >> 0) & 7; ! 1865: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 1866: uint16 srcdata = fetchword(srcaddr); ! 1867: int dstreg = (ipc->opcode >> 9) & 7; ! 1868: uint32 dstdata = DATAREG(dstreg); ! 1869: uint32 quotient; ! 1870: ! 1871: if (srcdata == 0) { ! 1872: reg68k_vector(V_ZERO, PC+2); ! 1873: return; ! 1874: } ! 1875: quotient = dstdata / srcdata; ! 1876: if ((quotient & 0xffff0000) == 0) { ! 1877: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1878: VFLAG = 0; ! 1879: NFLAG = ((sint16)quotient) < 0; ! 1880: ZFLAG = !((uint16)quotient); ! 1881: } else { ! 1882: VFLAG = 1; ! 1883: NFLAG = 1; ! 1884: } ! 1885: CFLAG = 0; ! 1886: PC+= 2; ! 1887: } ! 1888: ! 1889: void cpu_op_1121a(t_ipc *ipc) /* DIVU */ { ! 1890: /* mask f1f8, bits 80e0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1891: int srcreg = (ipc->opcode >> 0) & 7; ! 1892: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1893: uint16 srcdata = fetchword(srcaddr); ! 1894: int dstreg = (ipc->opcode >> 9) & 7; ! 1895: uint32 dstdata = DATAREG(dstreg); ! 1896: uint32 quotient; ! 1897: ! 1898: if (srcdata == 0) { ! 1899: reg68k_vector(V_ZERO, PC+2); ! 1900: return; ! 1901: } ! 1902: quotient = dstdata / srcdata; ! 1903: if ((quotient & 0xffff0000) == 0) { ! 1904: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1905: } ! 1906: PC+= 2; ! 1907: } ! 1908: ! 1909: void cpu_op_1121b(t_ipc *ipc) /* DIVU */ { ! 1910: /* mask f1f8, bits 80e0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1911: int srcreg = (ipc->opcode >> 0) & 7; ! 1912: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1913: uint16 srcdata = fetchword(srcaddr); ! 1914: int dstreg = (ipc->opcode >> 9) & 7; ! 1915: uint32 dstdata = DATAREG(dstreg); ! 1916: uint32 quotient; ! 1917: ! 1918: if (srcdata == 0) { ! 1919: reg68k_vector(V_ZERO, PC+2); ! 1920: return; ! 1921: } ! 1922: quotient = dstdata / srcdata; ! 1923: if ((quotient & 0xffff0000) == 0) { ! 1924: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1925: VFLAG = 0; ! 1926: NFLAG = ((sint16)quotient) < 0; ! 1927: ZFLAG = !((uint16)quotient); ! 1928: } else { ! 1929: VFLAG = 1; ! 1930: NFLAG = 1; ! 1931: } ! 1932: CFLAG = 0; ! 1933: PC+= 2; ! 1934: } ! 1935: ! 1936: void cpu_op_1122a(t_ipc *ipc) /* DIVU */ { ! 1937: /* mask f1f8, bits 80e8, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1938: int srcreg = (ipc->opcode >> 0) & 7; ! 1939: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1940: uint16 srcdata = fetchword(srcaddr); ! 1941: int dstreg = (ipc->opcode >> 9) & 7; ! 1942: uint32 dstdata = DATAREG(dstreg); ! 1943: uint32 quotient; ! 1944: ! 1945: if (srcdata == 0) { ! 1946: reg68k_vector(V_ZERO, PC+4); ! 1947: return; ! 1948: } ! 1949: quotient = dstdata / srcdata; ! 1950: if ((quotient & 0xffff0000) == 0) { ! 1951: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1952: } ! 1953: PC+= 4; ! 1954: } ! 1955: ! 1956: void cpu_op_1122b(t_ipc *ipc) /* DIVU */ { ! 1957: /* mask f1f8, bits 80e8, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1958: int srcreg = (ipc->opcode >> 0) & 7; ! 1959: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1960: uint16 srcdata = fetchword(srcaddr); ! 1961: int dstreg = (ipc->opcode >> 9) & 7; ! 1962: uint32 dstdata = DATAREG(dstreg); ! 1963: uint32 quotient; ! 1964: ! 1965: if (srcdata == 0) { ! 1966: reg68k_vector(V_ZERO, PC+4); ! 1967: return; ! 1968: } ! 1969: quotient = dstdata / srcdata; ! 1970: if ((quotient & 0xffff0000) == 0) { ! 1971: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1972: VFLAG = 0; ! 1973: NFLAG = ((sint16)quotient) < 0; ! 1974: ZFLAG = !((uint16)quotient); ! 1975: } else { ! 1976: VFLAG = 1; ! 1977: NFLAG = 1; ! 1978: } ! 1979: CFLAG = 0; ! 1980: PC+= 4; ! 1981: } ! 1982: ! 1983: void cpu_op_1123a(t_ipc *ipc) /* DIVU */ { ! 1984: /* mask f1f8, bits 80f0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1985: int srcreg = (ipc->opcode >> 0) & 7; ! 1986: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1987: uint16 srcdata = fetchword(srcaddr); ! 1988: int dstreg = (ipc->opcode >> 9) & 7; ! 1989: uint32 dstdata = DATAREG(dstreg); ! 1990: uint32 quotient; ! 1991: ! 1992: if (srcdata == 0) { ! 1993: reg68k_vector(V_ZERO, PC+4); ! 1994: return; ! 1995: } ! 1996: quotient = dstdata / srcdata; ! 1997: if ((quotient & 0xffff0000) == 0) { ! 1998: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 1999: } ! 2000: PC+= 4; ! 2001: } ! 2002: ! 2003: void cpu_op_1123b(t_ipc *ipc) /* DIVU */ { ! 2004: /* mask f1f8, bits 80f0, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2005: int srcreg = (ipc->opcode >> 0) & 7; ! 2006: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 2007: uint16 srcdata = fetchword(srcaddr); ! 2008: int dstreg = (ipc->opcode >> 9) & 7; ! 2009: uint32 dstdata = DATAREG(dstreg); ! 2010: uint32 quotient; ! 2011: ! 2012: if (srcdata == 0) { ! 2013: reg68k_vector(V_ZERO, PC+4); ! 2014: return; ! 2015: } ! 2016: quotient = dstdata / srcdata; ! 2017: if ((quotient & 0xffff0000) == 0) { ! 2018: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2019: VFLAG = 0; ! 2020: NFLAG = ((sint16)quotient) < 0; ! 2021: ZFLAG = !((uint16)quotient); ! 2022: } else { ! 2023: VFLAG = 1; ! 2024: NFLAG = 1; ! 2025: } ! 2026: CFLAG = 0; ! 2027: PC+= 4; ! 2028: } ! 2029: ! 2030: void cpu_op_1124a(t_ipc *ipc) /* DIVU */ { ! 2031: /* mask f1ff, bits 80f8, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2032: uint32 srcaddr = ipc->src; ! 2033: uint16 srcdata = fetchword(srcaddr); ! 2034: int dstreg = (ipc->opcode >> 9) & 7; ! 2035: uint32 dstdata = DATAREG(dstreg); ! 2036: uint32 quotient; ! 2037: ! 2038: if (srcdata == 0) { ! 2039: reg68k_vector(V_ZERO, PC+4); ! 2040: return; ! 2041: } ! 2042: quotient = dstdata / srcdata; ! 2043: if ((quotient & 0xffff0000) == 0) { ! 2044: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2045: } ! 2046: PC+= 4; ! 2047: } ! 2048: ! 2049: void cpu_op_1124b(t_ipc *ipc) /* DIVU */ { ! 2050: /* mask f1ff, bits 80f8, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2051: uint32 srcaddr = ipc->src; ! 2052: uint16 srcdata = fetchword(srcaddr); ! 2053: int dstreg = (ipc->opcode >> 9) & 7; ! 2054: uint32 dstdata = DATAREG(dstreg); ! 2055: uint32 quotient; ! 2056: ! 2057: if (srcdata == 0) { ! 2058: reg68k_vector(V_ZERO, PC+4); ! 2059: return; ! 2060: } ! 2061: quotient = dstdata / srcdata; ! 2062: if ((quotient & 0xffff0000) == 0) { ! 2063: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2064: VFLAG = 0; ! 2065: NFLAG = ((sint16)quotient) < 0; ! 2066: ZFLAG = !((uint16)quotient); ! 2067: } else { ! 2068: VFLAG = 1; ! 2069: NFLAG = 1; ! 2070: } ! 2071: CFLAG = 0; ! 2072: PC+= 4; ! 2073: } ! 2074: ! 2075: void cpu_op_1125a(t_ipc *ipc) /* DIVU */ { ! 2076: /* mask f1ff, bits 80f9, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2077: uint32 srcaddr = ipc->src; ! 2078: uint16 srcdata = fetchword(srcaddr); ! 2079: int dstreg = (ipc->opcode >> 9) & 7; ! 2080: uint32 dstdata = DATAREG(dstreg); ! 2081: uint32 quotient; ! 2082: ! 2083: if (srcdata == 0) { ! 2084: reg68k_vector(V_ZERO, PC+6); ! 2085: return; ! 2086: } ! 2087: quotient = dstdata / srcdata; ! 2088: if ((quotient & 0xffff0000) == 0) { ! 2089: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2090: } ! 2091: PC+= 6; ! 2092: } ! 2093: ! 2094: void cpu_op_1125b(t_ipc *ipc) /* DIVU */ { ! 2095: /* mask f1ff, bits 80f9, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2096: uint32 srcaddr = ipc->src; ! 2097: uint16 srcdata = fetchword(srcaddr); ! 2098: int dstreg = (ipc->opcode >> 9) & 7; ! 2099: uint32 dstdata = DATAREG(dstreg); ! 2100: uint32 quotient; ! 2101: ! 2102: if (srcdata == 0) { ! 2103: reg68k_vector(V_ZERO, PC+6); ! 2104: return; ! 2105: } ! 2106: quotient = dstdata / srcdata; ! 2107: if ((quotient & 0xffff0000) == 0) { ! 2108: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2109: VFLAG = 0; ! 2110: NFLAG = ((sint16)quotient) < 0; ! 2111: ZFLAG = !((uint16)quotient); ! 2112: } else { ! 2113: VFLAG = 1; ! 2114: NFLAG = 1; ! 2115: } ! 2116: CFLAG = 0; ! 2117: PC+= 6; ! 2118: } ! 2119: ! 2120: void cpu_op_1126a(t_ipc *ipc) /* DIVU */ { ! 2121: /* mask f1ff, bits 80fa, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2122: uint32 srcaddr = ipc->src; ! 2123: uint16 srcdata = fetchword(srcaddr); ! 2124: int dstreg = (ipc->opcode >> 9) & 7; ! 2125: uint32 dstdata = DATAREG(dstreg); ! 2126: uint32 quotient; ! 2127: ! 2128: if (srcdata == 0) { ! 2129: reg68k_vector(V_ZERO, PC+4); ! 2130: return; ! 2131: } ! 2132: quotient = dstdata / srcdata; ! 2133: if ((quotient & 0xffff0000) == 0) { ! 2134: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2135: } ! 2136: PC+= 4; ! 2137: } ! 2138: ! 2139: void cpu_op_1126b(t_ipc *ipc) /* DIVU */ { ! 2140: /* mask f1ff, bits 80fa, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2141: uint32 srcaddr = ipc->src; ! 2142: uint16 srcdata = fetchword(srcaddr); ! 2143: int dstreg = (ipc->opcode >> 9) & 7; ! 2144: uint32 dstdata = DATAREG(dstreg); ! 2145: uint32 quotient; ! 2146: ! 2147: if (srcdata == 0) { ! 2148: reg68k_vector(V_ZERO, PC+4); ! 2149: return; ! 2150: } ! 2151: quotient = dstdata / srcdata; ! 2152: if ((quotient & 0xffff0000) == 0) { ! 2153: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2154: VFLAG = 0; ! 2155: NFLAG = ((sint16)quotient) < 0; ! 2156: ZFLAG = !((uint16)quotient); ! 2157: } else { ! 2158: VFLAG = 1; ! 2159: NFLAG = 1; ! 2160: } ! 2161: CFLAG = 0; ! 2162: PC+= 4; ! 2163: } ! 2164: ! 2165: void cpu_op_1127a(t_ipc *ipc) /* DIVU */ { ! 2166: /* mask f1ff, bits 80fb, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2167: uint32 srcaddr = idxval_src(ipc); ! 2168: uint16 srcdata = fetchword(srcaddr); ! 2169: int dstreg = (ipc->opcode >> 9) & 7; ! 2170: uint32 dstdata = DATAREG(dstreg); ! 2171: uint32 quotient; ! 2172: ! 2173: if (srcdata == 0) { ! 2174: reg68k_vector(V_ZERO, PC+4); ! 2175: return; ! 2176: } ! 2177: quotient = dstdata / srcdata; ! 2178: if ((quotient & 0xffff0000) == 0) { ! 2179: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2180: } ! 2181: PC+= 4; ! 2182: } ! 2183: ! 2184: void cpu_op_1127b(t_ipc *ipc) /* DIVU */ { ! 2185: /* mask f1ff, bits 80fb, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2186: uint32 srcaddr = idxval_src(ipc); ! 2187: uint16 srcdata = fetchword(srcaddr); ! 2188: int dstreg = (ipc->opcode >> 9) & 7; ! 2189: uint32 dstdata = DATAREG(dstreg); ! 2190: uint32 quotient; ! 2191: ! 2192: if (srcdata == 0) { ! 2193: reg68k_vector(V_ZERO, PC+4); ! 2194: return; ! 2195: } ! 2196: quotient = dstdata / srcdata; ! 2197: if ((quotient & 0xffff0000) == 0) { ! 2198: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2199: VFLAG = 0; ! 2200: NFLAG = ((sint16)quotient) < 0; ! 2201: ZFLAG = !((uint16)quotient); ! 2202: } else { ! 2203: VFLAG = 1; ! 2204: NFLAG = 1; ! 2205: } ! 2206: CFLAG = 0; ! 2207: PC+= 4; ! 2208: } ! 2209: ! 2210: void cpu_op_1128a(t_ipc *ipc) /* DIVU */ { ! 2211: /* mask f1ff, bits 80fc, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2212: uint16 srcdata = ipc->src; ! 2213: int dstreg = (ipc->opcode >> 9) & 7; ! 2214: uint32 dstdata = DATAREG(dstreg); ! 2215: uint32 quotient; ! 2216: ! 2217: if (srcdata == 0) { ! 2218: reg68k_vector(V_ZERO, PC+4); ! 2219: return; ! 2220: } ! 2221: quotient = dstdata / srcdata; ! 2222: if ((quotient & 0xffff0000) == 0) { ! 2223: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2224: } ! 2225: PC+= 4; ! 2226: } ! 2227: ! 2228: void cpu_op_1128b(t_ipc *ipc) /* DIVU */ { ! 2229: /* mask f1ff, bits 80fc, mnemonic 64, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2230: uint16 srcdata = ipc->src; ! 2231: int dstreg = (ipc->opcode >> 9) & 7; ! 2232: uint32 dstdata = DATAREG(dstreg); ! 2233: uint32 quotient; ! 2234: ! 2235: if (srcdata == 0) { ! 2236: reg68k_vector(V_ZERO, PC+4); ! 2237: return; ! 2238: } ! 2239: quotient = dstdata / srcdata; ! 2240: if ((quotient & 0xffff0000) == 0) { ! 2241: DATAREG(dstreg) = quotient | (((uint16)(dstdata % srcdata))<<16); ! 2242: VFLAG = 0; ! 2243: NFLAG = ((sint16)quotient) < 0; ! 2244: ZFLAG = !((uint16)quotient); ! 2245: } else { ! 2246: VFLAG = 1; ! 2247: NFLAG = 1; ! 2248: } ! 2249: CFLAG = 0; ! 2250: PC+= 4; ! 2251: } ! 2252: ! 2253: void cpu_op_1129a(t_ipc *ipc) /* DIVS */ { ! 2254: /* mask f1f8, bits 81c0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2255: int srcreg = (ipc->opcode >> 0) & 7; ! 2256: uint16 srcdata = DATAREG(srcreg); ! 2257: int dstreg = (ipc->opcode >> 9) & 7; ! 2258: sint32 dstdata = DATAREG(dstreg); ! 2259: sint32 quotient; ! 2260: sint16 remainder; ! 2261: ! 2262: if (srcdata == 0) { ! 2263: reg68k_vector(V_ZERO, PC+2); ! 2264: return; ! 2265: } ! 2266: quotient = dstdata / (sint16)srcdata; ! 2267: remainder = dstdata % (sint16)srcdata; ! 2268: if (((quotient & 0xffff8000) == 0) || ! 2269: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2270: if ((quotient < 0) != (remainder < 0)) ! 2271: remainder = -remainder; ! 2272: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2273: } ! 2274: PC+= 2; ! 2275: } ! 2276: ! 2277: void cpu_op_1129b(t_ipc *ipc) /* DIVS */ { ! 2278: /* mask f1f8, bits 81c0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2279: int srcreg = (ipc->opcode >> 0) & 7; ! 2280: uint16 srcdata = DATAREG(srcreg); ! 2281: int dstreg = (ipc->opcode >> 9) & 7; ! 2282: sint32 dstdata = DATAREG(dstreg); ! 2283: sint32 quotient; ! 2284: sint16 remainder; ! 2285: ! 2286: if (srcdata == 0) { ! 2287: reg68k_vector(V_ZERO, PC+2); ! 2288: return; ! 2289: } ! 2290: quotient = dstdata / (sint16)srcdata; ! 2291: remainder = dstdata % (sint16)srcdata; ! 2292: if (((quotient & 0xffff8000) == 0) || ! 2293: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2294: if ((quotient < 0) != (remainder < 0)) ! 2295: remainder = -remainder; ! 2296: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2297: VFLAG = 0; ! 2298: NFLAG = ((sint16)quotient) < 0; ! 2299: ZFLAG = !((uint16)quotient); ! 2300: } else { ! 2301: VFLAG = 1; ! 2302: NFLAG = 1; ! 2303: } ! 2304: CFLAG = 0; ! 2305: PC+= 2; ! 2306: } ! 2307: ! 2308: void cpu_op_1130a(t_ipc *ipc) /* DIVS */ { ! 2309: /* mask f1f8, bits 81d0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2310: int srcreg = (ipc->opcode >> 0) & 7; ! 2311: uint32 srcaddr = ADDRREG(srcreg); ! 2312: uint16 srcdata = fetchword(srcaddr); ! 2313: int dstreg = (ipc->opcode >> 9) & 7; ! 2314: sint32 dstdata = DATAREG(dstreg); ! 2315: sint32 quotient; ! 2316: sint16 remainder; ! 2317: ! 2318: if (srcdata == 0) { ! 2319: reg68k_vector(V_ZERO, PC+2); ! 2320: return; ! 2321: } ! 2322: quotient = dstdata / (sint16)srcdata; ! 2323: remainder = dstdata % (sint16)srcdata; ! 2324: if (((quotient & 0xffff8000) == 0) || ! 2325: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2326: if ((quotient < 0) != (remainder < 0)) ! 2327: remainder = -remainder; ! 2328: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2329: } ! 2330: PC+= 2; ! 2331: } ! 2332: ! 2333: void cpu_op_1130b(t_ipc *ipc) /* DIVS */ { ! 2334: /* mask f1f8, bits 81d0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2335: int srcreg = (ipc->opcode >> 0) & 7; ! 2336: uint32 srcaddr = ADDRREG(srcreg); ! 2337: uint16 srcdata = fetchword(srcaddr); ! 2338: int dstreg = (ipc->opcode >> 9) & 7; ! 2339: sint32 dstdata = DATAREG(dstreg); ! 2340: sint32 quotient; ! 2341: sint16 remainder; ! 2342: ! 2343: if (srcdata == 0) { ! 2344: reg68k_vector(V_ZERO, PC+2); ! 2345: return; ! 2346: } ! 2347: quotient = dstdata / (sint16)srcdata; ! 2348: remainder = dstdata % (sint16)srcdata; ! 2349: if (((quotient & 0xffff8000) == 0) || ! 2350: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2351: if ((quotient < 0) != (remainder < 0)) ! 2352: remainder = -remainder; ! 2353: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2354: VFLAG = 0; ! 2355: NFLAG = ((sint16)quotient) < 0; ! 2356: ZFLAG = !((uint16)quotient); ! 2357: } else { ! 2358: VFLAG = 1; ! 2359: NFLAG = 1; ! 2360: } ! 2361: CFLAG = 0; ! 2362: PC+= 2; ! 2363: } ! 2364: ! 2365: void cpu_op_1131a(t_ipc *ipc) /* DIVS */ { ! 2366: /* mask f1f8, bits 81d8, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2367: int srcreg = (ipc->opcode >> 0) & 7; ! 2368: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 2369: uint16 srcdata = fetchword(srcaddr); ! 2370: int dstreg = (ipc->opcode >> 9) & 7; ! 2371: sint32 dstdata = DATAREG(dstreg); ! 2372: sint32 quotient; ! 2373: sint16 remainder; ! 2374: ! 2375: if (srcdata == 0) { ! 2376: reg68k_vector(V_ZERO, PC+2); ! 2377: return; ! 2378: } ! 2379: quotient = dstdata / (sint16)srcdata; ! 2380: remainder = dstdata % (sint16)srcdata; ! 2381: if (((quotient & 0xffff8000) == 0) || ! 2382: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2383: if ((quotient < 0) != (remainder < 0)) ! 2384: remainder = -remainder; ! 2385: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2386: } ! 2387: PC+= 2; ! 2388: } ! 2389: ! 2390: void cpu_op_1131b(t_ipc *ipc) /* DIVS */ { ! 2391: /* mask f1f8, bits 81d8, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2392: int srcreg = (ipc->opcode >> 0) & 7; ! 2393: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 2394: uint16 srcdata = fetchword(srcaddr); ! 2395: int dstreg = (ipc->opcode >> 9) & 7; ! 2396: sint32 dstdata = DATAREG(dstreg); ! 2397: sint32 quotient; ! 2398: sint16 remainder; ! 2399: ! 2400: if (srcdata == 0) { ! 2401: reg68k_vector(V_ZERO, PC+2); ! 2402: return; ! 2403: } ! 2404: quotient = dstdata / (sint16)srcdata; ! 2405: remainder = dstdata % (sint16)srcdata; ! 2406: if (((quotient & 0xffff8000) == 0) || ! 2407: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2408: if ((quotient < 0) != (remainder < 0)) ! 2409: remainder = -remainder; ! 2410: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2411: VFLAG = 0; ! 2412: NFLAG = ((sint16)quotient) < 0; ! 2413: ZFLAG = !((uint16)quotient); ! 2414: } else { ! 2415: VFLAG = 1; ! 2416: NFLAG = 1; ! 2417: } ! 2418: CFLAG = 0; ! 2419: PC+= 2; ! 2420: } ! 2421: ! 2422: void cpu_op_1132a(t_ipc *ipc) /* DIVS */ { ! 2423: /* mask f1f8, bits 81e0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2424: int srcreg = (ipc->opcode >> 0) & 7; ! 2425: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 2426: uint16 srcdata = fetchword(srcaddr); ! 2427: int dstreg = (ipc->opcode >> 9) & 7; ! 2428: sint32 dstdata = DATAREG(dstreg); ! 2429: sint32 quotient; ! 2430: sint16 remainder; ! 2431: ! 2432: if (srcdata == 0) { ! 2433: reg68k_vector(V_ZERO, PC+2); ! 2434: return; ! 2435: } ! 2436: quotient = dstdata / (sint16)srcdata; ! 2437: remainder = dstdata % (sint16)srcdata; ! 2438: if (((quotient & 0xffff8000) == 0) || ! 2439: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2440: if ((quotient < 0) != (remainder < 0)) ! 2441: remainder = -remainder; ! 2442: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2443: } ! 2444: PC+= 2; ! 2445: } ! 2446: ! 2447: void cpu_op_1132b(t_ipc *ipc) /* DIVS */ { ! 2448: /* mask f1f8, bits 81e0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2449: int srcreg = (ipc->opcode >> 0) & 7; ! 2450: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 2451: uint16 srcdata = fetchword(srcaddr); ! 2452: int dstreg = (ipc->opcode >> 9) & 7; ! 2453: sint32 dstdata = DATAREG(dstreg); ! 2454: sint32 quotient; ! 2455: sint16 remainder; ! 2456: ! 2457: if (srcdata == 0) { ! 2458: reg68k_vector(V_ZERO, PC+2); ! 2459: return; ! 2460: } ! 2461: quotient = dstdata / (sint16)srcdata; ! 2462: remainder = dstdata % (sint16)srcdata; ! 2463: if (((quotient & 0xffff8000) == 0) || ! 2464: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2465: if ((quotient < 0) != (remainder < 0)) ! 2466: remainder = -remainder; ! 2467: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2468: VFLAG = 0; ! 2469: NFLAG = ((sint16)quotient) < 0; ! 2470: ZFLAG = !((uint16)quotient); ! 2471: } else { ! 2472: VFLAG = 1; ! 2473: NFLAG = 1; ! 2474: } ! 2475: CFLAG = 0; ! 2476: PC+= 2; ! 2477: } ! 2478: ! 2479: void cpu_op_1133a(t_ipc *ipc) /* DIVS */ { ! 2480: /* mask f1f8, bits 81e8, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2481: int srcreg = (ipc->opcode >> 0) & 7; ! 2482: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 2483: uint16 srcdata = fetchword(srcaddr); ! 2484: int dstreg = (ipc->opcode >> 9) & 7; ! 2485: sint32 dstdata = DATAREG(dstreg); ! 2486: sint32 quotient; ! 2487: sint16 remainder; ! 2488: ! 2489: if (srcdata == 0) { ! 2490: reg68k_vector(V_ZERO, PC+4); ! 2491: return; ! 2492: } ! 2493: quotient = dstdata / (sint16)srcdata; ! 2494: remainder = dstdata % (sint16)srcdata; ! 2495: if (((quotient & 0xffff8000) == 0) || ! 2496: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2497: if ((quotient < 0) != (remainder < 0)) ! 2498: remainder = -remainder; ! 2499: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2500: } ! 2501: PC+= 4; ! 2502: } ! 2503: ! 2504: void cpu_op_1133b(t_ipc *ipc) /* DIVS */ { ! 2505: /* mask f1f8, bits 81e8, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2506: int srcreg = (ipc->opcode >> 0) & 7; ! 2507: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 2508: uint16 srcdata = fetchword(srcaddr); ! 2509: int dstreg = (ipc->opcode >> 9) & 7; ! 2510: sint32 dstdata = DATAREG(dstreg); ! 2511: sint32 quotient; ! 2512: sint16 remainder; ! 2513: ! 2514: if (srcdata == 0) { ! 2515: reg68k_vector(V_ZERO, PC+4); ! 2516: return; ! 2517: } ! 2518: quotient = dstdata / (sint16)srcdata; ! 2519: remainder = dstdata % (sint16)srcdata; ! 2520: if (((quotient & 0xffff8000) == 0) || ! 2521: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2522: if ((quotient < 0) != (remainder < 0)) ! 2523: remainder = -remainder; ! 2524: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2525: VFLAG = 0; ! 2526: NFLAG = ((sint16)quotient) < 0; ! 2527: ZFLAG = !((uint16)quotient); ! 2528: } else { ! 2529: VFLAG = 1; ! 2530: NFLAG = 1; ! 2531: } ! 2532: CFLAG = 0; ! 2533: PC+= 4; ! 2534: } ! 2535: ! 2536: void cpu_op_1134a(t_ipc *ipc) /* DIVS */ { ! 2537: /* mask f1f8, bits 81f0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2538: int srcreg = (ipc->opcode >> 0) & 7; ! 2539: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 2540: uint16 srcdata = fetchword(srcaddr); ! 2541: int dstreg = (ipc->opcode >> 9) & 7; ! 2542: sint32 dstdata = DATAREG(dstreg); ! 2543: sint32 quotient; ! 2544: sint16 remainder; ! 2545: ! 2546: if (srcdata == 0) { ! 2547: reg68k_vector(V_ZERO, PC+4); ! 2548: return; ! 2549: } ! 2550: quotient = dstdata / (sint16)srcdata; ! 2551: remainder = dstdata % (sint16)srcdata; ! 2552: if (((quotient & 0xffff8000) == 0) || ! 2553: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2554: if ((quotient < 0) != (remainder < 0)) ! 2555: remainder = -remainder; ! 2556: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2557: } ! 2558: PC+= 4; ! 2559: } ! 2560: ! 2561: void cpu_op_1134b(t_ipc *ipc) /* DIVS */ { ! 2562: /* mask f1f8, bits 81f0, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2563: int srcreg = (ipc->opcode >> 0) & 7; ! 2564: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 2565: uint16 srcdata = fetchword(srcaddr); ! 2566: int dstreg = (ipc->opcode >> 9) & 7; ! 2567: sint32 dstdata = DATAREG(dstreg); ! 2568: sint32 quotient; ! 2569: sint16 remainder; ! 2570: ! 2571: if (srcdata == 0) { ! 2572: reg68k_vector(V_ZERO, PC+4); ! 2573: return; ! 2574: } ! 2575: quotient = dstdata / (sint16)srcdata; ! 2576: remainder = dstdata % (sint16)srcdata; ! 2577: if (((quotient & 0xffff8000) == 0) || ! 2578: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2579: if ((quotient < 0) != (remainder < 0)) ! 2580: remainder = -remainder; ! 2581: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2582: VFLAG = 0; ! 2583: NFLAG = ((sint16)quotient) < 0; ! 2584: ZFLAG = !((uint16)quotient); ! 2585: } else { ! 2586: VFLAG = 1; ! 2587: NFLAG = 1; ! 2588: } ! 2589: CFLAG = 0; ! 2590: PC+= 4; ! 2591: } ! 2592: ! 2593: void cpu_op_1135a(t_ipc *ipc) /* DIVS */ { ! 2594: /* mask f1ff, bits 81f8, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2595: uint32 srcaddr = ipc->src; ! 2596: uint16 srcdata = fetchword(srcaddr); ! 2597: int dstreg = (ipc->opcode >> 9) & 7; ! 2598: sint32 dstdata = DATAREG(dstreg); ! 2599: sint32 quotient; ! 2600: sint16 remainder; ! 2601: ! 2602: if (srcdata == 0) { ! 2603: reg68k_vector(V_ZERO, PC+4); ! 2604: return; ! 2605: } ! 2606: quotient = dstdata / (sint16)srcdata; ! 2607: remainder = dstdata % (sint16)srcdata; ! 2608: if (((quotient & 0xffff8000) == 0) || ! 2609: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2610: if ((quotient < 0) != (remainder < 0)) ! 2611: remainder = -remainder; ! 2612: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2613: } ! 2614: PC+= 4; ! 2615: } ! 2616: ! 2617: void cpu_op_1135b(t_ipc *ipc) /* DIVS */ { ! 2618: /* mask f1ff, bits 81f8, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2619: uint32 srcaddr = ipc->src; ! 2620: uint16 srcdata = fetchword(srcaddr); ! 2621: int dstreg = (ipc->opcode >> 9) & 7; ! 2622: sint32 dstdata = DATAREG(dstreg); ! 2623: sint32 quotient; ! 2624: sint16 remainder; ! 2625: ! 2626: if (srcdata == 0) { ! 2627: reg68k_vector(V_ZERO, PC+4); ! 2628: return; ! 2629: } ! 2630: quotient = dstdata / (sint16)srcdata; ! 2631: remainder = dstdata % (sint16)srcdata; ! 2632: if (((quotient & 0xffff8000) == 0) || ! 2633: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2634: if ((quotient < 0) != (remainder < 0)) ! 2635: remainder = -remainder; ! 2636: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2637: VFLAG = 0; ! 2638: NFLAG = ((sint16)quotient) < 0; ! 2639: ZFLAG = !((uint16)quotient); ! 2640: } else { ! 2641: VFLAG = 1; ! 2642: NFLAG = 1; ! 2643: } ! 2644: CFLAG = 0; ! 2645: PC+= 4; ! 2646: } ! 2647: ! 2648: void cpu_op_1136a(t_ipc *ipc) /* DIVS */ { ! 2649: /* mask f1ff, bits 81f9, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2650: uint32 srcaddr = ipc->src; ! 2651: uint16 srcdata = fetchword(srcaddr); ! 2652: int dstreg = (ipc->opcode >> 9) & 7; ! 2653: sint32 dstdata = DATAREG(dstreg); ! 2654: sint32 quotient; ! 2655: sint16 remainder; ! 2656: ! 2657: if (srcdata == 0) { ! 2658: reg68k_vector(V_ZERO, PC+6); ! 2659: return; ! 2660: } ! 2661: quotient = dstdata / (sint16)srcdata; ! 2662: remainder = dstdata % (sint16)srcdata; ! 2663: if (((quotient & 0xffff8000) == 0) || ! 2664: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2665: if ((quotient < 0) != (remainder < 0)) ! 2666: remainder = -remainder; ! 2667: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2668: } ! 2669: PC+= 6; ! 2670: } ! 2671: ! 2672: void cpu_op_1136b(t_ipc *ipc) /* DIVS */ { ! 2673: /* mask f1ff, bits 81f9, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2674: uint32 srcaddr = ipc->src; ! 2675: uint16 srcdata = fetchword(srcaddr); ! 2676: int dstreg = (ipc->opcode >> 9) & 7; ! 2677: sint32 dstdata = DATAREG(dstreg); ! 2678: sint32 quotient; ! 2679: sint16 remainder; ! 2680: ! 2681: if (srcdata == 0) { ! 2682: reg68k_vector(V_ZERO, PC+6); ! 2683: return; ! 2684: } ! 2685: quotient = dstdata / (sint16)srcdata; ! 2686: remainder = dstdata % (sint16)srcdata; ! 2687: if (((quotient & 0xffff8000) == 0) || ! 2688: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2689: if ((quotient < 0) != (remainder < 0)) ! 2690: remainder = -remainder; ! 2691: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2692: VFLAG = 0; ! 2693: NFLAG = ((sint16)quotient) < 0; ! 2694: ZFLAG = !((uint16)quotient); ! 2695: } else { ! 2696: VFLAG = 1; ! 2697: NFLAG = 1; ! 2698: } ! 2699: CFLAG = 0; ! 2700: PC+= 6; ! 2701: } ! 2702: ! 2703: void cpu_op_1137a(t_ipc *ipc) /* DIVS */ { ! 2704: /* mask f1ff, bits 81fa, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2705: uint32 srcaddr = ipc->src; ! 2706: uint16 srcdata = fetchword(srcaddr); ! 2707: int dstreg = (ipc->opcode >> 9) & 7; ! 2708: sint32 dstdata = DATAREG(dstreg); ! 2709: sint32 quotient; ! 2710: sint16 remainder; ! 2711: ! 2712: if (srcdata == 0) { ! 2713: reg68k_vector(V_ZERO, PC+4); ! 2714: return; ! 2715: } ! 2716: quotient = dstdata / (sint16)srcdata; ! 2717: remainder = dstdata % (sint16)srcdata; ! 2718: if (((quotient & 0xffff8000) == 0) || ! 2719: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2720: if ((quotient < 0) != (remainder < 0)) ! 2721: remainder = -remainder; ! 2722: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2723: } ! 2724: PC+= 4; ! 2725: } ! 2726: ! 2727: void cpu_op_1137b(t_ipc *ipc) /* DIVS */ { ! 2728: /* mask f1ff, bits 81fa, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2729: uint32 srcaddr = ipc->src; ! 2730: uint16 srcdata = fetchword(srcaddr); ! 2731: int dstreg = (ipc->opcode >> 9) & 7; ! 2732: sint32 dstdata = DATAREG(dstreg); ! 2733: sint32 quotient; ! 2734: sint16 remainder; ! 2735: ! 2736: if (srcdata == 0) { ! 2737: reg68k_vector(V_ZERO, PC+4); ! 2738: return; ! 2739: } ! 2740: quotient = dstdata / (sint16)srcdata; ! 2741: remainder = dstdata % (sint16)srcdata; ! 2742: if (((quotient & 0xffff8000) == 0) || ! 2743: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2744: if ((quotient < 0) != (remainder < 0)) ! 2745: remainder = -remainder; ! 2746: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2747: VFLAG = 0; ! 2748: NFLAG = ((sint16)quotient) < 0; ! 2749: ZFLAG = !((uint16)quotient); ! 2750: } else { ! 2751: VFLAG = 1; ! 2752: NFLAG = 1; ! 2753: } ! 2754: CFLAG = 0; ! 2755: PC+= 4; ! 2756: } ! 2757: ! 2758: void cpu_op_1138a(t_ipc *ipc) /* DIVS */ { ! 2759: /* mask f1ff, bits 81fb, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2760: uint32 srcaddr = idxval_src(ipc); ! 2761: uint16 srcdata = fetchword(srcaddr); ! 2762: int dstreg = (ipc->opcode >> 9) & 7; ! 2763: sint32 dstdata = DATAREG(dstreg); ! 2764: sint32 quotient; ! 2765: sint16 remainder; ! 2766: ! 2767: if (srcdata == 0) { ! 2768: reg68k_vector(V_ZERO, PC+4); ! 2769: return; ! 2770: } ! 2771: quotient = dstdata / (sint16)srcdata; ! 2772: remainder = dstdata % (sint16)srcdata; ! 2773: if (((quotient & 0xffff8000) == 0) || ! 2774: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2775: if ((quotient < 0) != (remainder < 0)) ! 2776: remainder = -remainder; ! 2777: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2778: } ! 2779: PC+= 4; ! 2780: } ! 2781: ! 2782: void cpu_op_1138b(t_ipc *ipc) /* DIVS */ { ! 2783: /* mask f1ff, bits 81fb, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2784: uint32 srcaddr = idxval_src(ipc); ! 2785: uint16 srcdata = fetchword(srcaddr); ! 2786: int dstreg = (ipc->opcode >> 9) & 7; ! 2787: sint32 dstdata = DATAREG(dstreg); ! 2788: sint32 quotient; ! 2789: sint16 remainder; ! 2790: ! 2791: if (srcdata == 0) { ! 2792: reg68k_vector(V_ZERO, PC+4); ! 2793: return; ! 2794: } ! 2795: quotient = dstdata / (sint16)srcdata; ! 2796: remainder = dstdata % (sint16)srcdata; ! 2797: if (((quotient & 0xffff8000) == 0) || ! 2798: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2799: if ((quotient < 0) != (remainder < 0)) ! 2800: remainder = -remainder; ! 2801: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2802: VFLAG = 0; ! 2803: NFLAG = ((sint16)quotient) < 0; ! 2804: ZFLAG = !((uint16)quotient); ! 2805: } else { ! 2806: VFLAG = 1; ! 2807: NFLAG = 1; ! 2808: } ! 2809: CFLAG = 0; ! 2810: PC+= 4; ! 2811: } ! 2812: ! 2813: void cpu_op_1139a(t_ipc *ipc) /* DIVS */ { ! 2814: /* mask f1ff, bits 81fc, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2815: uint16 srcdata = ipc->src; ! 2816: int dstreg = (ipc->opcode >> 9) & 7; ! 2817: sint32 dstdata = DATAREG(dstreg); ! 2818: sint32 quotient; ! 2819: sint16 remainder; ! 2820: ! 2821: if (srcdata == 0) { ! 2822: reg68k_vector(V_ZERO, PC+4); ! 2823: return; ! 2824: } ! 2825: quotient = dstdata / (sint16)srcdata; ! 2826: remainder = dstdata % (sint16)srcdata; ! 2827: if (((quotient & 0xffff8000) == 0) || ! 2828: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2829: if ((quotient < 0) != (remainder < 0)) ! 2830: remainder = -remainder; ! 2831: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2832: } ! 2833: PC+= 4; ! 2834: } ! 2835: ! 2836: void cpu_op_1139b(t_ipc *ipc) /* DIVS */ { ! 2837: /* mask f1ff, bits 81fc, mnemonic 65, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2838: uint16 srcdata = ipc->src; ! 2839: int dstreg = (ipc->opcode >> 9) & 7; ! 2840: sint32 dstdata = DATAREG(dstreg); ! 2841: sint32 quotient; ! 2842: sint16 remainder; ! 2843: ! 2844: if (srcdata == 0) { ! 2845: reg68k_vector(V_ZERO, PC+4); ! 2846: return; ! 2847: } ! 2848: quotient = dstdata / (sint16)srcdata; ! 2849: remainder = dstdata % (sint16)srcdata; ! 2850: if (((quotient & 0xffff8000) == 0) || ! 2851: ((quotient & 0xffff8000) == 0xffff8000)) { ! 2852: if ((quotient < 0) != (remainder < 0)) ! 2853: remainder = -remainder; ! 2854: DATAREG(dstreg) = ((uint16)quotient) | (((uint16)(remainder))<<16); ! 2855: VFLAG = 0; ! 2856: NFLAG = ((sint16)quotient) < 0; ! 2857: ZFLAG = !((uint16)quotient); ! 2858: } else { ! 2859: VFLAG = 1; ! 2860: NFLAG = 1; ! 2861: } ! 2862: CFLAG = 0; ! 2863: PC+= 4; ! 2864: } ! 2865: ! 2866: void cpu_op_1140a(t_ipc *ipc) /* SBCD */ { ! 2867: /* mask f1f8, bits 8100, mnemonic 36, priv 0, endblk 0, imm_notzero 0, used 5 set -11, size 1, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2868: int srcreg = (ipc->opcode >> 0) & 7; ! 2869: uint8 srcdata = DATAREG(srcreg); ! 2870: int dstreg = (ipc->opcode >> 9) & 7; ! 2871: uint8 dstdata = DATAREG(dstreg); ! 2872: uint8 outdata; ! 2873: ! 2874: sint8 outdata_low = (sint8)(dstdata & 0xF) -(sint8)(srcdata & 0xF) - XFLAG; ! 2875: sint8 outdata_high = (sint8)(dstdata>>4) - (sint8)(srcdata>>4); ! 2876: ! 2877: if (outdata_low < 0) { ! 2878: outdata_low+=10; outdata_high--; ! 2879: } ! 2880: if (outdata_high < 0) { ! 2881: outdata_high+=10; ! 2882: } else { ! 2883: } ! 2884: outdata = (uint8)outdata_low | ((uint8)outdata_high << 4); ! 2885: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 2886: PC+= 2; ! 2887: } ! 2888: ! 2889: void cpu_op_1140b(t_ipc *ipc) /* SBCD */ { ! 2890: /* mask f1f8, bits 8100, mnemonic 36, priv 0, endblk 0, imm_notzero 0, used 5 set -11, size 1, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2891: int srcreg = (ipc->opcode >> 0) & 7; ! 2892: uint8 srcdata = DATAREG(srcreg); ! 2893: int dstreg = (ipc->opcode >> 9) & 7; ! 2894: uint8 dstdata = DATAREG(dstreg); ! 2895: uint8 outdata; ! 2896: ! 2897: sint8 outdata_low = (sint8)(dstdata & 0xF) -(sint8)(srcdata & 0xF) - XFLAG; ! 2898: sint8 outdata_high = (sint8)(dstdata>>4) - (sint8)(srcdata>>4); ! 2899: ! 2900: if (outdata_low < 0) { ! 2901: outdata_low+=10; outdata_high--; ! 2902: } ! 2903: if (outdata_high < 0) { ! 2904: outdata_high+=10; ! 2905: CFLAG = 1; ! 2906: XFLAG = 1; ! 2907: } else { ! 2908: CFLAG = 0; ! 2909: XFLAG = 0; ! 2910: } ! 2911: outdata = (uint8)outdata_low | ((uint8)outdata_high << 4); ! 2912: if (outdata) ZFLAG = 0; ! 2913: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 2914: PC+= 2; ! 2915: } ! 2916: ! 2917: void cpu_op_1141a(t_ipc *ipc) /* SBCD */ { ! 2918: /* mask f1f8, bits 8108, mnemonic 36, priv 0, endblk 0, imm_notzero 0, used 5 set -11, size 1, stype 4, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2919: int srcreg = (ipc->opcode >> 0) & 7; ! 2920: uint32 srcaddr = (ADDRREG(srcreg)-= (srcreg == 7 ? 2 : 1)); ! 2921: uint8 srcdata = fetchbyte(srcaddr); ! 2922: int dstreg = (ipc->opcode >> 9) & 7; ! 2923: uint32 dstaddr = (ADDRREG(dstreg)-= (dstreg == 7 ? 2 : 1)); ! 2924: uint8 dstdata = fetchbyte(dstaddr); ! 2925: uint8 outdata; ! 2926: ! 2927: sint8 outdata_low = (sint8)(dstdata & 0xF) -(sint8)(srcdata & 0xF) - XFLAG; ! 2928: sint8 outdata_high = (sint8)(dstdata>>4) - (sint8)(srcdata>>4); ! 2929: ! 2930: if (outdata_low < 0) { ! 2931: outdata_low+=10; outdata_high--; ! 2932: } ! 2933: if (outdata_high < 0) { ! 2934: outdata_high+=10; ! 2935: } else { ! 2936: } ! 2937: outdata = (uint8)outdata_low | ((uint8)outdata_high << 4); ! 2938: storebyte(dstaddr, outdata); ! 2939: PC+= 2; ! 2940: } ! 2941: ! 2942: void cpu_op_1141b(t_ipc *ipc) /* SBCD */ { ! 2943: /* mask f1f8, bits 8108, mnemonic 36, priv 0, endblk 0, imm_notzero 0, used 5 set -11, size 1, stype 4, dtype 4, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2944: int srcreg = (ipc->opcode >> 0) & 7; ! 2945: uint32 srcaddr = (ADDRREG(srcreg)-= (srcreg == 7 ? 2 : 1)); ! 2946: uint8 srcdata = fetchbyte(srcaddr); ! 2947: int dstreg = (ipc->opcode >> 9) & 7; ! 2948: uint32 dstaddr = (ADDRREG(dstreg)-= (dstreg == 7 ? 2 : 1)); ! 2949: uint8 dstdata = fetchbyte(dstaddr); ! 2950: uint8 outdata; ! 2951: ! 2952: sint8 outdata_low = (sint8)(dstdata & 0xF) -(sint8)(srcdata & 0xF) - XFLAG; ! 2953: sint8 outdata_high = (sint8)(dstdata>>4) - (sint8)(srcdata>>4); ! 2954: ! 2955: if (outdata_low < 0) { ! 2956: outdata_low+=10; outdata_high--; ! 2957: } ! 2958: if (outdata_high < 0) { ! 2959: outdata_high+=10; ! 2960: CFLAG = 1; ! 2961: XFLAG = 1; ! 2962: } else { ! 2963: CFLAG = 0; ! 2964: XFLAG = 0; ! 2965: } ! 2966: outdata = (uint8)outdata_low | ((uint8)outdata_high << 4); ! 2967: if (outdata) ZFLAG = 0; ! 2968: storebyte(dstaddr, outdata); ! 2969: PC+= 2; ! 2970: } ! 2971:
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