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1.1 ! root 1: /*****************************************************************************/ ! 2: /* Generator - Sega Genesis emulation - (c) James Ponder 1997-1998 */ ! 3: /*****************************************************************************/ ! 4: /* */ ! 5: /* cpu68k-b.c */ ! 6: /* */ ! 7: /*****************************************************************************/ ! 8: ! 9: #include "generator.h" ! 10: #include "cpu68k.h" ! 11: #include "mem68k.h" ! 12: #include "reg68k.h" ! 13: ! 14: #include "cpu68k-inline.h" ! 15: ! 16: #include <stdio.h> ! 17: ! 18: void cpu_op_1229a(t_ipc *ipc) /* CMP */ { ! 19: /* mask f1f8, bits b000, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 20: int srcreg = (ipc->opcode >> 0) & 7; ! 21: uint8 srcdata = DATAREG(srcreg); ! 22: int dstreg = (ipc->opcode >> 9) & 7; ! 23: uint8 dstdata = DATAREG(dstreg); ! 24: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 25: PC+= 2; ! 26: } ! 27: ! 28: void cpu_op_1229b(t_ipc *ipc) /* CMP */ { ! 29: /* mask f1f8, bits b000, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 30: int srcreg = (ipc->opcode >> 0) & 7; ! 31: uint8 srcdata = DATAREG(srcreg); ! 32: int dstreg = (ipc->opcode >> 9) & 7; ! 33: uint8 dstdata = DATAREG(dstreg); ! 34: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 35: ! 36: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 37: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 38: CFLAG = srcdata > dstdata; ! 39: NFLAG = ((sint8)outdata) < 0; ! 40: ZFLAG = !outdata; ! 41: PC+= 2; ! 42: } ! 43: ! 44: void cpu_op_1230a(t_ipc *ipc) /* CMP */ { ! 45: /* mask f1f8, bits b008, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 46: int srcreg = (ipc->opcode >> 0) & 7; ! 47: uint8 srcdata = ADDRREG(srcreg); ! 48: int dstreg = (ipc->opcode >> 9) & 7; ! 49: uint8 dstdata = DATAREG(dstreg); ! 50: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 51: PC+= 2; ! 52: } ! 53: ! 54: void cpu_op_1230b(t_ipc *ipc) /* CMP */ { ! 55: /* mask f1f8, bits b008, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 56: int srcreg = (ipc->opcode >> 0) & 7; ! 57: uint8 srcdata = ADDRREG(srcreg); ! 58: int dstreg = (ipc->opcode >> 9) & 7; ! 59: uint8 dstdata = DATAREG(dstreg); ! 60: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 61: ! 62: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 63: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 64: CFLAG = srcdata > dstdata; ! 65: NFLAG = ((sint8)outdata) < 0; ! 66: ZFLAG = !outdata; ! 67: PC+= 2; ! 68: } ! 69: ! 70: void cpu_op_1231a(t_ipc *ipc) /* CMP */ { ! 71: /* mask f1f8, bits b010, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 72: int srcreg = (ipc->opcode >> 0) & 7; ! 73: uint32 srcaddr = ADDRREG(srcreg); ! 74: uint8 srcdata = fetchbyte(srcaddr); ! 75: int dstreg = (ipc->opcode >> 9) & 7; ! 76: uint8 dstdata = DATAREG(dstreg); ! 77: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 78: PC+= 2; ! 79: } ! 80: ! 81: void cpu_op_1231b(t_ipc *ipc) /* CMP */ { ! 82: /* mask f1f8, bits b010, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 83: int srcreg = (ipc->opcode >> 0) & 7; ! 84: uint32 srcaddr = ADDRREG(srcreg); ! 85: uint8 srcdata = fetchbyte(srcaddr); ! 86: int dstreg = (ipc->opcode >> 9) & 7; ! 87: uint8 dstdata = DATAREG(dstreg); ! 88: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 89: ! 90: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 91: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 92: CFLAG = srcdata > dstdata; ! 93: NFLAG = ((sint8)outdata) < 0; ! 94: ZFLAG = !outdata; ! 95: PC+= 2; ! 96: } ! 97: ! 98: void cpu_op_1232a(t_ipc *ipc) /* CMP */ { ! 99: /* mask f1f8, bits b018, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 100: int srcreg = (ipc->opcode >> 0) & 7; ! 101: uint32 srcaddr = ADDRREG(srcreg); ! 102: uint32 srcaddr_tmp = (ADDRREG(srcreg)+= (srcreg == 7 ? 2 : 1), 0); ! 103: uint8 srcdata = fetchbyte(srcaddr); ! 104: int dstreg = (ipc->opcode >> 9) & 7; ! 105: uint8 dstdata = DATAREG(dstreg); ! 106: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 107: PC+= 2; ! 108: } ! 109: ! 110: void cpu_op_1232b(t_ipc *ipc) /* CMP */ { ! 111: /* mask f1f8, bits b018, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 112: int srcreg = (ipc->opcode >> 0) & 7; ! 113: uint32 srcaddr = ADDRREG(srcreg); ! 114: uint32 srcaddr_tmp = (ADDRREG(srcreg)+= (srcreg == 7 ? 2 : 1), 0); ! 115: uint8 srcdata = fetchbyte(srcaddr); ! 116: int dstreg = (ipc->opcode >> 9) & 7; ! 117: uint8 dstdata = DATAREG(dstreg); ! 118: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 119: ! 120: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 121: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 122: CFLAG = srcdata > dstdata; ! 123: NFLAG = ((sint8)outdata) < 0; ! 124: ZFLAG = !outdata; ! 125: PC+= 2; ! 126: } ! 127: ! 128: void cpu_op_1233a(t_ipc *ipc) /* CMP */ { ! 129: /* mask f1f8, bits b020, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 130: int srcreg = (ipc->opcode >> 0) & 7; ! 131: uint32 srcaddr = (ADDRREG(srcreg)-= (srcreg == 7 ? 2 : 1)); ! 132: uint8 srcdata = fetchbyte(srcaddr); ! 133: int dstreg = (ipc->opcode >> 9) & 7; ! 134: uint8 dstdata = DATAREG(dstreg); ! 135: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 136: PC+= 2; ! 137: } ! 138: ! 139: void cpu_op_1233b(t_ipc *ipc) /* CMP */ { ! 140: /* mask f1f8, bits b020, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 141: int srcreg = (ipc->opcode >> 0) & 7; ! 142: uint32 srcaddr = (ADDRREG(srcreg)-= (srcreg == 7 ? 2 : 1)); ! 143: uint8 srcdata = fetchbyte(srcaddr); ! 144: int dstreg = (ipc->opcode >> 9) & 7; ! 145: uint8 dstdata = DATAREG(dstreg); ! 146: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 147: ! 148: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 149: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 150: CFLAG = srcdata > dstdata; ! 151: NFLAG = ((sint8)outdata) < 0; ! 152: ZFLAG = !outdata; ! 153: PC+= 2; ! 154: } ! 155: ! 156: void cpu_op_1234a(t_ipc *ipc) /* CMP */ { ! 157: /* mask f1f8, bits b028, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 158: int srcreg = (ipc->opcode >> 0) & 7; ! 159: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 160: uint8 srcdata = fetchbyte(srcaddr); ! 161: int dstreg = (ipc->opcode >> 9) & 7; ! 162: uint8 dstdata = DATAREG(dstreg); ! 163: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 164: PC+= 4; ! 165: } ! 166: ! 167: void cpu_op_1234b(t_ipc *ipc) /* CMP */ { ! 168: /* mask f1f8, bits b028, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 169: int srcreg = (ipc->opcode >> 0) & 7; ! 170: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 171: uint8 srcdata = fetchbyte(srcaddr); ! 172: int dstreg = (ipc->opcode >> 9) & 7; ! 173: uint8 dstdata = DATAREG(dstreg); ! 174: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 175: ! 176: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 177: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 178: CFLAG = srcdata > dstdata; ! 179: NFLAG = ((sint8)outdata) < 0; ! 180: ZFLAG = !outdata; ! 181: PC+= 4; ! 182: } ! 183: ! 184: void cpu_op_1235a(t_ipc *ipc) /* CMP */ { ! 185: /* mask f1f8, bits b030, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 186: int srcreg = (ipc->opcode >> 0) & 7; ! 187: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 188: uint8 srcdata = fetchbyte(srcaddr); ! 189: int dstreg = (ipc->opcode >> 9) & 7; ! 190: uint8 dstdata = DATAREG(dstreg); ! 191: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 192: PC+= 4; ! 193: } ! 194: ! 195: void cpu_op_1235b(t_ipc *ipc) /* CMP */ { ! 196: /* mask f1f8, bits b030, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 197: int srcreg = (ipc->opcode >> 0) & 7; ! 198: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 199: uint8 srcdata = fetchbyte(srcaddr); ! 200: int dstreg = (ipc->opcode >> 9) & 7; ! 201: uint8 dstdata = DATAREG(dstreg); ! 202: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 203: ! 204: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 205: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 206: CFLAG = srcdata > dstdata; ! 207: NFLAG = ((sint8)outdata) < 0; ! 208: ZFLAG = !outdata; ! 209: PC+= 4; ! 210: } ! 211: ! 212: void cpu_op_1236a(t_ipc *ipc) /* CMP */ { ! 213: /* mask f1ff, bits b038, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 214: uint32 srcaddr = ipc->src; ! 215: uint8 srcdata = fetchbyte(srcaddr); ! 216: int dstreg = (ipc->opcode >> 9) & 7; ! 217: uint8 dstdata = DATAREG(dstreg); ! 218: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 219: PC+= 4; ! 220: } ! 221: ! 222: void cpu_op_1236b(t_ipc *ipc) /* CMP */ { ! 223: /* mask f1ff, bits b038, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 224: uint32 srcaddr = ipc->src; ! 225: uint8 srcdata = fetchbyte(srcaddr); ! 226: int dstreg = (ipc->opcode >> 9) & 7; ! 227: uint8 dstdata = DATAREG(dstreg); ! 228: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 229: ! 230: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 231: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 232: CFLAG = srcdata > dstdata; ! 233: NFLAG = ((sint8)outdata) < 0; ! 234: ZFLAG = !outdata; ! 235: PC+= 4; ! 236: } ! 237: ! 238: void cpu_op_1237a(t_ipc *ipc) /* CMP */ { ! 239: /* mask f1ff, bits b039, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 240: uint32 srcaddr = ipc->src; ! 241: uint8 srcdata = fetchbyte(srcaddr); ! 242: int dstreg = (ipc->opcode >> 9) & 7; ! 243: uint8 dstdata = DATAREG(dstreg); ! 244: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 245: PC+= 6; ! 246: } ! 247: ! 248: void cpu_op_1237b(t_ipc *ipc) /* CMP */ { ! 249: /* mask f1ff, bits b039, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 250: uint32 srcaddr = ipc->src; ! 251: uint8 srcdata = fetchbyte(srcaddr); ! 252: int dstreg = (ipc->opcode >> 9) & 7; ! 253: uint8 dstdata = DATAREG(dstreg); ! 254: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 255: ! 256: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 257: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 258: CFLAG = srcdata > dstdata; ! 259: NFLAG = ((sint8)outdata) < 0; ! 260: ZFLAG = !outdata; ! 261: PC+= 6; ! 262: } ! 263: ! 264: void cpu_op_1238a(t_ipc *ipc) /* CMP */ { ! 265: /* mask f1ff, bits b03a, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 266: uint32 srcaddr = ipc->src; ! 267: uint8 srcdata = fetchbyte(srcaddr); ! 268: int dstreg = (ipc->opcode >> 9) & 7; ! 269: uint8 dstdata = DATAREG(dstreg); ! 270: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 271: PC+= 4; ! 272: } ! 273: ! 274: void cpu_op_1238b(t_ipc *ipc) /* CMP */ { ! 275: /* mask f1ff, bits b03a, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 276: uint32 srcaddr = ipc->src; ! 277: uint8 srcdata = fetchbyte(srcaddr); ! 278: int dstreg = (ipc->opcode >> 9) & 7; ! 279: uint8 dstdata = DATAREG(dstreg); ! 280: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 281: ! 282: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 283: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 284: CFLAG = srcdata > dstdata; ! 285: NFLAG = ((sint8)outdata) < 0; ! 286: ZFLAG = !outdata; ! 287: PC+= 4; ! 288: } ! 289: ! 290: void cpu_op_1239a(t_ipc *ipc) /* CMP */ { ! 291: /* mask f1ff, bits b03b, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 292: uint32 srcaddr = idxval_src(ipc); ! 293: uint8 srcdata = fetchbyte(srcaddr); ! 294: int dstreg = (ipc->opcode >> 9) & 7; ! 295: uint8 dstdata = DATAREG(dstreg); ! 296: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 297: PC+= 4; ! 298: } ! 299: ! 300: void cpu_op_1239b(t_ipc *ipc) /* CMP */ { ! 301: /* mask f1ff, bits b03b, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 302: uint32 srcaddr = idxval_src(ipc); ! 303: uint8 srcdata = fetchbyte(srcaddr); ! 304: int dstreg = (ipc->opcode >> 9) & 7; ! 305: uint8 dstdata = DATAREG(dstreg); ! 306: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 307: ! 308: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 309: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 310: CFLAG = srcdata > dstdata; ! 311: NFLAG = ((sint8)outdata) < 0; ! 312: ZFLAG = !outdata; ! 313: PC+= 4; ! 314: } ! 315: ! 316: void cpu_op_1240a(t_ipc *ipc) /* CMP */ { ! 317: /* mask f1ff, bits b03c, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 11, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 318: uint8 srcdata = ipc->src; ! 319: int dstreg = (ipc->opcode >> 9) & 7; ! 320: uint8 dstdata = DATAREG(dstreg); ! 321: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 322: PC+= 4; ! 323: } ! 324: ! 325: void cpu_op_1240b(t_ipc *ipc) /* CMP */ { ! 326: /* mask f1ff, bits b03c, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 11, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 327: uint8 srcdata = ipc->src; ! 328: int dstreg = (ipc->opcode >> 9) & 7; ! 329: uint8 dstdata = DATAREG(dstreg); ! 330: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 331: ! 332: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 333: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 334: CFLAG = srcdata > dstdata; ! 335: NFLAG = ((sint8)outdata) < 0; ! 336: ZFLAG = !outdata; ! 337: PC+= 4; ! 338: } ! 339: ! 340: void cpu_op_1241a(t_ipc *ipc) /* CMP */ { ! 341: /* mask f1f8, bits b040, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 342: int srcreg = (ipc->opcode >> 0) & 7; ! 343: uint16 srcdata = DATAREG(srcreg); ! 344: int dstreg = (ipc->opcode >> 9) & 7; ! 345: uint16 dstdata = DATAREG(dstreg); ! 346: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 347: PC+= 2; ! 348: } ! 349: ! 350: void cpu_op_1241b(t_ipc *ipc) /* CMP */ { ! 351: /* mask f1f8, bits b040, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 352: int srcreg = (ipc->opcode >> 0) & 7; ! 353: uint16 srcdata = DATAREG(srcreg); ! 354: int dstreg = (ipc->opcode >> 9) & 7; ! 355: uint16 dstdata = DATAREG(dstreg); ! 356: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 357: ! 358: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 359: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 360: CFLAG = srcdata > dstdata; ! 361: NFLAG = ((sint16)outdata) < 0; ! 362: ZFLAG = !outdata; ! 363: PC+= 2; ! 364: } ! 365: ! 366: void cpu_op_1242a(t_ipc *ipc) /* CMP */ { ! 367: /* mask f1f8, bits b048, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 368: int srcreg = (ipc->opcode >> 0) & 7; ! 369: uint16 srcdata = ADDRREG(srcreg); ! 370: int dstreg = (ipc->opcode >> 9) & 7; ! 371: uint16 dstdata = DATAREG(dstreg); ! 372: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 373: PC+= 2; ! 374: } ! 375: ! 376: void cpu_op_1242b(t_ipc *ipc) /* CMP */ { ! 377: /* mask f1f8, bits b048, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 378: int srcreg = (ipc->opcode >> 0) & 7; ! 379: uint16 srcdata = ADDRREG(srcreg); ! 380: int dstreg = (ipc->opcode >> 9) & 7; ! 381: uint16 dstdata = DATAREG(dstreg); ! 382: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 383: ! 384: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 385: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 386: CFLAG = srcdata > dstdata; ! 387: NFLAG = ((sint16)outdata) < 0; ! 388: ZFLAG = !outdata; ! 389: PC+= 2; ! 390: } ! 391: ! 392: void cpu_op_1243a(t_ipc *ipc) /* CMP */ { ! 393: /* mask f1f8, bits b050, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 394: int srcreg = (ipc->opcode >> 0) & 7; ! 395: uint32 srcaddr = ADDRREG(srcreg); ! 396: uint16 srcdata = fetchword(srcaddr); ! 397: int dstreg = (ipc->opcode >> 9) & 7; ! 398: uint16 dstdata = DATAREG(dstreg); ! 399: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 400: PC+= 2; ! 401: } ! 402: ! 403: void cpu_op_1243b(t_ipc *ipc) /* CMP */ { ! 404: /* mask f1f8, bits b050, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 405: int srcreg = (ipc->opcode >> 0) & 7; ! 406: uint32 srcaddr = ADDRREG(srcreg); ! 407: uint16 srcdata = fetchword(srcaddr); ! 408: int dstreg = (ipc->opcode >> 9) & 7; ! 409: uint16 dstdata = DATAREG(dstreg); ! 410: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 411: ! 412: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 413: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 414: CFLAG = srcdata > dstdata; ! 415: NFLAG = ((sint16)outdata) < 0; ! 416: ZFLAG = !outdata; ! 417: PC+= 2; ! 418: } ! 419: ! 420: void cpu_op_1244a(t_ipc *ipc) /* CMP */ { ! 421: /* mask f1f8, bits b058, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 422: int srcreg = (ipc->opcode >> 0) & 7; ! 423: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 424: uint16 srcdata = fetchword(srcaddr); ! 425: int dstreg = (ipc->opcode >> 9) & 7; ! 426: uint16 dstdata = DATAREG(dstreg); ! 427: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 428: PC+= 2; ! 429: } ! 430: ! 431: void cpu_op_1244b(t_ipc *ipc) /* CMP */ { ! 432: /* mask f1f8, bits b058, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 433: int srcreg = (ipc->opcode >> 0) & 7; ! 434: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 435: uint16 srcdata = fetchword(srcaddr); ! 436: int dstreg = (ipc->opcode >> 9) & 7; ! 437: uint16 dstdata = DATAREG(dstreg); ! 438: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 439: ! 440: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 441: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 442: CFLAG = srcdata > dstdata; ! 443: NFLAG = ((sint16)outdata) < 0; ! 444: ZFLAG = !outdata; ! 445: PC+= 2; ! 446: } ! 447: ! 448: void cpu_op_1245a(t_ipc *ipc) /* CMP */ { ! 449: /* mask f1f8, bits b060, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 450: int srcreg = (ipc->opcode >> 0) & 7; ! 451: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 452: uint16 srcdata = fetchword(srcaddr); ! 453: int dstreg = (ipc->opcode >> 9) & 7; ! 454: uint16 dstdata = DATAREG(dstreg); ! 455: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 456: PC+= 2; ! 457: } ! 458: ! 459: void cpu_op_1245b(t_ipc *ipc) /* CMP */ { ! 460: /* mask f1f8, bits b060, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 461: int srcreg = (ipc->opcode >> 0) & 7; ! 462: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 463: uint16 srcdata = fetchword(srcaddr); ! 464: int dstreg = (ipc->opcode >> 9) & 7; ! 465: uint16 dstdata = DATAREG(dstreg); ! 466: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 467: ! 468: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 469: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 470: CFLAG = srcdata > dstdata; ! 471: NFLAG = ((sint16)outdata) < 0; ! 472: ZFLAG = !outdata; ! 473: PC+= 2; ! 474: } ! 475: ! 476: void cpu_op_1246a(t_ipc *ipc) /* CMP */ { ! 477: /* mask f1f8, bits b068, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 478: int srcreg = (ipc->opcode >> 0) & 7; ! 479: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 480: uint16 srcdata = fetchword(srcaddr); ! 481: int dstreg = (ipc->opcode >> 9) & 7; ! 482: uint16 dstdata = DATAREG(dstreg); ! 483: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 484: PC+= 4; ! 485: } ! 486: ! 487: void cpu_op_1246b(t_ipc *ipc) /* CMP */ { ! 488: /* mask f1f8, bits b068, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 489: int srcreg = (ipc->opcode >> 0) & 7; ! 490: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 491: uint16 srcdata = fetchword(srcaddr); ! 492: int dstreg = (ipc->opcode >> 9) & 7; ! 493: uint16 dstdata = DATAREG(dstreg); ! 494: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 495: ! 496: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 497: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 498: CFLAG = srcdata > dstdata; ! 499: NFLAG = ((sint16)outdata) < 0; ! 500: ZFLAG = !outdata; ! 501: PC+= 4; ! 502: } ! 503: ! 504: void cpu_op_1247a(t_ipc *ipc) /* CMP */ { ! 505: /* mask f1f8, bits b070, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 506: int srcreg = (ipc->opcode >> 0) & 7; ! 507: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 508: uint16 srcdata = fetchword(srcaddr); ! 509: int dstreg = (ipc->opcode >> 9) & 7; ! 510: uint16 dstdata = DATAREG(dstreg); ! 511: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 512: PC+= 4; ! 513: } ! 514: ! 515: void cpu_op_1247b(t_ipc *ipc) /* CMP */ { ! 516: /* mask f1f8, bits b070, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 517: int srcreg = (ipc->opcode >> 0) & 7; ! 518: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 519: uint16 srcdata = fetchword(srcaddr); ! 520: int dstreg = (ipc->opcode >> 9) & 7; ! 521: uint16 dstdata = DATAREG(dstreg); ! 522: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 523: ! 524: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 525: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 526: CFLAG = srcdata > dstdata; ! 527: NFLAG = ((sint16)outdata) < 0; ! 528: ZFLAG = !outdata; ! 529: PC+= 4; ! 530: } ! 531: ! 532: void cpu_op_1248a(t_ipc *ipc) /* CMP */ { ! 533: /* mask f1ff, bits b078, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 534: uint32 srcaddr = ipc->src; ! 535: uint16 srcdata = fetchword(srcaddr); ! 536: int dstreg = (ipc->opcode >> 9) & 7; ! 537: uint16 dstdata = DATAREG(dstreg); ! 538: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 539: PC+= 4; ! 540: } ! 541: ! 542: void cpu_op_1248b(t_ipc *ipc) /* CMP */ { ! 543: /* mask f1ff, bits b078, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 544: uint32 srcaddr = ipc->src; ! 545: uint16 srcdata = fetchword(srcaddr); ! 546: int dstreg = (ipc->opcode >> 9) & 7; ! 547: uint16 dstdata = DATAREG(dstreg); ! 548: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 549: ! 550: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 551: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 552: CFLAG = srcdata > dstdata; ! 553: NFLAG = ((sint16)outdata) < 0; ! 554: ZFLAG = !outdata; ! 555: PC+= 4; ! 556: } ! 557: ! 558: void cpu_op_1249a(t_ipc *ipc) /* CMP */ { ! 559: /* mask f1ff, bits b079, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 560: uint32 srcaddr = ipc->src; ! 561: uint16 srcdata = fetchword(srcaddr); ! 562: int dstreg = (ipc->opcode >> 9) & 7; ! 563: uint16 dstdata = DATAREG(dstreg); ! 564: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 565: PC+= 6; ! 566: } ! 567: ! 568: void cpu_op_1249b(t_ipc *ipc) /* CMP */ { ! 569: /* mask f1ff, bits b079, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 570: uint32 srcaddr = ipc->src; ! 571: uint16 srcdata = fetchword(srcaddr); ! 572: int dstreg = (ipc->opcode >> 9) & 7; ! 573: uint16 dstdata = DATAREG(dstreg); ! 574: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 575: ! 576: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 577: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 578: CFLAG = srcdata > dstdata; ! 579: NFLAG = ((sint16)outdata) < 0; ! 580: ZFLAG = !outdata; ! 581: PC+= 6; ! 582: } ! 583: ! 584: void cpu_op_1250a(t_ipc *ipc) /* CMP */ { ! 585: /* mask f1ff, bits b07a, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 586: uint32 srcaddr = ipc->src; ! 587: uint16 srcdata = fetchword(srcaddr); ! 588: int dstreg = (ipc->opcode >> 9) & 7; ! 589: uint16 dstdata = DATAREG(dstreg); ! 590: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 591: PC+= 4; ! 592: } ! 593: ! 594: void cpu_op_1250b(t_ipc *ipc) /* CMP */ { ! 595: /* mask f1ff, bits b07a, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 596: uint32 srcaddr = ipc->src; ! 597: uint16 srcdata = fetchword(srcaddr); ! 598: int dstreg = (ipc->opcode >> 9) & 7; ! 599: uint16 dstdata = DATAREG(dstreg); ! 600: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 601: ! 602: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 603: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 604: CFLAG = srcdata > dstdata; ! 605: NFLAG = ((sint16)outdata) < 0; ! 606: ZFLAG = !outdata; ! 607: PC+= 4; ! 608: } ! 609: ! 610: void cpu_op_1251a(t_ipc *ipc) /* CMP */ { ! 611: /* mask f1ff, bits b07b, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 612: uint32 srcaddr = idxval_src(ipc); ! 613: uint16 srcdata = fetchword(srcaddr); ! 614: int dstreg = (ipc->opcode >> 9) & 7; ! 615: uint16 dstdata = DATAREG(dstreg); ! 616: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 617: PC+= 4; ! 618: } ! 619: ! 620: void cpu_op_1251b(t_ipc *ipc) /* CMP */ { ! 621: /* mask f1ff, bits b07b, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 622: uint32 srcaddr = idxval_src(ipc); ! 623: uint16 srcdata = fetchword(srcaddr); ! 624: int dstreg = (ipc->opcode >> 9) & 7; ! 625: uint16 dstdata = DATAREG(dstreg); ! 626: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 627: ! 628: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 629: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 630: CFLAG = srcdata > dstdata; ! 631: NFLAG = ((sint16)outdata) < 0; ! 632: ZFLAG = !outdata; ! 633: PC+= 4; ! 634: } ! 635: ! 636: void cpu_op_1252a(t_ipc *ipc) /* CMP */ { ! 637: /* mask f1ff, bits b07c, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 638: uint16 srcdata = ipc->src; ! 639: int dstreg = (ipc->opcode >> 9) & 7; ! 640: uint16 dstdata = DATAREG(dstreg); ! 641: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 642: PC+= 4; ! 643: } ! 644: ! 645: void cpu_op_1252b(t_ipc *ipc) /* CMP */ { ! 646: /* mask f1ff, bits b07c, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 647: uint16 srcdata = ipc->src; ! 648: int dstreg = (ipc->opcode >> 9) & 7; ! 649: uint16 dstdata = DATAREG(dstreg); ! 650: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 651: ! 652: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 653: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 654: CFLAG = srcdata > dstdata; ! 655: NFLAG = ((sint16)outdata) < 0; ! 656: ZFLAG = !outdata; ! 657: PC+= 4; ! 658: } ! 659: ! 660: void cpu_op_1253a(t_ipc *ipc) /* CMP */ { ! 661: /* mask f1f8, bits b080, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 662: int srcreg = (ipc->opcode >> 0) & 7; ! 663: uint32 srcdata = DATAREG(srcreg); ! 664: int dstreg = (ipc->opcode >> 9) & 7; ! 665: uint32 dstdata = DATAREG(dstreg); ! 666: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 667: PC+= 2; ! 668: } ! 669: ! 670: void cpu_op_1253b(t_ipc *ipc) /* CMP */ { ! 671: /* mask f1f8, bits b080, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 672: int srcreg = (ipc->opcode >> 0) & 7; ! 673: uint32 srcdata = DATAREG(srcreg); ! 674: int dstreg = (ipc->opcode >> 9) & 7; ! 675: uint32 dstdata = DATAREG(dstreg); ! 676: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 677: ! 678: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 679: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 680: CFLAG = srcdata > dstdata; ! 681: NFLAG = ((sint32)outdata) < 0; ! 682: ZFLAG = !outdata; ! 683: PC+= 2; ! 684: } ! 685: ! 686: void cpu_op_1254a(t_ipc *ipc) /* CMP */ { ! 687: /* mask f1f8, bits b088, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 688: int srcreg = (ipc->opcode >> 0) & 7; ! 689: uint32 srcdata = ADDRREG(srcreg); ! 690: int dstreg = (ipc->opcode >> 9) & 7; ! 691: uint32 dstdata = DATAREG(dstreg); ! 692: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 693: PC+= 2; ! 694: } ! 695: ! 696: void cpu_op_1254b(t_ipc *ipc) /* CMP */ { ! 697: /* mask f1f8, bits b088, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 1, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 698: int srcreg = (ipc->opcode >> 0) & 7; ! 699: uint32 srcdata = ADDRREG(srcreg); ! 700: int dstreg = (ipc->opcode >> 9) & 7; ! 701: uint32 dstdata = DATAREG(dstreg); ! 702: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 703: ! 704: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 705: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 706: CFLAG = srcdata > dstdata; ! 707: NFLAG = ((sint32)outdata) < 0; ! 708: ZFLAG = !outdata; ! 709: PC+= 2; ! 710: } ! 711: ! 712: void cpu_op_1255a(t_ipc *ipc) /* CMP */ { ! 713: /* mask f1f8, bits b090, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 714: int srcreg = (ipc->opcode >> 0) & 7; ! 715: uint32 srcaddr = ADDRREG(srcreg); ! 716: uint32 srcdata = fetchlong(srcaddr); ! 717: int dstreg = (ipc->opcode >> 9) & 7; ! 718: uint32 dstdata = DATAREG(dstreg); ! 719: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 720: PC+= 2; ! 721: } ! 722: ! 723: void cpu_op_1255b(t_ipc *ipc) /* CMP */ { ! 724: /* mask f1f8, bits b090, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 2, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 725: int srcreg = (ipc->opcode >> 0) & 7; ! 726: uint32 srcaddr = ADDRREG(srcreg); ! 727: uint32 srcdata = fetchlong(srcaddr); ! 728: int dstreg = (ipc->opcode >> 9) & 7; ! 729: uint32 dstdata = DATAREG(dstreg); ! 730: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 731: ! 732: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 733: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 734: CFLAG = srcdata > dstdata; ! 735: NFLAG = ((sint32)outdata) < 0; ! 736: ZFLAG = !outdata; ! 737: PC+= 2; ! 738: } ! 739: ! 740: void cpu_op_1256a(t_ipc *ipc) /* CMP */ { ! 741: /* mask f1f8, bits b098, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 742: int srcreg = (ipc->opcode >> 0) & 7; ! 743: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 744: uint32 srcdata = fetchlong(srcaddr); ! 745: int dstreg = (ipc->opcode >> 9) & 7; ! 746: uint32 dstdata = DATAREG(dstreg); ! 747: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 748: PC+= 2; ! 749: } ! 750: ! 751: void cpu_op_1256b(t_ipc *ipc) /* CMP */ { ! 752: /* mask f1f8, bits b098, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 753: int srcreg = (ipc->opcode >> 0) & 7; ! 754: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 755: uint32 srcdata = fetchlong(srcaddr); ! 756: int dstreg = (ipc->opcode >> 9) & 7; ! 757: uint32 dstdata = DATAREG(dstreg); ! 758: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 759: ! 760: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 761: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 762: CFLAG = srcdata > dstdata; ! 763: NFLAG = ((sint32)outdata) < 0; ! 764: ZFLAG = !outdata; ! 765: PC+= 2; ! 766: } ! 767: ! 768: void cpu_op_1257a(t_ipc *ipc) /* CMP */ { ! 769: /* mask f1f8, bits b0a0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 770: int srcreg = (ipc->opcode >> 0) & 7; ! 771: uint32 srcaddr = ADDRREG(srcreg)-=4; ! 772: uint32 srcdata = fetchlong(srcaddr); ! 773: int dstreg = (ipc->opcode >> 9) & 7; ! 774: uint32 dstdata = DATAREG(dstreg); ! 775: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 776: PC+= 2; ! 777: } ! 778: ! 779: void cpu_op_1257b(t_ipc *ipc) /* CMP */ { ! 780: /* mask f1f8, bits b0a0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 4, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 781: int srcreg = (ipc->opcode >> 0) & 7; ! 782: uint32 srcaddr = ADDRREG(srcreg)-=4; ! 783: uint32 srcdata = fetchlong(srcaddr); ! 784: int dstreg = (ipc->opcode >> 9) & 7; ! 785: uint32 dstdata = DATAREG(dstreg); ! 786: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 787: ! 788: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 789: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 790: CFLAG = srcdata > dstdata; ! 791: NFLAG = ((sint32)outdata) < 0; ! 792: ZFLAG = !outdata; ! 793: PC+= 2; ! 794: } ! 795: ! 796: void cpu_op_1258a(t_ipc *ipc) /* CMP */ { ! 797: /* mask f1f8, bits b0a8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 798: int srcreg = (ipc->opcode >> 0) & 7; ! 799: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 800: uint32 srcdata = fetchlong(srcaddr); ! 801: int dstreg = (ipc->opcode >> 9) & 7; ! 802: uint32 dstdata = DATAREG(dstreg); ! 803: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 804: PC+= 4; ! 805: } ! 806: ! 807: void cpu_op_1258b(t_ipc *ipc) /* CMP */ { ! 808: /* mask f1f8, bits b0a8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 5, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 809: int srcreg = (ipc->opcode >> 0) & 7; ! 810: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 811: uint32 srcdata = fetchlong(srcaddr); ! 812: int dstreg = (ipc->opcode >> 9) & 7; ! 813: uint32 dstdata = DATAREG(dstreg); ! 814: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 815: ! 816: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 817: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 818: CFLAG = srcdata > dstdata; ! 819: NFLAG = ((sint32)outdata) < 0; ! 820: ZFLAG = !outdata; ! 821: PC+= 4; ! 822: } ! 823: ! 824: void cpu_op_1259a(t_ipc *ipc) /* CMP */ { ! 825: /* mask f1f8, bits b0b0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 826: int srcreg = (ipc->opcode >> 0) & 7; ! 827: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 828: uint32 srcdata = fetchlong(srcaddr); ! 829: int dstreg = (ipc->opcode >> 9) & 7; ! 830: uint32 dstdata = DATAREG(dstreg); ! 831: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 832: PC+= 4; ! 833: } ! 834: ! 835: void cpu_op_1259b(t_ipc *ipc) /* CMP */ { ! 836: /* mask f1f8, bits b0b0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 6, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 837: int srcreg = (ipc->opcode >> 0) & 7; ! 838: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 839: uint32 srcdata = fetchlong(srcaddr); ! 840: int dstreg = (ipc->opcode >> 9) & 7; ! 841: uint32 dstdata = DATAREG(dstreg); ! 842: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 843: ! 844: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 845: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 846: CFLAG = srcdata > dstdata; ! 847: NFLAG = ((sint32)outdata) < 0; ! 848: ZFLAG = !outdata; ! 849: PC+= 4; ! 850: } ! 851: ! 852: void cpu_op_1260a(t_ipc *ipc) /* CMP */ { ! 853: /* mask f1ff, bits b0b8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 854: uint32 srcaddr = ipc->src; ! 855: uint32 srcdata = fetchlong(srcaddr); ! 856: int dstreg = (ipc->opcode >> 9) & 7; ! 857: uint32 dstdata = DATAREG(dstreg); ! 858: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 859: PC+= 4; ! 860: } ! 861: ! 862: void cpu_op_1260b(t_ipc *ipc) /* CMP */ { ! 863: /* mask f1ff, bits b0b8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 7, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 864: uint32 srcaddr = ipc->src; ! 865: uint32 srcdata = fetchlong(srcaddr); ! 866: int dstreg = (ipc->opcode >> 9) & 7; ! 867: uint32 dstdata = DATAREG(dstreg); ! 868: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 869: ! 870: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 871: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 872: CFLAG = srcdata > dstdata; ! 873: NFLAG = ((sint32)outdata) < 0; ! 874: ZFLAG = !outdata; ! 875: PC+= 4; ! 876: } ! 877: ! 878: void cpu_op_1261a(t_ipc *ipc) /* CMP */ { ! 879: /* mask f1ff, bits b0b9, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 880: uint32 srcaddr = ipc->src; ! 881: uint32 srcdata = fetchlong(srcaddr); ! 882: int dstreg = (ipc->opcode >> 9) & 7; ! 883: uint32 dstdata = DATAREG(dstreg); ! 884: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 885: PC+= 6; ! 886: } ! 887: ! 888: void cpu_op_1261b(t_ipc *ipc) /* CMP */ { ! 889: /* mask f1ff, bits b0b9, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 8, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 890: uint32 srcaddr = ipc->src; ! 891: uint32 srcdata = fetchlong(srcaddr); ! 892: int dstreg = (ipc->opcode >> 9) & 7; ! 893: uint32 dstdata = DATAREG(dstreg); ! 894: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 895: ! 896: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 897: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 898: CFLAG = srcdata > dstdata; ! 899: NFLAG = ((sint32)outdata) < 0; ! 900: ZFLAG = !outdata; ! 901: PC+= 6; ! 902: } ! 903: ! 904: void cpu_op_1262a(t_ipc *ipc) /* CMP */ { ! 905: /* mask f1ff, bits b0ba, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 906: uint32 srcaddr = ipc->src; ! 907: uint32 srcdata = fetchlong(srcaddr); ! 908: int dstreg = (ipc->opcode >> 9) & 7; ! 909: uint32 dstdata = DATAREG(dstreg); ! 910: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 911: PC+= 4; ! 912: } ! 913: ! 914: void cpu_op_1262b(t_ipc *ipc) /* CMP */ { ! 915: /* mask f1ff, bits b0ba, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 9, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 916: uint32 srcaddr = ipc->src; ! 917: uint32 srcdata = fetchlong(srcaddr); ! 918: int dstreg = (ipc->opcode >> 9) & 7; ! 919: uint32 dstdata = DATAREG(dstreg); ! 920: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 921: ! 922: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 923: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 924: CFLAG = srcdata > dstdata; ! 925: NFLAG = ((sint32)outdata) < 0; ! 926: ZFLAG = !outdata; ! 927: PC+= 4; ! 928: } ! 929: ! 930: void cpu_op_1263a(t_ipc *ipc) /* CMP */ { ! 931: /* mask f1ff, bits b0bb, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 932: uint32 srcaddr = idxval_src(ipc); ! 933: uint32 srcdata = fetchlong(srcaddr); ! 934: int dstreg = (ipc->opcode >> 9) & 7; ! 935: uint32 dstdata = DATAREG(dstreg); ! 936: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 937: PC+= 4; ! 938: } ! 939: ! 940: void cpu_op_1263b(t_ipc *ipc) /* CMP */ { ! 941: /* mask f1ff, bits b0bb, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 10, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 942: uint32 srcaddr = idxval_src(ipc); ! 943: uint32 srcdata = fetchlong(srcaddr); ! 944: int dstreg = (ipc->opcode >> 9) & 7; ! 945: uint32 dstdata = DATAREG(dstreg); ! 946: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 947: ! 948: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 949: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 950: CFLAG = srcdata > dstdata; ! 951: NFLAG = ((sint32)outdata) < 0; ! 952: ZFLAG = !outdata; ! 953: PC+= 4; ! 954: } ! 955: ! 956: void cpu_op_1264a(t_ipc *ipc) /* CMP */ { ! 957: /* mask f1ff, bits b0bc, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 13, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 958: uint32 srcdata = ipc->src; ! 959: int dstreg = (ipc->opcode >> 9) & 7; ! 960: uint32 dstdata = DATAREG(dstreg); ! 961: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 962: PC+= 6; ! 963: } ! 964: ! 965: void cpu_op_1264b(t_ipc *ipc) /* CMP */ { ! 966: /* mask f1ff, bits b0bc, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 13, dtype 0, sbitpos 0, dbitpos 9, immvalue 0 */ ! 967: uint32 srcdata = ipc->src; ! 968: int dstreg = (ipc->opcode >> 9) & 7; ! 969: uint32 dstdata = DATAREG(dstreg); ! 970: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 971: ! 972: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 973: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 974: CFLAG = srcdata > dstdata; ! 975: NFLAG = ((sint32)outdata) < 0; ! 976: ZFLAG = !outdata; ! 977: PC+= 6; ! 978: } ! 979: ! 980: void cpu_op_1265a(t_ipc *ipc) /* CMPA */ { ! 981: /* mask f1f8, bits b0c0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 982: int srcreg = (ipc->opcode >> 0) & 7; ! 983: uint16 srcdata = DATAREG(srcreg); ! 984: int dstreg = (ipc->opcode >> 9) & 7; ! 985: uint32 dstdata = ADDRREG(dstreg); ! 986: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 987: PC+= 2; ! 988: } ! 989: ! 990: void cpu_op_1265b(t_ipc *ipc) /* CMPA */ { ! 991: /* mask f1f8, bits b0c0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 992: int srcreg = (ipc->opcode >> 0) & 7; ! 993: uint16 srcdata = DATAREG(srcreg); ! 994: int dstreg = (ipc->opcode >> 9) & 7; ! 995: uint32 dstdata = ADDRREG(dstreg); ! 996: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 997: ! 998: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 999: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1000: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1001: NFLAG = ((sint32)outdata) < 0; ! 1002: ZFLAG = !outdata; ! 1003: PC+= 2; ! 1004: } ! 1005: ! 1006: void cpu_op_1266a(t_ipc *ipc) /* CMPA */ { ! 1007: /* mask f1f8, bits b0c8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1008: int srcreg = (ipc->opcode >> 0) & 7; ! 1009: uint16 srcdata = ADDRREG(srcreg); ! 1010: int dstreg = (ipc->opcode >> 9) & 7; ! 1011: uint32 dstdata = ADDRREG(dstreg); ! 1012: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1013: PC+= 2; ! 1014: } ! 1015: ! 1016: void cpu_op_1266b(t_ipc *ipc) /* CMPA */ { ! 1017: /* mask f1f8, bits b0c8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 1, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1018: int srcreg = (ipc->opcode >> 0) & 7; ! 1019: uint16 srcdata = ADDRREG(srcreg); ! 1020: int dstreg = (ipc->opcode >> 9) & 7; ! 1021: uint32 dstdata = ADDRREG(dstreg); ! 1022: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1023: ! 1024: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1025: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1026: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1027: NFLAG = ((sint32)outdata) < 0; ! 1028: ZFLAG = !outdata; ! 1029: PC+= 2; ! 1030: } ! 1031: ! 1032: void cpu_op_1267a(t_ipc *ipc) /* CMPA */ { ! 1033: /* mask f1f8, bits b0d0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1034: int srcreg = (ipc->opcode >> 0) & 7; ! 1035: uint32 srcaddr = ADDRREG(srcreg); ! 1036: uint16 srcdata = fetchword(srcaddr); ! 1037: int dstreg = (ipc->opcode >> 9) & 7; ! 1038: uint32 dstdata = ADDRREG(dstreg); ! 1039: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1040: PC+= 2; ! 1041: } ! 1042: ! 1043: void cpu_op_1267b(t_ipc *ipc) /* CMPA */ { ! 1044: /* mask f1f8, bits b0d0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 2, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1045: int srcreg = (ipc->opcode >> 0) & 7; ! 1046: uint32 srcaddr = ADDRREG(srcreg); ! 1047: uint16 srcdata = fetchword(srcaddr); ! 1048: int dstreg = (ipc->opcode >> 9) & 7; ! 1049: uint32 dstdata = ADDRREG(dstreg); ! 1050: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1051: ! 1052: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1053: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1054: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1055: NFLAG = ((sint32)outdata) < 0; ! 1056: ZFLAG = !outdata; ! 1057: PC+= 2; ! 1058: } ! 1059: ! 1060: void cpu_op_1268a(t_ipc *ipc) /* CMPA */ { ! 1061: /* mask f1f8, bits b0d8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1062: int srcreg = (ipc->opcode >> 0) & 7; ! 1063: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 1064: uint16 srcdata = fetchword(srcaddr); ! 1065: int dstreg = (ipc->opcode >> 9) & 7; ! 1066: uint32 dstdata = ADDRREG(dstreg); ! 1067: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1068: PC+= 2; ! 1069: } ! 1070: ! 1071: void cpu_op_1268b(t_ipc *ipc) /* CMPA */ { ! 1072: /* mask f1f8, bits b0d8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1073: int srcreg = (ipc->opcode >> 0) & 7; ! 1074: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 1075: uint16 srcdata = fetchword(srcaddr); ! 1076: int dstreg = (ipc->opcode >> 9) & 7; ! 1077: uint32 dstdata = ADDRREG(dstreg); ! 1078: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1079: ! 1080: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1081: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1082: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1083: NFLAG = ((sint32)outdata) < 0; ! 1084: ZFLAG = !outdata; ! 1085: PC+= 2; ! 1086: } ! 1087: ! 1088: void cpu_op_1269a(t_ipc *ipc) /* CMPA */ { ! 1089: /* mask f1f8, bits b0e0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1090: int srcreg = (ipc->opcode >> 0) & 7; ! 1091: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1092: uint16 srcdata = fetchword(srcaddr); ! 1093: int dstreg = (ipc->opcode >> 9) & 7; ! 1094: uint32 dstdata = ADDRREG(dstreg); ! 1095: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1096: PC+= 2; ! 1097: } ! 1098: ! 1099: void cpu_op_1269b(t_ipc *ipc) /* CMPA */ { ! 1100: /* mask f1f8, bits b0e0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 4, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1101: int srcreg = (ipc->opcode >> 0) & 7; ! 1102: uint32 srcaddr = ADDRREG(srcreg)-=2; ! 1103: uint16 srcdata = fetchword(srcaddr); ! 1104: int dstreg = (ipc->opcode >> 9) & 7; ! 1105: uint32 dstdata = ADDRREG(dstreg); ! 1106: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1107: ! 1108: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1109: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1110: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1111: NFLAG = ((sint32)outdata) < 0; ! 1112: ZFLAG = !outdata; ! 1113: PC+= 2; ! 1114: } ! 1115: ! 1116: void cpu_op_1270a(t_ipc *ipc) /* CMPA */ { ! 1117: /* mask f1f8, bits b0e8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1118: int srcreg = (ipc->opcode >> 0) & 7; ! 1119: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1120: uint16 srcdata = fetchword(srcaddr); ! 1121: int dstreg = (ipc->opcode >> 9) & 7; ! 1122: uint32 dstdata = ADDRREG(dstreg); ! 1123: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1124: PC+= 4; ! 1125: } ! 1126: ! 1127: void cpu_op_1270b(t_ipc *ipc) /* CMPA */ { ! 1128: /* mask f1f8, bits b0e8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 5, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1129: int srcreg = (ipc->opcode >> 0) & 7; ! 1130: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 1131: uint16 srcdata = fetchword(srcaddr); ! 1132: int dstreg = (ipc->opcode >> 9) & 7; ! 1133: uint32 dstdata = ADDRREG(dstreg); ! 1134: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1135: ! 1136: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1137: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1138: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1139: NFLAG = ((sint32)outdata) < 0; ! 1140: ZFLAG = !outdata; ! 1141: PC+= 4; ! 1142: } ! 1143: ! 1144: void cpu_op_1271a(t_ipc *ipc) /* CMPA */ { ! 1145: /* mask f1f8, bits b0f0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1146: int srcreg = (ipc->opcode >> 0) & 7; ! 1147: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1148: uint16 srcdata = fetchword(srcaddr); ! 1149: int dstreg = (ipc->opcode >> 9) & 7; ! 1150: uint32 dstdata = ADDRREG(dstreg); ! 1151: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1152: PC+= 4; ! 1153: } ! 1154: ! 1155: void cpu_op_1271b(t_ipc *ipc) /* CMPA */ { ! 1156: /* mask f1f8, bits b0f0, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 6, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1157: int srcreg = (ipc->opcode >> 0) & 7; ! 1158: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 1159: uint16 srcdata = fetchword(srcaddr); ! 1160: int dstreg = (ipc->opcode >> 9) & 7; ! 1161: uint32 dstdata = ADDRREG(dstreg); ! 1162: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1163: ! 1164: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1165: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1166: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1167: NFLAG = ((sint32)outdata) < 0; ! 1168: ZFLAG = !outdata; ! 1169: PC+= 4; ! 1170: } ! 1171: ! 1172: void cpu_op_1272a(t_ipc *ipc) /* CMPA */ { ! 1173: /* mask f1ff, bits b0f8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1174: uint32 srcaddr = ipc->src; ! 1175: uint16 srcdata = fetchword(srcaddr); ! 1176: int dstreg = (ipc->opcode >> 9) & 7; ! 1177: uint32 dstdata = ADDRREG(dstreg); ! 1178: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1179: PC+= 4; ! 1180: } ! 1181: ! 1182: void cpu_op_1272b(t_ipc *ipc) /* CMPA */ { ! 1183: /* mask f1ff, bits b0f8, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 7, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1184: uint32 srcaddr = ipc->src; ! 1185: uint16 srcdata = fetchword(srcaddr); ! 1186: int dstreg = (ipc->opcode >> 9) & 7; ! 1187: uint32 dstdata = ADDRREG(dstreg); ! 1188: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1189: ! 1190: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1191: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1192: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1193: NFLAG = ((sint32)outdata) < 0; ! 1194: ZFLAG = !outdata; ! 1195: PC+= 4; ! 1196: } ! 1197: ! 1198: void cpu_op_1273a(t_ipc *ipc) /* CMPA */ { ! 1199: /* mask f1ff, bits b0f9, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1200: uint32 srcaddr = ipc->src; ! 1201: uint16 srcdata = fetchword(srcaddr); ! 1202: int dstreg = (ipc->opcode >> 9) & 7; ! 1203: uint32 dstdata = ADDRREG(dstreg); ! 1204: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1205: PC+= 6; ! 1206: } ! 1207: ! 1208: void cpu_op_1273b(t_ipc *ipc) /* CMPA */ { ! 1209: /* mask f1ff, bits b0f9, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 8, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1210: uint32 srcaddr = ipc->src; ! 1211: uint16 srcdata = fetchword(srcaddr); ! 1212: int dstreg = (ipc->opcode >> 9) & 7; ! 1213: uint32 dstdata = ADDRREG(dstreg); ! 1214: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1215: ! 1216: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1217: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1218: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1219: NFLAG = ((sint32)outdata) < 0; ! 1220: ZFLAG = !outdata; ! 1221: PC+= 6; ! 1222: } ! 1223: ! 1224: void cpu_op_1274a(t_ipc *ipc) /* CMPA */ { ! 1225: /* mask f1ff, bits b0fa, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1226: uint32 srcaddr = ipc->src; ! 1227: uint16 srcdata = fetchword(srcaddr); ! 1228: int dstreg = (ipc->opcode >> 9) & 7; ! 1229: uint32 dstdata = ADDRREG(dstreg); ! 1230: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1231: PC+= 4; ! 1232: } ! 1233: ! 1234: void cpu_op_1274b(t_ipc *ipc) /* CMPA */ { ! 1235: /* mask f1ff, bits b0fa, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 9, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1236: uint32 srcaddr = ipc->src; ! 1237: uint16 srcdata = fetchword(srcaddr); ! 1238: int dstreg = (ipc->opcode >> 9) & 7; ! 1239: uint32 dstdata = ADDRREG(dstreg); ! 1240: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1241: ! 1242: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1243: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1244: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1245: NFLAG = ((sint32)outdata) < 0; ! 1246: ZFLAG = !outdata; ! 1247: PC+= 4; ! 1248: } ! 1249: ! 1250: void cpu_op_1275a(t_ipc *ipc) /* CMPA */ { ! 1251: /* mask f1ff, bits b0fb, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1252: uint32 srcaddr = idxval_src(ipc); ! 1253: uint16 srcdata = fetchword(srcaddr); ! 1254: int dstreg = (ipc->opcode >> 9) & 7; ! 1255: uint32 dstdata = ADDRREG(dstreg); ! 1256: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1257: PC+= 4; ! 1258: } ! 1259: ! 1260: void cpu_op_1275b(t_ipc *ipc) /* CMPA */ { ! 1261: /* mask f1ff, bits b0fb, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 10, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1262: uint32 srcaddr = idxval_src(ipc); ! 1263: uint16 srcdata = fetchword(srcaddr); ! 1264: int dstreg = (ipc->opcode >> 9) & 7; ! 1265: uint32 dstdata = ADDRREG(dstreg); ! 1266: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1267: ! 1268: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1269: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1270: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1271: NFLAG = ((sint32)outdata) < 0; ! 1272: ZFLAG = !outdata; ! 1273: PC+= 4; ! 1274: } ! 1275: ! 1276: void cpu_op_1276a(t_ipc *ipc) /* CMPA */ { ! 1277: /* mask f1ff, bits b0fc, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1278: uint16 srcdata = ipc->src; ! 1279: int dstreg = (ipc->opcode >> 9) & 7; ! 1280: uint32 dstdata = ADDRREG(dstreg); ! 1281: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1282: PC+= 4; ! 1283: } ! 1284: ! 1285: void cpu_op_1276b(t_ipc *ipc) /* CMPA */ { ! 1286: /* mask f1ff, bits b0fc, mnemonic 16, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 12, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 1287: uint16 srcdata = ipc->src; ! 1288: int dstreg = (ipc->opcode >> 9) & 7; ! 1289: uint32 dstdata = ADDRREG(dstreg); ! 1290: uint32 outdata = (sint32)dstdata - (sint32)(sint16)srcdata; ! 1291: ! 1292: VFLAG = (((sint32)(sint16)srcdata < 0) != ((sint32)dstdata < 0)) && ! 1293: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 1294: CFLAG = (uint32)(sint32)(sint16)srcdata > dstdata; ! 1295: NFLAG = ((sint32)outdata) < 0; ! 1296: ZFLAG = !outdata; ! 1297: PC+= 4; ! 1298: } ! 1299: ! 1300: void cpu_op_1277a(t_ipc *ipc) /* EOR */ { ! 1301: /* mask f1f8, bits b100, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1302: int srcreg = (ipc->opcode >> 9) & 7; ! 1303: uint8 srcdata = DATAREG(srcreg); ! 1304: int dstreg = (ipc->opcode >> 0) & 7; ! 1305: uint8 dstdata = DATAREG(dstreg); ! 1306: uint8 outdata = dstdata; ! 1307: ! 1308: outdata^= srcdata; ! 1309: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 1310: PC+= 2; ! 1311: } ! 1312: ! 1313: void cpu_op_1277b(t_ipc *ipc) /* EOR */ { ! 1314: /* mask f1f8, bits b100, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1315: int srcreg = (ipc->opcode >> 9) & 7; ! 1316: uint8 srcdata = DATAREG(srcreg); ! 1317: int dstreg = (ipc->opcode >> 0) & 7; ! 1318: uint8 dstdata = DATAREG(dstreg); ! 1319: uint8 outdata = dstdata; ! 1320: ! 1321: outdata^= srcdata; ! 1322: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata; ! 1323: ! 1324: NFLAG = ((sint8)outdata) < 0; ! 1325: ZFLAG = !outdata; ! 1326: VFLAG = 0; ! 1327: CFLAG = 0; ! 1328: PC+= 2; ! 1329: } ! 1330: ! 1331: void cpu_op_1278a(t_ipc *ipc) /* EOR */ { ! 1332: /* mask f1f8, bits b110, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1333: int srcreg = (ipc->opcode >> 9) & 7; ! 1334: uint8 srcdata = DATAREG(srcreg); ! 1335: int dstreg = (ipc->opcode >> 0) & 7; ! 1336: uint32 dstaddr = ADDRREG(dstreg); ! 1337: uint8 dstdata = fetchbyte(dstaddr); ! 1338: uint8 outdata = dstdata; ! 1339: ! 1340: outdata^= srcdata; ! 1341: storebyte(dstaddr, outdata); ! 1342: PC+= 2; ! 1343: } ! 1344: ! 1345: void cpu_op_1278b(t_ipc *ipc) /* EOR */ { ! 1346: /* mask f1f8, bits b110, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1347: int srcreg = (ipc->opcode >> 9) & 7; ! 1348: uint8 srcdata = DATAREG(srcreg); ! 1349: int dstreg = (ipc->opcode >> 0) & 7; ! 1350: uint32 dstaddr = ADDRREG(dstreg); ! 1351: uint8 dstdata = fetchbyte(dstaddr); ! 1352: uint8 outdata = dstdata; ! 1353: ! 1354: outdata^= srcdata; ! 1355: storebyte(dstaddr, outdata); ! 1356: ! 1357: NFLAG = ((sint8)outdata) < 0; ! 1358: ZFLAG = !outdata; ! 1359: VFLAG = 0; ! 1360: CFLAG = 0; ! 1361: PC+= 2; ! 1362: } ! 1363: ! 1364: void cpu_op_1279a(t_ipc *ipc) /* EOR */ { ! 1365: /* mask f1f8, bits b118, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1366: int srcreg = (ipc->opcode >> 9) & 7; ! 1367: uint8 srcdata = DATAREG(srcreg); ! 1368: int dstreg = (ipc->opcode >> 0) & 7; ! 1369: uint32 dstaddr = ADDRREG(dstreg); ! 1370: uint32 dstaddr_tmp = (ADDRREG(dstreg)+= (dstreg == 7 ? 2 : 1), 0); ! 1371: uint8 dstdata = fetchbyte(dstaddr); ! 1372: uint8 outdata = dstdata; ! 1373: ! 1374: outdata^= srcdata; ! 1375: storebyte(dstaddr, outdata); ! 1376: PC+= 2; ! 1377: } ! 1378: ! 1379: void cpu_op_1279b(t_ipc *ipc) /* EOR */ { ! 1380: /* mask f1f8, bits b118, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1381: int srcreg = (ipc->opcode >> 9) & 7; ! 1382: uint8 srcdata = DATAREG(srcreg); ! 1383: int dstreg = (ipc->opcode >> 0) & 7; ! 1384: uint32 dstaddr = ADDRREG(dstreg); ! 1385: uint32 dstaddr_tmp = (ADDRREG(dstreg)+= (dstreg == 7 ? 2 : 1), 0); ! 1386: uint8 dstdata = fetchbyte(dstaddr); ! 1387: uint8 outdata = dstdata; ! 1388: ! 1389: outdata^= srcdata; ! 1390: storebyte(dstaddr, outdata); ! 1391: ! 1392: NFLAG = ((sint8)outdata) < 0; ! 1393: ZFLAG = !outdata; ! 1394: VFLAG = 0; ! 1395: CFLAG = 0; ! 1396: PC+= 2; ! 1397: } ! 1398: ! 1399: void cpu_op_1280a(t_ipc *ipc) /* EOR */ { ! 1400: /* mask f1f8, bits b120, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1401: int srcreg = (ipc->opcode >> 9) & 7; ! 1402: uint8 srcdata = DATAREG(srcreg); ! 1403: int dstreg = (ipc->opcode >> 0) & 7; ! 1404: uint32 dstaddr = (ADDRREG(dstreg)-= (dstreg == 7 ? 2 : 1)); ! 1405: uint8 dstdata = fetchbyte(dstaddr); ! 1406: uint8 outdata = dstdata; ! 1407: ! 1408: outdata^= srcdata; ! 1409: storebyte(dstaddr, outdata); ! 1410: PC+= 2; ! 1411: } ! 1412: ! 1413: void cpu_op_1280b(t_ipc *ipc) /* EOR */ { ! 1414: /* mask f1f8, bits b120, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1415: int srcreg = (ipc->opcode >> 9) & 7; ! 1416: uint8 srcdata = DATAREG(srcreg); ! 1417: int dstreg = (ipc->opcode >> 0) & 7; ! 1418: uint32 dstaddr = (ADDRREG(dstreg)-= (dstreg == 7 ? 2 : 1)); ! 1419: uint8 dstdata = fetchbyte(dstaddr); ! 1420: uint8 outdata = dstdata; ! 1421: ! 1422: outdata^= srcdata; ! 1423: storebyte(dstaddr, outdata); ! 1424: ! 1425: NFLAG = ((sint8)outdata) < 0; ! 1426: ZFLAG = !outdata; ! 1427: VFLAG = 0; ! 1428: CFLAG = 0; ! 1429: PC+= 2; ! 1430: } ! 1431: ! 1432: void cpu_op_1281a(t_ipc *ipc) /* EOR */ { ! 1433: /* mask f1f8, bits b128, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1434: int srcreg = (ipc->opcode >> 9) & 7; ! 1435: uint8 srcdata = DATAREG(srcreg); ! 1436: int dstreg = (ipc->opcode >> 0) & 7; ! 1437: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1438: uint8 dstdata = fetchbyte(dstaddr); ! 1439: uint8 outdata = dstdata; ! 1440: ! 1441: outdata^= srcdata; ! 1442: storebyte(dstaddr, outdata); ! 1443: PC+= 4; ! 1444: } ! 1445: ! 1446: void cpu_op_1281b(t_ipc *ipc) /* EOR */ { ! 1447: /* mask f1f8, bits b128, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1448: int srcreg = (ipc->opcode >> 9) & 7; ! 1449: uint8 srcdata = DATAREG(srcreg); ! 1450: int dstreg = (ipc->opcode >> 0) & 7; ! 1451: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1452: uint8 dstdata = fetchbyte(dstaddr); ! 1453: uint8 outdata = dstdata; ! 1454: ! 1455: outdata^= srcdata; ! 1456: storebyte(dstaddr, outdata); ! 1457: ! 1458: NFLAG = ((sint8)outdata) < 0; ! 1459: ZFLAG = !outdata; ! 1460: VFLAG = 0; ! 1461: CFLAG = 0; ! 1462: PC+= 4; ! 1463: } ! 1464: ! 1465: void cpu_op_1282a(t_ipc *ipc) /* EOR */ { ! 1466: /* mask f1f8, bits b130, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1467: int srcreg = (ipc->opcode >> 9) & 7; ! 1468: uint8 srcdata = DATAREG(srcreg); ! 1469: int dstreg = (ipc->opcode >> 0) & 7; ! 1470: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1471: uint8 dstdata = fetchbyte(dstaddr); ! 1472: uint8 outdata = dstdata; ! 1473: ! 1474: outdata^= srcdata; ! 1475: storebyte(dstaddr, outdata); ! 1476: PC+= 4; ! 1477: } ! 1478: ! 1479: void cpu_op_1282b(t_ipc *ipc) /* EOR */ { ! 1480: /* mask f1f8, bits b130, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1481: int srcreg = (ipc->opcode >> 9) & 7; ! 1482: uint8 srcdata = DATAREG(srcreg); ! 1483: int dstreg = (ipc->opcode >> 0) & 7; ! 1484: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1485: uint8 dstdata = fetchbyte(dstaddr); ! 1486: uint8 outdata = dstdata; ! 1487: ! 1488: outdata^= srcdata; ! 1489: storebyte(dstaddr, outdata); ! 1490: ! 1491: NFLAG = ((sint8)outdata) < 0; ! 1492: ZFLAG = !outdata; ! 1493: VFLAG = 0; ! 1494: CFLAG = 0; ! 1495: PC+= 4; ! 1496: } ! 1497: ! 1498: void cpu_op_1283a(t_ipc *ipc) /* EOR */ { ! 1499: /* mask f1ff, bits b138, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1500: int srcreg = (ipc->opcode >> 9) & 7; ! 1501: uint8 srcdata = DATAREG(srcreg); ! 1502: uint32 dstaddr = ipc->dst; ! 1503: uint8 dstdata = fetchbyte(dstaddr); ! 1504: uint8 outdata = dstdata; ! 1505: ! 1506: outdata^= srcdata; ! 1507: storebyte(dstaddr, outdata); ! 1508: PC+= 4; ! 1509: } ! 1510: ! 1511: void cpu_op_1283b(t_ipc *ipc) /* EOR */ { ! 1512: /* mask f1ff, bits b138, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1513: int srcreg = (ipc->opcode >> 9) & 7; ! 1514: uint8 srcdata = DATAREG(srcreg); ! 1515: uint32 dstaddr = ipc->dst; ! 1516: uint8 dstdata = fetchbyte(dstaddr); ! 1517: uint8 outdata = dstdata; ! 1518: ! 1519: outdata^= srcdata; ! 1520: storebyte(dstaddr, outdata); ! 1521: ! 1522: NFLAG = ((sint8)outdata) < 0; ! 1523: ZFLAG = !outdata; ! 1524: VFLAG = 0; ! 1525: CFLAG = 0; ! 1526: PC+= 4; ! 1527: } ! 1528: ! 1529: void cpu_op_1284a(t_ipc *ipc) /* EOR */ { ! 1530: /* mask f1ff, bits b139, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1531: int srcreg = (ipc->opcode >> 9) & 7; ! 1532: uint8 srcdata = DATAREG(srcreg); ! 1533: uint32 dstaddr = ipc->dst; ! 1534: uint8 dstdata = fetchbyte(dstaddr); ! 1535: uint8 outdata = dstdata; ! 1536: ! 1537: outdata^= srcdata; ! 1538: storebyte(dstaddr, outdata); ! 1539: PC+= 6; ! 1540: } ! 1541: ! 1542: void cpu_op_1284b(t_ipc *ipc) /* EOR */ { ! 1543: /* mask f1ff, bits b139, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1544: int srcreg = (ipc->opcode >> 9) & 7; ! 1545: uint8 srcdata = DATAREG(srcreg); ! 1546: uint32 dstaddr = ipc->dst; ! 1547: uint8 dstdata = fetchbyte(dstaddr); ! 1548: uint8 outdata = dstdata; ! 1549: ! 1550: outdata^= srcdata; ! 1551: storebyte(dstaddr, outdata); ! 1552: ! 1553: NFLAG = ((sint8)outdata) < 0; ! 1554: ZFLAG = !outdata; ! 1555: VFLAG = 0; ! 1556: CFLAG = 0; ! 1557: PC+= 6; ! 1558: } ! 1559: ! 1560: void cpu_op_1285a(t_ipc *ipc) /* EOR */ { ! 1561: /* mask f1f8, bits b140, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1562: int srcreg = (ipc->opcode >> 9) & 7; ! 1563: uint16 srcdata = DATAREG(srcreg); ! 1564: int dstreg = (ipc->opcode >> 0) & 7; ! 1565: uint16 dstdata = DATAREG(dstreg); ! 1566: uint16 outdata = dstdata; ! 1567: ! 1568: outdata^= srcdata; ! 1569: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1570: PC+= 2; ! 1571: } ! 1572: ! 1573: void cpu_op_1285b(t_ipc *ipc) /* EOR */ { ! 1574: /* mask f1f8, bits b140, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1575: int srcreg = (ipc->opcode >> 9) & 7; ! 1576: uint16 srcdata = DATAREG(srcreg); ! 1577: int dstreg = (ipc->opcode >> 0) & 7; ! 1578: uint16 dstdata = DATAREG(dstreg); ! 1579: uint16 outdata = dstdata; ! 1580: ! 1581: outdata^= srcdata; ! 1582: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata; ! 1583: ! 1584: NFLAG = ((sint16)outdata) < 0; ! 1585: ZFLAG = !outdata; ! 1586: VFLAG = 0; ! 1587: CFLAG = 0; ! 1588: PC+= 2; ! 1589: } ! 1590: ! 1591: void cpu_op_1286a(t_ipc *ipc) /* EOR */ { ! 1592: /* mask f1f8, bits b150, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1593: int srcreg = (ipc->opcode >> 9) & 7; ! 1594: uint16 srcdata = DATAREG(srcreg); ! 1595: int dstreg = (ipc->opcode >> 0) & 7; ! 1596: uint32 dstaddr = ADDRREG(dstreg); ! 1597: uint16 dstdata = fetchword(dstaddr); ! 1598: uint16 outdata = dstdata; ! 1599: ! 1600: outdata^= srcdata; ! 1601: storeword(dstaddr, outdata); ! 1602: PC+= 2; ! 1603: } ! 1604: ! 1605: void cpu_op_1286b(t_ipc *ipc) /* EOR */ { ! 1606: /* mask f1f8, bits b150, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1607: int srcreg = (ipc->opcode >> 9) & 7; ! 1608: uint16 srcdata = DATAREG(srcreg); ! 1609: int dstreg = (ipc->opcode >> 0) & 7; ! 1610: uint32 dstaddr = ADDRREG(dstreg); ! 1611: uint16 dstdata = fetchword(dstaddr); ! 1612: uint16 outdata = dstdata; ! 1613: ! 1614: outdata^= srcdata; ! 1615: storeword(dstaddr, outdata); ! 1616: ! 1617: NFLAG = ((sint16)outdata) < 0; ! 1618: ZFLAG = !outdata; ! 1619: VFLAG = 0; ! 1620: CFLAG = 0; ! 1621: PC+= 2; ! 1622: } ! 1623: ! 1624: void cpu_op_1287a(t_ipc *ipc) /* EOR */ { ! 1625: /* mask f1f8, bits b158, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1626: int srcreg = (ipc->opcode >> 9) & 7; ! 1627: uint16 srcdata = DATAREG(srcreg); ! 1628: int dstreg = (ipc->opcode >> 0) & 7; ! 1629: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1630: uint16 dstdata = fetchword(dstaddr); ! 1631: uint16 outdata = dstdata; ! 1632: ! 1633: outdata^= srcdata; ! 1634: storeword(dstaddr, outdata); ! 1635: PC+= 2; ! 1636: } ! 1637: ! 1638: void cpu_op_1287b(t_ipc *ipc) /* EOR */ { ! 1639: /* mask f1f8, bits b158, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1640: int srcreg = (ipc->opcode >> 9) & 7; ! 1641: uint16 srcdata = DATAREG(srcreg); ! 1642: int dstreg = (ipc->opcode >> 0) & 7; ! 1643: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 1644: uint16 dstdata = fetchword(dstaddr); ! 1645: uint16 outdata = dstdata; ! 1646: ! 1647: outdata^= srcdata; ! 1648: storeword(dstaddr, outdata); ! 1649: ! 1650: NFLAG = ((sint16)outdata) < 0; ! 1651: ZFLAG = !outdata; ! 1652: VFLAG = 0; ! 1653: CFLAG = 0; ! 1654: PC+= 2; ! 1655: } ! 1656: ! 1657: void cpu_op_1288a(t_ipc *ipc) /* EOR */ { ! 1658: /* mask f1f8, bits b160, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1659: int srcreg = (ipc->opcode >> 9) & 7; ! 1660: uint16 srcdata = DATAREG(srcreg); ! 1661: int dstreg = (ipc->opcode >> 0) & 7; ! 1662: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1663: uint16 dstdata = fetchword(dstaddr); ! 1664: uint16 outdata = dstdata; ! 1665: ! 1666: outdata^= srcdata; ! 1667: storeword(dstaddr, outdata); ! 1668: PC+= 2; ! 1669: } ! 1670: ! 1671: void cpu_op_1288b(t_ipc *ipc) /* EOR */ { ! 1672: /* mask f1f8, bits b160, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1673: int srcreg = (ipc->opcode >> 9) & 7; ! 1674: uint16 srcdata = DATAREG(srcreg); ! 1675: int dstreg = (ipc->opcode >> 0) & 7; ! 1676: uint32 dstaddr = ADDRREG(dstreg)-=2; ! 1677: uint16 dstdata = fetchword(dstaddr); ! 1678: uint16 outdata = dstdata; ! 1679: ! 1680: outdata^= srcdata; ! 1681: storeword(dstaddr, outdata); ! 1682: ! 1683: NFLAG = ((sint16)outdata) < 0; ! 1684: ZFLAG = !outdata; ! 1685: VFLAG = 0; ! 1686: CFLAG = 0; ! 1687: PC+= 2; ! 1688: } ! 1689: ! 1690: void cpu_op_1289a(t_ipc *ipc) /* EOR */ { ! 1691: /* mask f1f8, bits b168, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1692: int srcreg = (ipc->opcode >> 9) & 7; ! 1693: uint16 srcdata = DATAREG(srcreg); ! 1694: int dstreg = (ipc->opcode >> 0) & 7; ! 1695: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1696: uint16 dstdata = fetchword(dstaddr); ! 1697: uint16 outdata = dstdata; ! 1698: ! 1699: outdata^= srcdata; ! 1700: storeword(dstaddr, outdata); ! 1701: PC+= 4; ! 1702: } ! 1703: ! 1704: void cpu_op_1289b(t_ipc *ipc) /* EOR */ { ! 1705: /* mask f1f8, bits b168, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1706: int srcreg = (ipc->opcode >> 9) & 7; ! 1707: uint16 srcdata = DATAREG(srcreg); ! 1708: int dstreg = (ipc->opcode >> 0) & 7; ! 1709: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1710: uint16 dstdata = fetchword(dstaddr); ! 1711: uint16 outdata = dstdata; ! 1712: ! 1713: outdata^= srcdata; ! 1714: storeword(dstaddr, outdata); ! 1715: ! 1716: NFLAG = ((sint16)outdata) < 0; ! 1717: ZFLAG = !outdata; ! 1718: VFLAG = 0; ! 1719: CFLAG = 0; ! 1720: PC+= 4; ! 1721: } ! 1722: ! 1723: void cpu_op_1290a(t_ipc *ipc) /* EOR */ { ! 1724: /* mask f1f8, bits b170, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1725: int srcreg = (ipc->opcode >> 9) & 7; ! 1726: uint16 srcdata = DATAREG(srcreg); ! 1727: int dstreg = (ipc->opcode >> 0) & 7; ! 1728: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1729: uint16 dstdata = fetchword(dstaddr); ! 1730: uint16 outdata = dstdata; ! 1731: ! 1732: outdata^= srcdata; ! 1733: storeword(dstaddr, outdata); ! 1734: PC+= 4; ! 1735: } ! 1736: ! 1737: void cpu_op_1290b(t_ipc *ipc) /* EOR */ { ! 1738: /* mask f1f8, bits b170, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1739: int srcreg = (ipc->opcode >> 9) & 7; ! 1740: uint16 srcdata = DATAREG(srcreg); ! 1741: int dstreg = (ipc->opcode >> 0) & 7; ! 1742: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1743: uint16 dstdata = fetchword(dstaddr); ! 1744: uint16 outdata = dstdata; ! 1745: ! 1746: outdata^= srcdata; ! 1747: storeword(dstaddr, outdata); ! 1748: ! 1749: NFLAG = ((sint16)outdata) < 0; ! 1750: ZFLAG = !outdata; ! 1751: VFLAG = 0; ! 1752: CFLAG = 0; ! 1753: PC+= 4; ! 1754: } ! 1755: ! 1756: void cpu_op_1291a(t_ipc *ipc) /* EOR */ { ! 1757: /* mask f1ff, bits b178, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1758: int srcreg = (ipc->opcode >> 9) & 7; ! 1759: uint16 srcdata = DATAREG(srcreg); ! 1760: uint32 dstaddr = ipc->dst; ! 1761: uint16 dstdata = fetchword(dstaddr); ! 1762: uint16 outdata = dstdata; ! 1763: ! 1764: outdata^= srcdata; ! 1765: storeword(dstaddr, outdata); ! 1766: PC+= 4; ! 1767: } ! 1768: ! 1769: void cpu_op_1291b(t_ipc *ipc) /* EOR */ { ! 1770: /* mask f1ff, bits b178, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1771: int srcreg = (ipc->opcode >> 9) & 7; ! 1772: uint16 srcdata = DATAREG(srcreg); ! 1773: uint32 dstaddr = ipc->dst; ! 1774: uint16 dstdata = fetchword(dstaddr); ! 1775: uint16 outdata = dstdata; ! 1776: ! 1777: outdata^= srcdata; ! 1778: storeword(dstaddr, outdata); ! 1779: ! 1780: NFLAG = ((sint16)outdata) < 0; ! 1781: ZFLAG = !outdata; ! 1782: VFLAG = 0; ! 1783: CFLAG = 0; ! 1784: PC+= 4; ! 1785: } ! 1786: ! 1787: void cpu_op_1292a(t_ipc *ipc) /* EOR */ { ! 1788: /* mask f1ff, bits b179, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1789: int srcreg = (ipc->opcode >> 9) & 7; ! 1790: uint16 srcdata = DATAREG(srcreg); ! 1791: uint32 dstaddr = ipc->dst; ! 1792: uint16 dstdata = fetchword(dstaddr); ! 1793: uint16 outdata = dstdata; ! 1794: ! 1795: outdata^= srcdata; ! 1796: storeword(dstaddr, outdata); ! 1797: PC+= 6; ! 1798: } ! 1799: ! 1800: void cpu_op_1292b(t_ipc *ipc) /* EOR */ { ! 1801: /* mask f1ff, bits b179, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1802: int srcreg = (ipc->opcode >> 9) & 7; ! 1803: uint16 srcdata = DATAREG(srcreg); ! 1804: uint32 dstaddr = ipc->dst; ! 1805: uint16 dstdata = fetchword(dstaddr); ! 1806: uint16 outdata = dstdata; ! 1807: ! 1808: outdata^= srcdata; ! 1809: storeword(dstaddr, outdata); ! 1810: ! 1811: NFLAG = ((sint16)outdata) < 0; ! 1812: ZFLAG = !outdata; ! 1813: VFLAG = 0; ! 1814: CFLAG = 0; ! 1815: PC+= 6; ! 1816: } ! 1817: ! 1818: void cpu_op_1293a(t_ipc *ipc) /* EOR */ { ! 1819: /* mask f1f8, bits b180, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1820: int srcreg = (ipc->opcode >> 9) & 7; ! 1821: uint32 srcdata = DATAREG(srcreg); ! 1822: int dstreg = (ipc->opcode >> 0) & 7; ! 1823: uint32 dstdata = DATAREG(dstreg); ! 1824: uint32 outdata = dstdata; ! 1825: ! 1826: outdata^= srcdata; ! 1827: DATAREG(dstreg) = outdata; ! 1828: PC+= 2; ! 1829: } ! 1830: ! 1831: void cpu_op_1293b(t_ipc *ipc) /* EOR */ { ! 1832: /* mask f1f8, bits b180, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1833: int srcreg = (ipc->opcode >> 9) & 7; ! 1834: uint32 srcdata = DATAREG(srcreg); ! 1835: int dstreg = (ipc->opcode >> 0) & 7; ! 1836: uint32 dstdata = DATAREG(dstreg); ! 1837: uint32 outdata = dstdata; ! 1838: ! 1839: outdata^= srcdata; ! 1840: DATAREG(dstreg) = outdata; ! 1841: ! 1842: NFLAG = ((sint32)outdata) < 0; ! 1843: ZFLAG = !outdata; ! 1844: VFLAG = 0; ! 1845: CFLAG = 0; ! 1846: PC+= 2; ! 1847: } ! 1848: ! 1849: void cpu_op_1294a(t_ipc *ipc) /* EOR */ { ! 1850: /* mask f1f8, bits b190, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1851: int srcreg = (ipc->opcode >> 9) & 7; ! 1852: uint32 srcdata = DATAREG(srcreg); ! 1853: int dstreg = (ipc->opcode >> 0) & 7; ! 1854: uint32 dstaddr = ADDRREG(dstreg); ! 1855: uint32 dstdata = fetchlong(dstaddr); ! 1856: uint32 outdata = dstdata; ! 1857: ! 1858: outdata^= srcdata; ! 1859: storelong(dstaddr, outdata); ! 1860: PC+= 2; ! 1861: } ! 1862: ! 1863: void cpu_op_1294b(t_ipc *ipc) /* EOR */ { ! 1864: /* mask f1f8, bits b190, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 2, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1865: int srcreg = (ipc->opcode >> 9) & 7; ! 1866: uint32 srcdata = DATAREG(srcreg); ! 1867: int dstreg = (ipc->opcode >> 0) & 7; ! 1868: uint32 dstaddr = ADDRREG(dstreg); ! 1869: uint32 dstdata = fetchlong(dstaddr); ! 1870: uint32 outdata = dstdata; ! 1871: ! 1872: outdata^= srcdata; ! 1873: storelong(dstaddr, outdata); ! 1874: ! 1875: NFLAG = ((sint32)outdata) < 0; ! 1876: ZFLAG = !outdata; ! 1877: VFLAG = 0; ! 1878: CFLAG = 0; ! 1879: PC+= 2; ! 1880: } ! 1881: ! 1882: void cpu_op_1295a(t_ipc *ipc) /* EOR */ { ! 1883: /* mask f1f8, bits b198, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1884: int srcreg = (ipc->opcode >> 9) & 7; ! 1885: uint32 srcdata = DATAREG(srcreg); ! 1886: int dstreg = (ipc->opcode >> 0) & 7; ! 1887: uint32 dstaddr = (ADDRREG(dstreg)+=4, ADDRREG(dstreg)-4); ! 1888: uint32 dstdata = fetchlong(dstaddr); ! 1889: uint32 outdata = dstdata; ! 1890: ! 1891: outdata^= srcdata; ! 1892: storelong(dstaddr, outdata); ! 1893: PC+= 2; ! 1894: } ! 1895: ! 1896: void cpu_op_1295b(t_ipc *ipc) /* EOR */ { ! 1897: /* mask f1f8, bits b198, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 3, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1898: int srcreg = (ipc->opcode >> 9) & 7; ! 1899: uint32 srcdata = DATAREG(srcreg); ! 1900: int dstreg = (ipc->opcode >> 0) & 7; ! 1901: uint32 dstaddr = (ADDRREG(dstreg)+=4, ADDRREG(dstreg)-4); ! 1902: uint32 dstdata = fetchlong(dstaddr); ! 1903: uint32 outdata = dstdata; ! 1904: ! 1905: outdata^= srcdata; ! 1906: storelong(dstaddr, outdata); ! 1907: ! 1908: NFLAG = ((sint32)outdata) < 0; ! 1909: ZFLAG = !outdata; ! 1910: VFLAG = 0; ! 1911: CFLAG = 0; ! 1912: PC+= 2; ! 1913: } ! 1914: ! 1915: void cpu_op_1296a(t_ipc *ipc) /* EOR */ { ! 1916: /* mask f1f8, bits b1a0, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1917: int srcreg = (ipc->opcode >> 9) & 7; ! 1918: uint32 srcdata = DATAREG(srcreg); ! 1919: int dstreg = (ipc->opcode >> 0) & 7; ! 1920: uint32 dstaddr = ADDRREG(dstreg)-=4; ! 1921: uint32 dstdata = fetchlong(dstaddr); ! 1922: uint32 outdata = dstdata; ! 1923: ! 1924: outdata^= srcdata; ! 1925: storelong(dstaddr, outdata); ! 1926: PC+= 2; ! 1927: } ! 1928: ! 1929: void cpu_op_1296b(t_ipc *ipc) /* EOR */ { ! 1930: /* mask f1f8, bits b1a0, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 4, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1931: int srcreg = (ipc->opcode >> 9) & 7; ! 1932: uint32 srcdata = DATAREG(srcreg); ! 1933: int dstreg = (ipc->opcode >> 0) & 7; ! 1934: uint32 dstaddr = ADDRREG(dstreg)-=4; ! 1935: uint32 dstdata = fetchlong(dstaddr); ! 1936: uint32 outdata = dstdata; ! 1937: ! 1938: outdata^= srcdata; ! 1939: storelong(dstaddr, outdata); ! 1940: ! 1941: NFLAG = ((sint32)outdata) < 0; ! 1942: ZFLAG = !outdata; ! 1943: VFLAG = 0; ! 1944: CFLAG = 0; ! 1945: PC+= 2; ! 1946: } ! 1947: ! 1948: void cpu_op_1297a(t_ipc *ipc) /* EOR */ { ! 1949: /* mask f1f8, bits b1a8, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1950: int srcreg = (ipc->opcode >> 9) & 7; ! 1951: uint32 srcdata = DATAREG(srcreg); ! 1952: int dstreg = (ipc->opcode >> 0) & 7; ! 1953: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1954: uint32 dstdata = fetchlong(dstaddr); ! 1955: uint32 outdata = dstdata; ! 1956: ! 1957: outdata^= srcdata; ! 1958: storelong(dstaddr, outdata); ! 1959: PC+= 4; ! 1960: } ! 1961: ! 1962: void cpu_op_1297b(t_ipc *ipc) /* EOR */ { ! 1963: /* mask f1f8, bits b1a8, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 5, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1964: int srcreg = (ipc->opcode >> 9) & 7; ! 1965: uint32 srcdata = DATAREG(srcreg); ! 1966: int dstreg = (ipc->opcode >> 0) & 7; ! 1967: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst; ! 1968: uint32 dstdata = fetchlong(dstaddr); ! 1969: uint32 outdata = dstdata; ! 1970: ! 1971: outdata^= srcdata; ! 1972: storelong(dstaddr, outdata); ! 1973: ! 1974: NFLAG = ((sint32)outdata) < 0; ! 1975: ZFLAG = !outdata; ! 1976: VFLAG = 0; ! 1977: CFLAG = 0; ! 1978: PC+= 4; ! 1979: } ! 1980: ! 1981: void cpu_op_1298a(t_ipc *ipc) /* EOR */ { ! 1982: /* mask f1f8, bits b1b0, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1983: int srcreg = (ipc->opcode >> 9) & 7; ! 1984: uint32 srcdata = DATAREG(srcreg); ! 1985: int dstreg = (ipc->opcode >> 0) & 7; ! 1986: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 1987: uint32 dstdata = fetchlong(dstaddr); ! 1988: uint32 outdata = dstdata; ! 1989: ! 1990: outdata^= srcdata; ! 1991: storelong(dstaddr, outdata); ! 1992: PC+= 4; ! 1993: } ! 1994: ! 1995: void cpu_op_1298b(t_ipc *ipc) /* EOR */ { ! 1996: /* mask f1f8, bits b1b0, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 6, sbitpos 9, dbitpos 0, immvalue 0 */ ! 1997: int srcreg = (ipc->opcode >> 9) & 7; ! 1998: uint32 srcdata = DATAREG(srcreg); ! 1999: int dstreg = (ipc->opcode >> 0) & 7; ! 2000: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc); ! 2001: uint32 dstdata = fetchlong(dstaddr); ! 2002: uint32 outdata = dstdata; ! 2003: ! 2004: outdata^= srcdata; ! 2005: storelong(dstaddr, outdata); ! 2006: ! 2007: NFLAG = ((sint32)outdata) < 0; ! 2008: ZFLAG = !outdata; ! 2009: VFLAG = 0; ! 2010: CFLAG = 0; ! 2011: PC+= 4; ! 2012: } ! 2013: ! 2014: void cpu_op_1299a(t_ipc *ipc) /* EOR */ { ! 2015: /* mask f1ff, bits b1b8, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 2016: int srcreg = (ipc->opcode >> 9) & 7; ! 2017: uint32 srcdata = DATAREG(srcreg); ! 2018: uint32 dstaddr = ipc->dst; ! 2019: uint32 dstdata = fetchlong(dstaddr); ! 2020: uint32 outdata = dstdata; ! 2021: ! 2022: outdata^= srcdata; ! 2023: storelong(dstaddr, outdata); ! 2024: PC+= 4; ! 2025: } ! 2026: ! 2027: void cpu_op_1299b(t_ipc *ipc) /* EOR */ { ! 2028: /* mask f1ff, bits b1b8, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 7, sbitpos 9, dbitpos 0, immvalue 0 */ ! 2029: int srcreg = (ipc->opcode >> 9) & 7; ! 2030: uint32 srcdata = DATAREG(srcreg); ! 2031: uint32 dstaddr = ipc->dst; ! 2032: uint32 dstdata = fetchlong(dstaddr); ! 2033: uint32 outdata = dstdata; ! 2034: ! 2035: outdata^= srcdata; ! 2036: storelong(dstaddr, outdata); ! 2037: ! 2038: NFLAG = ((sint32)outdata) < 0; ! 2039: ZFLAG = !outdata; ! 2040: VFLAG = 0; ! 2041: CFLAG = 0; ! 2042: PC+= 4; ! 2043: } ! 2044: ! 2045: void cpu_op_1300a(t_ipc *ipc) /* EOR */ { ! 2046: /* mask f1ff, bits b1b9, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 2047: int srcreg = (ipc->opcode >> 9) & 7; ! 2048: uint32 srcdata = DATAREG(srcreg); ! 2049: uint32 dstaddr = ipc->dst; ! 2050: uint32 dstdata = fetchlong(dstaddr); ! 2051: uint32 outdata = dstdata; ! 2052: ! 2053: outdata^= srcdata; ! 2054: storelong(dstaddr, outdata); ! 2055: PC+= 6; ! 2056: } ! 2057: ! 2058: void cpu_op_1300b(t_ipc *ipc) /* EOR */ { ! 2059: /* mask f1ff, bits b1b9, mnemonic 5, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 8, sbitpos 9, dbitpos 0, immvalue 0 */ ! 2060: int srcreg = (ipc->opcode >> 9) & 7; ! 2061: uint32 srcdata = DATAREG(srcreg); ! 2062: uint32 dstaddr = ipc->dst; ! 2063: uint32 dstdata = fetchlong(dstaddr); ! 2064: uint32 outdata = dstdata; ! 2065: ! 2066: outdata^= srcdata; ! 2067: storelong(dstaddr, outdata); ! 2068: ! 2069: NFLAG = ((sint32)outdata) < 0; ! 2070: ZFLAG = !outdata; ! 2071: VFLAG = 0; ! 2072: CFLAG = 0; ! 2073: PC+= 6; ! 2074: } ! 2075: ! 2076: void cpu_op_1301a(t_ipc *ipc) /* CMP */ { ! 2077: /* mask f1f8, bits b108, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2078: int srcreg = (ipc->opcode >> 0) & 7; ! 2079: uint32 srcaddr = ADDRREG(srcreg); ! 2080: uint32 srcaddr_tmp = (ADDRREG(srcreg)+= (srcreg == 7 ? 2 : 1), 0); ! 2081: uint8 srcdata = fetchbyte(srcaddr); ! 2082: int dstreg = (ipc->opcode >> 9) & 7; ! 2083: uint32 dstaddr = ADDRREG(dstreg); ! 2084: uint32 dstaddr_tmp = (ADDRREG(dstreg)+= (dstreg == 7 ? 2 : 1), 0); ! 2085: uint8 dstdata = fetchbyte(dstaddr); ! 2086: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 2087: PC+= 2; ! 2088: } ! 2089: ! 2090: void cpu_op_1301b(t_ipc *ipc) /* CMP */ { ! 2091: /* mask f1f8, bits b108, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2092: int srcreg = (ipc->opcode >> 0) & 7; ! 2093: uint32 srcaddr = ADDRREG(srcreg); ! 2094: uint32 srcaddr_tmp = (ADDRREG(srcreg)+= (srcreg == 7 ? 2 : 1), 0); ! 2095: uint8 srcdata = fetchbyte(srcaddr); ! 2096: int dstreg = (ipc->opcode >> 9) & 7; ! 2097: uint32 dstaddr = ADDRREG(dstreg); ! 2098: uint32 dstaddr_tmp = (ADDRREG(dstreg)+= (dstreg == 7 ? 2 : 1), 0); ! 2099: uint8 dstdata = fetchbyte(dstaddr); ! 2100: uint8 outdata = (sint8)dstdata - (sint8)srcdata; ! 2101: ! 2102: VFLAG = (((sint8)srcdata < 0) != ((sint8)dstdata < 0)) && ! 2103: (((sint8)dstdata < 0) != ((sint8)outdata < 0)); ! 2104: CFLAG = srcdata > dstdata; ! 2105: NFLAG = ((sint8)outdata) < 0; ! 2106: ZFLAG = !outdata; ! 2107: PC+= 2; ! 2108: } ! 2109: ! 2110: void cpu_op_1302a(t_ipc *ipc) /* CMP */ { ! 2111: /* mask f1f8, bits b148, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2112: int srcreg = (ipc->opcode >> 0) & 7; ! 2113: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 2114: uint16 srcdata = fetchword(srcaddr); ! 2115: int dstreg = (ipc->opcode >> 9) & 7; ! 2116: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2117: uint16 dstdata = fetchword(dstaddr); ! 2118: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 2119: PC+= 2; ! 2120: } ! 2121: ! 2122: void cpu_op_1302b(t_ipc *ipc) /* CMP */ { ! 2123: /* mask f1f8, bits b148, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2124: int srcreg = (ipc->opcode >> 0) & 7; ! 2125: uint32 srcaddr = (ADDRREG(srcreg)+=2, ADDRREG(srcreg)-2); ! 2126: uint16 srcdata = fetchword(srcaddr); ! 2127: int dstreg = (ipc->opcode >> 9) & 7; ! 2128: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2); ! 2129: uint16 dstdata = fetchword(dstaddr); ! 2130: uint16 outdata = (sint16)dstdata - (sint16)srcdata; ! 2131: ! 2132: VFLAG = (((sint16)srcdata < 0) != ((sint16)dstdata < 0)) && ! 2133: (((sint16)dstdata < 0) != ((sint16)outdata < 0)); ! 2134: CFLAG = srcdata > dstdata; ! 2135: NFLAG = ((sint16)outdata) < 0; ! 2136: ZFLAG = !outdata; ! 2137: PC+= 2; ! 2138: } ! 2139: ! 2140: void cpu_op_1303a(t_ipc *ipc) /* CMP */ { ! 2141: /* mask f1f8, bits b188, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2142: int srcreg = (ipc->opcode >> 0) & 7; ! 2143: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 2144: uint32 srcdata = fetchlong(srcaddr); ! 2145: int dstreg = (ipc->opcode >> 9) & 7; ! 2146: uint32 dstaddr = (ADDRREG(dstreg)+=4, ADDRREG(dstreg)-4); ! 2147: uint32 dstdata = fetchlong(dstaddr); ! 2148: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2149: PC+= 2; ! 2150: } ! 2151: ! 2152: void cpu_op_1303b(t_ipc *ipc) /* CMP */ { ! 2153: /* mask f1f8, bits b188, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 3, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2154: int srcreg = (ipc->opcode >> 0) & 7; ! 2155: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 2156: uint32 srcdata = fetchlong(srcaddr); ! 2157: int dstreg = (ipc->opcode >> 9) & 7; ! 2158: uint32 dstaddr = (ADDRREG(dstreg)+=4, ADDRREG(dstreg)-4); ! 2159: uint32 dstdata = fetchlong(dstaddr); ! 2160: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2161: ! 2162: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2163: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2164: CFLAG = srcdata > dstdata; ! 2165: NFLAG = ((sint32)outdata) < 0; ! 2166: ZFLAG = !outdata; ! 2167: PC+= 2; ! 2168: } ! 2169: ! 2170: void cpu_op_1304a(t_ipc *ipc) /* CMP */ { ! 2171: /* mask f1f8, bits b1c0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2172: int srcreg = (ipc->opcode >> 0) & 7; ! 2173: uint32 srcdata = DATAREG(srcreg); ! 2174: int dstreg = (ipc->opcode >> 9) & 7; ! 2175: uint32 dstdata = ADDRREG(dstreg); ! 2176: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2177: PC+= 2; ! 2178: } ! 2179: ! 2180: void cpu_op_1304b(t_ipc *ipc) /* CMP */ { ! 2181: /* mask f1f8, bits b1c0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2182: int srcreg = (ipc->opcode >> 0) & 7; ! 2183: uint32 srcdata = DATAREG(srcreg); ! 2184: int dstreg = (ipc->opcode >> 9) & 7; ! 2185: uint32 dstdata = ADDRREG(dstreg); ! 2186: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2187: ! 2188: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2189: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2190: CFLAG = srcdata > dstdata; ! 2191: NFLAG = ((sint32)outdata) < 0; ! 2192: ZFLAG = !outdata; ! 2193: PC+= 2; ! 2194: } ! 2195: ! 2196: void cpu_op_1305a(t_ipc *ipc) /* CMP */ { ! 2197: /* mask f1f8, bits b1c8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 1, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2198: int srcreg = (ipc->opcode >> 0) & 7; ! 2199: uint32 srcdata = ADDRREG(srcreg); ! 2200: int dstreg = (ipc->opcode >> 9) & 7; ! 2201: uint32 dstdata = ADDRREG(dstreg); ! 2202: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2203: PC+= 2; ! 2204: } ! 2205: ! 2206: void cpu_op_1305b(t_ipc *ipc) /* CMP */ { ! 2207: /* mask f1f8, bits b1c8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 1, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2208: int srcreg = (ipc->opcode >> 0) & 7; ! 2209: uint32 srcdata = ADDRREG(srcreg); ! 2210: int dstreg = (ipc->opcode >> 9) & 7; ! 2211: uint32 dstdata = ADDRREG(dstreg); ! 2212: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2213: ! 2214: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2215: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2216: CFLAG = srcdata > dstdata; ! 2217: NFLAG = ((sint32)outdata) < 0; ! 2218: ZFLAG = !outdata; ! 2219: PC+= 2; ! 2220: } ! 2221: ! 2222: void cpu_op_1306a(t_ipc *ipc) /* CMP */ { ! 2223: /* mask f1f8, bits b1d0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 2, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2224: int srcreg = (ipc->opcode >> 0) & 7; ! 2225: uint32 srcaddr = ADDRREG(srcreg); ! 2226: uint32 srcdata = fetchlong(srcaddr); ! 2227: int dstreg = (ipc->opcode >> 9) & 7; ! 2228: uint32 dstdata = ADDRREG(dstreg); ! 2229: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2230: PC+= 2; ! 2231: } ! 2232: ! 2233: void cpu_op_1306b(t_ipc *ipc) /* CMP */ { ! 2234: /* mask f1f8, bits b1d0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 2, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2235: int srcreg = (ipc->opcode >> 0) & 7; ! 2236: uint32 srcaddr = ADDRREG(srcreg); ! 2237: uint32 srcdata = fetchlong(srcaddr); ! 2238: int dstreg = (ipc->opcode >> 9) & 7; ! 2239: uint32 dstdata = ADDRREG(dstreg); ! 2240: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2241: ! 2242: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2243: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2244: CFLAG = srcdata > dstdata; ! 2245: NFLAG = ((sint32)outdata) < 0; ! 2246: ZFLAG = !outdata; ! 2247: PC+= 2; ! 2248: } ! 2249: ! 2250: void cpu_op_1307a(t_ipc *ipc) /* CMP */ { ! 2251: /* mask f1f8, bits b1d8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2252: int srcreg = (ipc->opcode >> 0) & 7; ! 2253: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 2254: uint32 srcdata = fetchlong(srcaddr); ! 2255: int dstreg = (ipc->opcode >> 9) & 7; ! 2256: uint32 dstdata = ADDRREG(dstreg); ! 2257: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2258: PC+= 2; ! 2259: } ! 2260: ! 2261: void cpu_op_1307b(t_ipc *ipc) /* CMP */ { ! 2262: /* mask f1f8, bits b1d8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 3, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2263: int srcreg = (ipc->opcode >> 0) & 7; ! 2264: uint32 srcaddr = (ADDRREG(srcreg)+=4, ADDRREG(srcreg)-4); ! 2265: uint32 srcdata = fetchlong(srcaddr); ! 2266: int dstreg = (ipc->opcode >> 9) & 7; ! 2267: uint32 dstdata = ADDRREG(dstreg); ! 2268: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2269: ! 2270: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2271: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2272: CFLAG = srcdata > dstdata; ! 2273: NFLAG = ((sint32)outdata) < 0; ! 2274: ZFLAG = !outdata; ! 2275: PC+= 2; ! 2276: } ! 2277: ! 2278: void cpu_op_1308a(t_ipc *ipc) /* CMP */ { ! 2279: /* mask f1f8, bits b1e0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 4, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2280: int srcreg = (ipc->opcode >> 0) & 7; ! 2281: uint32 srcaddr = ADDRREG(srcreg)-=4; ! 2282: uint32 srcdata = fetchlong(srcaddr); ! 2283: int dstreg = (ipc->opcode >> 9) & 7; ! 2284: uint32 dstdata = ADDRREG(dstreg); ! 2285: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2286: PC+= 2; ! 2287: } ! 2288: ! 2289: void cpu_op_1308b(t_ipc *ipc) /* CMP */ { ! 2290: /* mask f1f8, bits b1e0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 4, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2291: int srcreg = (ipc->opcode >> 0) & 7; ! 2292: uint32 srcaddr = ADDRREG(srcreg)-=4; ! 2293: uint32 srcdata = fetchlong(srcaddr); ! 2294: int dstreg = (ipc->opcode >> 9) & 7; ! 2295: uint32 dstdata = ADDRREG(dstreg); ! 2296: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2297: ! 2298: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2299: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2300: CFLAG = srcdata > dstdata; ! 2301: NFLAG = ((sint32)outdata) < 0; ! 2302: ZFLAG = !outdata; ! 2303: PC+= 2; ! 2304: } ! 2305: ! 2306: void cpu_op_1309a(t_ipc *ipc) /* CMP */ { ! 2307: /* mask f1f8, bits b1e8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 5, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2308: int srcreg = (ipc->opcode >> 0) & 7; ! 2309: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 2310: uint32 srcdata = fetchlong(srcaddr); ! 2311: int dstreg = (ipc->opcode >> 9) & 7; ! 2312: uint32 dstdata = ADDRREG(dstreg); ! 2313: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2314: PC+= 4; ! 2315: } ! 2316: ! 2317: void cpu_op_1309b(t_ipc *ipc) /* CMP */ { ! 2318: /* mask f1f8, bits b1e8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 5, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2319: int srcreg = (ipc->opcode >> 0) & 7; ! 2320: uint32 srcaddr = (sint32)ADDRREG(srcreg) + (sint32)(sint16)ipc->src; ! 2321: uint32 srcdata = fetchlong(srcaddr); ! 2322: int dstreg = (ipc->opcode >> 9) & 7; ! 2323: uint32 dstdata = ADDRREG(dstreg); ! 2324: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2325: ! 2326: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2327: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2328: CFLAG = srcdata > dstdata; ! 2329: NFLAG = ((sint32)outdata) < 0; ! 2330: ZFLAG = !outdata; ! 2331: PC+= 4; ! 2332: } ! 2333: ! 2334: void cpu_op_1310a(t_ipc *ipc) /* CMP */ { ! 2335: /* mask f1f8, bits b1f0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 6, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2336: int srcreg = (ipc->opcode >> 0) & 7; ! 2337: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 2338: uint32 srcdata = fetchlong(srcaddr); ! 2339: int dstreg = (ipc->opcode >> 9) & 7; ! 2340: uint32 dstdata = ADDRREG(dstreg); ! 2341: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2342: PC+= 4; ! 2343: } ! 2344: ! 2345: void cpu_op_1310b(t_ipc *ipc) /* CMP */ { ! 2346: /* mask f1f8, bits b1f0, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 6, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2347: int srcreg = (ipc->opcode >> 0) & 7; ! 2348: uint32 srcaddr = (sint32)ADDRREG(srcreg) + idxval_src(ipc); ! 2349: uint32 srcdata = fetchlong(srcaddr); ! 2350: int dstreg = (ipc->opcode >> 9) & 7; ! 2351: uint32 dstdata = ADDRREG(dstreg); ! 2352: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2353: ! 2354: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2355: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2356: CFLAG = srcdata > dstdata; ! 2357: NFLAG = ((sint32)outdata) < 0; ! 2358: ZFLAG = !outdata; ! 2359: PC+= 4; ! 2360: } ! 2361: ! 2362: void cpu_op_1311a(t_ipc *ipc) /* CMP */ { ! 2363: /* mask f1ff, bits b1f8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 7, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2364: uint32 srcaddr = ipc->src; ! 2365: uint32 srcdata = fetchlong(srcaddr); ! 2366: int dstreg = (ipc->opcode >> 9) & 7; ! 2367: uint32 dstdata = ADDRREG(dstreg); ! 2368: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2369: PC+= 4; ! 2370: } ! 2371: ! 2372: void cpu_op_1311b(t_ipc *ipc) /* CMP */ { ! 2373: /* mask f1ff, bits b1f8, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 7, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2374: uint32 srcaddr = ipc->src; ! 2375: uint32 srcdata = fetchlong(srcaddr); ! 2376: int dstreg = (ipc->opcode >> 9) & 7; ! 2377: uint32 dstdata = ADDRREG(dstreg); ! 2378: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2379: ! 2380: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2381: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2382: CFLAG = srcdata > dstdata; ! 2383: NFLAG = ((sint32)outdata) < 0; ! 2384: ZFLAG = !outdata; ! 2385: PC+= 4; ! 2386: } ! 2387: ! 2388: void cpu_op_1312a(t_ipc *ipc) /* CMP */ { ! 2389: /* mask f1ff, bits b1f9, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 8, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2390: uint32 srcaddr = ipc->src; ! 2391: uint32 srcdata = fetchlong(srcaddr); ! 2392: int dstreg = (ipc->opcode >> 9) & 7; ! 2393: uint32 dstdata = ADDRREG(dstreg); ! 2394: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2395: PC+= 6; ! 2396: } ! 2397: ! 2398: void cpu_op_1312b(t_ipc *ipc) /* CMP */ { ! 2399: /* mask f1ff, bits b1f9, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 8, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2400: uint32 srcaddr = ipc->src; ! 2401: uint32 srcdata = fetchlong(srcaddr); ! 2402: int dstreg = (ipc->opcode >> 9) & 7; ! 2403: uint32 dstdata = ADDRREG(dstreg); ! 2404: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2405: ! 2406: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2407: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2408: CFLAG = srcdata > dstdata; ! 2409: NFLAG = ((sint32)outdata) < 0; ! 2410: ZFLAG = !outdata; ! 2411: PC+= 6; ! 2412: } ! 2413: ! 2414: void cpu_op_1313a(t_ipc *ipc) /* CMP */ { ! 2415: /* mask f1ff, bits b1fa, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 9, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2416: uint32 srcaddr = ipc->src; ! 2417: uint32 srcdata = fetchlong(srcaddr); ! 2418: int dstreg = (ipc->opcode >> 9) & 7; ! 2419: uint32 dstdata = ADDRREG(dstreg); ! 2420: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2421: PC+= 4; ! 2422: } ! 2423: ! 2424: void cpu_op_1313b(t_ipc *ipc) /* CMP */ { ! 2425: /* mask f1ff, bits b1fa, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 9, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2426: uint32 srcaddr = ipc->src; ! 2427: uint32 srcdata = fetchlong(srcaddr); ! 2428: int dstreg = (ipc->opcode >> 9) & 7; ! 2429: uint32 dstdata = ADDRREG(dstreg); ! 2430: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2431: ! 2432: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2433: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2434: CFLAG = srcdata > dstdata; ! 2435: NFLAG = ((sint32)outdata) < 0; ! 2436: ZFLAG = !outdata; ! 2437: PC+= 4; ! 2438: } ! 2439: ! 2440: void cpu_op_1314a(t_ipc *ipc) /* CMP */ { ! 2441: /* mask f1ff, bits b1fb, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 10, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2442: uint32 srcaddr = idxval_src(ipc); ! 2443: uint32 srcdata = fetchlong(srcaddr); ! 2444: int dstreg = (ipc->opcode >> 9) & 7; ! 2445: uint32 dstdata = ADDRREG(dstreg); ! 2446: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2447: PC+= 4; ! 2448: } ! 2449: ! 2450: void cpu_op_1314b(t_ipc *ipc) /* CMP */ { ! 2451: /* mask f1ff, bits b1fb, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 10, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2452: uint32 srcaddr = idxval_src(ipc); ! 2453: uint32 srcdata = fetchlong(srcaddr); ! 2454: int dstreg = (ipc->opcode >> 9) & 7; ! 2455: uint32 dstdata = ADDRREG(dstreg); ! 2456: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2457: ! 2458: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2459: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2460: CFLAG = srcdata > dstdata; ! 2461: NFLAG = ((sint32)outdata) < 0; ! 2462: ZFLAG = !outdata; ! 2463: PC+= 4; ! 2464: } ! 2465: ! 2466: void cpu_op_1315a(t_ipc *ipc) /* CMP */ { ! 2467: /* mask f1ff, bits b1fc, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 13, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2468: uint32 srcdata = ipc->src; ! 2469: int dstreg = (ipc->opcode >> 9) & 7; ! 2470: uint32 dstdata = ADDRREG(dstreg); ! 2471: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2472: PC+= 6; ! 2473: } ! 2474: ! 2475: void cpu_op_1315b(t_ipc *ipc) /* CMP */ { ! 2476: /* mask f1ff, bits b1fc, mnemonic 15, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 13, dtype 1, sbitpos 0, dbitpos 9, immvalue 0 */ ! 2477: uint32 srcdata = ipc->src; ! 2478: int dstreg = (ipc->opcode >> 9) & 7; ! 2479: uint32 dstdata = ADDRREG(dstreg); ! 2480: uint32 outdata = (sint32)dstdata - (sint32)srcdata; ! 2481: ! 2482: VFLAG = (((sint32)srcdata < 0) != ((sint32)dstdata < 0)) && ! 2483: (((sint32)dstdata < 0) != ((sint32)outdata < 0)); ! 2484: CFLAG = srcdata > dstdata; ! 2485: NFLAG = ((sint32)outdata) < 0; ! 2486: ZFLAG = !outdata; ! 2487: PC+= 6; ! 2488: } ! 2489:
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