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1.1 root 1: /*****************************************************************************/
2: /* Generator - Sega Genesis emulation - (c) James Ponder 1997-1998 */
3: /*****************************************************************************/
4: /* */
5: /* cpu68k-e.c */
6: /* */
7: /*****************************************************************************/
8:
9: #include "generator.h"
10: #include "cpu68k.h"
11: #include "mem68k.h"
12: #include "reg68k.h"
13:
14: #include "cpu68k-inline.h"
15:
16: #include <stdio.h>
17:
18: void cpu_op_1484a(t_ipc *ipc) /* ASR */ {
19: /* mask f1f8, bits e000, mnemonic 66, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
20: unsigned int srcdata = ipc->src;
21: int dstreg = (ipc->opcode >> 0) & 7;
22: uint8 dstdata = DATAREG(dstreg);
23: uint8 bits = 8;
24: uint8 count = srcdata & 63;
25: uint8 outdata = ((sint8)dstdata) >> (count > 7 ? 7 : count);
26:
27: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
28: PC+= 2;
29: }
30:
31: void cpu_op_1484b(t_ipc *ipc) /* ASR */ {
32: /* mask f1f8, bits e000, mnemonic 66, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
33: unsigned int srcdata = ipc->src;
34: int dstreg = (ipc->opcode >> 0) & 7;
35: uint8 dstdata = DATAREG(dstreg);
36: uint8 bits = 8;
37: uint8 count = srcdata & 63;
38: uint8 outdata = ((sint8)dstdata) >> (count > 7 ? 7 : count);
39:
40: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
41:
42: if (!srcdata)
43: CFLAG = 0;
44: else if (srcdata >= bits) {
45: CFLAG = dstdata>>(bits-1);
46: XFLAG = dstdata>>(bits-1);
47: } else {
48: CFLAG = dstdata>>(count-1) & 1;
49: XFLAG = dstdata>>(count-1) & 1;
50: }
51: VFLAG = 0;
52: NFLAG = ((sint8)outdata) < 0;
53: ZFLAG = !outdata;
54: PC+= 2;
55: }
56:
57: void cpu_op_1485a(t_ipc *ipc) /* ASR */ {
58: /* mask f1f8, bits e040, mnemonic 66, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
59: unsigned int srcdata = ipc->src;
60: int dstreg = (ipc->opcode >> 0) & 7;
61: uint16 dstdata = DATAREG(dstreg);
62: uint8 bits = 16;
63: uint8 count = srcdata & 63;
64: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
65:
66: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
67: PC+= 2;
68: }
69:
70: void cpu_op_1485b(t_ipc *ipc) /* ASR */ {
71: /* mask f1f8, bits e040, mnemonic 66, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
72: unsigned int srcdata = ipc->src;
73: int dstreg = (ipc->opcode >> 0) & 7;
74: uint16 dstdata = DATAREG(dstreg);
75: uint8 bits = 16;
76: uint8 count = srcdata & 63;
77: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
78:
79: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
80:
81: if (!srcdata)
82: CFLAG = 0;
83: else if (srcdata >= bits) {
84: CFLAG = dstdata>>(bits-1);
85: XFLAG = dstdata>>(bits-1);
86: } else {
87: CFLAG = dstdata>>(count-1) & 1;
88: XFLAG = dstdata>>(count-1) & 1;
89: }
90: VFLAG = 0;
91: NFLAG = ((sint16)outdata) < 0;
92: ZFLAG = !outdata;
93: PC+= 2;
94: }
95:
96: void cpu_op_1486a(t_ipc *ipc) /* ASR */ {
97: /* mask f1f8, bits e080, mnemonic 66, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
98: unsigned int srcdata = ipc->src;
99: int dstreg = (ipc->opcode >> 0) & 7;
100: uint32 dstdata = DATAREG(dstreg);
101: uint8 bits = 32;
102: uint8 count = srcdata & 63;
103: uint32 outdata = ((sint32)dstdata) >> (count > 31 ? 31 : count);
104:
105: DATAREG(dstreg) = outdata;
106: PC+= 2;
107: }
108:
109: void cpu_op_1486b(t_ipc *ipc) /* ASR */ {
110: /* mask f1f8, bits e080, mnemonic 66, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
111: unsigned int srcdata = ipc->src;
112: int dstreg = (ipc->opcode >> 0) & 7;
113: uint32 dstdata = DATAREG(dstreg);
114: uint8 bits = 32;
115: uint8 count = srcdata & 63;
116: uint32 outdata = ((sint32)dstdata) >> (count > 31 ? 31 : count);
117:
118: DATAREG(dstreg) = outdata;
119:
120: if (!srcdata)
121: CFLAG = 0;
122: else if (srcdata >= bits) {
123: CFLAG = dstdata>>(bits-1);
124: XFLAG = dstdata>>(bits-1);
125: } else {
126: CFLAG = dstdata>>(count-1) & 1;
127: XFLAG = dstdata>>(count-1) & 1;
128: }
129: VFLAG = 0;
130: NFLAG = ((sint32)outdata) < 0;
131: ZFLAG = !outdata;
132: PC+= 2;
133: }
134:
135: void cpu_op_1487a(t_ipc *ipc) /* LSR */ {
136: /* mask f1f8, bits e008, mnemonic 67, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
137: unsigned int srcdata = ipc->src;
138: int dstreg = (ipc->opcode >> 0) & 7;
139: uint8 dstdata = DATAREG(dstreg);
140: uint8 bits = 8;
141: uint8 count = srcdata & 63;
142: uint8 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
143:
144: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
145: PC+= 2;
146: }
147:
148: void cpu_op_1487b(t_ipc *ipc) /* LSR */ {
149: /* mask f1f8, bits e008, mnemonic 67, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
150: unsigned int srcdata = ipc->src;
151: int dstreg = (ipc->opcode >> 0) & 7;
152: uint8 dstdata = DATAREG(dstreg);
153: uint8 bits = 8;
154: uint8 count = srcdata & 63;
155: uint8 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
156:
157: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
158:
159: if (!count)
160: CFLAG = 0;
161: else if (count >= bits) {
162: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
163: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
164: } else {
165: CFLAG = dstdata>>(count-1) & 1;
166: XFLAG = dstdata>>(count-1) & 1;
167: }
168: VFLAG = 0;
169: NFLAG = ((sint8)outdata) < 0;
170: ZFLAG = !outdata;
171: PC+= 2;
172: }
173:
174: void cpu_op_1488a(t_ipc *ipc) /* LSR */ {
175: /* mask f1f8, bits e048, mnemonic 67, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
176: unsigned int srcdata = ipc->src;
177: int dstreg = (ipc->opcode >> 0) & 7;
178: uint16 dstdata = DATAREG(dstreg);
179: uint8 bits = 16;
180: uint8 count = srcdata & 63;
181: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
182:
183: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
184: PC+= 2;
185: }
186:
187: void cpu_op_1488b(t_ipc *ipc) /* LSR */ {
188: /* mask f1f8, bits e048, mnemonic 67, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
189: unsigned int srcdata = ipc->src;
190: int dstreg = (ipc->opcode >> 0) & 7;
191: uint16 dstdata = DATAREG(dstreg);
192: uint8 bits = 16;
193: uint8 count = srcdata & 63;
194: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
195:
196: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
197:
198: if (!count)
199: CFLAG = 0;
200: else if (count >= bits) {
201: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
202: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
203: } else {
204: CFLAG = dstdata>>(count-1) & 1;
205: XFLAG = dstdata>>(count-1) & 1;
206: }
207: VFLAG = 0;
208: NFLAG = ((sint16)outdata) < 0;
209: ZFLAG = !outdata;
210: PC+= 2;
211: }
212:
213: void cpu_op_1489a(t_ipc *ipc) /* LSR */ {
214: /* mask f1f8, bits e088, mnemonic 67, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
215: unsigned int srcdata = ipc->src;
216: int dstreg = (ipc->opcode >> 0) & 7;
217: uint32 dstdata = DATAREG(dstreg);
218: uint8 bits = 32;
219: uint8 count = srcdata & 63;
220: uint32 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
221:
222: DATAREG(dstreg) = outdata;
223: PC+= 2;
224: }
225:
226: void cpu_op_1489b(t_ipc *ipc) /* LSR */ {
227: /* mask f1f8, bits e088, mnemonic 67, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
228: unsigned int srcdata = ipc->src;
229: int dstreg = (ipc->opcode >> 0) & 7;
230: uint32 dstdata = DATAREG(dstreg);
231: uint8 bits = 32;
232: uint8 count = srcdata & 63;
233: uint32 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
234:
235: DATAREG(dstreg) = outdata;
236:
237: if (!count)
238: CFLAG = 0;
239: else if (count >= bits) {
240: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
241: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
242: } else {
243: CFLAG = dstdata>>(count-1) & 1;
244: XFLAG = dstdata>>(count-1) & 1;
245: }
246: VFLAG = 0;
247: NFLAG = ((sint32)outdata) < 0;
248: ZFLAG = !outdata;
249: PC+= 2;
250: }
251:
252: void cpu_op_1490a(t_ipc *ipc) /* ROXR */ {
253: /* mask f1f8, bits e010, mnemonic 68, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
254: unsigned int srcdata = ipc->src;
255: int dstreg = (ipc->opcode >> 0) & 7;
256: uint8 dstdata = DATAREG(dstreg);
257: uint8 bits = 8;
258: uint8 loop = srcdata & 63;
259: uint8 cflag = CFLAG;
260: uint8 xflag = XFLAG;
261: uint8 outdata = dstdata;
262:
263: while(loop) {
264: cflag = outdata & 1;
265: outdata>>= 1;
266: if (xflag)
267: outdata |= 1<<(bits-1);
268: xflag = cflag;
269: loop--;
270: }
271: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
272: PC+= 2;
273: }
274:
275: void cpu_op_1490b(t_ipc *ipc) /* ROXR */ {
276: /* mask f1f8, bits e010, mnemonic 68, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
277: unsigned int srcdata = ipc->src;
278: int dstreg = (ipc->opcode >> 0) & 7;
279: uint8 dstdata = DATAREG(dstreg);
280: uint8 bits = 8;
281: uint8 loop = srcdata & 63;
282: uint8 cflag = CFLAG;
283: uint8 xflag = XFLAG;
284: uint8 outdata = dstdata;
285:
286: while(loop) {
287: cflag = outdata & 1;
288: outdata>>= 1;
289: if (xflag)
290: outdata |= 1<<(bits-1);
291: xflag = cflag;
292: loop--;
293: }
294: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
295:
296: XFLAG = xflag;
297: CFLAG = xflag;
298: NFLAG = ((sint8)outdata) < 0;
299: ZFLAG = !outdata;
300: VFLAG = 0;
301: PC+= 2;
302: }
303:
304: void cpu_op_1491a(t_ipc *ipc) /* ROXR */ {
305: /* mask f1f8, bits e050, mnemonic 68, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
306: unsigned int srcdata = ipc->src;
307: int dstreg = (ipc->opcode >> 0) & 7;
308: uint16 dstdata = DATAREG(dstreg);
309: uint8 bits = 16;
310: uint8 loop = srcdata & 63;
311: uint8 cflag = CFLAG;
312: uint8 xflag = XFLAG;
313: uint16 outdata = dstdata;
314:
315: while(loop) {
316: cflag = outdata & 1;
317: outdata>>= 1;
318: if (xflag)
319: outdata |= 1<<(bits-1);
320: xflag = cflag;
321: loop--;
322: }
323: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
324: PC+= 2;
325: }
326:
327: void cpu_op_1491b(t_ipc *ipc) /* ROXR */ {
328: /* mask f1f8, bits e050, mnemonic 68, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
329: unsigned int srcdata = ipc->src;
330: int dstreg = (ipc->opcode >> 0) & 7;
331: uint16 dstdata = DATAREG(dstreg);
332: uint8 bits = 16;
333: uint8 loop = srcdata & 63;
334: uint8 cflag = CFLAG;
335: uint8 xflag = XFLAG;
336: uint16 outdata = dstdata;
337:
338: while(loop) {
339: cflag = outdata & 1;
340: outdata>>= 1;
341: if (xflag)
342: outdata |= 1<<(bits-1);
343: xflag = cflag;
344: loop--;
345: }
346: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
347:
348: XFLAG = xflag;
349: CFLAG = xflag;
350: NFLAG = ((sint16)outdata) < 0;
351: ZFLAG = !outdata;
352: VFLAG = 0;
353: PC+= 2;
354: }
355:
356: void cpu_op_1492a(t_ipc *ipc) /* ROXR */ {
357: /* mask f1f8, bits e090, mnemonic 68, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
358: unsigned int srcdata = ipc->src;
359: int dstreg = (ipc->opcode >> 0) & 7;
360: uint32 dstdata = DATAREG(dstreg);
361: uint8 bits = 32;
362: uint8 loop = srcdata & 63;
363: uint8 cflag = CFLAG;
364: uint8 xflag = XFLAG;
365: uint32 outdata = dstdata;
366:
367: while(loop) {
368: cflag = outdata & 1;
369: outdata>>= 1;
370: if (xflag)
371: outdata |= 1<<(bits-1);
372: xflag = cflag;
373: loop--;
374: }
375: DATAREG(dstreg) = outdata;
376: PC+= 2;
377: }
378:
379: void cpu_op_1492b(t_ipc *ipc) /* ROXR */ {
380: /* mask f1f8, bits e090, mnemonic 68, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
381: unsigned int srcdata = ipc->src;
382: int dstreg = (ipc->opcode >> 0) & 7;
383: uint32 dstdata = DATAREG(dstreg);
384: uint8 bits = 32;
385: uint8 loop = srcdata & 63;
386: uint8 cflag = CFLAG;
387: uint8 xflag = XFLAG;
388: uint32 outdata = dstdata;
389:
390: while(loop) {
391: cflag = outdata & 1;
392: outdata>>= 1;
393: if (xflag)
394: outdata |= 1<<(bits-1);
395: xflag = cflag;
396: loop--;
397: }
398: DATAREG(dstreg) = outdata;
399:
400: XFLAG = xflag;
401: CFLAG = xflag;
402: NFLAG = ((sint32)outdata) < 0;
403: ZFLAG = !outdata;
404: VFLAG = 0;
405: PC+= 2;
406: }
407:
408: void cpu_op_1493a(t_ipc *ipc) /* ROR */ {
409: /* mask f1f8, bits e018, mnemonic 69, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
410: unsigned int srcdata = ipc->src;
411: int dstreg = (ipc->opcode >> 0) & 7;
412: uint8 dstdata = DATAREG(dstreg);
413: uint8 bits = 8;
414: uint8 loop = srcdata & 63;
415: uint8 cflag = 0;
416: uint8 outdata = dstdata;
417:
418: while(loop) {
419: cflag = outdata & 1;
420: outdata>>= 1;
421: if (cflag)
422: outdata |= 1<<(bits-1);
423: loop--;
424: }
425: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
426: PC+= 2;
427: }
428:
429: void cpu_op_1493b(t_ipc *ipc) /* ROR */ {
430: /* mask f1f8, bits e018, mnemonic 69, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
431: unsigned int srcdata = ipc->src;
432: int dstreg = (ipc->opcode >> 0) & 7;
433: uint8 dstdata = DATAREG(dstreg);
434: uint8 bits = 8;
435: uint8 loop = srcdata & 63;
436: uint8 cflag = 0;
437: uint8 outdata = dstdata;
438:
439: while(loop) {
440: cflag = outdata & 1;
441: outdata>>= 1;
442: if (cflag)
443: outdata |= 1<<(bits-1);
444: loop--;
445: }
446: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
447:
448: CFLAG = cflag;
449: NFLAG = ((sint8)outdata) < 0;
450: ZFLAG = !outdata;
451: VFLAG = 0;
452: PC+= 2;
453: }
454:
455: void cpu_op_1494a(t_ipc *ipc) /* ROR */ {
456: /* mask f1f8, bits e058, mnemonic 69, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
457: unsigned int srcdata = ipc->src;
458: int dstreg = (ipc->opcode >> 0) & 7;
459: uint16 dstdata = DATAREG(dstreg);
460: uint8 bits = 16;
461: uint8 loop = srcdata & 63;
462: uint8 cflag = 0;
463: uint16 outdata = dstdata;
464:
465: while(loop) {
466: cflag = outdata & 1;
467: outdata>>= 1;
468: if (cflag)
469: outdata |= 1<<(bits-1);
470: loop--;
471: }
472: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
473: PC+= 2;
474: }
475:
476: void cpu_op_1494b(t_ipc *ipc) /* ROR */ {
477: /* mask f1f8, bits e058, mnemonic 69, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
478: unsigned int srcdata = ipc->src;
479: int dstreg = (ipc->opcode >> 0) & 7;
480: uint16 dstdata = DATAREG(dstreg);
481: uint8 bits = 16;
482: uint8 loop = srcdata & 63;
483: uint8 cflag = 0;
484: uint16 outdata = dstdata;
485:
486: while(loop) {
487: cflag = outdata & 1;
488: outdata>>= 1;
489: if (cflag)
490: outdata |= 1<<(bits-1);
491: loop--;
492: }
493: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
494:
495: CFLAG = cflag;
496: NFLAG = ((sint16)outdata) < 0;
497: ZFLAG = !outdata;
498: VFLAG = 0;
499: PC+= 2;
500: }
501:
502: void cpu_op_1495a(t_ipc *ipc) /* ROR */ {
503: /* mask f1f8, bits e098, mnemonic 69, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
504: unsigned int srcdata = ipc->src;
505: int dstreg = (ipc->opcode >> 0) & 7;
506: uint32 dstdata = DATAREG(dstreg);
507: uint8 bits = 32;
508: uint8 loop = srcdata & 63;
509: uint8 cflag = 0;
510: uint32 outdata = dstdata;
511:
512: while(loop) {
513: cflag = outdata & 1;
514: outdata>>= 1;
515: if (cflag)
516: outdata |= 1<<(bits-1);
517: loop--;
518: }
519: DATAREG(dstreg) = outdata;
520: PC+= 2;
521: }
522:
523: void cpu_op_1495b(t_ipc *ipc) /* ROR */ {
524: /* mask f1f8, bits e098, mnemonic 69, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
525: unsigned int srcdata = ipc->src;
526: int dstreg = (ipc->opcode >> 0) & 7;
527: uint32 dstdata = DATAREG(dstreg);
528: uint8 bits = 32;
529: uint8 loop = srcdata & 63;
530: uint8 cflag = 0;
531: uint32 outdata = dstdata;
532:
533: while(loop) {
534: cflag = outdata & 1;
535: outdata>>= 1;
536: if (cflag)
537: outdata |= 1<<(bits-1);
538: loop--;
539: }
540: DATAREG(dstreg) = outdata;
541:
542: CFLAG = cflag;
543: NFLAG = ((sint32)outdata) < 0;
544: ZFLAG = !outdata;
545: VFLAG = 0;
546: PC+= 2;
547: }
548:
549: void cpu_op_1496a(t_ipc *ipc) /* ASR */ {
550: /* mask fff8, bits e000, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
551: unsigned int srcdata = 8;
552: int dstreg = (ipc->opcode >> 0) & 7;
553: uint8 dstdata = DATAREG(dstreg);
554: uint8 bits = 8;
555: uint8 count = srcdata & 63;
556: uint8 outdata = ((sint8)dstdata) >> (count > 7 ? 7 : count);
557:
558: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
559: PC+= 2;
560: }
561:
562: void cpu_op_1496b(t_ipc *ipc) /* ASR */ {
563: /* mask fff8, bits e000, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
564: unsigned int srcdata = 8;
565: int dstreg = (ipc->opcode >> 0) & 7;
566: uint8 dstdata = DATAREG(dstreg);
567: uint8 bits = 8;
568: uint8 count = srcdata & 63;
569: uint8 outdata = ((sint8)dstdata) >> (count > 7 ? 7 : count);
570:
571: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
572:
573: if (!srcdata)
574: CFLAG = 0;
575: else if (srcdata >= bits) {
576: CFLAG = dstdata>>(bits-1);
577: XFLAG = dstdata>>(bits-1);
578: } else {
579: CFLAG = dstdata>>(count-1) & 1;
580: XFLAG = dstdata>>(count-1) & 1;
581: }
582: VFLAG = 0;
583: NFLAG = ((sint8)outdata) < 0;
584: ZFLAG = !outdata;
585: PC+= 2;
586: }
587:
588: void cpu_op_1497a(t_ipc *ipc) /* ASR */ {
589: /* mask fff8, bits e040, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
590: unsigned int srcdata = 8;
591: int dstreg = (ipc->opcode >> 0) & 7;
592: uint16 dstdata = DATAREG(dstreg);
593: uint8 bits = 16;
594: uint8 count = srcdata & 63;
595: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
596:
597: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
598: PC+= 2;
599: }
600:
601: void cpu_op_1497b(t_ipc *ipc) /* ASR */ {
602: /* mask fff8, bits e040, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
603: unsigned int srcdata = 8;
604: int dstreg = (ipc->opcode >> 0) & 7;
605: uint16 dstdata = DATAREG(dstreg);
606: uint8 bits = 16;
607: uint8 count = srcdata & 63;
608: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
609:
610: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
611:
612: if (!srcdata)
613: CFLAG = 0;
614: else if (srcdata >= bits) {
615: CFLAG = dstdata>>(bits-1);
616: XFLAG = dstdata>>(bits-1);
617: } else {
618: CFLAG = dstdata>>(count-1) & 1;
619: XFLAG = dstdata>>(count-1) & 1;
620: }
621: VFLAG = 0;
622: NFLAG = ((sint16)outdata) < 0;
623: ZFLAG = !outdata;
624: PC+= 2;
625: }
626:
627: void cpu_op_1498a(t_ipc *ipc) /* ASR */ {
628: /* mask fff8, bits e080, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
629: unsigned int srcdata = 8;
630: int dstreg = (ipc->opcode >> 0) & 7;
631: uint32 dstdata = DATAREG(dstreg);
632: uint8 bits = 32;
633: uint8 count = srcdata & 63;
634: uint32 outdata = ((sint32)dstdata) >> (count > 31 ? 31 : count);
635:
636: DATAREG(dstreg) = outdata;
637: PC+= 2;
638: }
639:
640: void cpu_op_1498b(t_ipc *ipc) /* ASR */ {
641: /* mask fff8, bits e080, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
642: unsigned int srcdata = 8;
643: int dstreg = (ipc->opcode >> 0) & 7;
644: uint32 dstdata = DATAREG(dstreg);
645: uint8 bits = 32;
646: uint8 count = srcdata & 63;
647: uint32 outdata = ((sint32)dstdata) >> (count > 31 ? 31 : count);
648:
649: DATAREG(dstreg) = outdata;
650:
651: if (!srcdata)
652: CFLAG = 0;
653: else if (srcdata >= bits) {
654: CFLAG = dstdata>>(bits-1);
655: XFLAG = dstdata>>(bits-1);
656: } else {
657: CFLAG = dstdata>>(count-1) & 1;
658: XFLAG = dstdata>>(count-1) & 1;
659: }
660: VFLAG = 0;
661: NFLAG = ((sint32)outdata) < 0;
662: ZFLAG = !outdata;
663: PC+= 2;
664: }
665:
666: void cpu_op_1499a(t_ipc *ipc) /* LSR */ {
667: /* mask fff8, bits e008, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
668: unsigned int srcdata = 8;
669: int dstreg = (ipc->opcode >> 0) & 7;
670: uint8 dstdata = DATAREG(dstreg);
671: uint8 bits = 8;
672: uint8 count = srcdata & 63;
673: uint8 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
674:
675: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
676: PC+= 2;
677: }
678:
679: void cpu_op_1499b(t_ipc *ipc) /* LSR */ {
680: /* mask fff8, bits e008, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
681: unsigned int srcdata = 8;
682: int dstreg = (ipc->opcode >> 0) & 7;
683: uint8 dstdata = DATAREG(dstreg);
684: uint8 bits = 8;
685: uint8 count = srcdata & 63;
686: uint8 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
687:
688: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
689:
690: if (!count)
691: CFLAG = 0;
692: else if (count >= bits) {
693: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
694: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
695: } else {
696: CFLAG = dstdata>>(count-1) & 1;
697: XFLAG = dstdata>>(count-1) & 1;
698: }
699: VFLAG = 0;
700: NFLAG = ((sint8)outdata) < 0;
701: ZFLAG = !outdata;
702: PC+= 2;
703: }
704:
705: void cpu_op_1500a(t_ipc *ipc) /* LSR */ {
706: /* mask fff8, bits e048, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
707: unsigned int srcdata = 8;
708: int dstreg = (ipc->opcode >> 0) & 7;
709: uint16 dstdata = DATAREG(dstreg);
710: uint8 bits = 16;
711: uint8 count = srcdata & 63;
712: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
713:
714: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
715: PC+= 2;
716: }
717:
718: void cpu_op_1500b(t_ipc *ipc) /* LSR */ {
719: /* mask fff8, bits e048, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
720: unsigned int srcdata = 8;
721: int dstreg = (ipc->opcode >> 0) & 7;
722: uint16 dstdata = DATAREG(dstreg);
723: uint8 bits = 16;
724: uint8 count = srcdata & 63;
725: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
726:
727: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
728:
729: if (!count)
730: CFLAG = 0;
731: else if (count >= bits) {
732: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
733: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
734: } else {
735: CFLAG = dstdata>>(count-1) & 1;
736: XFLAG = dstdata>>(count-1) & 1;
737: }
738: VFLAG = 0;
739: NFLAG = ((sint16)outdata) < 0;
740: ZFLAG = !outdata;
741: PC+= 2;
742: }
743:
744: void cpu_op_1501a(t_ipc *ipc) /* LSR */ {
745: /* mask fff8, bits e088, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
746: unsigned int srcdata = 8;
747: int dstreg = (ipc->opcode >> 0) & 7;
748: uint32 dstdata = DATAREG(dstreg);
749: uint8 bits = 32;
750: uint8 count = srcdata & 63;
751: uint32 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
752:
753: DATAREG(dstreg) = outdata;
754: PC+= 2;
755: }
756:
757: void cpu_op_1501b(t_ipc *ipc) /* LSR */ {
758: /* mask fff8, bits e088, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
759: unsigned int srcdata = 8;
760: int dstreg = (ipc->opcode >> 0) & 7;
761: uint32 dstdata = DATAREG(dstreg);
762: uint8 bits = 32;
763: uint8 count = srcdata & 63;
764: uint32 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
765:
766: DATAREG(dstreg) = outdata;
767:
768: if (!count)
769: CFLAG = 0;
770: else if (count >= bits) {
771: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
772: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
773: } else {
774: CFLAG = dstdata>>(count-1) & 1;
775: XFLAG = dstdata>>(count-1) & 1;
776: }
777: VFLAG = 0;
778: NFLAG = ((sint32)outdata) < 0;
779: ZFLAG = !outdata;
780: PC+= 2;
781: }
782:
783: void cpu_op_1502a(t_ipc *ipc) /* ROXR */ {
784: /* mask fff8, bits e010, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
785: unsigned int srcdata = 8;
786: int dstreg = (ipc->opcode >> 0) & 7;
787: uint8 dstdata = DATAREG(dstreg);
788: uint8 bits = 8;
789: uint8 loop = srcdata & 63;
790: uint8 cflag = CFLAG;
791: uint8 xflag = XFLAG;
792: uint8 outdata = dstdata;
793:
794: while(loop) {
795: cflag = outdata & 1;
796: outdata>>= 1;
797: if (xflag)
798: outdata |= 1<<(bits-1);
799: xflag = cflag;
800: loop--;
801: }
802: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
803: PC+= 2;
804: }
805:
806: void cpu_op_1502b(t_ipc *ipc) /* ROXR */ {
807: /* mask fff8, bits e010, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
808: unsigned int srcdata = 8;
809: int dstreg = (ipc->opcode >> 0) & 7;
810: uint8 dstdata = DATAREG(dstreg);
811: uint8 bits = 8;
812: uint8 loop = srcdata & 63;
813: uint8 cflag = CFLAG;
814: uint8 xflag = XFLAG;
815: uint8 outdata = dstdata;
816:
817: while(loop) {
818: cflag = outdata & 1;
819: outdata>>= 1;
820: if (xflag)
821: outdata |= 1<<(bits-1);
822: xflag = cflag;
823: loop--;
824: }
825: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
826:
827: XFLAG = xflag;
828: CFLAG = xflag;
829: NFLAG = ((sint8)outdata) < 0;
830: ZFLAG = !outdata;
831: VFLAG = 0;
832: PC+= 2;
833: }
834:
835: void cpu_op_1503a(t_ipc *ipc) /* ROXR */ {
836: /* mask fff8, bits e050, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
837: unsigned int srcdata = 8;
838: int dstreg = (ipc->opcode >> 0) & 7;
839: uint16 dstdata = DATAREG(dstreg);
840: uint8 bits = 16;
841: uint8 loop = srcdata & 63;
842: uint8 cflag = CFLAG;
843: uint8 xflag = XFLAG;
844: uint16 outdata = dstdata;
845:
846: while(loop) {
847: cflag = outdata & 1;
848: outdata>>= 1;
849: if (xflag)
850: outdata |= 1<<(bits-1);
851: xflag = cflag;
852: loop--;
853: }
854: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
855: PC+= 2;
856: }
857:
858: void cpu_op_1503b(t_ipc *ipc) /* ROXR */ {
859: /* mask fff8, bits e050, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
860: unsigned int srcdata = 8;
861: int dstreg = (ipc->opcode >> 0) & 7;
862: uint16 dstdata = DATAREG(dstreg);
863: uint8 bits = 16;
864: uint8 loop = srcdata & 63;
865: uint8 cflag = CFLAG;
866: uint8 xflag = XFLAG;
867: uint16 outdata = dstdata;
868:
869: while(loop) {
870: cflag = outdata & 1;
871: outdata>>= 1;
872: if (xflag)
873: outdata |= 1<<(bits-1);
874: xflag = cflag;
875: loop--;
876: }
877: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
878:
879: XFLAG = xflag;
880: CFLAG = xflag;
881: NFLAG = ((sint16)outdata) < 0;
882: ZFLAG = !outdata;
883: VFLAG = 0;
884: PC+= 2;
885: }
886:
887: void cpu_op_1504a(t_ipc *ipc) /* ROXR */ {
888: /* mask fff8, bits e090, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
889: unsigned int srcdata = 8;
890: int dstreg = (ipc->opcode >> 0) & 7;
891: uint32 dstdata = DATAREG(dstreg);
892: uint8 bits = 32;
893: uint8 loop = srcdata & 63;
894: uint8 cflag = CFLAG;
895: uint8 xflag = XFLAG;
896: uint32 outdata = dstdata;
897:
898: while(loop) {
899: cflag = outdata & 1;
900: outdata>>= 1;
901: if (xflag)
902: outdata |= 1<<(bits-1);
903: xflag = cflag;
904: loop--;
905: }
906: DATAREG(dstreg) = outdata;
907: PC+= 2;
908: }
909:
910: void cpu_op_1504b(t_ipc *ipc) /* ROXR */ {
911: /* mask fff8, bits e090, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
912: unsigned int srcdata = 8;
913: int dstreg = (ipc->opcode >> 0) & 7;
914: uint32 dstdata = DATAREG(dstreg);
915: uint8 bits = 32;
916: uint8 loop = srcdata & 63;
917: uint8 cflag = CFLAG;
918: uint8 xflag = XFLAG;
919: uint32 outdata = dstdata;
920:
921: while(loop) {
922: cflag = outdata & 1;
923: outdata>>= 1;
924: if (xflag)
925: outdata |= 1<<(bits-1);
926: xflag = cflag;
927: loop--;
928: }
929: DATAREG(dstreg) = outdata;
930:
931: XFLAG = xflag;
932: CFLAG = xflag;
933: NFLAG = ((sint32)outdata) < 0;
934: ZFLAG = !outdata;
935: VFLAG = 0;
936: PC+= 2;
937: }
938:
939: void cpu_op_1505a(t_ipc *ipc) /* ROR */ {
940: /* mask fff8, bits e018, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
941: unsigned int srcdata = 8;
942: int dstreg = (ipc->opcode >> 0) & 7;
943: uint8 dstdata = DATAREG(dstreg);
944: uint8 bits = 8;
945: uint8 loop = srcdata & 63;
946: uint8 cflag = 0;
947: uint8 outdata = dstdata;
948:
949: while(loop) {
950: cflag = outdata & 1;
951: outdata>>= 1;
952: if (cflag)
953: outdata |= 1<<(bits-1);
954: loop--;
955: }
956: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
957: PC+= 2;
958: }
959:
960: void cpu_op_1505b(t_ipc *ipc) /* ROR */ {
961: /* mask fff8, bits e018, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
962: unsigned int srcdata = 8;
963: int dstreg = (ipc->opcode >> 0) & 7;
964: uint8 dstdata = DATAREG(dstreg);
965: uint8 bits = 8;
966: uint8 loop = srcdata & 63;
967: uint8 cflag = 0;
968: uint8 outdata = dstdata;
969:
970: while(loop) {
971: cflag = outdata & 1;
972: outdata>>= 1;
973: if (cflag)
974: outdata |= 1<<(bits-1);
975: loop--;
976: }
977: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
978:
979: CFLAG = cflag;
980: NFLAG = ((sint8)outdata) < 0;
981: ZFLAG = !outdata;
982: VFLAG = 0;
983: PC+= 2;
984: }
985:
986: void cpu_op_1506a(t_ipc *ipc) /* ROR */ {
987: /* mask fff8, bits e058, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
988: unsigned int srcdata = 8;
989: int dstreg = (ipc->opcode >> 0) & 7;
990: uint16 dstdata = DATAREG(dstreg);
991: uint8 bits = 16;
992: uint8 loop = srcdata & 63;
993: uint8 cflag = 0;
994: uint16 outdata = dstdata;
995:
996: while(loop) {
997: cflag = outdata & 1;
998: outdata>>= 1;
999: if (cflag)
1000: outdata |= 1<<(bits-1);
1001: loop--;
1002: }
1003: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1004: PC+= 2;
1005: }
1006:
1007: void cpu_op_1506b(t_ipc *ipc) /* ROR */ {
1008: /* mask fff8, bits e058, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
1009: unsigned int srcdata = 8;
1010: int dstreg = (ipc->opcode >> 0) & 7;
1011: uint16 dstdata = DATAREG(dstreg);
1012: uint8 bits = 16;
1013: uint8 loop = srcdata & 63;
1014: uint8 cflag = 0;
1015: uint16 outdata = dstdata;
1016:
1017: while(loop) {
1018: cflag = outdata & 1;
1019: outdata>>= 1;
1020: if (cflag)
1021: outdata |= 1<<(bits-1);
1022: loop--;
1023: }
1024: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1025:
1026: CFLAG = cflag;
1027: NFLAG = ((sint16)outdata) < 0;
1028: ZFLAG = !outdata;
1029: VFLAG = 0;
1030: PC+= 2;
1031: }
1032:
1033: void cpu_op_1507a(t_ipc *ipc) /* ROR */ {
1034: /* mask fff8, bits e098, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
1035: unsigned int srcdata = 8;
1036: int dstreg = (ipc->opcode >> 0) & 7;
1037: uint32 dstdata = DATAREG(dstreg);
1038: uint8 bits = 32;
1039: uint8 loop = srcdata & 63;
1040: uint8 cflag = 0;
1041: uint32 outdata = dstdata;
1042:
1043: while(loop) {
1044: cflag = outdata & 1;
1045: outdata>>= 1;
1046: if (cflag)
1047: outdata |= 1<<(bits-1);
1048: loop--;
1049: }
1050: DATAREG(dstreg) = outdata;
1051: PC+= 2;
1052: }
1053:
1054: void cpu_op_1507b(t_ipc *ipc) /* ROR */ {
1055: /* mask fff8, bits e098, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
1056: unsigned int srcdata = 8;
1057: int dstreg = (ipc->opcode >> 0) & 7;
1058: uint32 dstdata = DATAREG(dstreg);
1059: uint8 bits = 32;
1060: uint8 loop = srcdata & 63;
1061: uint8 cflag = 0;
1062: uint32 outdata = dstdata;
1063:
1064: while(loop) {
1065: cflag = outdata & 1;
1066: outdata>>= 1;
1067: if (cflag)
1068: outdata |= 1<<(bits-1);
1069: loop--;
1070: }
1071: DATAREG(dstreg) = outdata;
1072:
1073: CFLAG = cflag;
1074: NFLAG = ((sint32)outdata) < 0;
1075: ZFLAG = !outdata;
1076: VFLAG = 0;
1077: PC+= 2;
1078: }
1079:
1080: void cpu_op_1508a(t_ipc *ipc) /* ASR */ {
1081: /* mask f1f8, bits e020, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1082: int srcreg = (ipc->opcode >> 9) & 7;
1083: uint8 srcdata = DATAREG(srcreg);
1084: int dstreg = (ipc->opcode >> 0) & 7;
1085: uint8 dstdata = DATAREG(dstreg);
1086: uint8 bits = 8;
1087: uint8 count = srcdata & 63;
1088: uint8 outdata = ((sint8)dstdata) >> (count > 7 ? 7 : count);
1089:
1090: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1091: PC+= 2;
1092: }
1093:
1094: void cpu_op_1508b(t_ipc *ipc) /* ASR */ {
1095: /* mask f1f8, bits e020, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1096: int srcreg = (ipc->opcode >> 9) & 7;
1097: uint8 srcdata = DATAREG(srcreg);
1098: int dstreg = (ipc->opcode >> 0) & 7;
1099: uint8 dstdata = DATAREG(dstreg);
1100: uint8 bits = 8;
1101: uint8 count = srcdata & 63;
1102: uint8 outdata = ((sint8)dstdata) >> (count > 7 ? 7 : count);
1103:
1104: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1105:
1106: if (!srcdata)
1107: CFLAG = 0;
1108: else if (srcdata >= bits) {
1109: CFLAG = dstdata>>(bits-1);
1110: XFLAG = dstdata>>(bits-1);
1111: } else {
1112: CFLAG = dstdata>>(count-1) & 1;
1113: XFLAG = dstdata>>(count-1) & 1;
1114: }
1115: VFLAG = 0;
1116: NFLAG = ((sint8)outdata) < 0;
1117: ZFLAG = !outdata;
1118: PC+= 2;
1119: }
1120:
1121: void cpu_op_1509a(t_ipc *ipc) /* ASR */ {
1122: /* mask f1f8, bits e060, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1123: int srcreg = (ipc->opcode >> 9) & 7;
1124: uint16 srcdata = DATAREG(srcreg);
1125: int dstreg = (ipc->opcode >> 0) & 7;
1126: uint16 dstdata = DATAREG(dstreg);
1127: uint8 bits = 16;
1128: uint8 count = srcdata & 63;
1129: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
1130:
1131: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1132: PC+= 2;
1133: }
1134:
1135: void cpu_op_1509b(t_ipc *ipc) /* ASR */ {
1136: /* mask f1f8, bits e060, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1137: int srcreg = (ipc->opcode >> 9) & 7;
1138: uint16 srcdata = DATAREG(srcreg);
1139: int dstreg = (ipc->opcode >> 0) & 7;
1140: uint16 dstdata = DATAREG(dstreg);
1141: uint8 bits = 16;
1142: uint8 count = srcdata & 63;
1143: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
1144:
1145: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1146:
1147: if (!srcdata)
1148: CFLAG = 0;
1149: else if (srcdata >= bits) {
1150: CFLAG = dstdata>>(bits-1);
1151: XFLAG = dstdata>>(bits-1);
1152: } else {
1153: CFLAG = dstdata>>(count-1) & 1;
1154: XFLAG = dstdata>>(count-1) & 1;
1155: }
1156: VFLAG = 0;
1157: NFLAG = ((sint16)outdata) < 0;
1158: ZFLAG = !outdata;
1159: PC+= 2;
1160: }
1161:
1162: void cpu_op_1510a(t_ipc *ipc) /* ASR */ {
1163: /* mask f1f8, bits e0a0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1164: int srcreg = (ipc->opcode >> 9) & 7;
1165: uint32 srcdata = DATAREG(srcreg);
1166: int dstreg = (ipc->opcode >> 0) & 7;
1167: uint32 dstdata = DATAREG(dstreg);
1168: uint8 bits = 32;
1169: uint8 count = srcdata & 63;
1170: uint32 outdata = ((sint32)dstdata) >> (count > 31 ? 31 : count);
1171:
1172: DATAREG(dstreg) = outdata;
1173: PC+= 2;
1174: }
1175:
1176: void cpu_op_1510b(t_ipc *ipc) /* ASR */ {
1177: /* mask f1f8, bits e0a0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1178: int srcreg = (ipc->opcode >> 9) & 7;
1179: uint32 srcdata = DATAREG(srcreg);
1180: int dstreg = (ipc->opcode >> 0) & 7;
1181: uint32 dstdata = DATAREG(dstreg);
1182: uint8 bits = 32;
1183: uint8 count = srcdata & 63;
1184: uint32 outdata = ((sint32)dstdata) >> (count > 31 ? 31 : count);
1185:
1186: DATAREG(dstreg) = outdata;
1187:
1188: if (!srcdata)
1189: CFLAG = 0;
1190: else if (srcdata >= bits) {
1191: CFLAG = dstdata>>(bits-1);
1192: XFLAG = dstdata>>(bits-1);
1193: } else {
1194: CFLAG = dstdata>>(count-1) & 1;
1195: XFLAG = dstdata>>(count-1) & 1;
1196: }
1197: VFLAG = 0;
1198: NFLAG = ((sint32)outdata) < 0;
1199: ZFLAG = !outdata;
1200: PC+= 2;
1201: }
1202:
1203: void cpu_op_1511a(t_ipc *ipc) /* LSR */ {
1204: /* mask f1f8, bits e028, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1205: int srcreg = (ipc->opcode >> 9) & 7;
1206: uint8 srcdata = DATAREG(srcreg);
1207: int dstreg = (ipc->opcode >> 0) & 7;
1208: uint8 dstdata = DATAREG(dstreg);
1209: uint8 bits = 8;
1210: uint8 count = srcdata & 63;
1211: uint8 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
1212:
1213: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1214: PC+= 2;
1215: }
1216:
1217: void cpu_op_1511b(t_ipc *ipc) /* LSR */ {
1218: /* mask f1f8, bits e028, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1219: int srcreg = (ipc->opcode >> 9) & 7;
1220: uint8 srcdata = DATAREG(srcreg);
1221: int dstreg = (ipc->opcode >> 0) & 7;
1222: uint8 dstdata = DATAREG(dstreg);
1223: uint8 bits = 8;
1224: uint8 count = srcdata & 63;
1225: uint8 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
1226:
1227: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1228:
1229: if (!count)
1230: CFLAG = 0;
1231: else if (count >= bits) {
1232: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
1233: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
1234: } else {
1235: CFLAG = dstdata>>(count-1) & 1;
1236: XFLAG = dstdata>>(count-1) & 1;
1237: }
1238: VFLAG = 0;
1239: NFLAG = ((sint8)outdata) < 0;
1240: ZFLAG = !outdata;
1241: PC+= 2;
1242: }
1243:
1244: void cpu_op_1512a(t_ipc *ipc) /* LSR */ {
1245: /* mask f1f8, bits e068, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1246: int srcreg = (ipc->opcode >> 9) & 7;
1247: uint16 srcdata = DATAREG(srcreg);
1248: int dstreg = (ipc->opcode >> 0) & 7;
1249: uint16 dstdata = DATAREG(dstreg);
1250: uint8 bits = 16;
1251: uint8 count = srcdata & 63;
1252: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
1253:
1254: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1255: PC+= 2;
1256: }
1257:
1258: void cpu_op_1512b(t_ipc *ipc) /* LSR */ {
1259: /* mask f1f8, bits e068, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1260: int srcreg = (ipc->opcode >> 9) & 7;
1261: uint16 srcdata = DATAREG(srcreg);
1262: int dstreg = (ipc->opcode >> 0) & 7;
1263: uint16 dstdata = DATAREG(dstreg);
1264: uint8 bits = 16;
1265: uint8 count = srcdata & 63;
1266: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
1267:
1268: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1269:
1270: if (!count)
1271: CFLAG = 0;
1272: else if (count >= bits) {
1273: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
1274: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
1275: } else {
1276: CFLAG = dstdata>>(count-1) & 1;
1277: XFLAG = dstdata>>(count-1) & 1;
1278: }
1279: VFLAG = 0;
1280: NFLAG = ((sint16)outdata) < 0;
1281: ZFLAG = !outdata;
1282: PC+= 2;
1283: }
1284:
1285: void cpu_op_1513a(t_ipc *ipc) /* LSR */ {
1286: /* mask f1f8, bits e0a8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1287: int srcreg = (ipc->opcode >> 9) & 7;
1288: uint32 srcdata = DATAREG(srcreg);
1289: int dstreg = (ipc->opcode >> 0) & 7;
1290: uint32 dstdata = DATAREG(dstreg);
1291: uint8 bits = 32;
1292: uint8 count = srcdata & 63;
1293: uint32 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
1294:
1295: DATAREG(dstreg) = outdata;
1296: PC+= 2;
1297: }
1298:
1299: void cpu_op_1513b(t_ipc *ipc) /* LSR */ {
1300: /* mask f1f8, bits e0a8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1301: int srcreg = (ipc->opcode >> 9) & 7;
1302: uint32 srcdata = DATAREG(srcreg);
1303: int dstreg = (ipc->opcode >> 0) & 7;
1304: uint32 dstdata = DATAREG(dstreg);
1305: uint8 bits = 32;
1306: uint8 count = srcdata & 63;
1307: uint32 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
1308:
1309: DATAREG(dstreg) = outdata;
1310:
1311: if (!count)
1312: CFLAG = 0;
1313: else if (count >= bits) {
1314: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
1315: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
1316: } else {
1317: CFLAG = dstdata>>(count-1) & 1;
1318: XFLAG = dstdata>>(count-1) & 1;
1319: }
1320: VFLAG = 0;
1321: NFLAG = ((sint32)outdata) < 0;
1322: ZFLAG = !outdata;
1323: PC+= 2;
1324: }
1325:
1326: void cpu_op_1514a(t_ipc *ipc) /* ROXR */ {
1327: /* mask f1f8, bits e030, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1328: int srcreg = (ipc->opcode >> 9) & 7;
1329: uint8 srcdata = DATAREG(srcreg);
1330: int dstreg = (ipc->opcode >> 0) & 7;
1331: uint8 dstdata = DATAREG(dstreg);
1332: uint8 bits = 8;
1333: uint8 loop = srcdata & 63;
1334: uint8 cflag = CFLAG;
1335: uint8 xflag = XFLAG;
1336: uint8 outdata = dstdata;
1337:
1338: while(loop) {
1339: cflag = outdata & 1;
1340: outdata>>= 1;
1341: if (xflag)
1342: outdata |= 1<<(bits-1);
1343: xflag = cflag;
1344: loop--;
1345: }
1346: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1347: PC+= 2;
1348: }
1349:
1350: void cpu_op_1514b(t_ipc *ipc) /* ROXR */ {
1351: /* mask f1f8, bits e030, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1352: int srcreg = (ipc->opcode >> 9) & 7;
1353: uint8 srcdata = DATAREG(srcreg);
1354: int dstreg = (ipc->opcode >> 0) & 7;
1355: uint8 dstdata = DATAREG(dstreg);
1356: uint8 bits = 8;
1357: uint8 loop = srcdata & 63;
1358: uint8 cflag = CFLAG;
1359: uint8 xflag = XFLAG;
1360: uint8 outdata = dstdata;
1361:
1362: while(loop) {
1363: cflag = outdata & 1;
1364: outdata>>= 1;
1365: if (xflag)
1366: outdata |= 1<<(bits-1);
1367: xflag = cflag;
1368: loop--;
1369: }
1370: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1371:
1372: XFLAG = xflag;
1373: CFLAG = xflag;
1374: NFLAG = ((sint8)outdata) < 0;
1375: ZFLAG = !outdata;
1376: VFLAG = 0;
1377: PC+= 2;
1378: }
1379:
1380: void cpu_op_1515a(t_ipc *ipc) /* ROXR */ {
1381: /* mask f1f8, bits e070, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1382: int srcreg = (ipc->opcode >> 9) & 7;
1383: uint16 srcdata = DATAREG(srcreg);
1384: int dstreg = (ipc->opcode >> 0) & 7;
1385: uint16 dstdata = DATAREG(dstreg);
1386: uint8 bits = 16;
1387: uint8 loop = srcdata & 63;
1388: uint8 cflag = CFLAG;
1389: uint8 xflag = XFLAG;
1390: uint16 outdata = dstdata;
1391:
1392: while(loop) {
1393: cflag = outdata & 1;
1394: outdata>>= 1;
1395: if (xflag)
1396: outdata |= 1<<(bits-1);
1397: xflag = cflag;
1398: loop--;
1399: }
1400: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1401: PC+= 2;
1402: }
1403:
1404: void cpu_op_1515b(t_ipc *ipc) /* ROXR */ {
1405: /* mask f1f8, bits e070, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1406: int srcreg = (ipc->opcode >> 9) & 7;
1407: uint16 srcdata = DATAREG(srcreg);
1408: int dstreg = (ipc->opcode >> 0) & 7;
1409: uint16 dstdata = DATAREG(dstreg);
1410: uint8 bits = 16;
1411: uint8 loop = srcdata & 63;
1412: uint8 cflag = CFLAG;
1413: uint8 xflag = XFLAG;
1414: uint16 outdata = dstdata;
1415:
1416: while(loop) {
1417: cflag = outdata & 1;
1418: outdata>>= 1;
1419: if (xflag)
1420: outdata |= 1<<(bits-1);
1421: xflag = cflag;
1422: loop--;
1423: }
1424: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1425:
1426: XFLAG = xflag;
1427: CFLAG = xflag;
1428: NFLAG = ((sint16)outdata) < 0;
1429: ZFLAG = !outdata;
1430: VFLAG = 0;
1431: PC+= 2;
1432: }
1433:
1434: void cpu_op_1516a(t_ipc *ipc) /* ROXR */ {
1435: /* mask f1f8, bits e0b0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1436: int srcreg = (ipc->opcode >> 9) & 7;
1437: uint32 srcdata = DATAREG(srcreg);
1438: int dstreg = (ipc->opcode >> 0) & 7;
1439: uint32 dstdata = DATAREG(dstreg);
1440: uint8 bits = 32;
1441: uint8 loop = srcdata & 63;
1442: uint8 cflag = CFLAG;
1443: uint8 xflag = XFLAG;
1444: uint32 outdata = dstdata;
1445:
1446: while(loop) {
1447: cflag = outdata & 1;
1448: outdata>>= 1;
1449: if (xflag)
1450: outdata |= 1<<(bits-1);
1451: xflag = cflag;
1452: loop--;
1453: }
1454: DATAREG(dstreg) = outdata;
1455: PC+= 2;
1456: }
1457:
1458: void cpu_op_1516b(t_ipc *ipc) /* ROXR */ {
1459: /* mask f1f8, bits e0b0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1460: int srcreg = (ipc->opcode >> 9) & 7;
1461: uint32 srcdata = DATAREG(srcreg);
1462: int dstreg = (ipc->opcode >> 0) & 7;
1463: uint32 dstdata = DATAREG(dstreg);
1464: uint8 bits = 32;
1465: uint8 loop = srcdata & 63;
1466: uint8 cflag = CFLAG;
1467: uint8 xflag = XFLAG;
1468: uint32 outdata = dstdata;
1469:
1470: while(loop) {
1471: cflag = outdata & 1;
1472: outdata>>= 1;
1473: if (xflag)
1474: outdata |= 1<<(bits-1);
1475: xflag = cflag;
1476: loop--;
1477: }
1478: DATAREG(dstreg) = outdata;
1479:
1480: XFLAG = xflag;
1481: CFLAG = xflag;
1482: NFLAG = ((sint32)outdata) < 0;
1483: ZFLAG = !outdata;
1484: VFLAG = 0;
1485: PC+= 2;
1486: }
1487:
1488: void cpu_op_1517a(t_ipc *ipc) /* ROR */ {
1489: /* mask f1f8, bits e038, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1490: int srcreg = (ipc->opcode >> 9) & 7;
1491: uint8 srcdata = DATAREG(srcreg);
1492: int dstreg = (ipc->opcode >> 0) & 7;
1493: uint8 dstdata = DATAREG(dstreg);
1494: uint8 bits = 8;
1495: uint8 loop = srcdata & 63;
1496: uint8 cflag = 0;
1497: uint8 outdata = dstdata;
1498:
1499: while(loop) {
1500: cflag = outdata & 1;
1501: outdata>>= 1;
1502: if (cflag)
1503: outdata |= 1<<(bits-1);
1504: loop--;
1505: }
1506: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1507: PC+= 2;
1508: }
1509:
1510: void cpu_op_1517b(t_ipc *ipc) /* ROR */ {
1511: /* mask f1f8, bits e038, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1512: int srcreg = (ipc->opcode >> 9) & 7;
1513: uint8 srcdata = DATAREG(srcreg);
1514: int dstreg = (ipc->opcode >> 0) & 7;
1515: uint8 dstdata = DATAREG(dstreg);
1516: uint8 bits = 8;
1517: uint8 loop = srcdata & 63;
1518: uint8 cflag = 0;
1519: uint8 outdata = dstdata;
1520:
1521: while(loop) {
1522: cflag = outdata & 1;
1523: outdata>>= 1;
1524: if (cflag)
1525: outdata |= 1<<(bits-1);
1526: loop--;
1527: }
1528: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1529:
1530: CFLAG = cflag;
1531: NFLAG = ((sint8)outdata) < 0;
1532: ZFLAG = !outdata;
1533: VFLAG = 0;
1534: PC+= 2;
1535: }
1536:
1537: void cpu_op_1518a(t_ipc *ipc) /* ROR */ {
1538: /* mask f1f8, bits e078, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1539: int srcreg = (ipc->opcode >> 9) & 7;
1540: uint16 srcdata = DATAREG(srcreg);
1541: int dstreg = (ipc->opcode >> 0) & 7;
1542: uint16 dstdata = DATAREG(dstreg);
1543: uint8 bits = 16;
1544: uint8 loop = srcdata & 63;
1545: uint8 cflag = 0;
1546: uint16 outdata = dstdata;
1547:
1548: while(loop) {
1549: cflag = outdata & 1;
1550: outdata>>= 1;
1551: if (cflag)
1552: outdata |= 1<<(bits-1);
1553: loop--;
1554: }
1555: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1556: PC+= 2;
1557: }
1558:
1559: void cpu_op_1518b(t_ipc *ipc) /* ROR */ {
1560: /* mask f1f8, bits e078, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1561: int srcreg = (ipc->opcode >> 9) & 7;
1562: uint16 srcdata = DATAREG(srcreg);
1563: int dstreg = (ipc->opcode >> 0) & 7;
1564: uint16 dstdata = DATAREG(dstreg);
1565: uint8 bits = 16;
1566: uint8 loop = srcdata & 63;
1567: uint8 cflag = 0;
1568: uint16 outdata = dstdata;
1569:
1570: while(loop) {
1571: cflag = outdata & 1;
1572: outdata>>= 1;
1573: if (cflag)
1574: outdata |= 1<<(bits-1);
1575: loop--;
1576: }
1577: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1578:
1579: CFLAG = cflag;
1580: NFLAG = ((sint16)outdata) < 0;
1581: ZFLAG = !outdata;
1582: VFLAG = 0;
1583: PC+= 2;
1584: }
1585:
1586: void cpu_op_1519a(t_ipc *ipc) /* ROR */ {
1587: /* mask f1f8, bits e0b8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1588: int srcreg = (ipc->opcode >> 9) & 7;
1589: uint32 srcdata = DATAREG(srcreg);
1590: int dstreg = (ipc->opcode >> 0) & 7;
1591: uint32 dstdata = DATAREG(dstreg);
1592: uint8 bits = 32;
1593: uint8 loop = srcdata & 63;
1594: uint8 cflag = 0;
1595: uint32 outdata = dstdata;
1596:
1597: while(loop) {
1598: cflag = outdata & 1;
1599: outdata>>= 1;
1600: if (cflag)
1601: outdata |= 1<<(bits-1);
1602: loop--;
1603: }
1604: DATAREG(dstreg) = outdata;
1605: PC+= 2;
1606: }
1607:
1608: void cpu_op_1519b(t_ipc *ipc) /* ROR */ {
1609: /* mask f1f8, bits e0b8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1610: int srcreg = (ipc->opcode >> 9) & 7;
1611: uint32 srcdata = DATAREG(srcreg);
1612: int dstreg = (ipc->opcode >> 0) & 7;
1613: uint32 dstdata = DATAREG(dstreg);
1614: uint8 bits = 32;
1615: uint8 loop = srcdata & 63;
1616: uint8 cflag = 0;
1617: uint32 outdata = dstdata;
1618:
1619: while(loop) {
1620: cflag = outdata & 1;
1621: outdata>>= 1;
1622: if (cflag)
1623: outdata |= 1<<(bits-1);
1624: loop--;
1625: }
1626: DATAREG(dstreg) = outdata;
1627:
1628: CFLAG = cflag;
1629: NFLAG = ((sint32)outdata) < 0;
1630: ZFLAG = !outdata;
1631: VFLAG = 0;
1632: PC+= 2;
1633: }
1634:
1635: void cpu_op_1520a(t_ipc *ipc) /* ASL */ {
1636: /* mask f1f8, bits e100, mnemonic 70, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1637: unsigned int srcdata = ipc->src;
1638: int dstreg = (ipc->opcode >> 0) & 7;
1639: uint8 dstdata = DATAREG(dstreg);
1640: uint8 bits = 8;
1641: uint8 count = srcdata & 63;
1642: uint8 outdata = count >= bits ? 0 : (dstdata << count);
1643:
1644: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1645: PC+= 2;
1646: }
1647:
1648: void cpu_op_1520b(t_ipc *ipc) /* ASL */ {
1649: /* mask f1f8, bits e100, mnemonic 70, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1650: unsigned int srcdata = ipc->src;
1651: int dstreg = (ipc->opcode >> 0) & 7;
1652: uint8 dstdata = DATAREG(dstreg);
1653: uint8 bits = 8;
1654: uint8 count = srcdata & 63;
1655: uint8 outdata = count >= bits ? 0 : (dstdata << count);
1656:
1657: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1658:
1659: if (!count)
1660: CFLAG = 0;
1661: else if (count >= bits) {
1662: CFLAG = (count == bits) ? dstdata & 1 : 0;
1663: XFLAG = (count == bits) ? dstdata & 1 : 0;
1664: VFLAG = !dstdata;
1665: } else {
1666: CFLAG = dstdata>>(bits-count) & 1;
1667: XFLAG = dstdata>>(bits-count) & 1;
1668: {
1669: uint8 mask = 0xff << (7-count);
1670: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
1671: }
1672: }
1673: NFLAG = ((sint8)outdata) < 0;
1674: ZFLAG = !outdata;
1675: PC+= 2;
1676: }
1677:
1678: void cpu_op_1521a(t_ipc *ipc) /* ASL */ {
1679: /* mask f1f8, bits e140, mnemonic 70, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1680: unsigned int srcdata = ipc->src;
1681: int dstreg = (ipc->opcode >> 0) & 7;
1682: uint16 dstdata = DATAREG(dstreg);
1683: uint8 bits = 16;
1684: uint8 count = srcdata & 63;
1685: uint16 outdata = count >= bits ? 0 : (dstdata << count);
1686:
1687: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1688: PC+= 2;
1689: }
1690:
1691: void cpu_op_1521b(t_ipc *ipc) /* ASL */ {
1692: /* mask f1f8, bits e140, mnemonic 70, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1693: unsigned int srcdata = ipc->src;
1694: int dstreg = (ipc->opcode >> 0) & 7;
1695: uint16 dstdata = DATAREG(dstreg);
1696: uint8 bits = 16;
1697: uint8 count = srcdata & 63;
1698: uint16 outdata = count >= bits ? 0 : (dstdata << count);
1699:
1700: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1701:
1702: if (!count)
1703: CFLAG = 0;
1704: else if (count >= bits) {
1705: CFLAG = (count == bits) ? dstdata & 1 : 0;
1706: XFLAG = (count == bits) ? dstdata & 1 : 0;
1707: VFLAG = !dstdata;
1708: } else {
1709: CFLAG = dstdata>>(bits-count) & 1;
1710: XFLAG = dstdata>>(bits-count) & 1;
1711: {
1712: uint16 mask = 0xffff << (15-count);
1713: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
1714: }
1715: }
1716: NFLAG = ((sint16)outdata) < 0;
1717: ZFLAG = !outdata;
1718: PC+= 2;
1719: }
1720:
1721: void cpu_op_1522a(t_ipc *ipc) /* ASL */ {
1722: /* mask f1f8, bits e180, mnemonic 70, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1723: unsigned int srcdata = ipc->src;
1724: int dstreg = (ipc->opcode >> 0) & 7;
1725: uint32 dstdata = DATAREG(dstreg);
1726: uint8 bits = 32;
1727: uint8 count = srcdata & 63;
1728: uint32 outdata = count >= bits ? 0 : (dstdata << count);
1729:
1730: DATAREG(dstreg) = outdata;
1731: PC+= 2;
1732: }
1733:
1734: void cpu_op_1522b(t_ipc *ipc) /* ASL */ {
1735: /* mask f1f8, bits e180, mnemonic 70, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1736: unsigned int srcdata = ipc->src;
1737: int dstreg = (ipc->opcode >> 0) & 7;
1738: uint32 dstdata = DATAREG(dstreg);
1739: uint8 bits = 32;
1740: uint8 count = srcdata & 63;
1741: uint32 outdata = count >= bits ? 0 : (dstdata << count);
1742:
1743: DATAREG(dstreg) = outdata;
1744:
1745: if (!count)
1746: CFLAG = 0;
1747: else if (count >= bits) {
1748: CFLAG = (count == bits) ? dstdata & 1 : 0;
1749: XFLAG = (count == bits) ? dstdata & 1 : 0;
1750: VFLAG = !dstdata;
1751: } else {
1752: CFLAG = dstdata>>(bits-count) & 1;
1753: XFLAG = dstdata>>(bits-count) & 1;
1754: {
1755: uint32 mask = 0xffffffff <<(31-count);
1756: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
1757: }
1758: }
1759: NFLAG = ((sint32)outdata) < 0;
1760: ZFLAG = !outdata;
1761: PC+= 2;
1762: }
1763:
1764: void cpu_op_1523a(t_ipc *ipc) /* LSL */ {
1765: /* mask f1f8, bits e108, mnemonic 71, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1766: unsigned int srcdata = ipc->src;
1767: int dstreg = (ipc->opcode >> 0) & 7;
1768: uint8 dstdata = DATAREG(dstreg);
1769: uint8 bits = 8;
1770: uint8 count = srcdata & 63;
1771: uint8 outdata = count >= bits ? 0 : (dstdata << count);
1772:
1773: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1774: PC+= 2;
1775: }
1776:
1777: void cpu_op_1523b(t_ipc *ipc) /* LSL */ {
1778: /* mask f1f8, bits e108, mnemonic 71, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1779: unsigned int srcdata = ipc->src;
1780: int dstreg = (ipc->opcode >> 0) & 7;
1781: uint8 dstdata = DATAREG(dstreg);
1782: uint8 bits = 8;
1783: uint8 count = srcdata & 63;
1784: uint8 outdata = count >= bits ? 0 : (dstdata << count);
1785:
1786: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1787:
1788: if (!count)
1789: CFLAG = 0;
1790: else if (count >= bits) {
1791: CFLAG = (count == bits) ? dstdata & 1 : 0;
1792: XFLAG = (count == bits) ? dstdata & 1 : 0;
1793: } else {
1794: CFLAG = dstdata>>(bits-count) & 1;
1795: XFLAG = dstdata>>(bits-count) & 1;
1796: }
1797: VFLAG = 0;
1798: NFLAG = ((sint8)outdata) < 0;
1799: ZFLAG = !outdata;
1800: PC+= 2;
1801: }
1802:
1803: void cpu_op_1524a(t_ipc *ipc) /* LSL */ {
1804: /* mask f1f8, bits e148, mnemonic 71, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1805: unsigned int srcdata = ipc->src;
1806: int dstreg = (ipc->opcode >> 0) & 7;
1807: uint16 dstdata = DATAREG(dstreg);
1808: uint8 bits = 16;
1809: uint8 count = srcdata & 63;
1810: uint16 outdata = count >= bits ? 0 : (dstdata << count);
1811:
1812: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1813: PC+= 2;
1814: }
1815:
1816: void cpu_op_1524b(t_ipc *ipc) /* LSL */ {
1817: /* mask f1f8, bits e148, mnemonic 71, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1818: unsigned int srcdata = ipc->src;
1819: int dstreg = (ipc->opcode >> 0) & 7;
1820: uint16 dstdata = DATAREG(dstreg);
1821: uint8 bits = 16;
1822: uint8 count = srcdata & 63;
1823: uint16 outdata = count >= bits ? 0 : (dstdata << count);
1824:
1825: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1826:
1827: if (!count)
1828: CFLAG = 0;
1829: else if (count >= bits) {
1830: CFLAG = (count == bits) ? dstdata & 1 : 0;
1831: XFLAG = (count == bits) ? dstdata & 1 : 0;
1832: } else {
1833: CFLAG = dstdata>>(bits-count) & 1;
1834: XFLAG = dstdata>>(bits-count) & 1;
1835: }
1836: VFLAG = 0;
1837: NFLAG = ((sint16)outdata) < 0;
1838: ZFLAG = !outdata;
1839: PC+= 2;
1840: }
1841:
1842: void cpu_op_1525a(t_ipc *ipc) /* LSL */ {
1843: /* mask f1f8, bits e188, mnemonic 71, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1844: unsigned int srcdata = ipc->src;
1845: int dstreg = (ipc->opcode >> 0) & 7;
1846: uint32 dstdata = DATAREG(dstreg);
1847: uint8 bits = 32;
1848: uint8 count = srcdata & 63;
1849: uint32 outdata = count >= bits ? 0 : (dstdata << count);
1850:
1851: DATAREG(dstreg) = outdata;
1852: PC+= 2;
1853: }
1854:
1855: void cpu_op_1525b(t_ipc *ipc) /* LSL */ {
1856: /* mask f1f8, bits e188, mnemonic 71, priv 0, endblk 0, imm_notzero -1, used 0 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1857: unsigned int srcdata = ipc->src;
1858: int dstreg = (ipc->opcode >> 0) & 7;
1859: uint32 dstdata = DATAREG(dstreg);
1860: uint8 bits = 32;
1861: uint8 count = srcdata & 63;
1862: uint32 outdata = count >= bits ? 0 : (dstdata << count);
1863:
1864: DATAREG(dstreg) = outdata;
1865:
1866: if (!count)
1867: CFLAG = 0;
1868: else if (count >= bits) {
1869: CFLAG = (count == bits) ? dstdata & 1 : 0;
1870: XFLAG = (count == bits) ? dstdata & 1 : 0;
1871: } else {
1872: CFLAG = dstdata>>(bits-count) & 1;
1873: XFLAG = dstdata>>(bits-count) & 1;
1874: }
1875: VFLAG = 0;
1876: NFLAG = ((sint32)outdata) < 0;
1877: ZFLAG = !outdata;
1878: PC+= 2;
1879: }
1880:
1881: void cpu_op_1526a(t_ipc *ipc) /* ROXL */ {
1882: /* mask f1f8, bits e110, mnemonic 72, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1883: unsigned int srcdata = ipc->src;
1884: int dstreg = (ipc->opcode >> 0) & 7;
1885: uint8 dstdata = DATAREG(dstreg);
1886: uint8 bits = 8;
1887: uint8 loop = srcdata & 63;
1888: uint8 cflag = CFLAG;
1889: uint8 xflag = XFLAG;
1890: uint8 outdata = dstdata;
1891:
1892: while(loop) {
1893: cflag = outdata & 1<<(bits-1) ? 1 : 0;
1894: outdata<<= 1;
1895: outdata |= xflag;
1896: xflag = cflag;
1897: loop--;
1898: }
1899: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1900: PC+= 2;
1901: }
1902:
1903: void cpu_op_1526b(t_ipc *ipc) /* ROXL */ {
1904: /* mask f1f8, bits e110, mnemonic 72, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1905: unsigned int srcdata = ipc->src;
1906: int dstreg = (ipc->opcode >> 0) & 7;
1907: uint8 dstdata = DATAREG(dstreg);
1908: uint8 bits = 8;
1909: uint8 loop = srcdata & 63;
1910: uint8 cflag = CFLAG;
1911: uint8 xflag = XFLAG;
1912: uint8 outdata = dstdata;
1913:
1914: while(loop) {
1915: cflag = outdata & 1<<(bits-1) ? 1 : 0;
1916: outdata<<= 1;
1917: outdata |= xflag;
1918: xflag = cflag;
1919: loop--;
1920: }
1921: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
1922:
1923: XFLAG = xflag;
1924: CFLAG = xflag;
1925: NFLAG = ((sint8)outdata) < 0;
1926: ZFLAG = !outdata;
1927: VFLAG = 0;
1928: PC+= 2;
1929: }
1930:
1931: void cpu_op_1527a(t_ipc *ipc) /* ROXL */ {
1932: /* mask f1f8, bits e150, mnemonic 72, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1933: unsigned int srcdata = ipc->src;
1934: int dstreg = (ipc->opcode >> 0) & 7;
1935: uint16 dstdata = DATAREG(dstreg);
1936: uint8 bits = 16;
1937: uint8 loop = srcdata & 63;
1938: uint8 cflag = CFLAG;
1939: uint8 xflag = XFLAG;
1940: uint16 outdata = dstdata;
1941:
1942: while(loop) {
1943: cflag = outdata & 1<<(bits-1) ? 1 : 0;
1944: outdata<<= 1;
1945: outdata |= xflag;
1946: xflag = cflag;
1947: loop--;
1948: }
1949: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1950: PC+= 2;
1951: }
1952:
1953: void cpu_op_1527b(t_ipc *ipc) /* ROXL */ {
1954: /* mask f1f8, bits e150, mnemonic 72, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1955: unsigned int srcdata = ipc->src;
1956: int dstreg = (ipc->opcode >> 0) & 7;
1957: uint16 dstdata = DATAREG(dstreg);
1958: uint8 bits = 16;
1959: uint8 loop = srcdata & 63;
1960: uint8 cflag = CFLAG;
1961: uint8 xflag = XFLAG;
1962: uint16 outdata = dstdata;
1963:
1964: while(loop) {
1965: cflag = outdata & 1<<(bits-1) ? 1 : 0;
1966: outdata<<= 1;
1967: outdata |= xflag;
1968: xflag = cflag;
1969: loop--;
1970: }
1971: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
1972:
1973: XFLAG = xflag;
1974: CFLAG = xflag;
1975: NFLAG = ((sint16)outdata) < 0;
1976: ZFLAG = !outdata;
1977: VFLAG = 0;
1978: PC+= 2;
1979: }
1980:
1981: void cpu_op_1528a(t_ipc *ipc) /* ROXL */ {
1982: /* mask f1f8, bits e190, mnemonic 72, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
1983: unsigned int srcdata = ipc->src;
1984: int dstreg = (ipc->opcode >> 0) & 7;
1985: uint32 dstdata = DATAREG(dstreg);
1986: uint8 bits = 32;
1987: uint8 loop = srcdata & 63;
1988: uint8 cflag = CFLAG;
1989: uint8 xflag = XFLAG;
1990: uint32 outdata = dstdata;
1991:
1992: while(loop) {
1993: cflag = outdata & 1<<(bits-1) ? 1 : 0;
1994: outdata<<= 1;
1995: outdata |= xflag;
1996: xflag = cflag;
1997: loop--;
1998: }
1999: DATAREG(dstreg) = outdata;
2000: PC+= 2;
2001: }
2002:
2003: void cpu_op_1528b(t_ipc *ipc) /* ROXL */ {
2004: /* mask f1f8, bits e190, mnemonic 72, priv 0, endblk 0, imm_notzero -1, used 1 set -1, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2005: unsigned int srcdata = ipc->src;
2006: int dstreg = (ipc->opcode >> 0) & 7;
2007: uint32 dstdata = DATAREG(dstreg);
2008: uint8 bits = 32;
2009: uint8 loop = srcdata & 63;
2010: uint8 cflag = CFLAG;
2011: uint8 xflag = XFLAG;
2012: uint32 outdata = dstdata;
2013:
2014: while(loop) {
2015: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2016: outdata<<= 1;
2017: outdata |= xflag;
2018: xflag = cflag;
2019: loop--;
2020: }
2021: DATAREG(dstreg) = outdata;
2022:
2023: XFLAG = xflag;
2024: CFLAG = xflag;
2025: NFLAG = ((sint32)outdata) < 0;
2026: ZFLAG = !outdata;
2027: VFLAG = 0;
2028: PC+= 2;
2029: }
2030:
2031: void cpu_op_1529a(t_ipc *ipc) /* ROL */ {
2032: /* mask f1f8, bits e118, mnemonic 73, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2033: unsigned int srcdata = ipc->src;
2034: int dstreg = (ipc->opcode >> 0) & 7;
2035: uint8 dstdata = DATAREG(dstreg);
2036: uint8 bits = 8;
2037: uint8 loop = srcdata & 63;
2038: uint8 cflag = 0;
2039: uint8 outdata = dstdata;
2040:
2041: while(loop) {
2042: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2043: outdata<<= 1;
2044: if (cflag)
2045: outdata |= 1;
2046: loop--;
2047: }
2048: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2049: PC+= 2;
2050: }
2051:
2052: void cpu_op_1529b(t_ipc *ipc) /* ROL */ {
2053: /* mask f1f8, bits e118, mnemonic 73, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 1, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2054: unsigned int srcdata = ipc->src;
2055: int dstreg = (ipc->opcode >> 0) & 7;
2056: uint8 dstdata = DATAREG(dstreg);
2057: uint8 bits = 8;
2058: uint8 loop = srcdata & 63;
2059: uint8 cflag = 0;
2060: uint8 outdata = dstdata;
2061:
2062: while(loop) {
2063: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2064: outdata<<= 1;
2065: if (cflag)
2066: outdata |= 1;
2067: loop--;
2068: }
2069: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2070:
2071: CFLAG = cflag;
2072: NFLAG = ((sint8)outdata) < 0;
2073: ZFLAG = !outdata;
2074: VFLAG = 0;
2075: PC+= 2;
2076: }
2077:
2078: void cpu_op_1530a(t_ipc *ipc) /* ROL */ {
2079: /* mask f1f8, bits e158, mnemonic 73, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2080: unsigned int srcdata = ipc->src;
2081: int dstreg = (ipc->opcode >> 0) & 7;
2082: uint16 dstdata = DATAREG(dstreg);
2083: uint8 bits = 16;
2084: uint8 loop = srcdata & 63;
2085: uint8 cflag = 0;
2086: uint16 outdata = dstdata;
2087:
2088: while(loop) {
2089: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2090: outdata<<= 1;
2091: if (cflag)
2092: outdata |= 1;
2093: loop--;
2094: }
2095: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2096: PC+= 2;
2097: }
2098:
2099: void cpu_op_1530b(t_ipc *ipc) /* ROL */ {
2100: /* mask f1f8, bits e158, mnemonic 73, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 2, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2101: unsigned int srcdata = ipc->src;
2102: int dstreg = (ipc->opcode >> 0) & 7;
2103: uint16 dstdata = DATAREG(dstreg);
2104: uint8 bits = 16;
2105: uint8 loop = srcdata & 63;
2106: uint8 cflag = 0;
2107: uint16 outdata = dstdata;
2108:
2109: while(loop) {
2110: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2111: outdata<<= 1;
2112: if (cflag)
2113: outdata |= 1;
2114: loop--;
2115: }
2116: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2117:
2118: CFLAG = cflag;
2119: NFLAG = ((sint16)outdata) < 0;
2120: ZFLAG = !outdata;
2121: VFLAG = 0;
2122: PC+= 2;
2123: }
2124:
2125: void cpu_op_1531a(t_ipc *ipc) /* ROL */ {
2126: /* mask f1f8, bits e198, mnemonic 73, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2127: unsigned int srcdata = ipc->src;
2128: int dstreg = (ipc->opcode >> 0) & 7;
2129: uint32 dstdata = DATAREG(dstreg);
2130: uint8 bits = 32;
2131: uint8 loop = srcdata & 63;
2132: uint8 cflag = 0;
2133: uint32 outdata = dstdata;
2134:
2135: while(loop) {
2136: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2137: outdata<<= 1;
2138: if (cflag)
2139: outdata |= 1;
2140: loop--;
2141: }
2142: DATAREG(dstreg) = outdata;
2143: PC+= 2;
2144: }
2145:
2146: void cpu_op_1531b(t_ipc *ipc) /* ROL */ {
2147: /* mask f1f8, bits e198, mnemonic 73, priv 0, endblk 0, imm_notzero -1, used 0 set -2, size 3, stype 15, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2148: unsigned int srcdata = ipc->src;
2149: int dstreg = (ipc->opcode >> 0) & 7;
2150: uint32 dstdata = DATAREG(dstreg);
2151: uint8 bits = 32;
2152: uint8 loop = srcdata & 63;
2153: uint8 cflag = 0;
2154: uint32 outdata = dstdata;
2155:
2156: while(loop) {
2157: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2158: outdata<<= 1;
2159: if (cflag)
2160: outdata |= 1;
2161: loop--;
2162: }
2163: DATAREG(dstreg) = outdata;
2164:
2165: CFLAG = cflag;
2166: NFLAG = ((sint32)outdata) < 0;
2167: ZFLAG = !outdata;
2168: VFLAG = 0;
2169: PC+= 2;
2170: }
2171:
2172: void cpu_op_1532a(t_ipc *ipc) /* ASL */ {
2173: /* mask fff8, bits e100, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2174: unsigned int srcdata = 8;
2175: int dstreg = (ipc->opcode >> 0) & 7;
2176: uint8 dstdata = DATAREG(dstreg);
2177: uint8 bits = 8;
2178: uint8 count = srcdata & 63;
2179: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2180:
2181: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2182: PC+= 2;
2183: }
2184:
2185: void cpu_op_1532b(t_ipc *ipc) /* ASL */ {
2186: /* mask fff8, bits e100, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2187: unsigned int srcdata = 8;
2188: int dstreg = (ipc->opcode >> 0) & 7;
2189: uint8 dstdata = DATAREG(dstreg);
2190: uint8 bits = 8;
2191: uint8 count = srcdata & 63;
2192: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2193:
2194: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2195:
2196: if (!count)
2197: CFLAG = 0;
2198: else if (count >= bits) {
2199: CFLAG = (count == bits) ? dstdata & 1 : 0;
2200: XFLAG = (count == bits) ? dstdata & 1 : 0;
2201: VFLAG = !dstdata;
2202: } else {
2203: CFLAG = dstdata>>(bits-count) & 1;
2204: XFLAG = dstdata>>(bits-count) & 1;
2205: {
2206: uint8 mask = 0xff << (7-count);
2207: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
2208: }
2209: }
2210: NFLAG = ((sint8)outdata) < 0;
2211: ZFLAG = !outdata;
2212: PC+= 2;
2213: }
2214:
2215: void cpu_op_1533a(t_ipc *ipc) /* ASL */ {
2216: /* mask fff8, bits e140, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2217: unsigned int srcdata = 8;
2218: int dstreg = (ipc->opcode >> 0) & 7;
2219: uint16 dstdata = DATAREG(dstreg);
2220: uint8 bits = 16;
2221: uint8 count = srcdata & 63;
2222: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2223:
2224: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2225: PC+= 2;
2226: }
2227:
2228: void cpu_op_1533b(t_ipc *ipc) /* ASL */ {
2229: /* mask fff8, bits e140, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2230: unsigned int srcdata = 8;
2231: int dstreg = (ipc->opcode >> 0) & 7;
2232: uint16 dstdata = DATAREG(dstreg);
2233: uint8 bits = 16;
2234: uint8 count = srcdata & 63;
2235: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2236:
2237: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2238:
2239: if (!count)
2240: CFLAG = 0;
2241: else if (count >= bits) {
2242: CFLAG = (count == bits) ? dstdata & 1 : 0;
2243: XFLAG = (count == bits) ? dstdata & 1 : 0;
2244: VFLAG = !dstdata;
2245: } else {
2246: CFLAG = dstdata>>(bits-count) & 1;
2247: XFLAG = dstdata>>(bits-count) & 1;
2248: {
2249: uint16 mask = 0xffff << (15-count);
2250: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
2251: }
2252: }
2253: NFLAG = ((sint16)outdata) < 0;
2254: ZFLAG = !outdata;
2255: PC+= 2;
2256: }
2257:
2258: void cpu_op_1534a(t_ipc *ipc) /* ASL */ {
2259: /* mask fff8, bits e180, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2260: unsigned int srcdata = 8;
2261: int dstreg = (ipc->opcode >> 0) & 7;
2262: uint32 dstdata = DATAREG(dstreg);
2263: uint8 bits = 32;
2264: uint8 count = srcdata & 63;
2265: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2266:
2267: DATAREG(dstreg) = outdata;
2268: PC+= 2;
2269: }
2270:
2271: void cpu_op_1534b(t_ipc *ipc) /* ASL */ {
2272: /* mask fff8, bits e180, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2273: unsigned int srcdata = 8;
2274: int dstreg = (ipc->opcode >> 0) & 7;
2275: uint32 dstdata = DATAREG(dstreg);
2276: uint8 bits = 32;
2277: uint8 count = srcdata & 63;
2278: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2279:
2280: DATAREG(dstreg) = outdata;
2281:
2282: if (!count)
2283: CFLAG = 0;
2284: else if (count >= bits) {
2285: CFLAG = (count == bits) ? dstdata & 1 : 0;
2286: XFLAG = (count == bits) ? dstdata & 1 : 0;
2287: VFLAG = !dstdata;
2288: } else {
2289: CFLAG = dstdata>>(bits-count) & 1;
2290: XFLAG = dstdata>>(bits-count) & 1;
2291: {
2292: uint32 mask = 0xffffffff <<(31-count);
2293: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
2294: }
2295: }
2296: NFLAG = ((sint32)outdata) < 0;
2297: ZFLAG = !outdata;
2298: PC+= 2;
2299: }
2300:
2301: void cpu_op_1535a(t_ipc *ipc) /* LSL */ {
2302: /* mask fff8, bits e108, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2303: unsigned int srcdata = 8;
2304: int dstreg = (ipc->opcode >> 0) & 7;
2305: uint8 dstdata = DATAREG(dstreg);
2306: uint8 bits = 8;
2307: uint8 count = srcdata & 63;
2308: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2309:
2310: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2311: PC+= 2;
2312: }
2313:
2314: void cpu_op_1535b(t_ipc *ipc) /* LSL */ {
2315: /* mask fff8, bits e108, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2316: unsigned int srcdata = 8;
2317: int dstreg = (ipc->opcode >> 0) & 7;
2318: uint8 dstdata = DATAREG(dstreg);
2319: uint8 bits = 8;
2320: uint8 count = srcdata & 63;
2321: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2322:
2323: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2324:
2325: if (!count)
2326: CFLAG = 0;
2327: else if (count >= bits) {
2328: CFLAG = (count == bits) ? dstdata & 1 : 0;
2329: XFLAG = (count == bits) ? dstdata & 1 : 0;
2330: } else {
2331: CFLAG = dstdata>>(bits-count) & 1;
2332: XFLAG = dstdata>>(bits-count) & 1;
2333: }
2334: VFLAG = 0;
2335: NFLAG = ((sint8)outdata) < 0;
2336: ZFLAG = !outdata;
2337: PC+= 2;
2338: }
2339:
2340: void cpu_op_1536a(t_ipc *ipc) /* LSL */ {
2341: /* mask fff8, bits e148, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2342: unsigned int srcdata = 8;
2343: int dstreg = (ipc->opcode >> 0) & 7;
2344: uint16 dstdata = DATAREG(dstreg);
2345: uint8 bits = 16;
2346: uint8 count = srcdata & 63;
2347: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2348:
2349: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2350: PC+= 2;
2351: }
2352:
2353: void cpu_op_1536b(t_ipc *ipc) /* LSL */ {
2354: /* mask fff8, bits e148, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2355: unsigned int srcdata = 8;
2356: int dstreg = (ipc->opcode >> 0) & 7;
2357: uint16 dstdata = DATAREG(dstreg);
2358: uint8 bits = 16;
2359: uint8 count = srcdata & 63;
2360: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2361:
2362: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2363:
2364: if (!count)
2365: CFLAG = 0;
2366: else if (count >= bits) {
2367: CFLAG = (count == bits) ? dstdata & 1 : 0;
2368: XFLAG = (count == bits) ? dstdata & 1 : 0;
2369: } else {
2370: CFLAG = dstdata>>(bits-count) & 1;
2371: XFLAG = dstdata>>(bits-count) & 1;
2372: }
2373: VFLAG = 0;
2374: NFLAG = ((sint16)outdata) < 0;
2375: ZFLAG = !outdata;
2376: PC+= 2;
2377: }
2378:
2379: void cpu_op_1537a(t_ipc *ipc) /* LSL */ {
2380: /* mask fff8, bits e188, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2381: unsigned int srcdata = 8;
2382: int dstreg = (ipc->opcode >> 0) & 7;
2383: uint32 dstdata = DATAREG(dstreg);
2384: uint8 bits = 32;
2385: uint8 count = srcdata & 63;
2386: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2387:
2388: DATAREG(dstreg) = outdata;
2389: PC+= 2;
2390: }
2391:
2392: void cpu_op_1537b(t_ipc *ipc) /* LSL */ {
2393: /* mask fff8, bits e188, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2394: unsigned int srcdata = 8;
2395: int dstreg = (ipc->opcode >> 0) & 7;
2396: uint32 dstdata = DATAREG(dstreg);
2397: uint8 bits = 32;
2398: uint8 count = srcdata & 63;
2399: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2400:
2401: DATAREG(dstreg) = outdata;
2402:
2403: if (!count)
2404: CFLAG = 0;
2405: else if (count >= bits) {
2406: CFLAG = (count == bits) ? dstdata & 1 : 0;
2407: XFLAG = (count == bits) ? dstdata & 1 : 0;
2408: } else {
2409: CFLAG = dstdata>>(bits-count) & 1;
2410: XFLAG = dstdata>>(bits-count) & 1;
2411: }
2412: VFLAG = 0;
2413: NFLAG = ((sint32)outdata) < 0;
2414: ZFLAG = !outdata;
2415: PC+= 2;
2416: }
2417:
2418: void cpu_op_1538a(t_ipc *ipc) /* ROXL */ {
2419: /* mask fff8, bits e110, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2420: unsigned int srcdata = 8;
2421: int dstreg = (ipc->opcode >> 0) & 7;
2422: uint8 dstdata = DATAREG(dstreg);
2423: uint8 bits = 8;
2424: uint8 loop = srcdata & 63;
2425: uint8 cflag = CFLAG;
2426: uint8 xflag = XFLAG;
2427: uint8 outdata = dstdata;
2428:
2429: while(loop) {
2430: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2431: outdata<<= 1;
2432: outdata |= xflag;
2433: xflag = cflag;
2434: loop--;
2435: }
2436: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2437: PC+= 2;
2438: }
2439:
2440: void cpu_op_1538b(t_ipc *ipc) /* ROXL */ {
2441: /* mask fff8, bits e110, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2442: unsigned int srcdata = 8;
2443: int dstreg = (ipc->opcode >> 0) & 7;
2444: uint8 dstdata = DATAREG(dstreg);
2445: uint8 bits = 8;
2446: uint8 loop = srcdata & 63;
2447: uint8 cflag = CFLAG;
2448: uint8 xflag = XFLAG;
2449: uint8 outdata = dstdata;
2450:
2451: while(loop) {
2452: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2453: outdata<<= 1;
2454: outdata |= xflag;
2455: xflag = cflag;
2456: loop--;
2457: }
2458: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2459:
2460: XFLAG = xflag;
2461: CFLAG = xflag;
2462: NFLAG = ((sint8)outdata) < 0;
2463: ZFLAG = !outdata;
2464: VFLAG = 0;
2465: PC+= 2;
2466: }
2467:
2468: void cpu_op_1539a(t_ipc *ipc) /* ROXL */ {
2469: /* mask fff8, bits e150, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2470: unsigned int srcdata = 8;
2471: int dstreg = (ipc->opcode >> 0) & 7;
2472: uint16 dstdata = DATAREG(dstreg);
2473: uint8 bits = 16;
2474: uint8 loop = srcdata & 63;
2475: uint8 cflag = CFLAG;
2476: uint8 xflag = XFLAG;
2477: uint16 outdata = dstdata;
2478:
2479: while(loop) {
2480: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2481: outdata<<= 1;
2482: outdata |= xflag;
2483: xflag = cflag;
2484: loop--;
2485: }
2486: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2487: PC+= 2;
2488: }
2489:
2490: void cpu_op_1539b(t_ipc *ipc) /* ROXL */ {
2491: /* mask fff8, bits e150, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2492: unsigned int srcdata = 8;
2493: int dstreg = (ipc->opcode >> 0) & 7;
2494: uint16 dstdata = DATAREG(dstreg);
2495: uint8 bits = 16;
2496: uint8 loop = srcdata & 63;
2497: uint8 cflag = CFLAG;
2498: uint8 xflag = XFLAG;
2499: uint16 outdata = dstdata;
2500:
2501: while(loop) {
2502: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2503: outdata<<= 1;
2504: outdata |= xflag;
2505: xflag = cflag;
2506: loop--;
2507: }
2508: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2509:
2510: XFLAG = xflag;
2511: CFLAG = xflag;
2512: NFLAG = ((sint16)outdata) < 0;
2513: ZFLAG = !outdata;
2514: VFLAG = 0;
2515: PC+= 2;
2516: }
2517:
2518: void cpu_op_1540a(t_ipc *ipc) /* ROXL */ {
2519: /* mask fff8, bits e190, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2520: unsigned int srcdata = 8;
2521: int dstreg = (ipc->opcode >> 0) & 7;
2522: uint32 dstdata = DATAREG(dstreg);
2523: uint8 bits = 32;
2524: uint8 loop = srcdata & 63;
2525: uint8 cflag = CFLAG;
2526: uint8 xflag = XFLAG;
2527: uint32 outdata = dstdata;
2528:
2529: while(loop) {
2530: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2531: outdata<<= 1;
2532: outdata |= xflag;
2533: xflag = cflag;
2534: loop--;
2535: }
2536: DATAREG(dstreg) = outdata;
2537: PC+= 2;
2538: }
2539:
2540: void cpu_op_1540b(t_ipc *ipc) /* ROXL */ {
2541: /* mask fff8, bits e190, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2542: unsigned int srcdata = 8;
2543: int dstreg = (ipc->opcode >> 0) & 7;
2544: uint32 dstdata = DATAREG(dstreg);
2545: uint8 bits = 32;
2546: uint8 loop = srcdata & 63;
2547: uint8 cflag = CFLAG;
2548: uint8 xflag = XFLAG;
2549: uint32 outdata = dstdata;
2550:
2551: while(loop) {
2552: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2553: outdata<<= 1;
2554: outdata |= xflag;
2555: xflag = cflag;
2556: loop--;
2557: }
2558: DATAREG(dstreg) = outdata;
2559:
2560: XFLAG = xflag;
2561: CFLAG = xflag;
2562: NFLAG = ((sint32)outdata) < 0;
2563: ZFLAG = !outdata;
2564: VFLAG = 0;
2565: PC+= 2;
2566: }
2567:
2568: void cpu_op_1541a(t_ipc *ipc) /* ROL */ {
2569: /* mask fff8, bits e118, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2570: unsigned int srcdata = 8;
2571: int dstreg = (ipc->opcode >> 0) & 7;
2572: uint8 dstdata = DATAREG(dstreg);
2573: uint8 bits = 8;
2574: uint8 loop = srcdata & 63;
2575: uint8 cflag = 0;
2576: uint8 outdata = dstdata;
2577:
2578: while(loop) {
2579: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2580: outdata<<= 1;
2581: if (cflag)
2582: outdata |= 1;
2583: loop--;
2584: }
2585: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2586: PC+= 2;
2587: }
2588:
2589: void cpu_op_1541b(t_ipc *ipc) /* ROL */ {
2590: /* mask fff8, bits e118, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2591: unsigned int srcdata = 8;
2592: int dstreg = (ipc->opcode >> 0) & 7;
2593: uint8 dstdata = DATAREG(dstreg);
2594: uint8 bits = 8;
2595: uint8 loop = srcdata & 63;
2596: uint8 cflag = 0;
2597: uint8 outdata = dstdata;
2598:
2599: while(loop) {
2600: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2601: outdata<<= 1;
2602: if (cflag)
2603: outdata |= 1;
2604: loop--;
2605: }
2606: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2607:
2608: CFLAG = cflag;
2609: NFLAG = ((sint8)outdata) < 0;
2610: ZFLAG = !outdata;
2611: VFLAG = 0;
2612: PC+= 2;
2613: }
2614:
2615: void cpu_op_1542a(t_ipc *ipc) /* ROL */ {
2616: /* mask fff8, bits e158, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2617: unsigned int srcdata = 8;
2618: int dstreg = (ipc->opcode >> 0) & 7;
2619: uint16 dstdata = DATAREG(dstreg);
2620: uint8 bits = 16;
2621: uint8 loop = srcdata & 63;
2622: uint8 cflag = 0;
2623: uint16 outdata = dstdata;
2624:
2625: while(loop) {
2626: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2627: outdata<<= 1;
2628: if (cflag)
2629: outdata |= 1;
2630: loop--;
2631: }
2632: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2633: PC+= 2;
2634: }
2635:
2636: void cpu_op_1542b(t_ipc *ipc) /* ROL */ {
2637: /* mask fff8, bits e158, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2638: unsigned int srcdata = 8;
2639: int dstreg = (ipc->opcode >> 0) & 7;
2640: uint16 dstdata = DATAREG(dstreg);
2641: uint8 bits = 16;
2642: uint8 loop = srcdata & 63;
2643: uint8 cflag = 0;
2644: uint16 outdata = dstdata;
2645:
2646: while(loop) {
2647: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2648: outdata<<= 1;
2649: if (cflag)
2650: outdata |= 1;
2651: loop--;
2652: }
2653: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2654:
2655: CFLAG = cflag;
2656: NFLAG = ((sint16)outdata) < 0;
2657: ZFLAG = !outdata;
2658: VFLAG = 0;
2659: PC+= 2;
2660: }
2661:
2662: void cpu_op_1543a(t_ipc *ipc) /* ROL */ {
2663: /* mask fff8, bits e198, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2664: unsigned int srcdata = 8;
2665: int dstreg = (ipc->opcode >> 0) & 7;
2666: uint32 dstdata = DATAREG(dstreg);
2667: uint8 bits = 32;
2668: uint8 loop = srcdata & 63;
2669: uint8 cflag = 0;
2670: uint32 outdata = dstdata;
2671:
2672: while(loop) {
2673: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2674: outdata<<= 1;
2675: if (cflag)
2676: outdata |= 1;
2677: loop--;
2678: }
2679: DATAREG(dstreg) = outdata;
2680: PC+= 2;
2681: }
2682:
2683: void cpu_op_1543b(t_ipc *ipc) /* ROL */ {
2684: /* mask fff8, bits e198, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 14, dtype 0, sbitpos 0, dbitpos 0, immvalue 8 */
2685: unsigned int srcdata = 8;
2686: int dstreg = (ipc->opcode >> 0) & 7;
2687: uint32 dstdata = DATAREG(dstreg);
2688: uint8 bits = 32;
2689: uint8 loop = srcdata & 63;
2690: uint8 cflag = 0;
2691: uint32 outdata = dstdata;
2692:
2693: while(loop) {
2694: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2695: outdata<<= 1;
2696: if (cflag)
2697: outdata |= 1;
2698: loop--;
2699: }
2700: DATAREG(dstreg) = outdata;
2701:
2702: CFLAG = cflag;
2703: NFLAG = ((sint32)outdata) < 0;
2704: ZFLAG = !outdata;
2705: VFLAG = 0;
2706: PC+= 2;
2707: }
2708:
2709: void cpu_op_1544a(t_ipc *ipc) /* ASL */ {
2710: /* mask f1f8, bits e120, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2711: int srcreg = (ipc->opcode >> 9) & 7;
2712: uint8 srcdata = DATAREG(srcreg);
2713: int dstreg = (ipc->opcode >> 0) & 7;
2714: uint8 dstdata = DATAREG(dstreg);
2715: uint8 bits = 8;
2716: uint8 count = srcdata & 63;
2717: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2718:
2719: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2720: PC+= 2;
2721: }
2722:
2723: void cpu_op_1544b(t_ipc *ipc) /* ASL */ {
2724: /* mask f1f8, bits e120, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2725: int srcreg = (ipc->opcode >> 9) & 7;
2726: uint8 srcdata = DATAREG(srcreg);
2727: int dstreg = (ipc->opcode >> 0) & 7;
2728: uint8 dstdata = DATAREG(dstreg);
2729: uint8 bits = 8;
2730: uint8 count = srcdata & 63;
2731: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2732:
2733: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2734:
2735: if (!count)
2736: CFLAG = 0;
2737: else if (count >= bits) {
2738: CFLAG = (count == bits) ? dstdata & 1 : 0;
2739: XFLAG = (count == bits) ? dstdata & 1 : 0;
2740: VFLAG = !dstdata;
2741: } else {
2742: CFLAG = dstdata>>(bits-count) & 1;
2743: XFLAG = dstdata>>(bits-count) & 1;
2744: {
2745: uint8 mask = 0xff << (7-count);
2746: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
2747: }
2748: }
2749: NFLAG = ((sint8)outdata) < 0;
2750: ZFLAG = !outdata;
2751: PC+= 2;
2752: }
2753:
2754: void cpu_op_1545a(t_ipc *ipc) /* ASL */ {
2755: /* mask f1f8, bits e160, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2756: int srcreg = (ipc->opcode >> 9) & 7;
2757: uint16 srcdata = DATAREG(srcreg);
2758: int dstreg = (ipc->opcode >> 0) & 7;
2759: uint16 dstdata = DATAREG(dstreg);
2760: uint8 bits = 16;
2761: uint8 count = srcdata & 63;
2762: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2763:
2764: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2765: PC+= 2;
2766: }
2767:
2768: void cpu_op_1545b(t_ipc *ipc) /* ASL */ {
2769: /* mask f1f8, bits e160, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2770: int srcreg = (ipc->opcode >> 9) & 7;
2771: uint16 srcdata = DATAREG(srcreg);
2772: int dstreg = (ipc->opcode >> 0) & 7;
2773: uint16 dstdata = DATAREG(dstreg);
2774: uint8 bits = 16;
2775: uint8 count = srcdata & 63;
2776: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2777:
2778: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2779:
2780: if (!count)
2781: CFLAG = 0;
2782: else if (count >= bits) {
2783: CFLAG = (count == bits) ? dstdata & 1 : 0;
2784: XFLAG = (count == bits) ? dstdata & 1 : 0;
2785: VFLAG = !dstdata;
2786: } else {
2787: CFLAG = dstdata>>(bits-count) & 1;
2788: XFLAG = dstdata>>(bits-count) & 1;
2789: {
2790: uint16 mask = 0xffff << (15-count);
2791: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
2792: }
2793: }
2794: NFLAG = ((sint16)outdata) < 0;
2795: ZFLAG = !outdata;
2796: PC+= 2;
2797: }
2798:
2799: void cpu_op_1546a(t_ipc *ipc) /* ASL */ {
2800: /* mask f1f8, bits e1a0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2801: int srcreg = (ipc->opcode >> 9) & 7;
2802: uint32 srcdata = DATAREG(srcreg);
2803: int dstreg = (ipc->opcode >> 0) & 7;
2804: uint32 dstdata = DATAREG(dstreg);
2805: uint8 bits = 32;
2806: uint8 count = srcdata & 63;
2807: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2808:
2809: DATAREG(dstreg) = outdata;
2810: PC+= 2;
2811: }
2812:
2813: void cpu_op_1546b(t_ipc *ipc) /* ASL */ {
2814: /* mask f1f8, bits e1a0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2815: int srcreg = (ipc->opcode >> 9) & 7;
2816: uint32 srcdata = DATAREG(srcreg);
2817: int dstreg = (ipc->opcode >> 0) & 7;
2818: uint32 dstdata = DATAREG(dstreg);
2819: uint8 bits = 32;
2820: uint8 count = srcdata & 63;
2821: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2822:
2823: DATAREG(dstreg) = outdata;
2824:
2825: if (!count)
2826: CFLAG = 0;
2827: else if (count >= bits) {
2828: CFLAG = (count == bits) ? dstdata & 1 : 0;
2829: XFLAG = (count == bits) ? dstdata & 1 : 0;
2830: VFLAG = !dstdata;
2831: } else {
2832: CFLAG = dstdata>>(bits-count) & 1;
2833: XFLAG = dstdata>>(bits-count) & 1;
2834: {
2835: uint32 mask = 0xffffffff <<(31-count);
2836: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
2837: }
2838: }
2839: NFLAG = ((sint32)outdata) < 0;
2840: ZFLAG = !outdata;
2841: PC+= 2;
2842: }
2843:
2844: void cpu_op_1547a(t_ipc *ipc) /* LSL */ {
2845: /* mask f1f8, bits e128, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2846: int srcreg = (ipc->opcode >> 9) & 7;
2847: uint8 srcdata = DATAREG(srcreg);
2848: int dstreg = (ipc->opcode >> 0) & 7;
2849: uint8 dstdata = DATAREG(dstreg);
2850: uint8 bits = 8;
2851: uint8 count = srcdata & 63;
2852: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2853:
2854: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2855: PC+= 2;
2856: }
2857:
2858: void cpu_op_1547b(t_ipc *ipc) /* LSL */ {
2859: /* mask f1f8, bits e128, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2860: int srcreg = (ipc->opcode >> 9) & 7;
2861: uint8 srcdata = DATAREG(srcreg);
2862: int dstreg = (ipc->opcode >> 0) & 7;
2863: uint8 dstdata = DATAREG(dstreg);
2864: uint8 bits = 8;
2865: uint8 count = srcdata & 63;
2866: uint8 outdata = count >= bits ? 0 : (dstdata << count);
2867:
2868: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2869:
2870: if (!count)
2871: CFLAG = 0;
2872: else if (count >= bits) {
2873: CFLAG = (count == bits) ? dstdata & 1 : 0;
2874: XFLAG = (count == bits) ? dstdata & 1 : 0;
2875: } else {
2876: CFLAG = dstdata>>(bits-count) & 1;
2877: XFLAG = dstdata>>(bits-count) & 1;
2878: }
2879: VFLAG = 0;
2880: NFLAG = ((sint8)outdata) < 0;
2881: ZFLAG = !outdata;
2882: PC+= 2;
2883: }
2884:
2885: void cpu_op_1548a(t_ipc *ipc) /* LSL */ {
2886: /* mask f1f8, bits e168, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2887: int srcreg = (ipc->opcode >> 9) & 7;
2888: uint16 srcdata = DATAREG(srcreg);
2889: int dstreg = (ipc->opcode >> 0) & 7;
2890: uint16 dstdata = DATAREG(dstreg);
2891: uint8 bits = 16;
2892: uint8 count = srcdata & 63;
2893: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2894:
2895: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2896: PC+= 2;
2897: }
2898:
2899: void cpu_op_1548b(t_ipc *ipc) /* LSL */ {
2900: /* mask f1f8, bits e168, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2901: int srcreg = (ipc->opcode >> 9) & 7;
2902: uint16 srcdata = DATAREG(srcreg);
2903: int dstreg = (ipc->opcode >> 0) & 7;
2904: uint16 dstdata = DATAREG(dstreg);
2905: uint8 bits = 16;
2906: uint8 count = srcdata & 63;
2907: uint16 outdata = count >= bits ? 0 : (dstdata << count);
2908:
2909: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
2910:
2911: if (!count)
2912: CFLAG = 0;
2913: else if (count >= bits) {
2914: CFLAG = (count == bits) ? dstdata & 1 : 0;
2915: XFLAG = (count == bits) ? dstdata & 1 : 0;
2916: } else {
2917: CFLAG = dstdata>>(bits-count) & 1;
2918: XFLAG = dstdata>>(bits-count) & 1;
2919: }
2920: VFLAG = 0;
2921: NFLAG = ((sint16)outdata) < 0;
2922: ZFLAG = !outdata;
2923: PC+= 2;
2924: }
2925:
2926: void cpu_op_1549a(t_ipc *ipc) /* LSL */ {
2927: /* mask f1f8, bits e1a8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2928: int srcreg = (ipc->opcode >> 9) & 7;
2929: uint32 srcdata = DATAREG(srcreg);
2930: int dstreg = (ipc->opcode >> 0) & 7;
2931: uint32 dstdata = DATAREG(dstreg);
2932: uint8 bits = 32;
2933: uint8 count = srcdata & 63;
2934: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2935:
2936: DATAREG(dstreg) = outdata;
2937: PC+= 2;
2938: }
2939:
2940: void cpu_op_1549b(t_ipc *ipc) /* LSL */ {
2941: /* mask f1f8, bits e1a8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2942: int srcreg = (ipc->opcode >> 9) & 7;
2943: uint32 srcdata = DATAREG(srcreg);
2944: int dstreg = (ipc->opcode >> 0) & 7;
2945: uint32 dstdata = DATAREG(dstreg);
2946: uint8 bits = 32;
2947: uint8 count = srcdata & 63;
2948: uint32 outdata = count >= bits ? 0 : (dstdata << count);
2949:
2950: DATAREG(dstreg) = outdata;
2951:
2952: if (!count)
2953: CFLAG = 0;
2954: else if (count >= bits) {
2955: CFLAG = (count == bits) ? dstdata & 1 : 0;
2956: XFLAG = (count == bits) ? dstdata & 1 : 0;
2957: } else {
2958: CFLAG = dstdata>>(bits-count) & 1;
2959: XFLAG = dstdata>>(bits-count) & 1;
2960: }
2961: VFLAG = 0;
2962: NFLAG = ((sint32)outdata) < 0;
2963: ZFLAG = !outdata;
2964: PC+= 2;
2965: }
2966:
2967: void cpu_op_1550a(t_ipc *ipc) /* ROXL */ {
2968: /* mask f1f8, bits e130, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2969: int srcreg = (ipc->opcode >> 9) & 7;
2970: uint8 srcdata = DATAREG(srcreg);
2971: int dstreg = (ipc->opcode >> 0) & 7;
2972: uint8 dstdata = DATAREG(dstreg);
2973: uint8 bits = 8;
2974: uint8 loop = srcdata & 63;
2975: uint8 cflag = CFLAG;
2976: uint8 xflag = XFLAG;
2977: uint8 outdata = dstdata;
2978:
2979: while(loop) {
2980: cflag = outdata & 1<<(bits-1) ? 1 : 0;
2981: outdata<<= 1;
2982: outdata |= xflag;
2983: xflag = cflag;
2984: loop--;
2985: }
2986: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
2987: PC+= 2;
2988: }
2989:
2990: void cpu_op_1550b(t_ipc *ipc) /* ROXL */ {
2991: /* mask f1f8, bits e130, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
2992: int srcreg = (ipc->opcode >> 9) & 7;
2993: uint8 srcdata = DATAREG(srcreg);
2994: int dstreg = (ipc->opcode >> 0) & 7;
2995: uint8 dstdata = DATAREG(dstreg);
2996: uint8 bits = 8;
2997: uint8 loop = srcdata & 63;
2998: uint8 cflag = CFLAG;
2999: uint8 xflag = XFLAG;
3000: uint8 outdata = dstdata;
3001:
3002: while(loop) {
3003: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3004: outdata<<= 1;
3005: outdata |= xflag;
3006: xflag = cflag;
3007: loop--;
3008: }
3009: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
3010:
3011: XFLAG = xflag;
3012: CFLAG = xflag;
3013: NFLAG = ((sint8)outdata) < 0;
3014: ZFLAG = !outdata;
3015: VFLAG = 0;
3016: PC+= 2;
3017: }
3018:
3019: void cpu_op_1551a(t_ipc *ipc) /* ROXL */ {
3020: /* mask f1f8, bits e170, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3021: int srcreg = (ipc->opcode >> 9) & 7;
3022: uint16 srcdata = DATAREG(srcreg);
3023: int dstreg = (ipc->opcode >> 0) & 7;
3024: uint16 dstdata = DATAREG(dstreg);
3025: uint8 bits = 16;
3026: uint8 loop = srcdata & 63;
3027: uint8 cflag = CFLAG;
3028: uint8 xflag = XFLAG;
3029: uint16 outdata = dstdata;
3030:
3031: while(loop) {
3032: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3033: outdata<<= 1;
3034: outdata |= xflag;
3035: xflag = cflag;
3036: loop--;
3037: }
3038: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
3039: PC+= 2;
3040: }
3041:
3042: void cpu_op_1551b(t_ipc *ipc) /* ROXL */ {
3043: /* mask f1f8, bits e170, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3044: int srcreg = (ipc->opcode >> 9) & 7;
3045: uint16 srcdata = DATAREG(srcreg);
3046: int dstreg = (ipc->opcode >> 0) & 7;
3047: uint16 dstdata = DATAREG(dstreg);
3048: uint8 bits = 16;
3049: uint8 loop = srcdata & 63;
3050: uint8 cflag = CFLAG;
3051: uint8 xflag = XFLAG;
3052: uint16 outdata = dstdata;
3053:
3054: while(loop) {
3055: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3056: outdata<<= 1;
3057: outdata |= xflag;
3058: xflag = cflag;
3059: loop--;
3060: }
3061: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
3062:
3063: XFLAG = xflag;
3064: CFLAG = xflag;
3065: NFLAG = ((sint16)outdata) < 0;
3066: ZFLAG = !outdata;
3067: VFLAG = 0;
3068: PC+= 2;
3069: }
3070:
3071: void cpu_op_1552a(t_ipc *ipc) /* ROXL */ {
3072: /* mask f1f8, bits e1b0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3073: int srcreg = (ipc->opcode >> 9) & 7;
3074: uint32 srcdata = DATAREG(srcreg);
3075: int dstreg = (ipc->opcode >> 0) & 7;
3076: uint32 dstdata = DATAREG(dstreg);
3077: uint8 bits = 32;
3078: uint8 loop = srcdata & 63;
3079: uint8 cflag = CFLAG;
3080: uint8 xflag = XFLAG;
3081: uint32 outdata = dstdata;
3082:
3083: while(loop) {
3084: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3085: outdata<<= 1;
3086: outdata |= xflag;
3087: xflag = cflag;
3088: loop--;
3089: }
3090: DATAREG(dstreg) = outdata;
3091: PC+= 2;
3092: }
3093:
3094: void cpu_op_1552b(t_ipc *ipc) /* ROXL */ {
3095: /* mask f1f8, bits e1b0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3096: int srcreg = (ipc->opcode >> 9) & 7;
3097: uint32 srcdata = DATAREG(srcreg);
3098: int dstreg = (ipc->opcode >> 0) & 7;
3099: uint32 dstdata = DATAREG(dstreg);
3100: uint8 bits = 32;
3101: uint8 loop = srcdata & 63;
3102: uint8 cflag = CFLAG;
3103: uint8 xflag = XFLAG;
3104: uint32 outdata = dstdata;
3105:
3106: while(loop) {
3107: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3108: outdata<<= 1;
3109: outdata |= xflag;
3110: xflag = cflag;
3111: loop--;
3112: }
3113: DATAREG(dstreg) = outdata;
3114:
3115: XFLAG = xflag;
3116: CFLAG = xflag;
3117: NFLAG = ((sint32)outdata) < 0;
3118: ZFLAG = !outdata;
3119: VFLAG = 0;
3120: PC+= 2;
3121: }
3122:
3123: void cpu_op_1553a(t_ipc *ipc) /* ROL */ {
3124: /* mask f1f8, bits e138, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3125: int srcreg = (ipc->opcode >> 9) & 7;
3126: uint8 srcdata = DATAREG(srcreg);
3127: int dstreg = (ipc->opcode >> 0) & 7;
3128: uint8 dstdata = DATAREG(dstreg);
3129: uint8 bits = 8;
3130: uint8 loop = srcdata & 63;
3131: uint8 cflag = 0;
3132: uint8 outdata = dstdata;
3133:
3134: while(loop) {
3135: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3136: outdata<<= 1;
3137: if (cflag)
3138: outdata |= 1;
3139: loop--;
3140: }
3141: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
3142: PC+= 2;
3143: }
3144:
3145: void cpu_op_1553b(t_ipc *ipc) /* ROL */ {
3146: /* mask f1f8, bits e138, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 1, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3147: int srcreg = (ipc->opcode >> 9) & 7;
3148: uint8 srcdata = DATAREG(srcreg);
3149: int dstreg = (ipc->opcode >> 0) & 7;
3150: uint8 dstdata = DATAREG(dstreg);
3151: uint8 bits = 8;
3152: uint8 loop = srcdata & 63;
3153: uint8 cflag = 0;
3154: uint8 outdata = dstdata;
3155:
3156: while(loop) {
3157: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3158: outdata<<= 1;
3159: if (cflag)
3160: outdata |= 1;
3161: loop--;
3162: }
3163: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xff) | outdata;
3164:
3165: CFLAG = cflag;
3166: NFLAG = ((sint8)outdata) < 0;
3167: ZFLAG = !outdata;
3168: VFLAG = 0;
3169: PC+= 2;
3170: }
3171:
3172: void cpu_op_1554a(t_ipc *ipc) /* ROL */ {
3173: /* mask f1f8, bits e178, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3174: int srcreg = (ipc->opcode >> 9) & 7;
3175: uint16 srcdata = DATAREG(srcreg);
3176: int dstreg = (ipc->opcode >> 0) & 7;
3177: uint16 dstdata = DATAREG(dstreg);
3178: uint8 bits = 16;
3179: uint8 loop = srcdata & 63;
3180: uint8 cflag = 0;
3181: uint16 outdata = dstdata;
3182:
3183: while(loop) {
3184: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3185: outdata<<= 1;
3186: if (cflag)
3187: outdata |= 1;
3188: loop--;
3189: }
3190: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
3191: PC+= 2;
3192: }
3193:
3194: void cpu_op_1554b(t_ipc *ipc) /* ROL */ {
3195: /* mask f1f8, bits e178, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3196: int srcreg = (ipc->opcode >> 9) & 7;
3197: uint16 srcdata = DATAREG(srcreg);
3198: int dstreg = (ipc->opcode >> 0) & 7;
3199: uint16 dstdata = DATAREG(dstreg);
3200: uint8 bits = 16;
3201: uint8 loop = srcdata & 63;
3202: uint8 cflag = 0;
3203: uint16 outdata = dstdata;
3204:
3205: while(loop) {
3206: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3207: outdata<<= 1;
3208: if (cflag)
3209: outdata |= 1;
3210: loop--;
3211: }
3212: DATAREG(dstreg) = (DATAREG(dstreg) & ~0xffff) | outdata;
3213:
3214: CFLAG = cflag;
3215: NFLAG = ((sint16)outdata) < 0;
3216: ZFLAG = !outdata;
3217: VFLAG = 0;
3218: PC+= 2;
3219: }
3220:
3221: void cpu_op_1555a(t_ipc *ipc) /* ROL */ {
3222: /* mask f1f8, bits e1b8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3223: int srcreg = (ipc->opcode >> 9) & 7;
3224: uint32 srcdata = DATAREG(srcreg);
3225: int dstreg = (ipc->opcode >> 0) & 7;
3226: uint32 dstdata = DATAREG(dstreg);
3227: uint8 bits = 32;
3228: uint8 loop = srcdata & 63;
3229: uint8 cflag = 0;
3230: uint32 outdata = dstdata;
3231:
3232: while(loop) {
3233: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3234: outdata<<= 1;
3235: if (cflag)
3236: outdata |= 1;
3237: loop--;
3238: }
3239: DATAREG(dstreg) = outdata;
3240: PC+= 2;
3241: }
3242:
3243: void cpu_op_1555b(t_ipc *ipc) /* ROL */ {
3244: /* mask f1f8, bits e1b8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 3, stype 0, dtype 0, sbitpos 9, dbitpos 0, immvalue 0 */
3245: int srcreg = (ipc->opcode >> 9) & 7;
3246: uint32 srcdata = DATAREG(srcreg);
3247: int dstreg = (ipc->opcode >> 0) & 7;
3248: uint32 dstdata = DATAREG(dstreg);
3249: uint8 bits = 32;
3250: uint8 loop = srcdata & 63;
3251: uint8 cflag = 0;
3252: uint32 outdata = dstdata;
3253:
3254: while(loop) {
3255: cflag = outdata & 1<<(bits-1) ? 1 : 0;
3256: outdata<<= 1;
3257: if (cflag)
3258: outdata |= 1;
3259: loop--;
3260: }
3261: DATAREG(dstreg) = outdata;
3262:
3263: CFLAG = cflag;
3264: NFLAG = ((sint32)outdata) < 0;
3265: ZFLAG = !outdata;
3266: VFLAG = 0;
3267: PC+= 2;
3268: }
3269:
3270: void cpu_op_1556a(t_ipc *ipc) /* ASR */ {
3271: /* mask fff8, bits e0d0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
3272: unsigned int srcdata = 1;
3273: int dstreg = (ipc->opcode >> 0) & 7;
3274: uint32 dstaddr = ADDRREG(dstreg);
3275: uint16 dstdata = fetchword(dstaddr);
3276: uint8 bits = 16;
3277: uint8 count = srcdata & 63;
3278: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3279:
3280: storeword(dstaddr, outdata);
3281: PC+= 2;
3282: }
3283:
3284: void cpu_op_1556b(t_ipc *ipc) /* ASR */ {
3285: /* mask fff8, bits e0d0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
3286: unsigned int srcdata = 1;
3287: int dstreg = (ipc->opcode >> 0) & 7;
3288: uint32 dstaddr = ADDRREG(dstreg);
3289: uint16 dstdata = fetchword(dstaddr);
3290: uint8 bits = 16;
3291: uint8 count = srcdata & 63;
3292: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3293:
3294: storeword(dstaddr, outdata);
3295:
3296: if (!srcdata)
3297: CFLAG = 0;
3298: else if (srcdata >= bits) {
3299: CFLAG = dstdata>>(bits-1);
3300: XFLAG = dstdata>>(bits-1);
3301: } else {
3302: CFLAG = dstdata>>(count-1) & 1;
3303: XFLAG = dstdata>>(count-1) & 1;
3304: }
3305: VFLAG = 0;
3306: NFLAG = ((sint16)outdata) < 0;
3307: ZFLAG = !outdata;
3308: PC+= 2;
3309: }
3310:
3311: void cpu_op_1557a(t_ipc *ipc) /* ASR */ {
3312: /* mask fff8, bits e0d8, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
3313: unsigned int srcdata = 1;
3314: int dstreg = (ipc->opcode >> 0) & 7;
3315: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
3316: uint16 dstdata = fetchword(dstaddr);
3317: uint8 bits = 16;
3318: uint8 count = srcdata & 63;
3319: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3320:
3321: storeword(dstaddr, outdata);
3322: PC+= 2;
3323: }
3324:
3325: void cpu_op_1557b(t_ipc *ipc) /* ASR */ {
3326: /* mask fff8, bits e0d8, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
3327: unsigned int srcdata = 1;
3328: int dstreg = (ipc->opcode >> 0) & 7;
3329: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
3330: uint16 dstdata = fetchword(dstaddr);
3331: uint8 bits = 16;
3332: uint8 count = srcdata & 63;
3333: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3334:
3335: storeword(dstaddr, outdata);
3336:
3337: if (!srcdata)
3338: CFLAG = 0;
3339: else if (srcdata >= bits) {
3340: CFLAG = dstdata>>(bits-1);
3341: XFLAG = dstdata>>(bits-1);
3342: } else {
3343: CFLAG = dstdata>>(count-1) & 1;
3344: XFLAG = dstdata>>(count-1) & 1;
3345: }
3346: VFLAG = 0;
3347: NFLAG = ((sint16)outdata) < 0;
3348: ZFLAG = !outdata;
3349: PC+= 2;
3350: }
3351:
3352: void cpu_op_1558a(t_ipc *ipc) /* ASR */ {
3353: /* mask fff8, bits e0e0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
3354: unsigned int srcdata = 1;
3355: int dstreg = (ipc->opcode >> 0) & 7;
3356: uint32 dstaddr = ADDRREG(dstreg)-=2;
3357: uint16 dstdata = fetchword(dstaddr);
3358: uint8 bits = 16;
3359: uint8 count = srcdata & 63;
3360: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3361:
3362: storeword(dstaddr, outdata);
3363: PC+= 2;
3364: }
3365:
3366: void cpu_op_1558b(t_ipc *ipc) /* ASR */ {
3367: /* mask fff8, bits e0e0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
3368: unsigned int srcdata = 1;
3369: int dstreg = (ipc->opcode >> 0) & 7;
3370: uint32 dstaddr = ADDRREG(dstreg)-=2;
3371: uint16 dstdata = fetchword(dstaddr);
3372: uint8 bits = 16;
3373: uint8 count = srcdata & 63;
3374: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3375:
3376: storeword(dstaddr, outdata);
3377:
3378: if (!srcdata)
3379: CFLAG = 0;
3380: else if (srcdata >= bits) {
3381: CFLAG = dstdata>>(bits-1);
3382: XFLAG = dstdata>>(bits-1);
3383: } else {
3384: CFLAG = dstdata>>(count-1) & 1;
3385: XFLAG = dstdata>>(count-1) & 1;
3386: }
3387: VFLAG = 0;
3388: NFLAG = ((sint16)outdata) < 0;
3389: ZFLAG = !outdata;
3390: PC+= 2;
3391: }
3392:
3393: void cpu_op_1559a(t_ipc *ipc) /* ASR */ {
3394: /* mask fff8, bits e0e8, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
3395: unsigned int srcdata = 1;
3396: int dstreg = (ipc->opcode >> 0) & 7;
3397: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
3398: uint16 dstdata = fetchword(dstaddr);
3399: uint8 bits = 16;
3400: uint8 count = srcdata & 63;
3401: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3402:
3403: storeword(dstaddr, outdata);
3404: PC+= 4;
3405: }
3406:
3407: void cpu_op_1559b(t_ipc *ipc) /* ASR */ {
3408: /* mask fff8, bits e0e8, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
3409: unsigned int srcdata = 1;
3410: int dstreg = (ipc->opcode >> 0) & 7;
3411: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
3412: uint16 dstdata = fetchword(dstaddr);
3413: uint8 bits = 16;
3414: uint8 count = srcdata & 63;
3415: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3416:
3417: storeword(dstaddr, outdata);
3418:
3419: if (!srcdata)
3420: CFLAG = 0;
3421: else if (srcdata >= bits) {
3422: CFLAG = dstdata>>(bits-1);
3423: XFLAG = dstdata>>(bits-1);
3424: } else {
3425: CFLAG = dstdata>>(count-1) & 1;
3426: XFLAG = dstdata>>(count-1) & 1;
3427: }
3428: VFLAG = 0;
3429: NFLAG = ((sint16)outdata) < 0;
3430: ZFLAG = !outdata;
3431: PC+= 4;
3432: }
3433:
3434: void cpu_op_1560a(t_ipc *ipc) /* ASR */ {
3435: /* mask fff8, bits e0f0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
3436: unsigned int srcdata = 1;
3437: int dstreg = (ipc->opcode >> 0) & 7;
3438: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
3439: uint16 dstdata = fetchword(dstaddr);
3440: uint8 bits = 16;
3441: uint8 count = srcdata & 63;
3442: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3443:
3444: storeword(dstaddr, outdata);
3445: PC+= 4;
3446: }
3447:
3448: void cpu_op_1560b(t_ipc *ipc) /* ASR */ {
3449: /* mask fff8, bits e0f0, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
3450: unsigned int srcdata = 1;
3451: int dstreg = (ipc->opcode >> 0) & 7;
3452: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
3453: uint16 dstdata = fetchword(dstaddr);
3454: uint8 bits = 16;
3455: uint8 count = srcdata & 63;
3456: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3457:
3458: storeword(dstaddr, outdata);
3459:
3460: if (!srcdata)
3461: CFLAG = 0;
3462: else if (srcdata >= bits) {
3463: CFLAG = dstdata>>(bits-1);
3464: XFLAG = dstdata>>(bits-1);
3465: } else {
3466: CFLAG = dstdata>>(count-1) & 1;
3467: XFLAG = dstdata>>(count-1) & 1;
3468: }
3469: VFLAG = 0;
3470: NFLAG = ((sint16)outdata) < 0;
3471: ZFLAG = !outdata;
3472: PC+= 4;
3473: }
3474:
3475: void cpu_op_1561a(t_ipc *ipc) /* ASR */ {
3476: /* mask ffff, bits e0f8, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
3477: unsigned int srcdata = 1;
3478: uint32 dstaddr = ipc->dst;
3479: uint16 dstdata = fetchword(dstaddr);
3480: uint8 bits = 16;
3481: uint8 count = srcdata & 63;
3482: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3483:
3484: storeword(dstaddr, outdata);
3485: PC+= 4;
3486: }
3487:
3488: void cpu_op_1561b(t_ipc *ipc) /* ASR */ {
3489: /* mask ffff, bits e0f8, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
3490: unsigned int srcdata = 1;
3491: uint32 dstaddr = ipc->dst;
3492: uint16 dstdata = fetchword(dstaddr);
3493: uint8 bits = 16;
3494: uint8 count = srcdata & 63;
3495: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3496:
3497: storeword(dstaddr, outdata);
3498:
3499: if (!srcdata)
3500: CFLAG = 0;
3501: else if (srcdata >= bits) {
3502: CFLAG = dstdata>>(bits-1);
3503: XFLAG = dstdata>>(bits-1);
3504: } else {
3505: CFLAG = dstdata>>(count-1) & 1;
3506: XFLAG = dstdata>>(count-1) & 1;
3507: }
3508: VFLAG = 0;
3509: NFLAG = ((sint16)outdata) < 0;
3510: ZFLAG = !outdata;
3511: PC+= 4;
3512: }
3513:
3514: void cpu_op_1562a(t_ipc *ipc) /* ASR */ {
3515: /* mask ffff, bits e0f9, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
3516: unsigned int srcdata = 1;
3517: uint32 dstaddr = ipc->dst;
3518: uint16 dstdata = fetchword(dstaddr);
3519: uint8 bits = 16;
3520: uint8 count = srcdata & 63;
3521: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3522:
3523: storeword(dstaddr, outdata);
3524: PC+= 6;
3525: }
3526:
3527: void cpu_op_1562b(t_ipc *ipc) /* ASR */ {
3528: /* mask ffff, bits e0f9, mnemonic 66, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
3529: unsigned int srcdata = 1;
3530: uint32 dstaddr = ipc->dst;
3531: uint16 dstdata = fetchword(dstaddr);
3532: uint8 bits = 16;
3533: uint8 count = srcdata & 63;
3534: uint16 outdata = ((sint16)dstdata) >> (count > 15 ? 15 : count);
3535:
3536: storeword(dstaddr, outdata);
3537:
3538: if (!srcdata)
3539: CFLAG = 0;
3540: else if (srcdata >= bits) {
3541: CFLAG = dstdata>>(bits-1);
3542: XFLAG = dstdata>>(bits-1);
3543: } else {
3544: CFLAG = dstdata>>(count-1) & 1;
3545: XFLAG = dstdata>>(count-1) & 1;
3546: }
3547: VFLAG = 0;
3548: NFLAG = ((sint16)outdata) < 0;
3549: ZFLAG = !outdata;
3550: PC+= 6;
3551: }
3552:
3553: void cpu_op_1563a(t_ipc *ipc) /* LSR */ {
3554: /* mask fff8, bits e2d0, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
3555: unsigned int srcdata = 1;
3556: int dstreg = (ipc->opcode >> 0) & 7;
3557: uint32 dstaddr = ADDRREG(dstreg);
3558: uint16 dstdata = fetchword(dstaddr);
3559: uint8 bits = 16;
3560: uint8 count = srcdata & 63;
3561: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3562:
3563: storeword(dstaddr, outdata);
3564: PC+= 2;
3565: }
3566:
3567: void cpu_op_1563b(t_ipc *ipc) /* LSR */ {
3568: /* mask fff8, bits e2d0, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
3569: unsigned int srcdata = 1;
3570: int dstreg = (ipc->opcode >> 0) & 7;
3571: uint32 dstaddr = ADDRREG(dstreg);
3572: uint16 dstdata = fetchword(dstaddr);
3573: uint8 bits = 16;
3574: uint8 count = srcdata & 63;
3575: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3576:
3577: storeword(dstaddr, outdata);
3578:
3579: if (!count)
3580: CFLAG = 0;
3581: else if (count >= bits) {
3582: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3583: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3584: } else {
3585: CFLAG = dstdata>>(count-1) & 1;
3586: XFLAG = dstdata>>(count-1) & 1;
3587: }
3588: VFLAG = 0;
3589: NFLAG = ((sint16)outdata) < 0;
3590: ZFLAG = !outdata;
3591: PC+= 2;
3592: }
3593:
3594: void cpu_op_1564a(t_ipc *ipc) /* LSR */ {
3595: /* mask fff8, bits e2d8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
3596: unsigned int srcdata = 1;
3597: int dstreg = (ipc->opcode >> 0) & 7;
3598: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
3599: uint16 dstdata = fetchword(dstaddr);
3600: uint8 bits = 16;
3601: uint8 count = srcdata & 63;
3602: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3603:
3604: storeword(dstaddr, outdata);
3605: PC+= 2;
3606: }
3607:
3608: void cpu_op_1564b(t_ipc *ipc) /* LSR */ {
3609: /* mask fff8, bits e2d8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
3610: unsigned int srcdata = 1;
3611: int dstreg = (ipc->opcode >> 0) & 7;
3612: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
3613: uint16 dstdata = fetchword(dstaddr);
3614: uint8 bits = 16;
3615: uint8 count = srcdata & 63;
3616: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3617:
3618: storeword(dstaddr, outdata);
3619:
3620: if (!count)
3621: CFLAG = 0;
3622: else if (count >= bits) {
3623: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3624: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3625: } else {
3626: CFLAG = dstdata>>(count-1) & 1;
3627: XFLAG = dstdata>>(count-1) & 1;
3628: }
3629: VFLAG = 0;
3630: NFLAG = ((sint16)outdata) < 0;
3631: ZFLAG = !outdata;
3632: PC+= 2;
3633: }
3634:
3635: void cpu_op_1565a(t_ipc *ipc) /* LSR */ {
3636: /* mask fff8, bits e2e0, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
3637: unsigned int srcdata = 1;
3638: int dstreg = (ipc->opcode >> 0) & 7;
3639: uint32 dstaddr = ADDRREG(dstreg)-=2;
3640: uint16 dstdata = fetchword(dstaddr);
3641: uint8 bits = 16;
3642: uint8 count = srcdata & 63;
3643: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3644:
3645: storeword(dstaddr, outdata);
3646: PC+= 2;
3647: }
3648:
3649: void cpu_op_1565b(t_ipc *ipc) /* LSR */ {
3650: /* mask fff8, bits e2e0, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
3651: unsigned int srcdata = 1;
3652: int dstreg = (ipc->opcode >> 0) & 7;
3653: uint32 dstaddr = ADDRREG(dstreg)-=2;
3654: uint16 dstdata = fetchword(dstaddr);
3655: uint8 bits = 16;
3656: uint8 count = srcdata & 63;
3657: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3658:
3659: storeword(dstaddr, outdata);
3660:
3661: if (!count)
3662: CFLAG = 0;
3663: else if (count >= bits) {
3664: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3665: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3666: } else {
3667: CFLAG = dstdata>>(count-1) & 1;
3668: XFLAG = dstdata>>(count-1) & 1;
3669: }
3670: VFLAG = 0;
3671: NFLAG = ((sint16)outdata) < 0;
3672: ZFLAG = !outdata;
3673: PC+= 2;
3674: }
3675:
3676: void cpu_op_1566a(t_ipc *ipc) /* LSR */ {
3677: /* mask fff8, bits e2e8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
3678: unsigned int srcdata = 1;
3679: int dstreg = (ipc->opcode >> 0) & 7;
3680: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
3681: uint16 dstdata = fetchword(dstaddr);
3682: uint8 bits = 16;
3683: uint8 count = srcdata & 63;
3684: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3685:
3686: storeword(dstaddr, outdata);
3687: PC+= 4;
3688: }
3689:
3690: void cpu_op_1566b(t_ipc *ipc) /* LSR */ {
3691: /* mask fff8, bits e2e8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
3692: unsigned int srcdata = 1;
3693: int dstreg = (ipc->opcode >> 0) & 7;
3694: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
3695: uint16 dstdata = fetchword(dstaddr);
3696: uint8 bits = 16;
3697: uint8 count = srcdata & 63;
3698: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3699:
3700: storeword(dstaddr, outdata);
3701:
3702: if (!count)
3703: CFLAG = 0;
3704: else if (count >= bits) {
3705: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3706: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3707: } else {
3708: CFLAG = dstdata>>(count-1) & 1;
3709: XFLAG = dstdata>>(count-1) & 1;
3710: }
3711: VFLAG = 0;
3712: NFLAG = ((sint16)outdata) < 0;
3713: ZFLAG = !outdata;
3714: PC+= 4;
3715: }
3716:
3717: void cpu_op_1567a(t_ipc *ipc) /* LSR */ {
3718: /* mask fff8, bits e2f0, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
3719: unsigned int srcdata = 1;
3720: int dstreg = (ipc->opcode >> 0) & 7;
3721: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
3722: uint16 dstdata = fetchword(dstaddr);
3723: uint8 bits = 16;
3724: uint8 count = srcdata & 63;
3725: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3726:
3727: storeword(dstaddr, outdata);
3728: PC+= 4;
3729: }
3730:
3731: void cpu_op_1567b(t_ipc *ipc) /* LSR */ {
3732: /* mask fff8, bits e2f0, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
3733: unsigned int srcdata = 1;
3734: int dstreg = (ipc->opcode >> 0) & 7;
3735: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
3736: uint16 dstdata = fetchword(dstaddr);
3737: uint8 bits = 16;
3738: uint8 count = srcdata & 63;
3739: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3740:
3741: storeword(dstaddr, outdata);
3742:
3743: if (!count)
3744: CFLAG = 0;
3745: else if (count >= bits) {
3746: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3747: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3748: } else {
3749: CFLAG = dstdata>>(count-1) & 1;
3750: XFLAG = dstdata>>(count-1) & 1;
3751: }
3752: VFLAG = 0;
3753: NFLAG = ((sint16)outdata) < 0;
3754: ZFLAG = !outdata;
3755: PC+= 4;
3756: }
3757:
3758: void cpu_op_1568a(t_ipc *ipc) /* LSR */ {
3759: /* mask ffff, bits e2f8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
3760: unsigned int srcdata = 1;
3761: uint32 dstaddr = ipc->dst;
3762: uint16 dstdata = fetchword(dstaddr);
3763: uint8 bits = 16;
3764: uint8 count = srcdata & 63;
3765: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3766:
3767: storeword(dstaddr, outdata);
3768: PC+= 4;
3769: }
3770:
3771: void cpu_op_1568b(t_ipc *ipc) /* LSR */ {
3772: /* mask ffff, bits e2f8, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
3773: unsigned int srcdata = 1;
3774: uint32 dstaddr = ipc->dst;
3775: uint16 dstdata = fetchword(dstaddr);
3776: uint8 bits = 16;
3777: uint8 count = srcdata & 63;
3778: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3779:
3780: storeword(dstaddr, outdata);
3781:
3782: if (!count)
3783: CFLAG = 0;
3784: else if (count >= bits) {
3785: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3786: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3787: } else {
3788: CFLAG = dstdata>>(count-1) & 1;
3789: XFLAG = dstdata>>(count-1) & 1;
3790: }
3791: VFLAG = 0;
3792: NFLAG = ((sint16)outdata) < 0;
3793: ZFLAG = !outdata;
3794: PC+= 4;
3795: }
3796:
3797: void cpu_op_1569a(t_ipc *ipc) /* LSR */ {
3798: /* mask ffff, bits e2f9, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
3799: unsigned int srcdata = 1;
3800: uint32 dstaddr = ipc->dst;
3801: uint16 dstdata = fetchword(dstaddr);
3802: uint8 bits = 16;
3803: uint8 count = srcdata & 63;
3804: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3805:
3806: storeword(dstaddr, outdata);
3807: PC+= 6;
3808: }
3809:
3810: void cpu_op_1569b(t_ipc *ipc) /* LSR */ {
3811: /* mask ffff, bits e2f9, mnemonic 67, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
3812: unsigned int srcdata = 1;
3813: uint32 dstaddr = ipc->dst;
3814: uint16 dstdata = fetchword(dstaddr);
3815: uint8 bits = 16;
3816: uint8 count = srcdata & 63;
3817: uint16 outdata = dstdata >> (count > (bits-1) ? (bits-1) : count);
3818:
3819: storeword(dstaddr, outdata);
3820:
3821: if (!count)
3822: CFLAG = 0;
3823: else if (count >= bits) {
3824: CFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3825: XFLAG = (count == bits) ? dstdata>>(bits-1) : 0;
3826: } else {
3827: CFLAG = dstdata>>(count-1) & 1;
3828: XFLAG = dstdata>>(count-1) & 1;
3829: }
3830: VFLAG = 0;
3831: NFLAG = ((sint16)outdata) < 0;
3832: ZFLAG = !outdata;
3833: PC+= 6;
3834: }
3835:
3836: void cpu_op_1570a(t_ipc *ipc) /* ROXR */ {
3837: /* mask fff8, bits e4d0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
3838: unsigned int srcdata = 1;
3839: int dstreg = (ipc->opcode >> 0) & 7;
3840: uint32 dstaddr = ADDRREG(dstreg);
3841: uint16 dstdata = fetchword(dstaddr);
3842: uint8 bits = 16;
3843: uint8 loop = srcdata & 63;
3844: uint8 cflag = CFLAG;
3845: uint8 xflag = XFLAG;
3846: uint16 outdata = dstdata;
3847:
3848: while(loop) {
3849: cflag = outdata & 1;
3850: outdata>>= 1;
3851: if (xflag)
3852: outdata |= 1<<(bits-1);
3853: xflag = cflag;
3854: loop--;
3855: }
3856: storeword(dstaddr, outdata);
3857: PC+= 2;
3858: }
3859:
3860: void cpu_op_1570b(t_ipc *ipc) /* ROXR */ {
3861: /* mask fff8, bits e4d0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
3862: unsigned int srcdata = 1;
3863: int dstreg = (ipc->opcode >> 0) & 7;
3864: uint32 dstaddr = ADDRREG(dstreg);
3865: uint16 dstdata = fetchword(dstaddr);
3866: uint8 bits = 16;
3867: uint8 loop = srcdata & 63;
3868: uint8 cflag = CFLAG;
3869: uint8 xflag = XFLAG;
3870: uint16 outdata = dstdata;
3871:
3872: while(loop) {
3873: cflag = outdata & 1;
3874: outdata>>= 1;
3875: if (xflag)
3876: outdata |= 1<<(bits-1);
3877: xflag = cflag;
3878: loop--;
3879: }
3880: storeword(dstaddr, outdata);
3881:
3882: XFLAG = xflag;
3883: CFLAG = xflag;
3884: NFLAG = ((sint16)outdata) < 0;
3885: ZFLAG = !outdata;
3886: VFLAG = 0;
3887: PC+= 2;
3888: }
3889:
3890: void cpu_op_1571a(t_ipc *ipc) /* ROXR */ {
3891: /* mask fff8, bits e4d8, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
3892: unsigned int srcdata = 1;
3893: int dstreg = (ipc->opcode >> 0) & 7;
3894: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
3895: uint16 dstdata = fetchword(dstaddr);
3896: uint8 bits = 16;
3897: uint8 loop = srcdata & 63;
3898: uint8 cflag = CFLAG;
3899: uint8 xflag = XFLAG;
3900: uint16 outdata = dstdata;
3901:
3902: while(loop) {
3903: cflag = outdata & 1;
3904: outdata>>= 1;
3905: if (xflag)
3906: outdata |= 1<<(bits-1);
3907: xflag = cflag;
3908: loop--;
3909: }
3910: storeword(dstaddr, outdata);
3911: PC+= 2;
3912: }
3913:
3914: void cpu_op_1571b(t_ipc *ipc) /* ROXR */ {
3915: /* mask fff8, bits e4d8, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
3916: unsigned int srcdata = 1;
3917: int dstreg = (ipc->opcode >> 0) & 7;
3918: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
3919: uint16 dstdata = fetchword(dstaddr);
3920: uint8 bits = 16;
3921: uint8 loop = srcdata & 63;
3922: uint8 cflag = CFLAG;
3923: uint8 xflag = XFLAG;
3924: uint16 outdata = dstdata;
3925:
3926: while(loop) {
3927: cflag = outdata & 1;
3928: outdata>>= 1;
3929: if (xflag)
3930: outdata |= 1<<(bits-1);
3931: xflag = cflag;
3932: loop--;
3933: }
3934: storeword(dstaddr, outdata);
3935:
3936: XFLAG = xflag;
3937: CFLAG = xflag;
3938: NFLAG = ((sint16)outdata) < 0;
3939: ZFLAG = !outdata;
3940: VFLAG = 0;
3941: PC+= 2;
3942: }
3943:
3944: void cpu_op_1572a(t_ipc *ipc) /* ROXR */ {
3945: /* mask fff8, bits e4e0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
3946: unsigned int srcdata = 1;
3947: int dstreg = (ipc->opcode >> 0) & 7;
3948: uint32 dstaddr = ADDRREG(dstreg)-=2;
3949: uint16 dstdata = fetchword(dstaddr);
3950: uint8 bits = 16;
3951: uint8 loop = srcdata & 63;
3952: uint8 cflag = CFLAG;
3953: uint8 xflag = XFLAG;
3954: uint16 outdata = dstdata;
3955:
3956: while(loop) {
3957: cflag = outdata & 1;
3958: outdata>>= 1;
3959: if (xflag)
3960: outdata |= 1<<(bits-1);
3961: xflag = cflag;
3962: loop--;
3963: }
3964: storeword(dstaddr, outdata);
3965: PC+= 2;
3966: }
3967:
3968: void cpu_op_1572b(t_ipc *ipc) /* ROXR */ {
3969: /* mask fff8, bits e4e0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
3970: unsigned int srcdata = 1;
3971: int dstreg = (ipc->opcode >> 0) & 7;
3972: uint32 dstaddr = ADDRREG(dstreg)-=2;
3973: uint16 dstdata = fetchword(dstaddr);
3974: uint8 bits = 16;
3975: uint8 loop = srcdata & 63;
3976: uint8 cflag = CFLAG;
3977: uint8 xflag = XFLAG;
3978: uint16 outdata = dstdata;
3979:
3980: while(loop) {
3981: cflag = outdata & 1;
3982: outdata>>= 1;
3983: if (xflag)
3984: outdata |= 1<<(bits-1);
3985: xflag = cflag;
3986: loop--;
3987: }
3988: storeword(dstaddr, outdata);
3989:
3990: XFLAG = xflag;
3991: CFLAG = xflag;
3992: NFLAG = ((sint16)outdata) < 0;
3993: ZFLAG = !outdata;
3994: VFLAG = 0;
3995: PC+= 2;
3996: }
3997:
3998: void cpu_op_1573a(t_ipc *ipc) /* ROXR */ {
3999: /* mask fff8, bits e4e8, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4000: unsigned int srcdata = 1;
4001: int dstreg = (ipc->opcode >> 0) & 7;
4002: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4003: uint16 dstdata = fetchword(dstaddr);
4004: uint8 bits = 16;
4005: uint8 loop = srcdata & 63;
4006: uint8 cflag = CFLAG;
4007: uint8 xflag = XFLAG;
4008: uint16 outdata = dstdata;
4009:
4010: while(loop) {
4011: cflag = outdata & 1;
4012: outdata>>= 1;
4013: if (xflag)
4014: outdata |= 1<<(bits-1);
4015: xflag = cflag;
4016: loop--;
4017: }
4018: storeword(dstaddr, outdata);
4019: PC+= 4;
4020: }
4021:
4022: void cpu_op_1573b(t_ipc *ipc) /* ROXR */ {
4023: /* mask fff8, bits e4e8, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4024: unsigned int srcdata = 1;
4025: int dstreg = (ipc->opcode >> 0) & 7;
4026: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4027: uint16 dstdata = fetchword(dstaddr);
4028: uint8 bits = 16;
4029: uint8 loop = srcdata & 63;
4030: uint8 cflag = CFLAG;
4031: uint8 xflag = XFLAG;
4032: uint16 outdata = dstdata;
4033:
4034: while(loop) {
4035: cflag = outdata & 1;
4036: outdata>>= 1;
4037: if (xflag)
4038: outdata |= 1<<(bits-1);
4039: xflag = cflag;
4040: loop--;
4041: }
4042: storeword(dstaddr, outdata);
4043:
4044: XFLAG = xflag;
4045: CFLAG = xflag;
4046: NFLAG = ((sint16)outdata) < 0;
4047: ZFLAG = !outdata;
4048: VFLAG = 0;
4049: PC+= 4;
4050: }
4051:
4052: void cpu_op_1574a(t_ipc *ipc) /* ROXR */ {
4053: /* mask fff8, bits e4f0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
4054: unsigned int srcdata = 1;
4055: int dstreg = (ipc->opcode >> 0) & 7;
4056: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
4057: uint16 dstdata = fetchword(dstaddr);
4058: uint8 bits = 16;
4059: uint8 loop = srcdata & 63;
4060: uint8 cflag = CFLAG;
4061: uint8 xflag = XFLAG;
4062: uint16 outdata = dstdata;
4063:
4064: while(loop) {
4065: cflag = outdata & 1;
4066: outdata>>= 1;
4067: if (xflag)
4068: outdata |= 1<<(bits-1);
4069: xflag = cflag;
4070: loop--;
4071: }
4072: storeword(dstaddr, outdata);
4073: PC+= 4;
4074: }
4075:
4076: void cpu_op_1574b(t_ipc *ipc) /* ROXR */ {
4077: /* mask fff8, bits e4f0, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
4078: unsigned int srcdata = 1;
4079: int dstreg = (ipc->opcode >> 0) & 7;
4080: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
4081: uint16 dstdata = fetchword(dstaddr);
4082: uint8 bits = 16;
4083: uint8 loop = srcdata & 63;
4084: uint8 cflag = CFLAG;
4085: uint8 xflag = XFLAG;
4086: uint16 outdata = dstdata;
4087:
4088: while(loop) {
4089: cflag = outdata & 1;
4090: outdata>>= 1;
4091: if (xflag)
4092: outdata |= 1<<(bits-1);
4093: xflag = cflag;
4094: loop--;
4095: }
4096: storeword(dstaddr, outdata);
4097:
4098: XFLAG = xflag;
4099: CFLAG = xflag;
4100: NFLAG = ((sint16)outdata) < 0;
4101: ZFLAG = !outdata;
4102: VFLAG = 0;
4103: PC+= 4;
4104: }
4105:
4106: void cpu_op_1575a(t_ipc *ipc) /* ROXR */ {
4107: /* mask ffff, bits e4f8, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
4108: unsigned int srcdata = 1;
4109: uint32 dstaddr = ipc->dst;
4110: uint16 dstdata = fetchword(dstaddr);
4111: uint8 bits = 16;
4112: uint8 loop = srcdata & 63;
4113: uint8 cflag = CFLAG;
4114: uint8 xflag = XFLAG;
4115: uint16 outdata = dstdata;
4116:
4117: while(loop) {
4118: cflag = outdata & 1;
4119: outdata>>= 1;
4120: if (xflag)
4121: outdata |= 1<<(bits-1);
4122: xflag = cflag;
4123: loop--;
4124: }
4125: storeword(dstaddr, outdata);
4126: PC+= 4;
4127: }
4128:
4129: void cpu_op_1575b(t_ipc *ipc) /* ROXR */ {
4130: /* mask ffff, bits e4f8, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
4131: unsigned int srcdata = 1;
4132: uint32 dstaddr = ipc->dst;
4133: uint16 dstdata = fetchword(dstaddr);
4134: uint8 bits = 16;
4135: uint8 loop = srcdata & 63;
4136: uint8 cflag = CFLAG;
4137: uint8 xflag = XFLAG;
4138: uint16 outdata = dstdata;
4139:
4140: while(loop) {
4141: cflag = outdata & 1;
4142: outdata>>= 1;
4143: if (xflag)
4144: outdata |= 1<<(bits-1);
4145: xflag = cflag;
4146: loop--;
4147: }
4148: storeword(dstaddr, outdata);
4149:
4150: XFLAG = xflag;
4151: CFLAG = xflag;
4152: NFLAG = ((sint16)outdata) < 0;
4153: ZFLAG = !outdata;
4154: VFLAG = 0;
4155: PC+= 4;
4156: }
4157:
4158: void cpu_op_1576a(t_ipc *ipc) /* ROXR */ {
4159: /* mask ffff, bits e4f9, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
4160: unsigned int srcdata = 1;
4161: uint32 dstaddr = ipc->dst;
4162: uint16 dstdata = fetchword(dstaddr);
4163: uint8 bits = 16;
4164: uint8 loop = srcdata & 63;
4165: uint8 cflag = CFLAG;
4166: uint8 xflag = XFLAG;
4167: uint16 outdata = dstdata;
4168:
4169: while(loop) {
4170: cflag = outdata & 1;
4171: outdata>>= 1;
4172: if (xflag)
4173: outdata |= 1<<(bits-1);
4174: xflag = cflag;
4175: loop--;
4176: }
4177: storeword(dstaddr, outdata);
4178: PC+= 6;
4179: }
4180:
4181: void cpu_op_1576b(t_ipc *ipc) /* ROXR */ {
4182: /* mask ffff, bits e4f9, mnemonic 68, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
4183: unsigned int srcdata = 1;
4184: uint32 dstaddr = ipc->dst;
4185: uint16 dstdata = fetchword(dstaddr);
4186: uint8 bits = 16;
4187: uint8 loop = srcdata & 63;
4188: uint8 cflag = CFLAG;
4189: uint8 xflag = XFLAG;
4190: uint16 outdata = dstdata;
4191:
4192: while(loop) {
4193: cflag = outdata & 1;
4194: outdata>>= 1;
4195: if (xflag)
4196: outdata |= 1<<(bits-1);
4197: xflag = cflag;
4198: loop--;
4199: }
4200: storeword(dstaddr, outdata);
4201:
4202: XFLAG = xflag;
4203: CFLAG = xflag;
4204: NFLAG = ((sint16)outdata) < 0;
4205: ZFLAG = !outdata;
4206: VFLAG = 0;
4207: PC+= 6;
4208: }
4209:
4210: void cpu_op_1577a(t_ipc *ipc) /* ROR */ {
4211: /* mask fff8, bits e6d0, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
4212: unsigned int srcdata = 1;
4213: int dstreg = (ipc->opcode >> 0) & 7;
4214: uint32 dstaddr = ADDRREG(dstreg);
4215: uint16 dstdata = fetchword(dstaddr);
4216: uint8 bits = 16;
4217: uint8 loop = srcdata & 63;
4218: uint8 cflag = 0;
4219: uint16 outdata = dstdata;
4220:
4221: while(loop) {
4222: cflag = outdata & 1;
4223: outdata>>= 1;
4224: if (cflag)
4225: outdata |= 1<<(bits-1);
4226: loop--;
4227: }
4228: storeword(dstaddr, outdata);
4229: PC+= 2;
4230: }
4231:
4232: void cpu_op_1577b(t_ipc *ipc) /* ROR */ {
4233: /* mask fff8, bits e6d0, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
4234: unsigned int srcdata = 1;
4235: int dstreg = (ipc->opcode >> 0) & 7;
4236: uint32 dstaddr = ADDRREG(dstreg);
4237: uint16 dstdata = fetchword(dstaddr);
4238: uint8 bits = 16;
4239: uint8 loop = srcdata & 63;
4240: uint8 cflag = 0;
4241: uint16 outdata = dstdata;
4242:
4243: while(loop) {
4244: cflag = outdata & 1;
4245: outdata>>= 1;
4246: if (cflag)
4247: outdata |= 1<<(bits-1);
4248: loop--;
4249: }
4250: storeword(dstaddr, outdata);
4251:
4252: CFLAG = cflag;
4253: NFLAG = ((sint16)outdata) < 0;
4254: ZFLAG = !outdata;
4255: VFLAG = 0;
4256: PC+= 2;
4257: }
4258:
4259: void cpu_op_1578a(t_ipc *ipc) /* ROR */ {
4260: /* mask fff8, bits e6d8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
4261: unsigned int srcdata = 1;
4262: int dstreg = (ipc->opcode >> 0) & 7;
4263: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
4264: uint16 dstdata = fetchword(dstaddr);
4265: uint8 bits = 16;
4266: uint8 loop = srcdata & 63;
4267: uint8 cflag = 0;
4268: uint16 outdata = dstdata;
4269:
4270: while(loop) {
4271: cflag = outdata & 1;
4272: outdata>>= 1;
4273: if (cflag)
4274: outdata |= 1<<(bits-1);
4275: loop--;
4276: }
4277: storeword(dstaddr, outdata);
4278: PC+= 2;
4279: }
4280:
4281: void cpu_op_1578b(t_ipc *ipc) /* ROR */ {
4282: /* mask fff8, bits e6d8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
4283: unsigned int srcdata = 1;
4284: int dstreg = (ipc->opcode >> 0) & 7;
4285: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
4286: uint16 dstdata = fetchword(dstaddr);
4287: uint8 bits = 16;
4288: uint8 loop = srcdata & 63;
4289: uint8 cflag = 0;
4290: uint16 outdata = dstdata;
4291:
4292: while(loop) {
4293: cflag = outdata & 1;
4294: outdata>>= 1;
4295: if (cflag)
4296: outdata |= 1<<(bits-1);
4297: loop--;
4298: }
4299: storeword(dstaddr, outdata);
4300:
4301: CFLAG = cflag;
4302: NFLAG = ((sint16)outdata) < 0;
4303: ZFLAG = !outdata;
4304: VFLAG = 0;
4305: PC+= 2;
4306: }
4307:
4308: void cpu_op_1579a(t_ipc *ipc) /* ROR */ {
4309: /* mask fff8, bits e6e0, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
4310: unsigned int srcdata = 1;
4311: int dstreg = (ipc->opcode >> 0) & 7;
4312: uint32 dstaddr = ADDRREG(dstreg)-=2;
4313: uint16 dstdata = fetchword(dstaddr);
4314: uint8 bits = 16;
4315: uint8 loop = srcdata & 63;
4316: uint8 cflag = 0;
4317: uint16 outdata = dstdata;
4318:
4319: while(loop) {
4320: cflag = outdata & 1;
4321: outdata>>= 1;
4322: if (cflag)
4323: outdata |= 1<<(bits-1);
4324: loop--;
4325: }
4326: storeword(dstaddr, outdata);
4327: PC+= 2;
4328: }
4329:
4330: void cpu_op_1579b(t_ipc *ipc) /* ROR */ {
4331: /* mask fff8, bits e6e0, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
4332: unsigned int srcdata = 1;
4333: int dstreg = (ipc->opcode >> 0) & 7;
4334: uint32 dstaddr = ADDRREG(dstreg)-=2;
4335: uint16 dstdata = fetchword(dstaddr);
4336: uint8 bits = 16;
4337: uint8 loop = srcdata & 63;
4338: uint8 cflag = 0;
4339: uint16 outdata = dstdata;
4340:
4341: while(loop) {
4342: cflag = outdata & 1;
4343: outdata>>= 1;
4344: if (cflag)
4345: outdata |= 1<<(bits-1);
4346: loop--;
4347: }
4348: storeword(dstaddr, outdata);
4349:
4350: CFLAG = cflag;
4351: NFLAG = ((sint16)outdata) < 0;
4352: ZFLAG = !outdata;
4353: VFLAG = 0;
4354: PC+= 2;
4355: }
4356:
4357: void cpu_op_1580a(t_ipc *ipc) /* ROR */ {
4358: /* mask fff8, bits e6e8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4359: unsigned int srcdata = 1;
4360: int dstreg = (ipc->opcode >> 0) & 7;
4361: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4362: uint16 dstdata = fetchword(dstaddr);
4363: uint8 bits = 16;
4364: uint8 loop = srcdata & 63;
4365: uint8 cflag = 0;
4366: uint16 outdata = dstdata;
4367:
4368: while(loop) {
4369: cflag = outdata & 1;
4370: outdata>>= 1;
4371: if (cflag)
4372: outdata |= 1<<(bits-1);
4373: loop--;
4374: }
4375: storeword(dstaddr, outdata);
4376: PC+= 4;
4377: }
4378:
4379: void cpu_op_1580b(t_ipc *ipc) /* ROR */ {
4380: /* mask fff8, bits e6e8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4381: unsigned int srcdata = 1;
4382: int dstreg = (ipc->opcode >> 0) & 7;
4383: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4384: uint16 dstdata = fetchword(dstaddr);
4385: uint8 bits = 16;
4386: uint8 loop = srcdata & 63;
4387: uint8 cflag = 0;
4388: uint16 outdata = dstdata;
4389:
4390: while(loop) {
4391: cflag = outdata & 1;
4392: outdata>>= 1;
4393: if (cflag)
4394: outdata |= 1<<(bits-1);
4395: loop--;
4396: }
4397: storeword(dstaddr, outdata);
4398:
4399: CFLAG = cflag;
4400: NFLAG = ((sint16)outdata) < 0;
4401: ZFLAG = !outdata;
4402: VFLAG = 0;
4403: PC+= 4;
4404: }
4405:
4406: void cpu_op_1581a(t_ipc *ipc) /* ROR */ {
4407: /* mask fff8, bits e6f0, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
4408: unsigned int srcdata = 1;
4409: int dstreg = (ipc->opcode >> 0) & 7;
4410: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
4411: uint16 dstdata = fetchword(dstaddr);
4412: uint8 bits = 16;
4413: uint8 loop = srcdata & 63;
4414: uint8 cflag = 0;
4415: uint16 outdata = dstdata;
4416:
4417: while(loop) {
4418: cflag = outdata & 1;
4419: outdata>>= 1;
4420: if (cflag)
4421: outdata |= 1<<(bits-1);
4422: loop--;
4423: }
4424: storeword(dstaddr, outdata);
4425: PC+= 4;
4426: }
4427:
4428: void cpu_op_1581b(t_ipc *ipc) /* ROR */ {
4429: /* mask fff8, bits e6f0, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
4430: unsigned int srcdata = 1;
4431: int dstreg = (ipc->opcode >> 0) & 7;
4432: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
4433: uint16 dstdata = fetchword(dstaddr);
4434: uint8 bits = 16;
4435: uint8 loop = srcdata & 63;
4436: uint8 cflag = 0;
4437: uint16 outdata = dstdata;
4438:
4439: while(loop) {
4440: cflag = outdata & 1;
4441: outdata>>= 1;
4442: if (cflag)
4443: outdata |= 1<<(bits-1);
4444: loop--;
4445: }
4446: storeword(dstaddr, outdata);
4447:
4448: CFLAG = cflag;
4449: NFLAG = ((sint16)outdata) < 0;
4450: ZFLAG = !outdata;
4451: VFLAG = 0;
4452: PC+= 4;
4453: }
4454:
4455: void cpu_op_1582a(t_ipc *ipc) /* ROR */ {
4456: /* mask ffff, bits e6f8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
4457: unsigned int srcdata = 1;
4458: uint32 dstaddr = ipc->dst;
4459: uint16 dstdata = fetchword(dstaddr);
4460: uint8 bits = 16;
4461: uint8 loop = srcdata & 63;
4462: uint8 cflag = 0;
4463: uint16 outdata = dstdata;
4464:
4465: while(loop) {
4466: cflag = outdata & 1;
4467: outdata>>= 1;
4468: if (cflag)
4469: outdata |= 1<<(bits-1);
4470: loop--;
4471: }
4472: storeword(dstaddr, outdata);
4473: PC+= 4;
4474: }
4475:
4476: void cpu_op_1582b(t_ipc *ipc) /* ROR */ {
4477: /* mask ffff, bits e6f8, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
4478: unsigned int srcdata = 1;
4479: uint32 dstaddr = ipc->dst;
4480: uint16 dstdata = fetchword(dstaddr);
4481: uint8 bits = 16;
4482: uint8 loop = srcdata & 63;
4483: uint8 cflag = 0;
4484: uint16 outdata = dstdata;
4485:
4486: while(loop) {
4487: cflag = outdata & 1;
4488: outdata>>= 1;
4489: if (cflag)
4490: outdata |= 1<<(bits-1);
4491: loop--;
4492: }
4493: storeword(dstaddr, outdata);
4494:
4495: CFLAG = cflag;
4496: NFLAG = ((sint16)outdata) < 0;
4497: ZFLAG = !outdata;
4498: VFLAG = 0;
4499: PC+= 4;
4500: }
4501:
4502: void cpu_op_1583a(t_ipc *ipc) /* ROR */ {
4503: /* mask ffff, bits e6f9, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
4504: unsigned int srcdata = 1;
4505: uint32 dstaddr = ipc->dst;
4506: uint16 dstdata = fetchword(dstaddr);
4507: uint8 bits = 16;
4508: uint8 loop = srcdata & 63;
4509: uint8 cflag = 0;
4510: uint16 outdata = dstdata;
4511:
4512: while(loop) {
4513: cflag = outdata & 1;
4514: outdata>>= 1;
4515: if (cflag)
4516: outdata |= 1<<(bits-1);
4517: loop--;
4518: }
4519: storeword(dstaddr, outdata);
4520: PC+= 6;
4521: }
4522:
4523: void cpu_op_1583b(t_ipc *ipc) /* ROR */ {
4524: /* mask ffff, bits e6f9, mnemonic 69, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
4525: unsigned int srcdata = 1;
4526: uint32 dstaddr = ipc->dst;
4527: uint16 dstdata = fetchword(dstaddr);
4528: uint8 bits = 16;
4529: uint8 loop = srcdata & 63;
4530: uint8 cflag = 0;
4531: uint16 outdata = dstdata;
4532:
4533: while(loop) {
4534: cflag = outdata & 1;
4535: outdata>>= 1;
4536: if (cflag)
4537: outdata |= 1<<(bits-1);
4538: loop--;
4539: }
4540: storeword(dstaddr, outdata);
4541:
4542: CFLAG = cflag;
4543: NFLAG = ((sint16)outdata) < 0;
4544: ZFLAG = !outdata;
4545: VFLAG = 0;
4546: PC+= 6;
4547: }
4548:
4549: void cpu_op_1584a(t_ipc *ipc) /* ASL */ {
4550: /* mask fff8, bits e1d0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
4551: unsigned int srcdata = 1;
4552: int dstreg = (ipc->opcode >> 0) & 7;
4553: uint32 dstaddr = ADDRREG(dstreg);
4554: uint16 dstdata = fetchword(dstaddr);
4555: uint8 bits = 16;
4556: uint8 count = srcdata & 63;
4557: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4558:
4559: storeword(dstaddr, outdata);
4560: PC+= 2;
4561: }
4562:
4563: void cpu_op_1584b(t_ipc *ipc) /* ASL */ {
4564: /* mask fff8, bits e1d0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
4565: unsigned int srcdata = 1;
4566: int dstreg = (ipc->opcode >> 0) & 7;
4567: uint32 dstaddr = ADDRREG(dstreg);
4568: uint16 dstdata = fetchword(dstaddr);
4569: uint8 bits = 16;
4570: uint8 count = srcdata & 63;
4571: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4572:
4573: storeword(dstaddr, outdata);
4574:
4575: if (!count)
4576: CFLAG = 0;
4577: else if (count >= bits) {
4578: CFLAG = (count == bits) ? dstdata & 1 : 0;
4579: XFLAG = (count == bits) ? dstdata & 1 : 0;
4580: VFLAG = !dstdata;
4581: } else {
4582: CFLAG = dstdata>>(bits-count) & 1;
4583: XFLAG = dstdata>>(bits-count) & 1;
4584: {
4585: uint16 mask = 0xffff << (15-count);
4586: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4587: }
4588: }
4589: NFLAG = ((sint16)outdata) < 0;
4590: ZFLAG = !outdata;
4591: PC+= 2;
4592: }
4593:
4594: void cpu_op_1585a(t_ipc *ipc) /* ASL */ {
4595: /* mask fff8, bits e1d8, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
4596: unsigned int srcdata = 1;
4597: int dstreg = (ipc->opcode >> 0) & 7;
4598: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
4599: uint16 dstdata = fetchword(dstaddr);
4600: uint8 bits = 16;
4601: uint8 count = srcdata & 63;
4602: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4603:
4604: storeword(dstaddr, outdata);
4605: PC+= 2;
4606: }
4607:
4608: void cpu_op_1585b(t_ipc *ipc) /* ASL */ {
4609: /* mask fff8, bits e1d8, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
4610: unsigned int srcdata = 1;
4611: int dstreg = (ipc->opcode >> 0) & 7;
4612: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
4613: uint16 dstdata = fetchword(dstaddr);
4614: uint8 bits = 16;
4615: uint8 count = srcdata & 63;
4616: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4617:
4618: storeword(dstaddr, outdata);
4619:
4620: if (!count)
4621: CFLAG = 0;
4622: else if (count >= bits) {
4623: CFLAG = (count == bits) ? dstdata & 1 : 0;
4624: XFLAG = (count == bits) ? dstdata & 1 : 0;
4625: VFLAG = !dstdata;
4626: } else {
4627: CFLAG = dstdata>>(bits-count) & 1;
4628: XFLAG = dstdata>>(bits-count) & 1;
4629: {
4630: uint16 mask = 0xffff << (15-count);
4631: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4632: }
4633: }
4634: NFLAG = ((sint16)outdata) < 0;
4635: ZFLAG = !outdata;
4636: PC+= 2;
4637: }
4638:
4639: void cpu_op_1586a(t_ipc *ipc) /* ASL */ {
4640: /* mask fff8, bits e1e0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
4641: unsigned int srcdata = 1;
4642: int dstreg = (ipc->opcode >> 0) & 7;
4643: uint32 dstaddr = ADDRREG(dstreg)-=2;
4644: uint16 dstdata = fetchword(dstaddr);
4645: uint8 bits = 16;
4646: uint8 count = srcdata & 63;
4647: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4648:
4649: storeword(dstaddr, outdata);
4650: PC+= 2;
4651: }
4652:
4653: void cpu_op_1586b(t_ipc *ipc) /* ASL */ {
4654: /* mask fff8, bits e1e0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
4655: unsigned int srcdata = 1;
4656: int dstreg = (ipc->opcode >> 0) & 7;
4657: uint32 dstaddr = ADDRREG(dstreg)-=2;
4658: uint16 dstdata = fetchword(dstaddr);
4659: uint8 bits = 16;
4660: uint8 count = srcdata & 63;
4661: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4662:
4663: storeword(dstaddr, outdata);
4664:
4665: if (!count)
4666: CFLAG = 0;
4667: else if (count >= bits) {
4668: CFLAG = (count == bits) ? dstdata & 1 : 0;
4669: XFLAG = (count == bits) ? dstdata & 1 : 0;
4670: VFLAG = !dstdata;
4671: } else {
4672: CFLAG = dstdata>>(bits-count) & 1;
4673: XFLAG = dstdata>>(bits-count) & 1;
4674: {
4675: uint16 mask = 0xffff << (15-count);
4676: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4677: }
4678: }
4679: NFLAG = ((sint16)outdata) < 0;
4680: ZFLAG = !outdata;
4681: PC+= 2;
4682: }
4683:
4684: void cpu_op_1587a(t_ipc *ipc) /* ASL */ {
4685: /* mask fff8, bits e1e8, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4686: unsigned int srcdata = 1;
4687: int dstreg = (ipc->opcode >> 0) & 7;
4688: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4689: uint16 dstdata = fetchword(dstaddr);
4690: uint8 bits = 16;
4691: uint8 count = srcdata & 63;
4692: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4693:
4694: storeword(dstaddr, outdata);
4695: PC+= 4;
4696: }
4697:
4698: void cpu_op_1587b(t_ipc *ipc) /* ASL */ {
4699: /* mask fff8, bits e1e8, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4700: unsigned int srcdata = 1;
4701: int dstreg = (ipc->opcode >> 0) & 7;
4702: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4703: uint16 dstdata = fetchword(dstaddr);
4704: uint8 bits = 16;
4705: uint8 count = srcdata & 63;
4706: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4707:
4708: storeword(dstaddr, outdata);
4709:
4710: if (!count)
4711: CFLAG = 0;
4712: else if (count >= bits) {
4713: CFLAG = (count == bits) ? dstdata & 1 : 0;
4714: XFLAG = (count == bits) ? dstdata & 1 : 0;
4715: VFLAG = !dstdata;
4716: } else {
4717: CFLAG = dstdata>>(bits-count) & 1;
4718: XFLAG = dstdata>>(bits-count) & 1;
4719: {
4720: uint16 mask = 0xffff << (15-count);
4721: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4722: }
4723: }
4724: NFLAG = ((sint16)outdata) < 0;
4725: ZFLAG = !outdata;
4726: PC+= 4;
4727: }
4728:
4729: void cpu_op_1588a(t_ipc *ipc) /* ASL */ {
4730: /* mask fff8, bits e1f0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
4731: unsigned int srcdata = 1;
4732: int dstreg = (ipc->opcode >> 0) & 7;
4733: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
4734: uint16 dstdata = fetchword(dstaddr);
4735: uint8 bits = 16;
4736: uint8 count = srcdata & 63;
4737: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4738:
4739: storeword(dstaddr, outdata);
4740: PC+= 4;
4741: }
4742:
4743: void cpu_op_1588b(t_ipc *ipc) /* ASL */ {
4744: /* mask fff8, bits e1f0, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
4745: unsigned int srcdata = 1;
4746: int dstreg = (ipc->opcode >> 0) & 7;
4747: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
4748: uint16 dstdata = fetchword(dstaddr);
4749: uint8 bits = 16;
4750: uint8 count = srcdata & 63;
4751: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4752:
4753: storeword(dstaddr, outdata);
4754:
4755: if (!count)
4756: CFLAG = 0;
4757: else if (count >= bits) {
4758: CFLAG = (count == bits) ? dstdata & 1 : 0;
4759: XFLAG = (count == bits) ? dstdata & 1 : 0;
4760: VFLAG = !dstdata;
4761: } else {
4762: CFLAG = dstdata>>(bits-count) & 1;
4763: XFLAG = dstdata>>(bits-count) & 1;
4764: {
4765: uint16 mask = 0xffff << (15-count);
4766: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4767: }
4768: }
4769: NFLAG = ((sint16)outdata) < 0;
4770: ZFLAG = !outdata;
4771: PC+= 4;
4772: }
4773:
4774: void cpu_op_1589a(t_ipc *ipc) /* ASL */ {
4775: /* mask ffff, bits e1f8, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
4776: unsigned int srcdata = 1;
4777: uint32 dstaddr = ipc->dst;
4778: uint16 dstdata = fetchword(dstaddr);
4779: uint8 bits = 16;
4780: uint8 count = srcdata & 63;
4781: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4782:
4783: storeword(dstaddr, outdata);
4784: PC+= 4;
4785: }
4786:
4787: void cpu_op_1589b(t_ipc *ipc) /* ASL */ {
4788: /* mask ffff, bits e1f8, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
4789: unsigned int srcdata = 1;
4790: uint32 dstaddr = ipc->dst;
4791: uint16 dstdata = fetchword(dstaddr);
4792: uint8 bits = 16;
4793: uint8 count = srcdata & 63;
4794: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4795:
4796: storeword(dstaddr, outdata);
4797:
4798: if (!count)
4799: CFLAG = 0;
4800: else if (count >= bits) {
4801: CFLAG = (count == bits) ? dstdata & 1 : 0;
4802: XFLAG = (count == bits) ? dstdata & 1 : 0;
4803: VFLAG = !dstdata;
4804: } else {
4805: CFLAG = dstdata>>(bits-count) & 1;
4806: XFLAG = dstdata>>(bits-count) & 1;
4807: {
4808: uint16 mask = 0xffff << (15-count);
4809: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4810: }
4811: }
4812: NFLAG = ((sint16)outdata) < 0;
4813: ZFLAG = !outdata;
4814: PC+= 4;
4815: }
4816:
4817: void cpu_op_1590a(t_ipc *ipc) /* ASL */ {
4818: /* mask ffff, bits e1f9, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
4819: unsigned int srcdata = 1;
4820: uint32 dstaddr = ipc->dst;
4821: uint16 dstdata = fetchword(dstaddr);
4822: uint8 bits = 16;
4823: uint8 count = srcdata & 63;
4824: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4825:
4826: storeword(dstaddr, outdata);
4827: PC+= 6;
4828: }
4829:
4830: void cpu_op_1590b(t_ipc *ipc) /* ASL */ {
4831: /* mask ffff, bits e1f9, mnemonic 70, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
4832: unsigned int srcdata = 1;
4833: uint32 dstaddr = ipc->dst;
4834: uint16 dstdata = fetchword(dstaddr);
4835: uint8 bits = 16;
4836: uint8 count = srcdata & 63;
4837: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4838:
4839: storeword(dstaddr, outdata);
4840:
4841: if (!count)
4842: CFLAG = 0;
4843: else if (count >= bits) {
4844: CFLAG = (count == bits) ? dstdata & 1 : 0;
4845: XFLAG = (count == bits) ? dstdata & 1 : 0;
4846: VFLAG = !dstdata;
4847: } else {
4848: CFLAG = dstdata>>(bits-count) & 1;
4849: XFLAG = dstdata>>(bits-count) & 1;
4850: {
4851: uint16 mask = 0xffff << (15-count);
4852: VFLAG = ((dstdata & mask) != mask) && ((dstdata & mask) != 0);
4853: }
4854: }
4855: NFLAG = ((sint16)outdata) < 0;
4856: ZFLAG = !outdata;
4857: PC+= 6;
4858: }
4859:
4860: void cpu_op_1591a(t_ipc *ipc) /* LSL */ {
4861: /* mask fff8, bits e3d0, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
4862: unsigned int srcdata = 1;
4863: int dstreg = (ipc->opcode >> 0) & 7;
4864: uint32 dstaddr = ADDRREG(dstreg);
4865: uint16 dstdata = fetchword(dstaddr);
4866: uint8 bits = 16;
4867: uint8 count = srcdata & 63;
4868: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4869:
4870: storeword(dstaddr, outdata);
4871: PC+= 2;
4872: }
4873:
4874: void cpu_op_1591b(t_ipc *ipc) /* LSL */ {
4875: /* mask fff8, bits e3d0, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
4876: unsigned int srcdata = 1;
4877: int dstreg = (ipc->opcode >> 0) & 7;
4878: uint32 dstaddr = ADDRREG(dstreg);
4879: uint16 dstdata = fetchword(dstaddr);
4880: uint8 bits = 16;
4881: uint8 count = srcdata & 63;
4882: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4883:
4884: storeword(dstaddr, outdata);
4885:
4886: if (!count)
4887: CFLAG = 0;
4888: else if (count >= bits) {
4889: CFLAG = (count == bits) ? dstdata & 1 : 0;
4890: XFLAG = (count == bits) ? dstdata & 1 : 0;
4891: } else {
4892: CFLAG = dstdata>>(bits-count) & 1;
4893: XFLAG = dstdata>>(bits-count) & 1;
4894: }
4895: VFLAG = 0;
4896: NFLAG = ((sint16)outdata) < 0;
4897: ZFLAG = !outdata;
4898: PC+= 2;
4899: }
4900:
4901: void cpu_op_1592a(t_ipc *ipc) /* LSL */ {
4902: /* mask fff8, bits e3d8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
4903: unsigned int srcdata = 1;
4904: int dstreg = (ipc->opcode >> 0) & 7;
4905: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
4906: uint16 dstdata = fetchword(dstaddr);
4907: uint8 bits = 16;
4908: uint8 count = srcdata & 63;
4909: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4910:
4911: storeword(dstaddr, outdata);
4912: PC+= 2;
4913: }
4914:
4915: void cpu_op_1592b(t_ipc *ipc) /* LSL */ {
4916: /* mask fff8, bits e3d8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
4917: unsigned int srcdata = 1;
4918: int dstreg = (ipc->opcode >> 0) & 7;
4919: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
4920: uint16 dstdata = fetchword(dstaddr);
4921: uint8 bits = 16;
4922: uint8 count = srcdata & 63;
4923: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4924:
4925: storeword(dstaddr, outdata);
4926:
4927: if (!count)
4928: CFLAG = 0;
4929: else if (count >= bits) {
4930: CFLAG = (count == bits) ? dstdata & 1 : 0;
4931: XFLAG = (count == bits) ? dstdata & 1 : 0;
4932: } else {
4933: CFLAG = dstdata>>(bits-count) & 1;
4934: XFLAG = dstdata>>(bits-count) & 1;
4935: }
4936: VFLAG = 0;
4937: NFLAG = ((sint16)outdata) < 0;
4938: ZFLAG = !outdata;
4939: PC+= 2;
4940: }
4941:
4942: void cpu_op_1593a(t_ipc *ipc) /* LSL */ {
4943: /* mask fff8, bits e3e0, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
4944: unsigned int srcdata = 1;
4945: int dstreg = (ipc->opcode >> 0) & 7;
4946: uint32 dstaddr = ADDRREG(dstreg)-=2;
4947: uint16 dstdata = fetchword(dstaddr);
4948: uint8 bits = 16;
4949: uint8 count = srcdata & 63;
4950: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4951:
4952: storeword(dstaddr, outdata);
4953: PC+= 2;
4954: }
4955:
4956: void cpu_op_1593b(t_ipc *ipc) /* LSL */ {
4957: /* mask fff8, bits e3e0, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
4958: unsigned int srcdata = 1;
4959: int dstreg = (ipc->opcode >> 0) & 7;
4960: uint32 dstaddr = ADDRREG(dstreg)-=2;
4961: uint16 dstdata = fetchword(dstaddr);
4962: uint8 bits = 16;
4963: uint8 count = srcdata & 63;
4964: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4965:
4966: storeword(dstaddr, outdata);
4967:
4968: if (!count)
4969: CFLAG = 0;
4970: else if (count >= bits) {
4971: CFLAG = (count == bits) ? dstdata & 1 : 0;
4972: XFLAG = (count == bits) ? dstdata & 1 : 0;
4973: } else {
4974: CFLAG = dstdata>>(bits-count) & 1;
4975: XFLAG = dstdata>>(bits-count) & 1;
4976: }
4977: VFLAG = 0;
4978: NFLAG = ((sint16)outdata) < 0;
4979: ZFLAG = !outdata;
4980: PC+= 2;
4981: }
4982:
4983: void cpu_op_1594a(t_ipc *ipc) /* LSL */ {
4984: /* mask fff8, bits e3e8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4985: unsigned int srcdata = 1;
4986: int dstreg = (ipc->opcode >> 0) & 7;
4987: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
4988: uint16 dstdata = fetchword(dstaddr);
4989: uint8 bits = 16;
4990: uint8 count = srcdata & 63;
4991: uint16 outdata = count >= bits ? 0 : (dstdata << count);
4992:
4993: storeword(dstaddr, outdata);
4994: PC+= 4;
4995: }
4996:
4997: void cpu_op_1594b(t_ipc *ipc) /* LSL */ {
4998: /* mask fff8, bits e3e8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
4999: unsigned int srcdata = 1;
5000: int dstreg = (ipc->opcode >> 0) & 7;
5001: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
5002: uint16 dstdata = fetchword(dstaddr);
5003: uint8 bits = 16;
5004: uint8 count = srcdata & 63;
5005: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5006:
5007: storeword(dstaddr, outdata);
5008:
5009: if (!count)
5010: CFLAG = 0;
5011: else if (count >= bits) {
5012: CFLAG = (count == bits) ? dstdata & 1 : 0;
5013: XFLAG = (count == bits) ? dstdata & 1 : 0;
5014: } else {
5015: CFLAG = dstdata>>(bits-count) & 1;
5016: XFLAG = dstdata>>(bits-count) & 1;
5017: }
5018: VFLAG = 0;
5019: NFLAG = ((sint16)outdata) < 0;
5020: ZFLAG = !outdata;
5021: PC+= 4;
5022: }
5023:
5024: void cpu_op_1595a(t_ipc *ipc) /* LSL */ {
5025: /* mask fff8, bits e3f0, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
5026: unsigned int srcdata = 1;
5027: int dstreg = (ipc->opcode >> 0) & 7;
5028: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
5029: uint16 dstdata = fetchword(dstaddr);
5030: uint8 bits = 16;
5031: uint8 count = srcdata & 63;
5032: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5033:
5034: storeword(dstaddr, outdata);
5035: PC+= 4;
5036: }
5037:
5038: void cpu_op_1595b(t_ipc *ipc) /* LSL */ {
5039: /* mask fff8, bits e3f0, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
5040: unsigned int srcdata = 1;
5041: int dstreg = (ipc->opcode >> 0) & 7;
5042: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
5043: uint16 dstdata = fetchword(dstaddr);
5044: uint8 bits = 16;
5045: uint8 count = srcdata & 63;
5046: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5047:
5048: storeword(dstaddr, outdata);
5049:
5050: if (!count)
5051: CFLAG = 0;
5052: else if (count >= bits) {
5053: CFLAG = (count == bits) ? dstdata & 1 : 0;
5054: XFLAG = (count == bits) ? dstdata & 1 : 0;
5055: } else {
5056: CFLAG = dstdata>>(bits-count) & 1;
5057: XFLAG = dstdata>>(bits-count) & 1;
5058: }
5059: VFLAG = 0;
5060: NFLAG = ((sint16)outdata) < 0;
5061: ZFLAG = !outdata;
5062: PC+= 4;
5063: }
5064:
5065: void cpu_op_1596a(t_ipc *ipc) /* LSL */ {
5066: /* mask ffff, bits e3f8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
5067: unsigned int srcdata = 1;
5068: uint32 dstaddr = ipc->dst;
5069: uint16 dstdata = fetchword(dstaddr);
5070: uint8 bits = 16;
5071: uint8 count = srcdata & 63;
5072: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5073:
5074: storeword(dstaddr, outdata);
5075: PC+= 4;
5076: }
5077:
5078: void cpu_op_1596b(t_ipc *ipc) /* LSL */ {
5079: /* mask ffff, bits e3f8, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
5080: unsigned int srcdata = 1;
5081: uint32 dstaddr = ipc->dst;
5082: uint16 dstdata = fetchword(dstaddr);
5083: uint8 bits = 16;
5084: uint8 count = srcdata & 63;
5085: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5086:
5087: storeword(dstaddr, outdata);
5088:
5089: if (!count)
5090: CFLAG = 0;
5091: else if (count >= bits) {
5092: CFLAG = (count == bits) ? dstdata & 1 : 0;
5093: XFLAG = (count == bits) ? dstdata & 1 : 0;
5094: } else {
5095: CFLAG = dstdata>>(bits-count) & 1;
5096: XFLAG = dstdata>>(bits-count) & 1;
5097: }
5098: VFLAG = 0;
5099: NFLAG = ((sint16)outdata) < 0;
5100: ZFLAG = !outdata;
5101: PC+= 4;
5102: }
5103:
5104: void cpu_op_1597a(t_ipc *ipc) /* LSL */ {
5105: /* mask ffff, bits e3f9, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
5106: unsigned int srcdata = 1;
5107: uint32 dstaddr = ipc->dst;
5108: uint16 dstdata = fetchword(dstaddr);
5109: uint8 bits = 16;
5110: uint8 count = srcdata & 63;
5111: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5112:
5113: storeword(dstaddr, outdata);
5114: PC+= 6;
5115: }
5116:
5117: void cpu_op_1597b(t_ipc *ipc) /* LSL */ {
5118: /* mask ffff, bits e3f9, mnemonic 71, priv 0, endblk 0, imm_notzero 0, used 0 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
5119: unsigned int srcdata = 1;
5120: uint32 dstaddr = ipc->dst;
5121: uint16 dstdata = fetchword(dstaddr);
5122: uint8 bits = 16;
5123: uint8 count = srcdata & 63;
5124: uint16 outdata = count >= bits ? 0 : (dstdata << count);
5125:
5126: storeword(dstaddr, outdata);
5127:
5128: if (!count)
5129: CFLAG = 0;
5130: else if (count >= bits) {
5131: CFLAG = (count == bits) ? dstdata & 1 : 0;
5132: XFLAG = (count == bits) ? dstdata & 1 : 0;
5133: } else {
5134: CFLAG = dstdata>>(bits-count) & 1;
5135: XFLAG = dstdata>>(bits-count) & 1;
5136: }
5137: VFLAG = 0;
5138: NFLAG = ((sint16)outdata) < 0;
5139: ZFLAG = !outdata;
5140: PC+= 6;
5141: }
5142:
5143: void cpu_op_1598a(t_ipc *ipc) /* ROXL */ {
5144: /* mask fff8, bits e5d0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
5145: unsigned int srcdata = 1;
5146: int dstreg = (ipc->opcode >> 0) & 7;
5147: uint32 dstaddr = ADDRREG(dstreg);
5148: uint16 dstdata = fetchword(dstaddr);
5149: uint8 bits = 16;
5150: uint8 loop = srcdata & 63;
5151: uint8 cflag = CFLAG;
5152: uint8 xflag = XFLAG;
5153: uint16 outdata = dstdata;
5154:
5155: while(loop) {
5156: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5157: outdata<<= 1;
5158: outdata |= xflag;
5159: xflag = cflag;
5160: loop--;
5161: }
5162: storeword(dstaddr, outdata);
5163: PC+= 2;
5164: }
5165:
5166: void cpu_op_1598b(t_ipc *ipc) /* ROXL */ {
5167: /* mask fff8, bits e5d0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
5168: unsigned int srcdata = 1;
5169: int dstreg = (ipc->opcode >> 0) & 7;
5170: uint32 dstaddr = ADDRREG(dstreg);
5171: uint16 dstdata = fetchword(dstaddr);
5172: uint8 bits = 16;
5173: uint8 loop = srcdata & 63;
5174: uint8 cflag = CFLAG;
5175: uint8 xflag = XFLAG;
5176: uint16 outdata = dstdata;
5177:
5178: while(loop) {
5179: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5180: outdata<<= 1;
5181: outdata |= xflag;
5182: xflag = cflag;
5183: loop--;
5184: }
5185: storeword(dstaddr, outdata);
5186:
5187: XFLAG = xflag;
5188: CFLAG = xflag;
5189: NFLAG = ((sint16)outdata) < 0;
5190: ZFLAG = !outdata;
5191: VFLAG = 0;
5192: PC+= 2;
5193: }
5194:
5195: void cpu_op_1599a(t_ipc *ipc) /* ROXL */ {
5196: /* mask fff8, bits e5d8, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
5197: unsigned int srcdata = 1;
5198: int dstreg = (ipc->opcode >> 0) & 7;
5199: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
5200: uint16 dstdata = fetchword(dstaddr);
5201: uint8 bits = 16;
5202: uint8 loop = srcdata & 63;
5203: uint8 cflag = CFLAG;
5204: uint8 xflag = XFLAG;
5205: uint16 outdata = dstdata;
5206:
5207: while(loop) {
5208: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5209: outdata<<= 1;
5210: outdata |= xflag;
5211: xflag = cflag;
5212: loop--;
5213: }
5214: storeword(dstaddr, outdata);
5215: PC+= 2;
5216: }
5217:
5218: void cpu_op_1599b(t_ipc *ipc) /* ROXL */ {
5219: /* mask fff8, bits e5d8, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
5220: unsigned int srcdata = 1;
5221: int dstreg = (ipc->opcode >> 0) & 7;
5222: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
5223: uint16 dstdata = fetchword(dstaddr);
5224: uint8 bits = 16;
5225: uint8 loop = srcdata & 63;
5226: uint8 cflag = CFLAG;
5227: uint8 xflag = XFLAG;
5228: uint16 outdata = dstdata;
5229:
5230: while(loop) {
5231: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5232: outdata<<= 1;
5233: outdata |= xflag;
5234: xflag = cflag;
5235: loop--;
5236: }
5237: storeword(dstaddr, outdata);
5238:
5239: XFLAG = xflag;
5240: CFLAG = xflag;
5241: NFLAG = ((sint16)outdata) < 0;
5242: ZFLAG = !outdata;
5243: VFLAG = 0;
5244: PC+= 2;
5245: }
5246:
5247: void cpu_op_1600a(t_ipc *ipc) /* ROXL */ {
5248: /* mask fff8, bits e5e0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
5249: unsigned int srcdata = 1;
5250: int dstreg = (ipc->opcode >> 0) & 7;
5251: uint32 dstaddr = ADDRREG(dstreg)-=2;
5252: uint16 dstdata = fetchword(dstaddr);
5253: uint8 bits = 16;
5254: uint8 loop = srcdata & 63;
5255: uint8 cflag = CFLAG;
5256: uint8 xflag = XFLAG;
5257: uint16 outdata = dstdata;
5258:
5259: while(loop) {
5260: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5261: outdata<<= 1;
5262: outdata |= xflag;
5263: xflag = cflag;
5264: loop--;
5265: }
5266: storeword(dstaddr, outdata);
5267: PC+= 2;
5268: }
5269:
5270: void cpu_op_1600b(t_ipc *ipc) /* ROXL */ {
5271: /* mask fff8, bits e5e0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
5272: unsigned int srcdata = 1;
5273: int dstreg = (ipc->opcode >> 0) & 7;
5274: uint32 dstaddr = ADDRREG(dstreg)-=2;
5275: uint16 dstdata = fetchword(dstaddr);
5276: uint8 bits = 16;
5277: uint8 loop = srcdata & 63;
5278: uint8 cflag = CFLAG;
5279: uint8 xflag = XFLAG;
5280: uint16 outdata = dstdata;
5281:
5282: while(loop) {
5283: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5284: outdata<<= 1;
5285: outdata |= xflag;
5286: xflag = cflag;
5287: loop--;
5288: }
5289: storeword(dstaddr, outdata);
5290:
5291: XFLAG = xflag;
5292: CFLAG = xflag;
5293: NFLAG = ((sint16)outdata) < 0;
5294: ZFLAG = !outdata;
5295: VFLAG = 0;
5296: PC+= 2;
5297: }
5298:
5299: void cpu_op_1601a(t_ipc *ipc) /* ROXL */ {
5300: /* mask fff8, bits e5e8, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
5301: unsigned int srcdata = 1;
5302: int dstreg = (ipc->opcode >> 0) & 7;
5303: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
5304: uint16 dstdata = fetchword(dstaddr);
5305: uint8 bits = 16;
5306: uint8 loop = srcdata & 63;
5307: uint8 cflag = CFLAG;
5308: uint8 xflag = XFLAG;
5309: uint16 outdata = dstdata;
5310:
5311: while(loop) {
5312: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5313: outdata<<= 1;
5314: outdata |= xflag;
5315: xflag = cflag;
5316: loop--;
5317: }
5318: storeword(dstaddr, outdata);
5319: PC+= 4;
5320: }
5321:
5322: void cpu_op_1601b(t_ipc *ipc) /* ROXL */ {
5323: /* mask fff8, bits e5e8, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
5324: unsigned int srcdata = 1;
5325: int dstreg = (ipc->opcode >> 0) & 7;
5326: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
5327: uint16 dstdata = fetchword(dstaddr);
5328: uint8 bits = 16;
5329: uint8 loop = srcdata & 63;
5330: uint8 cflag = CFLAG;
5331: uint8 xflag = XFLAG;
5332: uint16 outdata = dstdata;
5333:
5334: while(loop) {
5335: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5336: outdata<<= 1;
5337: outdata |= xflag;
5338: xflag = cflag;
5339: loop--;
5340: }
5341: storeword(dstaddr, outdata);
5342:
5343: XFLAG = xflag;
5344: CFLAG = xflag;
5345: NFLAG = ((sint16)outdata) < 0;
5346: ZFLAG = !outdata;
5347: VFLAG = 0;
5348: PC+= 4;
5349: }
5350:
5351: void cpu_op_1602a(t_ipc *ipc) /* ROXL */ {
5352: /* mask fff8, bits e5f0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
5353: unsigned int srcdata = 1;
5354: int dstreg = (ipc->opcode >> 0) & 7;
5355: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
5356: uint16 dstdata = fetchword(dstaddr);
5357: uint8 bits = 16;
5358: uint8 loop = srcdata & 63;
5359: uint8 cflag = CFLAG;
5360: uint8 xflag = XFLAG;
5361: uint16 outdata = dstdata;
5362:
5363: while(loop) {
5364: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5365: outdata<<= 1;
5366: outdata |= xflag;
5367: xflag = cflag;
5368: loop--;
5369: }
5370: storeword(dstaddr, outdata);
5371: PC+= 4;
5372: }
5373:
5374: void cpu_op_1602b(t_ipc *ipc) /* ROXL */ {
5375: /* mask fff8, bits e5f0, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
5376: unsigned int srcdata = 1;
5377: int dstreg = (ipc->opcode >> 0) & 7;
5378: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
5379: uint16 dstdata = fetchword(dstaddr);
5380: uint8 bits = 16;
5381: uint8 loop = srcdata & 63;
5382: uint8 cflag = CFLAG;
5383: uint8 xflag = XFLAG;
5384: uint16 outdata = dstdata;
5385:
5386: while(loop) {
5387: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5388: outdata<<= 1;
5389: outdata |= xflag;
5390: xflag = cflag;
5391: loop--;
5392: }
5393: storeword(dstaddr, outdata);
5394:
5395: XFLAG = xflag;
5396: CFLAG = xflag;
5397: NFLAG = ((sint16)outdata) < 0;
5398: ZFLAG = !outdata;
5399: VFLAG = 0;
5400: PC+= 4;
5401: }
5402:
5403: void cpu_op_1603a(t_ipc *ipc) /* ROXL */ {
5404: /* mask ffff, bits e5f8, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
5405: unsigned int srcdata = 1;
5406: uint32 dstaddr = ipc->dst;
5407: uint16 dstdata = fetchword(dstaddr);
5408: uint8 bits = 16;
5409: uint8 loop = srcdata & 63;
5410: uint8 cflag = CFLAG;
5411: uint8 xflag = XFLAG;
5412: uint16 outdata = dstdata;
5413:
5414: while(loop) {
5415: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5416: outdata<<= 1;
5417: outdata |= xflag;
5418: xflag = cflag;
5419: loop--;
5420: }
5421: storeword(dstaddr, outdata);
5422: PC+= 4;
5423: }
5424:
5425: void cpu_op_1603b(t_ipc *ipc) /* ROXL */ {
5426: /* mask ffff, bits e5f8, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
5427: unsigned int srcdata = 1;
5428: uint32 dstaddr = ipc->dst;
5429: uint16 dstdata = fetchword(dstaddr);
5430: uint8 bits = 16;
5431: uint8 loop = srcdata & 63;
5432: uint8 cflag = CFLAG;
5433: uint8 xflag = XFLAG;
5434: uint16 outdata = dstdata;
5435:
5436: while(loop) {
5437: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5438: outdata<<= 1;
5439: outdata |= xflag;
5440: xflag = cflag;
5441: loop--;
5442: }
5443: storeword(dstaddr, outdata);
5444:
5445: XFLAG = xflag;
5446: CFLAG = xflag;
5447: NFLAG = ((sint16)outdata) < 0;
5448: ZFLAG = !outdata;
5449: VFLAG = 0;
5450: PC+= 4;
5451: }
5452:
5453: void cpu_op_1604a(t_ipc *ipc) /* ROXL */ {
5454: /* mask ffff, bits e5f9, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
5455: unsigned int srcdata = 1;
5456: uint32 dstaddr = ipc->dst;
5457: uint16 dstdata = fetchword(dstaddr);
5458: uint8 bits = 16;
5459: uint8 loop = srcdata & 63;
5460: uint8 cflag = CFLAG;
5461: uint8 xflag = XFLAG;
5462: uint16 outdata = dstdata;
5463:
5464: while(loop) {
5465: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5466: outdata<<= 1;
5467: outdata |= xflag;
5468: xflag = cflag;
5469: loop--;
5470: }
5471: storeword(dstaddr, outdata);
5472: PC+= 6;
5473: }
5474:
5475: void cpu_op_1604b(t_ipc *ipc) /* ROXL */ {
5476: /* mask ffff, bits e5f9, mnemonic 72, priv 0, endblk 0, imm_notzero 0, used 1 set -1, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
5477: unsigned int srcdata = 1;
5478: uint32 dstaddr = ipc->dst;
5479: uint16 dstdata = fetchword(dstaddr);
5480: uint8 bits = 16;
5481: uint8 loop = srcdata & 63;
5482: uint8 cflag = CFLAG;
5483: uint8 xflag = XFLAG;
5484: uint16 outdata = dstdata;
5485:
5486: while(loop) {
5487: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5488: outdata<<= 1;
5489: outdata |= xflag;
5490: xflag = cflag;
5491: loop--;
5492: }
5493: storeword(dstaddr, outdata);
5494:
5495: XFLAG = xflag;
5496: CFLAG = xflag;
5497: NFLAG = ((sint16)outdata) < 0;
5498: ZFLAG = !outdata;
5499: VFLAG = 0;
5500: PC+= 6;
5501: }
5502:
5503: void cpu_op_1605a(t_ipc *ipc) /* ROL */ {
5504: /* mask fff8, bits e7d0, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
5505: unsigned int srcdata = 1;
5506: int dstreg = (ipc->opcode >> 0) & 7;
5507: uint32 dstaddr = ADDRREG(dstreg);
5508: uint16 dstdata = fetchword(dstaddr);
5509: uint8 bits = 16;
5510: uint8 loop = srcdata & 63;
5511: uint8 cflag = 0;
5512: uint16 outdata = dstdata;
5513:
5514: while(loop) {
5515: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5516: outdata<<= 1;
5517: if (cflag)
5518: outdata |= 1;
5519: loop--;
5520: }
5521: storeword(dstaddr, outdata);
5522: PC+= 2;
5523: }
5524:
5525: void cpu_op_1605b(t_ipc *ipc) /* ROL */ {
5526: /* mask fff8, bits e7d0, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 2, sbitpos 0, dbitpos 0, immvalue 1 */
5527: unsigned int srcdata = 1;
5528: int dstreg = (ipc->opcode >> 0) & 7;
5529: uint32 dstaddr = ADDRREG(dstreg);
5530: uint16 dstdata = fetchword(dstaddr);
5531: uint8 bits = 16;
5532: uint8 loop = srcdata & 63;
5533: uint8 cflag = 0;
5534: uint16 outdata = dstdata;
5535:
5536: while(loop) {
5537: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5538: outdata<<= 1;
5539: if (cflag)
5540: outdata |= 1;
5541: loop--;
5542: }
5543: storeword(dstaddr, outdata);
5544:
5545: CFLAG = cflag;
5546: NFLAG = ((sint16)outdata) < 0;
5547: ZFLAG = !outdata;
5548: VFLAG = 0;
5549: PC+= 2;
5550: }
5551:
5552: void cpu_op_1606a(t_ipc *ipc) /* ROL */ {
5553: /* mask fff8, bits e7d8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
5554: unsigned int srcdata = 1;
5555: int dstreg = (ipc->opcode >> 0) & 7;
5556: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
5557: uint16 dstdata = fetchword(dstaddr);
5558: uint8 bits = 16;
5559: uint8 loop = srcdata & 63;
5560: uint8 cflag = 0;
5561: uint16 outdata = dstdata;
5562:
5563: while(loop) {
5564: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5565: outdata<<= 1;
5566: if (cflag)
5567: outdata |= 1;
5568: loop--;
5569: }
5570: storeword(dstaddr, outdata);
5571: PC+= 2;
5572: }
5573:
5574: void cpu_op_1606b(t_ipc *ipc) /* ROL */ {
5575: /* mask fff8, bits e7d8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 3, sbitpos 0, dbitpos 0, immvalue 1 */
5576: unsigned int srcdata = 1;
5577: int dstreg = (ipc->opcode >> 0) & 7;
5578: uint32 dstaddr = (ADDRREG(dstreg)+=2, ADDRREG(dstreg)-2);
5579: uint16 dstdata = fetchword(dstaddr);
5580: uint8 bits = 16;
5581: uint8 loop = srcdata & 63;
5582: uint8 cflag = 0;
5583: uint16 outdata = dstdata;
5584:
5585: while(loop) {
5586: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5587: outdata<<= 1;
5588: if (cflag)
5589: outdata |= 1;
5590: loop--;
5591: }
5592: storeword(dstaddr, outdata);
5593:
5594: CFLAG = cflag;
5595: NFLAG = ((sint16)outdata) < 0;
5596: ZFLAG = !outdata;
5597: VFLAG = 0;
5598: PC+= 2;
5599: }
5600:
5601: void cpu_op_1607a(t_ipc *ipc) /* ROL */ {
5602: /* mask fff8, bits e7e0, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
5603: unsigned int srcdata = 1;
5604: int dstreg = (ipc->opcode >> 0) & 7;
5605: uint32 dstaddr = ADDRREG(dstreg)-=2;
5606: uint16 dstdata = fetchword(dstaddr);
5607: uint8 bits = 16;
5608: uint8 loop = srcdata & 63;
5609: uint8 cflag = 0;
5610: uint16 outdata = dstdata;
5611:
5612: while(loop) {
5613: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5614: outdata<<= 1;
5615: if (cflag)
5616: outdata |= 1;
5617: loop--;
5618: }
5619: storeword(dstaddr, outdata);
5620: PC+= 2;
5621: }
5622:
5623: void cpu_op_1607b(t_ipc *ipc) /* ROL */ {
5624: /* mask fff8, bits e7e0, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 4, sbitpos 0, dbitpos 0, immvalue 1 */
5625: unsigned int srcdata = 1;
5626: int dstreg = (ipc->opcode >> 0) & 7;
5627: uint32 dstaddr = ADDRREG(dstreg)-=2;
5628: uint16 dstdata = fetchword(dstaddr);
5629: uint8 bits = 16;
5630: uint8 loop = srcdata & 63;
5631: uint8 cflag = 0;
5632: uint16 outdata = dstdata;
5633:
5634: while(loop) {
5635: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5636: outdata<<= 1;
5637: if (cflag)
5638: outdata |= 1;
5639: loop--;
5640: }
5641: storeword(dstaddr, outdata);
5642:
5643: CFLAG = cflag;
5644: NFLAG = ((sint16)outdata) < 0;
5645: ZFLAG = !outdata;
5646: VFLAG = 0;
5647: PC+= 2;
5648: }
5649:
5650: void cpu_op_1608a(t_ipc *ipc) /* ROL */ {
5651: /* mask fff8, bits e7e8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
5652: unsigned int srcdata = 1;
5653: int dstreg = (ipc->opcode >> 0) & 7;
5654: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
5655: uint16 dstdata = fetchword(dstaddr);
5656: uint8 bits = 16;
5657: uint8 loop = srcdata & 63;
5658: uint8 cflag = 0;
5659: uint16 outdata = dstdata;
5660:
5661: while(loop) {
5662: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5663: outdata<<= 1;
5664: if (cflag)
5665: outdata |= 1;
5666: loop--;
5667: }
5668: storeword(dstaddr, outdata);
5669: PC+= 4;
5670: }
5671:
5672: void cpu_op_1608b(t_ipc *ipc) /* ROL */ {
5673: /* mask fff8, bits e7e8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 5, sbitpos 0, dbitpos 0, immvalue 1 */
5674: unsigned int srcdata = 1;
5675: int dstreg = (ipc->opcode >> 0) & 7;
5676: uint32 dstaddr = (sint32)ADDRREG(dstreg) + (sint32)(sint16)ipc->dst;
5677: uint16 dstdata = fetchword(dstaddr);
5678: uint8 bits = 16;
5679: uint8 loop = srcdata & 63;
5680: uint8 cflag = 0;
5681: uint16 outdata = dstdata;
5682:
5683: while(loop) {
5684: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5685: outdata<<= 1;
5686: if (cflag)
5687: outdata |= 1;
5688: loop--;
5689: }
5690: storeword(dstaddr, outdata);
5691:
5692: CFLAG = cflag;
5693: NFLAG = ((sint16)outdata) < 0;
5694: ZFLAG = !outdata;
5695: VFLAG = 0;
5696: PC+= 4;
5697: }
5698:
5699: void cpu_op_1609a(t_ipc *ipc) /* ROL */ {
5700: /* mask fff8, bits e7f0, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
5701: unsigned int srcdata = 1;
5702: int dstreg = (ipc->opcode >> 0) & 7;
5703: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
5704: uint16 dstdata = fetchword(dstaddr);
5705: uint8 bits = 16;
5706: uint8 loop = srcdata & 63;
5707: uint8 cflag = 0;
5708: uint16 outdata = dstdata;
5709:
5710: while(loop) {
5711: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5712: outdata<<= 1;
5713: if (cflag)
5714: outdata |= 1;
5715: loop--;
5716: }
5717: storeword(dstaddr, outdata);
5718: PC+= 4;
5719: }
5720:
5721: void cpu_op_1609b(t_ipc *ipc) /* ROL */ {
5722: /* mask fff8, bits e7f0, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 6, sbitpos 0, dbitpos 0, immvalue 1 */
5723: unsigned int srcdata = 1;
5724: int dstreg = (ipc->opcode >> 0) & 7;
5725: uint32 dstaddr = (sint32)ADDRREG(dstreg) + idxval_dst(ipc);
5726: uint16 dstdata = fetchword(dstaddr);
5727: uint8 bits = 16;
5728: uint8 loop = srcdata & 63;
5729: uint8 cflag = 0;
5730: uint16 outdata = dstdata;
5731:
5732: while(loop) {
5733: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5734: outdata<<= 1;
5735: if (cflag)
5736: outdata |= 1;
5737: loop--;
5738: }
5739: storeword(dstaddr, outdata);
5740:
5741: CFLAG = cflag;
5742: NFLAG = ((sint16)outdata) < 0;
5743: ZFLAG = !outdata;
5744: VFLAG = 0;
5745: PC+= 4;
5746: }
5747:
5748: void cpu_op_1610a(t_ipc *ipc) /* ROL */ {
5749: /* mask ffff, bits e7f8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
5750: unsigned int srcdata = 1;
5751: uint32 dstaddr = ipc->dst;
5752: uint16 dstdata = fetchword(dstaddr);
5753: uint8 bits = 16;
5754: uint8 loop = srcdata & 63;
5755: uint8 cflag = 0;
5756: uint16 outdata = dstdata;
5757:
5758: while(loop) {
5759: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5760: outdata<<= 1;
5761: if (cflag)
5762: outdata |= 1;
5763: loop--;
5764: }
5765: storeword(dstaddr, outdata);
5766: PC+= 4;
5767: }
5768:
5769: void cpu_op_1610b(t_ipc *ipc) /* ROL */ {
5770: /* mask ffff, bits e7f8, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 7, sbitpos 0, dbitpos 0, immvalue 1 */
5771: unsigned int srcdata = 1;
5772: uint32 dstaddr = ipc->dst;
5773: uint16 dstdata = fetchword(dstaddr);
5774: uint8 bits = 16;
5775: uint8 loop = srcdata & 63;
5776: uint8 cflag = 0;
5777: uint16 outdata = dstdata;
5778:
5779: while(loop) {
5780: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5781: outdata<<= 1;
5782: if (cflag)
5783: outdata |= 1;
5784: loop--;
5785: }
5786: storeword(dstaddr, outdata);
5787:
5788: CFLAG = cflag;
5789: NFLAG = ((sint16)outdata) < 0;
5790: ZFLAG = !outdata;
5791: VFLAG = 0;
5792: PC+= 4;
5793: }
5794:
5795: void cpu_op_1611a(t_ipc *ipc) /* ROL */ {
5796: /* mask ffff, bits e7f9, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
5797: unsigned int srcdata = 1;
5798: uint32 dstaddr = ipc->dst;
5799: uint16 dstdata = fetchword(dstaddr);
5800: uint8 bits = 16;
5801: uint8 loop = srcdata & 63;
5802: uint8 cflag = 0;
5803: uint16 outdata = dstdata;
5804:
5805: while(loop) {
5806: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5807: outdata<<= 1;
5808: if (cflag)
5809: outdata |= 1;
5810: loop--;
5811: }
5812: storeword(dstaddr, outdata);
5813: PC+= 6;
5814: }
5815:
5816: void cpu_op_1611b(t_ipc *ipc) /* ROL */ {
5817: /* mask ffff, bits e7f9, mnemonic 73, priv 0, endblk 0, imm_notzero 0, used 0 set -2, size 2, stype 14, dtype 8, sbitpos 0, dbitpos 0, immvalue 1 */
5818: unsigned int srcdata = 1;
5819: uint32 dstaddr = ipc->dst;
5820: uint16 dstdata = fetchword(dstaddr);
5821: uint8 bits = 16;
5822: uint8 loop = srcdata & 63;
5823: uint8 cflag = 0;
5824: uint16 outdata = dstdata;
5825:
5826: while(loop) {
5827: cflag = outdata & 1<<(bits-1) ? 1 : 0;
5828: outdata<<= 1;
5829: if (cflag)
5830: outdata |= 1;
5831: loop--;
5832: }
5833: storeword(dstaddr, outdata);
5834:
5835: CFLAG = cflag;
5836: NFLAG = ((sint16)outdata) < 0;
5837: ZFLAG = !outdata;
5838: VFLAG = 0;
5839: PC+= 6;
5840: }
5841:
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