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1.1 root 1: /*
2: FM.C External interface port for MAME
3: */
4:
5: /* For YM2203 / YM2608 / YM2610 */
6: /* ----- SSG(YM2149/AY-3-8910) emurator interface port ----- */
7: /* void SSGClk(int n,int clk,int rate) */
8: /* void SSGWrite(int n,int a,int v) */
9: /* unsigned char SSGRead(int n,int a) */
10: /* void SSGReset(int n) */
11:
12: /* SSGClk : Set Clock */
13: /* int n = chip number */
14: /* int clk = MasterClock(Hz) */
15: /* int rate = sample rate(Hz) */
16: #define SSGClk(chip,clock) AY8910_set_clock(chip,clock)
17:
18: /* SSGWrite : Write SSG port */
19: /* int n = chip number */
20: /* int a = address */
21: /* int v = data */
22: #define SSGWrite(n,a,v) AY8910Write(n,a,v)
23:
24: /* SSGRead : Read SSG port */
25: /* int n = chip number */
26: /* return = Read data */
27: #define SSGRead(n) AY8910Read(n)
28:
29: /* SSGReset : Reset SSG chip */
30: /* int n = chip number */
31: #define SSGReset(chip) AY8910_reset(chip)
32:
33: /* -------------------- Timer Interface ---------------------*/
34: #ifndef INTERNAL_TIMER
35:
36: /* update request callback */
37:
38: #if BUILD_YM2203
39: INLINE void YM2203UpdateReq(int chip)
40: {
41: YM2203UpdateRequest(chip); /* in 2203intf.c */
42: }
43: #endif
44: #if BUILD_YM2608
45: INLINE void YM2608UpdateReq(int chip)
46: {
47: #if 0
48: YM2608UpdateRequest(chip); /* in 2608intf.c */
49: #endif
50: }
51: #endif
52: #if BUILD_YM2610
53: INLINE void YM2610UpdateReq(int chip)
54: {
55: YM2610UpdateRequest(chip); /* in 2610intf.c */
56: }
57: #endif
58:
59:
60: #if BUILD_YM2612
61: INLINE void YM2612UpdateReq(int chip)
62: {
63: YM2612UpdateRequest(chip); /* in 2612intf.c */
64: }
65: #endif
66:
67: #if BUILD_YM2151
68: INLINE void YM2151UpdateReq(int chip)
69: {
70: YM2151UpdateRequest(chip); /* in 2151intf.c */
71: }
72: #endif /* BUILD_YM2151 */
73:
74: #endif
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