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1.1.1.2 root 1: /* 1.1.1.3 ! root 2: * Hatari - blitter.c 1.1.1.2 root 3: * 4: * This file is distributed under the GNU Public License, version 2 or at 5: * your option any later version. Read the file gpl.txt for details. 6: * 1.1.1.3 ! root 7: * Blitter emulation. ! 8: * This file has originally been taken from STonX. 1.1 root 9: * 10: * Original information text follows: 11: * 12: * 13: * This file is part of STonX, the Atari ST Emulator for Unix/X 14: * ============================================================ 15: * STonX is free software and comes with NO WARRANTY - read the file 16: * COPYING for details 17: * 18: * Blitter Emulator, 19: * Martin Griffiths, 1995/96. 20: * 21: * Here lies the Atari Blitter Emulator - The 'Blitter' chip is found in 22: * the STE/MegaSTE and provides a very fast BitBlit in hardware. 23: * 1.1.1.3 ! root 24: * The hardware registers for this chip lie at addresses $ff8a00 - $ff8a3c. 1.1 root 25: */ 1.1.1.3 ! root 26: char Blitter_rcsid[] = "Hatari $Id: blitter.c,v 1.7 2005/04/01 11:14:45 thothy Exp $"; 1.1 root 27: 28: #include <SDL_types.h> 29: #include <stdio.h> 30: #include <stdlib.h> 31: 1.1.1.2 root 32: #include "main.h" 1.1 root 33: #include "blitter.h" 34: #include "hatari-glue.h" 1.1.1.3 ! root 35: #include "ioMem.h" ! 36: #include "m68000.h" 1.1.1.2 root 37: #include "memorySnapShot.h" 1.1 root 38: #include "stMemory.h" 39: 40: 41: /* The following typedefs are needed for STonX's code */ 42: typedef Uint16 UW; 43: typedef Uint8 UB; 44: 45: /* The following functions are needed for STonX's code: */ 46: #define MEM(a) (a) 47: #define ADDR(a) (a) 48: 49: #define LM_W(a) ((short)STMemory_ReadWord(a)) 50: #define LM_UW(a) STMemory_ReadWord(a) 51: #define LM_UL(a) STMemory_ReadLong(a) 52: 53: #define SM_B(a,v) STMemory_WriteByte(a,v) 54: #define SM_UW(a,v) STMemory_WriteWord(a,v) 55: #define SM_UL(a,v) STMemory_WriteLong(a,v) 56: 57: #if 0 58: #define SHOWPARAMS \ 59: { \ 1.1.1.3 ! root 60: fprintf(stderr,"Source Address:%X\n",source_addr); \ ! 61: fprintf(stderr," Dest Address:%X\n",dest_addr); \ ! 62: fprintf(stderr," X count:%X\n",x_count); \ ! 63: fprintf(stderr," Y count:%X\n",y_count); \ ! 64: fprintf(stderr," Source X inc:%X\n",source_x_inc); \ ! 65: fprintf(stderr," Dest X inc:%X\n",dest_x_inc); \ ! 66: fprintf(stderr," Source Y inc:%X\n",source_y_inc); \ ! 67: fprintf(stderr," Dest Y inc:%X\n",dest_y_inc); \ ! 68: fprintf(stderr,"HOP:%2X OP:%X\n",hop,op); \ ! 69: fprintf(stderr," source SKEW:%X\n",skewreg); \ ! 70: fprintf(stderr," endmask 1:%X\n",end_mask_1); \ ! 71: fprintf(stderr," endmask 2:%X\n",end_mask_2); \ ! 72: fprintf(stderr," endmask 3:%X\n",end_mask_3); \ ! 73: fprintf(stderr," linenum:%X\n",line_num); \ ! 74: if (NFSR) fprintf(stderr,"NFSR is Set!\n"); \ ! 75: if (FXSR) fprintf(stderr,"FXSR is Set!\n"); \ 1.1 root 76: } 77: #endif 78: 79: 80: static UW halftone_ram[16]; 81: static UW end_mask_1,end_mask_2,end_mask_3; 82: static UB NFSR,FXSR; 83: static UW x_count,y_count; 84: static UB hop,op,line_num,skewreg; 85: static unsigned int dest_addr_reg=0; 86: static int halftone_curroffset,halftone_direction; 87: static int source_x_inc, source_y_inc, dest_x_inc, dest_y_inc; 88: 89: 1.1.1.2 root 90: static void load_halftone_ram(void) 1.1 root 91: { 1.1.1.3 ! root 92: halftone_ram[0] = LM_UW(MEM(0xff8a00)); ! 93: halftone_ram[1] = LM_UW(MEM(0xff8a02)); ! 94: halftone_ram[2] = LM_UW(MEM(0xff8a04)); ! 95: halftone_ram[3] = LM_UW(MEM(0xff8a06)); ! 96: halftone_ram[4] = LM_UW(MEM(0xff8a08)); ! 97: halftone_ram[5] = LM_UW(MEM(0xff8a0a)); ! 98: halftone_ram[6] = LM_UW(MEM(0xff8a0c)); ! 99: halftone_ram[7] = LM_UW(MEM(0xff8a0e)); ! 100: halftone_ram[8] = LM_UW(MEM(0xff8a10)); ! 101: halftone_ram[9] = LM_UW(MEM(0xff8a12)); ! 102: halftone_ram[10] = LM_UW(MEM(0xff8a14)); ! 103: halftone_ram[11] = LM_UW(MEM(0xff8a16)); ! 104: halftone_ram[12] = LM_UW(MEM(0xff8a18)); ! 105: halftone_ram[13] = LM_UW(MEM(0xff8a1a)); ! 106: halftone_ram[14] = LM_UW(MEM(0xff8a1c)); ! 107: halftone_ram[15] = LM_UW(MEM(0xff8a1e)); ! 108: ! 109: if (line_num & 0x20) ! 110: halftone_curroffset = skewreg & 15; ! 111: else ! 112: halftone_curroffset = line_num & 15; ! 113: ! 114: if (dest_y_inc >= 0) ! 115: halftone_direction = 1; ! 116: else ! 117: halftone_direction = -1; 1.1 root 118: } 119: 120: 121: #define HOP_OPS(_fn_name,_op,_do_source_shift,_get_source_data,_shifted_hopd_data, _do_halftone_inc) \ 122: static void _fn_name (void) \ 123: { \ 1.1.1.3 ! root 124: register int source_addr = LM_UL(MEM(0xff8a24)); \ ! 125: register int dest_addr = dest_addr_reg; \ ! 126: register unsigned int skew = (unsigned int) skewreg & 15; \ ! 127: register unsigned int source_buffer=0; \ ! 128: /*if(address_space_24)*/ \ ! 129: { source_addr&=0x0fffffe; dest_addr&=0x0fffffe; } \ ! 130: source_x_inc = (int) LM_W(MEM(0xff8a20)); \ ! 131: source_y_inc = (int) LM_W(MEM(0xff8a22)); \ ! 132: dest_x_inc = (int) LM_W(MEM(0xff8a2e)); \ ! 133: dest_y_inc = (int) LM_W(MEM(0xff8a30)); \ ! 134: if (hop & 1) load_halftone_ram(); \ ! 135: do \ ! 136: { \ ! 137: register UW x,dst_data,opd_data; \ ! 138: if (FXSR) \ ! 139: { \ ! 140: _do_source_shift; \ ! 141: _get_source_data; \ ! 142: source_addr += source_x_inc; \ ! 143: } \ ! 144: _do_source_shift; \ ! 145: _get_source_data; \ ! 146: dst_data = LM_UW(ADDR(dest_addr)); \ ! 147: opd_data = _shifted_hopd_data; \ ! 148: SM_UW(ADDR(dest_addr),(dst_data & ~end_mask_1) | (_op & end_mask_1)); \ ! 149: for(x=0 ; x<x_count-2 ; x++) \ ! 150: { \ ! 151: source_addr += source_x_inc; \ ! 152: dest_addr += dest_x_inc; \ ! 153: _do_source_shift; \ ! 154: _get_source_data; \ ! 155: dst_data = LM_UW(ADDR(dest_addr)); \ ! 156: opd_data = _shifted_hopd_data; \ ! 157: SM_UW(ADDR(dest_addr),(dst_data & ~end_mask_2) | (_op & end_mask_2)); \ ! 158: } \ ! 159: if (x_count >= 2) \ ! 160: { \ ! 161: dest_addr += dest_x_inc; \ ! 162: _do_source_shift; \ ! 163: if ( (!NFSR) || ((~(0xffff>>skew)) > end_mask_3) ) \ ! 164: { \ ! 165: source_addr += source_x_inc; \ ! 166: _get_source_data; \ ! 167: } \ ! 168: dst_data = LM_UW(ADDR(dest_addr)); \ ! 169: opd_data = _shifted_hopd_data; \ ! 170: SM_UW(ADDR(dest_addr),(((UW)dst_data) & ~end_mask_3) | (_op & end_mask_3)); \ ! 171: } \ ! 172: source_addr += source_y_inc; \ ! 173: dest_addr += dest_y_inc; \ ! 174: _do_halftone_inc; \ ! 175: } while (--y_count > 0); \ ! 176: SM_UL(MEM(0xff8a24), source_addr); \ ! 177: dest_addr_reg = dest_addr; \ 1.1 root 178: } 179: 180: 181: HOP_OPS(_HOP_0_OP_00_N,(0), source_buffer >>=16,;, 0xffff, ;) 182: HOP_OPS(_HOP_0_OP_01_N,(opd_data & dst_data) ,source_buffer >>=16,; , 0xffff, ;) 183: HOP_OPS(_HOP_0_OP_02_N,(opd_data & ~dst_data) ,source_buffer >>=16,; , 0xffff,;) 184: HOP_OPS(_HOP_0_OP_03_N,(opd_data) ,source_buffer >>=16,; , 0xffff,;) 185: HOP_OPS(_HOP_0_OP_04_N,(~opd_data & dst_data) ,source_buffer >>=16,;, 0xffff,;) 186: HOP_OPS(_HOP_0_OP_05_N,(dst_data) ,source_buffer >>=16,;, 0xffff, ;) 187: HOP_OPS(_HOP_0_OP_06_N,(opd_data ^ dst_data) ,source_buffer >>=16,;, 0xffff, ;) 188: HOP_OPS(_HOP_0_OP_07_N,(opd_data | dst_data) ,source_buffer >>=16,; , 0xffff, ;) 189: HOP_OPS(_HOP_0_OP_08_N,(~opd_data & ~dst_data) ,source_buffer >>=16,;, 0xffff, ;) 190: HOP_OPS(_HOP_0_OP_09_N,(~opd_data ^ dst_data) ,source_buffer >>=16,;, 0xffff, ;) 191: HOP_OPS(_HOP_0_OP_10_N,(~dst_data) ,source_buffer >>=16,;, 0xffff, ;) 192: HOP_OPS(_HOP_0_OP_11_N,(opd_data | ~dst_data) ,source_buffer >>=16,;, 0xffff, ;) 193: HOP_OPS(_HOP_0_OP_12_N,(~opd_data) ,source_buffer >>=16,;, 0xffff, ;) 194: HOP_OPS(_HOP_0_OP_13_N,(~opd_data | dst_data) ,source_buffer >>=16,;, 0xffff, ;) 195: HOP_OPS(_HOP_0_OP_14_N,(~opd_data | ~dst_data) ,source_buffer >>=16,;, 0xffff, ;) 196: HOP_OPS(_HOP_0_OP_15_N,(0xffff) ,source_buffer >>=16,;, 0xffff, ;) 197: 198: HOP_OPS(_HOP_1_OP_00_N,(0) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 199: HOP_OPS(_HOP_1_OP_01_N,(opd_data & dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 200: HOP_OPS(_HOP_1_OP_02_N,(opd_data & ~dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 201: HOP_OPS(_HOP_1_OP_03_N,(opd_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 202: HOP_OPS(_HOP_1_OP_04_N,(~opd_data & dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 203: HOP_OPS(_HOP_1_OP_05_N,(dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 204: HOP_OPS(_HOP_1_OP_06_N,(opd_data ^ dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 205: HOP_OPS(_HOP_1_OP_07_N,(opd_data | dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 206: HOP_OPS(_HOP_1_OP_08_N,(~opd_data & ~dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 207: HOP_OPS(_HOP_1_OP_09_N,(~opd_data ^ dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 208: HOP_OPS(_HOP_1_OP_10_N,(~dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 209: HOP_OPS(_HOP_1_OP_11_N,(opd_data | ~dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 210: HOP_OPS(_HOP_1_OP_12_N,(~opd_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 211: HOP_OPS(_HOP_1_OP_13_N,(~opd_data | dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 212: HOP_OPS(_HOP_1_OP_14_N,(~opd_data | ~dst_data) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 213: HOP_OPS(_HOP_1_OP_15_N,(0xffff) ,source_buffer >>=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 214: 215: HOP_OPS(_HOP_2_OP_00_N,(0) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 216: HOP_OPS(_HOP_2_OP_01_N,(opd_data & dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 217: HOP_OPS(_HOP_2_OP_02_N,(opd_data & ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 218: HOP_OPS(_HOP_2_OP_03_N,(opd_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 219: HOP_OPS(_HOP_2_OP_04_N,(~opd_data & dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 220: HOP_OPS(_HOP_2_OP_05_N,(dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 221: HOP_OPS(_HOP_2_OP_06_N,(opd_data ^ dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 222: HOP_OPS(_HOP_2_OP_07_N,(opd_data | dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 223: HOP_OPS(_HOP_2_OP_08_N,(~opd_data & ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 224: HOP_OPS(_HOP_2_OP_09_N,(~opd_data ^ dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 225: HOP_OPS(_HOP_2_OP_10_N,(~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 226: HOP_OPS(_HOP_2_OP_11_N,(opd_data | ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 227: HOP_OPS(_HOP_2_OP_12_N,(~opd_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 228: HOP_OPS(_HOP_2_OP_13_N,(~opd_data | dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 229: HOP_OPS(_HOP_2_OP_14_N,(~opd_data | ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 230: HOP_OPS(_HOP_2_OP_15_N,(0xffff) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew),;) 231: 232: HOP_OPS(_HOP_3_OP_00_N,(0) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 233: HOP_OPS(_HOP_3_OP_01_N,(opd_data & dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 234: HOP_OPS(_HOP_3_OP_02_N,(opd_data & ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 235: HOP_OPS(_HOP_3_OP_03_N,(opd_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 236: HOP_OPS(_HOP_3_OP_04_N,(~opd_data & dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 237: HOP_OPS(_HOP_3_OP_05_N,(dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 238: HOP_OPS(_HOP_3_OP_06_N,(opd_data ^ dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 239: HOP_OPS(_HOP_3_OP_07_N,(opd_data | dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 240: HOP_OPS(_HOP_3_OP_08_N,(~opd_data & ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 241: HOP_OPS(_HOP_3_OP_09_N,(~opd_data ^ dst_data) , source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 242: HOP_OPS(_HOP_3_OP_10_N,(~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 243: HOP_OPS(_HOP_3_OP_11_N,(opd_data | ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 244: HOP_OPS(_HOP_3_OP_12_N,(~opd_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 245: HOP_OPS(_HOP_3_OP_13_N,(~opd_data | dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 246: HOP_OPS(_HOP_3_OP_14_N,(~opd_data | ~dst_data) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 247: HOP_OPS(_HOP_3_OP_15_N,(0xffff) ,source_buffer >>=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) << 16) ,(source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15) 248: 249: 250: HOP_OPS(_HOP_0_OP_00_P,(0) ,source_buffer <<=16,;, 0xffff,;) 251: HOP_OPS(_HOP_0_OP_01_P,(opd_data & dst_data) ,source_buffer <<=16,;, 0xffff,;) 252: HOP_OPS(_HOP_0_OP_02_P,(opd_data & ~dst_data) ,source_buffer <<=16,;, 0xffff,;) 253: HOP_OPS(_HOP_0_OP_03_P,(opd_data) ,source_buffer <<=16,;, 0xffff,;) 254: HOP_OPS(_HOP_0_OP_04_P,(~opd_data & dst_data) ,source_buffer <<=16,;, 0xffff,;) 255: HOP_OPS(_HOP_0_OP_05_P,(dst_data) ,source_buffer <<=16,;, 0xffff,;) 256: HOP_OPS(_HOP_0_OP_06_P,(opd_data ^ dst_data) ,source_buffer <<=16,;, 0xffff,;) 257: HOP_OPS(_HOP_0_OP_07_P,(opd_data | dst_data) ,source_buffer <<=16,;, 0xffff,;) 258: HOP_OPS(_HOP_0_OP_08_P,(~opd_data & ~dst_data) ,source_buffer <<=16,;, 0xffff,;) 259: HOP_OPS(_HOP_0_OP_09_P,(~opd_data ^ dst_data) ,source_buffer <<=16,;, 0xffff,;) 260: HOP_OPS(_HOP_0_OP_10_P,(~dst_data) ,source_buffer <<=16,;, 0xffff,;) 261: HOP_OPS(_HOP_0_OP_11_P,(opd_data | ~dst_data) ,source_buffer <<=16,;, 0xffff,;) 262: HOP_OPS(_HOP_0_OP_12_P,(~opd_data) ,source_buffer <<=16,;, 0xffff,;) 263: HOP_OPS(_HOP_0_OP_13_P,(~opd_data | dst_data) ,source_buffer <<=16,;, 0xffff,;) 264: HOP_OPS(_HOP_0_OP_14_P,(~opd_data | ~dst_data) ,source_buffer <<=16,;, 0xffff,;) 265: HOP_OPS(_HOP_0_OP_15_P,(0xffff) ,source_buffer <<=16,;, 0xffff,;) 266: 267: HOP_OPS(_HOP_1_OP_00_P,(0) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 268: HOP_OPS(_HOP_1_OP_01_P,(opd_data & dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 269: HOP_OPS(_HOP_1_OP_02_P,(opd_data & ~dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 270: HOP_OPS(_HOP_1_OP_03_P,(opd_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 271: HOP_OPS(_HOP_1_OP_04_P,(~opd_data & dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 272: HOP_OPS(_HOP_1_OP_05_P,(dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 273: HOP_OPS(_HOP_1_OP_06_P,(opd_data ^ dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 274: HOP_OPS(_HOP_1_OP_07_P,(opd_data | dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 275: HOP_OPS(_HOP_1_OP_08_P,(~opd_data & ~dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 )\ 276: HOP_OPS(_HOP_1_OP_09_P,(~opd_data ^ dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 277: HOP_OPS(_HOP_1_OP_10_P,(~dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 278: HOP_OPS(_HOP_1_OP_11_P,(opd_data | ~dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 279: HOP_OPS(_HOP_1_OP_12_P,(~opd_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 280: HOP_OPS(_HOP_1_OP_13_P,(~opd_data | dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 281: HOP_OPS(_HOP_1_OP_14_P,(~opd_data | ~dst_data) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 282: HOP_OPS(_HOP_1_OP_15_P,(0xffff) ,source_buffer <<=16,;,halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 283: 284: HOP_OPS(_HOP_2_OP_00_P,(0) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 285: HOP_OPS(_HOP_2_OP_01_P,(opd_data & dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 286: HOP_OPS(_HOP_2_OP_02_P,(opd_data & ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 287: HOP_OPS(_HOP_2_OP_03_P,(opd_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 288: HOP_OPS(_HOP_2_OP_04_P,(~opd_data & dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 289: HOP_OPS(_HOP_2_OP_05_P,(dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 290: HOP_OPS(_HOP_2_OP_06_P,(opd_data ^ dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 291: HOP_OPS(_HOP_2_OP_07_P,(opd_data | dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 292: HOP_OPS(_HOP_2_OP_08_P,(~opd_data & ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 293: HOP_OPS(_HOP_2_OP_09_P,(~opd_data ^ dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 294: HOP_OPS(_HOP_2_OP_10_P,(~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 295: HOP_OPS(_HOP_2_OP_11_P,(opd_data | ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 296: 297: HOP_OPS(_HOP_2_OP_12_P,(~opd_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 298: HOP_OPS(_HOP_2_OP_13_P,(~opd_data | dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 299: HOP_OPS(_HOP_2_OP_14_P,(~opd_data | ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 300: HOP_OPS(_HOP_2_OP_15_P,(0xffff) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ) , (source_buffer >> skew),;) 301: 302: HOP_OPS(_HOP_3_OP_00_P,(0) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 303: HOP_OPS(_HOP_3_OP_01_P,(opd_data & dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 304: HOP_OPS(_HOP_3_OP_02_P,(opd_data & ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 305: HOP_OPS(_HOP_3_OP_03_P,(opd_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 306: HOP_OPS(_HOP_3_OP_04_P,(~opd_data & dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 307: HOP_OPS(_HOP_3_OP_05_P,(dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 308: HOP_OPS(_HOP_3_OP_06_P,(opd_data ^ dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 309: HOP_OPS(_HOP_3_OP_07_P,(opd_data | dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 310: HOP_OPS(_HOP_3_OP_08_P,(~opd_data & ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 311: HOP_OPS(_HOP_3_OP_09_P,(~opd_data ^ dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 312: HOP_OPS(_HOP_3_OP_10_P,(~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 313: HOP_OPS(_HOP_3_OP_11_P,(opd_data | ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 314: HOP_OPS(_HOP_3_OP_12_P,(~opd_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 315: HOP_OPS(_HOP_3_OP_13_P,(~opd_data | dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 316: HOP_OPS(_HOP_3_OP_14_P,(~opd_data | ~dst_data) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 317: HOP_OPS(_HOP_3_OP_15_P,(0xffff) ,source_buffer <<=16,source_buffer |= ((unsigned int) LM_UW(ADDR(source_addr)) ), (source_buffer >> skew) & halftone_ram[halftone_curroffset],halftone_curroffset=(halftone_curroffset+halftone_direction) & 15 ) 318: 319: static void (*do_hop_op_N[4][16])(void) = 320: { 321: { _HOP_0_OP_00_N, _HOP_0_OP_01_N, _HOP_0_OP_02_N, _HOP_0_OP_03_N, _HOP_0_OP_04_N, _HOP_0_OP_05_N, _HOP_0_OP_06_N, _HOP_0_OP_07_N, _HOP_0_OP_08_N, _HOP_0_OP_09_N, _HOP_0_OP_10_N, _HOP_0_OP_11_N, _HOP_0_OP_12_N, _HOP_0_OP_13_N, _HOP_0_OP_14_N, _HOP_0_OP_15_N,}, 322: { _HOP_1_OP_00_N, _HOP_1_OP_01_N, _HOP_1_OP_02_N, _HOP_1_OP_03_N, _HOP_1_OP_04_N, _HOP_1_OP_05_N, _HOP_1_OP_06_N, _HOP_1_OP_07_N, _HOP_1_OP_08_N, _HOP_1_OP_09_N, _HOP_1_OP_10_N, _HOP_1_OP_11_N, _HOP_1_OP_12_N, _HOP_1_OP_13_N, _HOP_1_OP_14_N, _HOP_1_OP_15_N,}, 323: { _HOP_2_OP_00_N, _HOP_2_OP_01_N, _HOP_2_OP_02_N, _HOP_2_OP_03_N, _HOP_2_OP_04_N, _HOP_2_OP_05_N, _HOP_2_OP_06_N, _HOP_2_OP_07_N, _HOP_2_OP_08_N, _HOP_2_OP_09_N, _HOP_2_OP_10_N, _HOP_2_OP_11_N, _HOP_2_OP_12_N, _HOP_2_OP_13_N, _HOP_2_OP_14_N, _HOP_2_OP_15_N,}, 324: { _HOP_3_OP_00_N, _HOP_3_OP_01_N, _HOP_3_OP_02_N, _HOP_3_OP_03_N, _HOP_3_OP_04_N, _HOP_3_OP_05_N, _HOP_3_OP_06_N, _HOP_3_OP_07_N, _HOP_3_OP_08_N, _HOP_3_OP_09_N, _HOP_3_OP_10_N, _HOP_3_OP_11_N, _HOP_3_OP_12_N, _HOP_3_OP_13_N, _HOP_3_OP_14_N, _HOP_3_OP_15_N,} 325: }; 326: 327: static void (*do_hop_op_P[4][16])(void) = 328: { 329: { _HOP_0_OP_00_P, _HOP_0_OP_01_P, _HOP_0_OP_02_P, _HOP_0_OP_03_P, _HOP_0_OP_04_P, _HOP_0_OP_05_P, _HOP_0_OP_06_P, _HOP_0_OP_07_P, _HOP_0_OP_08_P, _HOP_0_OP_09_P, _HOP_0_OP_10_P, _HOP_0_OP_11_P, _HOP_0_OP_12_P, _HOP_0_OP_13_P, _HOP_0_OP_14_P, _HOP_0_OP_15_P,}, 330: { _HOP_1_OP_00_P, _HOP_1_OP_01_P, _HOP_1_OP_02_P, _HOP_1_OP_03_P, _HOP_1_OP_04_P, _HOP_1_OP_05_P, _HOP_1_OP_06_P, _HOP_1_OP_07_P, _HOP_1_OP_08_P, _HOP_1_OP_09_P, _HOP_1_OP_10_P, _HOP_1_OP_11_P, _HOP_1_OP_12_P, _HOP_1_OP_13_P, _HOP_1_OP_14_P, _HOP_1_OP_15_P,}, 331: { _HOP_2_OP_00_P, _HOP_2_OP_01_P, _HOP_2_OP_02_P, _HOP_2_OP_03_P, _HOP_2_OP_04_P, _HOP_2_OP_05_P, _HOP_2_OP_06_P, _HOP_2_OP_07_P, _HOP_2_OP_08_P, _HOP_2_OP_09_P, _HOP_2_OP_10_P, _HOP_2_OP_11_P, _HOP_2_OP_12_P, _HOP_2_OP_13_P, _HOP_2_OP_14_P, _HOP_2_OP_15_P,}, 332: { _HOP_3_OP_00_P, _HOP_3_OP_01_P, _HOP_3_OP_02_P, _HOP_3_OP_03_P, _HOP_3_OP_04_P, _HOP_3_OP_05_P, _HOP_3_OP_06_P, _HOP_3_OP_07_P, _HOP_3_OP_08_P, _HOP_3_OP_09_P, _HOP_3_OP_10_P, _HOP_3_OP_11_P, _HOP_3_OP_12_P, _HOP_3_OP_13_P, _HOP_3_OP_14_P, _HOP_3_OP_15_P,} 333: }; 334: 335: 336: 1.1.1.3 ! root 337: /*-----------------------------------------------------------------------*/ ! 338: /* ! 339: Read blitter endmask 1. ! 340: */ ! 341: void Blitter_Endmask1_ReadWord(void) 1.1 root 342: { 1.1.1.3 ! root 343: IoMem_WriteWord(0xff8a28, end_mask_1); 1.1 root 344: } 345: 1.1.1.3 ! root 346: /*-----------------------------------------------------------------------*/ ! 347: /* ! 348: Read blitter endmask 2. ! 349: */ ! 350: void Blitter_Endmask2_ReadWord(void) 1.1 root 351: { 1.1.1.3 ! root 352: IoMem_WriteWord(0xff8a2a, end_mask_2); 1.1 root 353: } 354: 1.1.1.3 ! root 355: /*-----------------------------------------------------------------------*/ ! 356: /* ! 357: Read blitter endmask 3. ! 358: */ ! 359: void Blitter_Endmask3_ReadWord(void) 1.1 root 360: { 1.1.1.3 ! root 361: IoMem_WriteWord(0xff8a2c, end_mask_3); 1.1 root 362: } 363: 1.1.1.3 ! root 364: /*-----------------------------------------------------------------------*/ ! 365: /* ! 366: Read blitter destination address. ! 367: */ ! 368: void Blitter_DestAddr_ReadLong(void) 1.1 root 369: { 1.1.1.3 ! root 370: IoMem_WriteLong(0xff8a32, dest_addr_reg); 1.1 root 371: } 372: 1.1.1.3 ! root 373: /*-----------------------------------------------------------------------*/ ! 374: /* ! 375: Read blitter words-per-line register. ! 376: */ ! 377: void Blitter_WordsPerLine_ReadWord(void) 1.1 root 378: { 1.1.1.3 ! root 379: IoMem_WriteWord(0xff8a36, x_count); 1.1 root 380: } 381: 1.1.1.3 ! root 382: /*-----------------------------------------------------------------------*/ ! 383: /* ! 384: Read blitter lines-per-bitblock register. ! 385: */ ! 386: void Blitter_LinesPerBitblock_ReadWord(void) 1.1 root 387: { 1.1.1.3 ! root 388: IoMem_WriteWord(0xff8a38, y_count); 1.1 root 389: } 390: 1.1.1.3 ! root 391: /*-----------------------------------------------------------------------*/ ! 392: /* ! 393: Read blitter halttone operation register. ! 394: */ ! 395: void Blitter_HalftoneOp_ReadByte(void) 1.1 root 396: { 1.1.1.3 ! root 397: IoMem_WriteByte(0xff8a3a, hop); 1.1 root 398: } 399: 1.1.1.3 ! root 400: /*-----------------------------------------------------------------------*/ ! 401: /* ! 402: Read blitter logical operation register. ! 403: */ ! 404: void Blitter_LogOp_ReadByte(void) 1.1 root 405: { 1.1.1.3 ! root 406: IoMem_WriteByte(0xff8a3b, op); 1.1 root 407: } 408: 1.1.1.3 ! root 409: /*-----------------------------------------------------------------------*/ ! 410: /* ! 411: Read blitter line number register. ! 412: */ ! 413: void Blitter_LineNum_ReadByte(void) 1.1 root 414: { 1.1.1.3 ! root 415: IoMem_WriteByte(0xff8a3c, (line_num & 0x3f)); 1.1 root 416: } 417: 1.1.1.3 ! root 418: /*-----------------------------------------------------------------------*/ ! 419: /* ! 420: Read blitter skew register. ! 421: */ ! 422: void Blitter_Skew_ReadByte(void) 1.1 root 423: { 1.1.1.3 ! root 424: IoMem_WriteByte(0xff8a3d, skewreg); 1.1 root 425: } 426: 427: 1.1.1.3 ! root 428: /*-----------------------------------------------------------------------*/ ! 429: /* ! 430: Write to blitter endmask 1. ! 431: */ ! 432: void Blitter_Endmask1_WriteWord(void) 1.1 root 433: { 1.1.1.3 ! root 434: end_mask_1 = IoMem_ReadWord(0xff8a28); 1.1 root 435: } 436: 1.1.1.3 ! root 437: /*-----------------------------------------------------------------------*/ ! 438: /* ! 439: Write to blitter endmask 2. ! 440: */ ! 441: void Blitter_Endmask2_WriteWord(void) 1.1 root 442: { 1.1.1.3 ! root 443: end_mask_2 = IoMem_ReadWord(0xff8a2a); 1.1 root 444: } 445: 1.1.1.3 ! root 446: /*-----------------------------------------------------------------------*/ ! 447: /* ! 448: Write to blitter endmask 3. ! 449: */ ! 450: void Blitter_Endmask3_WriteWord(void) 1.1 root 451: { 1.1.1.3 ! root 452: end_mask_3 = IoMem_ReadWord(0xff8a2c); 1.1 root 453: } 454: 1.1.1.3 ! root 455: /*-----------------------------------------------------------------------*/ ! 456: /* ! 457: Write to blitter destination address register. ! 458: */ ! 459: void Blitter_DestAddr_WriteLong(void) ! 460: { ! 461: dest_addr_reg = IoMem_ReadLong(0xff8a32) & 0x0fffffe; 1.1 root 462: } 463: 1.1.1.3 ! root 464: /*-----------------------------------------------------------------------*/ ! 465: /* ! 466: Write to blitter words-per-line register. ! 467: */ ! 468: void Blitter_WordsPerLine_WriteWord(void) 1.1 root 469: { 1.1.1.3 ! root 470: x_count = IoMem_ReadWord(0xff8a36); 1.1 root 471: } 472: 1.1.1.3 ! root 473: /*-----------------------------------------------------------------------*/ ! 474: /* ! 475: Write to blitter words-per-bitblock register. ! 476: */ ! 477: void Blitter_LinesPerBitblock_WriteWord(void) 1.1 root 478: { 1.1.1.3 ! root 479: y_count = IoMem_ReadWord(0xff8a38); 1.1 root 480: } 481: 1.1.1.3 ! root 482: /*-----------------------------------------------------------------------*/ ! 483: /* ! 484: Write to blitter halftone operation register. ! 485: */ ! 486: void Blitter_HalftoneOp_WriteByte(void) 1.1 root 487: { 1.1.1.3 ! root 488: hop = IoMem_ReadByte(0xff8a3a) & 3; /* h/ware reg masks out the top 6 bits! */ 1.1 root 489: } 490: 1.1.1.3 ! root 491: /*-----------------------------------------------------------------------*/ ! 492: /* ! 493: Write to blitter logical operation register. ! 494: */ ! 495: void Blitter_LogOp_WriteByte(void) 1.1 root 496: { 1.1.1.3 ! root 497: op = IoMem_ReadByte(0xff8a3b) & 15; /* h/ware reg masks out the top 4 bits! */ 1.1 root 498: } 499: 1.1.1.3 ! root 500: /*-----------------------------------------------------------------------*/ ! 501: /* ! 502: Write to blitter line number register. ! 503: */ ! 504: void Blitter_LineNum_WriteByte(void) ! 505: { ! 506: line_num = IoMem_ReadByte(0xff8a3c); ! 507: ! 508: if((y_count !=0) && (line_num & 0x80)) /* Busy bit set and lines to blit? */ ! 509: { ! 510: Blitter_Skew_WriteByte(); /* Needed if a program executes a move.W #xxxx,$ff8a3c for example */ ! 511: ! 512: /* TODO: Emulate the shared bus mode when HOG flag is cleared ! 513: * and add proper blitter timings, too */ ! 514: M68000_AddCycles(y_count); ! 515: ! 516: Do_Blit(); ! 517: } 1.1 root 518: } 519: 1.1.1.3 ! root 520: /*-----------------------------------------------------------------------*/ ! 521: /* ! 522: Write to blitter skew register. ! 523: */ ! 524: void Blitter_Skew_WriteByte(void) ! 525: { ! 526: Uint8 v = IoMem_ReadByte(0xff8a3d); ! 527: NFSR = (v & 0x40) != 0; ! 528: FXSR = (v & 0x80) != 0; ! 529: skewreg = v & 0xcf; /* h/ware reg mask %11001111 !*/ 1.1 root 530: } 531: 532: 1.1.1.3 ! root 533: /*-----------------------------------------------------------------------*/ ! 534: /* ! 535: Do the blit. ! 536: */ 1.1 root 537: void Do_Blit(void) 1.1.1.3 ! root 538: { ! 539: if (LM_W(MEM(0xff8a20)) < 0) /* source_x_inc < 0 */ ! 540: do_hop_op_N[hop][op](); ! 541: else ! 542: do_hop_op_P[hop][op](); 1.1 root 543: } 1.1.1.2 root 544: 545: 546: /*-----------------------------------------------------------------------*/ 547: /* 548: Save/Restore snapshot of Blitter variables. 549: */ 550: void Blitter_MemorySnapShot_Capture(BOOL bSave) 551: { 1.1.1.3 ! root 552: /* Save/Restore details */ ! 553: MemorySnapShot_Store(halftone_ram, sizeof(halftone_ram)); ! 554: MemorySnapShot_Store(&end_mask_1, sizeof(end_mask_1)); ! 555: MemorySnapShot_Store(&end_mask_2, sizeof(end_mask_2)); ! 556: MemorySnapShot_Store(&end_mask_3, sizeof(end_mask_3)); ! 557: MemorySnapShot_Store(&NFSR, sizeof(NFSR)); ! 558: MemorySnapShot_Store(&FXSR, sizeof(FXSR)); ! 559: MemorySnapShot_Store(&x_count, sizeof(y_count)); ! 560: MemorySnapShot_Store(&hop, sizeof(hop)); ! 561: MemorySnapShot_Store(&op, sizeof(op)); ! 562: MemorySnapShot_Store(&line_num, sizeof(line_num)); ! 563: MemorySnapShot_Store(&skewreg, sizeof(skewreg)); ! 564: MemorySnapShot_Store(&dest_addr_reg, sizeof(dest_addr_reg)); ! 565: MemorySnapShot_Store(&halftone_curroffset, sizeof(halftone_curroffset)); ! 566: MemorySnapShot_Store(&halftone_direction, sizeof(halftone_direction)); ! 567: MemorySnapShot_Store(&source_x_inc, sizeof(source_x_inc)); ! 568: MemorySnapShot_Store(&source_y_inc, sizeof(source_y_inc)); ! 569: MemorySnapShot_Store(&dest_x_inc, sizeof(dest_x_inc)); ! 570: MemorySnapShot_Store(&dest_y_inc, sizeof(dest_y_inc)); 1.1.1.2 root 571: } 1.1.1.3 ! root 572:
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