--- hatari/src/convert/spec320x16.c 2019/04/01 07:09:49 1.1.1.3 +++ hatari/src/convert/spec320x16.c 2019/04/01 07:10:26 1.1.1.4 @@ -31,6 +31,8 @@ void ConvertSpec512_320x16Bit(void) ebx = *edi; /* Do 16 pixels at one time */ ecx = *(edi+1); +#if SDL_BYTEORDER == SDL_LIL_ENDIAN + /* Convert planes to byte indices - as works in wrong order store to workspace so can read back in order! */ LOW_BUILD_PIXELS_0 ; /* Generate 'ecx' as pixels [4,5,6,7] */ PixelWorkspace[1] = ecx; @@ -48,7 +50,7 @@ void ConvertSpec512_320x16Bit(void) PLOT_SPEC512_LEFT_LOW_320_16BIT(0) ; Spec512_UpdatePaletteSpan(); - ecx = *(Uint32 *)( ((Uint8 *)PixelWorkspace)+1 ); /* FIXME: I guess this will not work on some non-Intel architectures - Thothy */ + ecx = *(Uint32 *)( ((Uint8 *)PixelWorkspace)+1 ); PLOT_SPEC512_MID_320_16BIT(1) ; Spec512_UpdatePaletteSpan(); @@ -63,6 +65,37 @@ void ConvertSpec512_320x16Bit(void) ecx = *(Uint32 *)( ((Uint8 *)PixelWorkspace)+13 ); PLOT_SPEC512_END_LOW_320_16BIT(13) ; +#else + /* Well, I didn't get the code above working on big-endian machines, too, + But I hope the following lines are good enough to also do the job... - THH */ + + LOW_BUILD_PIXELS_0 ; + PixelWorkspace[3] = ecx; + LOW_BUILD_PIXELS_1 ; + PixelWorkspace[1] = ecx; + LOW_BUILD_PIXELS_2 ; + PixelWorkspace[2] = ecx; + LOW_BUILD_PIXELS_3 ; + PixelWorkspace[0] = ecx; + + ecx = PixelWorkspace[0]; + PLOT_SPEC512_MID_320_16BIT(0) ; + Spec512_UpdatePaletteSpan(); + + ecx = PixelWorkspace[1]; + PLOT_SPEC512_MID_320_16BIT(4) ; + Spec512_UpdatePaletteSpan(); + + ecx = PixelWorkspace[2]; + PLOT_SPEC512_MID_320_16BIT(8) ; + Spec512_UpdatePaletteSpan(); + + ecx = PixelWorkspace[3]; + PLOT_SPEC512_MID_320_16BIT(12) ; + Spec512_UpdatePaletteSpan(); + +#endif + esi += 16; /* Next PC pixels */ edi += 2; /* Next ST pixels */ ebp += 2; /* Next ST copy pixels */