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1.1.1.2 root 1: /*
2: * cpummu.h - MMU emulation
3: *
4: * Copyright (c) 2001-2004 Milan Jurik of ARAnyM dev team (see AUTHORS)
1.1.1.4 ! root 5: *
1.1.1.2 root 6: * Inspired by UAE MMU patch
7: *
8: * This file is part of the ARAnyM project which builds a new and powerful
9: * TOS/FreeMiNT compatible virtual machine running on almost any hardware.
10: *
11: * ARAnyM is free software; you can redistribute it and/or modify
12: * it under the terms of the GNU General Public License as published by
13: * the Free Software Foundation; either version 2 of the License, or
14: * (at your option) any later version.
15: *
16: * ARAnyM is distributed in the hope that it will be useful,
17: * but WITHOUT ANY WARRANTY; without even the implied warranty of
18: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19: * GNU General Public License for more details.
20: *
21: * You should have received a copy of the GNU General Public License
22: * along with ARAnyM; if not, write to the Free Software
23: * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24: */
25:
1.1.1.4 ! root 26:
1.1.1.2 root 27: #ifndef CPUMMU_H
28: #define CPUMMU_H
29:
1.1.1.3 root 30: #include "mmu_common.h"
1.1.1.2 root 31:
32: #ifndef FULLMMU
33: #define FULLMMU
34: #endif
35:
36: #define DUNUSED(x)
37: #define D
38: #if DEBUG
39: #define bug write_log
40: #else
41: #define bug
42: #endif
43:
44: static __inline void flush_internals (void) { }
45:
1.1.1.4 ! root 46: extern int mmu060_state;
! 47:
! 48: extern int mmu040_movem;
! 49: extern uaecptr mmu040_movem_ea;
! 50: extern uae_u32 mmu040_move16[4];
! 51:
! 52: extern bool mmu_pagesize_8k;
! 53: extern uae_u16 mmu_opcode;
! 54: extern bool mmu_restart;
! 55: extern bool mmu_ttr_enabled;
! 56:
1.1.1.2 root 57: //typedef uae_u8 flagtype;
58:
59: //static m68k_exception except;
60:
61: struct xttrx {
62: uae_u32 log_addr_base : 8;
63: uae_u32 log_addr_mask : 8;
64: uae_u32 enable : 1;
65: uae_u32 s_field : 2;
66: uae_u32 : 3;
67: uae_u32 usr1 : 1;
68: uae_u32 usr0 : 1;
69: uae_u32 : 1;
70: uae_u32 cmode : 2;
71: uae_u32 : 2;
72: uae_u32 write : 1;
73: uae_u32 : 2;
74: };
75:
76: struct mmusr_t {
77: uae_u32 phys_addr : 20;
78: uae_u32 bus_err : 1;
79: uae_u32 global : 1;
80: uae_u32 usr1 : 1;
81: uae_u32 usr0 : 1;
82: uae_u32 super : 1;
83: uae_u32 cmode : 2;
84: uae_u32 modif : 1;
85: uae_u32 : 1;
86: uae_u32 write : 1;
87: uae_u32 ttrhit : 1;
88: uae_u32 resident : 1;
89: };
90:
91: struct log_addr4 {
92: uae_u32 rif : 7;
93: uae_u32 pif : 7;
94: uae_u32 paif : 6;
95: uae_u32 poff : 12;
96: };
97:
98: struct log_addr8 {
99: uae_u32 rif : 7;
100: uae_u32 pif : 7;
101: uae_u32 paif : 5;
102: uae_u32 poff : 13;
103: };
104:
105: #define MMU_TEST_PTEST 1
106: #define MMU_TEST_VERBOSE 2
107: #define MMU_TEST_FORCE_TABLE_SEARCH 4
108: #define MMU_TEST_NO_BUSERR 8
109:
1.1.1.4 ! root 110: extern void mmu_dump_atc(void);
1.1.1.2 root 111: extern void mmu_dump_tables(void);
112:
113: #define MMU_TTR_LOGICAL_BASE 0xff000000
114: #define MMU_TTR_LOGICAL_MASK 0x00ff0000
115: #define MMU_TTR_BIT_ENABLED (1 << 15)
116: #define MMU_TTR_BIT_SFIELD_ENABLED (1 << 14)
117: #define MMU_TTR_BIT_SFIELD_SUPER (1 << 13)
118: #define MMU_TTR_SFIELD_SHIFT 13
119: #define MMU_TTR_UX_MASK ((1 << 9) | (1 << 8))
120: #define MMU_TTR_UX_SHIFT 8
121: #define MMU_TTR_CACHE_MASK ((1 << 6) | (1 << 5))
122: #define MMU_TTR_CACHE_SHIFT 5
123: #define MMU_TTR_BIT_WRITE_PROTECT (1 << 2)
124:
125: #define MMU_UDT_MASK 3
126: #define MMU_PDT_MASK 3
127:
128: #define MMU_DES_WP 4
129: #define MMU_DES_USED 8
130:
131: /* page descriptors only */
132: #define MMU_DES_MODIFIED 16
133: #define MMU_DES_SUPER (1 << 7)
134: #define MMU_DES_GLOBAL (1 << 10)
135:
136: #define MMU_ROOT_PTR_ADDR_MASK 0xfffffe00
137: #define MMU_PTR_PAGE_ADDR_MASK_8 0xffffff80
138: #define MMU_PTR_PAGE_ADDR_MASK_4 0xffffff00
139:
140: #define MMU_PAGE_INDIRECT_MASK 0xfffffffc
141: #define MMU_PAGE_ADDR_MASK_8 0xffffe000
142: #define MMU_PAGE_ADDR_MASK_4 0xfffff000
143: #define MMU_PAGE_UR_MASK_8 ((1 << 12) | (1 << 11))
144: #define MMU_PAGE_UR_MASK_4 (1 << 11)
145: #define MMU_PAGE_UR_SHIFT 11
146:
147: #define MMU_MMUSR_ADDR_MASK 0xfffff000
148: #define MMU_MMUSR_B (1 << 11)
149: #define MMU_MMUSR_G (1 << 10)
150: #define MMU_MMUSR_U1 (1 << 9)
151: #define MMU_MMUSR_U0 (1 << 8)
152: #define MMU_MMUSR_Ux (MMU_MMUSR_U1 | MMU_MMUSR_U0)
153: #define MMU_MMUSR_S (1 << 7)
154: #define MMU_MMUSR_CM ((1 << 6) | ( 1 << 5))
155: #define MMU_MMUSR_M (1 << 4)
156: #define MMU_MMUSR_W (1 << 2)
157: #define MMU_MMUSR_T (1 << 1)
158: #define MMU_MMUSR_R (1 << 0)
159:
160: #define TTR_I0 4
161: #define TTR_I1 5
162: #define TTR_D0 6
163: #define TTR_D1 7
164:
165: #define TTR_NO_MATCH 0
166: #define TTR_NO_WRITE 1
167: #define TTR_OK_MATCH 2
168:
169: struct mmu_atc_line {
1.1.1.4 ! root 170: uaecptr tag; // tag is 16 or 17 bits S+logical
! 171: unsigned valid : 1;
1.1.1.2 root 172: unsigned global : 1;
173: unsigned modified : 1;
174: unsigned write_protect : 1;
1.1.1.4 ! root 175: uaecptr phys; // phys base address
1.1.1.2 root 176: };
177:
178: /*
1.1.1.4 ! root 179: * 68040 ATC is a 4 way 16 slot associative address translation cache
! 180: * the 68040 has a DATA and an INSTRUCTION ATC.
! 181: * an ATC lookup may result in : a hit, a miss and a modified state.
! 182: * the 68060 can disable ATC allocation
! 183: * we must take care of 8k and 4k page size, index position is relative to page size
1.1.1.2 root 184: */
185:
1.1.1.4 ! root 186: #define ATC_WAYS 4
! 187: #define ATC_SLOTS 16
! 188: #define ATC_TYPE 2
! 189:
! 190: extern uae_u32 mmu_is_super;
! 191: extern uae_u32 mmu_tagmask, mmu_pagemask;
! 192: extern struct mmu_atc_line mmu_atc_array[ATC_TYPE][ATC_WAYS][ATC_SLOTS];
1.1.1.2 root 193:
1.1.1.4 ! root 194: /* Last matched ATC index, next lookup starts from this index as an optimization */
! 195: extern int mmu_atc_ways;
1.1.1.2 root 196:
197: /*
1.1.1.4 ! root 198: * mmu access is a 4 step process:
! 199: * if mmu is not enabled just read physical
! 200: * check transparent region, if transparent, read physical
! 201: * check ATC (address translation cache), read immediatly if HIT
! 202: * read from mmu with the long path (and allocate ATC entry if needed)
1.1.1.2 root 203: */
204: static ALWAYS_INLINE bool mmu_lookup(uaecptr addr, bool data, bool write,
205: struct mmu_atc_line **cl)
206: {
1.1.1.4 ! root 207: int way, i, index;
! 208: static int way_miss=0;
! 209:
! 210: uae_u32 tag = (mmu_is_super | (addr >> 1)) & mmu_tagmask;
! 211: if (mmu_pagesize_8k)
! 212: index=(addr & 0x0001E000)>>13;
! 213: else
! 214: index=(addr & 0x0000F000)>>12;
! 215: for (i = 0; i < ATC_WAYS; i++) {
! 216: way = mmu_atc_ways;
! 217: // if we have this
! 218: if ((tag == mmu_atc_array[data][way][index].tag) && (mmu_atc_array[data][way][index].valid)) {
! 219: *cl=&mmu_atc_array[data][way][index];
! 220: // if first write to this take slow path (but modify this slot)
! 221: if ((!mmu_atc_array[data][way][index].modified & write) || (mmu_atc_array[data][way][index].write_protect & write))
! 222: return false;
! 223: return true;
! 224: }
! 225: mmu_atc_ways++;
! 226: mmu_atc_ways %= ATC_WAYS;
! 227: }
! 228: // we select a random way to void
! 229: *cl=&mmu_atc_array[data][way_miss%ATC_WAYS][index];
! 230: (*cl)->tag = tag;
! 231: way_miss++;
! 232: return false;
1.1.1.2 root 233: }
234:
235: /*
236: */
237: static ALWAYS_INLINE bool mmu_user_lookup(uaecptr addr, bool super, bool data,
238: bool write, struct mmu_atc_line **cl)
239: {
1.1.1.4 ! root 240: int way, i, index;
! 241: static int way_miss=0;
! 242:
! 243: uae_u32 tag = ((super ? 0x80000000 : 0x00000000) | (addr >> 1)) & mmu_tagmask;
! 244: if (mmu_pagesize_8k)
! 245: index=(addr & 0x0001E000)>>13;
! 246: else
! 247: index=(addr & 0x0000F000)>>12;
! 248: for (i = 0; i < ATC_WAYS; i++) {
! 249: way = mmu_atc_ways;
! 250: // if we have this
! 251: if ((tag == mmu_atc_array[data][way][index].tag) && (mmu_atc_array[data][way][index].valid)) {
! 252: *cl=&mmu_atc_array[data][way][index];
! 253: // if first write to this take slow path (but modify this slot)
! 254: if ((!mmu_atc_array[data][way][index].modified & write) || (mmu_atc_array[data][way][index].write_protect & write))
! 255: return false;
! 256: return true;
! 257: }
! 258: mmu_atc_ways++;
! 259: mmu_atc_ways %= ATC_WAYS;
! 260: }
! 261: // we select a random way to void
! 262: *cl=&mmu_atc_array[data][way_miss%ATC_WAYS][index];
! 263: (*cl)->tag = tag;
! 264: way_miss++;
! 265: return false;
! 266: }
! 267:
! 268: /* check if an address matches a ttr */
! 269: STATIC_INLINE int mmu_do_match_ttr(uae_u32 ttr, uaecptr addr, bool super)
! 270: {
! 271: if (ttr & MMU_TTR_BIT_ENABLED) { /* TTR enabled */
! 272: uae_u8 msb, mask;
! 273:
! 274: msb = ((addr ^ ttr) & MMU_TTR_LOGICAL_BASE) >> 24;
! 275: mask = (ttr & MMU_TTR_LOGICAL_MASK) >> 16;
! 276:
! 277: if (!(msb & ~mask)) {
! 278:
! 279: if ((ttr & MMU_TTR_BIT_SFIELD_ENABLED) == 0) {
! 280: if (((ttr & MMU_TTR_BIT_SFIELD_SUPER) == 0) != (super == 0)) {
! 281: return TTR_NO_MATCH;
! 282: }
! 283: }
! 284:
! 285: return (ttr & MMU_TTR_BIT_WRITE_PROTECT) ? TTR_NO_WRITE : TTR_OK_MATCH;
! 286: }
! 287: }
! 288: return TTR_NO_MATCH;
! 289: }
! 290:
! 291: STATIC_INLINE int mmu_match_ttr(uaecptr addr, bool super, bool data, bool rmw)
! 292: {
! 293: int res;
! 294:
! 295: if (!mmu_ttr_enabled)
! 296: return TTR_NO_MATCH;
! 297: if (data) {
! 298: res = mmu_do_match_ttr(regs.dtt0, addr, super);
! 299: if (res == TTR_NO_MATCH)
! 300: res = mmu_do_match_ttr(regs.dtt1, addr, super);
! 301: } else {
! 302: res = mmu_do_match_ttr(regs.itt0, addr, super);
! 303: if (res == TTR_NO_MATCH)
! 304: res = mmu_do_match_ttr(regs.itt1, addr, super);
! 305: }
! 306: return res;
! 307: }
! 308: extern void mmu_bus_error_ttr_write_fault(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool rmw);
! 309: STATIC_INLINE int mmu_match_ttr_write(uaecptr addr, bool super, bool data, uae_u32 val, int size, bool rmw)
! 310: {
! 311: if (!mmu_ttr_enabled)
! 312: return TTR_NO_MATCH;
! 313: int res = mmu_match_ttr(addr, super, data, rmw);
! 314: if (res == TTR_NO_WRITE)
! 315: mmu_bus_error_ttr_write_fault(addr, super, data, val, size, rmw);
! 316: return res;
! 317: }
! 318:
! 319: extern void mmu_tt_modified (void);
! 320:
! 321: extern uae_u32 REGPARAM3 mmu060_get_rmw_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
! 322: extern void REGPARAM3 mmu060_put_rmw_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
! 323:
! 324: extern uae_u16 REGPARAM3 mmu_get_word_unaligned(uaecptr addr, bool data, bool rmw) REGPARAM;
! 325: extern uae_u32 REGPARAM3 mmu_get_long_unaligned(uaecptr addr, bool data, bool rmw) REGPARAM;
! 326: extern uae_u16 REGPARAM2 mmu_get_lrmw_word_unaligned(uaecptr addr) REGPARAM;
! 327: extern uae_u32 REGPARAM2 mmu_get_lrmw_long_unaligned(uaecptr addr) REGPARAM;
1.1.1.2 root 328:
1.1.1.4 ! root 329: extern uae_u32 REGPARAM3 mmu_get_ilong_unaligned(uaecptr addr) REGPARAM;
1.1.1.2 root 330:
331: extern uae_u8 REGPARAM3 mmu_get_byte_slow(uaecptr addr, bool super, bool data,
1.1.1.4 ! root 332: int size, bool rmw, struct mmu_atc_line *cl) REGPARAM;
1.1.1.2 root 333: extern uae_u16 REGPARAM3 mmu_get_word_slow(uaecptr addr, bool super, bool data,
1.1.1.4 ! root 334: int size, bool rmw, struct mmu_atc_line *cl) REGPARAM;
1.1.1.2 root 335: extern uae_u32 REGPARAM3 mmu_get_long_slow(uaecptr addr, bool super, bool data,
1.1.1.4 ! root 336: int size, bool rmw, struct mmu_atc_line *cl) REGPARAM;
! 337:
! 338: extern uae_u16 REGPARAM3 mmu_get_iword_slow(uaecptr addr, bool super,
! 339: int size, struct mmu_atc_line *cl) REGPARAM;
! 340: extern uae_u32 REGPARAM3 mmu_get_ilong_slow(uaecptr addr, bool super,
1.1.1.2 root 341: int size, struct mmu_atc_line *cl) REGPARAM;
342:
1.1.1.4 ! root 343: extern void REGPARAM3 mmu_put_word_unaligned(uaecptr addr, uae_u16 val, bool data, bool rmw) REGPARAM;
! 344: extern void REGPARAM3 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, bool data, bool rmw) REGPARAM;
1.1.1.2 root 345:
346: extern void REGPARAM3 mmu_put_byte_slow(uaecptr addr, uae_u8 val, bool super, bool data,
1.1.1.4 ! root 347: int size, bool rmw, struct mmu_atc_line *cl) REGPARAM;
1.1.1.2 root 348: extern void REGPARAM3 mmu_put_word_slow(uaecptr addr, uae_u16 val, bool super, bool data,
1.1.1.4 ! root 349: int size, bool rmw, struct mmu_atc_line *cl) REGPARAM;
1.1.1.2 root 350: extern void REGPARAM3 mmu_put_long_slow(uaecptr addr, uae_u32 val, bool super, bool data,
1.1.1.4 ! root 351: int size, bool rmw, struct mmu_atc_line *cl) REGPARAM;
1.1.1.2 root 352:
353: extern void mmu_make_transparent_region(uaecptr baseaddr, uae_u32 size, int datamode);
354:
355: #define FC_DATA (regs.s ? 5 : 1)
356: #define FC_INST (regs.s ? 6 : 2)
357:
358: extern uaecptr REGPARAM3 mmu_translate(uaecptr addr, bool super, bool data, bool write) REGPARAM;
1.1.1.4 ! root 359: extern void mmu_bus_error(uaecptr addr, int fc, bool write, int size, bool rmw, uae_u32 status, bool nonmmu);
1.1.1.2 root 360:
361: extern uae_u32 REGPARAM3 sfc_get_long(uaecptr addr) REGPARAM;
362: extern uae_u16 REGPARAM3 sfc_get_word(uaecptr addr) REGPARAM;
363: extern uae_u8 REGPARAM3 sfc_get_byte(uaecptr addr) REGPARAM;
364: extern void REGPARAM3 dfc_put_long(uaecptr addr, uae_u32 val) REGPARAM;
365: extern void REGPARAM3 dfc_put_word(uaecptr addr, uae_u16 val) REGPARAM;
366: extern void REGPARAM3 dfc_put_byte(uaecptr addr, uae_u8 val) REGPARAM;
367:
1.1.1.4 ! root 368: #define sfc040_get_long sfc_get_long
! 369: #define sfc040_get_word sfc_get_word
! 370: #define sfc040_get_byte sfc_get_byte
! 371: #define dfc040_put_long dfc_put_long
! 372: #define dfc040_put_word dfc_put_word
! 373: #define dfc040_put_byte dfc_put_byte
! 374:
! 375: #define sfc060_get_long sfc_get_long
! 376: #define sfc060_get_word sfc_get_word
! 377: #define sfc060_get_byte sfc_get_byte
! 378: #define dfc060_put_long dfc_put_long
! 379: #define dfc060_put_word dfc_put_word
! 380: #define dfc060_put_byte dfc_put_byte
! 381:
! 382: extern void uae_mmu_put_lrmw (uaecptr addr, uae_u32 v, int size, int type);
! 383: extern uae_u32 uae_mmu_get_lrmw (uaecptr addr, int size, int type);
1.1.1.2 root 384:
385: extern void REGPARAM3 mmu_flush_atc(uaecptr addr, bool super, bool global) REGPARAM;
386: extern void REGPARAM3 mmu_flush_atc_all(bool global) REGPARAM;
387: extern void REGPARAM3 mmu_op_real(uae_u32 opcode, uae_u16 extra) REGPARAM;
388:
389: extern void REGPARAM3 mmu_reset(void) REGPARAM;
1.1.1.4 ! root 390: extern void REGPARAM3 mmu_set_funcs(void) REGPARAM;
1.1.1.2 root 391: extern void REGPARAM3 mmu_set_tc(uae_u16 tc) REGPARAM;
392: extern void REGPARAM3 mmu_set_super(bool super) REGPARAM;
393:
394: static ALWAYS_INLINE uaecptr mmu_get_real_address(uaecptr addr, struct mmu_atc_line *cl)
395: {
1.1.1.4 ! root 396: return cl->phys | (addr & mmu_pagemask);
1.1.1.2 root 397: }
398:
1.1.1.4 ! root 399: extern void mmu_get_move16(uaecptr addr, uae_u32 *v, bool data, int size);
! 400: extern void mmu_put_move16(uaecptr addr, uae_u32 *val, bool data, int size);
! 401:
! 402: static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, bool data, int size, bool rmw)
1.1.1.2 root 403: {
404: struct mmu_atc_line *cl;
405:
1.1.1.4 ! root 406: // addr,super,data
! 407: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data,rmw)!=TTR_NO_MATCH))
! 408: return x_phys_get_long(addr);
1.1.1.2 root 409: if (likely(mmu_lookup(addr, data, false, &cl)))
1.1.1.4 ! root 410: return x_phys_get_long(mmu_get_real_address(addr, cl));
! 411: return mmu_get_long_slow(addr, regs.s != 0, data, size, rmw, cl);
1.1.1.2 root 412: }
413:
1.1.1.4 ! root 414: static ALWAYS_INLINE uae_u32 mmu_get_ilong(uaecptr addr, int size)
1.1.1.2 root 415: {
416: struct mmu_atc_line *cl;
417:
1.1.1.4 ! root 418: // addr,super,data
! 419: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr, regs.s != 0, false, false) != TTR_NO_MATCH))
! 420: return x_phys_get_ilong(addr);
! 421: if (likely(mmu_lookup(addr, false, false, &cl)))
! 422: return x_phys_get_ilong(mmu_get_real_address(addr, cl));
! 423: return mmu_get_ilong_slow(addr, regs.s != 0, size, cl);
1.1.1.2 root 424: }
425:
1.1.1.4 ! root 426: static ALWAYS_INLINE uae_u16 mmu_get_word(uaecptr addr, bool data, int size, bool rmw)
1.1.1.2 root 427: {
428: struct mmu_atc_line *cl;
429:
1.1.1.4 ! root 430: // addr,super,data
! 431: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data,rmw)!=TTR_NO_MATCH))
! 432: return x_phys_get_word(addr);
1.1.1.2 root 433: if (likely(mmu_lookup(addr, data, false, &cl)))
1.1.1.4 ! root 434: return x_phys_get_word(mmu_get_real_address(addr, cl));
! 435: return mmu_get_word_slow(addr, regs.s != 0, data, size, rmw, cl);
1.1.1.2 root 436: }
437:
1.1.1.4 ! root 438: static ALWAYS_INLINE uae_u16 mmu_get_iword(uaecptr addr, int size)
! 439: {
! 440: struct mmu_atc_line *cl;
! 441:
! 442: // addr,super,data
! 443: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr, regs.s != 0, false, false) != TTR_NO_MATCH))
! 444: return x_phys_get_iword(addr);
! 445: if (likely(mmu_lookup(addr, false, false, &cl)))
! 446: return x_phys_get_iword(mmu_get_real_address(addr, cl));
! 447: return mmu_get_iword_slow(addr, regs.s != 0, size, cl);
! 448: }
! 449:
! 450: static ALWAYS_INLINE uae_u8 mmu_get_byte(uaecptr addr, bool data, int size, bool rmw)
! 451: {
! 452: struct mmu_atc_line *cl;
! 453:
! 454: // addr,super,data
! 455: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,regs.s != 0,data,rmw)!=TTR_NO_MATCH))
! 456: return x_phys_get_byte(addr);
! 457: if (likely(mmu_lookup(addr, data, false, &cl)))
! 458: return x_phys_get_byte(mmu_get_real_address(addr, cl));
! 459: return mmu_get_byte_slow(addr, regs.s != 0, data, size, rmw, cl);
! 460: }
1.1.1.2 root 461:
1.1.1.4 ! root 462: static ALWAYS_INLINE void mmu_put_long(uaecptr addr, uae_u32 val, bool data, int size, bool rmw)
1.1.1.2 root 463: {
464: struct mmu_atc_line *cl;
465:
1.1.1.4 ! root 466: // addr,super,data
! 467: if ((!regs.mmu_enabled) || mmu_match_ttr_write(addr,regs.s != 0,data,val,size,rmw)==TTR_OK_MATCH) {
! 468: x_phys_put_long(addr,val);
! 469: return;
! 470: }
1.1.1.2 root 471: if (likely(mmu_lookup(addr, data, true, &cl)))
1.1.1.4 ! root 472: x_phys_put_long(mmu_get_real_address(addr, cl), val);
1.1.1.2 root 473: else
1.1.1.4 ! root 474: mmu_put_long_slow(addr, val, regs.s != 0, data, size, rmw, cl);
1.1.1.2 root 475: }
476:
1.1.1.4 ! root 477: static ALWAYS_INLINE void mmu_put_word(uaecptr addr, uae_u16 val, bool data, int size, bool rmw)
1.1.1.2 root 478: {
479: struct mmu_atc_line *cl;
480:
1.1.1.4 ! root 481: // addr,super,data
! 482: if ((!regs.mmu_enabled) || (mmu_match_ttr_write(addr,regs.s != 0,data,val,size,rmw)==TTR_OK_MATCH)) {
! 483: x_phys_put_word(addr,val);
! 484: return;
! 485: }
1.1.1.2 root 486: if (likely(mmu_lookup(addr, data, true, &cl)))
1.1.1.4 ! root 487: x_phys_put_word(mmu_get_real_address(addr, cl), val);
1.1.1.2 root 488: else
1.1.1.4 ! root 489: mmu_put_word_slow(addr, val, regs.s != 0, data, size, rmw, cl);
1.1.1.2 root 490: }
491:
1.1.1.4 ! root 492: static ALWAYS_INLINE void mmu_put_byte(uaecptr addr, uae_u8 val, bool data, int size, bool rmw)
1.1.1.2 root 493: {
494: struct mmu_atc_line *cl;
495:
1.1.1.4 ! root 496: // addr,super,data
! 497: if ((!regs.mmu_enabled) || (mmu_match_ttr_write(addr,regs.s != 0,data,val,size,rmw)==TTR_OK_MATCH)) {
! 498: x_phys_put_byte(addr,val);
! 499: return;
! 500: }
1.1.1.2 root 501: if (likely(mmu_lookup(addr, data, true, &cl)))
1.1.1.4 ! root 502: x_phys_put_byte(mmu_get_real_address(addr, cl), val);
1.1.1.2 root 503: else
1.1.1.4 ! root 504: mmu_put_byte_slow(addr, val, regs.s != 0, data, size, rmw, cl);
1.1.1.2 root 505: }
506:
1.1.1.4 ! root 507: static ALWAYS_INLINE uae_u32 mmu_get_user_long(uaecptr addr, bool super, bool data, bool write, int size)
1.1.1.2 root 508: {
509: struct mmu_atc_line *cl;
510:
1.1.1.4 ! root 511: // addr,super,data
! 512: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data,false)!=TTR_NO_MATCH))
! 513: return x_phys_get_long(addr);
! 514: if (likely(mmu_user_lookup(addr, super, data, write, &cl)))
! 515: return x_phys_get_long(mmu_get_real_address(addr, cl));
! 516: return mmu_get_long_slow(addr, super, data, size, false, cl);
1.1.1.2 root 517: }
518:
1.1.1.4 ! root 519: static ALWAYS_INLINE uae_u16 mmu_get_user_word(uaecptr addr, bool super, bool data, bool write, int size)
1.1.1.2 root 520: {
521: struct mmu_atc_line *cl;
522:
1.1.1.4 ! root 523: // addr,super,data
! 524: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data,false)!=TTR_NO_MATCH))
! 525: return x_phys_get_word(addr);
! 526: if (likely(mmu_user_lookup(addr, super, data, write, &cl)))
! 527: return x_phys_get_word(mmu_get_real_address(addr, cl));
! 528: return mmu_get_word_slow(addr, super, data, size, false, cl);
1.1.1.2 root 529: }
530:
1.1.1.4 ! root 531: static ALWAYS_INLINE uae_u8 mmu_get_user_byte(uaecptr addr, bool super, bool data, bool write, int size)
1.1.1.2 root 532: {
533: struct mmu_atc_line *cl;
534:
1.1.1.4 ! root 535: // addr,super,data
! 536: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data,false)!=TTR_NO_MATCH))
! 537: return x_phys_get_byte(addr);
! 538: if (likely(mmu_user_lookup(addr, super, data, write, &cl)))
! 539: return x_phys_get_byte(mmu_get_real_address(addr, cl));
! 540: return mmu_get_byte_slow(addr, super, data, size, false, cl);
1.1.1.2 root 541: }
542:
543: static ALWAYS_INLINE void mmu_put_user_long(uaecptr addr, uae_u32 val, bool super, bool data, int size)
544: {
545: struct mmu_atc_line *cl;
546:
1.1.1.4 ! root 547: // addr,super,data
! 548: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data,false)==TTR_OK_MATCH)) {
! 549: x_phys_put_long(addr,val);
! 550: return;
! 551: }
1.1.1.2 root 552: if (likely(mmu_user_lookup(addr, super, data, true, &cl)))
1.1.1.4 ! root 553: x_phys_put_long(mmu_get_real_address(addr, cl), val);
1.1.1.2 root 554: else
1.1.1.4 ! root 555: mmu_put_long_slow(addr, val, super, data, size, false, cl);
1.1.1.2 root 556: }
557:
558: static ALWAYS_INLINE void mmu_put_user_word(uaecptr addr, uae_u16 val, bool super, bool data, int size)
559: {
560: struct mmu_atc_line *cl;
561:
1.1.1.4 ! root 562: // addr,super,data
! 563: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data,false)==TTR_OK_MATCH)) {
! 564: x_phys_put_word(addr,val);
! 565: return;
! 566: }
1.1.1.2 root 567: if (likely(mmu_user_lookup(addr, super, data, true, &cl)))
1.1.1.4 ! root 568: x_phys_put_word(mmu_get_real_address(addr, cl), val);
1.1.1.2 root 569: else
1.1.1.4 ! root 570: mmu_put_word_slow(addr, val, super, data, size, false, cl);
1.1.1.2 root 571: }
572:
573: static ALWAYS_INLINE void mmu_put_user_byte(uaecptr addr, uae_u8 val, bool super, bool data, int size)
574: {
575: struct mmu_atc_line *cl;
576:
1.1.1.4 ! root 577: // addr,super,data
! 578: if ((!regs.mmu_enabled) || (mmu_match_ttr(addr,super,data,false)==TTR_OK_MATCH)) {
! 579: x_phys_put_byte(addr,val);
! 580: return;
! 581: }
1.1.1.2 root 582: if (likely(mmu_user_lookup(addr, super, data, true, &cl)))
1.1.1.4 ! root 583: x_phys_put_byte(mmu_get_real_address(addr, cl), val);
1.1.1.2 root 584: else
1.1.1.4 ! root 585: mmu_put_byte_slow(addr, val, super, data, size, false, cl);
1.1.1.2 root 586: }
587:
588:
589: static ALWAYS_INLINE void HWput_l(uaecptr addr, uae_u32 l)
590: {
591: put_long (addr, l);
592: }
593: static ALWAYS_INLINE void HWput_w(uaecptr addr, uae_u32 w)
594: {
595: put_word (addr, w);
596: }
597: static ALWAYS_INLINE void HWput_b(uaecptr addr, uae_u32 b)
598: {
599: put_byte (addr, b);
600: }
601: static ALWAYS_INLINE uae_u32 HWget_l(uaecptr addr)
602: {
603: return get_long (addr);
604: }
605: static ALWAYS_INLINE uae_u32 HWget_w(uaecptr addr)
606: {
607: return get_word (addr);
608: }
609: static ALWAYS_INLINE uae_u32 HWget_b(uaecptr addr)
610: {
611: return get_byte (addr);
612: }
613:
1.1.1.4 ! root 614: static ALWAYS_INLINE uae_u32 uae_mmu040_get_ilong(uaecptr addr)
1.1.1.2 root 615: {
616: if (unlikely(is_unaligned(addr, 4)))
1.1.1.4 ! root 617: return mmu_get_ilong_unaligned(addr);
! 618: return mmu_get_ilong(addr, sz_long);
1.1.1.2 root 619: }
1.1.1.4 ! root 620: static ALWAYS_INLINE uae_u16 uae_mmu040_get_iword(uaecptr addr)
! 621: {
! 622: return mmu_get_iword(addr, sz_word);
! 623: }
! 624: static ALWAYS_INLINE uae_u16 uae_mmu040_get_ibyte(uaecptr addr)
! 625: {
! 626: return mmu_get_byte(addr, false, sz_byte, false);
! 627: }
! 628: static ALWAYS_INLINE uae_u32 uae_mmu040_get_long(uaecptr addr)
! 629: {
! 630: if (unlikely(is_unaligned(addr, 4)))
! 631: return mmu_get_long_unaligned(addr, true, false);
! 632: return mmu_get_long(addr, true, sz_long, false);
! 633: }
! 634: static ALWAYS_INLINE uae_u16 uae_mmu040_get_word(uaecptr addr)
1.1.1.2 root 635: {
636: if (unlikely(is_unaligned(addr, 2)))
1.1.1.4 ! root 637: return mmu_get_word_unaligned(addr, true, false);
! 638: return mmu_get_word(addr, true, sz_word, false);
1.1.1.2 root 639: }
1.1.1.4 ! root 640: static ALWAYS_INLINE uae_u8 uae_mmu040_get_byte(uaecptr addr)
1.1.1.2 root 641: {
1.1.1.4 ! root 642: return mmu_get_byte(addr, true, sz_byte, false);
1.1.1.2 root 643: }
1.1.1.4 ! root 644:
! 645: static ALWAYS_INLINE void uae_mmu040_put_word(uaecptr addr, uae_u16 val)
! 646: {
! 647: if (unlikely(is_unaligned(addr, 2)))
! 648: mmu_put_word_unaligned(addr, val, true, false);
! 649: else
! 650: mmu_put_word(addr, val, true, sz_word, false);
! 651: }
! 652: static ALWAYS_INLINE void uae_mmu040_put_byte(uaecptr addr, uae_u8 val)
! 653: {
! 654: mmu_put_byte(addr, val, true, sz_byte, false);
! 655: }
! 656: static ALWAYS_INLINE void uae_mmu040_put_long(uaecptr addr, uae_u32 val)
1.1.1.2 root 657: {
658: if (unlikely(is_unaligned(addr, 4)))
1.1.1.4 ! root 659: mmu_put_long_unaligned(addr, val, true, false);
! 660: else
! 661: mmu_put_long(addr, val, true, sz_long, false);
1.1.1.2 root 662: }
1.1.1.4 ! root 663:
! 664:
! 665: static ALWAYS_INLINE uae_u32 uae_mmu060_get_ilong(uaecptr addr)
! 666: {
! 667: if (unlikely(is_unaligned(addr, 4)))
! 668: return mmu_get_ilong_unaligned(addr);
! 669: return mmu_get_ilong(addr, sz_long);
! 670: }
! 671: static ALWAYS_INLINE uae_u16 uae_mmu060_get_iword(uaecptr addr)
! 672: {
! 673: return mmu_get_iword(addr, sz_word);
! 674: }
! 675: static ALWAYS_INLINE uae_u16 uae_mmu060_get_ibyte(uaecptr addr)
! 676: {
! 677: return mmu_get_byte(addr, false, sz_byte, false);
! 678: }
! 679: static ALWAYS_INLINE uae_u32 uae_mmu060_get_long(uaecptr addr, bool rmw)
! 680: {
! 681: if (unlikely(is_unaligned(addr, 4)))
! 682: return mmu_get_long_unaligned(addr, true, rmw);
! 683: return mmu_get_long(addr, true, sz_long, rmw);
! 684: }
! 685: static ALWAYS_INLINE uae_u16 uae_mmu060_get_word(uaecptr addr, bool rmw)
1.1.1.2 root 686: {
687: if (unlikely(is_unaligned(addr, 2)))
1.1.1.4 ! root 688: return mmu_get_word_unaligned(addr, true, rmw);
! 689: return mmu_get_word(addr, true, sz_word, rmw);
! 690: }
! 691: static ALWAYS_INLINE uae_u8 uae_mmu060_get_byte(uaecptr addr, bool rmw)
! 692: {
! 693: return mmu_get_byte(addr, true, sz_byte, rmw);
1.1.1.2 root 694: }
1.1.1.4 ! root 695: static ALWAYS_INLINE void uae_mmu_get_move16(uaecptr addr, uae_u32 *val)
1.1.1.2 root 696: {
1.1.1.4 ! root 697: // move16 is always aligned
! 698: mmu_get_move16(addr, val, true, 16);
1.1.1.2 root 699: }
1.1.1.4 ! root 700:
! 701: static ALWAYS_INLINE void uae_mmu060_put_long(uaecptr addr, uae_u32 val, bool rmw)
1.1.1.2 root 702: {
703: if (unlikely(is_unaligned(addr, 4)))
1.1.1.4 ! root 704: mmu_put_long_unaligned(addr, val, true, rmw);
1.1.1.2 root 705: else
1.1.1.4 ! root 706: mmu_put_long(addr, val, true, sz_long, rmw);
1.1.1.2 root 707: }
1.1.1.4 ! root 708: static ALWAYS_INLINE void uae_mmu060_put_word(uaecptr addr, uae_u16 val, bool rmw)
1.1.1.2 root 709: {
710: if (unlikely(is_unaligned(addr, 2)))
1.1.1.4 ! root 711: mmu_put_word_unaligned(addr, val, true, rmw);
1.1.1.2 root 712: else
1.1.1.4 ! root 713: mmu_put_word(addr, val, true, sz_word, rmw);
! 714: }
! 715: static ALWAYS_INLINE void uae_mmu060_put_byte(uaecptr addr, uae_u8 val, bool rmw)
! 716: {
! 717: mmu_put_byte(addr, val, true, sz_byte, rmw);
! 718: }
! 719: static ALWAYS_INLINE void uae_mmu_put_move16(uaecptr addr, uae_u32 *val)
! 720: {
! 721: // move16 is always aligned
! 722: mmu_put_move16(addr, val, true, 16);
! 723: }
! 724:
! 725: // normal 040
! 726: STATIC_INLINE void put_byte_mmu040 (uaecptr addr, uae_u32 v)
! 727: {
! 728: uae_mmu040_put_byte (addr, v);
! 729: }
! 730: STATIC_INLINE void put_word_mmu040 (uaecptr addr, uae_u32 v)
! 731: {
! 732: uae_mmu040_put_word (addr, v);
! 733: }
! 734: STATIC_INLINE void put_long_mmu040 (uaecptr addr, uae_u32 v)
! 735: {
! 736: uae_mmu040_put_long (addr, v);
! 737: }
! 738: STATIC_INLINE uae_u32 get_byte_mmu040 (uaecptr addr)
! 739: {
! 740: return uae_mmu040_get_byte (addr);
! 741: }
! 742: STATIC_INLINE uae_u32 get_word_mmu040 (uaecptr addr)
! 743: {
! 744: return uae_mmu040_get_word (addr);
! 745: }
! 746: STATIC_INLINE uae_u32 get_long_mmu040 (uaecptr addr)
! 747: {
! 748: return uae_mmu040_get_long (addr);
! 749: }
! 750: // normal 060
! 751: STATIC_INLINE void put_byte_mmu060 (uaecptr addr, uae_u32 v)
! 752: {
! 753: uae_mmu060_put_byte (addr, v, false);
! 754: }
! 755: STATIC_INLINE void put_word_mmu060 (uaecptr addr, uae_u32 v)
! 756: {
! 757: uae_mmu060_put_word (addr, v, false);
! 758: }
! 759: STATIC_INLINE void put_long_mmu060 (uaecptr addr, uae_u32 v)
! 760: {
! 761: uae_mmu060_put_long (addr, v, false);
! 762: }
! 763: STATIC_INLINE uae_u32 get_byte_mmu060 (uaecptr addr)
! 764: {
! 765: return uae_mmu060_get_byte (addr, false);
1.1.1.2 root 766: }
1.1.1.4 ! root 767: STATIC_INLINE uae_u32 get_word_mmu060 (uaecptr addr)
1.1.1.2 root 768: {
1.1.1.4 ! root 769: return uae_mmu060_get_word (addr, false);
! 770: }
! 771: STATIC_INLINE uae_u32 get_long_mmu060 (uaecptr addr)
! 772: {
! 773: return uae_mmu060_get_long (addr, false);
1.1.1.2 root 774: }
775:
1.1.1.4 ! root 776: STATIC_INLINE void get_move16_mmu (uaecptr addr, uae_u32 *v)
1.1.1.2 root 777: {
1.1.1.4 ! root 778: uae_mmu_get_move16 (addr, v);
1.1.1.2 root 779: }
1.1.1.4 ! root 780: STATIC_INLINE void put_move16_mmu (uaecptr addr, uae_u32 *v)
1.1.1.2 root 781: {
1.1.1.4 ! root 782: uae_mmu_put_move16 (addr, v);
1.1.1.2 root 783: }
1.1.1.4 ! root 784:
! 785: // locked rmw 060
! 786: STATIC_INLINE void put_lrmw_byte_mmu060 (uaecptr addr, uae_u32 v)
1.1.1.2 root 787: {
1.1.1.4 ! root 788: uae_mmu_put_lrmw (addr, v, sz_byte, 1);
1.1.1.2 root 789: }
1.1.1.4 ! root 790: STATIC_INLINE void put_lrmw_word_mmu060 (uaecptr addr, uae_u32 v)
1.1.1.2 root 791: {
1.1.1.4 ! root 792: uae_mmu_put_lrmw (addr, v, sz_word, 1);
1.1.1.2 root 793: }
1.1.1.4 ! root 794: STATIC_INLINE void put_lrmw_long_mmu060 (uaecptr addr, uae_u32 v)
1.1.1.2 root 795: {
1.1.1.4 ! root 796: uae_mmu_put_lrmw (addr, v, sz_long, 1);
1.1.1.2 root 797: }
1.1.1.4 ! root 798: STATIC_INLINE uae_u32 get_lrmw_byte_mmu060 (uaecptr addr)
1.1.1.2 root 799: {
1.1.1.4 ! root 800: return uae_mmu_get_lrmw (addr, sz_byte, 1);
1.1.1.2 root 801: }
1.1.1.4 ! root 802: STATIC_INLINE uae_u32 get_lrmw_word_mmu060 (uaecptr addr)
! 803: {
! 804: return uae_mmu_get_lrmw (addr, sz_word, 1);
! 805: }
! 806: STATIC_INLINE uae_u32 get_lrmw_long_mmu060 (uaecptr addr)
! 807: {
! 808: return uae_mmu_get_lrmw (addr, sz_long, 1);
! 809: }
! 810: // normal rmw 060
! 811: STATIC_INLINE void put_rmw_byte_mmu060 (uaecptr addr, uae_u32 v)
! 812: {
! 813: uae_mmu060_put_byte (addr, v, true);
! 814: }
! 815: STATIC_INLINE void put_rmw_word_mmu060 (uaecptr addr, uae_u32 v)
! 816: {
! 817: uae_mmu060_put_word (addr, v, true);
! 818: }
! 819: STATIC_INLINE void put_rmw_long_mmu060 (uaecptr addr, uae_u32 v)
! 820: {
! 821: uae_mmu060_put_long (addr, v, true);
! 822: }
! 823: STATIC_INLINE uae_u32 get_rmw_byte_mmu060 (uaecptr addr)
! 824: {
! 825: return uae_mmu060_get_byte (addr, true);
! 826: }
! 827: STATIC_INLINE uae_u32 get_rmw_word_mmu060 (uaecptr addr)
! 828: {
! 829: return uae_mmu060_get_word (addr, true);
! 830: }
! 831: STATIC_INLINE uae_u32 get_rmw_long_mmu060 (uaecptr addr)
! 832: {
! 833: return uae_mmu060_get_long (addr, true);
! 834: }
! 835: // locked rmw 040
! 836: STATIC_INLINE void put_lrmw_byte_mmu040 (uaecptr addr, uae_u32 v)
! 837: {
! 838: uae_mmu_put_lrmw (addr, v, sz_byte, 0);
! 839: }
! 840: STATIC_INLINE void put_lrmw_word_mmu040 (uaecptr addr, uae_u32 v)
! 841: {
! 842: uae_mmu_put_lrmw (addr, v, sz_word, 0);
! 843: }
! 844: STATIC_INLINE void put_lrmw_long_mmu040 (uaecptr addr, uae_u32 v)
! 845: {
! 846: uae_mmu_put_lrmw (addr, v, sz_long, 0);
! 847: }
! 848: STATIC_INLINE uae_u32 get_lrmw_byte_mmu040 (uaecptr addr)
! 849: {
! 850: return uae_mmu_get_lrmw (addr, sz_byte, 0);
! 851: }
! 852: STATIC_INLINE uae_u32 get_lrmw_word_mmu040 (uaecptr addr)
! 853: {
! 854: return uae_mmu_get_lrmw (addr, sz_word, 0);
! 855: }
! 856: STATIC_INLINE uae_u32 get_lrmw_long_mmu040 (uaecptr addr)
! 857: {
! 858: return uae_mmu_get_lrmw (addr, sz_long, 0);
! 859: }
! 860:
! 861: STATIC_INLINE uae_u32 get_ibyte_mmu040 (int o)
! 862: {
! 863: uae_u32 pc = m68k_getpci () + o;
! 864: return uae_mmu040_get_iword (pc);
! 865: }
! 866: STATIC_INLINE uae_u32 get_iword_mmu040 (int o)
! 867: {
! 868: uae_u32 pc = m68k_getpci () + o;
! 869: return uae_mmu040_get_iword (pc);
! 870: }
! 871: STATIC_INLINE uae_u32 get_ilong_mmu040 (int o)
! 872: {
! 873: uae_u32 pc = m68k_getpci () + o;
! 874: return uae_mmu040_get_ilong (pc);
! 875: }
! 876: STATIC_INLINE uae_u32 next_iword_mmu040 (void)
! 877: {
! 878: uae_u32 pc = m68k_getpci ();
! 879: m68k_incpci (2);
! 880: return uae_mmu040_get_iword (pc);
! 881: }
! 882: STATIC_INLINE uae_u32 next_ilong_mmu040 (void)
! 883: {
! 884: uae_u32 pc = m68k_getpci ();
! 885: m68k_incpci (4);
! 886: return uae_mmu040_get_ilong (pc);
! 887: }
! 888:
! 889: STATIC_INLINE uae_u32 get_ibyte_mmu060 (int o)
1.1.1.2 root 890: {
1.1.1.4 ! root 891: uae_u32 pc = m68k_getpci () + o;
! 892: return uae_mmu060_get_iword (pc);
1.1.1.2 root 893: }
1.1.1.4 ! root 894: STATIC_INLINE uae_u32 get_iword_mmu060 (int o)
1.1.1.2 root 895: {
1.1.1.4 ! root 896: uae_u32 pc = m68k_getpci () + o;
! 897: return uae_mmu060_get_iword (pc);
1.1.1.2 root 898: }
1.1.1.4 ! root 899: STATIC_INLINE uae_u32 get_ilong_mmu060 (int o)
1.1.1.2 root 900: {
1.1.1.4 ! root 901: uae_u32 pc = m68k_getpci () + o;
! 902: return uae_mmu060_get_ilong (pc);
1.1.1.2 root 903: }
1.1.1.4 ! root 904: STATIC_INLINE uae_u32 next_iword_mmu060 (void)
1.1.1.2 root 905: {
1.1.1.4 ! root 906: uae_u32 pc = m68k_getpci ();
1.1.1.2 root 907: m68k_incpci (2);
1.1.1.4 ! root 908: return uae_mmu060_get_iword (pc);
1.1.1.2 root 909: }
1.1.1.4 ! root 910: STATIC_INLINE uae_u32 next_ilong_mmu060 (void)
1.1.1.2 root 911: {
1.1.1.4 ! root 912: uae_u32 pc = m68k_getpci ();
1.1.1.2 root 913: m68k_incpci (4);
1.1.1.4 ! root 914: return uae_mmu060_get_ilong (pc);
1.1.1.2 root 915: }
916:
1.1.1.4 ! root 917: extern void flush_mmu040 (uaecptr, int);
! 918: extern void m68k_do_rts_mmu040 (void);
! 919: extern void m68k_do_rte_mmu040 (uaecptr a7);
! 920: extern void m68k_do_bsr_mmu040 (uaecptr oldpc, uae_s32 offset);
! 921:
! 922: extern void flush_mmu060 (uaecptr, int);
! 923: extern void m68k_do_rts_mmu060 (void);
! 924: extern void m68k_do_rte_mmu060 (uaecptr a7);
! 925: extern void m68k_do_bsr_mmu060 (uaecptr oldpc, uae_s32 offset);
1.1.1.2 root 926:
927: #endif /* CPUMMU_H */
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