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1.1 root 1: /*
2: * UAE - The Un*x Amiga Emulator
3: *
4: * custom chip support
5: *
6: * (c) 1995 Bernd Schmidt
7: */
8:
1.1.1.5 root 9: #ifndef UAE_CUSTOM_H
10: #define UAE_CUSTOM_H
11:
12: #include "uae/types.h"
13: #include "machdep/rpt.h"
1.1 root 14:
15: /* These are the masks that are ORed together in the chipset_mask option.
16: * If CSMASK_AGA is set, the ECS bits are guaranteed to be set as well. */
17: #define CSMASK_ECS_AGNUS 1
18: #define CSMASK_ECS_DENISE 2
19: #define CSMASK_AGA 4
20: #define CSMASK_MASK (CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE | CSMASK_AGA)
21:
22: uae_u32 get_copper_address (int copno);
23:
24: extern int custom_init (void);
1.1.1.4 root 25: extern void custom_reset (bool hardreset, bool keyboardreset);
1.1 root 26: extern int intlev (void);
27: extern void dumpcustom (void);
28: extern void uae_reset (int hardreset);
29:
30: extern void do_copper (void);
31:
32: extern void notice_new_xcolors (void);
1.1.1.7 ! root 33: extern void notice_screen_contents_lost(int monid);
1.1 root 34: extern void init_row_map (void);
1.1.1.4 root 35: extern void init_hz_normal (void);
1.1 root 36: extern void init_custom (void);
37:
1.1.1.7 ! root 38: extern void set_picasso_hack_rate(int hz);
1.1 root 39:
40: /* Set to 1 to leave out the current frame in average frame time calculation.
1.1.1.5 root 41: * Useful if the debugger was active. */
1.1 root 42: extern int bogusframe;
1.1.1.7 ! root 43: extern unsigned long int hsync_counter, vsync_counter;
1.1 root 44:
45: extern uae_u16 dmacon;
46: extern uae_u16 intena, intreq, intreqr;
47:
48: extern int current_hpos (void);
49: extern int vpos;
50:
51: extern int n_frames;
52:
53: STATIC_INLINE int dmaen (unsigned int dmamask)
54: {
1.1.1.5 root 55: return (dmamask & dmacon) && (dmacon & 0x200);
1.1 root 56: }
57:
58:
59: #define SPCFLAG_STOP 2
60: #define SPCFLAG_COPPER 4
61: #define SPCFLAG_INT 8
62: //#define SPCFLAG_BRK 16
1.1.1.5 root 63: //#define SPCFLAG_UAEINT 32
1.1 root 64: //#define SPCFLAG_TRACE 64
65: //#define SPCFLAG_DOTRACE 128
66: //#define SPCFLAG_DOINT 256 /* arg, JIT fails without this.. */
67: #define SPCFLAG_BLTNASTY 512
68: //#define SPCFLAG_EXEC 1024
69: #define SPCFLAG_ACTION_REPLAY 2048
70: #define SPCFLAG_TRAP 4096 /* enforcer-hack */
71: //#define SPCFLAG_MODE_CHANGE 8192
72: #ifdef JIT
73: #define SPCFLAG_END_COMPILE 16384
74: #endif
1.1.1.4 root 75: #define SPCFLAG_CHECK 32768
1.1 root 76:
77: extern uae_u16 adkcon;
78:
79: extern unsigned int joy0dir, joy1dir;
80: extern int joy0button, joy1button;
81:
1.1.1.5 root 82: extern void INTREQ(uae_u16);
83: extern bool INTREQ_0(uae_u16);
84: extern void INTREQ_f(uae_u16);
85: extern void send_interrupt(int num, int delay);
86: extern void rethink_uae_int(void);
87: extern uae_u16 INTREQR(void);
1.1 root 88:
89:
90: #define DMA_AUD0 0x0001
91: #define DMA_AUD1 0x0002
92: #define DMA_AUD2 0x0004
93: #define DMA_AUD3 0x0008
94: #define DMA_DISK 0x0010
95: #define DMA_SPRITE 0x0020
96: #define DMA_BLITTER 0x0040
97: #define DMA_COPPER 0x0080
98: #define DMA_BITPLANE 0x0100
99: #define DMA_MASTER 0x0200
100: #define DMA_BLITPRI 0x0400
101:
1.1.1.5 root 102: #define CYCLE_REFRESH 1
103: #define CYCLE_STROBE 2
104: #define CYCLE_MISC 3
105: #define CYCLE_SPRITE 4
106: #define CYCLE_COPPER 5
107: #define CYCLE_BLITTER 6
108: #define CYCLE_CPU 7
109: #define CYCLE_CPUNASTY 8
110: #define CYCLE_COPPER_SPECIAL 0x10
111:
112: #define CYCLE_MASK 0x0f
1.1 root 113:
114: #ifdef AGA
115: /* AGA mode color lookup tables */
116: extern unsigned int xredcolors[256], xgreencolors[256], xbluecolors[256];
117: #endif
118: extern int xredcolor_s, xredcolor_b, xredcolor_m;
119: extern int xgreencolor_s, xgreencolor_b, xgreencolor_m;
120: extern int xbluecolor_s, xbluecolor_b, xbluecolor_m;
121:
122: #define RES_LORES 0
123: #define RES_HIRES 1
124: #define RES_SUPERHIRES 2
125: #define RES_MAX 2
126: #define VRES_NONDOUBLE 0
127: #define VRES_DOUBLE 1
1.1.1.5 root 128: #define VRES_QUAD 2
1.1 root 129: #define VRES_MAX 1
130:
131: /* calculate shift depending on resolution (replaced "decided_hires ? 4 : 8") */
132: #define RES_SHIFT(res) ((res) == RES_LORES ? 8 : (res) == RES_HIRES ? 4 : 2)
133:
134: /* get resolution from bplcon0 */
135: #if AMIGA_ONLY
136: STATIC_INLINE int GET_RES_DENISE (uae_u16 con0)
137: {
1.1.1.5 root 138: if (!(currprefs.chipset_mask & CSMASK_ECS_DENISE))
139: con0 &= ~0x40; // SUPERHIRES
140: return ((con0) & 0x40) ? RES_SUPERHIRES : ((con0) & 0x8000) ? RES_HIRES : RES_LORES;
1.1 root 141: }
142: STATIC_INLINE int GET_RES_AGNUS (uae_u16 con0)
143: {
1.1.1.5 root 144: if (!(currprefs.chipset_mask & CSMASK_ECS_AGNUS))
145: con0 &= ~0x40; // SUPERHIRES
146: return ((con0) & 0x40) ? RES_SUPERHIRES : ((con0) & 0x8000) ? RES_HIRES : RES_LORES;
1.1 root 147: }
148: #endif // AMIGA_ONLY
149:
150: /* get sprite width from FMODE */
151: #define GET_SPRITEWIDTH(FMODE) ((((FMODE) >> 2) & 3) == 3 ? 64 : (((FMODE) >> 2) & 3) == 0 ? 16 : 32)
152: /* Compute the number of bitplanes from a value written to BPLCON0 */
153: STATIC_INLINE int GET_PLANES(uae_u16 bplcon0)
154: {
1.1.1.5 root 155: if ((bplcon0 & 0x0010) && (bplcon0 & 0x7000))
156: return 0; // >8 planes = 0 planes
157: if (bplcon0 & 0x0010)
158: return 8; // AGA 8-planes bit
159: return (bplcon0 >> 12) & 7; // normal planes bits
1.1 root 160: }
161:
162: extern void fpscounter_reset (void);
163: extern unsigned long idletime;
1.1.1.6 root 164: extern int lightpen_x[2], lightpen_y[2];
165: extern int lightpen_cx[2], lightpen_cy[2], lightpen_active, lightpen_enabled, lightpen_enabled2;
1.1 root 166:
167: struct customhack {
1.1.1.5 root 168: uae_u16 v;
169: int vpos, hpos;
1.1 root 170: };
171: void customhack_put (struct customhack *ch, uae_u16 v, int hpos);
172: uae_u16 customhack_get (struct customhack *ch, int hpos);
173: extern void alloc_cycle_ext (int, int);
174: extern bool ispal (void);
175: extern int inprec_open(char *fname, int record);
176: extern void sleep_millis (int ms);
177:
1.1.1.2 root 178: /* referred by prefetch.h */
179: extern uae_u32 wait_cpu_cycle_read (uaecptr addr, int mode);
180: extern void wait_cpu_cycle_write (uaecptr addr, int mode, uae_u32 v);
181: extern uae_u32 wait_cpu_cycle_read_ce020 (uaecptr addr, int mode);
182: extern void wait_cpu_cycle_write_ce020 (uaecptr addr, int mode, uae_u32 v);
183:
1.1.1.5 root 184: #endif /* UAE_CUSTOM_H */
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