Annotation of hatari/src/cpu/debug.h, revision 1.1.1.4

1.1       root        1:  /*
                      2:   * UAE - The Un*x Amiga Emulator
                      3:   *
                      4:   * Debugger
                      5:   *
                      6:   * (c) 1995 Bernd Schmidt
                      7:   *
                      8:   */
                      9: 
1.1.1.2   root       10: #ifndef UAE_DEBUG_H
                     11: #define UAE_DEBUG_H
                     12: 
                     13: #include "uae/types.h"
                     14: 
1.1       root       15: #ifdef DEBUGGER
                     16: 
                     17: #define        MAX_HIST 500
1.1.1.4 ! root       18: #define MAX_LINEWIDTH 10000
1.1       root       19: 
                     20: extern int debugging;
                     21: extern int memwatch_enabled;
                     22: extern int exception_debugging;
                     23: extern int debug_copper;
1.1.1.2   root       24: extern int debug_dma, debug_heatmap;
1.1       root       25: extern int debug_sprite_mask;
                     26: extern int debug_bpl_mask, debug_bpl_mask_one;
                     27: extern int debugger_active;
                     28: extern int debug_illegal;
                     29: extern uae_u64 debug_illegal_mask;
                     30: 
                     31: extern void debug (void);
                     32: extern void debugger_change (int mode);
1.1.1.4 ! root       33: extern void activate_debugger(void);
        !            34: extern void activate_debugger_new(void);
        !            35: extern void activate_debugger_new_pc(uaecptr pc, int len);
1.1       root       36: extern void deactivate_debugger (void);
                     37: extern int notinrom (void);
                     38: extern const TCHAR *debuginfo (int);
                     39: extern void record_copper (uaecptr addr, uae_u16 word1, uae_u16 word2, int hpos, int vpos);
                     40: extern void record_copper_blitwait (uaecptr addr, int hpos, int vpos);
                     41: extern void record_copper_reset (void);
                     42: extern int mmu_init (int, uaecptr,uaecptr);
                     43: extern void mmu_do_hit (void);
                     44: extern void dump_aga_custom (void);
                     45: extern void memory_map_dump (void);
                     46: extern void debug_help (void);
                     47: extern uaecptr dumpmem2 (uaecptr addr, TCHAR *out, int osize);
                     48: extern void update_debug_info (void);
                     49: extern int instruction_breakpoint (TCHAR **c);
                     50: extern int debug_bankchange (int);
                     51: extern void log_dma_record (void);
                     52: extern void debug_parser (const TCHAR *cmd, TCHAR *out, uae_u32 outsize);
                     53: extern void mmu_disasm (uaecptr pc, int lines);
                     54: extern int debug_read_memory_16 (uaecptr addr);
                     55: extern int debug_peek_memory_16 (uaecptr addr);
                     56: extern int debug_read_memory_8 (uaecptr addr);
                     57: extern int debug_peek_memory_8 (uaecptr addr);
                     58: extern int debug_write_memory_16 (uaecptr addr, uae_u16 v);
                     59: extern int debug_write_memory_8 (uaecptr addr, uae_u8 v);
                     60: extern bool debug_enforcer(void);
1.1.1.4 ! root       61: extern uae_u8 *get_real_address_debug(uaecptr addr);
1.1.1.3   root       62: extern int debug_safe_addr(uaecptr addr, int size);
1.1       root       63: 
                     64: #define BREAKPOINT_TOTAL 20
1.1.1.2   root       65: #define BREAKPOINT_REG_Dx 0
                     66: #define BREAKPOINT_REG_Ax 8
                     67: #define BREAKPOINT_REG_PC 16
                     68: #define BREAKPOINT_REG_USP 17
                     69: #define BREAKPOINT_REG_MSP 18
                     70: #define BREAKPOINT_REG_ISP 19
                     71: #define BREAKPOINT_REG_VBR 20
                     72: #define BREAKPOINT_REG_SR 21
                     73: #define BREAKPOINT_REG_CCR 22
                     74: #define BREAKPOINT_REG_CACR 23
                     75: #define BREAKPOINT_REG_CAAR 24
                     76: #define BREAKPOINT_REG_SFC 25
                     77: #define BREAKPOINT_REG_DFC 26
                     78: #define BREAKPOINT_REG_TC 27
                     79: #define BREAKPOINT_REG_ITT0 28
                     80: #define BREAKPOINT_REG_ITT1 29
                     81: #define BREAKPOINT_REG_DTT0 30
                     82: #define BREAKPOINT_REG_DTT1 31
                     83: #define BREAKPOINT_REG_BUSC 32
                     84: #define BREAKPOINT_REG_PCR 33
                     85: #define BREAKPOINT_REG_END 34
                     86: 
                     87: #define BREAKPOINT_CMP_EQUAL 0
                     88: #define BREAKPOINT_CMP_NEQUAL 1
                     89: #define BREAKPOINT_CMP_SMALLER_EQUAL 2
                     90: #define BREAKPOINT_CMP_LARGER_EQUAL 3
                     91: #define BREAKPOINT_CMP_SMALLER 2
                     92: #define BREAKPOINT_CMP_LARGER 3
                     93: #define BREAKPOINT_CMP_RANGE 4
                     94: #define BREAKPOINT_CMP_NRANGE 5
                     95: 
1.1       root       96: struct breakpoint_node {
1.1.1.2   root       97:        uae_u32 value1;
                     98:        uae_u32 value2;
                     99:        uae_u32 mask;
                    100:        int type;
                    101:        int oper;
1.1       root      102:     int enabled;
                    103: };
                    104: extern struct breakpoint_node bpnodes[BREAKPOINT_TOTAL];
                    105: 
1.1.1.2   root      106: #define MW_MASK_CPU_I                  0x00000001
                    107: #define MW_MASK_CPU_D_R                        0x00000002
                    108: #define MW_MASK_CPU_D_W                        0x00000004
                    109: #define MW_MASK_BLITTER_A              0x00000008
                    110: #define MW_MASK_BLITTER_B              0x00000010
                    111: #define MW_MASK_BLITTER_C              0x00000020
                    112: #define MW_MASK_BLITTER_D_N            0x00000040
                    113: #define MW_MASK_BLITTER_D_L            0x00000080
                    114: #define MW_MASK_BLITTER_D_F            0x00000100
                    115: #define MW_MASK_COPPER                 0x00000200
                    116: #define MW_MASK_DISK                   0x00000400
                    117: #define MW_MASK_AUDIO_0                        0x00000800
                    118: #define MW_MASK_AUDIO_1                        0x00001000
                    119: #define MW_MASK_AUDIO_2                        0x00002000
                    120: #define MW_MASK_AUDIO_3                        0x00004000
                    121: #define MW_MASK_BPL_0                  0x00008000
                    122: #define MW_MASK_BPL_1                  0x00010000
                    123: #define MW_MASK_BPL_2                  0x00020000
                    124: #define MW_MASK_BPL_3                  0x00040000
                    125: #define MW_MASK_BPL_4                  0x00080000
                    126: #define MW_MASK_BPL_5                  0x00100000
                    127: #define MW_MASK_BPL_6                  0x00200000
                    128: #define MW_MASK_BPL_7                  0x00400000
                    129: #define MW_MASK_SPR_0                  0x00800000
                    130: #define MW_MASK_SPR_1                  0x01000000
                    131: #define MW_MASK_SPR_2                  0x02000000
                    132: #define MW_MASK_SPR_3                  0x04000000
                    133: #define MW_MASK_SPR_4                  0x08000000
                    134: #define MW_MASK_SPR_5                  0x10000000
                    135: #define MW_MASK_SPR_6                  0x20000000
                    136: #define MW_MASK_SPR_7                  0x40000000
                    137: #define MW_MASK_NONE                   0x80000000
                    138: #define MW_MASK_ALL                            (MW_MASK_NONE - 1)
1.1       root      139: 
                    140: #define MEMWATCH_TOTAL 20
                    141: struct memwatch_node {
                    142:        uaecptr addr;
                    143:        int size;
                    144:        int rwi;
                    145:        uae_u32 val, val_mask, access_mask;
                    146:        int val_size, val_enabled;
                    147:        int mustchange;
                    148:        uae_u32 modval;
                    149:        int modval_written;
                    150:        int frozen;
                    151:        uae_u32 reg;
                    152:        uaecptr pc;
                    153: };
                    154: extern struct memwatch_node mwnodes[MEMWATCH_TOTAL];
                    155: 
                    156: extern void memwatch_dump2 (TCHAR *buf, int bufsize, int num);
                    157: 
                    158: uae_u16 debug_wgetpeekdma_chipram (uaecptr addr, uae_u32 v, uae_u32 mask, int reg);
                    159: uae_u16 debug_wputpeekdma_chipram (uaecptr addr, uae_u32 v, uae_u32 mask, int reg);
                    160: uae_u16 debug_wputpeekdma_chipset (uaecptr addr, uae_u32 v, uae_u32 mask, int reg);
                    161: void debug_lgetpeek (uaecptr addr, uae_u32 v);
                    162: void debug_wgetpeek (uaecptr addr, uae_u32 v);
                    163: void debug_bgetpeek (uaecptr addr, uae_u32 v);
                    164: void debug_bputpeek (uaecptr addr, uae_u32 v);
                    165: void debug_wputpeek (uaecptr addr, uae_u32 v);
                    166: void debug_lputpeek (uaecptr addr, uae_u32 v);
                    167: 
                    168: uae_u32 get_byte_debug (uaecptr addr);
                    169: uae_u32 get_word_debug (uaecptr addr);
                    170: uae_u32 get_long_debug (uaecptr addr);
                    171: uae_u32 get_ilong_debug (uaecptr addr);
                    172: uae_u32 get_iword_debug (uaecptr addr);
                    173: 
1.1.1.3   root      174: uae_u32 get_byte_cache_debug(uaecptr addr, bool *cached);
                    175: uae_u32 get_word_cache_debug(uaecptr addr, bool *cached);
                    176: uae_u32 get_long_cache_debug(uaecptr addr, bool *cached);
                    177: uae_u32 get_iword_cache_debug(uaecptr addr, bool *cached);
                    178: uae_u32 get_ilong_cache_debug(uaecptr addr, bool *cached);
1.1       root      179: 
                    180: enum debugtest_item { DEBUGTEST_BLITTER, DEBUGTEST_KEYBOARD, DEBUGTEST_FLOPPY, DEBUGTEST_MAX };
                    181: void debugtest (enum debugtest_item, const TCHAR *, ...);
                    182: 
                    183: struct dma_rec
                    184: {
                    185:     uae_u16 reg;
                    186:     uae_u32 dat;
                    187:     uae_u32 addr;
                    188:     uae_u16 evt;
1.1.1.3   root      189:     uae_s16 type;
                    190:        uae_u16 extra;
1.1       root      191:        uae_s8 intlev;
                    192: };
                    193: 
                    194: #define DMA_EVENT_BLITIRQ 1
                    195: #define DMA_EVENT_BLITNASTY 2
                    196: #define DMA_EVENT_BLITSTARTFINISH 4
                    197: #define DMA_EVENT_BPLFETCHUPDATE 8
                    198: #define DMA_EVENT_COPPERWAKE 16
                    199: #define DMA_EVENT_CPUIRQ 32
                    200: #define DMA_EVENT_INTREQ 64
                    201: #define DMA_EVENT_COPPERWANTED 128
1.1.1.3   root      202: #define DMA_EVENT_NOONEGETS 256
                    203: #define DMA_EVENT_SPECIAL 32768
1.1       root      204: 
                    205: #define DMARECORD_REFRESH 1
1.1.1.3   root      206: #define DMARECORD_CPU 2
                    207: #define DMARECORD_COPPER 3
                    208: #define DMARECORD_AUDIO 4
                    209: #define DMARECORD_BLITTER 5
                    210: #define DMARECORD_BITPLANE 6
                    211: #define DMARECORD_SPRITE 7
                    212: #define DMARECORD_DISK 8
                    213: #define DMARECORD_MAX 9
1.1.1.2   root      214: 
1.1.1.3   root      215: extern struct dma_rec *record_dma(uae_u16 reg, uae_u16 dat, uae_u32 addr, int hpos, int vpos, int type, int extra);
                    216: extern void record_dma_replace(int hpos, int vpos, int type, int extra);
1.1.1.2   root      217: extern void record_dma_reset(void);
                    218: extern void record_dma_event(int evt, int hpos, int vpos);
                    219: extern void debug_draw(uae_u8 *buf, int bpp, int line, int width, int height, uae_u32 *xredcolors, uae_u32 *xgreencolors, uae_u32 *xbluescolors);
1.1       root      220: 
                    221: #else
                    222: 
                    223: STATIC_INLINE void activate_debugger (void) { };
                    224: #ifdef WINUAE_FOR_HATARI
1.1.1.4 ! root      225: #define MAX_LINEWIDTH 150
1.1.1.2   root      226: 
1.1       root      227: uae_u32 get_byte_debug (uaecptr addr);
                    228: uae_u32 get_word_debug (uaecptr addr);
                    229: uae_u32 get_long_debug (uaecptr addr);
                    230: uae_u32 get_ilong_debug (uaecptr addr);
                    231: uae_u32 get_iword_debug (uaecptr addr);
                    232: extern void mmu_do_hit (void);
                    233: #endif
                    234: 
1.1.1.2   root      235: #endif /* DEBUGGER */
                    236: 
                    237: #endif /* UAE_DEBUG_H */

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