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1.1.1.4 root 1: /*
2: * UAE - The Un*x Amiga Emulator
3: *
4: * MC68000 emulation generator
5: *
6: * This is a fairly stupid program that generates a lot of case labels that
7: * can be #included in a switch statement.
8: * As an alternative, it can generate functions that handle specific
9: * MC68000 instructions, plus a prototype header file and a function pointer
10: * array to look up the function for an opcode.
11: * Error checking is bad, an illegal table68k file will cause the program to
12: * call abort().
13: * The generated code is sometimes sub-optimal, an optimizing compiler should
14: * take care of this.
15: *
16: * The source for the insn timings is Markt & Technik's Amiga Magazin 8/1992.
17: *
18: * Copyright 1995, 1996, 1997, 1998, 1999, 2000 Bernd Schmidt
19: */
20:
21: #include "sysconfig.h"
22: #include "sysdeps.h"
23: #include <ctype.h>
24: #include <string.h>
25:
26: #include "readcpu.h"
1.1.1.7 ! root 27:
! 28: char *ua (const char *s) {
! 29: return strdup(s);
! 30: }
1.1.1.4 root 31:
32: #define BOOL_TYPE "int"
33: /* Define the minimal 680x0 where NV flags are not affected by xBCD instructions. */
34: #define xBCD_KEEPS_NV_FLAGS 4
35:
36: static FILE *headerfile;
37: static FILE *stblfile;
38:
39: static int using_prefetch, using_indirect, using_mmu;
1.1.1.7 ! root 40: static int using_prefetch_020, using_ce020;
1.1.1.4 root 41: static int using_exception_3;
1.1.1.7 ! root 42: static int using_bus_error;
1.1.1.4 root 43: static int using_ce;
1.1.1.7 ! root 44: static int using_tracer;
! 45: static int using_waitstates;
! 46: static int using_simple_cycles;
1.1.1.4 root 47: static int cpu_level;
48: static int count_read, count_write, count_cycles, count_ncycles;
1.1.1.7 ! root 49: static int count_cycles_ce020;
1.1.1.4 root 50: static int count_read_ea, count_write_ea, count_cycles_ea;
1.1.1.5 root 51: static const char *mmu_postfix;
1.1.1.7 ! root 52: static int memory_cycle_cnt;
! 53: static int did_prefetch;
! 54: static int ipl_fetched;
1.1.1.4 root 55:
56: static int optimized_flags;
57:
1.1.1.7 ! root 58: #ifdef WINUAE_FOR_HATARI
! 59: long nCurInstrCycPos; /* Hatari only : Stores where we have to patch in the current cycles value */
! 60: #endif
1.1.1.4 root 61:
62: #define GF_APDI 1
63: #define GF_AD8R 2
64: #define GF_PC8R 4
65: #define GF_AA 7
66: #define GF_NOREFILL 8
67: #define GF_PREFETCH 16
68: #define GF_FC 32
69: #define GF_MOVE 64
1.1.1.7 ! root 70: #define GF_IR2IRC 128
! 71: #define GF_LRMW 256
! 72: #define GF_NOFAULTPC 512
! 73: #define GF_RMW 1024
! 74: #define GF_OPCE020 2048
1.1.1.4 root 75:
76: /* For the current opcode, the next lower level that will have different code.
77: * Initialized to -1 for each opcode. If it remains unchanged, indicates we
78: * are done with that opcode. */
79: static int next_cpu_level;
80:
81: static int *opcode_map;
82: static int *opcode_next_clev;
83: static int *opcode_last_postfix;
84: static unsigned long *counts;
85: static int generate_stbl;
1.1.1.7 ! root 86: static int mmufixupcnt;
! 87: static int mmufixupstate;
! 88: static int disp020cnt;
! 89: static bool candormw;
! 90: static bool genastore_done;
! 91: static char rmw_varname[100];
1.1.1.4 root 92:
93: #define GENA_GETV_NO_FETCH 0
94: #define GENA_GETV_FETCH 1
95: #define GENA_GETV_FETCH_ALIGN 2
96: #define GENA_MOVEM_DO_INC 0
97: #define GENA_MOVEM_NO_INC 1
98: #define GENA_MOVEM_MOVE16 2
99:
1.1.1.7 ! root 100: static const char *srcl, *dstl;
! 101: static const char *srcw, *dstw;
! 102: static const char *srcb, *dstb;
! 103: static const char *srcblrmw, *srcwlrmw, *srcllrmw;
! 104: static const char *dstblrmw, *dstwlrmw, *dstllrmw;
! 105: static const char *srcbrmw, *srcwrmw, *srclrmw;
! 106: static const char *dstbrmw, *dstwrmw, *dstlrmw;
! 107: static const char *prefetch_long, *prefetch_word;
! 108: static const char *srcli, *srcwi, *srcbi, *nextl, *nextw;
! 109: static const char *srcld, *dstld;
! 110: static const char *srcwd, *dstwd;
! 111: static const char *do_cycles, *disp000, *disp020, *getpc;
! 112:
! 113: #define fetchmode_fea 1
! 114: #define fetchmode_cea 2
! 115: #define fetchmode_fiea 3
! 116: #define fetchmode_ciea 4
! 117: #define fetchmode_jea 5
! 118:
! 119: NORETURN static void term (void)
! 120: {
! 121: printf("Abort!\n");
! 122: abort ();
! 123: }
! 124: NORETURN static void term_err (const char *err)
! 125: {
! 126: printf ("%s\n", err);
! 127: term ();
! 128: }
1.1.1.4 root 129:
130: static void read_counts (void)
131: {
132: FILE *file;
1.1.1.7 ! root 133: unsigned int opcode, count, total;
1.1.1.4 root 134: char name[20];
135: int nr = 0;
136: memset (counts, 0, 65536 * sizeof *counts);
137:
138: count = 0;
139: file = fopen ("frequent.68k", "r");
140: if (file) {
1.1.1.7 ! root 141: if (fscanf (file, "Total: %u\n", &total) == 0) {
! 142: abort ();
1.1.1.6 root 143: }
1.1.1.7 ! root 144: while (fscanf (file, "%x: %u %s\n", &opcode, &count, name) == 3) {
1.1.1.4 root 145: opcode_next_clev[nr] = 5;
146: opcode_last_postfix[nr] = -1;
147: opcode_map[nr++] = opcode;
148: counts[opcode] = count;
149: }
150: fclose (file);
151: }
152: if (nr == nr_cpuop_funcs)
153: return;
154: for (opcode = 0; opcode < 0x10000; opcode++) {
155: if (table68k[opcode].handler == -1 && table68k[opcode].mnemo != i_ILLG
156: && counts[opcode] == 0)
157: {
158: opcode_next_clev[nr] = 5;
159: opcode_last_postfix[nr] = -1;
160: opcode_map[nr++] = opcode;
161: counts[opcode] = count;
162: }
163: }
164: if (nr != nr_cpuop_funcs)
1.1.1.7 ! root 165: term ();
1.1.1.4 root 166: }
167:
168: static char endlabelstr[80];
169: static int endlabelno = 0;
170: static int need_endlabel;
1.1.1.7 ! root 171: static int genamode_cnt, genamode8r_offset[2];;
1.1.1.4 root 172:
173: static int n_braces, limit_braces;
1.1.1.7 ! root 174: static int m68k_pc_offset, m68k_pc_offset_old;
! 175: static int m68k_pc_total;
! 176: static int branch_inst;
1.1.1.4 root 177: static int insn_n_cycles, insn_n_cycles020;
1.1.1.7 ! root 178: static int ir2irc;
! 179:
! 180: static int tail_ce020, total_ce020, head_in_ea_ce020;
! 181: static bool head_ce020_cycs_done, tail_ce020_done;
! 182: static int subhead_ce020;
! 183: static struct instr *curi_ce020;
! 184: static bool no_prefetch_ce020;
! 185: static bool got_ea_ce020;
1.1.1.4 root 186:
187: static void fpulimit (void)
188: {
189: if (limit_braces)
190: return;
191: printf ("\n#ifdef FPUEMU\n");
192: limit_braces = n_braces;
193: n_braces = 0;
194: }
1.1.1.7 ! root 195: #ifndef WINUAE_FOR_HATARI
! 196: static void cpulimit (void)
! 197: {
! 198: printf ("#ifndef CPUEMU_68000_ONLY\n");
! 199: }
! 200: #endif
1.1.1.4 root 201:
1.1.1.7 ! root 202: static int s_count_read, s_count_write, s_count_cycles, s_count_ncycles;
! 203:
! 204: static void push_ins_cnt(void)
1.1.1.4 root 205: {
1.1.1.7 ! root 206: s_count_read = count_read;
! 207: s_count_write = count_write;
! 208: s_count_cycles = count_cycles;
! 209: s_count_ncycles = count_ncycles;
! 210: }
! 211: static void pop_ins_cnt(void)
! 212: {
! 213: count_read = s_count_read;
! 214: count_write = s_count_write;
! 215: count_cycles = s_count_cycles;
! 216: count_ncycles = s_count_ncycles;
! 217: }
! 218:
! 219: static bool isce020(void)
! 220: {
! 221: if (!using_ce020)
! 222: return false;
! 223: if (using_ce020 >= 3)
! 224: return false;
! 225: return true;
! 226: }
! 227: static bool isprefetch020(void)
! 228: {
! 229: if (!using_prefetch_020)
! 230: return false;
! 231: if (using_prefetch_020 >= 3)
! 232: return false;
! 233: return true;
! 234: }
! 235:
! 236: static void addcycles_ce020_2 (int cycles, const char *s)
! 237: {
! 238: if (!isce020())
1.1.1.4 root 239: return;
1.1.1.7 ! root 240: if (cycles > 0) {
! 241: if (s == NULL)
! 242: printf ("\t%s (%d);\n", do_cycles, cycles);
! 243: else
! 244: printf ("\t%s (%d); /* %s */\n", do_cycles, cycles, s);
! 245: }
! 246: count_cycles += cycles;
! 247: count_cycles_ce020 += cycles;
! 248: }
! 249: static void addcycles_ce020 (int cycles)
! 250: {
! 251: addcycles_ce020_2 (cycles, NULL);
! 252: }
1.1.1.4 root 253:
1.1.1.7 ! root 254: static void get_prefetch_020 (void)
! 255: {
! 256: if (!isprefetch020() || no_prefetch_ce020)
! 257: return;
! 258: printf ("\tregs.irc = %s (%d);\n", prefetch_word, m68k_pc_offset);
! 259: }
! 260: static void get_prefetch_020_0 (void)
! 261: {
! 262: if (!isprefetch020() || no_prefetch_ce020)
! 263: return;
! 264: printf ("\tregs.irc = %s (0);\n", prefetch_word);
! 265: }
! 266:
! 267: static void get_prefetch_020_continue(void)
! 268: {
! 269: if (!isprefetch020())
! 270: return;
! 271: if (using_ce020)
! 272: printf("\tcontinue_ce020_prefetch();\n");
! 273: else
! 274: printf ("\tcontinue_020_prefetch();\n");
! 275: }
! 276:
! 277: static void returntail (bool iswrite)
! 278: {
! 279: if (!isce020()) {
! 280: if (isprefetch020()) {
! 281: if (!tail_ce020_done) {
! 282: if (!did_prefetch)
! 283: get_prefetch_020 ();
! 284: did_prefetch = 1;
! 285: tail_ce020_done = true;
! 286: }
1.1.1.4 root 287: }
1.1.1.7 ! root 288: return;
! 289: }
! 290: if (!tail_ce020_done) {
! 291: total_ce020 -= 2;
! 292: #if 0
! 293: if (iswrite) {
! 294: printf("\t/* C - %d = %d */\n", memory_cycle_cnt, total_ce020 - memory_cycle_cnt);
! 295: total_ce020 -= memory_cycle_cnt;
! 296: } else {
! 297: printf("\t/* C = %d */\n", total_ce020);
! 298: }
! 299: #endif
! 300: if (0 && total_ce020 <= 0) {
! 301: printf ("\t/* C was zero */\n");
! 302: total_ce020 = 1;
! 303: }
! 304: if (!did_prefetch)
! 305: get_prefetch_020 ();
! 306: if (total_ce020 > 0)
! 307: addcycles_ce020 (total_ce020);
! 308:
! 309: //printf ("\tregs.irc = %s;\n", prefetch_word);
! 310: if (0 && total_ce020 >= 2) {
! 311: printf ("\top_cycles = get_cycles () - op_cycles;\n");
! 312: printf ("\top_cycles /= cpucycleunit;\n");
! 313: printf ("\tif (op_cycles < %d) {\n", total_ce020);
! 314: printf ("\t\tdo_cycles_ce020 ((%d) - op_cycles);\n", total_ce020);
! 315: printf ("\t}\n");
! 316: }
! 317: #if 0
! 318: if (tail_ce020 > 0) {
! 319: printf ("\tregs.ce020_tail = %d * cpucycleunit;\n", tail_ce020);
! 320: printf ("\tregs.ce020_tail_cycles = get_cycles () + regs.ce020_tail;\n");
! 321: } else {
! 322: printf ("\tregs.ce020_tail = 0;\n");
1.1.1.4 root 323: }
1.1.1.7 ! root 324: #endif
! 325: tail_ce020_done = true;
! 326: }
! 327: }
! 328:
1.1.1.4 root 329:
1.1.1.7 ! root 330: static void returncycles (const char *s, int cycles)
! 331: {
! 332: if (using_ce || using_ce020) {
! 333: #if 0
! 334: if (tail_ce020 == 0)
! 335: printf ("\tregs.ce020memcycles -= 2 * cpucycleunit; /* T=0 */ \n");
! 336: else if (tail_ce020 == 1)
! 337: printf ("\tregs.ce020memcycles -= 1 * cpucycleunit; /* T=1 */ \n");
! 338: else if (tail_ce020 == 2)
! 339: printf ("\tregs.ce020memcycles -= 0 * cpucycleunit; /* T=2 */\n");
! 340: #endif
! 341: printf ("%sreturn;\n", s);
! 342: return;
1.1.1.4 root 343: }
1.1.1.7 ! root 344: if (using_simple_cycles)
! 345: printf ("%sreturn %d * CYCLE_UNIT / 2 + count_cycles;\n", s, cycles);
1.1.1.4 root 346: else
347: printf ("%sreturn %d * CYCLE_UNIT / 2;\n", s, cycles);
348: }
349:
1.1.1.7 ! root 350: static void addcycles_ce020_4 (const char *name, int head, int tail, int cycles)
1.1.1.4 root 351: {
1.1.1.7 ! root 352: if (!isce020())
! 353: return;
! 354: if (!head && !tail && !cycles)
! 355: return;
! 356: printf ("\t/* %s H:%d,T:%d,C:%d */\n", name, head, tail, cycles);
! 357: }
! 358: static void addcycles_ce020_5 (const char *name, int head, int tail, int cycles, int ophead)
! 359: {
! 360: if (!isce020())
! 361: return;
! 362: if (!head && !tail && !cycles && !ophead) {
! 363: printf ("\t/* OP zero */\n");
1.1.1.4 root 364: return;
365: }
1.1.1.7 ! root 366: count_cycles += cycles;
! 367: if (!ophead) {
! 368: addcycles_ce020_4 (name, head, tail, cycles);
! 369: } else if (ophead > 0) {
! 370: printf ("\t/* %s H:%d-,T:%d,C:%d */\n", name, head, tail, cycles);
! 371: } else {
! 372: printf ("\t/* %s H:%d+,T:%d,C:%d */\n", name, head, tail, cycles);
! 373: }
! 374: }
! 375:
! 376: static void addcycles000_nonces(const char *s, const char *sc)
! 377: {
! 378: if (using_simple_cycles) {
! 379: printf("%scount_cycles += (%s) * CYCLE_UNIT / 2;\n", s, sc);
! 380: count_ncycles++;
! 381: }
! 382: }
! 383: static void addcycles000_nonce(const char *s, int c)
! 384: {
! 385: if (using_simple_cycles) {
! 386: printf("%scount_cycles += %d * CYCLE_UNIT / 2;\n", s, c);
! 387: count_ncycles++;
! 388: }
! 389: }
! 390:
! 391: static void addcycles000_onlyce (int cycles)
! 392: {
! 393: if (using_ce) {
! 394: printf ("\t%s (%d);\n", do_cycles, cycles);
! 395: }
1.1.1.4 root 396: }
397:
398: static void addcycles000 (int cycles)
399: {
1.1.1.7 ! root 400: if (using_ce) {
! 401: printf ("\t%s (%d);\n", do_cycles, cycles);
! 402: }
1.1.1.4 root 403: count_cycles += cycles;
404: }
1.1.1.7 ! root 405:
! 406: #ifndef WINUAE_FOR_HATARI
1.1.1.4 root 407: static void addcycles000_2 (const char *s, int cycles)
408: {
1.1.1.7 ! root 409: if (using_ce) {
! 410: printf ("%s%s (%d);\n", s, do_cycles, cycles);
! 411: }
1.1.1.4 root 412: count_cycles += cycles;
413: }
1.1.1.7 ! root 414: #endif
! 415:
1.1.1.4 root 416:
417: static void addcycles000_3 (const char *s)
418: {
1.1.1.7 ! root 419: if (using_ce) {
! 420: printf ("%sif (cycles > 0) %s (cycles);\n", s, do_cycles);
! 421: }
1.1.1.4 root 422: count_ncycles++;
423: }
424:
425: static int isreg (amodes mode)
426: {
427: if (mode == Dreg || mode == Areg)
428: return 1;
429: return 0;
430: }
431:
432: static void start_brace (void)
433: {
434: n_braces++;
435: printf ("{");
436: }
437:
438: static void close_brace (void)
439: {
440: assert (n_braces > 0);
441: n_braces--;
442: printf ("}");
443: }
444:
445: static void finish_braces (void)
446: {
447: while (n_braces > 0)
448: close_brace ();
449: }
450:
451: static void pop_braces (int to)
452: {
453: while (n_braces > to)
454: close_brace ();
455: }
456:
457: static int bit_size (int size)
458: {
459: switch (size) {
460: case sz_byte: return 8;
461: case sz_word: return 16;
462: case sz_long: return 32;
1.1.1.7 ! root 463: default: term ();
1.1.1.4 root 464: }
465: return 0;
466: }
467:
468: static const char *bit_mask (int size)
469: {
470: switch (size) {
471: case sz_byte: return "0xff";
472: case sz_word: return "0xffff";
473: case sz_long: return "0xffffffff";
1.1.1.7 ! root 474: default: term ();
1.1.1.4 root 475: }
476: return 0;
477: }
478:
1.1.1.7 ! root 479: static void add_mmu040_movem (int movem)
! 480: {
! 481: if (movem != 3)
! 482: return;
! 483: printf ("\tif (mmu040_movem) {\n");
! 484: printf ("\t\tsrca = mmu040_movem_ea;\n");
! 485: printf ("\t} else\n");
! 486: start_brace ();
! 487: }
1.1.1.4 root 488:
1.1.1.7 ! root 489: static void gen_nextilong2 (const char *type, const char *name, int flags, int movem)
1.1.1.4 root 490: {
491: int r = m68k_pc_offset;
492: m68k_pc_offset += 4;
493:
1.1.1.7 ! root 494: printf ("\t%s %s;\n", type, name);
! 495: add_mmu040_movem (movem);
1.1.1.4 root 496: if (using_ce020) {
1.1.1.7 ! root 497: if (flags & GF_NOREFILL)
! 498: //**printf("\t%s = %s (%d);\n", name, prefetch_long_buffer, r);
! 499: printf("\t%s = %s (%d);\n", name, prefetch_long, r);
! 500: else
! 501: printf("\t%s = %s (%d);\n", name, prefetch_long, r);
1.1.1.4 root 502: count_read += 2;
503: } else if (using_ce) {
504: /* we must do this because execution order of (something | something2) is not defined */
505: if (flags & GF_NOREFILL) {
1.1.1.7 ! root 506: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2);
1.1.1.4 root 507: count_read++;
508: printf ("\t%s |= regs.irc;\n", name);
509: } else {
1.1.1.7 ! root 510: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2);
1.1.1.4 root 511: count_read++;
1.1.1.7 ! root 512: printf ("\t%s |= %s (%d);\n", name, prefetch_word, r + 4);
1.1.1.4 root 513: count_read++;
514: }
515: } else {
516: if (using_prefetch) {
517: if (flags & GF_NOREFILL) {
1.1.1.7 ! root 518: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2);
1.1.1.4 root 519: count_read++;
520: printf ("\t%s |= regs.irc;\n", name);
521: insn_n_cycles += 4;
522: } else {
1.1.1.7 ! root 523: printf ("\t%s = %s (%d) << 16;\n", name, prefetch_word, r + 2);
! 524: count_read += 2;
! 525: printf ("\t%s |= %s (%d);\n", name, prefetch_word, r + 4);
1.1.1.4 root 526: insn_n_cycles += 8;
527: }
528: } else {
529: insn_n_cycles += 8;
1.1.1.7 ! root 530: printf ("\t%s = %s (%d);\n", name, prefetch_long, r);
1.1.1.4 root 531: }
532: }
533: }
1.1.1.7 ! root 534: static void gen_nextilong (const char *type, const char *name, int flags)
! 535: {
! 536: gen_nextilong2 (type, name, flags, 0);
! 537: }
1.1.1.4 root 538:
539: static const char *gen_nextiword (int flags)
540: {
541: static char buffer[80];
542: int r = m68k_pc_offset;
543: m68k_pc_offset += 2;
544:
545: if (using_ce020) {
1.1.1.7 ! root 546: if (flags & GF_NOREFILL)
! 547: //**sprintf(buffer, "%s (%d)", prefetch_word_buffer, r);
! 548: sprintf(buffer, "%s (%d)", prefetch_word, r);
! 549: else
! 550: sprintf(buffer, "%s (%d)", prefetch_word, r);
1.1.1.4 root 551: count_read++;
552: } else if (using_ce) {
553: if (flags & GF_NOREFILL) {
554: strcpy (buffer, "regs.irc");
555: } else {
1.1.1.7 ! root 556: sprintf (buffer, "%s (%d)", prefetch_word, r + 2);
1.1.1.4 root 557: count_read++;
558: }
559: } else {
560: if (using_prefetch) {
561: if (flags & GF_NOREFILL) {
1.1.1.7 ! root 562: strcpy (buffer, "regs.irc");
1.1.1.4 root 563: } else {
1.1.1.7 ! root 564: sprintf (buffer, "%s (%d)", prefetch_word, r + 2);
1.1.1.4 root 565: count_read++;
566: insn_n_cycles += 4;
567: }
568: } else {
1.1.1.7 ! root 569: sprintf (buffer, "%s (%d)", prefetch_word, r);
1.1.1.4 root 570: insn_n_cycles += 4;
571: }
572: }
573: return buffer;
574: }
575:
576: static const char *gen_nextibyte (int flags)
577: {
578: static char buffer[80];
579: int r = m68k_pc_offset;
580: m68k_pc_offset += 2;
581:
1.1.1.7 ! root 582: if (using_ce020 || using_prefetch_020) {
! 583: if (flags & GF_NOREFILL)
! 584: //**sprintf(buffer, "(uae_u8)%s (%d)", prefetch_word_buffer, r);
! 585: sprintf(buffer, "(uae_u8)%s (%d)", prefetch_word, r);
! 586: else
! 587: sprintf(buffer, "(uae_u8)%s (%d)", prefetch_word, r);
1.1.1.4 root 588: count_read++;
589: } else if (using_ce) {
590: if (flags & GF_NOREFILL) {
591: strcpy (buffer, "(uae_u8)regs.irc");
592: } else {
1.1.1.7 ! root 593: sprintf (buffer, "(uae_u8)%s (%d)", prefetch_word, r + 2);
1.1.1.4 root 594: count_read++;
595: }
596: } else {
597: insn_n_cycles += 4;
598: if (using_prefetch) {
599: if (flags & GF_NOREFILL) {
1.1.1.7 ! root 600: strcpy (buffer, "(uae_u8)regs.irc");
1.1.1.4 root 601: } else {
1.1.1.7 ! root 602: sprintf (buffer, "(uae_u8)%s (%d)", prefetch_word, r + 2);
1.1.1.4 root 603: insn_n_cycles += 4;
604: count_read++;
605: }
606: } else {
1.1.1.7 ! root 607: sprintf (buffer, "%s (%d)", srcbi, r);
1.1.1.4 root 608: insn_n_cycles += 4;
609: }
610: }
611: return buffer;
612: }
613:
1.1.1.7 ! root 614: static void makefromsr (void)
1.1.1.4 root 615: {
1.1.1.7 ! root 616: printf ("\tMakeFromSR();\n");
! 617: if (using_ce || isce020())
! 618: printf ("\tregs.ipl_pin = intlev ();\n");
! 619: }
! 620:
! 621: static void check_ipl (void)
! 622: {
! 623: if (ipl_fetched)
! 624: return;
! 625: if (using_ce || isce020())
! 626: printf ("\tipl_fetch ();\n");
! 627: ipl_fetched = 1;
! 628: }
! 629:
! 630: static void single_check_ipl(void)
! 631: {
! 632: check_ipl();
! 633: ipl_fetched = 2;
! 634:
! 635: }
! 636: /* this is not true, it seems to be microcode controller */
! 637:
! 638: /* Apparently interrupt state is sampled
! 639: * during any memory access. Because we don't
! 640: * know if there are future memory accesses,
! 641: * we'll check each memory access after prefetch
! 642: * and recheck interrupt state again.
! 643: */
! 644: static void check_ipl_again (void)
! 645: {
! 646: if (ipl_fetched != 1)
1.1.1.4 root 647: return;
648: if (using_ce)
649: printf ("\tipl_fetch ();\n");
650: }
651:
1.1.1.7 ! root 652: static void irc2ir_2 (bool dozero)
! 653: {
! 654: if (!using_prefetch)
! 655: return;
! 656: if (ir2irc)
! 657: return;
! 658: ir2irc = 1;
! 659: printf ("\tregs.ir = regs.irc;\n");
! 660: if (dozero)
! 661: printf ("\tregs.irc = 0;\n");
! 662: check_ipl ();
! 663: }
! 664: static void irc2ir (void)
! 665: {
! 666: irc2ir_2 (false);
! 667: }
1.1.1.4 root 668:
669: static void fill_prefetch_2 (void)
670: {
671: if (!using_prefetch)
672: return;
1.1.1.7 ! root 673: printf ("\t%s (%d);\n", prefetch_word, m68k_pc_offset + 2);
1.1.1.4 root 674: did_prefetch = 1;
1.1.1.7 ! root 675: ir2irc = 0;
1.1.1.4 root 676: count_read++;
677: insn_n_cycles += 4;
678: }
679:
680: static void fill_prefetch_1 (int o)
681: {
1.1.1.7 ! root 682: if (using_prefetch) {
! 683: printf ("\t%s (%d);\n", prefetch_word, o);
! 684: did_prefetch = 1;
! 685: ir2irc = 0;
! 686: count_read++;
! 687: insn_n_cycles += 4;
1.1.1.4 root 688: }
689: }
690:
691: static void fill_prefetch_full (void)
692: {
1.1.1.7 ! root 693: if (using_prefetch) {
! 694: fill_prefetch_1 (0);
! 695: irc2ir ();
! 696: fill_prefetch_1 (2);
! 697: } else if (isprefetch020()) {
! 698: did_prefetch = 2;
! 699: total_ce020 -= 4;
! 700: returntail (false);
! 701: if (cpu_level >= 3)
! 702: printf ("\tfill_prefetch_030 ();\n");
! 703: else if (cpu_level == 2)
! 704: printf ("\tfill_prefetch_020 ();\n");
! 705: }
! 706: }
! 707:
! 708: // 68000 and 68010 only
! 709: static void fill_prefetch_full_000 (void)
! 710: {
! 711: if (!using_prefetch)
! 712: return;
! 713: fill_prefetch_full ();
! 714: }
! 715:
! 716: // 68020+
! 717: static void fill_prefetch_full_020 (void)
! 718: {
! 719: if (!using_prefetch_020)
! 720: return;
! 721: fill_prefetch_full ();
1.1.1.4 root 722: }
723:
724: static void fill_prefetch_0 (void)
725: {
726: if (!using_prefetch)
727: return;
1.1.1.7 ! root 728: printf ("\t%s (0);\n", prefetch_word);
1.1.1.4 root 729: did_prefetch = 1;
1.1.1.7 ! root 730: ir2irc = 0;
1.1.1.4 root 731: count_read++;
732: insn_n_cycles += 4;
733: }
734:
1.1.1.7 ! root 735: #ifndef WINUAE_FOR_HATARI
1.1.1.4 root 736: static void dummy_prefetch (void)
737: {
738: int o = m68k_pc_offset + 2;
739: if (!using_prefetch)
740: return;
1.1.1.7 ! root 741: printf ("\t%s (%d);\n", srcwi, o);
1.1.1.4 root 742: count_read++;
743: insn_n_cycles += 4;
744: }
1.1.1.7 ! root 745: #endif
1.1.1.4 root 746:
747: static void fill_prefetch_next_1 (void)
748: {
749: irc2ir ();
750: fill_prefetch_1 (m68k_pc_offset + 2);
751: }
752:
753: static void fill_prefetch_next (void)
754: {
1.1.1.7 ! root 755: if (using_prefetch) {
! 756: fill_prefetch_next_1 ();
1.1.1.4 root 757: }
1.1.1.7 ! root 758: // if (using_prefetch_020) {
! 759: // printf ("\t%s (%d);\n", prefetch_word, m68k_pc_offset);
! 760: // did_prefetch = 1;
! 761: // }
1.1.1.4 root 762: }
763:
764: static void fill_prefetch_finish (void)
765: {
1.1.1.7 ! root 766: if (did_prefetch)
1.1.1.4 root 767: return;
1.1.1.7 ! root 768: if (using_prefetch) {
! 769: fill_prefetch_1 (m68k_pc_offset);
! 770: }
! 771: if (using_prefetch_020) {
! 772: did_prefetch = 1;
! 773: }
1.1.1.4 root 774: }
775:
776: static void setpc (const char *format, ...)
777: {
778: va_list parms;
779: char buffer[1000];
780:
781: va_start (parms, format);
782: _vsnprintf (buffer, 1000 - 1, format, parms);
783: va_end (parms);
784:
1.1.1.7 ! root 785: if (using_mmu || using_prefetch || using_prefetch_020)
! 786: printf ("\tm68k_setpci (%s);\n", buffer);
1.1.1.4 root 787: else
788: printf ("\tm68k_setpc (%s);\n", buffer);
789: }
790:
791: static void incpc (const char *format, ...)
792: {
793: va_list parms;
794: char buffer[1000];
795:
796: va_start (parms, format);
797: _vsnprintf (buffer, 1000 - 1, format, parms);
798: va_end (parms);
799:
1.1.1.7 ! root 800: if (using_mmu || using_prefetch || using_prefetch_020)
1.1.1.4 root 801: printf ("\tm68k_incpci (%s);\n", buffer);
802: else
803: printf ("\tm68k_incpc (%s);\n", buffer);
804: }
805:
806: static void sync_m68k_pc (void)
807: {
1.1.1.7 ! root 808: m68k_pc_offset_old = m68k_pc_offset;
1.1.1.4 root 809: if (m68k_pc_offset == 0)
810: return;
811: incpc ("%d", m68k_pc_offset);
1.1.1.7 ! root 812: m68k_pc_total += m68k_pc_offset;
1.1.1.4 root 813: m68k_pc_offset = 0;
814: }
815:
1.1.1.7 ! root 816: static void clear_m68k_offset(void)
! 817: {
! 818: m68k_pc_total += m68k_pc_offset;
! 819: m68k_pc_offset = 0;
! 820: }
! 821:
! 822: static void sync_m68k_pc_noreset (void)
! 823: {
! 824: sync_m68k_pc ();
! 825: m68k_pc_offset = m68k_pc_offset_old;
! 826: }
! 827:
! 828: static void addmmufixup (const char *reg)
1.1.1.4 root 829: {
830: if (!using_mmu)
831: return;
1.1.1.7 ! root 832: if (using_mmu == 68040 && (mmufixupstate || mmufixupcnt > 0))
! 833: return;
! 834: printf ("\tmmufixup[%d].reg = %s;\n", mmufixupcnt, reg);
! 835: printf ("\tmmufixup[%d].value = m68k_areg (regs, %s);\n", mmufixupcnt, reg);
! 836: mmufixupstate |= 1 << mmufixupcnt;
! 837: mmufixupcnt++;
! 838: }
! 839:
! 840: static void clearmmufixup (int cnt)
! 841: {
! 842: if (mmufixupstate & (1 << cnt)) {
! 843: printf ("\tmmufixup[%d].reg = -1;\n", cnt);
! 844: mmufixupstate &= ~(1 << cnt);
! 845: }
! 846: }
! 847:
! 848: static void gen_set_fault_pc (void)
! 849: {
! 850: if (using_mmu != 68040)
! 851: return;
1.1.1.4 root 852: sync_m68k_pc ();
1.1.1.7 ! root 853: printf ("\tregs.instruction_pc = %s;\n", getpc);
! 854: printf ("\tmmu_restart = false;\n");
1.1.1.4 root 855: m68k_pc_offset = 0;
1.1.1.7 ! root 856: clearmmufixup (0);
1.1.1.4 root 857: }
858:
859: static void syncmovepc (int getv, int flags)
860: {
861: #if 0
862: if (!(flags & GF_MOVE))
863: return;
864: if (getv == 1) {
865: sync_m68k_pc ();
866: //fill_prefetch_next ();
867: }
868: #endif
869: }
870:
1.1.1.7 ! root 871: static void head_cycs (int h)
! 872: {
! 873: if (head_ce020_cycs_done)
! 874: return;
! 875: if (h < 0)
! 876: return;
! 877: //printf ("\tdo_sync_tail (%d);\n", h);
! 878: //printf ("\tdo_head_cycles_ce020 (%d);\n", h);
! 879: head_ce020_cycs_done = true;
! 880: tail_ce020 = -1;
! 881: }
1.1.1.4 root 882:
1.1.1.7 ! root 883: static void add_head_cycs (int h)
! 884: {
! 885: if (!isce020())
! 886: return;
! 887: head_ce020_cycs_done = false;
! 888: head_cycs (h);
! 889: }
1.1.1.4 root 890:
1.1.1.7 ! root 891: static void addopcycles_ce20 (int h, int t, int c, int subhead)
1.1.1.4 root 892: {
1.1.1.7 ! root 893: head_cycs (h);
1.1.1.4 root 894:
1.1.1.7 ! root 895: //c = 0;
! 896: #if 0
! 897: if (tail_ce020 == 1)
! 898: printf ("\tregs.ce020memcycles -= 1 * cpucycleunit; /* T=1 */ \n");
! 899: else if (tail_ce020 == 2)
! 900: printf ("\tregs.ce020memcycles -= 2 * cpucycleunit; /* T=2 */\n");
! 901: #endif
! 902: if (1 && !subhead && (h > 0 || t > 0 || c > 0) && got_ea_ce020) {
! 903: if (!did_prefetch) {
! 904: get_prefetch_020 ();
! 905: did_prefetch = 1;
! 906: }
! 907: if (1) {
! 908: if (h > 0) {
! 909: printf ("\tif (regs.ce020memcycles > %d * cpucycleunit)\n", h);
! 910: printf ("\t\tregs.ce020memcycles = %d * cpucycleunit;\n", h);
! 911: } else {
! 912: printf ("\tregs.ce020memcycles = 0;\n");
! 913: }
! 914: }
! 915: }
1.1.1.4 root 916:
1.1.1.7 ! root 917: #if 0
! 918: if (tail_ce020 >= 0 && h >= 0 && head_in_ea_ce020 == 0) {
! 919: int largest = tail_ce020 > h ? tail_ce020: h;
! 920: if (tail_ce020 != h) {
! 921: //printf ("\tdo_cycles_ce020 (%d - %d);\n", tail_ce020 > h ? tail_ce020 : h, tail_ce020 > h ? h : tail_ce020);
! 922: //printf ("\tdo_cycles_ce020 (%d - %d);\n", tail_ce020 > h ? tail_ce020 : h, tail_ce020 > h ? h : tail_ce020);
! 923: if (h) {
! 924: printf ("\tregs.ce020memcycles -= %d * cpucycleunit;\n", h);
! 925: printf ("\tif (regs.ce020memcycles < 0) {\n");
! 926: //printf ("\t\tx_do_cycles (-regs.ce020memcycles);\n");
! 927: printf ("\t\tregs.ce020memcycles = 0;\n");
! 928: printf ("\t}\n");
! 929: } else {
! 930: printf ("\tregs.ce020memcycles = 0;\n");
! 931: }
! 932: //printf ("\tregs.ce020memcycles = 0;\n");
! 933:
! 934: #if 0
! 935: if (tail_ce020)
! 936: printf ("\tregs.ce020_tail = get_cycles () - regs.ce020_tail;\n");
! 937: else
! 938: printf ("\tregs.ce020_tail = 0;\n");
! 939: printf ("\tif (regs.ce020_tail < %d * cpucycleunit)\n", largest);
! 940: printf ("\t\tx_do_cycles (%d * cpucycleunit - regs.ce020_tail);\n", largest);
! 941: #endif
! 942: } else if (h) {
! 943: printf ("\t/* ea tail == op head (%d) */\n", h);
! 944:
! 945: printf ("\tregs.ce020memcycles -= %d * cpucycleunit;\n", h);
! 946: printf ("\tif (regs.ce020memcycles < 0) {\n");
! 947: //printf ("\t\tx_do_cycles (-regs.ce020memcycles);\n");
! 948: printf ("\t\tregs.ce020memcycles = 0;\n");
! 949: printf ("\t}\n");
! 950: }
! 951: }
! 952: #endif
! 953:
! 954: if (h < 0)
! 955: h = 0;
! 956:
! 957: //c = 0;
! 958:
! 959: // c = internal cycles needed after head cycles and before tail cycles. Not total cycles.
! 960: addcycles_ce020_5 ("op", h, t, c - h - t, -subhead);
! 961: //printf ("\tregs.irc = get_word_ce020_prefetch (%d);\n", m68k_pc_offset);
! 962: #if 0
! 963: if (c - h - t > 0) {
! 964: printf ("\t%s (%d);\n", do_cycles, c - h - t);
! 965: count_cycles_ce020 += c;
! 966: count_cycles += c;
! 967: }
! 968: #endif
! 969: //printf ("\tregs.ce020_tail = 0;\n");
! 970: total_ce020 = c;
! 971: tail_ce020 = t;
! 972: // if (total_ce020 >= 2)
! 973: // printf ("\tint op_cycles = get_cycles ();\n");
! 974: }
! 975:
! 976: static void addop_ce020 (struct instr *curi, int subhead)
! 977: {
! 978: if (!isce020())
! 979: return;
! 980: int h = curi->head;
! 981: int t = curi->tail;
! 982: int c = curi->clocks;
! 983: #if 0
! 984: if ((((curi->sduse & 2) && !isreg (curi->smode)) || (((curi->sduse >> 4) & 2) && !isreg (curi->dmode))) && using_waitstates) {
! 985: t += using_waitstates;
! 986: c += using_waitstates;
! 987: }
! 988: #endif
! 989: addopcycles_ce20 (h, t, c, -subhead);
! 990: }
! 991:
! 992: static void addcycles_ea_ce020_5 (const char *ea, int h, int t, int c, int oph)
! 993: {
! 994: head_cycs (h + oph);
! 995:
! 996: // if (!h && !h && !c && !oph)
! 997: // return;
! 998:
! 999: c = c - h - t;
! 1000:
! 1001: //c = 0;
! 1002:
! 1003: if (!oph) {
! 1004: printf ("\t/* ea H:%d,T:%d,C:%d %s */\n", h, t, c, ea);
! 1005: } else {
! 1006: if (oph && t)
! 1007: term_err ("Both op head and tail can't be non-zero");
! 1008: if (oph > 0) {
! 1009: printf ("\t/* ea H:%d+%d=%d,T:%d,C:%d %s */\n", h, oph, h + oph, t, c, ea);
! 1010: h += oph;
! 1011: } else {
! 1012: printf ("\t/* ea H:%d-%d=%d,T:%d,C:%d %s */\n", h, -oph, h + oph, t, c, ea);
! 1013: h += oph;
! 1014: }
! 1015: }
! 1016:
! 1017: if (h) {
! 1018: printf ("\tif (regs.ce020memcycles > %d * cpucycleunit)\n", h);
! 1019: printf ("\t\tregs.ce020memcycles = %d * cpucycleunit;\n", h);
! 1020: } else {
! 1021: printf ("\tregs.ce020memcycles = 0;\n");
! 1022: }
! 1023:
! 1024: if (1 && c > 0) {
! 1025: printf ("\t%s (%d);\n", do_cycles, c);
! 1026: count_cycles += c;
! 1027: }
! 1028: tail_ce020 = t;
! 1029: head_in_ea_ce020 = oph;
! 1030: got_ea_ce020 = true;
! 1031: // if (t > 0)
! 1032: // printf ("\tregs.ce020_tail = get_cycles () + %d * cpucycleunit;\n", t);
! 1033: }
! 1034: static void addcycles_ea_ce020_4 (const char *ea, int h, int t, int c)
! 1035: {
! 1036: addcycles_ea_ce020_5 (ea, h, t, c, 0);
! 1037: }
! 1038:
! 1039: #define SETCE020(h2,t2,c2) { h = h2; t = t2; c = c2; }
! 1040: #define SETCE020H(h2,t2,c2) { h = h2; oph = curi ? curi->head : 0; t = t2; c = c2; }
! 1041:
! 1042: static int gence020cycles_fiea (struct instr *curi, wordsizes ssize, amodes dmode)
! 1043: {
! 1044: bool l = ssize == sz_long;
! 1045: int h = 0, t = 0, c = 0, oph = 0;
! 1046: switch ((int)dmode)
! 1047: {
! 1048: case Dreg:
! 1049: case Areg:
! 1050: if (!l)
! 1051: SETCE020H(2, 0, 2)
! 1052: else
! 1053: SETCE020H(4, 0, 4)
! 1054: break;
! 1055: case Aind: // (An)
! 1056: if (!l)
! 1057: SETCE020(1, 1, 3)
! 1058: else
! 1059: SETCE020(1, 0, 4)
! 1060: break;
! 1061: case Aipi: // (An)+
! 1062: if (!l)
! 1063: SETCE020(2, 1, 5)
! 1064: else
! 1065: SETCE020(4, 1, 7)
! 1066: break;
! 1067: case Apdi: // -(An)
! 1068: if (!l)
! 1069: SETCE020(2, 2, 4)
! 1070: else
! 1071: SETCE020(2, 0, 4)
! 1072: break;
! 1073: case Ad8r: // (d8,An,Xn)
! 1074: case PC8r: // (d8,PC,Xn)
! 1075: if (!l)
! 1076: SETCE020(6, 2, 8)
! 1077: else
! 1078: SETCE020(8, 2, 10)
! 1079: break;
! 1080: case Ad16: // (d16,An)
! 1081: case PC16: // (d16,PC)
! 1082: if (!l)
! 1083: SETCE020(2, 0, 4)
! 1084: else
! 1085: SETCE020(4, 0, 6)
! 1086: break;
! 1087: case absw:
! 1088: if (!l)
! 1089: SETCE020(4, 2, 6)
! 1090: else
! 1091: SETCE020(6, 2, 8)
! 1092: break;
! 1093: case absl:
! 1094: if (!l)
! 1095: SETCE020(3, 0, 6)
! 1096: else
! 1097: SETCE020(5, 0, 8)
! 1098: break;
! 1099: }
! 1100: addcycles_ea_ce020_5 ("fiea", h, t, c, oph);
! 1101: return oph;
! 1102: }
! 1103:
! 1104:
! 1105: static int gence020cycles_ciea (struct instr *curi, wordsizes ssize, amodes dmode)
! 1106: {
! 1107: int h = 0, t = 0, c = 0, oph = 0;
! 1108: bool l = ssize == sz_long;
! 1109: switch ((int)dmode)
! 1110: {
! 1111: case Dreg:
! 1112: case Areg:
! 1113: if (!l)
! 1114: SETCE020H(2, 0, 2)
! 1115: else
! 1116: SETCE020H(4, 0, 4)
! 1117: break;
! 1118: case Aind: // (An)
! 1119: if (!l)
! 1120: SETCE020H(2, 0, 2)
! 1121: else
! 1122: SETCE020H(4, 0, 4)
! 1123: break;
! 1124: case Aipi: // (An)+
! 1125: if (!l)
! 1126: SETCE020(2, 0, 4)
! 1127: else
! 1128: SETCE020(4, 0, 6)
! 1129: break;
! 1130: case Apdi: // -(An)
! 1131: if (!l)
! 1132: SETCE020H(2, 0, 2)
! 1133: else
! 1134: SETCE020H(4, 0, 4)
! 1135: break;
! 1136: case Ad8r: // (d8,An,Xn)
! 1137: case PC8r: // (d8,PC,Xn)
! 1138: if (!l)
! 1139: SETCE020H(6, 0, 6)
! 1140: else
! 1141: SETCE020H(8, 0, 8)
! 1142: break;
! 1143: case Ad16: // (d16,An)
! 1144: case PC16: // (d16,PC)
! 1145: if (!l)
! 1146: SETCE020H(4, 0, 4)
! 1147: else
! 1148: SETCE020H(6, 0, 6)
! 1149: break;
! 1150: case absw:
! 1151: if (!l)
! 1152: SETCE020H(4, 0, 4)
! 1153: else
! 1154: SETCE020H(6, 0, 6)
! 1155: break;
! 1156: case absl:
! 1157: if (!l)
! 1158: SETCE020H(6, 0, 6)
! 1159: else
! 1160: SETCE020H(8, 0, 8)
! 1161: break;
! 1162: }
! 1163: addcycles_ea_ce020_5 ("ciea", h, t, c, oph);
! 1164: return oph;
! 1165: }
! 1166:
! 1167:
! 1168: static int gence020cycles_fea (amodes mode)
! 1169: {
! 1170: int h = 0, t = 0, c = 0, ws = 0;
! 1171: switch ((int)mode)
! 1172: {
! 1173: case Dreg:
! 1174: case Areg:
! 1175: SETCE020(0, 0, 0)
! 1176: break;
! 1177: case Aind: // (An)
! 1178: ws++;
! 1179: SETCE020(1, 1, 3)
! 1180: break;
! 1181: case Aipi: // (An)+
! 1182: ws++;
! 1183: SETCE020(0, 1, 3)
! 1184: break;
! 1185: case Apdi: // -(An)
! 1186: ws++;
! 1187: SETCE020(2, 2, 4)
! 1188: break;
! 1189: case Ad8r: // (d8,An,Xn)
! 1190: case PC8r: // (d8,PC,Xn)
! 1191: ws++;
! 1192: SETCE020(4, 2, 6)
! 1193: break;
! 1194: case Ad16: // (d16,An)
! 1195: case PC16: // (d16,PC)
! 1196: ws++;
! 1197: SETCE020(2, 2, 4)
! 1198: break;
! 1199: case absw:
! 1200: ws++;
! 1201: SETCE020(2, 2, 4)
! 1202: break;
! 1203: case absl:
! 1204: ws++;
! 1205: SETCE020(1, 0, 4)
! 1206: break;
! 1207: }
! 1208: #if 0
! 1209: if (using_waitstates) {
! 1210: t += ws * using_waitstates;
! 1211: c += ws * using_waitstates;
! 1212: }
! 1213: #endif
! 1214: addcycles_ea_ce020_4 ("fea", h, t, c);
! 1215: return 0;
! 1216: }
! 1217:
! 1218: static int gence020cycles_cea (struct instr *curi, amodes mode)
! 1219: {
! 1220: int h = 0, t = 0, c = 0, oph = 0;
! 1221: switch ((int)mode)
! 1222: {
! 1223: case Dreg:
! 1224: case Areg:
! 1225: SETCE020(0, 0, 0);
! 1226: break;
! 1227: case Aind: // (An)
! 1228: SETCE020H(2 + h, 0, 2);
! 1229: break;
! 1230: case Aipi: // (An)+
! 1231: SETCE020(0, 0, 2);
! 1232: break;
! 1233: case Apdi: // -(An)
! 1234: SETCE020H(2, 0, 2)
! 1235: break;
! 1236: case Ad8r: // (d8,An,Xn)
! 1237: case PC8r: // (d8,PC,Xn)
! 1238: SETCE020H(4, 0, 4)
! 1239: break;
! 1240: case Ad16: // (d16,An)
! 1241: case PC16: // (d16,PC)
! 1242: SETCE020H(2, 0, 2)
! 1243: break;
! 1244: case absw:
! 1245: SETCE020H(2, 0, 2)
! 1246: break;
! 1247: case absl:
! 1248: SETCE020H(4, 0, 4)
! 1249: break;
! 1250: }
! 1251: addcycles_ea_ce020_5 ("cea", h, t, c, oph);
! 1252: return oph;
! 1253: }
! 1254:
! 1255: static int gence020cycles_jea (struct instr *curi, amodes mode)
! 1256: {
! 1257: int h = 0, t = 0, c = 0, oph = 0;
! 1258: switch ((int)mode)
! 1259: {
! 1260: case Aind: // (An)
! 1261: SETCE020H(2, 0, 2)
! 1262: break;
! 1263: case Ad16: // (d16,An)
! 1264: case PC16: // (d16,PC)
! 1265: SETCE020H(4, 0, 4)
! 1266: break;
! 1267: case absw:
! 1268: SETCE020H(2, 0, 2)
! 1269: break;
! 1270: case absl:
! 1271: SETCE020H(2, 0, 2)
! 1272: break;
! 1273: }
! 1274: addcycles_ea_ce020_5 ("jea", h, t, c, oph);
! 1275: return oph;
! 1276: }
! 1277:
! 1278: static void next_level_000 (void)
! 1279: {
! 1280: if (next_cpu_level < 0)
! 1281: next_cpu_level = 0;
! 1282: }
! 1283:
! 1284: static void maybeaddop_ce020 (int flags)
! 1285: {
! 1286: if (flags & GF_OPCE020)
! 1287: addop_ce020 (curi_ce020, subhead_ce020);
! 1288: }
! 1289:
! 1290:
! 1291: /* getv == 1: fetch data; getv != 0: check for odd address. If movem != 0,
! 1292: * the calling routine handles Apdi and Aipi modes.
! 1293: * gb-- movem == 2 means the same thing but for a MOVE16 instruction */
! 1294:
! 1295: /* fixup indicates if we want to fix up adress registers in pre decrement
! 1296: * or post increment mode now (0) or later (1). A value of 2 will then be
! 1297: * used to do the actual fix up. This allows to do all memory readings
! 1298: * before any register is modified, and so to rerun operation without
! 1299: * side effect in case a bus fault is generated by any memory access.
! 1300: * XJ - 2006/11/13 */
! 1301:
! 1302: static void genamode2x (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags, int fetchmode)
! 1303: {
! 1304: char namea[100];
! 1305: bool rmw = false;
! 1306: int pc_68000_offset = m68k_pc_offset;
! 1307: int pc_68000_offset_fetch = 0;
! 1308: int pc_68000_offset_store = 0;
! 1309:
! 1310: sprintf (namea, "%sa", name);
! 1311: if ((flags & GF_RMW) && using_mmu == 68060) {
! 1312: strcpy (rmw_varname, name);
! 1313: candormw = true;
! 1314: rmw = true;
! 1315: }
! 1316:
! 1317: if (mode == Ad8r || mode == PC8r) {
! 1318: genamode8r_offset[genamode_cnt] = m68k_pc_total + m68k_pc_offset;
! 1319: genamode_cnt++;
! 1320: }
! 1321:
! 1322: start_brace ();
! 1323:
! 1324: switch (mode) {
! 1325: case Dreg:
! 1326: if (movem)
! 1327: term ();
1.1.1.4 root 1328: if (getv == 1)
1329: switch (size) {
1330: case sz_byte:
1331: #ifdef USE_DUBIOUS_BIGENDIAN_OPTIMIZATION
1332: /* This causes the target compiler to generate better code on few systems */
1333: printf ("\tuae_s8 %s = ((uae_u8*)&m68k_dreg (regs, %s))[3];\n", name, reg);
1334: #else
1335: printf ("\tuae_s8 %s = m68k_dreg (regs, %s);\n", name, reg);
1336: #endif
1337: break;
1338: case sz_word:
1339: #ifdef USE_DUBIOUS_BIGENDIAN_OPTIMIZATION
1340: printf ("\tuae_s16 %s = ((uae_s16*)&m68k_dreg (regs, %s))[1];\n", name, reg);
1341: #else
1342: printf ("\tuae_s16 %s = m68k_dreg (regs, %s);\n", name, reg);
1343: #endif
1344: break;
1345: case sz_long:
1346: printf ("\tuae_s32 %s = m68k_dreg (regs, %s);\n", name, reg);
1347: break;
1348: default:
1.1.1.7 ! root 1349: term ();
1.1.1.4 root 1350: }
1.1.1.7 ! root 1351: maybeaddop_ce020 (flags);
1.1.1.4 root 1352: syncmovepc (getv, flags);
1353: return;
1354: case Areg:
1355: if (movem)
1.1.1.7 ! root 1356: term ();
1.1.1.4 root 1357: if (getv == 1)
1358: switch (size) {
1359: case sz_word:
1360: printf ("\tuae_s16 %s = m68k_areg (regs, %s);\n", name, reg);
1361: break;
1362: case sz_long:
1363: printf ("\tuae_s32 %s = m68k_areg (regs, %s);\n", name, reg);
1364: break;
1365: default:
1.1.1.7 ! root 1366: term ();
1.1.1.4 root 1367: }
1.1.1.7 ! root 1368: maybeaddop_ce020 (flags);
1.1.1.4 root 1369: syncmovepc (getv, flags);
1370: return;
1371: case Aind: // (An)
1.1.1.7 ! root 1372: switch (fetchmode)
! 1373: {
! 1374: case fetchmode_fea:
! 1375: addcycles_ce020 (1);
! 1376: break;
! 1377: case fetchmode_cea:
! 1378: addcycles_ce020 (2);
! 1379: break;
! 1380: case fetchmode_jea:
! 1381: addcycles_ce020 (2);
! 1382: break;
! 1383: }
! 1384: printf ("\tuaecptr %sa;\n", name);
! 1385: add_mmu040_movem (movem);
! 1386: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg);
1.1.1.4 root 1387: break;
1388: case Aipi: // (An)+
1.1.1.7 ! root 1389: switch (fetchmode)
! 1390: {
! 1391: case fetchmode_fea:
! 1392: addcycles_ce020 (1);
! 1393: break;
! 1394: case fetchmode_cea:
! 1395: break;
! 1396: }
! 1397: printf ("\tuaecptr %sa;\n", name);
! 1398: add_mmu040_movem (movem);
! 1399: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg);
1.1.1.4 root 1400: break;
1401: case Apdi: // -(An)
1.1.1.7 ! root 1402: switch (fetchmode)
! 1403: {
! 1404: case fetchmode_fea:
! 1405: case fetchmode_cea:
! 1406: addcycles_ce020 (2);
! 1407: break;
! 1408: }
1.1.1.4 root 1409: printf ("\tuaecptr %sa;\n", name);
1.1.1.7 ! root 1410: add_mmu040_movem (movem);
1.1.1.4 root 1411: switch (size) {
1412: case sz_byte:
1413: if (movem)
1414: printf ("\t%sa = m68k_areg (regs, %s);\n", name, reg);
1415: else
1416: printf ("\t%sa = m68k_areg (regs, %s) - areg_byteinc[%s];\n", name, reg, reg);
1417: break;
1418: case sz_word:
1419: printf ("\t%sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 2);
1420: break;
1421: case sz_long:
1422: printf ("\t%sa = m68k_areg (regs, %s) - %d;\n", name, reg, movem ? 0 : 4);
1423: break;
1424: default:
1.1.1.7 ! root 1425: term ();
1.1.1.4 root 1426: }
1427: if (!(flags & GF_APDI)) {
1428: addcycles000 (2);
1429: insn_n_cycles += 2;
1430: count_cycles_ea += 2;
1.1.1.7 ! root 1431: pc_68000_offset_fetch += 2;
1.1.1.4 root 1432: }
1433: break;
1434: case Ad16: // (d16,An)
1.1.1.7 ! root 1435: printf ("\tuaecptr %sa;\n", name);
! 1436: add_mmu040_movem (movem);
! 1437: printf ("\t%sa = m68k_areg (regs, %s) + (uae_s32)(uae_s16)%s;\n", name, reg, gen_nextiword (flags));
! 1438: count_read_ea++;
! 1439: break;
! 1440: case PC16: // (d16,PC)
! 1441: printf ("\tuaecptr %sa;\n", name);
! 1442: add_mmu040_movem (movem);
! 1443: printf ("\t%sa = %s + %d;\n", name, getpc, m68k_pc_offset);
! 1444: printf ("\t%sa += (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags));
1.1.1.4 root 1445: break;
1446: case Ad8r: // (d8,An,Xn)
1.1.1.7 ! root 1447: switch (fetchmode)
! 1448: {
! 1449: case fetchmode_fea:
! 1450: addcycles_ce020 (4);
! 1451: break;
! 1452: case fetchmode_cea:
! 1453: case fetchmode_jea:
! 1454: break;
! 1455: }
1.1.1.4 root 1456: printf ("\tuaecptr %sa;\n", name);
1457: if (cpu_level > 1) {
1458: if (next_cpu_level < 1)
1459: next_cpu_level = 1;
1460: sync_m68k_pc ();
1.1.1.7 ! root 1461: add_mmu040_movem (movem);
1.1.1.4 root 1462: start_brace ();
1463: /* This would ordinarily be done in gen_nextiword, which we bypass. */
1464: insn_n_cycles += 4;
1.1.1.7 ! root 1465: printf ("\t%sa = %s (m68k_areg (regs, %s), %d);\n", name, disp020, reg, disp020cnt++);
1.1.1.4 root 1466: } else {
1467: if (!(flags & GF_AD8R)) {
1468: addcycles000 (2);
1469: insn_n_cycles += 2;
1470: count_cycles_ea += 2;
1.1.1.7 ! root 1471: #ifdef WINUAE_FOR_HATARI
! 1472: /* Hatari : on 68000 ST, Ad8r causes an unaligned memory prefetch and take 2 cycles more */
! 1473: /* JSR, JMP, LEA and PEA are handled separately */
! 1474: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */
! 1475: if ( using_prefetch && !using_ce )
! 1476: printf ("\tBusCyclePenalty += 2;\n");
! 1477: #endif
1.1.1.4 root 1478: }
1.1.1.7 ! root 1479: if ((flags & GF_NOREFILL) && using_prefetch) {
! 1480: printf ("\t%sa = %s (m68k_areg (regs, %s), regs.irc);\n", name, disp000, reg);
! 1481: } else {
! 1482: printf ("\t%sa = %s (m68k_areg (regs, %s), %s);\n", name, disp000, reg, gen_nextiword (flags));
! 1483: }
! 1484: count_read_ea++;
1.1.1.4 root 1485: }
1486: break;
1487: case PC8r: // (d8,PC,Xn)
1.1.1.7 ! root 1488: switch (fetchmode)
! 1489: {
! 1490: case fetchmode_fea:
! 1491: addcycles_ce020 (4);
! 1492: break;
! 1493: case fetchmode_cea:
! 1494: case fetchmode_jea:
! 1495: break;
! 1496: }
1.1.1.4 root 1497: printf ("\tuaecptr tmppc;\n");
1498: printf ("\tuaecptr %sa;\n", name);
1499: if (cpu_level > 1) {
1500: if (next_cpu_level < 1)
1501: next_cpu_level = 1;
1502: sync_m68k_pc ();
1.1.1.7 ! root 1503: add_mmu040_movem (movem);
1.1.1.4 root 1504: start_brace ();
1505: /* This would ordinarily be done in gen_nextiword, which we bypass. */
1506: insn_n_cycles += 4;
1.1.1.7 ! root 1507: printf ("\ttmppc = %s;\n", getpc);
! 1508: printf ("\t%sa = %s (tmppc, %d);\n", name, disp020, disp020cnt++);
1.1.1.4 root 1509: } else {
1.1.1.7 ! root 1510: printf ("\ttmppc = %s + %d;\n", getpc, m68k_pc_offset);
1.1.1.4 root 1511: if (!(flags & GF_PC8R)) {
1512: addcycles000 (2);
1513: insn_n_cycles += 2;
1514: count_cycles_ea += 2;
1.1.1.7 ! root 1515: #ifdef WINUAE_FOR_HATARI
! 1516: /* Hatari : on 68000 ST, Ad8r causes an unaligned memory prefetch and take 2 cycles more */
! 1517: /* JSR, JMP, LEA and PEA are handled separately */
! 1518: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */
! 1519: if ( using_prefetch && !using_ce )
! 1520: printf ("\tBusCyclePenalty += 2;\n");
! 1521: #endif
! 1522: }
! 1523: if ((flags & GF_NOREFILL) && using_prefetch) {
! 1524: printf ("\t%sa = %s (tmppc, regs.irc);\n", name, disp000);
! 1525: } else {
! 1526: printf ("\t%sa = %s (tmppc, %s);\n", name, disp000, gen_nextiword (flags));
1.1.1.4 root 1527: }
1528: }
1529:
1530: break;
1531: case absw:
1.1.1.7 ! root 1532: printf ("\tuaecptr %sa;\n", name);
! 1533: add_mmu040_movem (movem);
! 1534: printf ("\t%sa = (uae_s32)(uae_s16)%s;\n", name, gen_nextiword (flags));
! 1535: pc_68000_offset_fetch += 2;
1.1.1.4 root 1536: break;
1537: case absl:
1.1.1.7 ! root 1538: gen_nextilong2 ("uaecptr", namea, flags, movem);
1.1.1.4 root 1539: count_read_ea += 2;
1.1.1.7 ! root 1540: pc_68000_offset_fetch += 4;
! 1541: pc_68000_offset_store += 2;
1.1.1.4 root 1542: break;
1543: case imm:
1.1.1.7 ! root 1544: // fetch immediate address
1.1.1.4 root 1545: if (getv != 1)
1.1.1.7 ! root 1546: term ();
1.1.1.4 root 1547: insn_n_cycles020++;
1548: switch (size) {
1549: case sz_byte:
1550: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags));
1551: count_read_ea++;
1552: break;
1553: case sz_word:
1554: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags));
1555: count_read_ea++;
1556: break;
1557: case sz_long:
1558: gen_nextilong ("uae_s32", name, flags);
1559: count_read_ea += 2;
1560: break;
1561: default:
1.1.1.7 ! root 1562: term ();
1.1.1.4 root 1563: }
1.1.1.7 ! root 1564: maybeaddop_ce020 (flags);
1.1.1.4 root 1565: syncmovepc (getv, flags);
1566: return;
1567: case imm0:
1568: if (getv != 1)
1.1.1.7 ! root 1569: term ();
1.1.1.4 root 1570: printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags));
1571: count_read_ea++;
1.1.1.7 ! root 1572: maybeaddop_ce020 (flags);
1.1.1.4 root 1573: syncmovepc (getv, flags);
1574: return;
1575: case imm1:
1576: if (getv != 1)
1.1.1.7 ! root 1577: term ();
1.1.1.4 root 1578: printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags));
1579: count_read_ea++;
1.1.1.7 ! root 1580: maybeaddop_ce020 (flags);
1.1.1.4 root 1581: syncmovepc (getv, flags);
1582: return;
1583: case imm2:
1584: if (getv != 1)
1.1.1.7 ! root 1585: term ();
1.1.1.4 root 1586: gen_nextilong ("uae_s32", name, flags);
1587: count_read_ea += 2;
1.1.1.7 ! root 1588: maybeaddop_ce020 (flags);
1.1.1.4 root 1589: syncmovepc (getv, flags);
1590: return;
1591: case immi:
1592: if (getv != 1)
1.1.1.7 ! root 1593: term ();
1.1.1.4 root 1594: printf ("\tuae_u32 %s = %s;\n", name, reg);
1.1.1.7 ! root 1595: maybeaddop_ce020 (flags);
1.1.1.4 root 1596: syncmovepc (getv, flags);
1597: return;
1598: default:
1.1.1.7 ! root 1599: term ();
1.1.1.4 root 1600: }
1601:
1602: syncmovepc (getv, flags);
1.1.1.7 ! root 1603: maybeaddop_ce020 (flags);
1.1.1.4 root 1604:
1605: /* We get here for all non-reg non-immediate addressing modes to
1606: * actually fetch the value. */
1607:
1.1.1.7 ! root 1608: int exception_pc_offset = 0;
! 1609: if (getv == 2) {
! 1610: // store
! 1611: if (pc_68000_offset) {
! 1612: exception_pc_offset = pc_68000_offset + pc_68000_offset_store + 2;
1.1.1.4 root 1613: }
1.1.1.7 ! root 1614: } else {
! 1615: // fetch
! 1616: pc_68000_offset_fetch += 2;
! 1617: exception_pc_offset = pc_68000_offset_fetch;
! 1618: }
! 1619:
! 1620: if ((using_prefetch || using_ce) && using_exception_3 && getv != 0 && size != sz_byte) {
1.1.1.4 root 1621: printf ("\tif (%sa & 1) {\n", name);
1.1.1.7 ! root 1622: if (exception_pc_offset)
! 1623: incpc("%d", exception_pc_offset);
! 1624: printf ("\t\texception3_%s(opcode, %sa);\n", getv == 2 ? "write" : "read", name);
1.1.1.4 root 1625: printf ("\t\tgoto %s;\n", endlabelstr);
1626: printf ("\t}\n");
1627: need_endlabel = 1;
1628: start_brace ();
1629: }
1630:
1.1.1.7 ! root 1631: if ((using_prefetch || using_ce) && using_bus_error && getv != 0) {
! 1632: if (exception_pc_offset)
! 1633: printf("\tbus_error_offset = %d;\n", exception_pc_offset);
! 1634: }
! 1635:
1.1.1.4 root 1636: if (flags & GF_PREFETCH)
1637: fill_prefetch_next ();
1.1.1.7 ! root 1638: else if (flags & GF_IR2IRC)
! 1639: irc2ir_2 (true);
1.1.1.4 root 1640:
1641: if (getv == 1) {
1642: start_brace ();
1.1.1.7 ! root 1643: if (using_ce020 || using_prefetch_020) {
1.1.1.4 root 1644: switch (size) {
1645: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break;
1646: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break;
1647: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, srcl, name); count_read += 2; break;
1.1.1.7 ! root 1648: default: term ();
1.1.1.4 root 1649: }
1.1.1.7 ! root 1650: } else if (using_ce || using_prefetch) {
1.1.1.4 root 1651: switch (size) {
1.1.1.7 ! root 1652: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break;
! 1653: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break;
! 1654: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa) << 16; %s |= %s (%sa + 2);\n", name, srcw, name, name, srcw, name); count_read += 2; break;
! 1655: default: term ();
1.1.1.4 root 1656: }
1657: } else if (using_mmu) {
1658: if (flags & GF_FC) {
1659: switch (size) {
1.1.1.5 root 1660: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = sfc%s_get_byte (%sa);\n", name, mmu_postfix, name); break;
1661: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = sfc%s_get_word (%sa);\n", name, mmu_postfix, name); break;
1662: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = sfc%s_get_long (%sa);\n", name, mmu_postfix, name); break;
1.1.1.7 ! root 1663: default: term ();
1.1.1.4 root 1664: }
1665: } else {
1666: switch (size) {
1.1.1.7 ! root 1667: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, (flags & GF_LRMW) ? srcblrmw : (rmw ? srcbrmw : srcb), name); break;
! 1668: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, (flags & GF_LRMW) ? srcwlrmw : (rmw ? srcwrmw : srcw), name); break;
! 1669: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, (flags & GF_LRMW) ? srcllrmw : (rmw ? srclrmw : srcl), name); break;
! 1670: default: term ();
1.1.1.4 root 1671: }
1672: }
1673: } else {
1674: switch (size) {
1.1.1.7 ! root 1675: case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = %s (%sa);\n", name, srcb, name); count_read++; break;
! 1676: case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = %s (%sa);\n", name, srcw, name); count_read++; break;
! 1677: case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = %s (%sa);\n", name, srcl, name); count_read += 2; break;
! 1678: default: term ();
1.1.1.4 root 1679: }
1680: }
1681: }
1682:
1683: /* We now might have to fix up the register for pre-dec or post-inc
1684: * addressing modes. */
1685: if (!movem)
1686: switch (mode) {
1687: case Aipi:
1.1.1.7 ! root 1688: addmmufixup (reg);
1.1.1.4 root 1689: switch (size) {
1690: case sz_byte:
1691: printf ("\tm68k_areg (regs, %s) += areg_byteinc[%s];\n", reg, reg);
1692: break;
1693: case sz_word:
1694: printf ("\tm68k_areg (regs, %s) += 2;\n", reg);
1695: break;
1696: case sz_long:
1697: printf ("\tm68k_areg (regs, %s) += 4;\n", reg);
1698: break;
1699: default:
1.1.1.7 ! root 1700: term ();
1.1.1.4 root 1701: }
1702: break;
1703: case Apdi:
1.1.1.7 ! root 1704: addmmufixup (reg);
1.1.1.4 root 1705: printf ("\tm68k_areg (regs, %s) = %sa;\n", reg, name);
1706: break;
1707: default:
1708: break;
1709: }
1.1.1.7 ! root 1710:
! 1711: if (movem == 3) {
! 1712: close_brace ();
! 1713: }
1.1.1.4 root 1714: }
1715:
1.1.1.7 ! root 1716: static void genamode2 (amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags)
1.1.1.4 root 1717: {
1.1.1.7 ! root 1718: genamode2x (mode, reg, size, name, getv, movem, flags, -1);
1.1.1.4 root 1719: }
1720:
1.1.1.7 ! root 1721: static void genamode (struct instr *curi, amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags)
1.1.1.4 root 1722: {
1.1.1.7 ! root 1723: int oldfixup = mmufixupstate;
! 1724: int subhead = 0;
! 1725: if (isce020() && curi) {
! 1726: switch (curi->fetchmode)
! 1727: {
! 1728: case fetchmode_fea:
! 1729: subhead = gence020cycles_fea (mode);
! 1730: break;
! 1731: case fetchmode_cea:
! 1732: subhead = gence020cycles_cea (curi, mode);
! 1733: break;
! 1734: case fetchmode_jea:
! 1735: subhead = gence020cycles_jea (curi, mode);
! 1736: break;
! 1737: }
! 1738: genamode2x (mode, reg, size, name, getv, movem, flags, curi->fetchmode);
! 1739: } else {
! 1740: genamode2 (mode, reg, size, name, getv, movem, flags);
! 1741: }
! 1742: if (using_mmu == 68040 && (oldfixup & 1)) {
! 1743: // we have fixup already active = this genamode call is destination mode and we can now clear previous source fixup.
! 1744: clearmmufixup (0);
! 1745: }
! 1746: if (isce020() && curi)
! 1747: addop_ce020 (curi, subhead);
1.1.1.4 root 1748: }
1.1.1.7 ! root 1749:
! 1750: static void genamode3 (struct instr *curi, amodes mode, const char *reg, wordsizes size, const char *name, int getv, int movem, int flags)
1.1.1.4 root 1751: {
1.1.1.7 ! root 1752: int oldfixup = mmufixupstate;
! 1753: genamode2x (mode, reg, size, name, getv, movem, flags, curi ? curi->fetchmode : -1);
! 1754: if (using_mmu == 68040 && (oldfixup & 1)) {
! 1755: // we have fixup already active = this genamode call is destination mode and we can now clear previous source fixup.
! 1756: clearmmufixup (0);
! 1757: }
1.1.1.4 root 1758: }
1.1.1.7 ! root 1759:
! 1760: static void genamodedual (struct instr *curi, amodes smode, const char *sreg, wordsizes ssize, const char *sname, int sgetv, int sflags,
! 1761: amodes dmode, const char *dreg, wordsizes dsize, const char *dname, int dgetv, int dflags)
1.1.1.4 root 1762: {
1.1.1.7 ! root 1763: int subhead = 0;
! 1764: bool eadmode = false;
! 1765:
! 1766: if (isce020()) {
! 1767: switch (curi->fetchmode)
! 1768: {
! 1769: case fetchmode_fea:
! 1770: if (smode >= imm || isreg (smode)) {
! 1771: subhead = gence020cycles_fea (dmode);
! 1772: eadmode = true;
! 1773: } else {
! 1774: subhead = gence020cycles_fea (smode);
! 1775: }
! 1776: break;
! 1777: case fetchmode_cea:
! 1778: subhead = gence020cycles_cea (curi, smode);
! 1779: break;
! 1780: case fetchmode_fiea:
! 1781: subhead = gence020cycles_fiea (curi, ssize, dmode);
! 1782: break;
! 1783: case fetchmode_ciea:
! 1784: subhead = gence020cycles_ciea (curi, ssize, dmode);
! 1785: break;
! 1786: case fetchmode_jea:
! 1787: subhead = gence020cycles_jea (curi, smode);
! 1788: break;
! 1789: default:
! 1790: printf ("\t/* No EA */\n");
! 1791: break;
! 1792: }
! 1793: }
! 1794: subhead_ce020 = subhead;
! 1795: curi_ce020 = curi;
! 1796: genamode3 (curi, smode, sreg, ssize, sname, sgetv, 0, sflags);
! 1797: genamode3 (NULL, dmode, dreg, dsize, dname, dgetv, 0, dflags | (eadmode == true ? GF_OPCE020 : 0));
! 1798: if (eadmode == false)
! 1799: maybeaddop_ce020 (GF_OPCE020);
1.1.1.4 root 1800: }
1801:
1802: static void genastore_2 (const char *from, amodes mode, const char *reg, wordsizes size, const char *to, int store_dir, int flags)
1803: {
1.1.1.7 ! root 1804: if (candormw) {
! 1805: if (strcmp (rmw_varname, to) != 0)
! 1806: candormw = false;
! 1807: }
! 1808: genastore_done = true;
! 1809: returntail (mode != Dreg && mode != Areg);
! 1810:
1.1.1.4 root 1811: switch (mode) {
1812: case Dreg:
1813: switch (size) {
1814: case sz_byte:
1815: printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xff) | ((%s) & 0xff);\n", reg, reg, from);
1816: break;
1817: case sz_word:
1818: printf ("\tm68k_dreg (regs, %s) = (m68k_dreg (regs, %s) & ~0xffff) | ((%s) & 0xffff);\n", reg, reg, from);
1819: break;
1820: case sz_long:
1821: printf ("\tm68k_dreg (regs, %s) = (%s);\n", reg, from);
1822: break;
1823: default:
1.1.1.7 ! root 1824: term ();
1.1.1.4 root 1825: }
1826: break;
1827: case Areg:
1828: switch (size) {
1829: case sz_word:
1830: printf ("\tm68k_areg (regs, %s) = (uae_s32)(uae_s16)(%s);\n", reg, from);
1831: break;
1832: case sz_long:
1833: printf ("\tm68k_areg (regs, %s) = (%s);\n", reg, from);
1834: break;
1835: default:
1.1.1.7 ! root 1836: term ();
1.1.1.4 root 1837: }
1838: break;
1839: case Aind:
1840: case Aipi:
1841: case Apdi:
1842: case Ad16:
1843: case Ad8r:
1844: case absw:
1845: case absl:
1846: case PC16:
1847: case PC8r:
1.1.1.7 ! root 1848: if (!(flags & GF_NOFAULTPC))
! 1849: gen_set_fault_pc ();
! 1850: if (using_ce020 || using_prefetch_020) {
1.1.1.4 root 1851: switch (size) {
1852: case sz_byte:
1853: printf ("\t%s (%sa, %s);\n", dstb, to, from);
1854: count_write++;
1855: break;
1856: case sz_word:
1857: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1858: term ();
1.1.1.4 root 1859: printf ("\t%s (%sa, %s);\n", dstw, to, from);
1860: count_write++;
1861: break;
1862: case sz_long:
1863: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1864: term ();
1.1.1.4 root 1865: printf ("\t%s (%sa, %s);\n", dstl, to, from);
1866: count_write += 2;
1867: break;
1868: default:
1.1.1.7 ! root 1869: term ();
1.1.1.4 root 1870: }
1871: } else if (using_ce) {
1872: switch (size) {
1873: case sz_byte:
1.1.1.7 ! root 1874: check_ipl_again();
! 1875: printf ("\tx_put_byte (%sa, %s);\n", to, from);
1.1.1.4 root 1876: count_write++;
1877: break;
1878: case sz_word:
1879: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1880: term ();
! 1881: check_ipl_again();
! 1882: printf ("\tx_put_word (%sa, %s);\n", to, from);
1.1.1.4 root 1883: count_write++;
1884: break;
1885: case sz_long:
1886: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1887: term ();
! 1888: if (store_dir) {
! 1889: printf ("\t%s (%sa + 2, %s);\n", dstw, to, from);
! 1890: check_ipl_again();
! 1891: printf ("%s (%sa, %s >> 16);\n", dstw, to, from);
! 1892: } else {
! 1893: printf ("\t%s (%sa, %s >> 16);\n", dstw, to, from);
! 1894: check_ipl_again();
! 1895: printf ("\t%s (%sa + 2, %s);\n", dstw, to, from);
! 1896: }
1.1.1.4 root 1897: count_write += 2;
1898: break;
1899: default:
1.1.1.7 ! root 1900: term ();
1.1.1.4 root 1901: }
1902: } else if (using_mmu) {
1903: switch (size) {
1904: case sz_byte:
1905: insn_n_cycles += 4;
1906: if (flags & GF_FC)
1.1.1.5 root 1907: printf ("\tdfc%s_put_byte (%sa, %s);\n", mmu_postfix, to, from);
1.1.1.4 root 1908: else
1.1.1.7 ! root 1909: printf ("\t%s (%sa, %s);\n", (flags & GF_LRMW) ? dstblrmw : (candormw ? dstbrmw : dstb), to, from);
1.1.1.4 root 1910: break;
1911: case sz_word:
1912: insn_n_cycles += 4;
1913: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1914: term ();
1.1.1.4 root 1915: if (flags & GF_FC)
1.1.1.5 root 1916: printf ("\tdfc%s_put_word (%sa, %s);\n", mmu_postfix, to, from);
1.1.1.4 root 1917: else
1.1.1.7 ! root 1918: printf ("\t%s (%sa, %s);\n", (flags & GF_LRMW) ? dstwlrmw : (candormw ? dstwrmw : dstw), to, from);
1.1.1.4 root 1919: break;
1920: case sz_long:
1921: insn_n_cycles += 8;
1922: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1923: term ();
1.1.1.4 root 1924: if (flags & GF_FC)
1.1.1.5 root 1925: printf ("\tdfc%s_put_long (%sa, %s);\n", mmu_postfix, to, from);
1.1.1.4 root 1926: else
1.1.1.7 ! root 1927: printf ("\t%s (%sa, %s);\n", (flags & GF_LRMW) ? dstllrmw : (candormw ? dstlrmw : dstl), to, from);
! 1928: break;
! 1929: default:
! 1930: term ();
! 1931: }
! 1932: } else if (using_prefetch) {
! 1933: switch (size) {
! 1934: case sz_byte:
! 1935: insn_n_cycles += 4;
! 1936: printf ("\t%s (%sa, %s);\n", dstb, to, from);
! 1937: count_write++;
! 1938: break;
! 1939: case sz_word:
! 1940: insn_n_cycles += 4;
! 1941: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
! 1942: term ();
! 1943: printf ("\t%s (%sa, %s);\n", dstw, to, from);
! 1944: count_write++;
! 1945: break;
! 1946: case sz_long:
! 1947: insn_n_cycles += 8;
! 1948: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
! 1949: term ();
! 1950: if (store_dir)
! 1951: printf ("\t%s (%sa + 2, %s); %s (%sa, %s >> 16);\n", dstw, to, from, dstw, to, from);
! 1952: else
! 1953: printf ("\t%s (%sa, %s >> 16); %s (%sa + 2, %s);\n", dstw, to, from, dstw, to, from);
! 1954: count_write += 2;
1.1.1.4 root 1955: break;
1956: default:
1.1.1.7 ! root 1957: term ();
1.1.1.4 root 1958: }
1959: } else {
1960: switch (size) {
1961: case sz_byte:
1962: insn_n_cycles += 4;
1.1.1.7 ! root 1963: printf ("\t%s (%sa, %s);\n", dstb, to, from);
1.1.1.4 root 1964: count_write++;
1965: break;
1966: case sz_word:
1967: insn_n_cycles += 4;
1968: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1969: term ();
! 1970: printf ("\t%s (%sa, %s);\n", dstw, to, from);
1.1.1.4 root 1971: count_write++;
1972: break;
1973: case sz_long:
1974: insn_n_cycles += 8;
1975: if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
1.1.1.7 ! root 1976: term ();
! 1977: printf ("\t%s (%sa, %s);\n", dstl, to, from);
1.1.1.4 root 1978: count_write += 2;
1979: break;
1980: default:
1.1.1.7 ! root 1981: term ();
1.1.1.4 root 1982: }
1983: }
1984: break;
1985: case imm:
1986: case imm0:
1987: case imm1:
1988: case imm2:
1989: case immi:
1.1.1.7 ! root 1990: term ();
1.1.1.4 root 1991: break;
1992: default:
1.1.1.7 ! root 1993: term ();
1.1.1.4 root 1994: }
1995: }
1996:
1997: static void genastore (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
1998: {
1999: genastore_2 (from, mode, reg, size, to, 0, 0);
2000: }
1.1.1.7 ! root 2001: static void genastore_tas (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
! 2002: {
! 2003: genastore_2 (from, mode, reg, size, to, 0, GF_LRMW);
! 2004: }
! 2005: static void genastore_cas (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
! 2006: {
! 2007: genastore_2 (from, mode, reg, size, to, 0, GF_LRMW | GF_NOFAULTPC);
! 2008: }
1.1.1.4 root 2009: static void genastore_rev (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
2010: {
2011: genastore_2 (from, mode, reg, size, to, 1, 0);
2012: }
2013: static void genastore_fc (const char *from, amodes mode, const char *reg, wordsizes size, const char *to)
2014: {
2015: genastore_2 (from, mode, reg, size, to, 1, GF_FC);
2016: }
2017:
1.1.1.7 ! root 2018: static void movem_mmu060 (const char *code, int size, bool put, bool aipi, bool apdi)
! 2019: {
! 2020: const char *index;
! 2021: int dphase;
! 2022: int i;
! 2023: if (apdi) {
! 2024: dphase = 1;
! 2025: index = "movem_index2";
! 2026: } else {
! 2027: dphase = 0;
! 2028: index = "movem_index1";
! 2029: }
! 2030:
! 2031: if (!put) {
! 2032: printf("\tuae_u32 tmp[16];\n");
! 2033: printf("\tint tmpreg[16];\n");
! 2034: printf("\tint idx = 0;\n");
! 2035: for (i = 0; i < 2; i++) {
! 2036: char reg;
! 2037: if (i == dphase)
! 2038: reg = 'd';
! 2039: else
! 2040: reg = 'a';
! 2041: printf ("\twhile (%cmask) {\n", reg);
! 2042: if (apdi)
! 2043: printf ("\t\tsrca -= %d;\n", size);
! 2044: printf ("\t\ttmpreg[idx] = %s[%cmask] + %d;\n", index, reg, i == dphase ? 0 : 8);
! 2045: printf ("\t\ttmp[idx++] = %s;\n", code);
! 2046: if (!apdi)
! 2047: printf ("\t\tsrca += %d;\n", size);
! 2048: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg);
! 2049: printf ("\t}\n");
! 2050: }
! 2051: if (aipi || apdi)
! 2052: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
! 2053: printf ("\twhile (--idx >= 0) {\n");
! 2054: printf ("\t\tregs.regs[tmpreg[idx]] = tmp[idx];\n");
! 2055: printf ("\t}\n");
! 2056: } else {
! 2057: for (i = 0; i < 2; i++) {
! 2058: char reg;
! 2059: if (i == dphase)
! 2060: reg = 'd';
! 2061: else
! 2062: reg = 'a';
! 2063: printf ("\twhile (%cmask) {\n", reg);
! 2064: if (apdi)
! 2065: printf ("\t\tsrca -= %d;\n", size);
! 2066: if (put) {
! 2067: printf ("\t\t%s, m68k_%creg (regs, %s[%cmask]));\n", code, reg, index, reg);
! 2068: } else {
! 2069: printf ("\t\tm68k_%creg (regs, %s[%cmask]) = %s;\n", reg, index, reg, code);
! 2070: }
! 2071: if (!apdi)
! 2072: printf ("\t\tsrca += %d;\n", size);
! 2073: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg);
! 2074: printf ("\t}\n");
! 2075: }
! 2076: if (aipi || apdi)
! 2077: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
! 2078: }
! 2079: }
! 2080:
! 2081: static bool mmu040_special_movem (uae_u16 opcode)
! 2082: {
! 2083: if (using_mmu != 68040)
! 2084: return false;
! 2085: return true;
! 2086: // return (((((opcode >> 3) & 7) == 7) && ((opcode & 7) == 2 || (opcode & 7) == 3)) || ((opcode >> 3) & 7) == 6);
! 2087: }
! 2088:
! 2089: static void movem_mmu040 (const char *code, int size, bool put, bool aipi, bool apdi, uae_u16 opcode)
! 2090: {
! 2091: const char *index;
! 2092: int dphase;
! 2093: int i;
! 2094:
! 2095: if (apdi) {
! 2096: dphase = 1;
! 2097: index = "movem_index2";
! 2098: } else {
! 2099: dphase = 0;
! 2100: index = "movem_index1";
! 2101: }
! 2102:
! 2103: printf ("\tmmu040_movem = 1;\n");
! 2104: printf ("\tmmu040_movem_ea = srca;\n");
! 2105:
! 2106: for (i = 0; i < 2; i++) {
! 2107: char reg;
! 2108: if (i == dphase)
! 2109: reg = 'd';
! 2110: else
! 2111: reg = 'a';
! 2112: printf ("\twhile (%cmask) {\n", reg);
! 2113: if (apdi)
! 2114: printf ("\t\tsrca -= %d;\n", size);
! 2115: if (put) {
! 2116: printf ("\t\t%s, m68k_%creg (regs, %s[%cmask]));\n", code, reg, index, reg);
! 2117: } else {
! 2118: printf ("\t\tm68k_%creg (regs, %s[%cmask]) = %s;\n", reg, index, reg, code);
! 2119: }
! 2120: if (!apdi)
! 2121: printf ("\t\tsrca += %d;\n", size);
! 2122: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg);
! 2123: printf ("\t}\n");
! 2124: }
! 2125: if (aipi || apdi)
! 2126: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
! 2127: printf ("\tmmu040_movem = 0;\n");
! 2128: }
! 2129:
! 2130: /* 68030 MMU does not restore register state if it bus faults.
! 2131: * (also there wouldn't be enough space in stack frame to store all registers)
! 2132: */
! 2133: static void movem_mmu030 (const char *code, int size, bool put, bool aipi, bool apdi)
! 2134: {
! 2135: const char *index;
! 2136: int dphase;
! 2137: int i;
! 2138: if (apdi) {
! 2139: dphase = 1;
! 2140: index = "movem_index2";
! 2141: } else {
! 2142: dphase = 0;
! 2143: index = "movem_index1";
! 2144: }
! 2145: printf ("\tmmu030_state[1] |= MMU030_STATEFLAG1_MOVEM1;\n");
! 2146: printf ("\tint movem_cnt = 0;\n");
! 2147: if (!put) {
! 2148: printf ("\tuae_u32 val;\n");
! 2149: printf ("\tif (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2)\n");
! 2150: printf ("\t\tsrca = mmu030_ad[mmu030_idx].val;\n");
! 2151: printf ("\telse\n");
! 2152: printf ("\t\tmmu030_ad[mmu030_idx].val = srca;\n");
! 2153: }
! 2154: for (i = 0; i < 2; i++) {
! 2155: char reg;
! 2156: if (i == dphase)
! 2157: reg = 'd';
! 2158: else
! 2159: reg = 'a';
! 2160: printf ("\twhile (%cmask) {\n", reg);
! 2161: if (apdi)
! 2162: printf ("\t\tsrca -= %d;\n", size);
! 2163: printf ("\t\tif (mmu030_state[0] == movem_cnt) {\n");
! 2164: printf ("\t\t\tif (mmu030_state[1] & MMU030_STATEFLAG1_MOVEM2) {\n");
! 2165: printf ("\t\t\t\tmmu030_state[1] &= ~MMU030_STATEFLAG1_MOVEM2;\n");
! 2166: if (!put)
! 2167: printf ("\t\t\t\tval = %smmu030_data_buffer;\n", size == 2 ? "(uae_s32)(uae_s16)" : "");
! 2168: printf ("\t\t\t} else {\n");
! 2169: if (put)
! 2170: printf ("\t\t\t\t%s, (mmu030_data_buffer = m68k_%creg (regs, %s[%cmask])));\n", code, reg, index, reg);
! 2171: else
! 2172: printf ("\t\t\t\tval = %s;\n", code);
! 2173: printf ("\t\t\t}\n");
! 2174: if (!put) {
! 2175: printf ("\t\t\tm68k_%creg (regs, %s[%cmask]) = val;\n", reg, index, reg);
! 2176: }
! 2177: printf ("\t\t\tmmu030_state[0]++;\n");
! 2178: printf ("\t\t}\n");
! 2179: if (!apdi)
! 2180: printf ("\t\tsrca += %d;\n", size);
! 2181: printf ("\t\tmovem_cnt++;\n");
! 2182: printf ("\t\t%cmask = movem_next[%cmask];\n", reg, reg);
! 2183: printf ("\t}\n");
! 2184: }
! 2185: if (aipi || apdi)
! 2186: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
! 2187: }
! 2188:
1.1.1.4 root 2189: static void genmovemel (uae_u16 opcode)
2190: {
2191: char getcode[100];
2192: int size = table68k[opcode].size == sz_long ? 4 : 2;
2193:
2194: if (table68k[opcode].size == sz_long) {
1.1.1.7 ! root 2195: sprintf (getcode, "%s (srca)", srcld);
1.1.1.4 root 2196: } else {
1.1.1.7 ! root 2197: sprintf (getcode, "(uae_s32)(uae_s16)%s (srca)", srcwd);
1.1.1.4 root 2198: }
2199: count_read += table68k[opcode].size == sz_long ? 2 : 1;
2200: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1.1.1.7 ! root 2201: printf ("\tuae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
! 2202: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, mmu040_special_movem (opcode) ? 3 : 1, GF_MOVE);
! 2203: addcycles_ce020 (8 - 2);
1.1.1.4 root 2204: start_brace ();
1.1.1.7 ! root 2205: if (using_mmu == 68030) {
! 2206: movem_mmu030 (getcode, size, false, table68k[opcode].dmode == Aipi, false);
! 2207: } else if (using_mmu == 68060) {
! 2208: movem_mmu060 (getcode, size, false, table68k[opcode].dmode == Aipi, false);
! 2209: } else if (using_mmu == 68040) {
! 2210: movem_mmu040 (getcode, size, false, table68k[opcode].dmode == Aipi, false, opcode);
! 2211: } else {
! 2212: printf ("\twhile (dmask) {\n");
! 2213: printf ("\t\tm68k_dreg (regs, movem_index1[dmask]) = %s; srca += %d; dmask = movem_next[dmask];\n", getcode, size);
! 2214: //addcycles_ce020 (1);
! 2215: printf ("\t}\n");
! 2216: printf ("\twhile (amask) {\n");
! 2217: printf ("\t\tm68k_areg (regs, movem_index1[amask]) = %s; srca += %d; amask = movem_next[amask];\n", getcode, size);
! 2218: //addcycles_ce020 (1);
! 2219: printf ("\t}\n");
! 2220: if (table68k[opcode].dmode == Aipi) {
! 2221: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
! 2222: count_read++;
! 2223: }
1.1.1.4 root 2224: }
2225: count_ncycles++;
2226: fill_prefetch_next ();
1.1.1.7 ! root 2227: get_prefetch_020 ();
1.1.1.4 root 2228: }
2229:
2230: static void genmovemel_ce (uae_u16 opcode)
2231: {
2232: int size = table68k[opcode].size == sz_long ? 4 : 2;
2233: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1.1.1.7 ! root 2234: printf ("\tuae_u32 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1.1.1.4 root 2235: printf ("\tuae_u32 v;\n");
2236: if (table68k[opcode].dmode == Ad8r || table68k[opcode].dmode == PC8r)
2237: addcycles000 (2);
1.1.1.7 ! root 2238: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, GF_AA | GF_MOVE);
1.1.1.4 root 2239: start_brace ();
2240: if (table68k[opcode].size == sz_long) {
1.1.1.7 ! root 2241: printf ("\twhile (dmask) {\n");
! 2242: printf ("\t\tv = %s (srca) << 16;\n", srcw);
! 2243: printf ("\t\tv |= %s (srca + 2);\n", srcw);
! 2244: printf ("\t\tm68k_dreg (regs, movem_index1[dmask]) = v;\n");
! 2245: printf ("\t\tsrca += %d;\n", size);
! 2246: printf ("\t\tdmask = movem_next[dmask];\n");
! 2247: addcycles000_nonce("\t\t", 8);
! 2248: printf ("\t}\n");
! 2249: printf ("\twhile (amask) {\n");
! 2250: printf ("\t\tv = %s (srca) << 16;\n", srcw);
! 2251: printf ("\t\tv |= %s (srca + 2);\n", srcw);
! 2252: printf ("\t\tm68k_areg (regs, movem_index1[amask]) = v;\n");
! 2253: printf ("\t\tsrca += %d;\n", size);
! 2254: printf ("\t\tamask = movem_next[amask];\n");
! 2255: addcycles000_nonce("\t\t", 8);
! 2256: printf ("\t}\n");
1.1.1.4 root 2257: } else {
1.1.1.7 ! root 2258: printf ("\twhile (dmask) {\n");
! 2259: printf ("\t\tm68k_dreg (regs, movem_index1[dmask]) = (uae_s32)(uae_s16)%s (srca);\n", srcw);
! 2260: printf ("\t\tsrca += %d;\n", size);
! 2261: printf ("\t\tdmask = movem_next[dmask];\n");
! 2262: addcycles000_nonce("\t\t", 4);
! 2263: printf ("\t}\n");
! 2264: printf ("\twhile (amask) {\n");
! 2265: printf ("\t\tm68k_areg (regs, movem_index1[amask]) = (uae_s32)(uae_s16)%s (srca);\n", srcw);
! 2266: printf ("\t\tsrca += %d;\n", size);
! 2267: printf ("\t\tamask = movem_next[amask];\n");
! 2268: addcycles000_nonce("\t\t", 4);
! 2269: printf ("\t}\n");
1.1.1.4 root 2270: }
1.1.1.7 ! root 2271: printf ("\t%s (srca);\n", srcw); // and final extra word fetch that goes nowhere..
1.1.1.4 root 2272: count_read++;
2273: if (table68k[opcode].dmode == Aipi)
2274: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
2275: count_ncycles++;
2276: fill_prefetch_next ();
2277: }
2278:
2279: static void genmovemle (uae_u16 opcode)
2280: {
2281: char putcode[100];
2282: int size = table68k[opcode].size == sz_long ? 4 : 2;
2283:
2284: if (table68k[opcode].size == sz_long) {
1.1.1.7 ! root 2285: sprintf (putcode, "%s (srca", dstld);
1.1.1.4 root 2286: } else {
1.1.1.7 ! root 2287: sprintf (putcode, "%s (srca", dstwd);
1.1.1.4 root 2288: }
2289: count_write += table68k[opcode].size == sz_long ? 2 : 1;
2290:
2291: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
1.1.1.7 ! root 2292: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, mmu040_special_movem (opcode) ? 3 : 1, GF_MOVE);
! 2293: addcycles_ce020 (4 - 2);
1.1.1.4 root 2294: start_brace ();
1.1.1.7 ! root 2295: if (using_mmu >= 68030) {
! 2296: if (table68k[opcode].dmode == Apdi)
! 2297: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
! 2298: else
! 2299: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
! 2300: if (using_mmu == 68030)
! 2301: movem_mmu030 (putcode, size, true, false, table68k[opcode].dmode == Apdi);
! 2302: else if (using_mmu == 68060)
! 2303: movem_mmu060 (putcode, size, true, false, table68k[opcode].dmode == Apdi);
! 2304: else if (using_mmu == 68040)
! 2305: movem_mmu040 (putcode, size, true, false, table68k[opcode].dmode == Apdi, opcode);
1.1.1.4 root 2306: } else {
1.1.1.7 ! root 2307: if (table68k[opcode].dmode == Apdi) {
! 2308: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
! 2309: if (!using_mmu)
! 2310: printf ("\tint type = get_cpu_model () >= 68020;\n");
! 2311: printf ("\twhile (amask) {\n");
! 2312: printf ("\t\tsrca -= %d;\n", size);
! 2313:
! 2314: printf ("\t\tif (!type || movem_index2[amask] != dstreg)\n");
! 2315: printf ("\t\t\t%s, m68k_areg (regs, movem_index2[amask]));\n", putcode);
! 2316: printf ("\t\telse\n");
! 2317: printf ("\t\t\t%s, m68k_areg (regs, movem_index2[amask]) - %d);\n", putcode, size);
1.1.1.4 root 2318:
1.1.1.7 ! root 2319: printf ("\t\tamask = movem_next[amask];\n");
! 2320: printf ("\t}\n");
! 2321: printf ("\twhile (dmask) { srca -= %d; %s, m68k_dreg (regs, movem_index2[dmask])); dmask = movem_next[dmask]; }\n",
! 2322: size, putcode);
! 2323: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
! 2324: } else {
! 2325: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
! 2326: printf ("\twhile (dmask) { %s, m68k_dreg (regs, movem_index1[dmask])); srca += %d; dmask = movem_next[dmask]; }\n",
! 2327: putcode, size);
! 2328: printf ("\twhile (amask) { %s, m68k_areg (regs, movem_index1[amask])); srca += %d; amask = movem_next[amask]; }\n",
! 2329: putcode, size);
! 2330: }
1.1.1.4 root 2331: }
1.1.1.7 ! root 2332: count_ncycles++;
1.1.1.4 root 2333: fill_prefetch_next ();
1.1.1.7 ! root 2334: get_prefetch_020 ();
1.1.1.4 root 2335: }
2336:
2337: static void genmovemle_ce (uae_u16 opcode)
2338: {
2339: int size = table68k[opcode].size == sz_long ? 4 : 2;
2340:
1.1.1.7 ! root 2341: printf ("\tuae_u16 mask = %s;\n", gen_nextiword (0));
! 2342: if (table68k[opcode].dmode == Ad8r || table68k[opcode].dmode == PC8r)
1.1.1.4 root 2343: addcycles000 (2);
1.1.1.7 ! root 2344: genamode (NULL, table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1, GF_AA | GF_MOVE);
1.1.1.4 root 2345: start_brace ();
2346: if (table68k[opcode].size == sz_long) {
2347: if (table68k[opcode].dmode == Apdi) {
2348: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
1.1.1.7 ! root 2349: printf ("\twhile (amask) {\n");
! 2350: printf ("\t\tsrca -= %d;\n", size);
! 2351: printf ("\t\t%s (srca, m68k_areg (regs, movem_index2[amask]) >> 16);\n", dstw);
! 2352: printf ("\t\t%s (srca + 2, m68k_areg (regs, movem_index2[amask]));\n", dstw);
! 2353: printf ("\t\tamask = movem_next[amask];\n");
! 2354: addcycles000_nonce("\t\t", 8);
! 2355: printf ("\t}\n");
! 2356: printf ("\twhile (dmask) {\n");
! 2357: printf ("\t\tsrca -= %d;\n", size);
! 2358: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index2[dmask]) >> 16);\n", dstw);
! 2359: printf ("\t\t%s (srca + 2, m68k_dreg (regs, movem_index2[dmask]));\n", dstw);
! 2360: printf ("\t\tdmask = movem_next[dmask];\n");
! 2361: addcycles000_nonce("\t\t", 8);
! 2362: printf ("\t}\n");
1.1.1.4 root 2363: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
2364: } else {
2365: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1.1.1.7 ! root 2366: printf ("\twhile (dmask) {\n");
! 2367: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index1[dmask]) >> 16);\n", dstw);
! 2368: printf ("\t\t%s (srca + 2, m68k_dreg (regs, movem_index1[dmask]));\n", dstw);
! 2369: printf ("\t\tsrca += %d;\n", size);
! 2370: printf ("\t\tdmask = movem_next[dmask];\n");
! 2371: addcycles000_nonce("\t\t", 8);
! 2372: printf ("\t}\n");
! 2373: printf ("\twhile (amask) {\n");
! 2374: printf ("\t\t%s (srca, m68k_areg (regs, movem_index1[amask]) >> 16);\n", dstw);
! 2375: printf ("\t\t%s (srca + 2, m68k_areg (regs, movem_index1[amask]));\n", dstw);
! 2376: printf ("\t\tsrca += %d;\n", size);
! 2377: printf ("\t\tamask = movem_next[amask];\n");
! 2378: addcycles000_nonce("\t\t", 8);
! 2379: printf ("\t}\n");
1.1.1.4 root 2380: }
2381: } else {
2382: if (table68k[opcode].dmode == Apdi) {
2383: printf ("\tuae_u16 amask = mask & 0xff, dmask = (mask >> 8) & 0xff;\n");
1.1.1.7 ! root 2384: printf ("\twhile (amask) {\n");
! 2385: printf ("\t\tsrca -= %d;\n", size);
! 2386: printf ("\t\t%s (srca, m68k_areg (regs, movem_index2[amask]));\n", dstw);
! 2387: printf ("\tamask = movem_next[amask];\n");
! 2388: addcycles000_nonce("\t\t", 4);
! 2389: printf ("\t}\n");
! 2390: printf ("\twhile (dmask) {\n");
! 2391: printf ("\t\tsrca -= %d;\n", size);
! 2392: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index2[dmask]));\n", dstw);
! 2393: printf ("\t\tdmask = movem_next[dmask];\n");
! 2394: addcycles000_nonce("\t\t", 4);
! 2395: printf ("\t}\n");
1.1.1.4 root 2396: printf ("\tm68k_areg (regs, dstreg) = srca;\n");
2397: } else {
2398: printf ("\tuae_u16 dmask = mask & 0xff, amask = (mask >> 8) & 0xff;\n");
1.1.1.7 ! root 2399: printf ("\twhile (dmask) {\n");
! 2400: printf ("\t\t%s (srca, m68k_dreg (regs, movem_index1[dmask]));\n", dstw);
! 2401: printf ("\t\tsrca += %d;\n", size);
! 2402: printf ("\t\tdmask = movem_next[dmask];\n");
! 2403: addcycles000_nonce("\t\t", 4);
! 2404: printf ("\t}\n");
! 2405: printf ("\twhile (amask) {\n");
! 2406: printf ("\t\t%s (srca, m68k_areg (regs, movem_index1[amask]));\n", dstw);
! 2407: printf ("\t\tsrca += %d;\n", size);
! 2408: printf ("\t\tamask = movem_next[amask];\n");
! 2409: addcycles000_nonce("\t\t", 4);
! 2410: printf ("\t}\n");
1.1.1.4 root 2411: }
2412: }
2413: count_ncycles++;
2414: fill_prefetch_next ();
2415: }
2416:
2417: static void duplicate_carry (int n)
2418: {
2419: int i;
2420: for (i = 0; i <= n; i++)
2421: printf ("\t");
2422: printf ("COPY_CARRY ();\n");
2423: }
2424:
2425: typedef enum
2426: {
2427: flag_logical_noclobber, flag_logical, flag_add, flag_sub, flag_cmp, flag_addx, flag_subx, flag_z, flag_zn,
2428: flag_av, flag_sv
2429: }
2430: flagtypes;
2431:
2432: static void genflags_normal (flagtypes type, wordsizes size, const char *value, const char *src, const char *dst)
2433: {
2434: char vstr[100], sstr[100], dstr[100];
2435: char usstr[100], udstr[100];
2436: char unsstr[100], undstr[100];
2437:
2438: switch (size) {
2439: case sz_byte:
2440: strcpy (vstr, "((uae_s8)(");
2441: strcpy (usstr, "((uae_u8)(");
2442: break;
2443: case sz_word:
2444: strcpy (vstr, "((uae_s16)(");
2445: strcpy (usstr, "((uae_u16)(");
2446: break;
2447: case sz_long:
2448: strcpy (vstr, "((uae_s32)(");
2449: strcpy (usstr, "((uae_u32)(");
2450: break;
2451: default:
1.1.1.7 ! root 2452: term ();
1.1.1.4 root 2453: }
2454: strcpy (unsstr, usstr);
2455:
2456: strcpy (sstr, vstr);
2457: strcpy (dstr, vstr);
2458: strcat (vstr, value);
2459: strcat (vstr, "))");
2460: strcat (dstr, dst);
2461: strcat (dstr, "))");
2462: strcat (sstr, src);
2463: strcat (sstr, "))");
2464:
2465: strcpy (udstr, usstr);
2466: strcat (udstr, dst);
2467: strcat (udstr, "))");
2468: strcat (usstr, src);
2469: strcat (usstr, "))");
2470:
2471: strcpy (undstr, unsstr);
2472: strcat (unsstr, "-");
2473: strcat (undstr, "~");
2474: strcat (undstr, dst);
2475: strcat (undstr, "))");
2476: strcat (unsstr, src);
2477: strcat (unsstr, "))");
2478:
2479: switch (type) {
2480: case flag_logical_noclobber:
2481: case flag_logical:
2482: case flag_z:
2483: case flag_zn:
2484: case flag_av:
2485: case flag_sv:
2486: case flag_addx:
2487: case flag_subx:
2488: break;
2489:
2490: case flag_add:
2491: start_brace ();
1.1.1.7 ! root 2492: printf ("uae_u32 %s = %s + %s;\n", value, udstr, usstr);
1.1.1.4 root 2493: break;
2494: case flag_sub:
2495: case flag_cmp:
2496: start_brace ();
1.1.1.7 ! root 2497: printf ("uae_u32 %s = %s - %s;\n", value, udstr, usstr);
1.1.1.4 root 2498: break;
2499: }
2500:
2501: switch ((int)type) {
2502: case flag_logical_noclobber:
2503: case flag_logical:
2504: case flag_zn:
2505: break;
2506:
2507: case flag_add:
2508: case flag_sub:
2509: case flag_addx:
2510: case flag_subx:
2511: case flag_cmp:
2512: case flag_av:
2513: case flag_sv:
2514: start_brace ();
2515: printf ("\t" BOOL_TYPE " flgs = %s < 0;\n", sstr);
2516: printf ("\t" BOOL_TYPE " flgo = %s < 0;\n", dstr);
2517: printf ("\t" BOOL_TYPE " flgn = %s < 0;\n", vstr);
2518: break;
2519: }
2520:
2521: switch (type) {
2522: case flag_logical:
2523: printf ("\tCLEAR_CZNV ();\n");
1.1.1.7 ! root 2524: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
! 2525: printf ("\tSET_NFLG (%s < 0);\n", vstr);
1.1.1.4 root 2526: break;
2527: case flag_logical_noclobber:
2528: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
2529: printf ("\tSET_NFLG (%s < 0);\n", vstr);
2530: break;
2531: case flag_av:
2532: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
2533: break;
2534: case flag_sv:
2535: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
2536: break;
2537: case flag_z:
2538: printf ("\tSET_ZFLG (GET_ZFLG () & (%s == 0));\n", vstr);
2539: break;
2540: case flag_zn:
2541: printf ("\tSET_ZFLG (GET_ZFLG () & (%s == 0));\n", vstr);
2542: printf ("\tSET_NFLG (%s < 0);\n", vstr);
2543: break;
2544: case flag_add:
2545: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
2546: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n");
2547: printf ("\tSET_CFLG (%s < %s);\n", undstr, usstr);
2548: duplicate_carry (0);
2549: printf ("\tSET_NFLG (flgn != 0);\n");
2550: break;
2551: case flag_sub:
2552: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
2553: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgn ^ flgo));\n");
2554: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
2555: duplicate_carry (0);
2556: printf ("\tSET_NFLG (flgn != 0);\n");
2557: break;
2558: case flag_addx:
2559: printf ("\tSET_VFLG ((flgs ^ flgn) & (flgo ^ flgn));\n"); /* minterm SON: 0x42 */
2560: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgo) & (flgo ^ flgn)));\n"); /* minterm SON: 0xD4 */
2561: duplicate_carry (0);
2562: break;
2563: case flag_subx:
2564: printf ("\tSET_VFLG ((flgs ^ flgo) & (flgo ^ flgn));\n"); /* minterm SON: 0x24 */
2565: printf ("\tSET_CFLG (flgs ^ ((flgs ^ flgn) & (flgo ^ flgn)));\n"); /* minterm SON: 0xB2 */
2566: duplicate_carry (0);
2567: break;
2568: case flag_cmp:
2569: printf ("\tSET_ZFLG (%s == 0);\n", vstr);
2570: printf ("\tSET_VFLG ((flgs != flgo) && (flgn != flgo));\n");
2571: printf ("\tSET_CFLG (%s > %s);\n", usstr, udstr);
2572: printf ("\tSET_NFLG (flgn != 0);\n");
2573: break;
2574: }
2575: }
2576:
2577: static void genflags (flagtypes type, wordsizes size, const char *value, const char *src, const char *dst)
2578: {
2579: /* Temporarily deleted 68k/ARM flag optimizations. I'd prefer to have
2580: them in the appropriate m68k.h files and use just one copy of this
2581: code here. The API can be changed if necessary. */
2582: if (optimized_flags) {
2583: switch (type) {
2584: case flag_add:
2585: case flag_sub:
2586: start_brace ();
2587: printf ("\tuae_u32 %s;\n", value);
2588: break;
2589:
2590: default:
2591: break;
2592: }
2593:
2594: /* At least some of those casts are fairly important! */
2595: switch (type) {
2596: case flag_logical_noclobber:
2597: printf ("\t{uae_u32 oldcznv = GET_CZNV & ~(FLAGVAL_Z | FLAGVAL_N);\n");
2598: if (strcmp (value, "0") == 0) {
2599: printf ("\tSET_CZNV (olcznv | FLAGVAL_Z);\n");
2600: } else {
1.1.1.7 ! root 2601: switch ((int)size) {
1.1.1.4 root 2602: case sz_byte: printf ("\toptflag_testb (regs, (uae_s8)(%s));\n", value); break;
2603: case sz_word: printf ("\toptflag_testw (regs, (uae_s16)(%s));\n", value); break;
2604: case sz_long: printf ("\toptflag_testl (regs, (uae_s32)(%s));\n", value); break;
2605: }
2606: printf ("\tIOR_CZNV (oldcznv);\n");
2607: }
2608: printf ("\t}\n");
2609: return;
2610: case flag_logical:
2611: if (strcmp (value, "0") == 0) {
2612: printf ("\tSET_CZNV (FLAGVAL_Z);\n");
2613: } else {
1.1.1.7 ! root 2614: switch ((int)size) {
1.1.1.4 root 2615: case sz_byte: printf ("\toptflag_testb (regs, (uae_s8)(%s));\n", value); break;
2616: case sz_word: printf ("\toptflag_testw (regs, (uae_s16)(%s));\n", value); break;
2617: case sz_long: printf ("\toptflag_testl (regs, (uae_s32)(%s));\n", value); break;
2618: }
2619: }
2620: return;
2621:
2622: case flag_add:
1.1.1.7 ! root 2623: switch ((int)size) {
1.1.1.4 root 2624: case sz_byte: printf ("\toptflag_addb (regs, %s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
2625: case sz_word: printf ("\toptflag_addw (regs, %s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
2626: case sz_long: printf ("\toptflag_addl (regs, %s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
2627: }
2628: return;
2629:
2630: case flag_sub:
1.1.1.7 ! root 2631: switch ((int)size) {
1.1.1.4 root 2632: case sz_byte: printf ("\toptflag_subb (regs, %s, (uae_s8)(%s), (uae_s8)(%s));\n", value, src, dst); break;
2633: case sz_word: printf ("\toptflag_subw (regs, %s, (uae_s16)(%s), (uae_s16)(%s));\n", value, src, dst); break;
2634: case sz_long: printf ("\toptflag_subl (regs, %s, (uae_s32)(%s), (uae_s32)(%s));\n", value, src, dst); break;
2635: }
2636: return;
2637:
2638: case flag_cmp:
1.1.1.7 ! root 2639: switch ((int)size) {
1.1.1.4 root 2640: case sz_byte: printf ("\toptflag_cmpb (regs, (uae_s8)(%s), (uae_s8)(%s));\n", src, dst); break;
2641: case sz_word: printf ("\toptflag_cmpw (regs, (uae_s16)(%s), (uae_s16)(%s));\n", src, dst); break;
2642: case sz_long: printf ("\toptflag_cmpl (regs, (uae_s32)(%s), (uae_s32)(%s));\n", src, dst); break;
2643: }
2644: return;
2645:
2646: default:
2647: break;
2648: }
2649: }
2650:
2651: genflags_normal (type, size, value, src, dst);
2652: }
2653:
2654: static void force_range_for_rox (const char *var, wordsizes size)
2655: {
2656: /* Could do a modulo operation here... which one is faster? */
1.1.1.7 ! root 2657: switch ((int)size) {
1.1.1.4 root 2658: case sz_long:
2659: printf ("\tif (%s >= 33) %s -= 33;\n", var, var);
2660: break;
2661: case sz_word:
2662: printf ("\tif (%s >= 34) %s -= 34;\n", var, var);
2663: printf ("\tif (%s >= 17) %s -= 17;\n", var, var);
2664: break;
2665: case sz_byte:
2666: printf ("\tif (%s >= 36) %s -= 36;\n", var, var);
2667: printf ("\tif (%s >= 18) %s -= 18;\n", var, var);
2668: printf ("\tif (%s >= 9) %s -= 9;\n", var, var);
2669: break;
2670: }
2671: }
2672:
2673: static const char *cmask (wordsizes size)
2674: {
2675: switch (size) {
2676: case sz_byte: return "0x80";
2677: case sz_word: return "0x8000";
2678: case sz_long: return "0x80000000";
1.1.1.7 ! root 2679: default: term ();
1.1.1.4 root 2680: }
2681: }
2682:
2683: static int source_is_imm1_8 (struct instr *i)
2684: {
2685: return i->stype == 3;
2686: }
2687:
2688: static void shift_ce (amodes dmode, int size)
2689: {
1.1.1.7 ! root 2690: if (isreg (dmode)) {
1.1.1.4 root 2691: int c = size == sz_long ? 4 : 2;
1.1.1.7 ! root 2692: if (using_ce) {
! 2693: printf ("\t{\n");
! 2694: printf ("\t\tint cycles = %d;\n", c);
! 2695: printf ("\t\tcycles += 2 * ccnt;\n");
! 2696: addcycles000_3 ("\t\t");
! 2697: printf ("\t}\n");
! 2698: }
! 2699: addcycles000_nonces("\t", "2 * ccnt");
1.1.1.4 root 2700: count_cycles += c;
1.1.1.7 ! root 2701: count_ncycles++;
1.1.1.4 root 2702: }
2703: }
2704:
1.1.1.7 ! root 2705: // BCHG/BSET/BCLR Dx,Dx or #xx,Dx adds 2 cycles if bit number > 15
1.1.1.4 root 2706: static void bsetcycles (struct instr *curi)
2707: {
2708: if (curi->size == sz_byte) {
2709: printf ("\tsrc &= 7;\n");
2710: } else {
2711: printf ("\tsrc &= 31;\n");
2712: if (isreg (curi->dmode)) {
2713: addcycles000 (2);
1.1.1.7 ! root 2714: if (curi->mnemo != i_BTST) {
! 2715: if (using_ce)
! 2716: printf ("\tif (src > 15) %s (2);\n", do_cycles);
! 2717: addcycles000_nonce("\tif (src > 15) ", 2);
1.1.1.4 root 2718: count_ncycles++;
2719: }
2720: }
2721: }
2722: }
2723:
2724: static int islongimm (struct instr *curi)
2725: {
1.1.1.7 ! root 2726: return (curi->size == sz_long && (curi->smode == Dreg || curi->smode == imm || curi->smode == Areg));
1.1.1.4 root 2727: }
2728:
2729:
1.1.1.7 ! root 2730: static void resetvars (void)
! 2731: {
1.1.1.4 root 2732: insn_n_cycles = using_prefetch ? 0 : 4;
1.1.1.7 ! root 2733: insn_n_cycles020 = 0;
! 2734: genamode_cnt = 0;
! 2735: genamode8r_offset[0] = genamode8r_offset[1] = 0;
! 2736: m68k_pc_total = 0;
! 2737: branch_inst = 0;
! 2738:
! 2739: ir2irc = 0;
! 2740: mmufixupcnt = 0;
! 2741: mmufixupstate = 0;
! 2742: disp020cnt = 0;
! 2743: candormw = false;
! 2744: genastore_done = false;
! 2745: rmw_varname[0] = 0;
! 2746: tail_ce020 = 0;
! 2747: total_ce020 = 0;
! 2748: tail_ce020_done = false;
! 2749: head_in_ea_ce020 = 0;
! 2750: head_ce020_cycs_done = false;
! 2751: no_prefetch_ce020 = false;
! 2752: got_ea_ce020 = false;
! 2753:
! 2754: prefetch_long = NULL;
! 2755: srcli = NULL;
! 2756: srcbi = NULL;
! 2757: disp000 = "get_disp_ea_000";
! 2758: disp020 = "get_disp_ea_020";
! 2759: nextw = NULL;
! 2760: nextl = NULL;
! 2761: do_cycles = "do_cycles";
! 2762: srcwd = srcld = NULL;
! 2763: dstwd = dstld = NULL;
! 2764: srcblrmw = NULL;
! 2765: srcwlrmw = NULL;
! 2766: srcllrmw = NULL;
! 2767: dstblrmw = NULL;
! 2768: dstwlrmw = NULL;
! 2769: dstllrmw = NULL;
! 2770: getpc = "m68k_getpc ()";
! 2771:
! 2772: if (using_indirect) {
! 2773: // tracer
! 2774: getpc = "m68k_getpci ()";
! 2775: if (!using_ce020 && !using_prefetch_020 && !using_ce) {
! 2776: // generic + indirect
! 2777: disp020 = "x_get_disp_ea_020";
! 2778: prefetch_long = "get_iilong_jit";
! 2779: prefetch_word = "get_iiword_jit";
! 2780: nextw = "next_iiword_jit";
! 2781: nextl = "next_iilong_jit";
! 2782: srcli = "get_iilong_jit";
! 2783: srcwi = "get_iiword_jit";
! 2784: srcbi = "get_iibyte_jit";
! 2785: srcl = "x_get_long";
! 2786: dstl = "x_put_long";
! 2787: srcw = "x_get_word";
! 2788: dstw = "x_put_word";
! 2789: srcb = "x_get_byte";
! 2790: dstb = "x_put_byte";
! 2791: getpc = "m68k_getpc()"; // special jit support
! 2792: } else if (!using_ce020 && !using_prefetch_020) {
! 2793: prefetch_word = "get_word_ce000_prefetch";
! 2794: srcli = "x_get_ilong";
! 2795: srcwi = "x_get_iword";
! 2796: srcbi = "x_get_ibyte";
! 2797: srcl = "x_get_long";
! 2798: dstl = "x_put_long";
! 2799: srcw = "x_get_word";
! 2800: dstw = "x_put_word";
! 2801: srcb = "x_get_byte";
! 2802: dstb = "x_put_byte";
! 2803: do_cycles = "do_cycles_ce000_internal";
! 2804: } else if (using_ce020 == 1) {
! 2805: /* x_ not used if it redirects to
! 2806: * get_word_ce020_prefetch()
! 2807: */
! 2808: disp020 = "x_get_disp_ea_ce020";
! 2809: prefetch_word = "get_word_ce020_prefetch";
! 2810: prefetch_long = "get_long_ce020_prefetch";
! 2811: srcli = "x_get_ilong";
! 2812: srcwi = "x_get_iword";
! 2813: srcbi = "x_get_ibyte";
! 2814: srcl = "x_get_long";
! 2815: dstl = "x_put_long";
! 2816: srcw = "x_get_word";
! 2817: dstw = "x_put_word";
! 2818: srcb = "x_get_byte";
! 2819: dstb = "x_put_byte";
! 2820: do_cycles = "do_cycles_ce020_internal";
! 2821: nextw = "next_iword_020ce";
! 2822: nextl = "next_ilong_020ce";
! 2823: } else if (using_ce020 == 2) {
! 2824: // 68030 CE
! 2825: disp020 = "x_get_disp_ea_ce030";
! 2826: prefetch_long = "get_long_ce030_prefetch";
! 2827: prefetch_word = "get_word_ce030_prefetch";
! 2828: srcli = "x_get_ilong";
! 2829: srcwi = "x_get_iword";
! 2830: srcbi = "x_get_ibyte";
! 2831: srcl = "x_get_long";
! 2832: dstl = "x_put_long";
! 2833: srcw = "x_get_word";
! 2834: dstw = "x_put_word";
! 2835: srcb = "x_get_byte";
! 2836: dstb = "x_put_byte";
! 2837: do_cycles = "do_cycles_ce020_internal";
! 2838: nextw = "next_iword_030ce";
! 2839: nextl = "next_ilong_030ce";
! 2840: } else if (using_ce020 == 3) {
! 2841: // 68040/060 CE
! 2842: disp020 = "x_get_disp_ea_040";
! 2843: prefetch_long = "get_ilong_cache_040";
! 2844: prefetch_word = "get_iword_cache_040";
! 2845: srcli = "x_get_ilong";
! 2846: srcwi = "x_get_iword";
! 2847: srcbi = "x_get_ibyte";
! 2848: srcl = "x_get_long";
! 2849: dstl = "x_put_long";
! 2850: srcw = "x_get_word";
! 2851: dstw = "x_put_word";
! 2852: srcb = "x_get_byte";
! 2853: dstb = "x_put_byte";
! 2854: do_cycles = "do_cycles_ce020_internal";
! 2855: nextw = "next_iword_cache040";
! 2856: nextl = "next_ilong_cache040";
! 2857: } else if (using_prefetch_020 == 1) {
! 2858: disp020 = "x_get_disp_ea_020";
! 2859: prefetch_word = "get_word_020_prefetch";
! 2860: prefetch_long = "get_long_020_prefetch";
! 2861: srcli = "x_get_ilong";
! 2862: srcwi = "x_get_iword";
! 2863: srcbi = "x_get_ibyte";
! 2864: srcl = "x_get_long";
! 2865: dstl = "x_put_long";
! 2866: srcw = "x_get_word";
! 2867: dstw = "x_put_word";
! 2868: srcb = "x_get_byte";
! 2869: dstb = "x_put_byte";
! 2870: nextw = "next_iword_020_prefetch";
! 2871: nextl = "next_ilong_020_prefetch";
! 2872: } else if (using_prefetch_020 == 2) {
! 2873: disp020 = "x_get_disp_ea_020";
! 2874: prefetch_word = "get_word_030_prefetch";
! 2875: prefetch_long = "get_long_030_prefetch";
! 2876: srcli = "x_get_ilong";
! 2877: srcwi = "x_get_iword";
! 2878: srcbi = "x_get_ibyte";
! 2879: srcl = "x_get_long";
! 2880: dstl = "x_put_long";
! 2881: srcw = "x_get_word";
! 2882: dstw = "x_put_word";
! 2883: srcb = "x_get_byte";
! 2884: dstb = "x_put_byte";
! 2885: nextw = "next_iword_030_prefetch";
! 2886: nextl = "next_ilong_030_prefetch";
! 2887: }
! 2888: #if 0
! 2889: } else if (using_ce020) {
! 2890: disp020 = "x_get_disp_ea_020";
! 2891: do_cycles = "do_cycles_ce020";
1.1.1.4 root 2892: if (using_ce020 == 2) {
1.1.1.7 ! root 2893: // 68030/40/60 CE
! 2894: prefetch_long = "get_long_ce030_prefetch";
! 2895: prefetch_word = "get_word_ce030_prefetch";
! 2896: nextw = "next_iword_030ce";
! 2897: nextl = "next_ilong_030ce";
! 2898: srcli = "get_word_ce030_prefetch";
! 2899: srcwi = "get_long_ce030_prefetch";
1.1.1.4 root 2900: srcl = "get_long_ce030";
2901: dstl = "put_long_ce030";
2902: srcw = "get_word_ce030";
2903: dstw = "put_word_ce030";
2904: srcb = "get_byte_ce030";
2905: dstb = "put_byte_ce030";
2906: } else {
1.1.1.7 ! root 2907: // 68020 CE
! 2908: prefetch_long = "get_long_ce020_prefetch";
! 2909: prefetch_word = "get_word_ce020_prefetch";
! 2910: nextw = "next_iword_020ce";
! 2911: nextl = "next_ilong_020ce";
! 2912: srcli = "get_word_ce020_prefetch";
! 2913: srcwi = "get_long_ce020_prefetch";
1.1.1.4 root 2914: srcl = "get_long_ce020";
2915: dstl = "put_long_ce020";
2916: srcw = "get_word_ce020";
2917: dstw = "put_word_ce020";
2918: srcb = "get_byte_ce020";
2919: dstb = "put_byte_ce020";
2920: }
1.1.1.7 ! root 2921: #endif
! 2922: } else if (using_mmu == 68030) {
! 2923: // 68030 MMU
! 2924: disp020 = "get_disp_ea_020_mmu030";
! 2925: prefetch_long = "get_ilong_mmu030_state";
! 2926: prefetch_word = "get_iword_mmu030_state";
! 2927: nextw = "next_iword_mmu030_state";
! 2928: nextl = "next_ilong_mmu030_state";
! 2929: srcli = "get_ilong_mmu030_state";
! 2930: srcwi = "get_iword_mmu030_state";
! 2931: srcbi = "get_ibyte_mmu030_state";
! 2932: srcl = "get_long_mmu030_state";
! 2933: dstl = "put_long_mmu030_state";
! 2934: srcw = "get_word_mmu030_state";
! 2935: dstw = "put_word_mmu030_state";
! 2936: srcb = "get_byte_mmu030_state";
! 2937: dstb = "put_byte_mmu030_state";
! 2938: srcblrmw = "get_lrmw_byte_mmu030_state";
! 2939: srcwlrmw = "get_lrmw_word_mmu030_state";
! 2940: srcllrmw = "get_lrmw_long_mmu030_state";
! 2941: dstblrmw = "put_lrmw_byte_mmu030_state";
! 2942: dstwlrmw = "put_lrmw_word_mmu030_state";
! 2943: dstllrmw = "put_lrmw_long_mmu030_state";
! 2944: srcld = "get_long_mmu030";
! 2945: srcwd = "get_word_mmu030";
! 2946: dstld = "put_long_mmu030";
! 2947: dstwd = "put_word_mmu030";
! 2948: getpc = "m68k_getpci ()";
! 2949: } else if (using_mmu == 68040) {
! 2950: // 68040 MMU
! 2951: disp020 = "x_get_disp_ea_020";
! 2952: prefetch_long = "get_ilong_mmu040";
! 2953: prefetch_word = "get_iword_mmu040";
! 2954: nextw = "next_iword_mmu040";
! 2955: nextl = "next_ilong_mmu040";
! 2956: srcli = "get_ilong_mmu040";
! 2957: srcwi = "get_iword_mmu040";
! 2958: srcbi = "get_ibyte_mmu040";
! 2959: srcl = "get_long_mmu040";
! 2960: dstl = "put_long_mmu040";
! 2961: srcw = "get_word_mmu040";
! 2962: dstw = "put_word_mmu040";
! 2963: srcb = "get_byte_mmu040";
! 2964: dstb = "put_byte_mmu040";
! 2965: srcblrmw = "get_lrmw_byte_mmu040";
! 2966: srcwlrmw = "get_lrmw_word_mmu040";
! 2967: srcllrmw = "get_lrmw_long_mmu040";
! 2968: dstblrmw = "put_lrmw_byte_mmu040";
! 2969: dstwlrmw = "put_lrmw_word_mmu040";
! 2970: dstllrmw = "put_lrmw_long_mmu040";
! 2971: getpc = "m68k_getpci ()";
1.1.1.4 root 2972: } else if (using_mmu) {
1.1.1.7 ! root 2973: // 68060 MMU
! 2974: disp020 = "x_get_disp_ea_020";
! 2975: prefetch_long = "get_ilong_mmu060";
! 2976: prefetch_word = "get_iword_mmu060";
! 2977: nextw = "next_iword_mmu060";
! 2978: nextl = "next_ilong_mmu060";
! 2979: srcli = "get_ilong_mmu060";
! 2980: srcwi = "get_iword_mmu060";
! 2981: srcbi = "get_ibyte_mmu060";
! 2982: srcl = "get_long_mmu060";
! 2983: dstl = "put_long_mmu060";
! 2984: srcw = "get_word_mmu060";
! 2985: dstw = "put_word_mmu060";
! 2986: srcb = "get_byte_mmu060";
! 2987: dstb = "put_byte_mmu060";
! 2988: srcblrmw = "get_lrmw_byte_mmu060";
! 2989: srcwlrmw = "get_lrmw_word_mmu060";
! 2990: srcllrmw = "get_lrmw_long_mmu060";
! 2991: dstblrmw = "put_lrmw_byte_mmu060";
! 2992: dstwlrmw = "put_lrmw_word_mmu060";
! 2993: dstllrmw = "put_lrmw_long_mmu060";
! 2994: // 68060 only: also non-locked read-modify-write accesses are reported
! 2995: srcbrmw = "get_rmw_byte_mmu060";
! 2996: srcwrmw = "get_rmw_word_mmu060";
! 2997: srclrmw = "get_rmw_long_mmu060";
! 2998: dstbrmw = "put_rmw_byte_mmu060";
! 2999: dstwrmw = "put_rmw_word_mmu060";
! 3000: dstlrmw = "put_rmw_long_mmu060";
! 3001: getpc = "m68k_getpci ()";
1.1.1.4 root 3002: } else if (using_ce) {
1.1.1.7 ! root 3003: // 68000 ce
! 3004: prefetch_word = "get_word_ce000_prefetch";
! 3005: srcwi = "get_wordi_ce000";
! 3006: srcl = "get_long_ce000";
! 3007: dstl = "put_long_ce000";
! 3008: srcw = "get_word_ce000";
! 3009: dstw = "put_word_ce000";
! 3010: srcb = "get_byte_ce000";
! 3011: dstb = "put_byte_ce000";
! 3012: do_cycles = "do_cycles_ce000";
! 3013: getpc = "m68k_getpci ()";
! 3014: } else if (using_prefetch) {
! 3015: // 68000 prefetch
! 3016: prefetch_word = "get_word_prefetch";
! 3017: prefetch_long = "get_long_prefetch";
! 3018: srcwi = "get_wordi_prefetch";
! 3019: srcl = "get_long_prefetch";
! 3020: dstl = "put_long_prefetch";
! 3021: srcw = "get_word_prefetch_addr";
! 3022: dstw = "put_word_prefetch";
! 3023: srcb = "get_byte_prefetch";
! 3024: dstb = "put_byte_prefetch";
! 3025: getpc = "m68k_getpci ()";
1.1.1.4 root 3026: } else {
1.1.1.7 ! root 3027: // generic + direct
! 3028: prefetch_long = "get_dilong";
! 3029: prefetch_word = "get_diword";
! 3030: nextw = "next_diword";
! 3031: nextl = "next_dilong";
! 3032: srcli = "get_dilong";
! 3033: srcwi = "get_diword";
! 3034: srcbi = "get_dibyte";
1.1.1.4 root 3035: srcl = "get_long";
3036: dstl = "put_long";
3037: srcw = "get_word";
3038: dstw = "put_word";
3039: srcb = "get_byte";
3040: dstb = "put_byte";
3041: }
1.1.1.7 ! root 3042: if (!dstld)
! 3043: dstld = dstl;
! 3044: if (!dstwd)
! 3045: dstwd = dstw;
! 3046: if (!srcld)
! 3047: srcld = srcl;
! 3048: if (!srcwd)
! 3049: srcwd = srcw;
! 3050: if (!srcblrmw) {
! 3051: srcblrmw = srcb;
! 3052: srcwlrmw = srcw;
! 3053: srcllrmw = srcl;
! 3054: dstblrmw = dstb;
! 3055: dstwlrmw = dstw;
! 3056: dstllrmw = dstl;
! 3057: }
1.1.1.4 root 3058:
1.1.1.7 ! root 3059: }
! 3060:
! 3061: static void gen_opcode (unsigned int opcode)
! 3062: {
! 3063: struct instr *curi = table68k + opcode;
! 3064:
! 3065: resetvars ();
! 3066:
! 3067: #ifdef WINUAE_FOR_HATARI
! 3068: /* Hatari : Store the family of the instruction (used to check for pairing on ST,
! 3069: * for non-CPU cycles calculation and profiling)
! 3070: */
! 3071: printf ("\tOpcodeFamily = %d;\n", curi->mnemo);
! 3072: /* leave some space for patching in the current cycles later */
! 3073: if (!using_ce020) {
! 3074: printf("\tCurrentInstrCycles = \n");
! 3075: nCurInstrCycPos = ftell(stdout) - 5;
! 3076: }
! 3077: #endif
1.1.1.4 root 3078:
3079: start_brace ();
1.1.1.7 ! root 3080:
1.1.1.4 root 3081: m68k_pc_offset = 2;
1.1.1.7 ! root 3082:
1.1.1.4 root 3083: switch (curi->plev) {
3084: case 0: /* not privileged */
3085: break;
3086: case 1: /* unprivileged only on 68000 */
3087: if (cpu_level == 0)
3088: break;
3089: if (next_cpu_level < 0)
3090: next_cpu_level = 0;
3091:
3092: /* fall through */
3093: case 2: /* priviledged */
1.1.1.7 ! root 3094: printf ("if (!regs.s) { Exception (8); goto %s; }\n", endlabelstr);
1.1.1.4 root 3095: need_endlabel = 1;
3096: start_brace ();
3097: break;
3098: case 3: /* privileged if size == word */
3099: if (curi->size == sz_byte)
3100: break;
1.1.1.7 ! root 3101: printf ("if (!regs.s) { Exception (8); goto %s; }\n", endlabelstr);
1.1.1.4 root 3102: need_endlabel = 1;
3103: start_brace ();
3104: break;
3105: }
3106: switch (curi->mnemo) {
3107: case i_OR:
3108: case i_AND:
3109: case i_EOR:
3110: {
1.1.1.7 ! root 3111: // documentaion error: and.l #imm,dn = 2 idle, not 1 idle (same as OR and EOR)
1.1.1.4 root 3112: int c = 0;
1.1.1.7 ! root 3113: genamodedual (curi,
! 3114: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3115: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW);
! 3116: // genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3117: // genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW);
1.1.1.4 root 3118: printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
3119: genflags (flag_logical, curi->size, "src", "", "");
3120: if (curi->dmode == Dreg && curi->size == sz_long) {
3121: c += 2;
3122: if (curi->smode == imm || curi->smode == Dreg)
3123: c += 2;
3124: }
3125: fill_prefetch_next ();
3126: if (c > 0)
3127: addcycles000 (c);
3128: genastore_rev ("src", curi->dmode, "dstreg", curi->size, "dst");
3129: break;
3130: }
1.1.1.7 ! root 3131: // all SR/CCR modifications does full prefetch
1.1.1.4 root 3132: case i_ORSR:
3133: case i_EORSR:
3134: printf ("\tMakeSR ();\n");
1.1.1.7 ! root 3135: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3136: if (curi->size == sz_byte) {
3137: printf ("\tsrc &= 0xFF;\n");
3138: }
3139: addcycles000 (8);
1.1.1.7 ! root 3140: if (cpu_level <= 1) {
! 3141: sync_m68k_pc ();
! 3142: fill_prefetch_full ();
! 3143: } else {
! 3144: fill_prefetch_next ();
! 3145: }
1.1.1.4 root 3146: printf ("\tregs.sr %c= src;\n", curi->mnemo == i_EORSR ? '^' : '|');
1.1.1.7 ! root 3147: makefromsr ();
1.1.1.4 root 3148: break;
3149: case i_ANDSR:
3150: printf ("\tMakeSR ();\n");
1.1.1.7 ! root 3151: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3152: if (curi->size == sz_byte) {
3153: printf ("\tsrc |= 0xFF00;\n");
3154: }
3155: addcycles000 (8);
1.1.1.7 ! root 3156: if (cpu_level <= 1) {
! 3157: sync_m68k_pc ();
! 3158: fill_prefetch_full ();
! 3159: } else {
! 3160: fill_prefetch_next ();
! 3161: }
1.1.1.4 root 3162: printf ("\tregs.sr &= src;\n");
1.1.1.7 ! root 3163: makefromsr ();
1.1.1.4 root 3164: break;
3165: case i_SUB:
3166: {
3167: int c = 0;
1.1.1.7 ! root 3168: genamodedual (curi,
! 3169: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3170: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW);
! 3171: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3172: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW);
1.1.1.4 root 3173: if (curi->dmode == Dreg) {
3174: if (curi->size == sz_long) {
3175: c += 2;
1.1.1.7 ! root 3176: if (curi->smode == imm || curi->smode == immi || curi->smode == Dreg || curi->smode == Areg)
1.1.1.4 root 3177: c += 2;
3178: }
3179: }
3180: fill_prefetch_next ();
3181: if (c > 0)
3182: addcycles000 (c);
3183: start_brace ();
3184: genflags (flag_sub, curi->size, "newv", "src", "dst");
3185: genastore_rev ("newv", curi->dmode, "dstreg", curi->size, "dst");
3186: break;
3187: }
3188: case i_SUBA:
3189: {
3190: int c = 0;
1.1.1.7 ! root 3191: genamodedual (curi,
! 3192: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3193: curi->dmode, "dstreg", sz_long, "dst", 1, GF_RMW);
! 3194: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3195: //genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 1, 0, GF_RMW);
1.1.1.4 root 3196: if (curi->smode == immi) {
3197: // SUBAQ.x is always 8 cycles
3198: c += 4;
3199: } else {
3200: c = curi->size == sz_long ? 2 : 4;
3201: if (islongimm (curi))
3202: c += 2;
3203: }
3204: fill_prefetch_next ();
3205: if (c > 0)
3206: addcycles000 (c);
3207: start_brace ();
3208: printf ("\tuae_u32 newv = dst - src;\n");
3209: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
3210: break;
3211: }
3212: case i_SUBX:
3213: if (!isreg (curi->smode))
3214: addcycles000 (2);
1.1.1.7 ! root 3215: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
! 3216: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW);
1.1.1.4 root 3217: fill_prefetch_next ();
3218: if (curi->size == sz_long && isreg (curi->smode))
3219: addcycles000 (4);
3220: start_brace ();
3221: printf ("\tuae_u32 newv = dst - src - (GET_XFLG () ? 1 : 0);\n");
3222: genflags (flag_subx, curi->size, "newv", "src", "dst");
3223: genflags (flag_zn, curi->size, "newv", "", "");
3224: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
3225: break;
3226: case i_SBCD:
3227: if (!isreg (curi->smode))
3228: addcycles000 (2);
1.1.1.7 ! root 3229: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
! 3230: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW);
1.1.1.4 root 3231: fill_prefetch_next ();
3232: start_brace ();
3233: printf ("\tuae_u16 newv_lo = (dst & 0xF) - (src & 0xF) - (GET_XFLG () ? 1 : 0);\n");
3234: printf ("\tuae_u16 newv_hi = (dst & 0xF0) - (src & 0xF0);\n");
3235: printf ("\tuae_u16 newv, tmp_newv;\n");
3236: printf ("\tint bcd = 0;\n");
3237: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;\n");
3238: printf ("\tif (newv_lo & 0xF0) { newv -= 6; bcd = 6; };\n");
3239: printf ("\tif ((((dst & 0xFF) - (src & 0xFF) - (GET_XFLG () ? 1 : 0)) & 0x100) > 0xFF) { newv -= 0x60; }\n");
3240: printf ("\tSET_CFLG ((((dst & 0xFF) - (src & 0xFF) - bcd - (GET_XFLG () ? 1 : 0)) & 0x300) > 0xFF);\n");
3241: duplicate_carry (0);
3242: /* Manual says bits NV are undefined though a real 68040/060 don't change them */
3243: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
3244: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
3245: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
3246: genflags (flag_z, curi->size, "newv", "", "");
3247: } else {
3248: genflags (flag_zn, curi->size, "newv", "", "");
3249: printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
3250: }
1.1.1.7 ! root 3251: if (isreg (curi->smode)) {
1.1.1.4 root 3252: addcycles000 (2);
1.1.1.7 ! root 3253: }
1.1.1.4 root 3254: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
3255: break;
3256: case i_ADD:
3257: {
3258: int c = 0;
1.1.1.7 ! root 3259: genamodedual (curi,
! 3260: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3261: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW);
! 3262: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3263: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW);
1.1.1.4 root 3264: if (curi->dmode == Dreg) {
3265: if (curi->size == sz_long) {
3266: c += 2;
1.1.1.7 ! root 3267: if (curi->smode == imm || curi->smode == immi || curi->smode == Dreg || curi->smode == Areg)
1.1.1.4 root 3268: c += 2;
3269: }
3270: }
3271: fill_prefetch_next ();
3272: if (c > 0)
3273: addcycles000 (c);
3274: start_brace ();
3275: genflags (flag_add, curi->size, "newv", "src", "dst");
3276: genastore_rev ("newv", curi->dmode, "dstreg", curi->size, "dst");
3277: break;
3278: }
3279: case i_ADDA:
3280: {
3281: int c = 0;
1.1.1.7 ! root 3282: genamodedual (curi,
! 3283: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3284: curi->dmode, "dstreg", sz_long, "dst", 1, GF_RMW);
! 3285: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3286: //genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 1, 0, GF_RMW);
1.1.1.4 root 3287: if (curi->smode == immi) {
3288: // ADDAQ.x is always 8 cycles
3289: c += 4;
3290: } else {
3291: c = curi->size == sz_long ? 2 : 4;
3292: if (islongimm (curi))
3293: c += 2;
3294: }
3295: fill_prefetch_next ();
3296: if (c > 0)
3297: addcycles000 (c);
3298: start_brace ();
3299: printf ("\tuae_u32 newv = dst + src;\n");
3300: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
3301: break;
3302: }
3303: case i_ADDX:
3304: if (!isreg (curi->smode))
3305: addcycles000 (2);
1.1.1.7 ! root 3306: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
! 3307: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW);
1.1.1.4 root 3308: fill_prefetch_next ();
3309: if (curi->size == sz_long && isreg (curi->smode))
3310: addcycles000 (4);
3311: start_brace ();
3312: printf ("\tuae_u32 newv = dst + src + (GET_XFLG () ? 1 : 0);\n");
3313: genflags (flag_addx, curi->size, "newv", "src", "dst");
3314: genflags (flag_zn, curi->size, "newv", "", "");
3315: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
3316: break;
3317: case i_ABCD:
3318: if (!isreg (curi->smode))
3319: addcycles000 (2);
1.1.1.7 ! root 3320: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
! 3321: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA | GF_RMW);
1.1.1.4 root 3322: fill_prefetch_next ();
3323: start_brace ();
3324: printf ("\tuae_u16 newv_lo = (src & 0xF) + (dst & 0xF) + (GET_XFLG () ? 1 : 0);\n");
3325: printf ("\tuae_u16 newv_hi = (src & 0xF0) + (dst & 0xF0);\n");
3326: printf ("\tuae_u16 newv, tmp_newv;\n");
3327: printf ("\tint cflg;\n");
3328: printf ("\tnewv = tmp_newv = newv_hi + newv_lo;");
3329: printf ("\tif (newv_lo > 9) { newv += 6; }\n");
3330: printf ("\tcflg = (newv & 0x3F0) > 0x90;\n");
3331: printf ("\tif (cflg) newv += 0x60;\n");
3332: printf ("\tSET_CFLG (cflg);\n");
3333: duplicate_carry (0);
3334: /* Manual says bits NV are undefined though a real 68040 don't change them */
3335: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
3336: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
3337: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
3338: genflags (flag_z, curi->size, "newv", "", "");
3339: }
3340: else {
3341: genflags (flag_zn, curi->size, "newv", "", "");
3342: printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
3343: }
1.1.1.7 ! root 3344: if (isreg (curi->smode)) {
1.1.1.4 root 3345: addcycles000 (2);
1.1.1.7 ! root 3346: }
1.1.1.4 root 3347: genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
3348: break;
3349: case i_NEG:
1.1.1.7 ! root 3350: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW);
1.1.1.4 root 3351: fill_prefetch_next ();
3352: if (isreg (curi->smode) && curi->size == sz_long)
3353: addcycles000 (2);
3354: start_brace ();
3355: genflags (flag_sub, curi->size, "dst", "src", "0");
3356: genastore_rev ("dst", curi->smode, "srcreg", curi->size, "src");
3357: break;
3358: case i_NEGX:
1.1.1.7 ! root 3359: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW);
1.1.1.4 root 3360: fill_prefetch_next ();
3361: if (isreg (curi->smode) && curi->size == sz_long)
3362: addcycles000 (2);
3363: start_brace ();
3364: printf ("\tuae_u32 newv = 0 - src - (GET_XFLG () ? 1 : 0);\n");
3365: genflags (flag_subx, curi->size, "newv", "src", "0");
3366: genflags (flag_zn, curi->size, "newv", "", "");
3367: genastore_rev ("newv", curi->smode, "srcreg", curi->size, "src");
3368: break;
3369: case i_NBCD:
1.1.1.7 ! root 3370: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW);
1.1.1.4 root 3371: if (isreg (curi->smode))
3372: addcycles000 (2);
3373: fill_prefetch_next ();
3374: start_brace ();
3375: printf ("\tuae_u16 newv_lo = - (src & 0xF) - (GET_XFLG () ? 1 : 0);\n");
3376: printf ("\tuae_u16 newv_hi = - (src & 0xF0);\n");
3377: printf ("\tuae_u16 newv;\n");
1.1.1.7 ! root 3378: #ifndef WINUAE_FOR_HATARI
! 3379: printf ("\tint cflg, tmp_newv;\n");
1.1.1.4 root 3380: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
1.1.1.7 ! root 3381: printf ("\ttmp_newv = newv = newv_hi + newv_lo;\n");
! 3382: #else
! 3383: /* Hatari : use 2 cases to avoid 'tmp_newv' set but not used */
! 3384: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
! 3385: printf ("\tint cflg;\n");
! 3386: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
! 3387: printf ("\tnewv = newv_hi + newv_lo;\n");
! 3388: }
! 3389: else {
! 3390: printf ("\tint cflg, tmp_newv;\n");
! 3391: printf ("\tif (newv_lo > 9) { newv_lo -= 6; }\n");
! 3392: printf ("\ttmp_newv = newv = newv_hi + newv_lo;\n");
! 3393: }
! 3394: #endif
1.1.1.4 root 3395: printf ("\tcflg = (newv & 0x1F0) > 0x90;\n");
3396: printf ("\tif (cflg) newv -= 0x60;\n");
3397: printf ("\tSET_CFLG (cflg);\n");
3398: duplicate_carry(0);
3399: /* Manual says bits NV are undefined though a real 68040 don't change them */
3400: if (cpu_level >= xBCD_KEEPS_NV_FLAGS) {
3401: if (next_cpu_level < xBCD_KEEPS_NV_FLAGS)
3402: next_cpu_level = xBCD_KEEPS_NV_FLAGS - 1;
3403: genflags (flag_z, curi->size, "newv", "", "");
3404: }
3405: else {
3406: genflags (flag_zn, curi->size, "newv", "", "");
1.1.1.7 ! root 3407: printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
1.1.1.4 root 3408: }
3409: genastore ("newv", curi->smode, "srcreg", curi->size, "src");
3410: break;
3411: case i_CLR:
1.1.1.7 ! root 3412: next_level_000 ();
! 3413: genamode (curi, curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0);
1.1.1.4 root 3414: fill_prefetch_next ();
3415: if (isreg (curi->smode) && curi->size == sz_long)
3416: addcycles000 (2);
3417: genflags (flag_logical, curi->size, "0", "", "");
3418: genastore_rev ("0", curi->smode, "srcreg", curi->size, "src");
3419: break;
3420: case i_NOT:
1.1.1.7 ! root 3421: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_RMW);
1.1.1.4 root 3422: fill_prefetch_next ();
3423: if (isreg (curi->smode) && curi->size == sz_long)
3424: addcycles000 (2);
3425: start_brace ();
3426: printf ("\tuae_u32 dst = ~src;\n");
3427: genflags (flag_logical, curi->size, "dst", "", "");
3428: genastore_rev ("dst", curi->smode, "srcreg", curi->size, "src");
3429: break;
3430: case i_TST:
1.1.1.7 ! root 3431: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3432: fill_prefetch_next ();
3433: genflags (flag_logical, curi->size, "src", "", "");
3434: break;
3435: case i_BTST:
1.1.1.7 ! root 3436: genamodedual (curi,
! 3437: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3438: curi->dmode, "dstreg", curi->size, "dst", 1, 0);
! 3439: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3440: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_IR2IRC);
1.1.1.4 root 3441: fill_prefetch_next ();
3442: bsetcycles (curi);
3443: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
3444: break;
3445: case i_BCHG:
3446: case i_BCLR:
3447: case i_BSET:
1.1.1.7 ! root 3448: // on 68000 these have weird side-effect, if EA points to write-only custom register
! 3449: //during instruction's read access CPU data lines appear as zero to outside world,
! 3450: // (normally previously fetched data appears in data lines if reading write-only register)
! 3451: // this allows stupid things like bset #2,$dff096 to work "correctly"
! 3452: // NOTE: above can't be right.
! 3453: genamodedual (curi,
! 3454: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3455: curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW);
! 3456: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3457: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_IR2IRC | GF_RMW);
1.1.1.4 root 3458: fill_prefetch_next ();
3459: bsetcycles (curi);
3460: // bclr needs 1 extra cycle
3461: if (curi->mnemo == i_BCLR && curi->dmode == Dreg)
3462: addcycles000 (2);
3463: if (curi->mnemo == i_BCHG) {
3464: printf ("\tdst ^= (1 << src);\n");
3465: printf ("\tSET_ZFLG (((uae_u32)dst & (1 << src)) >> src);\n");
3466: } else if (curi->mnemo == i_BCLR) {
3467: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
3468: printf ("\tdst &= ~(1 << src);\n");
3469: } else if (curi->mnemo == i_BSET) {
3470: printf ("\tSET_ZFLG (1 ^ ((dst >> src) & 1));\n");
3471: printf ("\tdst |= (1 << src);\n");
3472: }
3473: genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
3474: break;
3475: case i_CMPM:
3476: // confirmed
1.1.1.7 ! root 3477: genamodedual (curi,
! 3478: curi->smode, "srcreg", curi->size, "src", 1, GF_AA,
! 3479: curi->dmode, "dstreg", curi->size, "dst", 1, GF_AA);
! 3480: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
! 3481: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
1.1.1.4 root 3482: fill_prefetch_next ();
3483: start_brace ();
3484: genflags (flag_cmp, curi->size, "newv", "src", "dst");
3485: break;
3486: case i_CMP:
1.1.1.7 ! root 3487: genamodedual (curi,
! 3488: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3489: curi->dmode, "dstreg", curi->size, "dst", 1, 0);
! 3490: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3491: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1.1.1.4 root 3492: fill_prefetch_next ();
3493: if (curi->dmode == Dreg && curi->size == sz_long)
3494: addcycles000 (2);
3495: start_brace ();
3496: genflags (flag_cmp, curi->size, "newv", "src", "dst");
3497: break;
3498: case i_CMPA:
1.1.1.7 ! root 3499: genamodedual (curi,
! 3500: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3501: curi->dmode, "dstreg", sz_long, "dst", 1, 0);
! 3502: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3503: //genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
1.1.1.4 root 3504: fill_prefetch_next ();
3505: addcycles000 (2);
3506: start_brace ();
3507: genflags (flag_cmp, sz_long, "newv", "src", "dst");
3508: break;
3509: /* The next two are coded a little unconventional, but they are doing
3510: * weird things... */
3511: case i_MVPRM: // MOVEP R->M
1.1.1.7 ! root 3512: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3513: printf ("\tuaecptr memp = m68k_areg (regs, dstreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0));
1.1.1.7 ! root 3514: #ifndef WINUAE_FOR_HATARI
1.1.1.4 root 3515: if (curi->size == sz_word) {
1.1.1.7 ! root 3516: printf ("\t%s (memp, src >> 8);\n\t%s (memp + 2, src);\n", dstb, dstb);
1.1.1.4 root 3517: count_write += 2;
3518: } else {
1.1.1.7 ! root 3519: printf ("\t%s (memp, src >> 24);\n\t%s (memp + 2, src >> 16);\n", dstb, dstb);
! 3520: printf ("\t%s (memp + 4, src >> 8);\n\t%s (memp + 6, src);\n", dstb, dstb);
! 3521: count_write += 4;
! 3522: }
! 3523: #else
! 3524: /* Hatari : Use MovepByteNbr to keep track of each individual byte access inside a movep */
! 3525: if (curi->size == sz_word) {
! 3526: printf ("\tMovepByteNbr=1; \t%s (memp, src >> 8);\n\tMovepByteNbr=2; \t%s (memp + 2, src);\n", dstb, dstb);
! 3527: count_write += 2;
! 3528: } else {
! 3529: printf ("\tMovepByteNbr=1; \t%s (memp, src >> 24);\n\tMovepByteNbr=2; \t%s (memp + 2, src >> 16);\n", dstb, dstb);
! 3530: printf ("\tMovepByteNbr=3; \t%s (memp + 4, src >> 8);\n\tMovepByteNbr=4; \t%s (memp + 6, src);\n", dstb, dstb);
1.1.1.4 root 3531: count_write += 4;
3532: }
1.1.1.5 root 3533: printf ("\tMovepByteNbr=0;\n");
1.1.1.7 ! root 3534: #endif
1.1.1.4 root 3535: fill_prefetch_next ();
3536: break;
3537: case i_MVPMR: // MOVEP M->R
3538: printf ("\tuaecptr memp = m68k_areg (regs, srcreg) + (uae_s32)(uae_s16)%s;\n", gen_nextiword (0));
1.1.1.7 ! root 3539: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0);
! 3540: #ifndef WINUAE_FOR_HATARI
! 3541: if (curi->size == sz_word) {
! 3542: printf ("\tuae_u16 val = ((%s (memp) & 0xff) << 8) + (%s (memp + 2) & 0xff);\n", srcb, srcb);
! 3543: count_read += 2;
! 3544: } else {
! 3545: printf ("\tuae_u32 val = ((%s (memp) & 0xff) << 24) + ((%s (memp + 2) & 0xff) << 16)\n", srcb, srcb);
! 3546: printf (" + ((%s (memp + 4) & 0xff) << 8) + (%s (memp + 6) & 0xff);\n", srcb, srcb);
! 3547: count_read += 4;
! 3548: }
! 3549: #else
! 3550: /* Hatari : Use MovepByteNbr to keep track of each individual byte access inside a movep */
1.1.1.4 root 3551: if (curi->size == sz_word) {
1.1.1.5 root 3552: printf ("\tuae_u16 val;\n");
1.1.1.7 ! root 3553: printf ("\tMovepByteNbr=1; val = ((%s (memp) & 0xff) << 8);\n", srcb);
! 3554: printf ("\tMovepByteNbr=2; val += (%s (memp + 2) & 0xff);\n", srcb);
1.1.1.4 root 3555: count_read += 2;
3556: } else {
1.1.1.5 root 3557: printf ("\tuae_u32 val;\n");
1.1.1.7 ! root 3558: printf ("\tMovepByteNbr=1; val = ((%s (memp) & 0xff) << 24);\n", srcb);
! 3559: printf ("\tMovepByteNbr=2; val += ((%s (memp + 2) & 0xff) << 16);\n", srcb);
! 3560: printf ("\tMovepByteNbr=3; val += ((%s (memp + 4) & 0xff) << 8);\n", srcb);
! 3561: printf ("\tMovepByteNbr=4; val += (%s (memp + 6) & 0xff);\n", srcb);
1.1.1.4 root 3562: count_read += 4;
3563: }
1.1.1.5 root 3564: printf ("\tMovepByteNbr=0;\n");
1.1.1.7 ! root 3565: #endif
1.1.1.4 root 3566: fill_prefetch_next ();
3567: genastore ("val", curi->dmode, "dstreg", curi->size, "dst");
3568: break;
3569: case i_MOVE:
3570: case i_MOVEA:
3571: {
3572: /* 2 MOVE instruction variants have special prefetch sequence:
3573: * - MOVE <ea>,-(An) = prefetch is before writes (Apdi)
3574: * - MOVE memory,(xxx).L = 2 prefetches after write
1.1.1.7 ! root 3575: * - move.x #imm = prefetch is done before write
1.1.1.4 root 3576: * - all others = prefetch is done after writes
3577: *
3578: * - move.x xxx,[at least 1 extension word here] = fetch 1 extension word before (xxx)
3579: *
3580: */
1.1.1.7 ! root 3581: if (isce020()) {
! 3582: // MOVE is too complex to handle in table68k
! 3583: int h = 0, t = 0, c = 0, subhead = 0;
! 3584: bool fea = false;
! 3585: if (curi->smode == immi && isreg (curi->dmode)) {
! 3586: // MOVEQ
! 3587: h = 2; t = 0; c = 0;
! 3588: } else if (isreg (curi->smode) && isreg (curi->dmode)) {
! 3589: // MOVE Rn,Rn
! 3590: h = 2; t = 0; c = 2;
! 3591: } else if (isreg (curi->dmode)) {
! 3592: // MOVE EA,Rn
! 3593: h = 0; t = 0; c = 2;
! 3594: fea = true;
! 3595: } else if (curi->dmode == Aind) {
! 3596: if (isreg (curi->smode)) {
! 3597: // MOVE Rn,(An)
! 3598: h = 0; t = 1; c = 3;
! 3599: } else {
! 3600: // MOVE SOURCE,(An)
! 3601: h = 2; t = 0; c = 4;
! 3602: fea = true;
! 3603: }
! 3604: } else if (curi->dmode == Aipi) {
! 3605: if (isreg (curi->smode)) {
! 3606: // MOVE Rn,(An)+
! 3607: h = 0; t = 1; c = 3;
! 3608: } else {
! 3609: // MOVE SOURCE,(An)+
! 3610: h = 2; t = 0; c = 4;
! 3611: fea = true;
! 3612: }
! 3613: } else if (curi->dmode == Apdi) {
! 3614: if (isreg (curi->smode)) {
! 3615: // MOVE Rn,-(An)
! 3616: h = 0; t = 2; c = 4;
! 3617: } else {
! 3618: // MOVE SOURCE,-(An)
! 3619: h = 2; t = 0; c = 4;
! 3620: fea = true;
! 3621: }
! 3622: } else if (curi->dmode == Ad16) {
! 3623: // MOVE EA,(d16,An)
! 3624: h = 2; t = 0; c = 4;
! 3625: fea = true;
! 3626: } else if (curi->dmode == Ad8r) {
! 3627: h = 4; t = 0; c = 6;
! 3628: fea = true;
! 3629: } else if (curi->dmode == absw) {
! 3630: // MOVE EA,xxx.W
! 3631: h = 2; t = 0; c = 4;
! 3632: fea = true;
! 3633: } else if (curi->dmode == absl) {
! 3634: // MOVE EA,xxx.L
! 3635: h = 0; t = 0; c = 6;
! 3636: fea = true;
! 3637: } else {
! 3638: h = 4; t = 0; c = 6;
! 3639: fea = true;
! 3640: }
! 3641: if (fea) {
! 3642: if (curi->smode == imm)
! 3643: subhead = gence020cycles_fiea (curi, curi->size, Dreg);
! 3644: else
! 3645: subhead = gence020cycles_fea (curi->smode);
! 3646: }
! 3647: genamode2x (curi->smode, "srcreg", curi->size, "src", 1, 0, 0, fea ? fetchmode_fea : -1);
! 3648: genamode2 (curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_MOVE);
! 3649: addopcycles_ce20 (h, t, c, -subhead);
! 3650: if (curi->mnemo == i_MOVEA && curi->size == sz_word)
! 3651: printf ("\tsrc = (uae_s32)(uae_s16)src;\n");
! 3652: if (curi->mnemo == i_MOVE)
! 3653: genflags (flag_logical, curi->size, "src", "", "");
! 3654: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
! 3655: sync_m68k_pc ();
! 3656:
! 3657: } else {
! 3658: int prefetch_done = 0, flags;
! 3659: int dualprefetch = curi->dmode == absl && (curi->smode != Dreg && curi->smode != Areg && curi->smode != imm);
! 3660: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3661: flags = GF_MOVE | GF_APDI;
! 3662: //if (curi->size == sz_long && (curi->smode == Dreg || curi->smode == Areg))
! 3663: // flags &= ~GF_APDI;
! 3664: flags |= dualprefetch ? GF_NOREFILL : 0;
! 3665: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, flags);
! 3666: if (curi->mnemo == i_MOVEA && curi->size == sz_word)
! 3667: printf ("\tsrc = (uae_s32)(uae_s16)src;\n");
! 3668: if (curi->dmode == Apdi) {
! 3669: fill_prefetch_next ();
! 3670: prefetch_done = 1;
! 3671: }
! 3672: if (curi->mnemo == i_MOVE)
! 3673: genflags (flag_logical, curi->size, "src", "", "");
! 3674:
! 3675: if (curi->size == sz_long) {
! 3676: if ((curi->dmode == Ad16 || curi->dmode == PC16) && curi->smode == imm) {
! 3677: // lots more needed..
! 3678: // move.l x,absl
! 3679: // move.l (an),x(an)
! 3680: single_check_ipl();
! 3681: }
! 3682: }
! 3683: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
! 3684: sync_m68k_pc ();
! 3685: if (dualprefetch) {
! 3686: fill_prefetch_full_000 ();
! 3687: prefetch_done = 1;
! 3688: }
! 3689: if (!prefetch_done)
! 3690: fill_prefetch_next ();
1.1.1.4 root 3691: }
3692: }
3693: break;
3694: case i_MVSR2: // MOVE FROM SR
1.1.1.7 ! root 3695: genamode (curi, curi->smode, "srcreg", sz_word, "src", 2, 0, 0);
! 3696: if (isreg (curi->smode)) {
! 3697: fill_prefetch_next ();
1.1.1.4 root 3698: addcycles000 (2);
1.1.1.7 ! root 3699: } else {
! 3700: // write to memory, dummy write to same address, X-flag seems to be always set
! 3701: if (cpu_level <= 1 && curi->size == sz_word) {
! 3702: printf ("\t%s (srca, regs.sr | 0x0010);\n", dstw);
! 3703: count_write++;
! 3704: }
! 3705: fill_prefetch_next ();
! 3706: }
1.1.1.4 root 3707: printf ("\tMakeSR ();\n");
1.1.1.7 ! root 3708: // real write
1.1.1.4 root 3709: if (curi->size == sz_byte)
3710: genastore ("regs.sr & 0xff", curi->smode, "srcreg", sz_word, "src");
3711: else
3712: genastore ("regs.sr", curi->smode, "srcreg", sz_word, "src");
3713: break;
3714: case i_MV2SR: // MOVE TO SR
1.1.1.7 ! root 3715: genamode (curi, curi->smode, "srcreg", sz_word, "src", 1, 0, 0);
1.1.1.4 root 3716: if (curi->size == sz_byte) {
3717: // MOVE TO CCR
3718: addcycles000 (4);
3719: printf ("\tMakeSR ();\n\tregs.sr &= 0xFF00;\n\tregs.sr |= src & 0xFF;\n");
3720: } else {
3721: // MOVE TO SR
3722: addcycles000 (4);
3723: printf ("\tregs.sr = src;\n");
3724: }
1.1.1.7 ! root 3725: makefromsr ();
! 3726: if (cpu_level <= 1) {
! 3727: // 68000 does 2xprefetch
! 3728: sync_m68k_pc ();
! 3729: fill_prefetch_full ();
! 3730: } else {
! 3731: fill_prefetch_next ();
! 3732: }
1.1.1.4 root 3733: break;
3734: case i_SWAP:
1.1.1.7 ! root 3735: genamode (curi, curi->smode, "srcreg", sz_long, "src", 1, 0, 0);
1.1.1.4 root 3736: fill_prefetch_next ();
3737: start_brace ();
3738: printf ("\tuae_u32 dst = ((src >> 16)&0xFFFF) | ((src&0xFFFF)<<16);\n");
3739: genflags (flag_logical, sz_long, "dst", "", "");
3740: genastore ("dst", curi->smode, "srcreg", sz_long, "src");
3741: break;
3742: case i_EXG:
3743: // confirmed
1.1.1.7 ! root 3744: genamodedual (curi,
! 3745: curi->smode, "srcreg", curi->size, "src", 1, 0,
! 3746: curi->dmode, "dstreg", curi->size, "dst", 1, 0);
! 3747: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3748: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1.1.1.4 root 3749: fill_prefetch_next ();
3750: addcycles000 (2);
3751: genastore ("dst", curi->smode, "srcreg", curi->size, "src");
3752: genastore ("src", curi->dmode, "dstreg", curi->size, "dst");
3753: break;
3754: case i_EXT:
3755: // confirmed
1.1.1.7 ! root 3756: genamode (curi, curi->smode, "srcreg", sz_long, "src", 1, 0, 0);
1.1.1.4 root 3757: fill_prefetch_next ();
3758: start_brace ();
3759: switch (curi->size) {
3760: case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;
3761: case sz_word: printf ("\tuae_u16 dst = (uae_s16)(uae_s8)src;\n"); break;
3762: case sz_long: printf ("\tuae_u32 dst = (uae_s32)(uae_s16)src;\n"); break;
1.1.1.7 ! root 3763: default: term ();
1.1.1.4 root 3764: }
3765: genflags (flag_logical,
3766: curi->size == sz_word ? sz_word : sz_long, "dst", "", "");
3767: genastore ("dst", curi->smode, "srcreg",
3768: curi->size == sz_word ? sz_word : sz_long, "src");
3769: break;
3770: case i_MVMEL:
3771: // confirmed
1.1.1.7 ! root 3772: if (using_ce || using_prefetch)
1.1.1.4 root 3773: genmovemel_ce (opcode);
3774: else
3775: genmovemel (opcode);
1.1.1.7 ! root 3776: tail_ce020_done = true;
1.1.1.4 root 3777: break;
3778: case i_MVMLE:
3779: // confirmed
1.1.1.7 ! root 3780: if (using_ce || using_prefetch)
1.1.1.4 root 3781: genmovemle_ce (opcode);
3782: else
3783: genmovemle (opcode);
1.1.1.7 ! root 3784: tail_ce020_done = true;
1.1.1.4 root 3785: break;
3786: case i_TRAP:
1.1.1.7 ! root 3787: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3788: gen_set_fault_pc ();
3789: sync_m68k_pc ();
1.1.1.7 ! root 3790: printf ("\tException (src + 32);\n");
1.1.1.4 root 3791: did_prefetch = 1;
1.1.1.7 ! root 3792: branch_inst = 2;
! 3793: clear_m68k_offset();
1.1.1.4 root 3794: break;
3795: case i_MVR2USP:
1.1.1.7 ! root 3796: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3797: fill_prefetch_next ();
3798: printf ("\tregs.usp = src;\n");
3799: break;
3800: case i_MVUSP2R:
1.1.1.7 ! root 3801: genamode (curi, curi->smode, "srcreg", curi->size, "src", 2, 0, 0);
1.1.1.4 root 3802: fill_prefetch_next ();
3803: genastore ("regs.usp", curi->smode, "srcreg", curi->size, "src");
3804: break;
3805: case i_RESET:
3806: fill_prefetch_next ();
3807: printf ("\tcpureset ();\n");
1.1.1.7 ! root 3808: sync_m68k_pc ();
1.1.1.4 root 3809: addcycles000 (128);
1.1.1.7 ! root 3810: if (using_prefetch) {
! 3811: printf ("\t%s (2);\n", prefetch_word);
! 3812: clear_m68k_offset();
! 3813: }
1.1.1.4 root 3814: break;
3815: case i_NOP:
3816: fill_prefetch_next ();
3817: break;
3818: case i_STOP:
3819: if (using_prefetch) {
3820: printf ("\tregs.sr = regs.irc;\n");
3821: m68k_pc_offset += 2;
3822: } else {
1.1.1.7 ! root 3823: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3824: printf ("\tregs.sr = src;\n");
3825: }
1.1.1.7 ! root 3826: addcycles000(4);
! 3827: makefromsr ();
1.1.1.4 root 3828: printf ("\tm68k_setstopped ();\n");
3829: sync_m68k_pc ();
3830: // STOP does not prefetch anything
3831: did_prefetch = -1;
3832: break;
3833: case i_LPSTOP: /* 68060 */
1.1.1.7 ! root 3834: printf ("\tuae_u16 sw = %s (2);\n", srcwi);
1.1.1.4 root 3835: printf ("\tuae_u16 sr;\n");
1.1.1.7 ! root 3836: printf ("\tif (sw != (0x100|0x80|0x40)) { Exception (4); goto %s; }\n", endlabelstr);
! 3837: printf ("\tsr = %s (4);\n", srcwi);
! 3838: printf ("\tif (!(sr & 0x8000)) { Exception (8); goto %s; }\n", endlabelstr);
1.1.1.4 root 3839: printf ("\tregs.sr = sr;\n");
1.1.1.7 ! root 3840: makefromsr ();
1.1.1.4 root 3841: printf ("\tm68k_setstopped();\n");
3842: m68k_pc_offset += 4;
3843: sync_m68k_pc ();
3844: fill_prefetch_full ();
3845: break;
3846: case i_RTE:
1.1.1.7 ! root 3847: addop_ce020 (curi, 0);
! 3848: next_level_000 ();
1.1.1.4 root 3849: if (cpu_level == 0) {
1.1.1.7 ! root 3850: genamode (NULL, Aipi, "7", sz_word, "sr", 1, 0, GF_NOREFILL);
! 3851: genamode (NULL, Aipi, "7", sz_long, "pc", 1, 0, GF_NOREFILL);
1.1.1.4 root 3852: printf ("\tregs.sr = sr;\n");
1.1.1.7 ! root 3853: printf ("\tif (pc & 1) {\n");
! 3854: printf ("\t\texception3i (0x%04X, pc);\n", opcode);
! 3855: printf ("\t\tgoto %s;\n", endlabelstr);
! 3856: printf ("\t}\n");
1.1.1.4 root 3857: setpc ("pc");
1.1.1.7 ! root 3858: makefromsr ();
! 3859: } else if (cpu_level == 1 && using_prefetch) {
! 3860: int old_brace_level = n_braces;
! 3861: printf ("\tuae_u16 newsr; uae_u32 newpc;\n");
! 3862: printf ("\tfor (;;) {\n");
! 3863: printf ("\t\tuaecptr a = m68k_areg (regs, 7);\n");
! 3864: printf ("\t\tuae_u16 sr = %s (a);\n", srcw);
! 3865: count_read++;
! 3866: printf ("\t\tuae_u32 pc = %s (a + 2) << 16; pc |= %s (a + 4);\n", srcw, srcw);
! 3867: count_read += 2;
! 3868: printf ("\t\tuae_u16 format = %s (a + 2 + 4);\n", srcw);
! 3869: count_read++;
! 3870: printf ("\t\tint frame = format >> 12;\n");
! 3871: printf ("\t\tint offset = 8;\n");
! 3872: printf ("\t\tnewsr = sr; newpc = pc;\n");
! 3873: printf ("\t\tif (frame == 0x0) { m68k_areg (regs, 7) += offset; break; }\n");
! 3874: printf ("\t\telse if (frame == 0x8) { m68k_areg (regs, 7) += offset + 50; break; }\n");
! 3875: printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14); goto %s; }\n", endlabelstr);
! 3876: printf ("\t\tregs.sr = newsr; MakeFromSR ();\n}\n");
! 3877: pop_braces (old_brace_level);
! 3878: printf ("\tregs.sr = newsr;\n");
! 3879: makefromsr ();
! 3880: printf ("\tif (newpc & 1) {\n");
! 3881: printf ("\t\texception3i (0x%04X, newpc);\n", opcode);
! 3882: printf ("\t\tgoto %s;\n", endlabelstr);
! 3883: printf ("\t}\n");
! 3884: setpc ("newpc");
! 3885: check_ipl ();
! 3886: need_endlabel = 1;
1.1.1.4 root 3887: } else {
1.1 root 3888: int old_brace_level = n_braces;
3889: printf ("\tuae_u16 newsr; uae_u32 newpc;\n");
3890: printf ("\tfor (;;) {\n");
3891: printf ("\t\tuaecptr a = m68k_areg (regs, 7);\n");
1.1.1.5 root 3892: printf ("\t\tuae_u16 sr = %s (a);\n", srcw);
1.1.1.7 ! root 3893: count_read++;
1.1.1.5 root 3894: printf ("\t\tuae_u32 pc = %s (a + 2);\n", srcl);
1.1.1.7 ! root 3895: count_read += 2;
1.1.1.5 root 3896: printf ("\t\tuae_u16 format = %s (a + 2 + 4);\n", srcw);
1.1.1.7 ! root 3897: count_read++;
1.1 root 3898: printf ("\t\tint frame = format >> 12;\n");
3899: printf ("\t\tint offset = 8;\n");
3900: printf ("\t\tnewsr = sr; newpc = pc;\n");
1.1.1.7 ! root 3901: addcycles_ce020 (6);
1.1 root 3902: printf ("\t\tif (frame == 0x0) { m68k_areg (regs, 7) += offset; break; }\n");
3903: printf ("\t\telse if (frame == 0x1) { m68k_areg (regs, 7) += offset; }\n");
3904: printf ("\t\telse if (frame == 0x2) { m68k_areg (regs, 7) += offset + 4; break; }\n");
1.1.1.7 ! root 3905: if (using_mmu == 68060) {
! 3906: printf ("\t\telse if (frame == 0x4) { m68k_do_rte_mmu060 (a); m68k_areg (regs, 7) += offset + 8; break; }\n");
! 3907: } else {
! 3908: printf ("\t\telse if (frame == 0x4) { m68k_areg (regs, 7) += offset + 8; break; }\n");
! 3909: }
1.1 root 3910: printf ("\t\telse if (frame == 0x8) { m68k_areg (regs, 7) += offset + 50; break; }\n");
1.1.1.7 ! root 3911: if (using_mmu == 68040) {
! 3912: printf ("\t\telse if (frame == 0x7) { m68k_do_rte_mmu040 (a); m68k_areg (regs, 7) += offset + 52; break; }\n");
! 3913: } else {
! 3914: printf ("\t\telse if (frame == 0x7) { m68k_areg (regs, 7) += offset + 52; break; }\n");
! 3915: }
! 3916: printf ("\t\telse if (frame == 0x9) { m68k_areg (regs, 7) += offset + 12; break; }\n");
! 3917: if (using_mmu == 68030) {
! 3918: printf ("\t\telse if (frame == 0xa) { m68k_do_rte_mmu030 (a); break; }\n");
! 3919: printf ("\t\telse if (frame == 0xb) { m68k_do_rte_mmu030 (a); break; }\n");
! 3920: } else {
! 3921: printf ("\t\telse if (frame == 0xa) { m68k_areg (regs, 7) += offset + 24; break; }\n");
! 3922: printf ("\t\telse if (frame == 0xb) { m68k_areg (regs, 7) += offset + 84; break; }\n");
! 3923: }
! 3924: printf ("\t\telse { m68k_areg (regs, 7) += offset; Exception (14); goto %s; }\n", endlabelstr);
! 3925: printf ("\t\tregs.sr = newsr;\n");
! 3926: makefromsr ();
! 3927: printf ("}\n");
1.1 root 3928: pop_braces (old_brace_level);
1.1.1.7 ! root 3929: printf ("\tregs.sr = newsr;\n");
! 3930: addcycles_ce020 (4);
! 3931: makefromsr ();
1.1 root 3932: printf ("\tif (newpc & 1) {\n");
1.1.1.7 ! root 3933: printf ("\t\texception3i (0x%04X, newpc);\n", opcode);
1.1 root 3934: printf ("\t\tgoto %s;\n", endlabelstr);
3935: printf ("\t}\n");
1.1.1.7 ! root 3936: setpc ("newpc");
! 3937: check_ipl ();
1.1 root 3938: need_endlabel = 1;
1.1.1.4 root 3939: }
3940: /* PC is set and prefetch filled. */
1.1.1.7 ! root 3941: clear_m68k_offset();
! 3942: tail_ce020_done = true;
1.1.1.4 root 3943: fill_prefetch_full ();
1.1.1.7 ! root 3944: branch_inst = 1;
1.1.1.4 root 3945: break;
3946: case i_RTD:
1.1.1.7 ! root 3947: addop_ce020 (curi, 0);
1.1.1.4 root 3948: if (using_mmu) {
1.1.1.7 ! root 3949: genamode (curi, curi->smode, "srcreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
! 3950: genamode (NULL, Aipi, "7", sz_long, "pc", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
1.1.1.4 root 3951: printf ("\tm68k_areg(regs, 7) += offs;\n");
3952: } else {
1.1.1.7 ! root 3953: genamode (NULL, Aipi, "7", sz_long, "pc", 1, 0, 0);
! 3954: genamode (curi, curi->smode, "srcreg", curi->size, "offs", 1, 0, 0);
1.1.1.4 root 3955: printf ("\tm68k_areg (regs, 7) += offs;\n");
3956: }
1.1 root 3957: printf ("\tif (pc & 1) {\n");
1.1.1.7 ! root 3958: printf ("\t\texception3i (0x%04X, pc);\n", opcode);
1.1 root 3959: printf ("\t\tgoto %s;\n", endlabelstr);
3960: printf ("\t}\n");
1.1.1.4 root 3961: setpc ("pc");
3962: /* PC is set and prefetch filled. */
1.1.1.7 ! root 3963: clear_m68k_offset();
! 3964: tail_ce020_done = true;
1.1.1.4 root 3965: fill_prefetch_full ();
1.1 root 3966: need_endlabel = 1;
1.1.1.7 ! root 3967: branch_inst = 1;
1.1.1.4 root 3968: break;
3969: case i_LINK:
3970: // ce confirmed
3971: if (using_mmu) {
1.1.1.7 ! root 3972: addmmufixup ("srcreg");
! 3973: genamode (NULL, curi->dmode, "dstreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
! 3974: genamode (NULL, Apdi, "7", sz_long, "old", GENA_GETV_FETCH_ALIGN, GENA_MOVEM_DO_INC, 0);
! 3975: genamode (NULL, curi->smode, "srcreg", sz_long, "src", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
1.1.1.4 root 3976: genastore ("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
3977: printf ("\tm68k_areg(regs, 7) += offs;\n");
3978: genastore ("src", Apdi, "7", sz_long, "old");
3979: } else {
1.1.1.7 ! root 3980: addop_ce020 (curi, 0);
! 3981: genamode (NULL, Apdi, "7", sz_long, "old", 2, 0, GF_AA);
! 3982: genamode (NULL, curi->smode, "srcreg", sz_long, "src", 1, 0, GF_AA);
! 3983: genamode (NULL, curi->dmode, "dstreg", curi->size, "offs", 1, 0, 0);
1.1.1.4 root 3984: genastore ("src", Apdi, "7", sz_long, "old");
3985: genastore ("m68k_areg (regs, 7)", curi->smode, "srcreg", sz_long, "src");
3986: printf ("\tm68k_areg (regs, 7) += offs;\n");
3987: fill_prefetch_next ();
3988: }
3989: break;
3990: case i_UNLK:
3991: // ce confirmed
3992: if (using_mmu) {
1.1.1.7 ! root 3993: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 3994: printf ("\tuae_s32 old = %s (src);\n", srcl);
1.1 root 3995: printf ("\tm68k_areg (regs, 7) = src + 4;\n");
3996: printf ("\tm68k_areg (regs, srcreg) = old;\n");
1.1.1.4 root 3997: } else {
1.1.1.7 ! root 3998: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 3999: printf ("\tm68k_areg (regs, 7) = src;\n");
1.1.1.7 ! root 4000: genamode (NULL, Aipi, "7", sz_long, "old", 1, 0, 0);
1.1.1.4 root 4001: fill_prefetch_next ();
4002: genastore ("old", curi->smode, "srcreg", curi->size, "src");
4003: }
4004: break;
4005: case i_RTS:
1.1.1.7 ! root 4006: addop_ce020 (curi, 0);
! 4007: printf ("\tuaecptr pc = %s;\n", getpc);
! 4008: if (using_indirect && !using_ce020 && !using_prefetch_020 && !using_ce) {
! 4009: printf("\tm68k_do_rtsi_jit ();\n");
! 4010: } else if (using_ce020 == 1) {
! 4011: add_head_cycs (1);
1.1.1.4 root 4012: printf ("\tm68k_do_rts_ce020 ();\n");
1.1.1.7 ! root 4013: } else if (using_ce020 == 2) {
! 4014: add_head_cycs (1);
1.1.1.4 root 4015: printf ("\tm68k_do_rts_ce030 ();\n");
1.1.1.7 ! root 4016: } else if (using_ce) {
1.1.1.4 root 4017: printf ("\tm68k_do_rts_ce ();\n");
1.1.1.7 ! root 4018: } else if (using_mmu) {
1.1.1.5 root 4019: printf ("\tm68k_do_rts_mmu%s ();\n", mmu_postfix);
1.1.1.7 ! root 4020: } else if (using_prefetch || using_prefetch_020) {
! 4021: printf ("\tm68k_do_rtsi ();\n");
! 4022: } else {
1.1.1.4 root 4023: printf ("\tm68k_do_rts ();\n");
1.1.1.7 ! root 4024: }
! 4025: printf ("\tif (%s & 1) {\n", getpc);
! 4026: printf ("\t\tuaecptr faultpc = %s;\n", getpc);
! 4027: setpc ("pc");
! 4028: printf ("\t\texception3i (0x%04X, faultpc);\n", opcode);
1.1 root 4029: printf ("\t\tgoto %s;\n", endlabelstr);
4030: printf ("\t}\n");
1.1.1.4 root 4031: count_read += 2;
1.1.1.7 ! root 4032: clear_m68k_offset();
1.1.1.4 root 4033: fill_prefetch_full ();
1.1 root 4034: need_endlabel = 1;
1.1.1.7 ! root 4035: branch_inst = 1;
1.1.1.4 root 4036: break;
4037: case i_TRAPV:
4038: sync_m68k_pc ();
4039: fill_prefetch_next ();
4040: printf ("\tif (GET_VFLG ()) {\n");
1.1.1.7 ! root 4041: printf ("\t\tException (7);\n");
1.1.1.4 root 4042: printf ("\t\tgoto %s;\n", endlabelstr);
4043: printf ("\t}\n");
4044: need_endlabel = 1;
4045: break;
4046: case i_RTR:
1.1.1.7 ! root 4047: printf ("\tuaecptr oldpc = %s;\n", getpc);
1.1.1.4 root 4048: printf ("\tMakeSR ();\n");
1.1.1.7 ! root 4049: genamode (NULL, Aipi, "7", sz_word, "sr", 1, 0, 0);
! 4050: genamode (NULL, Aipi, "7", sz_long, "pc", 1, 0, 0);
1.1.1.4 root 4051: printf ("\tregs.sr &= 0xFF00; sr &= 0xFF;\n");
4052: printf ("\tregs.sr |= sr;\n");
4053: setpc ("pc");
1.1.1.7 ! root 4054: makefromsr ();
! 4055: printf ("\tif (%s & 1) {\n", getpc);
! 4056: printf ("\t\tuaecptr faultpc = %s;\n", getpc);
! 4057: setpc ("oldpc");
! 4058: printf ("\t\texception3i (0x%04X, faultpc);\n", opcode);
! 4059: printf ("\t\tgoto %s;\n", endlabelstr);
! 4060: printf ("\t}\n");
! 4061: clear_m68k_offset();
1.1.1.4 root 4062: fill_prefetch_full ();
1.1.1.7 ! root 4063: need_endlabel = 1;
! 4064: branch_inst = 1;
! 4065: tail_ce020_done = true;
1.1.1.4 root 4066: break;
1.1.1.7 ! root 4067: case i_JSR:
! 4068: // possible idle cycle, prefetch from new address, stack high return addr, stack low, prefetch
! 4069: no_prefetch_ce020 = true;
! 4070: genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL);
1.1.1.4 root 4071: start_brace ();
1.1.1.7 ! root 4072: printf ("\tuaecptr oldpc = %s + %d;\n", getpc, m68k_pc_offset);
1.1.1.4 root 4073: if (using_exception_3) {
4074: printf ("\tif (srca & 1) {\n");
1.1.1.7 ! root 4075: printf ("\t\texception3i (opcode, srca);\n");
1.1.1.4 root 4076: printf ("\t\tgoto %s;\n", endlabelstr);
4077: printf ("\t}\n");
4078: need_endlabel = 1;
4079: }
4080: if (using_mmu) {
4081: printf ("\t%s (m68k_areg (regs, 7) - 4, oldpc);\n", dstl);
4082: printf ("\tm68k_areg (regs, 7) -= 4;\n");
4083: setpc ("srca");
1.1.1.7 ! root 4084: clear_m68k_offset();
1.1.1.4 root 4085: } else {
4086: if (curi->smode == Ad16 || curi->smode == absw || curi->smode == PC16)
4087: addcycles000 (2);
1.1.1.7 ! root 4088: if (curi->smode == Ad8r || curi->smode == PC8r) {
! 4089: addcycles000 (6);
! 4090: #ifdef WINUAE_FOR_HATARI
! 4091: /* Hatari : JSR in Ad8r and PC8r mode takes 22 cycles, but on ST it takes 24 cycles */
! 4092: /* because of an unaligned memory prefetch in this EA mode */
! 4093: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */
! 4094: if ( using_prefetch && !using_ce )
! 4095: addcycles000 (2);
! 4096: #endif
! 4097: if (cpu_level <= 1 && using_prefetch)
! 4098: printf ("\toldpc += 2;\n");
! 4099: }
1.1.1.4 root 4100: setpc ("srca");
1.1.1.7 ! root 4101: clear_m68k_offset();
1.1.1.4 root 4102: fill_prefetch_1 (0);
4103: printf ("\tm68k_areg (regs, 7) -= 4;\n");
1.1.1.7 ! root 4104: if (using_ce || using_prefetch) {
! 4105: printf ("\t%s (m68k_areg (regs, 7), oldpc >> 16);\n", dstw);
! 4106: printf ("\t%s (m68k_areg (regs, 7) + 2, oldpc);\n", dstw);
1.1.1.4 root 4107: } else {
4108: printf ("\t%s (m68k_areg (regs, 7), oldpc);\n", dstl);
4109: }
4110: }
4111: count_write += 2;
1.1.1.7 ! root 4112: fill_prefetch_full_020 ();
1.1.1.4 root 4113: fill_prefetch_next ();
1.1.1.7 ! root 4114: branch_inst = 1;
1.1.1.4 root 4115: break;
4116: case i_JMP:
1.1.1.7 ! root 4117: no_prefetch_ce020 = true;
! 4118: genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA|GF_NOREFILL);
1.1.1.4 root 4119: if (using_exception_3) {
4120: printf ("\tif (srca & 1) {\n");
1.1.1.7 ! root 4121: printf ("\t\texception3i (opcode, srca);\n");
1.1.1.4 root 4122: printf ("\t\tgoto %s;\n", endlabelstr);
4123: printf ("\t}\n");
4124: need_endlabel = 1;
4125: }
1.1.1.7 ! root 4126: if (curi->smode == Ad16 || curi->smode == absw || curi->smode == PC16)
1.1.1.4 root 4127: addcycles000 (2);
1.1.1.7 ! root 4128: if (curi->smode == Ad8r || curi->smode == PC8r) {
! 4129: addcycles000 (6);
! 4130: #ifdef WINUAE_FOR_HATARI
! 4131: /* Hatari : JMP in Ad8r and PC8r mode takes 22 cycles, but on ST it takes 24 cycles */
! 4132: /* because of an unaligned memory prefetch in this EA mode */
! 4133: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */
! 4134: if ( using_prefetch && !using_ce )
! 4135: addcycles000 (2);
! 4136: #endif
! 4137: }
1.1.1.4 root 4138: setpc ("srca");
1.1.1.7 ! root 4139: clear_m68k_offset();
1.1.1.4 root 4140: fill_prefetch_full ();
1.1.1.7 ! root 4141: branch_inst = 1;
1.1.1.4 root 4142: break;
4143: case i_BSR:
1.1.1.7 ! root 4144: // .b/.w = idle cycle, store high, store low, 2xprefetch
! 4145: if (isce020())
! 4146: no_prefetch_ce020 = true;
1.1.1.4 root 4147: printf ("\tuae_s32 s;\n");
1.1.1.7 ! root 4148: if (curi->size == sz_long) {
! 4149: if (next_cpu_level < 1)
! 4150: next_cpu_level = 1;
! 4151: }
! 4152: if (curi->size == sz_long && cpu_level < 2) {
! 4153: printf ("\tuae_u32 src = 0xffffffff;\n");
! 4154: } else {
! 4155: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA|GF_NOREFILL);
! 4156: }
1.1.1.4 root 4157: printf ("\ts = (uae_s32)src + 2;\n");
4158: if (using_exception_3) {
4159: printf ("\tif (src & 1) {\n");
1.1.1.7 ! root 4160: printf ("\t\texception3b (opcode, %s + s, 0, 1, %s + s);\n", getpc, getpc);
1.1.1.4 root 4161: printf ("\t\tgoto %s;\n", endlabelstr);
4162: printf ("\t}\n");
4163: need_endlabel = 1;
4164: }
4165: addcycles000 (2);
1.1.1.7 ! root 4166: if (using_indirect && !using_ce020 && !using_prefetch_020 && !using_ce) {
! 4167: printf("\tm68k_do_bsri_jit (%s + %d, s);\n", getpc, m68k_pc_offset);
! 4168: } else if (using_ce020 == 1) {
! 4169: printf ("\tm68k_do_bsr_ce020 (%s + %d, s);\n", getpc, m68k_pc_offset);
1.1.1.4 root 4170: } else if (using_ce020 == 2) {
1.1.1.7 ! root 4171: printf ("\tm68k_do_bsr_ce030 (%s + %d, s);\n", getpc, m68k_pc_offset);
1.1.1.4 root 4172: } else if (using_ce) {
1.1.1.7 ! root 4173: printf ("\tm68k_do_bsr_ce (%s + %d, s);\n", getpc, m68k_pc_offset);
1.1.1.4 root 4174: } else if (using_mmu) {
1.1.1.7 ! root 4175: printf ("\tm68k_do_bsr_mmu%s (%s + %d, s);\n", mmu_postfix, getpc, m68k_pc_offset);
! 4176: } else if (using_prefetch || using_prefetch_020) {
! 4177: printf ("\tm68k_do_bsri (%s + %d, s);\n", getpc, m68k_pc_offset);
1.1.1.4 root 4178: } else {
1.1.1.7 ! root 4179: printf ("\tm68k_do_bsr (%s + %d, s);\n", getpc, m68k_pc_offset);
1.1.1.4 root 4180: }
4181: count_write += 2;
1.1.1.7 ! root 4182: clear_m68k_offset();
1.1.1.4 root 4183: fill_prefetch_full ();
1.1.1.7 ! root 4184: branch_inst = 1;
1.1.1.4 root 4185: break;
4186: case i_Bcc:
1.1.1.7 ! root 4187: tail_ce020_done = true;
1.1.1.4 root 4188: if (curi->size == sz_long) {
4189: if (cpu_level < 2) {
4190: addcycles000 (2);
4191: printf ("\tif (cctrue (%d)) {\n", curi->cc);
1.1.1.7 ! root 4192: printf ("\t\texception3i (opcode, %s + 1);\n", getpc);
1.1.1.4 root 4193: printf ("\t\tgoto %s;\n", endlabelstr);
4194: printf ("\t}\n");
4195: sync_m68k_pc ();
1.1.1.7 ! root 4196: addcycles000 (2);
1.1.1.4 root 4197: irc2ir ();
4198: fill_prefetch_2 ();
4199: need_endlabel = 1;
1.1.1.7 ! root 4200: goto bccl_not68020;
1.1.1.4 root 4201: } else {
4202: if (next_cpu_level < 1)
4203: next_cpu_level = 1;
4204: }
4205: }
1.1.1.7 ! root 4206: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | (cpu_level < 2 ? GF_NOREFILL : 0));
1.1.1.4 root 4207: addcycles000 (2);
4208: printf ("\tif (!cctrue (%d)) goto didnt_jump;\n", curi->cc);
4209: if (using_exception_3) {
4210: printf ("\tif (src & 1) {\n");
1.1.1.7 ! root 4211: printf ("\t\texception3i (opcode, %s + 2 + (uae_s32)src);\n", getpc);
1.1.1.4 root 4212: printf ("\t\tgoto %s;\n", endlabelstr);
4213: printf ("\t}\n");
4214: need_endlabel = 1;
4215: }
1.1.1.7 ! root 4216: push_ins_cnt();
1.1.1.4 root 4217: if (using_prefetch) {
4218: incpc ("(uae_s32)src + 2");
1.1.1.7 ! root 4219: fill_prefetch_full_000 ();
1.1.1.4 root 4220: if (using_ce)
4221: printf ("\treturn;\n");
4222: else
4223: printf ("\treturn 10 * CYCLE_UNIT / 2;\n");
4224: } else {
4225: incpc ("(uae_s32)src + 2");
1.1.1.7 ! root 4226: add_head_cycs (6);
! 4227: fill_prefetch_full_020 ();
! 4228: returncycles ("\t", 10);
1.1.1.4 root 4229: }
1.1.1.7 ! root 4230: pop_ins_cnt();
1.1.1.4 root 4231: printf ("didnt_jump:;\n");
4232: need_endlabel = 1;
4233: sync_m68k_pc ();
1.1.1.7 ! root 4234: addcycles000 (2);
! 4235: get_prefetch_020_continue ();
1.1.1.4 root 4236: if (curi->size == sz_byte) {
4237: irc2ir ();
1.1.1.7 ! root 4238: add_head_cycs (4);
1.1.1.4 root 4239: fill_prefetch_2 ();
4240: } else if (curi->size == sz_word) {
1.1.1.7 ! root 4241: add_head_cycs (6);
! 4242: fill_prefetch_full_000 ();
1.1.1.4 root 4243: } else {
1.1.1.7 ! root 4244: add_head_cycs (6);
! 4245: fill_prefetch_full_000 ();
1.1.1.4 root 4246: }
4247: insn_n_cycles = curi->size == sz_byte ? 8 : 12;
1.1.1.7 ! root 4248: branch_inst = 1;
! 4249: bccl_not68020:
1.1.1.4 root 4250: break;
4251: case i_LEA:
4252: if (curi->smode == Ad8r || curi->smode == PC8r)
4253: addcycles000 (2);
1.1.1.7 ! root 4254: genamodedual (curi,
! 4255: curi->smode, "srcreg", curi->size, "src", 0, GF_AA,
! 4256: curi->dmode, "dstreg", curi->size, "dst", 2, GF_AA);
! 4257: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA);
! 4258: //genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, GF_AA);
! 4259: if (curi->smode == Ad8r || curi->smode == PC8r) {
1.1.1.4 root 4260: addcycles000 (2);
1.1.1.7 ! root 4261: #ifdef WINUAE_FOR_HATARI
! 4262: /* Hatari : LEA in Ad8r and PC8r mode takes 12 cycles, but on ST it takes 14 cycles */
! 4263: /* because of an unaligned memory prefetch in this EA mode */
! 4264: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */
! 4265: if ( using_prefetch && !using_ce )
! 4266: addcycles000 (2);
! 4267: #endif
! 4268: }
! 4269: fill_prefetch_next ();
1.1.1.4 root 4270: genastore ("srca", curi->dmode, "dstreg", curi->size, "dst");
4271: break;
4272: case i_PEA:
4273: if (curi->smode == Ad8r || curi->smode == PC8r)
4274: addcycles000 (2);
1.1.1.7 ! root 4275: genamode (curi, curi->smode, "srcreg", curi->size, "src", 0, 0, GF_AA);
! 4276: genamode (NULL, Apdi, "7", sz_long, "dst", 2, 0, GF_AA);
1.1.1.4 root 4277: if (!(curi->smode == absw || curi->smode == absl))
4278: fill_prefetch_next ();
1.1.1.7 ! root 4279: if (curi->smode == Ad8r || curi->smode == PC8r) {
1.1.1.4 root 4280: addcycles000 (2);
1.1.1.7 ! root 4281: #ifdef WINUAE_FOR_HATARI
! 4282: /* Hatari : PEA in Ad8r and PC8r mode takes 20 cycles, but on ST it takes 22 cycles */
! 4283: /* because of an unaligned memory prefetch in this EA mode */
! 4284: /* We add 2 cycles only in 68000 prefetch mode, 68000 CE mode is handled at the memory access level */
! 4285: if ( using_prefetch && !using_ce )
! 4286: addcycles000 (2);
! 4287: #endif
! 4288: }
1.1.1.4 root 4289: genastore ("srca", Apdi, "7", sz_long, "dst");
4290: if ((curi->smode == absw || curi->smode == absl))
4291: fill_prefetch_next ();
4292: break;
4293: case i_DBcc:
1.1.1.7 ! root 4294: // cc true: idle cycle, prefetch
! 4295: // cc false, counter expired: idle cycle, prefetch (from branch address), 2xprefetch (from next address)
! 4296: // cc false, counter not expired: idle cycle, prefetch
! 4297: tail_ce020_done = true;
! 4298: genamodedual (curi,
! 4299: curi->smode, "srcreg", curi->size, "src", 1, GF_AA | (cpu_level < 2 ? GF_NOREFILL : 0),
! 4300: curi->dmode, "dstreg", curi->size, "offs", 1, GF_AA | (cpu_level < 2 ? GF_NOREFILL : 0));
! 4301: //genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA | GF_NOREFILL);
! 4302: //genamode (curi, curi->dmode, "dstreg", curi->size, "offs", 1, 0, GF_AA | GF_NOREFILL);
! 4303: printf ("\tuaecptr oldpc = %s;\n", getpc);
! 4304: addcycles000_nonce("\t\t", 2);
1.1.1.4 root 4305: addcycles000 (2);
1.1.1.7 ! root 4306: push_ins_cnt();
1.1.1.4 root 4307: printf ("\tif (!cctrue (%d)) {\n", curi->cc);
1.1.1.7 ! root 4308: incpc ("(uae_s32)offs + 2");
! 4309: printf ("\t");
1.1.1.4 root 4310: fill_prefetch_1 (0);
1.1.1.7 ! root 4311: printf ("\t");
! 4312: genastore ("(src - 1)", curi->smode, "srcreg", curi->size, "src");
1.1.1.4 root 4313:
4314: printf ("\t\tif (src) {\n");
4315: if (using_exception_3) {
4316: printf ("\t\t\tif (offs & 1) {\n");
1.1.1.7 ! root 4317: printf ("\t\t\t\texception3i (opcode, %s + 2 + (uae_s32)offs + 2);\n", getpc);
1.1.1.4 root 4318: printf ("\t\t\t\tgoto %s;\n", endlabelstr);
4319: printf ("\t\t\t}\n");
4320: need_endlabel = 1;
4321: }
4322: irc2ir ();
1.1.1.7 ! root 4323: add_head_cycs (6);
1.1.1.4 root 4324: fill_prefetch_1 (2);
1.1.1.7 ! root 4325: fill_prefetch_full_020 ();
! 4326: returncycles ("\t\t\t", 8);
1.1.1.4 root 4327: printf ("\t\t}\n");
1.1.1.7 ! root 4328: add_head_cycs (10);
! 4329: addcycles000_nonce("\t\t", 2);
1.1.1.4 root 4330: printf ("\t} else {\n");
1.1.1.7 ! root 4331: addcycles000_onlyce(2);
! 4332: addcycles000_nonce("\t\t", 2);
1.1.1.4 root 4333: printf ("\t}\n");
1.1.1.7 ! root 4334: pop_ins_cnt();
1.1.1.4 root 4335: setpc ("oldpc + %d", m68k_pc_offset);
1.1.1.7 ! root 4336: clear_m68k_offset();
! 4337: get_prefetch_020_continue ();
! 4338: fill_prefetch_full_000 ();
1.1.1.4 root 4339: insn_n_cycles = 12;
4340: need_endlabel = 1;
1.1.1.7 ! root 4341: branch_inst = 1;
1.1.1.4 root 4342: break;
4343: case i_Scc:
4344: // confirmed
1.1.1.7 ! root 4345: next_level_000 ();
! 4346: genamode (curi, curi->smode, "srcreg", curi->size, "src", cpu_level == 0 ? 1 : 2, 0, 0);
1.1.1.4 root 4347: start_brace ();
4348: fill_prefetch_next();
4349: start_brace ();
4350: printf ("\tint val = cctrue (%d) ? 0xff : 0;\n", curi->cc);
1.1.1.7 ! root 4351: if (isreg (curi->smode)) {
! 4352: if (using_ce)
! 4353: printf ("\tint cycles = val ? 2 : 0;\n");
1.1.1.4 root 4354: addcycles000_3 ("\t");
1.1.1.7 ! root 4355: addcycles000_nonces("\t", "(val ? 2 : 0)");
1.1.1.4 root 4356: }
4357: genastore ("val", curi->smode, "srcreg", curi->size, "src");
4358: break;
4359: case i_DIVU:
1.1.1.7 ! root 4360: tail_ce020_done = true;
! 4361: genamodedual (curi,
! 4362: curi->smode, "srcreg", sz_word, "src", 1, 0,
! 4363: curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1.1.1.4 root 4364: printf ("\tCLEAR_CZNV ();\n");
4365: printf ("\tif (src == 0) {\n");
1.1.1.7 ! root 4366: if (cpu_level > 1)
! 4367: printf ("\t\tdivbyzero_special (0, dst);\n");
1.1.1.4 root 4368: incpc ("%d", m68k_pc_offset);
1.1.1.7 ! root 4369: printf ("\t\tException (5);\n");
1.1.1.4 root 4370: printf ("\t\tgoto %s;\n", endlabelstr);
4371: printf ("\t} else {\n");
4372: printf ("\t\tuae_u32 newv = (uae_u32)dst / (uae_u32)(uae_u16)src;\n");
4373: printf ("\t\tuae_u32 rem = (uae_u32)dst %% (uae_u32)(uae_u16)src;\n");
4374: if (using_ce) {
4375: start_brace ();
1.1.1.7 ! root 4376: printf ("\t\tint cycles = (getDivu68kCycles((uae_u32)dst, (uae_u16)src)) - 4;\n");
1.1.1.4 root 4377: addcycles000_3 ("\t\t");
4378: }
1.1.1.7 ! root 4379: addcycles000_nonces("\t\t", "(getDivu68kCycles((uae_u32)dst, (uae_u16)src)) - 4");
! 4380: fill_prefetch_next ();
1.1.1.4 root 4381: /* The N flag appears to be set each time there is an overflow.
1.1.1.7 ! root 4382: * Weird. but 68020 only sets N when dst is negative.. */
1.1.1.4 root 4383: printf ("\t\tif (newv > 0xffff) {\n");
4384: printf ("\t\t\tSET_VFLG (1);\n");
4385: #ifdef UNDEF68020
4386: if (cpu_level >= 2)
4387: printf ("\t\t\tif (currprefs.cpu_level == 0 || dst < 0) SET_NFLG (®s, 1);\n");
4388: else /* ??? some 68000 revisions may not set NFLG when overflow happens.. */
4389: #endif
4390: printf ("\t\t\tSET_NFLG (1);\n");
4391: printf ("\t\t} else {\n");
4392: printf ("\t\t"); genflags (flag_logical, sz_word, "newv", "", "");
4393: printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
4394: printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
4395: printf ("\t\t}\n");
4396: sync_m68k_pc ();
4397: printf ("\t}\n");
4398: count_ncycles++;
4399: insn_n_cycles += 136 - (136 - 76) / 2; /* average */
4400: need_endlabel = 1;
1.1.1.7 ! root 4401: tail_ce020_done = false;
! 4402: returntail (false);
1.1.1.4 root 4403: break;
4404: case i_DIVS:
1.1.1.7 ! root 4405: tail_ce020_done = true;
! 4406: genamodedual (curi,
! 4407: curi->smode, "srcreg", sz_word, "src", 1, 0,
! 4408: curi->dmode, "dstreg", sz_long, "dst", 1, 0);
1.1.1.4 root 4409: printf ("\tif (src == 0) {\n");
1.1.1.7 ! root 4410: if (cpu_level > 1)
! 4411: printf ("\t\tdivbyzero_special (1, dst);\n");
1.1.1.4 root 4412: incpc ("%d", m68k_pc_offset);
1.1.1.7 ! root 4413: printf ("\t\tException (5);\n");
1.1.1.4 root 4414: printf ("\t\tgoto %s;\n", endlabelstr);
1.1.1.7 ! root 4415: printf ("\t}\n");
! 4416: printf ("\tCLEAR_CZNV ();\n");
1.1.1.4 root 4417: if (using_ce) {
4418: start_brace ();
1.1.1.7 ! root 4419: printf ("\t\tint cycles = (getDivs68kCycles((uae_s32)dst, (uae_s16)src)) - 4;\n");
1.1.1.4 root 4420: addcycles000_3 ("\t\t");
4421: }
1.1.1.7 ! root 4422: addcycles000_nonces("\t\t", "(getDivs68kCycles((uae_s32)dst, (uae_s16)src)) - 4");
! 4423: fill_prefetch_next ();
! 4424: printf ("\tif (dst == 0x80000000 && src == -1) {\n");
! 4425: printf ("\t\tSET_VFLG (1);\n");
! 4426: printf ("\t\tSET_NFLG (1);\n");
! 4427: printf ("\t} else {\n");
! 4428: printf ("\t\tuae_s32 newv = (uae_s32)dst / (uae_s32)(uae_s16)src;\n");
! 4429: printf ("\t\tuae_u16 rem = (uae_s32)dst %% (uae_s32)(uae_s16)src;\n");
1.1.1.4 root 4430: printf ("\t\tif ((newv & 0xffff8000) != 0 && (newv & 0xffff8000) != 0xffff8000) {\n");
4431: printf ("\t\t\tSET_VFLG (1);\n");
4432: #ifdef UNDEF68020
4433: if (cpu_level > 0)
4434: printf ("\t\t\tif (currprefs.cpu_level == 0) SET_NFLG (®s, 1);\n");
4435: else
4436: #endif
4437: printf ("\t\t\tSET_NFLG (1);\n");
4438: printf ("\t\t} else {\n");
4439: printf ("\t\t\tif (((uae_s16)rem < 0) != ((uae_s32)dst < 0)) rem = -rem;\n");
4440: genflags (flag_logical, sz_word, "newv", "", "");
4441: printf ("\t\t\tnewv = (newv & 0xffff) | ((uae_u32)rem << 16);\n");
4442: printf ("\t\t"); genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
4443: printf ("\t\t}\n");
4444: printf ("\t}\n");
1.1.1.7 ! root 4445: sync_m68k_pc ();
1.1.1.4 root 4446: count_ncycles++;
4447: insn_n_cycles += 156 - (156 - 120) / 2; /* average */
4448: need_endlabel = 1;
1.1.1.7 ! root 4449: tail_ce020_done = false;
! 4450: returntail (false);
1.1.1.4 root 4451: break;
4452: case i_MULU:
1.1.1.7 ! root 4453: genamodedual (curi,
! 4454: curi->smode, "srcreg", sz_word, "src", 1, 0,
! 4455: curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1.1.1.4 root 4456: fill_prefetch_next();
4457: start_brace ();
4458: printf ("\tuae_u32 newv = (uae_u32)(uae_u16)dst * (uae_u32)(uae_u16)src;\n");
4459: if (using_ce)
4460: printf ("\tint cycles = 38 - 4, bits;\n");
1.1.1.7 ! root 4461: else if (using_prefetch)
! 4462: printf ("\tint bits;\n");
1.1.1.4 root 4463: genflags (flag_logical, sz_long, "newv", "", "");
4464: if (using_ce) {
4465: printf ("\tfor(bits = 0; bits < 16 && src; bits++, src >>= 1)\n");
4466: printf ("\t\tif (src & 1) cycles += 2;\n");
4467: addcycles000_3 ("\t");
4468: }
1.1.1.7 ! root 4469: addcycles000_nonce("\tfor(bits = 0; bits < 16 && src; bits++, src >>= 1)\n\t\tif (src & 1) ", 2);
1.1.1.4 root 4470: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
4471: sync_m68k_pc ();
4472: count_cycles += 38 - 4;
4473: count_ncycles++;
4474: insn_n_cycles += (70 - 38) / 2 + 38; /* average */
4475: break;
4476: case i_MULS:
1.1.1.7 ! root 4477: genamodedual (curi,
! 4478: curi->smode, "srcreg", sz_word, "src", 1, 0,
! 4479: curi->dmode, "dstreg", sz_word, "dst", 1, 0);
1.1.1.4 root 4480: fill_prefetch_next();
4481: start_brace ();
4482: printf ("\tuae_u32 newv = (uae_s32)(uae_s16)dst * (uae_s32)(uae_s16)src;\n");
4483: if (using_ce) {
4484: printf ("\tint cycles = 38 - 4, bits;\n");
4485: printf ("\tuae_u32 usrc;\n");
1.1.1.7 ! root 4486: } else if (using_prefetch) {
! 4487: printf ("\tint bits;\n");
! 4488: printf ("\tuae_u32 usrc;\n");
1.1.1.4 root 4489: }
4490: genflags (flag_logical, sz_long, "newv", "", "");
4491: if (using_ce) {
4492: printf ("\tusrc = ((uae_u32)src) << 1;\n");
4493: printf ("\tfor(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1)\n");
4494: printf ("\t\tif ((usrc & 3) == 1 || (usrc & 3) == 2) cycles += 2;\n");
4495: addcycles000_3 ("\t");
4496: }
1.1.1.7 ! root 4497: addcycles000_nonce("\tusrc = ((uae_u32)src) << 1;\n\tfor(bits = 0; bits < 16 && usrc; bits++, usrc >>= 1)\n\t\tif ((usrc & 3) == 1 || (usrc & 3) == 2) ", 2);
1.1.1.4 root 4498: genastore ("newv", curi->dmode, "dstreg", sz_long, "dst");
4499: count_cycles += 38 - 4;
4500: count_ncycles++;
4501: insn_n_cycles += (70 - 38) / 2 + 38; /* average */
4502: break;
4503: case i_CHK:
1.1.1.7 ! root 4504: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
! 4505: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1.1.1.4 root 4506: sync_m68k_pc ();
4507: addcycles000 (4);
4508: printf ("\tif (dst > src) {\n");
4509: printf ("\t\tSET_NFLG (0);\n");
1.1.1.7 ! root 4510: printf ("\t\tException (6);\n");
1.1.1.4 root 4511: printf ("\t\tgoto %s;\n", endlabelstr);
4512: printf ("\t}\n");
4513: addcycles000 (2);
4514: printf ("\tif ((uae_s32)dst < 0) {\n");
4515: printf ("\t\tSET_NFLG (1);\n");
1.1.1.7 ! root 4516: printf ("\t\tException (6);\n");
1.1.1.4 root 4517: printf ("\t\tgoto %s;\n", endlabelstr);
4518: printf ("\t}\n");
4519: fill_prefetch_next ();
4520: need_endlabel = 1;
4521: break;
4522: case i_CHK2:
1.1.1.7 ! root 4523: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
! 4524: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0);
1.1.1.4 root 4525: fill_prefetch_0 ();
4526: printf ("\t{uae_s32 upper,lower,reg = regs.regs[(extra >> 12) & 15];\n");
4527: switch (curi->size) {
4528: case sz_byte:
4529: printf ("\tlower = (uae_s32)(uae_s8)%s (dsta); upper = (uae_s32)(uae_s8)%s (dsta + 1);\n", srcb, srcb);
4530: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s8)reg;\n");
4531: break;
4532: case sz_word:
4533: printf ("\tlower = (uae_s32)(uae_s16)%s (dsta); upper = (uae_s32)(uae_s16)%s (dsta + 2);\n", srcw, srcw);
4534: printf ("\tif ((extra & 0x8000) == 0) reg = (uae_s32)(uae_s16)reg;\n");
4535: break;
4536: case sz_long:
4537: printf ("\tlower = %s (dsta); upper = %s (dsta + 4);\n", srcl, srcl);
4538: break;
4539: default:
1.1.1.7 ! root 4540: term ();
1.1.1.4 root 4541: }
4542: printf ("\tSET_ZFLG (upper == reg || lower == reg);\n");
4543: printf ("\tSET_CFLG_ALWAYS (lower <= upper ? reg < lower || reg > upper : reg > upper || reg < lower);\n");
1.1.1.7 ! root 4544: printf ("\tif ((extra & 0x800) && GET_CFLG ()) { Exception (6); goto %s; }\n}\n", endlabelstr);
! 4545: need_endlabel = 1;
1.1.1.4 root 4546: break;
4547:
4548: case i_ASR:
1.1.1.7 ! root 4549: genamodedual (curi,
! 4550: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4551: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4552: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4553: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4554: fill_prefetch_next();
4555: start_brace ();
4556: switch (curi->size) {
4557: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4558: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4559: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4560: default: term ();
1.1.1.4 root 4561: }
4562: printf ("\tuae_u32 sign = (%s & val) >> %d;\n", cmask (curi->size), bit_size (curi->size) - 1);
4563: printf ("\tint ccnt = cnt & 63;\n");
4564: printf ("\tcnt &= 63;\n");
4565: printf ("\tCLEAR_CZNV ();\n");
4566: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
4567: printf ("\t\tval = %s & (uae_u32)-sign;\n", bit_mask (curi->size));
4568: printf ("\t\tSET_CFLG (sign);\n");
4569: duplicate_carry (1);
4570: if (source_is_imm1_8 (curi))
4571: printf ("\t} else {\n");
1.1.1.7 ! root 4572: else
1.1.1.4 root 4573: printf ("\t} else if (cnt > 0) {\n");
4574: printf ("\t\tval >>= cnt - 1;\n");
4575: printf ("\t\tSET_CFLG (val & 1);\n");
4576: duplicate_carry (1);
4577: printf ("\t\tval >>= 1;\n");
4578: printf ("\t\tval |= (%s << (%d - cnt)) & (uae_u32)-sign;\n",
4579: bit_mask (curi->size),
4580: bit_size (curi->size));
4581: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
4582: printf ("\t}\n");
4583: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4584: shift_ce (curi->dmode, curi->size);
4585: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4586: break;
4587: case i_ASL:
1.1.1.7 ! root 4588: genamodedual (curi,
! 4589: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4590: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4591: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4592: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4593: fill_prefetch_next();
4594: start_brace ();
4595: switch (curi->size) {
4596: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4597: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4598: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4599: default: term ();
1.1.1.4 root 4600: }
4601: printf ("\tint ccnt = cnt & 63;\n");
4602: printf ("\tcnt &= 63;\n");
4603: printf ("\tCLEAR_CZNV ();\n");
4604: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
4605: printf ("\t\tSET_VFLG (val != 0);\n");
4606: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n",
4607: bit_size (curi->size));
4608: duplicate_carry (1);
4609: printf ("\t\tval = 0;\n");
4610: if (source_is_imm1_8 (curi))
4611: printf ("\t} else {\n");
4612: else
4613: printf ("\t} else if (cnt > 0) {\n");
4614: printf ("\t\tuae_u32 mask = (%s << (%d - cnt)) & %s;\n",
4615: bit_mask (curi->size),
4616: bit_size (curi->size) - 1,
4617: bit_mask (curi->size));
4618: printf ("\t\tSET_VFLG ((val & mask) != mask && (val & mask) != 0);\n");
4619: printf ("\t\tval <<= cnt - 1;\n");
4620: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
4621: duplicate_carry (1);
4622: printf ("\t\tval <<= 1;\n");
4623: printf ("\t\tval &= %s;\n", bit_mask (curi->size));
4624: printf ("\t}\n");
4625: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4626: shift_ce (curi->dmode, curi->size);
4627: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4628: break;
4629: case i_LSR:
1.1.1.7 ! root 4630: genamodedual (curi,
! 4631: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4632: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4633: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4634: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4635: fill_prefetch_next();
4636: start_brace ();
4637: switch (curi->size) {
4638: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4639: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4640: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4641: default: term ();
1.1.1.4 root 4642: }
4643: printf ("\tint ccnt = cnt & 63;\n");
4644: printf ("\tcnt &= 63;\n");
4645: printf ("\tCLEAR_CZNV ();\n");
4646: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
4647: printf ("\t\tSET_CFLG ((cnt == %d) & (val >> %d));\n",
4648: bit_size (curi->size), bit_size (curi->size) - 1);
4649: duplicate_carry (1);
4650: printf ("\t\tval = 0;\n");
4651: if (source_is_imm1_8 (curi))
4652: printf ("\t} else {\n");
1.1.1.7 ! root 4653: else
1.1.1.4 root 4654: printf ("\t} else if (cnt > 0) {\n");
4655: printf ("\t\tval >>= cnt - 1;\n");
4656: printf ("\t\tSET_CFLG (val & 1);\n");
4657: duplicate_carry (1);
4658: printf ("\t\tval >>= 1;\n");
4659: printf ("\t}\n");
4660: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4661: shift_ce (curi->dmode, curi->size);
4662: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4663: break;
4664: case i_LSL:
1.1.1.7 ! root 4665: genamodedual (curi,
! 4666: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4667: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4668: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4669: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4670: fill_prefetch_next();
4671: start_brace ();
4672: switch (curi->size) {
4673: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4674: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4675: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4676: default: term ();
1.1.1.4 root 4677: }
4678: printf ("\tint ccnt = cnt & 63;\n");
4679: printf ("\tcnt &= 63;\n");
4680: printf ("\tCLEAR_CZNV ();\n");
4681: printf ("\tif (cnt >= %d) {\n", bit_size (curi->size));
4682: printf ("\t\tSET_CFLG (cnt == %d ? val & 1 : 0);\n", bit_size (curi->size));
4683: duplicate_carry (1);
4684: printf ("\t\tval = 0;\n");
4685: if (source_is_imm1_8 (curi))
4686: printf ("\t} else {\n");
1.1.1.7 ! root 4687: else
1.1.1.4 root 4688: printf ("\t} else if (cnt > 0) {\n");
4689: printf ("\t\tval <<= (cnt - 1);\n");
4690: printf ("\t\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
4691: duplicate_carry (1);
4692: printf ("\t\tval <<= 1;\n");
4693: printf ("\tval &= %s;\n", bit_mask (curi->size));
4694: printf ("\t}\n");
4695: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4696: shift_ce (curi->dmode, curi->size);
4697: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4698: break;
4699: case i_ROL:
1.1.1.7 ! root 4700: genamodedual (curi,
! 4701: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4702: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4703: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4704: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4705: fill_prefetch_next ();
4706: start_brace ();
4707: switch (curi->size) {
4708: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4709: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4710: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4711: default: term ();
1.1.1.4 root 4712: }
4713: printf ("\tint ccnt = cnt & 63;\n");
4714: printf ("\tcnt &= 63;\n");
4715: printf ("\tCLEAR_CZNV ();\n");
4716: if (source_is_imm1_8 (curi))
4717: printf ("{");
4718: else
4719: printf ("\tif (cnt > 0) {\n");
4720: printf ("\tuae_u32 loval;\n");
4721: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
4722: printf ("\tloval = val >> (%d - cnt);\n", bit_size (curi->size));
4723: printf ("\tval <<= cnt;\n");
4724: printf ("\tval |= loval;\n");
4725: printf ("\tval &= %s;\n", bit_mask (curi->size));
4726: printf ("\tSET_CFLG (val & 1);\n");
4727: printf ("}\n");
4728: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4729: shift_ce (curi->dmode, curi->size);
4730: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4731: break;
4732: case i_ROR:
1.1.1.7 ! root 4733: genamodedual (curi,
! 4734: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4735: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4736: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4737: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4738: fill_prefetch_next ();
4739: start_brace ();
4740: switch (curi->size) {
4741: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4742: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4743: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4744: default: term ();
1.1.1.4 root 4745: }
4746: printf ("\tint ccnt = cnt & 63;\n");
4747: printf ("\tcnt &= 63;\n");
4748: printf ("\tCLEAR_CZNV ();\n");
4749: if (source_is_imm1_8 (curi))
4750: printf ("{");
4751: else
4752: printf ("\tif (cnt > 0) {");
4753: printf ("\tuae_u32 hival;\n");
4754: printf ("\tcnt &= %d;\n", bit_size (curi->size) - 1);
4755: printf ("\thival = val << (%d - cnt);\n", bit_size (curi->size));
4756: printf ("\tval >>= cnt;\n");
4757: printf ("\tval |= hival;\n");
4758: printf ("\tval &= %s;\n", bit_mask (curi->size));
4759: printf ("\tSET_CFLG ((val & %s) >> %d);\n", cmask (curi->size), bit_size (curi->size) - 1);
4760: printf ("\t}\n");
4761: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4762: shift_ce (curi->dmode, curi->size);
4763: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4764: break;
4765: case i_ROXL:
1.1.1.7 ! root 4766: genamodedual (curi,
! 4767: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4768: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4769: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4770: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4771: fill_prefetch_next ();
4772: start_brace ();
4773: switch (curi->size) {
4774: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4775: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4776: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4777: default: term ();
1.1.1.4 root 4778: }
4779: printf ("\tint ccnt = cnt & 63;\n");
4780: printf ("\tcnt &= 63;\n");
4781: printf ("\tCLEAR_CZNV ();\n");
4782: if (source_is_imm1_8 (curi))
4783: printf ("{");
4784: else {
4785: force_range_for_rox ("cnt", curi->size);
4786: printf ("\tif (cnt > 0) {\n");
4787: }
4788: printf ("\tcnt--;\n");
4789: printf ("\t{\n\tuae_u32 carry;\n");
4790: printf ("\tuae_u32 loval = val >> (%d - cnt);\n", bit_size (curi->size) - 1);
4791: printf ("\tcarry = loval & 1;\n");
4792: printf ("\tval = (((val << 1) | GET_XFLG ()) << cnt) | (loval >> 1);\n");
4793: printf ("\tSET_XFLG (carry);\n");
4794: printf ("\tval &= %s;\n", bit_mask (curi->size));
4795: printf ("\t} }\n");
4796: printf ("\tSET_CFLG (GET_XFLG ());\n");
4797: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4798: shift_ce (curi->dmode, curi->size);
4799: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4800: break;
4801: case i_ROXR:
1.1.1.7 ! root 4802: genamodedual (curi,
! 4803: curi->smode, "srcreg", curi->size, "cnt", 1, 0,
! 4804: curi->dmode, "dstreg", curi->size, "data", 1, GF_RMW);
! 4805: //genamode (curi, curi->smode, "srcreg", curi->size, "cnt", 1, 0, 0);
! 4806: //genamode (curi, curi->dmode, "dstreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4807: fill_prefetch_next ();
4808: start_brace ();
4809: switch (curi->size) {
4810: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4811: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4812: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4813: default: term ();
1.1.1.4 root 4814: }
4815: printf ("\tint ccnt = cnt & 63;\n");
4816: printf ("\tcnt &= 63;\n");
4817: printf ("\tCLEAR_CZNV ();\n");
4818: if (source_is_imm1_8 (curi))
4819: printf ("{");
4820: else {
4821: force_range_for_rox ("cnt", curi->size);
4822: printf ("\tif (cnt > 0) {\n");
4823: }
4824: printf ("\tcnt--;\n");
4825: printf ("\t{\n\tuae_u32 carry;\n");
4826: printf ("\tuae_u32 hival = (val << 1) | GET_XFLG ();\n");
4827: printf ("\thival <<= (%d - cnt);\n", bit_size (curi->size) - 1);
4828: printf ("\tval >>= cnt;\n");
4829: printf ("\tcarry = val & 1;\n");
4830: printf ("\tval >>= 1;\n");
4831: printf ("\tval |= hival;\n");
4832: printf ("\tSET_XFLG (carry);\n");
4833: printf ("\tval &= %s;\n", bit_mask (curi->size));
4834: printf ("\t} }\n");
4835: printf ("\tSET_CFLG (GET_XFLG ());\n");
4836: genflags (flag_logical_noclobber, curi->size, "val", "", "");
4837: shift_ce (curi->dmode, curi->size);
4838: genastore ("val", curi->dmode, "dstreg", curi->size, "data");
4839: break;
4840: case i_ASRW:
1.1.1.7 ! root 4841: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4842: fill_prefetch_next ();
4843: start_brace ();
4844: switch (curi->size) {
4845: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4846: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4847: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4848: default: term ();
1.1.1.4 root 4849: }
4850: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
4851: printf ("\tuae_u32 cflg = val & 1;\n");
4852: printf ("\tval = (val >> 1) | sign;\n");
4853: genflags (flag_logical, curi->size, "val", "", "");
4854: printf ("\tSET_CFLG (cflg);\n");
4855: duplicate_carry (0);
4856: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4857: break;
4858: case i_ASLW:
1.1.1.7 ! root 4859: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4860: fill_prefetch_next ();
4861: start_brace ();
4862: switch (curi->size) {
4863: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4864: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4865: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4866: default: term ();
1.1.1.4 root 4867: }
4868: printf ("\tuae_u32 sign = %s & val;\n", cmask (curi->size));
4869: printf ("\tuae_u32 sign2;\n");
4870: printf ("\tval <<= 1;\n");
4871: genflags (flag_logical, curi->size, "val", "", "");
4872: printf ("\tsign2 = %s & val;\n", cmask (curi->size));
4873: printf ("\tSET_CFLG (sign != 0);\n");
4874: duplicate_carry (0);
4875: printf ("\tSET_VFLG (GET_VFLG () | (sign2 != sign));\n");
4876: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4877: break;
4878: case i_LSRW:
1.1.1.7 ! root 4879: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4880: fill_prefetch_next ();
4881: start_brace ();
4882: switch (curi->size) {
4883: case sz_byte: printf ("\tuae_u32 val = (uae_u8)data;\n"); break;
4884: case sz_word: printf ("\tuae_u32 val = (uae_u16)data;\n"); break;
4885: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4886: default: term ();
1.1.1.4 root 4887: }
4888: printf ("\tuae_u32 carry = val & 1;\n");
4889: printf ("\tval >>= 1;\n");
4890: genflags (flag_logical, curi->size, "val", "", "");
4891: printf ("\tSET_CFLG (carry);\n");
4892: duplicate_carry (0);
4893: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4894: break;
4895: case i_LSLW:
1.1.1.7 ! root 4896: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4897: fill_prefetch_next ();
4898: start_brace ();
4899: switch (curi->size) {
4900: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
4901: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
4902: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4903: default: term ();
1.1.1.4 root 4904: }
4905: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
4906: printf ("\tval <<= 1;\n");
4907: genflags (flag_logical, curi->size, "val", "", "");
4908: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
4909: duplicate_carry (0);
4910: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4911: break;
4912: case i_ROLW:
1.1.1.7 ! root 4913: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4914: fill_prefetch_next ();
4915: start_brace ();
4916: switch (curi->size) {
4917: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
4918: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
4919: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4920: default: term ();
1.1.1.4 root 4921: }
4922: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
4923: printf ("\tval <<= 1;\n");
4924: printf ("\tif (carry) val |= 1;\n");
4925: genflags (flag_logical, curi->size, "val", "", "");
4926: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
4927: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4928: break;
4929: case i_RORW:
1.1.1.7 ! root 4930: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4931: fill_prefetch_next ();
4932: start_brace ();
4933: switch (curi->size) {
4934: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
4935: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
4936: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4937: default: term ();
1.1.1.4 root 4938: }
4939: printf ("\tuae_u32 carry = val & 1;\n");
4940: printf ("\tval >>= 1;\n");
4941: printf ("\tif (carry) val |= %s;\n", cmask (curi->size));
4942: genflags (flag_logical, curi->size, "val", "", "");
4943: printf ("\tSET_CFLG (carry);\n");
4944: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4945: break;
4946: case i_ROXLW:
1.1.1.7 ! root 4947: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4948: fill_prefetch_next ();
4949: start_brace ();
4950: switch (curi->size) {
4951: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
4952: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
4953: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4954: default: term ();
1.1.1.4 root 4955: }
4956: printf ("\tuae_u32 carry = val & %s;\n", cmask (curi->size));
4957: printf ("\tval <<= 1;\n");
4958: printf ("\tif (GET_XFLG ()) val |= 1;\n");
4959: genflags (flag_logical, curi->size, "val", "", "");
4960: printf ("\tSET_CFLG (carry >> %d);\n", bit_size (curi->size) - 1);
4961: duplicate_carry (0);
4962: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4963: break;
4964: case i_ROXRW:
1.1.1.7 ! root 4965: genamode (curi, curi->smode, "srcreg", curi->size, "data", 1, 0, GF_RMW);
1.1.1.4 root 4966: fill_prefetch_next ();
4967: start_brace ();
4968: switch (curi->size) {
4969: case sz_byte: printf ("\tuae_u8 val = data;\n"); break;
4970: case sz_word: printf ("\tuae_u16 val = data;\n"); break;
4971: case sz_long: printf ("\tuae_u32 val = data;\n"); break;
1.1.1.7 ! root 4972: default: term ();
1.1.1.4 root 4973: }
4974: printf ("\tuae_u32 carry = val & 1;\n");
4975: printf ("\tval >>= 1;\n");
4976: printf ("\tif (GET_XFLG ()) val |= %s;\n", cmask (curi->size));
4977: genflags (flag_logical, curi->size, "val", "", "");
4978: printf ("\tSET_CFLG (carry);\n");
4979: duplicate_carry (0);
4980: genastore ("val", curi->smode, "srcreg", curi->size, "data");
4981: break;
4982: case i_MOVEC2:
1.1.1.7 ! root 4983: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 4984: fill_prefetch_next ();
4985: start_brace ();
4986: printf ("\tint regno = (src >> 12) & 15;\n");
4987: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
4988: printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
4989: break;
4990: case i_MOVE2C:
1.1.1.7 ! root 4991: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
1.1.1.4 root 4992: fill_prefetch_next ();
4993: start_brace ();
4994: printf ("\tint regno = (src >> 12) & 15;\n");
4995: printf ("\tuae_u32 *regp = regs.regs + regno;\n");
4996: printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
4997: break;
4998: case i_CAS:
4999: {
5000: int old_brace_level;
1.1.1.7 ! root 5001: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_LRMW);
! 5002: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_LRMW);
! 5003: if (cpu_level == 5 && curi->size > 0) {
! 5004: printf ("\tif ((dsta & %d) && currprefs.int_no_unimplemented && get_cpu_model () == 68060) {\n", curi->size == 1 ? 1 : 3);
! 5005: if (curi->dmode == Aipi || curi->dmode == Apdi)
! 5006: printf ("\t\tm68k_areg (regs, dstreg) %c= %d;\n", curi->dmode == Aipi ? '-' : '+', 1 << curi->size);
! 5007: sync_m68k_pc_noreset ();
! 5008: printf ("\t\top_unimpl (opcode);\n");
! 5009: printf ("\t\tgoto %s;\n", endlabelstr);
! 5010: printf ("\t}\n");
! 5011: need_endlabel = 1;
! 5012: }
1.1.1.4 root 5013: fill_prefetch_0 ();
5014: start_brace ();
5015: printf ("\tint ru = (src >> 6) & 7;\n");
5016: printf ("\tint rc = src & 7;\n");
5017: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, rc)", "dst");
1.1.1.7 ! root 5018: gen_set_fault_pc ();
! 5019: printf ("\tif (GET_ZFLG ()) ");
1.1.1.4 root 5020: old_brace_level = n_braces;
5021: start_brace ();
1.1.1.7 ! root 5022: printf ("\n\t");
! 5023: genastore_cas ("(m68k_dreg (regs, ru))", curi->dmode, "dstreg", curi->size, "dst");
! 5024: printf ("\t");
1.1.1.4 root 5025: pop_braces (old_brace_level);
5026: printf ("else");
5027: start_brace ();
1.1.1.7 ! root 5028: printf ("\n");
! 5029: get_prefetch_020 ();
! 5030: if (cpu_level >= 4) {
! 5031: // apparently 68040/060 needs to always write at the end of RMW cycle
! 5032: printf ("\t");
! 5033: genastore_cas ("dst", curi->dmode, "dstreg", curi->size, "dst");
! 5034: }
! 5035: switch (curi->size) {
! 5036: case sz_byte:
! 5037: printf ("\t\tm68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xff) | (dst & 0xff);\n");
! 5038: break;
! 5039: case sz_word:
! 5040: printf ("\t\tm68k_dreg(regs, rc) = (m68k_dreg(regs, rc) & ~0xffff) | (dst & 0xffff);\n");
! 5041: break;
! 5042: default:
! 5043: printf ("\t\tm68k_dreg(regs, rc) = dst;\n");
! 5044: break;
! 5045: }
1.1.1.4 root 5046: pop_braces (old_brace_level);
5047: }
5048: break;
5049: case i_CAS2:
1.1.1.7 ! root 5050: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, GF_LRMW);
1.1.1.4 root 5051: printf ("\tuae_u32 rn1 = regs.regs[(extra >> 28) & 15];\n");
5052: printf ("\tuae_u32 rn2 = regs.regs[(extra >> 12) & 15];\n");
5053: if (curi->size == sz_word) {
5054: int old_brace_level = n_braces;
1.1.1.7 ! root 5055: printf ("\tuae_u16 dst1 = %s (rn1), dst2 = %s (rn2);\n", srcwlrmw, srcwlrmw);
1.1.1.4 root 5056: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1");
5057: printf ("\tif (GET_ZFLG ()) {\n");
5058: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2");
5059: printf ("\tif (GET_ZFLG ()) {\n");
1.1.1.7 ! root 5060: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n", dstwlrmw);
! 5061: printf ("\t%s (rn2, m68k_dreg (regs, (extra >> 6) & 7));\n", dstwlrmw);
1.1.1.4 root 5062: printf ("\t}}\n");
5063: pop_braces (old_brace_level);
5064: printf ("\tif (! GET_ZFLG ()) {\n");
5065: printf ("\tm68k_dreg (regs, (extra >> 6) & 7) = (m68k_dreg (regs, (extra >> 6) & 7) & ~0xffff) | (dst2 & 0xffff);\n");
1.1.1.7 ! root 5066: printf ("\tm68k_dreg (regs, (extra >> 22) & 7) = (m68k_dreg (regs, (extra >> 22) & 7) & ~0xffff) | (dst1 & 0xffff);\n");
1.1.1.4 root 5067: printf ("\t}\n");
5068: } else {
5069: int old_brace_level = n_braces;
1.1.1.7 ! root 5070: printf ("\tuae_u32 dst1 = %s (rn1), dst2 = %s (rn2);\n", srcllrmw, srcllrmw);
1.1.1.4 root 5071: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, (extra >> 16) & 7)", "dst1");
5072: printf ("\tif (GET_ZFLG ()) {\n");
5073: genflags (flag_cmp, curi->size, "newv", "m68k_dreg (regs, extra & 7)", "dst2");
5074: printf ("\tif (GET_ZFLG ()) {\n");
1.1.1.7 ! root 5075: printf ("\t%s (rn1, m68k_dreg (regs, (extra >> 22) & 7));\n", dstllrmw);
! 5076: printf ("\t%s (rn2, m68k_dreg (regs, (extra >> 6) & 7));\n", dstllrmw);
1.1.1.4 root 5077: printf ("\t}}\n");
5078: pop_braces (old_brace_level);
5079: printf ("\tif (! GET_ZFLG ()) {\n");
5080: printf ("\tm68k_dreg (regs, (extra >> 6) & 7) = dst2;\n");
1.1.1.7 ! root 5081: printf ("\tm68k_dreg (regs, (extra >> 22) & 7) = dst1;\n");
1.1.1.4 root 5082: printf ("\t}\n");
5083: }
5084: break;
5085: case i_MOVES: /* ignore DFC and SFC when using_mmu == false */
5086: {
5087: int old_brace_level;
1.1.1.7 ! root 5088: tail_ce020_done = true;
! 5089: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
1.1.1.4 root 5090: printf ("\tif (extra & 0x800)\n");
5091: {
5092: int old_m68k_pc_offset = m68k_pc_offset;
5093: old_brace_level = n_braces;
5094: start_brace ();
5095: printf ("\tuae_u32 src = regs.regs[(extra >> 12) & 15];\n");
1.1.1.7 ! root 5096: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 2, 0, 0);
1.1.1.4 root 5097: genastore_fc ("src", curi->dmode, "dstreg", curi->size, "dst");
5098: pop_braces (old_brace_level);
5099: m68k_pc_offset = old_m68k_pc_offset;
5100: }
5101: printf ("else");
5102: {
5103: start_brace ();
1.1.1.7 ! root 5104: genamode (curi, curi->dmode, "dstreg", curi->size, "src", 1, 0, GF_FC);
1.1.1.4 root 5105: printf ("\tif (extra & 0x8000) {\n");
5106: switch (curi->size) {
5107: case sz_byte: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s8)src;\n"); break;
5108: case sz_word: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = (uae_s32)(uae_s16)src;\n"); break;
5109: case sz_long: printf ("\tm68k_areg (regs, (extra >> 12) & 7) = src;\n"); break;
1.1.1.7 ! root 5110: default: term ();
1.1.1.4 root 5111: }
5112: printf ("\t} else {\n");
5113: genastore ("src", Dreg, "(extra >> 12) & 7", curi->size, "");
5114: printf ("\t}\n");
1.1.1.7 ! root 5115: if (using_mmu == 68040)
! 5116: sync_m68k_pc ();
1.1.1.4 root 5117: pop_braces (old_brace_level);
5118: }
1.1.1.7 ! root 5119: tail_ce020_done = false;
! 5120: returntail (false);
1.1.1.4 root 5121: }
5122: break;
5123: case i_BKPT: /* only needed for hardware emulators */
5124: sync_m68k_pc ();
5125: printf ("\top_illg (opcode);\n");
5126: break;
5127: case i_CALLM: /* not present in 68030 */
5128: sync_m68k_pc ();
5129: printf ("\top_illg (opcode);\n");
5130: break;
5131: case i_RTM: /* not present in 68030 */
5132: sync_m68k_pc ();
5133: printf ("\top_illg (opcode);\n");
5134: break;
5135: case i_TRAPcc:
5136: if (curi->smode != am_unknown && curi->smode != am_illg)
1.1.1.7 ! root 5137: genamode (curi, curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0);
1.1.1.4 root 5138: fill_prefetch_0 ();
1.1.1.7 ! root 5139: printf ("\tif (cctrue (%d)) { Exception (7); goto %s; }\n", curi->cc, endlabelstr);
1.1.1.4 root 5140: need_endlabel = 1;
5141: break;
5142: case i_DIVL:
1.1.1.7 ! root 5143: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
! 5144: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1.1.1.4 root 5145: sync_m68k_pc ();
1.1.1.7 ! root 5146: printf ("\tif (!m68k_divl(opcode, dst, extra)) goto %s;\n", endlabelstr);
! 5147: need_endlabel = 1;
1.1.1.4 root 5148: break;
5149: case i_MULL:
1.1.1.7 ! root 5150: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
! 5151: genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
1.1.1.4 root 5152: sync_m68k_pc ();
1.1.1.7 ! root 5153: printf ("\tif (!m68k_mull(opcode, dst, extra)) goto %s;\n", endlabelstr);
! 5154: need_endlabel = 1;
1.1.1.4 root 5155: break;
5156: case i_BFTST:
5157: case i_BFEXTU:
5158: case i_BFCHG:
5159: case i_BFEXTS:
5160: case i_BFCLR:
5161: case i_BFFFO:
5162: case i_BFSET:
5163: case i_BFINS:
5164: {
5165: const char *getb, *putb;
5166:
1.1.1.7 ! root 5167: if (using_mmu == 68060 && (curi->mnemo == i_BFCHG || curi->mnemo == i_BFCLR || curi->mnemo == i_BFSET || curi->mnemo == i_BFINS)) {
! 5168: getb = "mmu060_get_rmw_bitfield";
! 5169: putb = "mmu060_put_rmw_bitfield";
! 5170: } else if (using_mmu || using_ce020 || using_indirect) {
1.1.1.4 root 5171: getb = "x_get_bitfield";
5172: putb = "x_put_bitfield";
5173: } else {
5174: getb = "get_bitfield";
5175: putb = "put_bitfield";
5176: }
5177:
1.1.1.7 ! root 5178: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
! 5179: genamode (curi, curi->dmode, "dstreg", sz_long, "dst", 2, 0, 0);
1.1.1.4 root 5180: start_brace ();
5181: printf ("\tuae_u32 bdata[2];\n");
5182: printf ("\tuae_s32 offset = extra & 0x800 ? m68k_dreg(regs, (extra >> 6) & 7) : (extra >> 6) & 0x1f;\n");
5183: printf ("\tint width = (((extra & 0x20 ? m68k_dreg(regs, extra & 7) : extra) -1) & 0x1f) +1;\n");
5184: if (curi->dmode == Dreg) {
5185: printf ("\tuae_u32 tmp = m68k_dreg(regs, dstreg);\n");
5186: printf ("\toffset &= 0x1f;\n");
5187: printf ("\ttmp = (tmp << offset) | (tmp >> (32 - offset));\n");
5188: printf ("\tbdata[0] = tmp & ((1 << (32 - width)) - 1);\n");
5189: } else {
5190: printf ("\tuae_u32 tmp;\n");
5191: printf ("\tdsta += offset >> 3;\n");
5192: printf ("\ttmp = %s (dsta, bdata, offset, width);\n", getb);
5193: }
5194: printf ("\tSET_NFLG_ALWAYS (((uae_s32)tmp) < 0 ? 1 : 0);\n");
5195: if (curi->mnemo == i_BFEXTS)
5196: printf ("\ttmp = (uae_s32)tmp >> (32 - width);\n");
5197: else
5198: printf ("\ttmp >>= (32 - width);\n");
5199: printf ("\tSET_ZFLG (tmp == 0); SET_VFLG (0); SET_CFLG (0);\n");
5200: switch (curi->mnemo) {
5201: case i_BFTST:
5202: break;
5203: case i_BFEXTU:
5204: case i_BFEXTS:
5205: printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = tmp;\n");
5206: break;
5207: case i_BFCHG:
5208: printf ("\ttmp = tmp ^ (0xffffffffu >> (32 - width));\n");
5209: break;
5210: case i_BFCLR:
5211: printf ("\ttmp = 0;\n");
5212: break;
5213: case i_BFFFO:
5214: printf ("\t{ uae_u32 mask = 1 << (width - 1);\n");
5215: printf ("\twhile (mask) { if (tmp & mask) break; mask >>= 1; offset++; }}\n");
5216: printf ("\tm68k_dreg (regs, (extra >> 12) & 7) = offset;\n");
5217: break;
5218: case i_BFSET:
5219: printf ("\ttmp = 0xffffffffu >> (32 - width);\n");
5220: break;
5221: case i_BFINS:
5222: printf ("\ttmp = m68k_dreg (regs, (extra >> 12) & 7);\n");
5223: printf ("\ttmp = tmp & (0xffffffffu >> (32 - width));\n");
5224: printf ("\tSET_NFLG (tmp & (1 << (width - 1)) ? 1 : 0);\n");
5225: printf ("\tSET_ZFLG (tmp == 0);\n");
5226: break;
5227: default:
5228: break;
5229: }
5230: if (curi->mnemo == i_BFCHG
5231: || curi->mnemo == i_BFCLR
5232: || curi->mnemo == i_BFSET
5233: || curi->mnemo == i_BFINS) {
5234: if (curi->dmode == Dreg) {
5235: printf ("\ttmp = bdata[0] | (tmp << (32 - width));\n");
5236: printf ("\tm68k_dreg(regs, dstreg) = (tmp >> offset) | (tmp << (32 - offset));\n");
5237: } else {
5238: printf ("\t%s(dsta, bdata, tmp, offset, width);\n", putb);
5239: }
5240: }
5241: }
5242: break;
5243: case i_PACK:
5244: if (curi->smode == Dreg) {
5245: printf ("\tuae_u16 val = m68k_dreg (regs, srcreg) + %s;\n", gen_nextiword (0));
5246: printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffffff00) | ((val >> 4) & 0xf0) | (val & 0xf);\n");
5247: } else {
5248: printf ("\tuae_u16 val;\n");
1.1.1.7 ! root 5249: addmmufixup ("srcreg");
1.1.1.4 root 5250: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n");
1.1.1.7 ! root 5251: printf ("\tval = (uae_u16)(%s (m68k_areg (regs, srcreg)) & 0xff);\n", srcb);
1.1.1.4 root 5252: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n");
1.1.1.7 ! root 5253: printf ("\tval = (val | ((uae_u16)(%s (m68k_areg (regs, srcreg)) & 0xff) << 8)) + %s;\n", srcb, gen_nextiword (0));
! 5254: addmmufixup ("dstreg");
1.1.1.4 root 5255: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n");
5256: gen_set_fault_pc ();
5257: printf ("\t%s (m68k_areg (regs, dstreg),((val >> 4) & 0xf0) | (val & 0xf));\n", dstb);
5258: }
5259: break;
5260: case i_UNPK:
5261: if (curi->smode == Dreg) {
5262: printf ("\tuae_u16 val = m68k_dreg (regs, srcreg);\n");
5263: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0));
5264: printf ("\tm68k_dreg (regs, dstreg) = (m68k_dreg (regs, dstreg) & 0xffff0000) | (val & 0xffff);\n");
5265: } else {
5266: printf ("\tuae_u16 val;\n");
1.1.1.7 ! root 5267: addmmufixup ("srcreg");
1.1.1.4 root 5268: printf ("\tm68k_areg (regs, srcreg) -= areg_byteinc[srcreg];\n");
1.1.1.7 ! root 5269: printf ("\tval = (uae_u16)(%s (m68k_areg (regs, srcreg)) & 0xff);\n", srcb);
1.1.1.4 root 5270: printf ("\tval = (((val << 4) & 0xf00) | (val & 0xf)) + %s;\n", gen_nextiword (0));
1.1.1.7 ! root 5271: addmmufixup ("dstreg");
1.1.1.4 root 5272: if (cpu_level >= 2) {
5273: printf ("\tm68k_areg (regs, dstreg) -= 2 * areg_byteinc[dstreg];\n");
5274: printf ("\t%s (m68k_areg (regs, dstreg) + areg_byteinc[dstreg], val);\n", dstb);
5275: printf ("\t%s (m68k_areg (regs, dstreg), val >> 8);\n", dstb);
5276: } else {
5277: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n");
5278: printf ("\t%s (m68k_areg (regs, dstreg),val);\n", dstb);
5279: printf ("\tm68k_areg (regs, dstreg) -= areg_byteinc[dstreg];\n");
5280: gen_set_fault_pc ();
5281: printf ("\t%s (m68k_areg (regs, dstreg),val >> 8);\n", dstb);
5282: }
5283: }
5284: break;
5285: case i_TAS:
1.1.1.7 ! root 5286: genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, GF_LRMW);
1.1.1.4 root 5287: genflags (flag_logical, curi->size, "src", "", "");
5288: if (!isreg (curi->smode))
5289: addcycles000 (2);
5290: fill_prefetch_next ();
5291: printf ("\tsrc |= 0x80;\n");
5292: if (cpu_level >= 2 || curi->smode == Dreg || !using_ce) {
5293: if (next_cpu_level < 2)
5294: next_cpu_level = 2 - 1;
1.1.1.7 ! root 5295: genastore_tas ("src", curi->smode, "srcreg", curi->size, "src");
1.1.1.4 root 5296: } else {
5297: printf ("\tif (!is_cycle_ce ()) {\n");
5298: genastore ("src", curi->smode, "srcreg", curi->size, "src");
5299: printf ("\t} else {\n");
1.1.1.7 ! root 5300: printf ("\t\t%s (4);\n", do_cycles);
! 5301: addcycles000_nonce("\t\t", 4);
1.1.1.4 root 5302: printf ("\t}\n");
5303: }
5304: break;
5305: case i_FPP:
5306: fpulimit();
1.1.1.7 ! root 5307: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
1.1.1.4 root 5308: sync_m68k_pc ();
5309: printf ("\tfpuop_arithmetic(opcode, extra);\n");
1.1.1.7 ! root 5310: if (using_prefetch || using_prefetch_020) {
! 5311: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5312: need_endlabel = 1;
! 5313: }
1.1.1.4 root 5314: break;
5315: case i_FDBcc:
5316: fpulimit();
1.1.1.7 ! root 5317: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
1.1.1.4 root 5318: sync_m68k_pc ();
5319: printf ("\tfpuop_dbcc (opcode, extra);\n");
1.1.1.7 ! root 5320: if (using_prefetch || using_prefetch_020) {
! 5321: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5322: printf ("\tif (regs.fp_branch) {\n");
! 5323: printf ("\t\tregs.fp_branch = false;\n");
! 5324: printf ("\t\tfill_prefetch();\n");
! 5325: printf ("\t\tgoto %s;\n", endlabelstr);
! 5326: printf ("\t}\n");
! 5327: need_endlabel = 1;
! 5328: }
1.1.1.4 root 5329: break;
5330: case i_FScc:
5331: fpulimit();
1.1.1.7 ! root 5332: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
1.1.1.4 root 5333: sync_m68k_pc ();
5334: printf ("\tfpuop_scc (opcode, extra);\n");
1.1.1.7 ! root 5335: if (using_prefetch || using_prefetch_020) {
! 5336: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5337: need_endlabel = 1;
! 5338: }
1.1.1.4 root 5339: break;
5340: case i_FTRAPcc:
5341: fpulimit();
1.1.1.7 ! root 5342: printf ("\tuaecptr oldpc = %s;\n", getpc);
1.1.1.4 root 5343: printf ("\tuae_u16 extra = %s;\n", gen_nextiword (0));
5344: if (curi->smode != am_unknown && curi->smode != am_illg)
1.1.1.7 ! root 5345: genamode (curi, curi->smode, "srcreg", curi->size, "dummy", 1, 0, 0);
1.1.1.4 root 5346: sync_m68k_pc ();
5347: printf ("\tfpuop_trapcc (opcode, oldpc, extra);\n");
1.1.1.7 ! root 5348: if (using_prefetch || using_prefetch_020) {
! 5349: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5350: need_endlabel = 1;
! 5351: }
1.1.1.4 root 5352: break;
5353: case i_FBcc:
5354: fpulimit();
5355: sync_m68k_pc ();
5356: start_brace ();
1.1.1.7 ! root 5357: printf ("\tuaecptr pc = %s;\n", getpc);
! 5358: genamode (curi, curi->dmode, "srcreg", curi->size, "extra", 1, 0, 0);
1.1.1.4 root 5359: sync_m68k_pc ();
5360: printf ("\tfpuop_bcc (opcode, pc,extra);\n");
1.1.1.7 ! root 5361: if (using_prefetch || using_prefetch_020) {
! 5362: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5363: printf ("\tif (regs.fp_branch) {\n");
! 5364: printf ("\t\tregs.fp_branch = false;\n");
! 5365: printf ("\t\tfill_prefetch();\n");
! 5366: printf ("\t\tgoto %s;\n", endlabelstr);
! 5367: printf ("\t}\n");
! 5368: need_endlabel = 1;
! 5369: }
1.1.1.4 root 5370: break;
5371: case i_FSAVE:
5372: fpulimit();
5373: sync_m68k_pc ();
5374: printf ("\tfpuop_save (opcode);\n");
1.1.1.7 ! root 5375: if (using_prefetch || using_prefetch_020) {
! 5376: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5377: need_endlabel = 1;
! 5378: }
1.1.1.4 root 5379: break;
5380: case i_FRESTORE:
5381: fpulimit();
5382: sync_m68k_pc ();
5383: printf ("\tfpuop_restore (opcode);\n");
1.1.1.7 ! root 5384: if (using_prefetch || using_prefetch_020) {
! 5385: printf ("\tif (regs.fp_exception) goto %s;\n", endlabelstr);
! 5386: need_endlabel = 1;
! 5387: }
1.1.1.4 root 5388: break;
5389:
5390: case i_CINVL:
5391: case i_CINVP:
5392: case i_CINVA:
5393: case i_CPUSHL:
5394: case i_CPUSHP:
5395: case i_CPUSHA:
1.1.1.7 ! root 5396: printf ("\tflush_cpu_caches_040(opcode);\n");
1.1.1.4 root 5397: if (using_mmu)
1.1.1.5 root 5398: printf ("\tflush_mmu%s(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n", mmu_postfix);
1.1.1.4 root 5399: printf ("\tif (opcode & 0x80)\n");
5400: printf ("\t\tflush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n");
5401: break;
5402:
5403: case i_MOVE16:
5404: {
5405: if ((opcode & 0xfff8) == 0xf620) {
5406: /* MOVE16 (Ax)+,(Ay)+ */
1.1.1.7 ! root 5407: printf ("\tuae_u32 v[4];\n");
1.1.1.4 root 5408: printf ("\tuaecptr mems = m68k_areg (regs, srcreg) & ~15, memd;\n");
5409: printf ("\tdstreg = (%s >> 12) & 7;\n", gen_nextiword (0));
5410: printf ("\tmemd = m68k_areg (regs, dstreg) & ~15;\n");
1.1.1.7 ! root 5411: if (using_mmu >= 68040) {
! 5412: printf ("\tget_move16_mmu (mems, v);\n");
! 5413: printf ("\tput_move16_mmu (memd, v);\n");
! 5414: } else {
! 5415: printf ("\tv[0] = %s (mems);\n", srcl);
! 5416: printf ("\tv[1] = %s (mems + 4);\n", srcl);
! 5417: printf ("\tv[2] = %s (mems + 8);\n", srcl);
! 5418: printf ("\tv[3] = %s (mems + 12);\n", srcl);
! 5419: printf ("\t%s (memd , v[0]);\n", dstl);
! 5420: printf ("\t%s (memd + 4, v[1]);\n", dstl);
! 5421: printf ("\t%s (memd + 8, v[2]);\n", dstl);
! 5422: printf ("\t%s (memd + 12, v[3]);\n", dstl);
! 5423: }
1.1.1.4 root 5424: printf ("\tif (srcreg != dstreg)\n");
5425: printf ("\t\tm68k_areg (regs, srcreg) += 16;\n");
5426: printf ("\tm68k_areg (regs, dstreg) += 16;\n");
5427: } else {
5428: /* Other variants */
1.1.1.7 ! root 5429: printf ("\tuae_u32 v[4];\n");
! 5430: genamode (curi, curi->smode, "srcreg", curi->size, "mems", 0, 2, 0);
! 5431: genamode (curi, curi->dmode, "dstreg", curi->size, "memd", 0, 2, 0);
! 5432: if (using_mmu == 68040) {
! 5433: printf ("\tget_move16_mmu (memsa, mmu040_move16);\n");
! 5434: printf ("\tput_move16_mmu (memda, mmu040_move16);\n");
! 5435: } else if (using_mmu == 68060) {
! 5436: printf ("\tget_move16_mmu (memsa, v);\n");
! 5437: printf ("\tput_move16_mmu (memda, v);\n");
! 5438: } else {
! 5439: printf ("\tmemsa &= ~15;\n");
! 5440: printf ("\tmemda &= ~15;\n");
! 5441: printf ("\tv[0] = %s (memsa);\n", srcl);
! 5442: printf ("\tv[1] = %s (memsa + 4);\n", srcl);
! 5443: printf ("\tv[2] = %s (memsa + 8);\n", srcl);
! 5444: printf ("\tv[3] = %s (memsa + 12);\n", srcl);
! 5445: printf ("\t%s (memda , v[0]);\n", dstl);
! 5446: printf ("\t%s (memda + 4, v[1]);\n", dstl);
! 5447: printf ("\t%s (memda + 8, v[2]);\n", dstl);
! 5448: printf ("\t%s (memda + 12, v[3]);\n", dstl);
! 5449: }
1.1.1.4 root 5450: if ((opcode & 0xfff8) == 0xf600)
5451: printf ("\tm68k_areg (regs, srcreg) += 16;\n");
5452: else if ((opcode & 0xfff8) == 0xf608)
5453: printf ("\tm68k_areg (regs, dstreg) += 16;\n");
5454: }
5455: }
5456: break;
5457:
5458: case i_PFLUSHN:
5459: case i_PFLUSH:
5460: case i_PFLUSHAN:
5461: case i_PFLUSHA:
5462: case i_PLPAR:
5463: case i_PLPAW:
5464: case i_PTESTR:
5465: case i_PTESTW:
5466: sync_m68k_pc ();
5467: printf ("\tmmu_op (opcode, 0);\n");
5468: break;
5469: case i_MMUOP030:
1.1.1.7 ! root 5470: printf ("\tuaecptr pc = %s;\n", getpc);
! 5471: printf ("\tuae_u16 extra = %s (2);\n", prefetch_word);
1.1.1.4 root 5472: m68k_pc_offset += 2;
5473: sync_m68k_pc ();
5474: if (curi->smode == Areg || curi->smode == Dreg)
5475: printf("\tuae_u16 extraa = 0;\n");
5476: else
1.1.1.7 ! root 5477: genamode (curi, curi->smode, "srcreg", curi->size, "extra", 0, 0, 0);
1.1.1.4 root 5478: sync_m68k_pc ();
1.1.1.7 ! root 5479: if (using_ce020 || using_prefetch_020) {
! 5480: printf ("\tif (mmu_op30 (pc, opcode, extra, extraa)) goto %s;\n", endlabelstr);
! 5481: need_endlabel = 1;
! 5482: } else {
! 5483: printf ("\tmmu_op30 (pc, opcode, extra, extraa);\n");
! 5484: }
1.1.1.4 root 5485: break;
5486: default:
1.1.1.7 ! root 5487: term ();
1.1.1.4 root 5488: break;
5489: }
1.1.1.7 ! root 5490: if (!genastore_done)
! 5491: returntail (0);
1.1.1.4 root 5492: finish_braces ();
5493: if (limit_braces) {
5494: printf ("\n#endif\n");
5495: n_braces = limit_braces;
5496: limit_braces = 0;
5497: finish_braces ();
5498: }
5499: if (did_prefetch >= 0)
5500: fill_prefetch_finish ();
5501: sync_m68k_pc ();
5502: did_prefetch = 0;
1.1.1.7 ! root 5503: ipl_fetched = 0;
1.1.1.4 root 5504: }
5505:
1.1.1.7 ! root 5506: static void generate_includes (FILE * f, int id)
1.1.1.4 root 5507: {
1.1.1.7 ! root 5508: fprintf (f, "#include \"main.h\"\n");
! 5509: // fprintf (f, "#include \"sysconfig.h\"\n");
1.1.1.4 root 5510: fprintf (f, "#include \"sysdeps.h\"\n");
1.1.1.7 ! root 5511: // fprintf (f, "#include \"options.h\"\n");
! 5512: fprintf (f, "#include \"hatari-glue.h\"\n");
! 5513: fprintf (f, "#include \"maccess.h\"\n");
1.1.1.4 root 5514: fprintf (f, "#include \"memory.h\"\n");
5515: fprintf (f, "#include \"custom.h\"\n");
1.1.1.7 ! root 5516: // fprintf (f, "#include \"events.h\"\n");
1.1.1.4 root 5517: fprintf (f, "#include \"newcpu.h\"\n");
5518: fprintf (f, "#include \"cpu_prefetch.h\"\n");
5519: fprintf (f, "#include \"cputbl.h\"\n");
1.1.1.7 ! root 5520: if (id == 31 || id == 33)
! 5521: fprintf (f, "#include \"cpummu.h\"\n");
! 5522: else if (id == 32)
! 5523: fprintf (f, "#include \"cpummu030.h\"\n");
1.1.1.4 root 5524:
5525: fprintf (f, "#define CPUFUNC(x) x##_ff\n"
5526: "#define SET_CFLG_ALWAYS(x) SET_CFLG(x)\n"
5527: "#define SET_NFLG_ALWAYS(x) SET_NFLG(x)\n"
5528: "#ifdef NOFLAGS\n"
5529: "#include \"noflags.h\"\n"
5530: "#endif\n");
5531: }
5532:
5533: static int postfix;
5534:
5535:
5536: static char *decodeEA (amodes mode, wordsizes size)
5537: {
5538: static char buffer[80];
5539:
5540: buffer[0] = 0;
5541: switch (mode){
5542: case Dreg:
5543: strcpy (buffer,"Dn");
5544: break;
5545: case Areg:
5546: strcpy (buffer,"An");
5547: break;
5548: case Aind:
5549: strcpy (buffer,"(An)");
5550: break;
5551: case Aipi:
5552: strcpy (buffer,"(An)+");
5553: break;
5554: case Apdi:
5555: strcpy (buffer,"-(An)");
5556: break;
5557: case Ad16:
5558: strcpy (buffer,"(d16,An)");
5559: break;
5560: case Ad8r:
5561: strcpy (buffer,"(d8,An,Xn)");
5562: break;
5563: case PC16:
5564: strcpy (buffer,"(d16,PC)");
5565: break;
5566: case PC8r:
5567: strcpy (buffer,"(d8,PC,Xn)");
5568: break;
5569: case absw:
5570: strcpy (buffer,"(xxx).W");
5571: break;
5572: case absl:
5573: strcpy (buffer,"(xxx).L");
5574: break;
5575: case imm:
5576: switch (size){
5577: case sz_byte:
5578: strcpy (buffer,"#<data>.B");
5579: break;
5580: case sz_word:
5581: strcpy (buffer,"#<data>.W");
5582: break;
5583: case sz_long:
5584: strcpy (buffer,"#<data>.L");
5585: break;
5586: default:
5587: break;
5588: }
5589: break;
5590: case imm0:
5591: strcpy (buffer,"#<data>.B");
5592: break;
5593: case imm1:
5594: strcpy (buffer,"#<data>.W");
5595: break;
5596: case imm2:
5597: strcpy (buffer,"#<data>.L");
5598: break;
5599: case immi:
5600: strcpy (buffer,"#<data>");
5601: break;
5602:
5603: default:
5604: break;
5605: }
5606: return buffer;
5607: }
5608:
1.1.1.7 ! root 5609: static const char *m68k_cc[] = {
! 5610: "T",
! 5611: "F",
! 5612: "HI",
! 5613: "LS",
! 5614: "CC",
! 5615: "CS",
! 5616: "NE",
! 5617: "EQ",
! 5618: "VC",
! 5619: "VS",
! 5620: "PL",
! 5621: "MI",
! 5622: "GE",
! 5623: "LT",
! 5624: "GT",
! 5625: "LE"
! 5626: };
! 5627:
1.1.1.4 root 5628: static char *outopcode (int opcode)
5629: {
5630: static char out[100];
5631: struct instr *ins;
5632: int i;
5633:
5634: ins = &table68k[opcode];
5635: for (i = 0; lookuptab[i].name[0]; i++) {
5636: if (ins->mnemo == lookuptab[i].mnemo)
5637: break;
5638: }
5639: {
1.1.1.7 ! root 5640: char *s = ua (lookuptab[i].name);
1.1.1.4 root 5641: strcpy (out, s);
1.1.1.7 ! root 5642: xfree (s);
1.1.1.4 root 5643: }
5644: if (ins->smode == immi)
5645: strcat (out, "Q");
5646: if (ins->size == sz_byte)
5647: strcat (out,".B");
5648: if (ins->size == sz_word)
5649: strcat (out,".W");
5650: if (ins->size == sz_long)
5651: strcat (out,".L");
5652: strcat (out," ");
5653: if (ins->suse)
5654: strcat (out, decodeEA (ins->smode, ins->size));
5655: if (ins->duse) {
5656: if (ins->suse) strcat (out,",");
5657: strcat (out, decodeEA (ins->dmode, ins->size));
5658: }
1.1.1.7 ! root 5659: if (ins->mnemo == i_DBcc || ins->mnemo == i_Scc || ins->mnemo == i_Bcc || ins->mnemo == i_TRAPcc) {
! 5660: strcat (out, " (");
! 5661: strcat (out, m68k_cc[table68k[opcode].cc]);
! 5662: strcat (out, ")");
! 5663: }
! 5664:
1.1.1.4 root 5665: return out;
5666: }
5667:
1.1.1.7 ! root 5668: struct cputbl_tmp
! 5669: {
! 5670: uae_s16 length;
! 5671: uae_s8 disp020[2];
! 5672: uae_u8 branch;
! 5673: };
! 5674: static struct cputbl_tmp cputbltmp[65536];
! 5675:
! 5676: static void generate_one_opcode (int rp, const char *extra)
1.1.1.4 root 5677: {
5678: int idx;
5679: uae_u16 smsk, dmsk;
1.1.1.7 ! root 5680: unsigned int opcode = opcode_map[rp];
1.1.1.4 root 5681: int i68000 = table68k[opcode].clev > 0;
5682:
5683: if (table68k[opcode].mnemo == i_ILLG
5684: || table68k[opcode].clev > cpu_level)
5685: return;
5686:
5687: for (idx = 0; lookuptab[idx].name[0]; idx++) {
5688: if (table68k[opcode].mnemo == lookuptab[idx].mnemo)
5689: break;
5690: }
5691:
5692: if (table68k[opcode].handler != -1)
5693: return;
5694:
5695: if (opcode_next_clev[rp] != cpu_level) {
1.1.1.7 ! root 5696: char *name = ua (lookuptab[idx].name);
1.1.1.4 root 5697: if (generate_stbl)
1.1.1.7 ! root 5698: fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d%s), 0x%04x, %d, { %d, %d }, %d }, /* %s */\n",
! 5699: (using_ce || using_ce020) ? "(cpuop_func*)" : "",
! 5700: opcode, opcode_last_postfix[rp],
! 5701: extra, opcode,
! 5702: cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name);
! 5703: xfree (name);
1.1.1.4 root 5704: return;
5705: }
1.1.1.7 ! root 5706: fprintf (headerfile, "extern %s op_%04x_%d%s_nf;\n",
! 5707: (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix, extra);
! 5708: fprintf (headerfile, "extern %s op_%04x_%d%s_ff;\n",
! 5709: (using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix, extra);
1.1.1.4 root 5710: printf ("/* %s */\n", outopcode (opcode));
5711: if (i68000)
5712: printf("#ifndef CPUEMU_68000_ONLY\n");
1.1.1.7 ! root 5713: printf ("%s REGPARAM2 CPUFUNC(op_%04x_%d%s)(uae_u32 opcode)\n{\n", (using_ce || using_ce020) ? "void" : "uae_u32", opcode, postfix, extra);
! 5714: if (using_simple_cycles)
! 5715: printf("\tint count_cycles = 0;\n");
1.1.1.4 root 5716:
5717: switch (table68k[opcode].stype) {
5718: case 0: smsk = 7; break;
5719: case 1: smsk = 255; break;
5720: case 2: smsk = 15; break;
5721: case 3: smsk = 7; break;
5722: case 4: smsk = 7; break;
5723: case 5: smsk = 63; break;
5724: case 7: smsk = 3; break;
1.1.1.7 ! root 5725: default: term ();
1.1.1.4 root 5726: }
5727: dmsk = 7;
5728:
5729: next_cpu_level = -1;
5730: if (table68k[opcode].suse
5731: && table68k[opcode].smode != imm && table68k[opcode].smode != imm0
5732: && table68k[opcode].smode != imm1 && table68k[opcode].smode != imm2
5733: && table68k[opcode].smode != absw && table68k[opcode].smode != absl
5734: && table68k[opcode].smode != PC8r && table68k[opcode].smode != PC16)
5735: {
5736: if (table68k[opcode].spos == -1) {
5737: if (((int) table68k[opcode].sreg) >= 128)
5738: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].sreg);
5739: else
5740: printf ("\tuae_u32 srcreg = %d;\n", (int) table68k[opcode].sreg);
5741: } else {
5742: char source[100];
5743: int pos = table68k[opcode].spos;
5744:
5745: if (pos)
5746: sprintf (source, "((opcode >> %d) & %d)", pos, smsk);
5747: else
5748: sprintf (source, "(opcode & %d)", smsk);
5749:
5750: if (table68k[opcode].stype == 3)
5751: printf ("\tuae_u32 srcreg = imm8_table[%s];\n", source);
5752: else if (table68k[opcode].stype == 1)
5753: printf ("\tuae_u32 srcreg = (uae_s32)(uae_s8)%s;\n", source);
5754: else
5755: printf ("\tuae_u32 srcreg = %s;\n", source);
5756: }
5757: }
5758: if (table68k[opcode].duse
5759: /* Yes, the dmode can be imm, in case of LINK or DBcc */
5760: && table68k[opcode].dmode != imm && table68k[opcode].dmode != imm0
5761: && table68k[opcode].dmode != imm1 && table68k[opcode].dmode != imm2
5762: && table68k[opcode].dmode != absw && table68k[opcode].dmode != absl)
5763: {
5764: if (table68k[opcode].dpos == -1) {
5765: if (((int) table68k[opcode].dreg) >= 128)
5766: printf ("\tuae_u32 dstreg = (uae_s32)(uae_s8)%d;\n", (int) table68k[opcode].dreg);
5767: else
5768: printf ("\tuae_u32 dstreg = %d;\n", (int) table68k[opcode].dreg);
5769: } else {
5770: int pos = table68k[opcode].dpos;
5771: if (pos)
5772: printf ("\tuae_u32 dstreg = (opcode >> %d) & %d;\n",
5773: pos, dmsk);
5774: else
5775: printf ("\tuae_u32 dstreg = opcode & %d;\n", dmsk);
5776: }
5777: }
5778: need_endlabel = 0;
5779: endlabelno++;
1.1.1.7 ! root 5780: sprintf (endlabelstr, "l_%d", endlabelno);
1.1.1.4 root 5781: count_read = count_write = count_ncycles = count_cycles = 0;
1.1.1.7 ! root 5782: count_cycles_ce020 = 0;
1.1.1.4 root 5783: count_read_ea = count_write_ea = count_cycles_ea = 0;
5784: gen_opcode (opcode);
5785: if (need_endlabel)
5786: printf ("%s: ;\n", endlabelstr);
1.1.1.7 ! root 5787: clearmmufixup (0);
! 5788: clearmmufixup (1);
1.1.1.4 root 5789: if (using_ce || using_prefetch) {
5790: if (count_read + count_write + count_cycles == 0)
5791: count_cycles = 4;
1.1.1.7 ! root 5792: returncycles ("", (count_read + count_write) * 4 + count_cycles);
! 5793: printf ("}");
1.1.1.4 root 5794: printf (" /* %d%s (%d/%d)",
5795: (count_read + count_write) * 4 + count_cycles, count_ncycles ? "+" : "", count_read, count_write);
5796: printf (" */\n");
1.1.1.7 ! root 5797: #ifdef WINUAE_FOR_HATARI
! 5798: insn_n_cycles = (count_read + count_write) * 4 + count_cycles;
! 5799: #endif
! 5800: //printf ( "pom_%d %s %x %d\n" , postfix , lookuptab[idx].name , opcode , (count_read + count_write) * 4 + count_cycles );
! 5801: } else if (count_read + count_write) {
! 5802: returncycles ("", (count_read + count_write) * 4 + count_cycles);
! 5803: printf ("}");
! 5804: printf("\n");
! 5805: #ifdef WINUAE_FOR_HATARI
! 5806: insn_n_cycles = (count_read + count_write) * 4 + count_cycles;
! 5807: #endif
! 5808: //printf ( "pom_%d %s %x %d\n" , postfix , lookuptab[idx].name , opcode , (count_read + count_write) * 4 + count_cycles );
1.1.1.4 root 5809: } else {
1.1.1.7 ! root 5810: returncycles ("", insn_n_cycles);
! 5811: printf ("}");
1.1.1.4 root 5812: printf("\n");
1.1.1.7 ! root 5813: //printf ( "pom_%d %s %x %d\n" , postfix , lookuptab[idx].name , opcode , insn_n_cycles );
1.1.1.4 root 5814: }
5815: printf ("\n");
5816: if (i68000)
5817: printf("#endif\n");
5818: opcode_next_clev[rp] = next_cpu_level;
5819: opcode_last_postfix[rp] = postfix;
5820:
1.1.1.7 ! root 5821: if ((opcode & 0xf000) == 0xf000)
! 5822: m68k_pc_total = -1;
! 5823: cputbltmp[opcode].length = m68k_pc_total;
! 5824:
! 5825: cputbltmp[opcode].disp020[0] = 0;
! 5826: if (genamode8r_offset[0] > 0)
! 5827: cputbltmp[opcode].disp020[0] = m68k_pc_total - genamode8r_offset[0] + 2;
! 5828: cputbltmp[opcode].disp020[1] = 0;
! 5829: if (genamode8r_offset[1] > 0)
! 5830: cputbltmp[opcode].disp020[1] = m68k_pc_total - genamode8r_offset[1] + 2;
! 5831:
! 5832: cputbltmp[opcode].branch = branch_inst;
! 5833:
! 5834: #ifdef WINUAE_FOR_HATARI
! 5835: /* Hatari only : Now patch in the instruction cycles at the beginning of the function: */
1.1.1.4 root 5836: if (!using_ce020) {
5837: fseek(stdout, nCurInstrCycPos, SEEK_SET);
5838: printf("%d;", insn_n_cycles);
5839: fseek(stdout, 0, SEEK_END);
5840: }
1.1.1.7 ! root 5841: #endif
1.1.1.4 root 5842:
5843: if (generate_stbl) {
1.1.1.7 ! root 5844: char *name = ua (lookuptab[idx].name);
1.1.1.4 root 5845: if (i68000)
5846: fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
1.1.1.7 ! root 5847: fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d%s), 0x%04x, %d, { %d, %d }, %d }, /* %s */\n",
1.1.1.4 root 5848: (using_ce || using_ce020) ? "(cpuop_func*)" : "",
1.1.1.7 ! root 5849: opcode, postfix, extra, opcode,
! 5850: cputbltmp[opcode].length, cputbltmp[opcode].disp020[0], cputbltmp[opcode].disp020[1], cputbltmp[opcode].branch, name);
1.1.1.4 root 5851: if (i68000)
5852: fprintf (stblfile, "#endif\n");
1.1.1.7 ! root 5853: xfree (name);
1.1.1.4 root 5854: }
5855: }
5856:
1.1.1.7 ! root 5857: static void generate_func (const char *extra)
1.1.1.4 root 5858: {
5859: int j, rp;
5860:
5861: /* sam: this is for people with low memory (eg. me :)) */
5862: printf ("\n"
5863: "#if !defined(PART_1) && !defined(PART_2) && "
5864: "!defined(PART_3) && !defined(PART_4) && "
5865: "!defined(PART_5) && !defined(PART_6) && "
5866: "!defined(PART_7) && !defined(PART_8)"
5867: "\n"
5868: "#define PART_1 1\n"
5869: "#define PART_2 1\n"
5870: "#define PART_3 1\n"
5871: "#define PART_4 1\n"
5872: "#define PART_5 1\n"
5873: "#define PART_6 1\n"
5874: "#define PART_7 1\n"
5875: "#define PART_8 1\n"
5876: "#endif\n\n");
5877:
5878: rp = 0;
5879: for(j = 1; j <= 8; ++j) {
5880: int k = (j * nr_cpuop_funcs) / 8;
5881: printf ("#ifdef PART_%d\n",j);
5882: for (; rp < k; rp++)
1.1.1.7 ! root 5883: generate_one_opcode (rp, extra);
1.1.1.4 root 5884: printf ("#endif\n\n");
5885: }
5886:
5887: if (generate_stbl)
5888: fprintf (stblfile, "{ 0, 0 }};\n");
5889: }
5890:
1.1.1.7 ! root 5891: static void generate_cpu (int id, int mode)
1.1.1.4 root 5892: {
5893: char fname[100];
1.1.1.7 ! root 5894: const char *extra, *extraup;
! 5895: static int postfix2 = -1;
! 5896: int rp;
! 5897:
! 5898: using_tracer = mode;
! 5899: extra = "";
! 5900: extraup = "";
! 5901: if (using_tracer) {
! 5902: extra = "_t";
! 5903: extraup = "_T";
! 5904: }
! 5905:
! 5906: postfix = id;
! 5907: if (id == 0 || id == 11 || id == 13 || id == 20 || id == 21 || id == 22 || id == 23 || id == 24 || id == 31 || id == 32 || id == 33 || id == 40) {
! 5908: if (generate_stbl)
! 5909: fprintf (stblfile, "#ifdef CPUEMU_%d%s\n", postfix, extraup);
! 5910: postfix2 = postfix;
! 5911: sprintf (fname, "cpuemu_%d%s.c", postfix, extra);
! 5912: if (freopen (fname, "wb", stdout) == NULL) {
! 5913: abort ();
! 5914: }
! 5915: generate_includes (stdout, id);
! 5916: }
! 5917:
! 5918: using_indirect = 0;
! 5919: using_exception_3 = 1;
! 5920: using_prefetch = 0;
! 5921: using_prefetch_020 = 0;
! 5922: using_ce = 0;
! 5923: using_ce020 = 0;
! 5924: using_mmu = 0;
! 5925: using_waitstates = 0;
! 5926: memory_cycle_cnt = 4;
! 5927: mmu_postfix = "";
! 5928: using_simple_cycles = 0;
! 5929:
! 5930: #ifdef WINUAE_FOR_HATARI
! 5931: using_bus_error = 1; /* Enable code to handle bus error */
! 5932: #endif
! 5933:
! 5934: if (id == 11 || id == 12) { // 11 = 68010 prefetch, 12 = 68000 prefetch
! 5935: cpu_level = id == 11 ? 1 : 0;
! 5936: using_prefetch = 1;
! 5937: using_exception_3 = 1;
! 5938: using_simple_cycles = 1;
! 5939: if (id == 11) {
! 5940: read_counts ();
! 5941: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5942: opcode_next_clev[rp] = cpu_level;
! 5943: }
! 5944: } else if (id == 13 || id == 14) { // 13 = 68010 cycle-exact, 14 = 68000 cycle-exact
! 5945: cpu_level = id == 13 ? 1 : 0;
! 5946: using_prefetch = 1;
! 5947: using_exception_3 = 1;
! 5948: using_ce = 1;
! 5949: if (id == 13) {
! 5950: read_counts ();
! 5951: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5952: opcode_next_clev[rp] = cpu_level;
! 5953: }
! 5954: } else if (id == 20) { // 68020 prefetch
! 5955: cpu_level = 2;
! 5956: using_prefetch_020 = 1;
! 5957: read_counts ();
! 5958: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5959: opcode_next_clev[rp] = cpu_level;
! 5960: } else if (id == 21) { // 68020 cycle-exact
! 5961: cpu_level = 2;
! 5962: using_ce020 = 1;
! 5963: using_prefetch_020 = 1;
! 5964: // timing tables are from 030 which has 2
! 5965: // clock memory accesses, 68020 has 3 clock
! 5966: // memory accesses
! 5967: using_waitstates = 1;
! 5968: memory_cycle_cnt = 3;
! 5969: read_counts ();
! 5970: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5971: opcode_next_clev[rp] = cpu_level;
! 5972: } else if (id == 22) { // 68030 prefetch
! 5973: cpu_level = 3;
! 5974: using_prefetch_020 = 2;
! 5975: read_counts ();
! 5976: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5977: opcode_next_clev[rp] = cpu_level;
! 5978: } else if (id == 23) { // 68030 "cycle-exact"
! 5979: cpu_level = 3;
! 5980: using_ce020 = 2;
! 5981: using_prefetch_020 = 2;
! 5982: memory_cycle_cnt = 2;
! 5983: read_counts ();
! 5984: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5985: opcode_next_clev[rp] = cpu_level;
! 5986: } else if (id == 24 || id == 25) { // 68040/060 "cycle-exact"
! 5987: cpu_level = id == 24 ? 5 : 4;
! 5988: using_ce020 = 3;
! 5989: using_prefetch_020 = 3;
! 5990: memory_cycle_cnt = 0;
! 5991: if (id == 24) {
! 5992: read_counts();
! 5993: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 5994: opcode_next_clev[rp] = cpu_level;
! 5995: }
! 5996: } else if (id == 31) { // 31 = 68040 MMU
! 5997: mmu_postfix = "040";
! 5998: cpu_level = 4;
! 5999: using_mmu = 68040;
! 6000: read_counts ();
! 6001: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 6002: opcode_next_clev[rp] = cpu_level;
! 6003: } else if (id == 32) { // 32 = 68030 MMU
! 6004: mmu_postfix = "030";
! 6005: cpu_level = 3;
! 6006: using_mmu = 68030;
! 6007: read_counts ();
! 6008: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 6009: opcode_next_clev[rp] = cpu_level;
! 6010: } else if (id == 33) { // 33 = 68060 MMU
! 6011: mmu_postfix = "060";
! 6012: cpu_level = 5;
! 6013: using_mmu = 68060;
! 6014: read_counts ();
! 6015: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 6016: opcode_next_clev[rp] = cpu_level;
! 6017: } else if (id < 6) {
! 6018: cpu_level = 5 - (id - 0); // "generic" + direct
! 6019: } else if (id >= 40 && id < 46) {
! 6020: cpu_level = 5 - (id - 40); // "generic" + indirect
! 6021: if (id == 40) {
! 6022: read_counts();
! 6023: for (rp = 0; rp < nr_cpuop_funcs; rp++)
! 6024: opcode_next_clev[rp] = cpu_level;
! 6025: }
! 6026: }
! 6027: using_indirect = using_ce || using_ce020 || using_prefetch_020 || id >= 40;
! 6028:
! 6029: if (generate_stbl) {
! 6030: if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46))
! 6031: fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
! 6032: fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d%s)[] = {\n", postfix, extra);
! 6033: }
! 6034: endlabelno = id * 10000;
! 6035: generate_func (extra);
! 6036: if (generate_stbl) {
! 6037: if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46))
! 6038: fprintf (stblfile, "#endif /* CPUEMU_68000_ONLY */\n");
! 6039: if (postfix2 >= 0)
! 6040: fprintf (stblfile, "#endif /* CPUEMU_%d%s */\n", postfix2, extraup);
! 6041: }
! 6042: postfix2 = -1;
! 6043: }
! 6044:
! 6045: int main(int argc, char *argv[])
! 6046: {
! 6047: int i;
1.1.1.4 root 6048:
6049: read_table68k ();
6050: do_merges ();
6051:
6052: opcode_map = xmalloc (int, nr_cpuop_funcs);
6053: opcode_last_postfix = xmalloc (int, nr_cpuop_funcs);
6054: opcode_next_clev = xmalloc (int, nr_cpuop_funcs);
6055: counts = xmalloc (unsigned long, 65536);
6056: read_counts ();
6057:
6058: /* It would be a lot nicer to put all in one file (we'd also get rid of
6059: * cputbl.h that way), but cpuopti can't cope. That could be fixed, but
6060: * I don't dare to touch the 68k version. */
6061:
6062: headerfile = fopen ("cputbl.h", "wb");
6063:
6064: stblfile = fopen ("cpustbl.c", "wb");
1.1.1.7 ! root 6065: generate_includes (stblfile, 0);
1.1.1.4 root 6066:
1.1.1.7 ! root 6067: for (i = 0; i <= 45; i++) {
! 6068: if ((i >= 6 && i < 11) || (i > 14 && i < 20) || (i > 25 && i < 31) || (i > 33 && i < 40))
1.1.1.4 root 6069: continue;
6070: generate_stbl = 1;
1.1.1.7 ! root 6071: generate_cpu (i, 0);
1.1.1.4 root 6072: }
6073:
6074: free (table68k);
6075: return 0;
6076: }
6077:
6078: void write_log (const TCHAR *format,...)
6079: {
6080: }
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