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1.1 root 1: /*
2: Hatari - hatari-glue.c
3:
1.1.1.4 root 4: This file is distributed under the GNU General Public License, version 2
5: or at your option any later version. Read the file gpl.txt for details.
1.1 root 6:
7: This file contains some code to glue the UAE CPU core to the rest of the
8: emulator and Hatari's "illegal" opcodes.
9: */
10: const char HatariGlue_fileid[] = "Hatari hatari-glue.c : " __DATE__ " " __TIME__;
11:
12:
13: #include <stdio.h>
14:
15: #include "main.h"
16: #include "configuration.h"
17: #include "cycInt.h"
18: #include "tos.h"
19: #include "gemdos.h"
1.1.1.4 root 20: #include "natfeats.h"
1.1 root 21: #include "cart.h"
22: #include "vdi.h"
23: #include "stMemory.h"
24: #include "ikbd.h"
25: #include "screen.h"
26: #include "video.h"
1.1.1.2 root 27: #include "psg.h"
1.1.1.4 root 28: #include "mfp.h"
29: #include "fdc.h"
1.1 root 30:
31: #include "sysdeps.h"
1.1.1.6 ! root 32: #include "options_cpu.h"
1.1 root 33: #include "maccess.h"
34: #include "memory.h"
1.1.1.4 root 35: #include "m68000.h"
1.1 root 36: #include "newcpu.h"
1.1.1.3 root 37: #include "cpu_prefetch.h"
1.1 root 38: #include "hatari-glue.h"
39:
40:
41: struct uae_prefs currprefs, changed_prefs;
42:
43: int pendingInterrupts = 0;
44:
45:
46: /**
47: * Reset custom chips
1.1.1.4 root 48: * In case the RESET instruction is called, we must reset all the peripherals
49: * connected to the CPU's reset pin.
1.1 root 50: */
51: void customreset(void)
52: {
53: pendingInterrupts = 0;
54:
1.1.1.4 root 55: /* Reset the IKBD */
56: IKBD_Reset ( false );
1.1 root 57:
58: /* Reseting the GLUE video chip should also set freq/res register to 0 */
59: Video_Reset_Glue ();
1.1.1.2 root 60:
61: /* Reset the YM2149 (stop any sound) */
62: PSG_Reset ();
1.1.1.4 root 63:
64: /* Reset the MFP */
65: MFP_Reset ();
66:
67: /* Reset the FDC */
1.1.1.5 root 68: FDC_Reset ( false );
1.1 root 69: }
70:
71:
72: /**
73: * Return interrupt number (1 - 7), -1 means no interrupt.
74: * Note that the interrupt stays pending if it can't be executed yet
75: * due to the interrupt level field in the SR.
76: */
77: int intlev(void)
78: {
1.1.1.6 ! root 79: if ( pendingInterrupts & (1 << 6) ) /* MFP/DSP interrupt ? */
! 80: return 6;
! 81: else if ( pendingInterrupts & (1 << 4) ) /* VBL interrupt ? */
1.1.1.4 root 82: return 4;
83: else if ( pendingInterrupts & (1 << 2) ) /* HBL interrupt ? */
84: return 2;
1.1 root 85:
86: return -1;
87: }
88:
89: /**
90: * Initialize 680x0 emulation
91: */
92: int Init680x0(void)
93: {
94: currprefs.cpu_level = changed_prefs.cpu_level = ConfigureParams.System.nCpuLevel;
95:
96: switch (currprefs.cpu_level) {
97: case 0 : currprefs.cpu_model = 68000; break;
98: case 1 : currprefs.cpu_model = 68010; break;
99: case 2 : currprefs.cpu_model = 68020; break;
100: case 3 : currprefs.cpu_model = 68030; break;
101: case 4 : currprefs.cpu_model = 68040; break;
102: case 5 : currprefs.cpu_model = 68060; break;
103: default: fprintf (stderr, "Init680x0() : Error, cpu_level unknown\n");
104: }
105:
106: currprefs.cpu_compatible = changed_prefs.cpu_compatible = ConfigureParams.System.bCompatibleCpu;
107: currprefs.address_space_24 = changed_prefs.address_space_24 = ConfigureParams.System.bAddressSpace24;
108: currprefs.cpu_cycle_exact = changed_prefs.cpu_cycle_exact = ConfigureParams.System.bCycleExactCpu;
109: currprefs.fpu_model = changed_prefs.fpu_model = ConfigureParams.System.n_FPUType;
110: currprefs.fpu_strict = changed_prefs.fpu_strict = ConfigureParams.System.bCompatibleFPU;
1.1.1.6 ! root 111:
! 112: /* Set the MMU model by taking the same value as CPU model */
! 113: /* MMU is only supported for CPU >=68030 */
! 114: currprefs.mmu_model = changed_prefs.mmu_model = 0; /* MMU disabled by default */
! 115: if ( ( ConfigureParams.System.bMMU ) && ( currprefs.cpu_model >= 68030 ) )
! 116: currprefs.mmu_model = changed_prefs.mmu_model = currprefs.cpu_model; /* MMU enabled */
1.1 root 117:
118: init_m68k();
119:
120: return true;
121: }
122:
123:
124: /**
125: * Deinitialize 680x0 emulation
126: */
127: void Exit680x0(void)
128: {
129: memory_uninit();
130:
131: free(table68k);
132: table68k = NULL;
133: }
134:
1.1.1.6 ! root 135:
! 136: /**
! 137: * Execute a 'NOP' opcode (increment PC by 2 bytes and take care
! 138: * of prefetch at the CPU level depending on the current CPU mode)
! 139: * This is used to return from Gemdos / Natfeats interception, by ignoring
! 140: * the intercepted opcode and executing a NOP instead once the work has been done.
! 141: */
! 142: static void CpuDoNOP ( void )
! 143: {
! 144: (*cpufunctbl[0X4E71])(0x4E71);
! 145: }
! 146:
! 147:
1.1 root 148: /**
149: * This function will be called at system init by the cartridge routine
150: * (after gemdos init, before booting floppies).
151: * The GEMDOS vector (#$84) is setup and we also initialize the connected
152: * drive mask and Line-A variables (for an extended VDI resolution) from here.
153: */
1.1.1.6 ! root 154: uae_u32 OpCode_SysInit(uae_u32 opcode)
1.1 root 155: {
156: /* Add any drives mapped by TOS in the interim */
157: ConnectedDriveMask |= STMemory_ReadLong(0x4c2);
158: /* Initialize the connected drive mask */
159: STMemory_WriteLong(0x4c2, ConnectedDriveMask);
160:
161: if (!bInitGemDOS)
162: {
163: /* Init on boot - see cart.c */
164: GemDOS_Boot();
165:
166: /* Update LineA for extended VDI res
167: * D0: LineA base, A1: Font base
168: */
169: VDI_LineA(regs.regs[0], regs.regs[9]);
170: }
171:
1.1.1.6 ! root 172: CpuDoNOP ();
1.1.1.3 root 173: return 4 * CYCLE_UNIT / 2;
1.1 root 174: }
175:
176:
177: /**
178: * Intercept GEMDOS calls.
179: * Used for GEMDOS HD emulation (see gemdos.c).
180: */
1.1.1.6 ! root 181: uae_u32 OpCode_GemDos(uae_u32 opcode)
1.1 root 182: {
183: GemDOS_OpCode(); /* handler code in gemdos.c */
184:
1.1.1.6 ! root 185: CpuDoNOP ();
1.1.1.3 root 186: return 4 * CYCLE_UNIT / 2;
1.1 root 187: }
188:
189:
190: /**
191: * This is called after completion of each VDI call
192: */
1.1.1.6 ! root 193: uae_u32 OpCode_VDI(uae_u32 opcode)
1.1 root 194: {
1.1.1.4 root 195: Uint32 pc = M68000_GetPC();
1.1 root 196:
1.1.1.4 root 197: /* this is valid only after VDI trap, called from cartridge code */
198: if (VDI_OldPC && pc >= 0xfa0000 && pc < 0xfc0000)
199: {
200: VDI_Complete();
201:
202: /* Set PC back to where originated from to continue instruction decoding */
203: m68k_setpc(VDI_OldPC);
204: VDI_OldPC = 0;
205: }
206: else
207: {
208: /* illegal instruction */
209: op_illg(opcode);
210: }
1.1 root 211:
1.1.1.6 ! root 212: fill_prefetch();
1.1.1.3 root 213: return 4 * CYCLE_UNIT / 2;
1.1 root 214: }
1.1.1.4 root 215:
216:
217: /**
218: * Emulator Native Features ID opcode interception.
219: */
1.1.1.6 ! root 220: uae_u32 OpCode_NatFeat_ID(uae_u32 opcode)
1.1.1.4 root 221: {
222: Uint32 stack = Regs[REG_A7] + SIZE_LONG; /* skip return address */
223:
224: if (NatFeat_ID(stack, &(Regs[REG_D0]))) {
1.1.1.6 ! root 225: CpuDoNOP ();
1.1.1.4 root 226: }
227: return 4 * CYCLE_UNIT / 2;
228: }
229:
230: /**
231: * Emulator Native Features call opcode interception.
232: */
1.1.1.6 ! root 233: uae_u32 OpCode_NatFeat_Call(uae_u32 opcode)
1.1.1.4 root 234: {
235: Uint32 stack = Regs[REG_A7] + SIZE_LONG; /* skip return address */
236: Uint16 SR = M68000_GetSR();
237: bool super;
238:
239: super = ((SR & SR_SUPERMODE) == SR_SUPERMODE);
240: if (NatFeat_Call(stack, super, &(Regs[REG_D0]))) {
1.1.1.6 ! root 241: CpuDoNOP ();
1.1.1.4 root 242: }
243: return 4 * CYCLE_UNIT / 2;
244: }
1.1.1.6 ! root 245:
! 246:
! 247:
! 248:
! 249:
! 250: TCHAR* buf_out (TCHAR *buffer, int *bufsize, const TCHAR *format, ...) {
! 251: va_list parms;
! 252: if (buffer == NULL) {
! 253: return 0;
! 254: }
! 255: va_start (parms, format);
! 256: vsnprintf (buffer, (*bufsize) - 1, format, parms);
! 257: va_end (parms);
! 258: *bufsize -= _tcslen (buffer);
! 259: return buffer + _tcslen (buffer);
! 260: }
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