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1.1 root 1:
2: #include "flags_x86.h"
3:
4: #ifdef CPU_64_BIT
5: typedef uae_u64 uintptr;
6: #else
7: typedef uae_u32 uintptr;
8: #endif
9:
10: /* Flags for Bernie during development/debugging. Should go away eventually */
11: #define DISTRUST_CONSISTENT_MEM 0
12: #define TAGMASK 0x000fffff
13: #define TAGSIZE (TAGMASK+1)
14: #define MAXRUN 1024
15:
16: extern uae_u8* start_pc_p;
17: extern uae_u32 start_pc;
18:
19: #define cacheline(x) (((uae_u32)x)&TAGMASK)
20:
21: typedef struct {
22: uae_u16* location;
23: uae_u8 cycles;
24: uae_u8 specmem;
25: uae_u8 dummy2;
26: uae_u8 dummy3;
27: } cpu_history;
28:
29: struct blockinfo_t;
30:
31: typedef union {
32: cpuop_func* handler;
33: struct blockinfo_t* bi;
34: } cacheline;
35:
36: extern signed long pissoff;
37:
38: #define USE_OPTIMIZER 0
39: #define USE_LOW_OPTIMIZER 0
40: #define USE_ALIAS 1
41: #define USE_F_ALIAS 1
42: #define USE_SOFT_FLUSH 1
43: #define USE_OFFSET 1
44: #define COMP_DEBUG 1
45:
46: #if COMP_DEBUG
47: #define Dif(x) if (x)
48: #else
49: #define Dif(x) if (0)
50: #endif
51:
52: #define SCALE 2
53: #define MAXCYCLES (1000 * CYCLE_UNIT)
54: #define MAXREGOPT 65536
55:
56: #define BYTES_PER_INST 10240 /* paranoid ;-) */
57: #define LONGEST_68K_INST 16 /* The number of bytes the longest possible
58: 68k instruction takes */
59: #define MAX_CHECKSUM_LEN 2048 /* The maximum size we calculate checksums
60: for. Anything larger will be flushed
61: unconditionally even with SOFT_FLUSH */
62: #define MAX_HOLD_BI 3 /* One for the current block, and up to two
63: for jump targets */
64:
65: #define INDIVIDUAL_INST 0
66: #define FLAG_C 0x0010
67: #define FLAG_V 0x0008
68: #define FLAG_Z 0x0004
69: #define FLAG_N 0x0002
70: #define FLAG_X 0x0001
71: #define FLAG_CZNV (FLAG_C | FLAG_Z | FLAG_N | FLAG_V)
72: #define FLAG_ZNV (FLAG_Z | FLAG_N | FLAG_V)
73:
74: #define KILLTHERAT 1 /* Set to 1 to avoid some partial_rat_stalls */
75:
76: /* Whether to preserve registers across calls to JIT compiled routines */
77: #if defined X86_ASSEMBLY
78: #define USE_PUSH_POP 0
79: #else
80: #define USE_PUSH_POP 1
81: #endif
82:
83: #define N_REGS 8 /* really only 7, but they are numbered 0,1,2,3,5,6,7 */
84: #define N_FREGS 6 /* That leaves us two positions on the stack to play with */
85:
86: /* Functions exposed to newcpu, or to what was moved from newcpu.c to
87: * compemu_support.c */
88: extern void init_comp(void);
89: extern void flush(int save_regs);
90: extern void small_flush(int save_regs);
91: extern void set_target(uae_u8* t);
92: extern void freescratch(void);
93: extern void build_comp(void);
94: extern void set_cache_state(int enabled);
95: extern int get_cache_state(void);
96: extern uae_u32 get_jitted_size(void);
97: #ifdef JIT
98: extern void flush_icache(uaecptr ptr, int n);
1.1.1.2 ! root 99: extern void flush_icache_hard(uaecptr ptr, int n);
1.1 root 100: #endif
101: extern void alloc_cache(void);
102: extern void compile_block(cpu_history* pc_hist, int blocklen, int totcyles);
103: extern int check_for_cache_miss(void);
104:
105:
1.1.1.2 ! root 106: #define scaled_cycles(x) (currprefs.m68k_speed<0?(((x)/SCALE)?(((x)/SCALE<MAXCYCLES?((x)/SCALE):MAXCYCLES)):1):(x))
1.1 root 107:
108:
109: extern uae_u32 needed_flags;
110: extern cacheline cache_tags[];
111: extern uae_u8* comp_pc_p;
112: extern void* pushall_call_handler;
113:
114: #define VREGS 32
115: #define VFREGS 16
116:
117: #define INMEM 1
118: #define CLEAN 2
119: #define DIRTY 3
120: #define UNDEF 4
121: #define ISCONST 5
122:
123: typedef struct {
124: uae_u32* mem;
125: uae_u32 val;
126: uae_u8 is_swapped;
127: uae_u8 status;
128: uae_u8 realreg;
129: uae_u8 realind; /* The index in the holds[] array */
130: uae_u8 needflush;
131: uae_u8 validsize;
132: uae_u8 dirtysize;
133: uae_u8 dummy;
134: } reg_status;
135:
136: typedef struct {
137: uae_u32* mem;
138: double val;
139: uae_u8 status;
140: uae_u8 realreg;
141: uae_u8 realind;
142: uae_u8 needflush;
143: } freg_status;
144:
145: typedef struct {
146: uae_u8 use_flags;
147: uae_u8 set_flags;
148: uae_u8 is_jump;
149: uae_u8 is_addx;
150: uae_u8 is_const_jump;
151: } op_properties;
152:
153: extern op_properties prop[65536];
154:
155: STATIC_INLINE int end_block(uae_u16 opcode)
156: {
157: return prop[opcode].is_jump ||
158: (prop[opcode].is_const_jump && !currprefs.comp_constjump);
159: }
160:
161: #define PC_P 16
162: #define FLAGX 17
163: #define FLAGTMP 18
164: #define NEXT_HANDLER 19
165: #define S1 20
166: #define S2 21
167: #define S3 22
168: #define S4 23
169: #define S5 24
170: #define S6 25
171: #define S7 26
172: #define S8 27
173: #define S9 28
174: #define S10 29
175: #define S11 30
176: #define S12 31
177:
178: #define FP_RESULT 8
179: #define FS1 9
180: #define FS2 10
181: #define FS3 11
182:
183: typedef struct {
184: uae_u32 touched;
185: uae_s8 holds[VREGS];
186: uae_u8 nholds;
187: uae_u8 canbyte;
188: uae_u8 canword;
189: uae_u8 locked;
190: } n_status;
191:
192: typedef struct {
193: uae_s8 holds;
194: uae_u8 validsize;
195: uae_u8 dirtysize;
196: } n_smallstatus;
197:
198: typedef struct {
199: uae_u32 touched;
200: uae_s8 holds[VFREGS];
201: uae_u8 nholds;
202: uae_u8 locked;
203: } fn_status;
204:
205: /* For flag handling */
206: #define NADA 1
207: #define TRASH 2
208: #define VALID 3
209:
210: /* needflush values */
211: #define NF_SCRATCH 0
212: #define NF_TOMEM 1
213: #define NF_HANDLER 2
214:
215: typedef struct {
216: /* Integer part */
217: reg_status state[VREGS];
218: n_status nat[N_REGS];
219: uae_u32 flags_on_stack;
220: uae_u32 flags_in_flags;
221: uae_u32 flags_are_important;
222: /* FPU part */
223: freg_status fate[VFREGS];
224: fn_status fat[N_FREGS];
225:
226: /* x86 FPU part */
227: uae_s8 spos[N_FREGS];
228: uae_s8 onstack[6];
229: uae_s8 tos;
230: } bigstate;
231:
232: typedef struct {
233: /* Integer part */
234: n_smallstatus nat[N_REGS];
235: } smallstate;
236:
237: extern bigstate live;
238: extern int touchcnt;
239:
240:
241: #define IMMS uae_s32
242: #define IMM uae_u32
243: #define R1 uae_u32
244: #define R2 uae_u32
245: #define R4 uae_u32
246: #define W1 uae_u32
247: #define W2 uae_u32
248: #define W4 uae_u32
249: #define RW1 uae_u32
250: #define RW2 uae_u32
251: #define RW4 uae_u32
252: #define MEMR uae_u32
253: #define MEMW uae_u32
254: #define MEMRW uae_u32
255:
256: #define FW uae_u32
257: #define FR uae_u32
258: #define FRW uae_u32
259:
260: #define MIDFUNC(nargs,func,args) void func args
261: #define MENDFUNC(nargs,func,args)
262: #define COMPCALL(func) func
263:
264: #define LOWFUNC(flags,mem,nargs,func,args) STATIC_INLINE void func args
265: #define LENDFUNC(flags,mem,nargs,func,args)
266:
267: #if USE_OPTIMIZER
268: #define REGALLOC_O 2
269: #define PEEPHOLE_O 3 /* Has to be >= REGALLOC */
270: #define DECLARE(func) extern void func; extern void do_##func
271: #else
272: #define REGALLOC_O 2000000
273: #define PEEPHOLE_O 2000000
274: #define DECLARE(func) extern void func
275: #endif
276:
277:
278: /* What we expose to the outside */
279: DECLARE(bt_l_ri(R4 r, IMM i));
280: DECLARE(bt_l_rr(R4 r, R4 b));
281: DECLARE(btc_l_ri(RW4 r, IMM i));
282: DECLARE(btc_l_rr(RW4 r, R4 b));
283: DECLARE(bts_l_ri(RW4 r, IMM i));
284: DECLARE(bts_l_rr(RW4 r, R4 b));
285: DECLARE(btr_l_ri(RW4 r, IMM i));
286: DECLARE(btr_l_rr(RW4 r, R4 b));
287: DECLARE(mov_l_rm(W4 d, IMM s));
288: DECLARE(call_r(R4 r));
289: DECLARE(sub_l_mi(IMM d, IMM s));
290: DECLARE(mov_l_mi(IMM d, IMM s));
291: DECLARE(mov_w_mi(IMM d, IMM s));
292: DECLARE(mov_b_mi(IMM d, IMM s));
293: DECLARE(rol_b_ri(RW1 r, IMM i));
294: DECLARE(rol_w_ri(RW2 r, IMM i));
295: DECLARE(rol_l_ri(RW4 r, IMM i));
296: DECLARE(rol_l_rr(RW4 d, R1 r));
297: DECLARE(rol_w_rr(RW2 d, R1 r));
298: DECLARE(rol_b_rr(RW1 d, R1 r));
299: DECLARE(shll_l_rr(RW4 d, R1 r));
300: DECLARE(shll_w_rr(RW2 d, R1 r));
301: DECLARE(shll_b_rr(RW1 d, R1 r));
302: DECLARE(ror_b_ri(R1 r, IMM i));
303: DECLARE(ror_w_ri(R2 r, IMM i));
304: DECLARE(ror_l_ri(R4 r, IMM i));
305: DECLARE(ror_l_rr(R4 d, R1 r));
306: DECLARE(ror_w_rr(R2 d, R1 r));
307: DECLARE(ror_b_rr(R1 d, R1 r));
308: DECLARE(shrl_l_rr(RW4 d, R1 r));
309: DECLARE(shrl_w_rr(RW2 d, R1 r));
310: DECLARE(shrl_b_rr(RW1 d, R1 r));
311: DECLARE(shra_l_rr(RW4 d, R1 r));
312: DECLARE(shra_w_rr(RW2 d, R1 r));
313: DECLARE(shra_b_rr(RW1 d, R1 r));
314: DECLARE(shll_l_ri(RW4 r, IMM i));
315: DECLARE(shll_w_ri(RW2 r, IMM i));
316: DECLARE(shll_b_ri(RW1 r, IMM i));
317: DECLARE(shrl_l_ri(RW4 r, IMM i));
318: DECLARE(shrl_w_ri(RW2 r, IMM i));
319: DECLARE(shrl_b_ri(RW1 r, IMM i));
320: DECLARE(shra_l_ri(RW4 r, IMM i));
321: DECLARE(shra_w_ri(RW2 r, IMM i));
322: DECLARE(shra_b_ri(RW1 r, IMM i));
323: DECLARE(setcc(W1 d, IMM cc));
324: DECLARE(setcc_m(IMM d, IMM cc));
325: DECLARE(cmov_b_rr(RW1 d, R1 s, IMM cc));
326: DECLARE(cmov_w_rr(RW2 d, R2 s, IMM cc));
327: DECLARE(cmov_l_rr(RW4 d, R4 s, IMM cc));
328: DECLARE(cmov_l_rm(RW4 d, IMM s, IMM cc));
329: DECLARE(bsf_l_rr(W4 d, R4 s));
330: DECLARE(pop_m(IMM d));
331: DECLARE(push_m(IMM d));
332: DECLARE(pop_l(W4 d));
333: DECLARE(push_l_i(IMM i));
334: DECLARE(push_l(R4 s));
335: DECLARE(clear_16(RW4 r));
336: DECLARE(clear_8(RW4 r));
337: DECLARE(sign_extend_16_rr(W4 d, R2 s));
338: DECLARE(sign_extend_8_rr(W4 d, R1 s));
339: DECLARE(zero_extend_16_rr(W4 d, R2 s));
340: DECLARE(zero_extend_8_rr(W4 d, R1 s));
341: DECLARE(imul_64_32(RW4 d, RW4 s));
342: DECLARE(mul_64_32(RW4 d, RW4 s));
343: DECLARE(imul_32_32(RW4 d, R4 s));
344: DECLARE(mov_b_rr(W1 d, R1 s));
345: DECLARE(mov_w_rr(W2 d, R2 s));
346: DECLARE(mov_l_rrm_indexed(W4 d, R4 baser, R4 index));
347: DECLARE(mov_w_rrm_indexed(W2 d, R4 baser, R4 index));
348: DECLARE(mov_b_rrm_indexed(W1 d, R4 baser, R4 index));
349: DECLARE(mov_l_mrr_indexed(R4 baser, R4 index, R4 s));
350: DECLARE(mov_w_mrr_indexed(R4 baser, R4 index, R2 s));
351: DECLARE(mov_b_mrr_indexed(R4 baser, R4 index, R1 s));
352: DECLARE(mov_l_rm_indexed(W4 d, IMM base, R4 index));
353: DECLARE(mov_l_rR(W4 d, R4 s, IMM offset));
354: DECLARE(mov_w_rR(W2 d, R4 s, IMM offset));
355: DECLARE(mov_b_rR(W1 d, R4 s, IMM offset));
356: DECLARE(mov_l_brR(W4 d, R4 s, IMM offset));
357: DECLARE(mov_w_brR(W2 d, R4 s, IMM offset));
358: DECLARE(mov_b_brR(W1 d, R4 s, IMM offset));
359: DECLARE(mov_l_Ri(R4 d, IMM i, IMM offset));
360: DECLARE(mov_w_Ri(R4 d, IMM i, IMM offset));
361: DECLARE(mov_b_Ri(R4 d, IMM i, IMM offset));
362: DECLARE(mov_l_Rr(R4 d, R4 s, IMM offset));
363: DECLARE(mov_w_Rr(R4 d, R2 s, IMM offset));
364: DECLARE(mov_b_Rr(R4 d, R1 s, IMM offset));
365: DECLARE(lea_l_brr(W4 d, R4 s, IMM offset));
366: DECLARE(lea_l_brr_indexed(W4 d, R4 s, R4 index, IMM factor, IMM offset));
367: DECLARE(mov_l_bRr(R4 d, R4 s, IMM offset));
368: DECLARE(mov_w_bRr(R4 d, R2 s, IMM offset));
369: DECLARE(mov_b_bRr(R4 d, R1 s, IMM offset));
370: DECLARE(gen_bswap_32(RW4 r));
371: DECLARE(gen_bswap_16(RW2 r));
372: DECLARE(mov_l_rr(W4 d, R4 s));
373: DECLARE(mov_l_mr(IMM d, R4 s));
374: DECLARE(mov_w_mr(IMM d, R2 s));
375: DECLARE(mov_w_rm(W2 d, IMM s));
376: DECLARE(mov_b_mr(IMM d, R1 s));
377: DECLARE(mov_b_rm(W1 d, IMM s));
378: DECLARE(mov_l_ri(W4 d, IMM s));
379: DECLARE(mov_w_ri(W2 d, IMM s));
380: DECLARE(mov_b_ri(W1 d, IMM s));
381: DECLARE(add_l_mi(IMM d, IMM s) );
382: DECLARE(add_w_mi(IMM d, IMM s) );
383: DECLARE(add_b_mi(IMM d, IMM s) );
384: DECLARE(test_l_ri(R4 d, IMM i));
385: DECLARE(test_l_rr(R4 d, R4 s));
386: DECLARE(test_w_rr(R2 d, R2 s));
387: DECLARE(test_b_rr(R1 d, R1 s));
388: DECLARE(and_l_ri(RW4 d, IMM i));
389: DECLARE(and_l(RW4 d, R4 s));
390: DECLARE(and_w(RW2 d, R2 s));
391: DECLARE(and_b(RW1 d, R1 s));
392: DECLARE(or_l_ri(RW4 d, IMM i));
393: DECLARE(or_l(RW4 d, R4 s));
394: DECLARE(or_w(RW2 d, R2 s));
395: DECLARE(or_b(RW1 d, R1 s));
396: DECLARE(adc_l(RW4 d, R4 s));
397: DECLARE(adc_w(RW2 d, R2 s));
398: DECLARE(adc_b(RW1 d, R1 s));
399: DECLARE(add_l(RW4 d, R4 s));
400: DECLARE(add_w(RW2 d, R2 s));
401: DECLARE(add_b(RW1 d, R1 s));
402: DECLARE(sub_l_ri(RW4 d, IMM i));
403: DECLARE(sub_w_ri(RW2 d, IMM i));
404: DECLARE(sub_b_ri(RW1 d, IMM i));
405: DECLARE(add_l_ri(RW4 d, IMM i));
406: DECLARE(add_w_ri(RW2 d, IMM i));
407: DECLARE(add_b_ri(RW1 d, IMM i));
408: DECLARE(sbb_l(RW4 d, R4 s));
409: DECLARE(sbb_w(RW2 d, R2 s));
410: DECLARE(sbb_b(RW1 d, R1 s));
411: DECLARE(sub_l(RW4 d, R4 s));
412: DECLARE(sub_w(RW2 d, R2 s));
413: DECLARE(sub_b(RW1 d, R1 s));
414: DECLARE(cmp_l(R4 d, R4 s));
415: DECLARE(cmp_l_ri(R4 r, IMM i));
416: DECLARE(cmp_w(R2 d, R2 s));
417: DECLARE(cmp_b(R1 d, R1 s));
418: DECLARE(xor_l(RW4 d, R4 s));
419: DECLARE(xor_w(RW2 d, R2 s));
420: DECLARE(xor_b(RW1 d, R1 s));
421: DECLARE(live_flags(void));
422: DECLARE(dont_care_flags(void));
423: DECLARE(duplicate_carry(void));
424: DECLARE(restore_carry(void));
425: DECLARE(start_needflags(void));
426: DECLARE(end_needflags(void));
427: DECLARE(make_flags_live(void));
428: DECLARE(call_r_11(R4 r, W4 out1, R4 in1, IMM osize, IMM isize));
429: DECLARE(call_r_02(R4 r, R4 in1, R4 in2, IMM isize1, IMM isize2));
430: DECLARE(readmem_new(R4 address, W4 dest, IMM offset, IMM size, W4 tmp));
431: DECLARE(writemem_new(R4 address, R4 source, IMM offset, IMM size, W4 tmp));
432: DECLARE(forget_about(W4 r));
433: DECLARE(nop(void));
434:
435: DECLARE(f_forget_about(FW r));
436: DECLARE(fmov_pi(FW r));
437: DECLARE(fmov_log10_2(FW r));
438: DECLARE(fmov_log2_e(FW r));
439: DECLARE(fmov_loge_2(FW r));
440: DECLARE(fmov_1(FW r));
441: DECLARE(fmov_0(FW r));
442: DECLARE(fmov_rm(FW r, MEMR m));
443: DECLARE(fmov_mr(MEMW m, FR r));
444: DECLARE(fmovi_rm(FW r, MEMR m));
445: DECLARE(fmovi_mrb(MEMW m, FR r, double *bounds));
446: DECLARE(fmovs_rm(FW r, MEMR m));
447: DECLARE(fmovs_mr(MEMW m, FR r));
448: DECLARE(fcuts_r(FRW r));
449: DECLARE(fcut_r(FRW r));
450: DECLARE(fmov_ext_mr(MEMW m, FR r));
451: DECLARE(fmov_ext_rm(FW r, MEMR m));
452: DECLARE(fmov_rr(FW d, FR s));
453: DECLARE(fldcw_m_indexed(R4 index, IMM base));
454: DECLARE(ftst_r(FR r));
455: DECLARE(dont_care_fflags(void));
456: DECLARE(fsqrt_rr(FW d, FR s));
457: DECLARE(fabs_rr(FW d, FR s));
458: DECLARE(frndint_rr(FW d, FR s));
459: DECLARE(fgetexp_rr(FW d, FR s));
460: DECLARE(fgetman_rr(FW d, FR s));
461: DECLARE(fsin_rr(FW d, FR s));
462: DECLARE(fcos_rr(FW d, FR s));
463: DECLARE(ftan_rr(FW d, FR s));
464: DECLARE(fsincos_rr(FW d, FW c, FR s));
465: DECLARE(fscale_rr(FRW d, FR s));
466: DECLARE(ftwotox_rr(FW d, FR s));
467: DECLARE(fetox_rr(FW d, FR s));
468: DECLARE(fetoxM1_rr(FW d, FR s));
469: DECLARE(ftentox_rr(FW d, FR s));
470: DECLARE(flog2_rr(FW d, FR s));
471: DECLARE(flogN_rr(FW d, FR s));
472: DECLARE(flogNP1_rr(FW d, FR s));
473: DECLARE(flog10_rr(FW d, FR s));
474: DECLARE(fasin_rr(FW d, FR s));
475: DECLARE(facos_rr(FW d, FR s));
476: DECLARE(fatan_rr(FW d, FR s));
477: DECLARE(fatanh_rr(FW d, FR s));
478: DECLARE(fsinh_rr(FW d, FR s));
479: DECLARE(fcosh_rr(FW d, FR s));
480: DECLARE(ftanh_rr(FW d, FR s));
481: DECLARE(fneg_rr(FW d, FR s));
482: DECLARE(fadd_rr(FRW d, FR s));
483: DECLARE(fsub_rr(FRW d, FR s));
484: DECLARE(fmul_rr(FRW d, FR s));
485: DECLARE(frem_rr(FRW d, FR s));
486: DECLARE(frem1_rr(FRW d, FR s));
487: DECLARE(fdiv_rr(FRW d, FR s));
488: DECLARE(fcmp_rr(FR d, FR s));
489: DECLARE(fflags_into_flags(W2 tmp));
490:
491: extern int failure;
492: #define FAIL(x) do { failure|=x; } while (0)
493:
494: /* Convenience functions exposed to gencomp */
495: extern uae_u32 m68k_pc_offset;
496: extern void readbyte(int address, int dest, int tmp);
497: extern void readword(int address, int dest, int tmp);
498: extern void readlong(int address, int dest, int tmp);
499: extern void writebyte(int address, int source, int tmp);
500: extern void writeword(int address, int source, int tmp);
501: extern void writelong(int address, int source, int tmp);
502: extern void writeword_clobber(int address, int source, int tmp);
503: extern void writelong_clobber(int address, int source, int tmp);
504: extern void get_n_addr(int address, int dest, int tmp);
505: extern void get_n_addr_jmp(int address, int dest, int tmp);
506: extern void calc_disp_ea_020(int base, uae_u32 dp, int target, int tmp);
507: extern int kill_rodent(int r);
508: extern void sync_m68k_pc(void);
509: extern uae_u32 get_const(int r);
510: extern int is_const(int r);
511: extern void register_branch(uae_u32 not_taken, uae_u32 taken, uae_u8 cond);
512: extern void empty_optimizer(void);
513:
514: #define comp_get_ibyte(o) do_get_mem_byte((uae_u8 *)(comp_pc_p + (o) + 1))
515: #define comp_get_iword(o) do_get_mem_word((uae_u16 *)(comp_pc_p + (o)))
516: #define comp_get_ilong(o) do_get_mem_long((uae_u32 *)(comp_pc_p + (o)))
517:
518: struct blockinfo_t;
519:
520: typedef struct dep_t {
521: uae_u32* jmp_off;
522: struct blockinfo_t* target;
523: struct dep_t** prev_p;
524: struct dep_t* next;
525: } dependency;
526:
527: typedef struct blockinfo_t {
528: uae_s32 count;
529: cpuop_func* direct_handler_to_use;
530: cpuop_func* handler_to_use;
531: /* The direct handler does not check for the correct address */
532:
533: cpuop_func* handler;
534: cpuop_func* direct_handler;
535:
536: cpuop_func* direct_pen;
537: cpuop_func* direct_pcc;
538:
539: uae_u8* nexthandler;
540: uae_u8* pc_p;
541:
542: uae_u32 c1;
543: uae_u32 c2;
544: uae_u32 len;
545:
546: struct blockinfo_t* next_same_cl;
547: struct blockinfo_t** prev_same_cl_p;
548: struct blockinfo_t* next;
549: struct blockinfo_t** prev_p;
550:
551: uae_u32 min_pcp;
552: uae_u8 optlevel;
553: uae_u8 needed_flags;
554: uae_u8 status;
555: uae_u8 havestate;
556:
557: dependency dep[2]; /* Holds things we depend on */
558: dependency* deplist; /* List of things that depend on this */
559: smallstate env;
560: } blockinfo;
561:
562: #define BI_NEW 0
563: #define BI_COUNTING 1
564: #define BI_TARGETTED 2
565:
566: typedef struct {
567: uae_u8 type;
568: uae_u8 reg;
569: uae_u32 next;
570: } regacc;
571:
572: void execute_normal(void);
573: void exec_nostats(void);
574: void do_nothing(void);
575:
576: void comp_fdbcc_opp (uae_u32 opcode, uae_u16 extra);
577: void comp_fscc_opp (uae_u32 opcode, uae_u16 extra);
578: void comp_ftrapcc_opp (uae_u32 opcode, uaecptr oldpc);
579: void comp_fbcc_opp (uae_u32 opcode);
580: void comp_fsave_opp (uae_u32 opcode);
581: void comp_frestore_opp (uae_u32 opcode);
582: void comp_fpp_opp (uae_u32 opcode, uae_u16 extra);
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