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1.1 root 1: /*
2: * compiler/compemu_midfunc_arm.cpp - Native MIDFUNCS for IA-32 and AMD64
3: *
4: * Copyright (c) 2014 Jens Heitmann of ARAnyM dev team (see AUTHORS)
5: *
6: * Inspired by Christian Bauer's Basilisk II
7: *
8: * Original 68040 JIT compiler for UAE, copyright 2000-2002 Bernd Meyer
9: *
10: * Adaptation for Basilisk II and improvements, copyright 2000-2002
11: * Gwenole Beauchesne
12: *
13: * Basilisk II (C) 1997-2002 Christian Bauer
14: *
15: * This program is free software; you can redistribute it and/or modify
16: * it under the terms of the GNU General Public License as published by
17: * the Free Software Foundation; either version 2 of the License, or
18: * (at your option) any later version.
19: *
20: * This program is distributed in the hope that it will be useful,
21: * but WITHOUT ANY WARRANTY; without even the implied warranty of
22: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23: * GNU General Public License for more details.
24: *
25: * You should have received a copy of the GNU General Public License
1.1.1.2 ! root 26: * along with this program; if not, write to the Free Software Foundation,
! 27: * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1335 USA
1.1 root 28: *
29: * Note:
30: * File is included by compemu_support.cpp
31: *
32: */
33:
34: /********************************************************************
35: * CPU functions exposed to gencomp. Both CREATE and EMIT time *
36: ********************************************************************/
37:
38:
39: /*
40: * RULES FOR HANDLING REGISTERS:
41: *
42: * * In the function headers, order the parameters
43: * - 1st registers written to
44: * - 2nd read/modify/write registers
45: * - 3rd registers read from
46: * * Before calling raw_*, you must call readreg, writereg or rmw for
47: * each register
48: * * The order for this is
49: * - 1st call remove_offset for all registers written to with size<4
50: * - 2nd call readreg for all registers read without offset
51: * - 3rd call rmw for all rmw registers
52: * - 4th call readreg_offset for all registers that can handle offsets
53: * - 5th call get_offset for all the registers from the previous step
54: * - 6th call writereg for all written-to registers
55: * - 7th call raw_*
56: * - 8th unlock2 all registers that were locked
57: */
58:
59: MIDFUNC(0,live_flags,(void))
60: {
61: live.flags_on_stack=TRASH;
62: live.flags_in_flags=VALID;
63: live.flags_are_important=1;
64: }
65: MENDFUNC(0,live_flags,(void))
66:
67: MIDFUNC(0,dont_care_flags,(void))
68: {
69: live.flags_are_important=0;
70: }
71: MENDFUNC(0,dont_care_flags,(void))
72:
73: MIDFUNC(0,duplicate_carry,(void))
74: {
75: evict(FLAGX);
76: make_flags_live_internal();
77: #ifdef UAE
78: COMPCALL(setcc_m)((uintptr)live.state[FLAGX].mem + 1, NATIVE_CC_CS);
79: #else
80: COMPCALL(setcc_m)((uintptr)live.state[FLAGX].mem, NATIVE_CC_CS);
81: #endif
82: log_vwrite(FLAGX);
83: }
84: MENDFUNC(0,duplicate_carry,(void))
85:
86: MIDFUNC(0,restore_carry,(void))
87: {
88: if (!have_rat_stall) { /* Not a P6 core, i.e. no partial stalls */
89: #ifdef UAE
90: bt_l_ri_noclobber(FLAGX, 8);
91: #else
92: bt_l_ri_noclobber(FLAGX, 0);
93: #endif
94: }
95: else { /* Avoid the stall the above creates.
96: This is slow on non-P6, though.
97: */
98: #ifdef UAE
99: COMPCALL(rol_w_ri(FLAGX, 8));
100: #else
101: COMPCALL(rol_b_ri(FLAGX, 8));
102: #endif
103: isclean(FLAGX);
104: }
105: }
106: MENDFUNC(0,restore_carry,(void))
107:
108: MIDFUNC(0,start_needflags,(void))
109: {
110: needflags=1;
111: }
112: MENDFUNC(0,start_needflags,(void))
113:
114: MIDFUNC(0,end_needflags,(void))
115: {
116: needflags=0;
117: }
118: MENDFUNC(0,end_needflags,(void))
119:
120: MIDFUNC(0,make_flags_live,(void))
121: {
122: make_flags_live_internal();
123: }
124: MENDFUNC(0,make_flags_live,(void))
125:
126: MIDFUNC(1,fflags_into_flags,(W2 tmp))
127: {
128: clobber_flags();
129: fflags_into_flags_internal(tmp);
130: }
131: MENDFUNC(1,fflags_into_flags,(W2 tmp))
132:
133: MIDFUNC(2,bt_l_ri,(RR4 r, IMM i)) /* This is defined as only affecting C */
134: {
135: int size=4;
136: if (i<16)
137: size=2;
138: CLOBBER_BT;
139: r=readreg(r,size);
140: raw_bt_l_ri(r,i);
141: unlock2(r);
142: }
143: MENDFUNC(2,bt_l_ri,(RR4 r, IMM i)) /* This is defined as only affecting C */
144:
145: MIDFUNC(2,bt_l_rr,(RR4 r, RR4 b)) /* This is defined as only affecting C */
146: {
147: CLOBBER_BT;
148: r=readreg(r,4);
149: b=readreg(b,4);
150: raw_bt_l_rr(r,b);
151: unlock2(r);
152: unlock2(b);
153: }
154: MENDFUNC(2,bt_l_rr,(RR4 r, RR4 b)) /* This is defined as only affecting C */
155:
156: MIDFUNC(2,btc_l_ri,(RW4 r, IMM i))
157: {
158: int size=4;
159: if (i<16)
160: size=2;
161: CLOBBER_BT;
162: r=rmw(r,size,size);
163: raw_btc_l_ri(r,i);
164: unlock2(r);
165: }
166: MENDFUNC(2,btc_l_ri,(RW4 r, IMM i))
167:
168: MIDFUNC(2,btc_l_rr,(RW4 r, RR4 b))
169: {
170: CLOBBER_BT;
171: b=readreg(b,4);
172: r=rmw(r,4,4);
173: raw_btc_l_rr(r,b);
174: unlock2(r);
175: unlock2(b);
176: }
177: MENDFUNC(2,btc_l_rr,(RW4 r, RR4 b))
178:
179: MIDFUNC(2,btr_l_ri,(RW4 r, IMM i))
180: {
181: int size=4;
182: if (i<16)
183: size=2;
184: CLOBBER_BT;
185: r=rmw(r,size,size);
186: raw_btr_l_ri(r,i);
187: unlock2(r);
188: }
189: MENDFUNC(2,btr_l_ri,(RW4 r, IMM i))
190:
191: MIDFUNC(2,btr_l_rr,(RW4 r, RR4 b))
192: {
193: CLOBBER_BT;
194: b=readreg(b,4);
195: r=rmw(r,4,4);
196: raw_btr_l_rr(r,b);
197: unlock2(r);
198: unlock2(b);
199: }
200: MENDFUNC(2,btr_l_rr,(RW4 r, RR4 b))
201:
202: MIDFUNC(2,bts_l_ri,(RW4 r, IMM i))
203: {
204: int size=4;
205: if (i<16)
206: size=2;
207: CLOBBER_BT;
208: r=rmw(r,size,size);
209: raw_bts_l_ri(r,i);
210: unlock2(r);
211: }
212: MENDFUNC(2,bts_l_ri,(RW4 r, IMM i))
213:
214: MIDFUNC(2,bts_l_rr,(RW4 r, RR4 b))
215: {
216: CLOBBER_BT;
217: b=readreg(b,4);
218: r=rmw(r,4,4);
219: raw_bts_l_rr(r,b);
220: unlock2(r);
221: unlock2(b);
222: }
223: MENDFUNC(2,bts_l_rr,(RW4 r, RR4 b))
224:
225: MIDFUNC(2,mov_l_rm,(W4 d, IMM s))
226: {
227: CLOBBER_MOV;
228: d=writereg(d,4);
229: raw_mov_l_rm(d,s);
230: unlock2(d);
231: }
232: MENDFUNC(2,mov_l_rm,(W4 d, IMM s))
233:
234: MIDFUNC(1,call_r,(RR4 r)) /* Clobbering is implicit */
235: {
236: r=readreg(r,4);
237: raw_dec_sp(STACK_SHADOW_SPACE);
238: raw_call_r(r);
239: raw_inc_sp(STACK_SHADOW_SPACE);
240: unlock2(r);
241: }
242: MENDFUNC(1,call_r,(RR4 r)) /* Clobbering is implicit */
243:
244: MIDFUNC(2,sub_l_mi,(IMM d, IMM s))
245: {
246: CLOBBER_SUB;
247: raw_sub_l_mi(d,s) ;
248: }
249: MENDFUNC(2,sub_l_mi,(IMM d, IMM s))
250:
251: MIDFUNC(2,mov_l_mi,(IMM d, IMM s))
252: {
253: CLOBBER_MOV;
254: raw_mov_l_mi(d,s) ;
255: }
256: MENDFUNC(2,mov_l_mi,(IMM d, IMM s))
257:
258: MIDFUNC(2,mov_w_mi,(IMM d, IMM s))
259: {
260: CLOBBER_MOV;
261: raw_mov_w_mi(d,s) ;
262: }
263: MENDFUNC(2,mov_w_mi,(IMM d, IMM s))
264:
265: MIDFUNC(2,mov_b_mi,(IMM d, IMM s))
266: {
267: CLOBBER_MOV;
268: raw_mov_b_mi(d,s) ;
269: }
270: MENDFUNC(2,mov_b_mi,(IMM d, IMM s))
271:
272: MIDFUNC(2,rol_b_ri,(RW1 r, IMM i))
273: {
274: if (!i && !needflags)
275: return;
276: CLOBBER_ROL;
277: r=rmw(r,1,1);
278: raw_rol_b_ri(r,i);
279: unlock2(r);
280: }
281: MENDFUNC(2,rol_b_ri,(RW1 r, IMM i))
282:
283: MIDFUNC(2,rol_w_ri,(RW2 r, IMM i))
284: {
285: if (!i && !needflags)
286: return;
287: CLOBBER_ROL;
288: r=rmw(r,2,2);
289: raw_rol_w_ri(r,i);
290: unlock2(r);
291: }
292: MENDFUNC(2,rol_w_ri,(RW2 r, IMM i))
293:
294: MIDFUNC(2,rol_l_ri,(RW4 r, IMM i))
295: {
296: if (!i && !needflags)
297: return;
298: CLOBBER_ROL;
299: r=rmw(r,4,4);
300: raw_rol_l_ri(r,i);
301: unlock2(r);
302: }
303: MENDFUNC(2,rol_l_ri,(RW4 r, IMM i))
304:
305: MIDFUNC(2,rol_l_rr,(RW4 d, RR1 r))
306: {
307: if (isconst(r)) {
308: COMPCALL(rol_l_ri)(d,(uae_u8)live.state[r].val);
309: return;
310: }
311: CLOBBER_ROL;
312: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
313: d=rmw(d,4,4);
314: Dif (r!=1) {
315: jit_abort("Illegal register %d in raw_rol_b",r);
316: }
317: raw_rol_l_rr(d,r) ;
318: unlock2(r);
319: unlock2(d);
320: }
321: MENDFUNC(2,rol_l_rr,(RW4 d, RR1 r))
322:
323: MIDFUNC(2,rol_w_rr,(RW2 d, RR1 r))
324: { /* Can only do this with r==1, i.e. cl */
325:
326: if (isconst(r)) {
327: COMPCALL(rol_w_ri)(d,(uae_u8)live.state[r].val);
328: return;
329: }
330: CLOBBER_ROL;
331: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
332: d=rmw(d,2,2);
333: Dif (r!=1) {
334: jit_abort("Illegal register %d in raw_rol_b",r);
335: }
336: raw_rol_w_rr(d,r) ;
337: unlock2(r);
338: unlock2(d);
339: }
340: MENDFUNC(2,rol_w_rr,(RW2 d, RR1 r))
341:
342: MIDFUNC(2,rol_b_rr,(RW1 d, RR1 r))
343: { /* Can only do this with r==1, i.e. cl */
344:
345: if (isconst(r)) {
346: COMPCALL(rol_b_ri)(d,(uae_u8)live.state[r].val);
347: return;
348: }
349:
350: CLOBBER_ROL;
351: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
352: d=rmw(d,1,1);
353: Dif (r!=1) {
354: jit_abort("Illegal register %d in raw_rol_b",r);
355: }
356: raw_rol_b_rr(d,r) ;
357: unlock2(r);
358: unlock2(d);
359: }
360: MENDFUNC(2,rol_b_rr,(RW1 d, RR1 r))
361:
362:
363: MIDFUNC(2,shll_l_rr,(RW4 d, RR1 r))
364: {
365: if (isconst(r)) {
366: COMPCALL(shll_l_ri)(d,(uae_u8)live.state[r].val);
367: return;
368: }
369: CLOBBER_SHLL;
370: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
371: d=rmw(d,4,4);
372: Dif (r!=1) {
373: jit_abort("Illegal register %d in raw_rol_b",r);
374: }
375: raw_shll_l_rr(d,r) ;
376: unlock2(r);
377: unlock2(d);
378: }
379: MENDFUNC(2,shll_l_rr,(RW4 d, RR1 r))
380:
381: MIDFUNC(2,shll_w_rr,(RW2 d, RR1 r))
382: { /* Can only do this with r==1, i.e. cl */
383:
384: if (isconst(r)) {
385: COMPCALL(shll_w_ri)(d,(uae_u8)live.state[r].val);
386: return;
387: }
388: CLOBBER_SHLL;
389: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
390: d=rmw(d,2,2);
391: Dif (r!=1) {
392: jit_abort("Illegal register %d in raw_shll_b",r);
393: }
394: raw_shll_w_rr(d,r) ;
395: unlock2(r);
396: unlock2(d);
397: }
398: MENDFUNC(2,shll_w_rr,(RW2 d, RR1 r))
399:
400: MIDFUNC(2,shll_b_rr,(RW1 d, RR1 r))
401: { /* Can only do this with r==1, i.e. cl */
402:
403: if (isconst(r)) {
404: COMPCALL(shll_b_ri)(d,(uae_u8)live.state[r].val);
405: return;
406: }
407:
408: CLOBBER_SHLL;
409: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
410: d=rmw(d,1,1);
411: Dif (r!=1) {
412: jit_abort("Illegal register %d in raw_shll_b",r);
413: }
414: raw_shll_b_rr(d,r) ;
415: unlock2(r);
416: unlock2(d);
417: }
418: MENDFUNC(2,shll_b_rr,(RW1 d, RR1 r))
419:
420:
421: MIDFUNC(2,ror_b_ri,(RR1 r, IMM i))
422: {
423: if (!i && !needflags)
424: return;
425: CLOBBER_ROR;
426: r=rmw(r,1,1);
427: raw_ror_b_ri(r,i);
428: unlock2(r);
429: }
430: MENDFUNC(2,ror_b_ri,(RR1 r, IMM i))
431:
432: MIDFUNC(2,ror_w_ri,(RR2 r, IMM i))
433: {
434: if (!i && !needflags)
435: return;
436: CLOBBER_ROR;
437: r=rmw(r,2,2);
438: raw_ror_w_ri(r,i);
439: unlock2(r);
440: }
441: MENDFUNC(2,ror_w_ri,(RR2 r, IMM i))
442:
443: MIDFUNC(2,ror_l_ri,(RR4 r, IMM i))
444: {
445: if (!i && !needflags)
446: return;
447: CLOBBER_ROR;
448: r=rmw(r,4,4);
449: raw_ror_l_ri(r,i);
450: unlock2(r);
451: }
452: MENDFUNC(2,ror_l_ri,(RR4 r, IMM i))
453:
454: MIDFUNC(2,ror_l_rr,(RR4 d, RR1 r))
455: {
456: if (isconst(r)) {
457: COMPCALL(ror_l_ri)(d,(uae_u8)live.state[r].val);
458: return;
459: }
460: CLOBBER_ROR;
461: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
462: d=rmw(d,4,4);
463: raw_ror_l_rr(d,r) ;
464: unlock2(r);
465: unlock2(d);
466: }
467: MENDFUNC(2,ror_l_rr,(RR4 d, RR1 r))
468:
469: MIDFUNC(2,ror_w_rr,(RR2 d, RR1 r))
470: {
471: if (isconst(r)) {
472: COMPCALL(ror_w_ri)(d,(uae_u8)live.state[r].val);
473: return;
474: }
475: CLOBBER_ROR;
476: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
477: d=rmw(d,2,2);
478: raw_ror_w_rr(d,r) ;
479: unlock2(r);
480: unlock2(d);
481: }
482: MENDFUNC(2,ror_w_rr,(RR2 d, RR1 r))
483:
484: MIDFUNC(2,ror_b_rr,(RR1 d, RR1 r))
485: {
486: if (isconst(r)) {
487: COMPCALL(ror_b_ri)(d,(uae_u8)live.state[r].val);
488: return;
489: }
490:
491: CLOBBER_ROR;
492: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
493: d=rmw(d,1,1);
494: raw_ror_b_rr(d,r) ;
495: unlock2(r);
496: unlock2(d);
497: }
498: MENDFUNC(2,ror_b_rr,(RR1 d, RR1 r))
499:
500: MIDFUNC(2,shrl_l_rr,(RW4 d, RR1 r))
501: {
502: if (isconst(r)) {
503: COMPCALL(shrl_l_ri)(d,(uae_u8)live.state[r].val);
504: return;
505: }
506: CLOBBER_SHRL;
507: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
508: d=rmw(d,4,4);
509: Dif (r!=1) {
510: jit_abort("Illegal register %d in raw_rol_b",r);
511: }
512: raw_shrl_l_rr(d,r) ;
513: unlock2(r);
514: unlock2(d);
515: }
516: MENDFUNC(2,shrl_l_rr,(RW4 d, RR1 r))
517:
518: MIDFUNC(2,shrl_w_rr,(RW2 d, RR1 r))
519: { /* Can only do this with r==1, i.e. cl */
520:
521: if (isconst(r)) {
522: COMPCALL(shrl_w_ri)(d,(uae_u8)live.state[r].val);
523: return;
524: }
525: CLOBBER_SHRL;
526: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
527: d=rmw(d,2,2);
528: Dif (r!=1) {
529: jit_abort("Illegal register %d in raw_shrl_b",r);
530: }
531: raw_shrl_w_rr(d,r) ;
532: unlock2(r);
533: unlock2(d);
534: }
535: MENDFUNC(2,shrl_w_rr,(RW2 d, RR1 r))
536:
537: MIDFUNC(2,shrl_b_rr,(RW1 d, RR1 r))
538: { /* Can only do this with r==1, i.e. cl */
539:
540: if (isconst(r)) {
541: COMPCALL(shrl_b_ri)(d,(uae_u8)live.state[r].val);
542: return;
543: }
544:
545: CLOBBER_SHRL;
546: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
547: d=rmw(d,1,1);
548: Dif (r!=1) {
549: jit_abort("Illegal register %d in raw_shrl_b",r);
550: }
551: raw_shrl_b_rr(d,r) ;
552: unlock2(r);
553: unlock2(d);
554: }
555: MENDFUNC(2,shrl_b_rr,(RW1 d, RR1 r))
556:
557:
558:
559: MIDFUNC(2,shll_l_ri,(RW4 r, IMM i))
560: {
561: if (!i && !needflags)
562: return;
563: if (isconst(r) && !needflags) {
564: live.state[r].val<<=i;
565: return;
566: }
567: CLOBBER_SHLL;
568: r=rmw(r,4,4);
569: raw_shll_l_ri(r,i);
570: unlock2(r);
571: }
572: MENDFUNC(2,shll_l_ri,(RW4 r, IMM i))
573:
574: MIDFUNC(2,shll_w_ri,(RW2 r, IMM i))
575: {
576: if (!i && !needflags)
577: return;
578: CLOBBER_SHLL;
579: r=rmw(r,2,2);
580: raw_shll_w_ri(r,i);
581: unlock2(r);
582: }
583: MENDFUNC(2,shll_w_ri,(RW2 r, IMM i))
584:
585: MIDFUNC(2,shll_b_ri,(RW1 r, IMM i))
586: {
587: if (!i && !needflags)
588: return;
589: CLOBBER_SHLL;
590: r=rmw(r,1,1);
591: raw_shll_b_ri(r,i);
592: unlock2(r);
593: }
594: MENDFUNC(2,shll_b_ri,(RW1 r, IMM i))
595:
596: MIDFUNC(2,shrl_l_ri,(RW4 r, IMM i))
597: {
598: if (!i && !needflags)
599: return;
600: if (isconst(r) && !needflags) {
601: live.state[r].val>>=i;
602: return;
603: }
604: CLOBBER_SHRL;
605: r=rmw(r,4,4);
606: raw_shrl_l_ri(r,i);
607: unlock2(r);
608: }
609: MENDFUNC(2,shrl_l_ri,(RW4 r, IMM i))
610:
611: MIDFUNC(2,shrl_w_ri,(RW2 r, IMM i))
612: {
613: if (!i && !needflags)
614: return;
615: CLOBBER_SHRL;
616: r=rmw(r,2,2);
617: raw_shrl_w_ri(r,i);
618: unlock2(r);
619: }
620: MENDFUNC(2,shrl_w_ri,(RW2 r, IMM i))
621:
622: MIDFUNC(2,shrl_b_ri,(RW1 r, IMM i))
623: {
624: if (!i && !needflags)
625: return;
626: CLOBBER_SHRL;
627: r=rmw(r,1,1);
628: raw_shrl_b_ri(r,i);
629: unlock2(r);
630: }
631: MENDFUNC(2,shrl_b_ri,(RW1 r, IMM i))
632:
633: MIDFUNC(2,shra_l_ri,(RW4 r, IMM i))
634: {
635: if (!i && !needflags)
636: return;
637: CLOBBER_SHRA;
638: r=rmw(r,4,4);
639: raw_shra_l_ri(r,i);
640: unlock2(r);
641: }
642: MENDFUNC(2,shra_l_ri,(RW4 r, IMM i))
643:
644: MIDFUNC(2,shra_w_ri,(RW2 r, IMM i))
645: {
646: if (!i && !needflags)
647: return;
648: CLOBBER_SHRA;
649: r=rmw(r,2,2);
650: raw_shra_w_ri(r,i);
651: unlock2(r);
652: }
653: MENDFUNC(2,shra_w_ri,(RW2 r, IMM i))
654:
655: MIDFUNC(2,shra_b_ri,(RW1 r, IMM i))
656: {
657: if (!i && !needflags)
658: return;
659: CLOBBER_SHRA;
660: r=rmw(r,1,1);
661: raw_shra_b_ri(r,i);
662: unlock2(r);
663: }
664: MENDFUNC(2,shra_b_ri,(RW1 r, IMM i))
665:
666: MIDFUNC(2,shra_l_rr,(RW4 d, RR1 r))
667: {
668: if (isconst(r)) {
669: COMPCALL(shra_l_ri)(d,(uae_u8)live.state[r].val);
670: return;
671: }
672: CLOBBER_SHRA;
673: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
674: d=rmw(d,4,4);
675: Dif (r!=1) {
676: jit_abort("Illegal register %d in raw_rol_b",r);
677: }
678: raw_shra_l_rr(d,r) ;
679: unlock2(r);
680: unlock2(d);
681: }
682: MENDFUNC(2,shra_l_rr,(RW4 d, RR1 r))
683:
684: MIDFUNC(2,shra_w_rr,(RW2 d, RR1 r))
685: { /* Can only do this with r==1, i.e. cl */
686:
687: if (isconst(r)) {
688: COMPCALL(shra_w_ri)(d,(uae_u8)live.state[r].val);
689: return;
690: }
691: CLOBBER_SHRA;
692: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
693: d=rmw(d,2,2);
694: Dif (r!=1) {
695: jit_abort("Illegal register %d in raw_shra_b",r);
696: }
697: raw_shra_w_rr(d,r) ;
698: unlock2(r);
699: unlock2(d);
700: }
701: MENDFUNC(2,shra_w_rr,(RW2 d, RR1 r))
702:
703: MIDFUNC(2,shra_b_rr,(RW1 d, RR1 r))
704: { /* Can only do this with r==1, i.e. cl */
705:
706: if (isconst(r)) {
707: COMPCALL(shra_b_ri)(d,(uae_u8)live.state[r].val);
708: return;
709: }
710:
711: CLOBBER_SHRA;
712: r=readreg_specific(r,1,SHIFTCOUNT_NREG);
713: d=rmw(d,1,1);
714: Dif (r!=1) {
715: jit_abort("Illegal register %d in raw_shra_b",r);
716: }
717: raw_shra_b_rr(d,r) ;
718: unlock2(r);
719: unlock2(d);
720: }
721: MENDFUNC(2,shra_b_rr,(RW1 d, RR1 r))
722:
723:
724: MIDFUNC(2,setcc,(W1 d, IMM cc))
725: {
726: CLOBBER_SETCC;
727: d=writereg(d,1);
728: raw_setcc(d,cc);
729: unlock2(d);
730: }
731: MENDFUNC(2,setcc,(W1 d, IMM cc))
732:
733: MIDFUNC(2,setcc_m,(IMM d, IMM cc))
734: {
735: CLOBBER_SETCC;
736: raw_setcc_m(d,cc);
737: }
738: MENDFUNC(2,setcc_m,(IMM d, IMM cc))
739:
740: MIDFUNC(3,cmov_l_rr,(RW4 d, RR4 s, IMM cc))
741: {
742: if (d==s)
743: return;
744: CLOBBER_CMOV;
745: s=readreg(s,4);
746: d=rmw(d,4,4);
747: raw_cmov_l_rr(d,s,cc);
748: unlock2(s);
749: unlock2(d);
750: }
751: MENDFUNC(3,cmov_l_rr,(RW4 d, RR4 s, IMM cc))
752:
753: MIDFUNC(3,cmov_l_rm,(RW4 d, IMM s, IMM cc))
754: {
755: CLOBBER_CMOV;
756: d=rmw(d,4,4);
757: raw_cmov_l_rm(d,s,cc);
758: unlock2(d);
759: }
760: MENDFUNC(3,cmov_l_rm,(RW4 d, IMM s, IMM cc))
761:
762: #ifdef UAE
763: /* FIXME: UAE version looks correct */
764: MIDFUNC(2,bsf_l_rr,(W4 d, RR4 s))
765: #else
766: MIDFUNC(2,bsf_l_rr,(W4 d, W4 s))
767: #endif
768: {
769: CLOBBER_BSF;
770: s=readreg(s,4);
771: d=writereg(d,4);
772: raw_bsf_l_rr(d,s);
773: unlock2(s);
774: unlock2(d);
775: }
776: #ifdef UAE
777: /* FIXME: UAE version looks correct */
778: MENDFUNC(2,bsf_l_rr,(W4 d, RR4 s))
779: #else
780: MENDFUNC(2,bsf_l_rr,(W4 d, W4 s))
781: #endif
782:
783: /* Set the Z flag depending on the value in s. Note that the
784: value has to be 0 or -1 (or, more precisely, for non-zero
785: values, bit 14 must be set)! */
786: MIDFUNC(2,simulate_bsf,(W4 tmp, RW4 s))
787: {
788: CLOBBER_BSF;
789: s=rmw_specific(s,4,4,FLAG_NREG3);
790: tmp=writereg(tmp,4);
791: raw_flags_set_zero(s, tmp);
792: unlock2(tmp);
793: unlock2(s);
794: }
795: MENDFUNC(2,simulate_bsf,(W4 tmp, RW4 s))
796:
797: MIDFUNC(2,imul_32_32,(RW4 d, RR4 s))
798: {
799: CLOBBER_MUL;
800: s=readreg(s,4);
801: d=rmw(d,4,4);
802: raw_imul_32_32(d,s);
803: unlock2(s);
804: unlock2(d);
805: }
806: MENDFUNC(2,imul_32_32,(RW4 d, RR4 s))
807:
808: MIDFUNC(2,imul_64_32,(RW4 d, RW4 s))
809: {
810: CLOBBER_MUL;
811: s=rmw_specific(s,4,4,MUL_NREG2);
812: d=rmw_specific(d,4,4,MUL_NREG1);
813: raw_imul_64_32(d,s);
814: unlock2(s);
815: unlock2(d);
816: }
817: MENDFUNC(2,imul_64_32,(RW4 d, RW4 s))
818:
819: MIDFUNC(2,mul_64_32,(RW4 d, RW4 s))
820: {
821: CLOBBER_MUL;
822: s=rmw_specific(s,4,4,MUL_NREG2);
823: d=rmw_specific(d,4,4,MUL_NREG1);
824: raw_mul_64_32(d,s);
825: unlock2(s);
826: unlock2(d);
827: }
828: MENDFUNC(2,mul_64_32,(RW4 d, RW4 s))
829:
830: MIDFUNC(2,mul_32_32,(RW4 d, RR4 s))
831: {
832: CLOBBER_MUL;
833: s=readreg(s,4);
834: d=rmw(d,4,4);
835: raw_mul_32_32(d,s);
836: unlock2(s);
837: unlock2(d);
838: }
839: MENDFUNC(2,mul_32_32,(RW4 d, RR4 s))
840:
841: #if SIZEOF_VOID_P == 8
842: MIDFUNC(2,sign_extend_32_rr,(W4 d, RR2 s))
843: {
844: int isrmw;
845:
846: if (isconst(s)) {
847: set_const(d,(uae_s32)live.state[s].val);
848: return;
849: }
850:
851: CLOBBER_SE32;
852: isrmw=(s==d);
853: if (!isrmw) {
854: s=readreg(s,4);
855: d=writereg(d,4);
856: }
857: else { /* If we try to lock this twice, with different sizes, we
858: are int trouble! */
859: s=d=rmw(s,4,4);
860: }
861: raw_sign_extend_32_rr(d,s);
862: if (!isrmw) {
863: unlock2(d);
864: unlock2(s);
865: }
866: else {
867: unlock2(s);
868: }
869: }
870: MENDFUNC(2,sign_extend_32_rr,(W4 d, RR2 s))
871: #endif
872:
873: MIDFUNC(2,sign_extend_16_rr,(W4 d, RR2 s))
874: {
875: int isrmw;
876:
877: if (isconst(s)) {
878: set_const(d,(uae_s32)(uae_s16)live.state[s].val);
879: return;
880: }
881:
882: CLOBBER_SE16;
883: isrmw=(s==d);
884: if (!isrmw) {
885: s=readreg(s,2);
886: d=writereg(d,4);
887: }
888: else { /* If we try to lock this twice, with different sizes, we
889: are int trouble! */
890: s=d=rmw(s,4,2);
891: }
892: raw_sign_extend_16_rr(d,s);
893: if (!isrmw) {
894: unlock2(d);
895: unlock2(s);
896: }
897: else {
898: unlock2(s);
899: }
900: }
901: MENDFUNC(2,sign_extend_16_rr,(W4 d, RR2 s))
902:
903: MIDFUNC(2,sign_extend_8_rr,(W4 d, RR1 s))
904: {
905: int isrmw;
906:
907: if (isconst(s)) {
908: set_const(d,(uae_s32)(uae_s8)live.state[s].val);
909: return;
910: }
911:
912: isrmw=(s==d);
913: CLOBBER_SE8;
914: if (!isrmw) {
915: s=readreg(s,1);
916: d=writereg(d,4);
917: }
918: else { /* If we try to lock this twice, with different sizes, we
919: are int trouble! */
920: s=d=rmw(s,4,1);
921: }
922:
923: raw_sign_extend_8_rr(d,s);
924:
925: if (!isrmw) {
926: unlock2(d);
927: unlock2(s);
928: }
929: else {
930: unlock2(s);
931: }
932: }
933: MENDFUNC(2,sign_extend_8_rr,(W4 d, RR1 s))
934:
935:
936: MIDFUNC(2,zero_extend_16_rr,(W4 d, RR2 s))
937: {
938: int isrmw;
939:
940: if (isconst(s)) {
941: set_const(d,(uae_u32)(uae_u16)live.state[s].val);
942: return;
943: }
944:
945: isrmw=(s==d);
946: CLOBBER_ZE16;
947: if (!isrmw) {
948: s=readreg(s,2);
949: d=writereg(d,4);
950: }
951: else { /* If we try to lock this twice, with different sizes, we
952: are int trouble! */
953: s=d=rmw(s,4,2);
954: }
955: raw_zero_extend_16_rr(d,s);
956: if (!isrmw) {
957: unlock2(d);
958: unlock2(s);
959: }
960: else {
961: unlock2(s);
962: }
963: }
964: MENDFUNC(2,zero_extend_16_rr,(W4 d, RR2 s))
965:
966: MIDFUNC(2,zero_extend_8_rr,(W4 d, RR1 s))
967: {
968: int isrmw;
969: if (isconst(s)) {
970: set_const(d,(uae_u32)(uae_u8)live.state[s].val);
971: return;
972: }
973:
974: isrmw=(s==d);
975: CLOBBER_ZE8;
976: if (!isrmw) {
977: s=readreg(s,1);
978: d=writereg(d,4);
979: }
980: else { /* If we try to lock this twice, with different sizes, we
981: are int trouble! */
982: s=d=rmw(s,4,1);
983: }
984:
985: raw_zero_extend_8_rr(d,s);
986:
987: if (!isrmw) {
988: unlock2(d);
989: unlock2(s);
990: }
991: else {
992: unlock2(s);
993: }
994: }
995: MENDFUNC(2,zero_extend_8_rr,(W4 d, RR1 s))
996:
997: MIDFUNC(2,mov_b_rr,(W1 d, RR1 s))
998: {
999: if (d==s)
1000: return;
1001: if (isconst(s)) {
1002: COMPCALL(mov_b_ri)(d,(uae_u8)live.state[s].val);
1003: return;
1004: }
1005:
1006: CLOBBER_MOV;
1007: s=readreg(s,1);
1008: d=writereg(d,1);
1009: raw_mov_b_rr(d,s);
1010: unlock2(d);
1011: unlock2(s);
1012: }
1013: MENDFUNC(2,mov_b_rr,(W1 d, RR1 s))
1014:
1015: MIDFUNC(2,mov_w_rr,(W2 d, RR2 s))
1016: {
1017: if (d==s)
1018: return;
1019: if (isconst(s)) {
1020: COMPCALL(mov_w_ri)(d,(uae_u16)live.state[s].val);
1021: return;
1022: }
1023:
1024: CLOBBER_MOV;
1025: s=readreg(s,2);
1026: d=writereg(d,2);
1027: raw_mov_w_rr(d,s);
1028: unlock2(d);
1029: unlock2(s);
1030: }
1031: MENDFUNC(2,mov_w_rr,(W2 d, RR2 s))
1032:
1033: MIDFUNC(4,mov_l_rrm_indexed,(W4 d,RR4 baser, RR4 index, IMM factor))
1034: {
1035: CLOBBER_MOV;
1036: baser=readreg(baser,4);
1037: index=readreg(index,4);
1038: d=writereg(d,4);
1039:
1040: raw_mov_l_rrm_indexed(d,baser,index,factor);
1041: unlock2(d);
1042: unlock2(baser);
1043: unlock2(index);
1044: }
1045: MENDFUNC(4,mov_l_rrm_indexed,(W4 d,RR4 baser, RR4 index, IMM factor))
1046:
1047: MIDFUNC(4,mov_w_rrm_indexed,(W2 d, RR4 baser, RR4 index, IMM factor))
1048: {
1049: CLOBBER_MOV;
1050: baser=readreg(baser,4);
1051: index=readreg(index,4);
1052: d=writereg(d,2);
1053:
1054: raw_mov_w_rrm_indexed(d,baser,index,factor);
1055: unlock2(d);
1056: unlock2(baser);
1057: unlock2(index);
1058: }
1059: MENDFUNC(4,mov_w_rrm_indexed,(W2 d, RR4 baser, RR4 index, IMM factor))
1060:
1061: MIDFUNC(4,mov_b_rrm_indexed,(W1 d, RR4 baser, RR4 index, IMM factor))
1062: {
1063: CLOBBER_MOV;
1064: baser=readreg(baser,4);
1065: index=readreg(index,4);
1066: d=writereg(d,1);
1067:
1068: raw_mov_b_rrm_indexed(d,baser,index,factor);
1069:
1070: unlock2(d);
1071: unlock2(baser);
1072: unlock2(index);
1073: }
1074: MENDFUNC(4,mov_b_rrm_indexed,(W1 d, RR4 baser, RR4 index, IMM factor))
1075:
1076:
1077: MIDFUNC(4,mov_l_mrr_indexed,(RR4 baser, RR4 index, IMM factor, RR4 s))
1078: {
1079: CLOBBER_MOV;
1080: baser=readreg(baser,4);
1081: index=readreg(index,4);
1082: s=readreg(s,4);
1083:
1084: Dif (baser==s || index==s)
1085: jit_abort("mov_l_mrr_indexed");
1086:
1087:
1088: raw_mov_l_mrr_indexed(baser,index,factor,s);
1089: unlock2(s);
1090: unlock2(baser);
1091: unlock2(index);
1092: }
1093: MENDFUNC(4,mov_l_mrr_indexed,(RR4 baser, RR4 index, IMM factor, RR4 s))
1094:
1095: MIDFUNC(4,mov_w_mrr_indexed,(RR4 baser, RR4 index, IMM factor, RR2 s))
1096: {
1097: CLOBBER_MOV;
1098: baser=readreg(baser,4);
1099: index=readreg(index,4);
1100: s=readreg(s,2);
1101:
1102: raw_mov_w_mrr_indexed(baser,index,factor,s);
1103: unlock2(s);
1104: unlock2(baser);
1105: unlock2(index);
1106: }
1107: MENDFUNC(4,mov_w_mrr_indexed,(RR4 baser, RR4 index, IMM factor, RR2 s))
1108:
1109: MIDFUNC(4,mov_b_mrr_indexed,(RR4 baser, RR4 index, IMM factor, RR1 s))
1110: {
1111: CLOBBER_MOV;
1112: s=readreg(s,1);
1113: baser=readreg(baser,4);
1114: index=readreg(index,4);
1115:
1116: raw_mov_b_mrr_indexed(baser,index,factor,s);
1117: unlock2(s);
1118: unlock2(baser);
1119: unlock2(index);
1120: }
1121: MENDFUNC(4,mov_b_mrr_indexed,(RR4 baser, RR4 index, IMM factor, RR1 s))
1122:
1123:
1124: MIDFUNC(5,mov_l_bmrr_indexed,(IMM base, RR4 baser, RR4 index, IMM factor, RR4 s))
1125: {
1126: int basereg=baser;
1127: int indexreg=index;
1128:
1129: CLOBBER_MOV;
1130: s=readreg(s,4);
1131: baser=readreg_offset(baser,4);
1132: index=readreg_offset(index,4);
1133:
1134: base+=get_offset(basereg);
1135: base+=factor*get_offset(indexreg);
1136:
1137: raw_mov_l_bmrr_indexed(base,baser,index,factor,s);
1138: unlock2(s);
1139: unlock2(baser);
1140: unlock2(index);
1141: }
1142: MENDFUNC(5,mov_l_bmrr_indexed,(IMM base, RR4 baser, RR4 index, IMM factor, RR4 s))
1143:
1144: MIDFUNC(5,mov_w_bmrr_indexed,(IMM base, RR4 baser, RR4 index, IMM factor, RR2 s))
1145: {
1146: int basereg=baser;
1147: int indexreg=index;
1148:
1149: CLOBBER_MOV;
1150: s=readreg(s,2);
1151: baser=readreg_offset(baser,4);
1152: index=readreg_offset(index,4);
1153:
1154: base+=get_offset(basereg);
1155: base+=factor*get_offset(indexreg);
1156:
1157: raw_mov_w_bmrr_indexed(base,baser,index,factor,s);
1158: unlock2(s);
1159: unlock2(baser);
1160: unlock2(index);
1161: }
1162: MENDFUNC(5,mov_w_bmrr_indexed,(IMM base, RR4 baser, RR4 index, IMM factor, RR2 s))
1163:
1164: MIDFUNC(5,mov_b_bmrr_indexed,(IMM base, RR4 baser, RR4 index, IMM factor, RR1 s))
1165: {
1166: int basereg=baser;
1167: int indexreg=index;
1168:
1169: CLOBBER_MOV;
1170: s=readreg(s,1);
1171: baser=readreg_offset(baser,4);
1172: index=readreg_offset(index,4);
1173:
1174: base+=get_offset(basereg);
1175: base+=factor*get_offset(indexreg);
1176:
1177: raw_mov_b_bmrr_indexed(base,baser,index,factor,s);
1178: unlock2(s);
1179: unlock2(baser);
1180: unlock2(index);
1181: }
1182: MENDFUNC(5,mov_b_bmrr_indexed,(IMM base, RR4 baser, RR4 index, IMM factor, RR1 s))
1183:
1184:
1185:
1186: /* Read a long from base+baser+factor*index */
1187: MIDFUNC(5,mov_l_brrm_indexed,(W4 d, IMM base, RR4 baser, RR4 index, IMM factor))
1188: {
1189: int basereg=baser;
1190: int indexreg=index;
1191:
1192: CLOBBER_MOV;
1193: baser=readreg_offset(baser,4);
1194: index=readreg_offset(index,4);
1195: base+=get_offset(basereg);
1196: base+=factor*get_offset(indexreg);
1197: d=writereg(d,4);
1198: raw_mov_l_brrm_indexed(d,base,baser,index,factor);
1199: unlock2(d);
1200: unlock2(baser);
1201: unlock2(index);
1202: }
1203: MENDFUNC(5,mov_l_brrm_indexed,(W4 d, IMM base, RR4 baser, RR4 index, IMM factor))
1204:
1205:
1206: MIDFUNC(5,mov_w_brrm_indexed,(W2 d, IMM base, RR4 baser, RR4 index, IMM factor))
1207: {
1208: int basereg=baser;
1209: int indexreg=index;
1210:
1211: CLOBBER_MOV;
1212: remove_offset(d,-1);
1213: baser=readreg_offset(baser,4);
1214: index=readreg_offset(index,4);
1215: base+=get_offset(basereg);
1216: base+=factor*get_offset(indexreg);
1217: d=writereg(d,2);
1218: raw_mov_w_brrm_indexed(d,base,baser,index,factor);
1219: unlock2(d);
1220: unlock2(baser);
1221: unlock2(index);
1222: }
1223: MENDFUNC(5,mov_w_brrm_indexed,(W2 d, IMM base, RR4 baser, RR4 index, IMM factor))
1224:
1225:
1226: MIDFUNC(5,mov_b_brrm_indexed,(W1 d, IMM base, RR4 baser, RR4 index, IMM factor))
1227: {
1228: int basereg=baser;
1229: int indexreg=index;
1230:
1231: CLOBBER_MOV;
1232: remove_offset(d,-1);
1233: baser=readreg_offset(baser,4);
1234: index=readreg_offset(index,4);
1235: base+=get_offset(basereg);
1236: base+=factor*get_offset(indexreg);
1237: d=writereg(d,1);
1238: raw_mov_b_brrm_indexed(d,base,baser,index,factor);
1239: unlock2(d);
1240: unlock2(baser);
1241: unlock2(index);
1242: }
1243: MENDFUNC(5,mov_b_brrm_indexed,(W1 d, IMM base, RR4 baser, RR4 index, IMM factor))
1244:
1245: /* Read a long from base+factor*index */
1246: MIDFUNC(4,mov_l_rm_indexed,(W4 d, IMM base, RR4 index, IMM factor))
1247: {
1248: int indexreg=index;
1249:
1250: if (isconst(index)) {
1251: COMPCALL(mov_l_rm)(d,base+factor*live.state[index].val);
1252: return;
1253: }
1254:
1255: CLOBBER_MOV;
1256: index=readreg_offset(index,4);
1257: base+=get_offset(indexreg)*factor;
1258: d=writereg(d,4);
1259:
1260: raw_mov_l_rm_indexed(d,base,index,factor);
1261: unlock2(index);
1262: unlock2(d);
1263: }
1264: MENDFUNC(4,mov_l_rm_indexed,(W4 d, IMM base, RR4 index, IMM factor))
1265:
1266: /* read the long at the address contained in s+offset and store in d */
1267: MIDFUNC(3,mov_l_rR,(W4 d, RR4 s, IMM offset))
1268: {
1269: if (isconst(s)) {
1270: COMPCALL(mov_l_rm)(d,live.state[s].val+offset);
1271: return;
1272: }
1273: CLOBBER_MOV;
1274: s=readreg(s,4);
1275: d=writereg(d,4);
1276:
1277: raw_mov_l_rR(d,s,offset);
1278: unlock2(d);
1279: unlock2(s);
1280: }
1281: MENDFUNC(3,mov_l_rR,(W4 d, RR4 s, IMM offset))
1282:
1283: /* read the word at the address contained in s+offset and store in d */
1284: MIDFUNC(3,mov_w_rR,(W2 d, RR4 s, IMM offset))
1285: {
1286: if (isconst(s)) {
1287: COMPCALL(mov_w_rm)(d,live.state[s].val+offset);
1288: return;
1289: }
1290: CLOBBER_MOV;
1291: s=readreg(s,4);
1292: d=writereg(d,2);
1293:
1294: raw_mov_w_rR(d,s,offset);
1295: unlock2(d);
1296: unlock2(s);
1297: }
1298: MENDFUNC(3,mov_w_rR,(W2 d, RR4 s, IMM offset))
1299:
1300: /* read the word at the address contained in s+offset and store in d */
1301: MIDFUNC(3,mov_b_rR,(W1 d, RR4 s, IMM offset))
1302: {
1303: if (isconst(s)) {
1304: COMPCALL(mov_b_rm)(d,live.state[s].val+offset);
1305: return;
1306: }
1307: CLOBBER_MOV;
1308: s=readreg(s,4);
1309: d=writereg(d,1);
1310:
1311: raw_mov_b_rR(d,s,offset);
1312: unlock2(d);
1313: unlock2(s);
1314: }
1315: MENDFUNC(3,mov_b_rR,(W1 d, RR4 s, IMM offset))
1316:
1317: /* read the long at the address contained in s+offset and store in d */
1318: MIDFUNC(3,mov_l_brR,(W4 d, RR4 s, IMM offset))
1319: {
1320: int sreg=s;
1321: if (isconst(s)) {
1322: COMPCALL(mov_l_rm)(d,live.state[s].val+offset);
1323: return;
1324: }
1325: CLOBBER_MOV;
1326: s=readreg_offset(s,4);
1327: offset+=get_offset(sreg);
1328: d=writereg(d,4);
1329:
1330: raw_mov_l_brR(d,s,offset);
1331: unlock2(d);
1332: unlock2(s);
1333: }
1334: MENDFUNC(3,mov_l_brR,(W4 d, RR4 s, IMM offset))
1335:
1336: /* read the word at the address contained in s+offset and store in d */
1337: MIDFUNC(3,mov_w_brR,(W2 d, RR4 s, IMM offset))
1338: {
1339: int sreg=s;
1340: if (isconst(s)) {
1341: COMPCALL(mov_w_rm)(d,live.state[s].val+offset);
1342: return;
1343: }
1344: CLOBBER_MOV;
1345: remove_offset(d,-1);
1346: s=readreg_offset(s,4);
1347: offset+=get_offset(sreg);
1348: d=writereg(d,2);
1349:
1350: raw_mov_w_brR(d,s,offset);
1351: unlock2(d);
1352: unlock2(s);
1353: }
1354: MENDFUNC(3,mov_w_brR,(W2 d, RR4 s, IMM offset))
1355:
1356: /* read the word at the address contained in s+offset and store in d */
1357: MIDFUNC(3,mov_b_brR,(W1 d, RR4 s, IMM offset))
1358: {
1359: int sreg=s;
1360: if (isconst(s)) {
1361: COMPCALL(mov_b_rm)(d,live.state[s].val+offset);
1362: return;
1363: }
1364: CLOBBER_MOV;
1365: remove_offset(d,-1);
1366: s=readreg_offset(s,4);
1367: offset+=get_offset(sreg);
1368: d=writereg(d,1);
1369:
1370: raw_mov_b_brR(d,s,offset);
1371: unlock2(d);
1372: unlock2(s);
1373: }
1374: MENDFUNC(3,mov_b_brR,(W1 d, RR4 s, IMM offset))
1375:
1376: MIDFUNC(3,mov_l_Ri,(RR4 d, IMM i, IMM offset))
1377: {
1378: int dreg=d;
1379: if (isconst(d)) {
1380: COMPCALL(mov_l_mi)(live.state[d].val+offset,i);
1381: return;
1382: }
1383:
1384: CLOBBER_MOV;
1385: d=readreg_offset(d,4);
1386: offset+=get_offset(dreg);
1387: raw_mov_l_Ri(d,i,offset);
1388: unlock2(d);
1389: }
1390: MENDFUNC(3,mov_l_Ri,(RR4 d, IMM i, IMM offset))
1391:
1392: MIDFUNC(3,mov_w_Ri,(RR4 d, IMM i, IMM offset))
1393: {
1394: int dreg=d;
1395: if (isconst(d)) {
1396: COMPCALL(mov_w_mi)(live.state[d].val+offset,i);
1397: return;
1398: }
1399:
1400: CLOBBER_MOV;
1401: d=readreg_offset(d,4);
1402: offset+=get_offset(dreg);
1403: raw_mov_w_Ri(d,i,offset);
1404: unlock2(d);
1405: }
1406: MENDFUNC(3,mov_w_Ri,(RR4 d, IMM i, IMM offset))
1407:
1408: MIDFUNC(3,mov_b_Ri,(RR4 d, IMM i, IMM offset))
1409: {
1410: int dreg=d;
1411: if (isconst(d)) {
1412: COMPCALL(mov_b_mi)(live.state[d].val+offset,i);
1413: return;
1414: }
1415:
1416: CLOBBER_MOV;
1417: d=readreg_offset(d,4);
1418: offset+=get_offset(dreg);
1419: raw_mov_b_Ri(d,i,offset);
1420: unlock2(d);
1421: }
1422: MENDFUNC(3,mov_b_Ri,(RR4 d, IMM i, IMM offset))
1423:
1424: /* Warning! OFFSET is byte sized only! */
1425: MIDFUNC(3,mov_l_Rr,(RR4 d, RR4 s, IMM offset))
1426: {
1427: if (isconst(d)) {
1428: COMPCALL(mov_l_mr)(live.state[d].val+offset,s);
1429: return;
1430: }
1431: if (isconst(s)) {
1432: COMPCALL(mov_l_Ri)(d,live.state[s].val,offset);
1433: return;
1434: }
1435:
1436: CLOBBER_MOV;
1437: s=readreg(s,4);
1438: d=readreg(d,4);
1439:
1440: raw_mov_l_Rr(d,s,offset);
1441: unlock2(d);
1442: unlock2(s);
1443: }
1444: MENDFUNC(3,mov_l_Rr,(RR4 d, RR4 s, IMM offset))
1445:
1446: MIDFUNC(3,mov_w_Rr,(RR4 d, RR2 s, IMM offset))
1447: {
1448: if (isconst(d)) {
1449: COMPCALL(mov_w_mr)(live.state[d].val+offset,s);
1450: return;
1451: }
1452: if (isconst(s)) {
1453: COMPCALL(mov_w_Ri)(d,(uae_u16)live.state[s].val,offset);
1454: return;
1455: }
1456:
1457: CLOBBER_MOV;
1458: s=readreg(s,2);
1459: d=readreg(d,4);
1460: raw_mov_w_Rr(d,s,offset);
1461: unlock2(d);
1462: unlock2(s);
1463: }
1464: MENDFUNC(3,mov_w_Rr,(RR4 d, RR2 s, IMM offset))
1465:
1466: MIDFUNC(3,mov_b_Rr,(RR4 d, RR1 s, IMM offset))
1467: {
1468: if (isconst(d)) {
1469: COMPCALL(mov_b_mr)(live.state[d].val+offset,s);
1470: return;
1471: }
1472: if (isconst(s)) {
1473: COMPCALL(mov_b_Ri)(d,(uae_u8)live.state[s].val,offset);
1474: return;
1475: }
1476:
1477: CLOBBER_MOV;
1478: s=readreg(s,1);
1479: d=readreg(d,4);
1480: raw_mov_b_Rr(d,s,offset);
1481: unlock2(d);
1482: unlock2(s);
1483: }
1484: MENDFUNC(3,mov_b_Rr,(RR4 d, RR1 s, IMM offset))
1485:
1486: MIDFUNC(3,lea_l_brr,(W4 d, RR4 s, IMM offset))
1487: {
1488: if (isconst(s)) {
1489: COMPCALL(mov_l_ri)(d,live.state[s].val+offset);
1490: return;
1491: }
1492: #if USE_OFFSET
1493: if (d==s) {
1494: add_offset(d,offset);
1495: return;
1496: }
1497: #endif
1498: CLOBBER_LEA;
1499: s=readreg(s,4);
1500: d=writereg(d,4);
1501: raw_lea_l_brr(d,s,offset);
1502: unlock2(d);
1503: unlock2(s);
1504: }
1505: MENDFUNC(3,lea_l_brr,(W4 d, RR4 s, IMM offset))
1506:
1507: MIDFUNC(5,lea_l_brr_indexed,(W4 d, RR4 s, RR4 index, IMM factor, IMM offset))
1508: {
1509: if (!offset) {
1510: COMPCALL(lea_l_rr_indexed)(d,s,index,factor);
1511: return;
1512: }
1513: CLOBBER_LEA;
1514: s=readreg(s,4);
1515: index=readreg(index,4);
1516: d=writereg(d,4);
1517:
1518: raw_lea_l_brr_indexed(d,s,index,factor,offset);
1519: unlock2(d);
1520: unlock2(index);
1521: unlock2(s);
1522: }
1523: MENDFUNC(5,lea_l_brr_indexed,(W4 d, RR4 s, RR4 index, IMM factor, IMM offset))
1524:
1525: MIDFUNC(4,lea_l_rr_indexed,(W4 d, RR4 s, RR4 index, IMM factor))
1526: {
1527: CLOBBER_LEA;
1528: s=readreg(s,4);
1529: index=readreg(index,4);
1530: d=writereg(d,4);
1531:
1532: raw_lea_l_rr_indexed(d,s,index,factor);
1533: unlock2(d);
1534: unlock2(index);
1535: unlock2(s);
1536: }
1537: MENDFUNC(4,lea_l_rr_indexed,(W4 d, RR4 s, RR4 index, IMM factor))
1538:
1539: /* write d to the long at the address contained in s+offset */
1540: MIDFUNC(3,mov_l_bRr,(RR4 d, RR4 s, IMM offset))
1541: {
1542: int dreg=d;
1543: if (isconst(d)) {
1544: COMPCALL(mov_l_mr)(live.state[d].val+offset,s);
1545: return;
1546: }
1547:
1548: CLOBBER_MOV;
1549: s=readreg(s,4);
1550: d=readreg_offset(d,4);
1551: offset+=get_offset(dreg);
1552:
1553: raw_mov_l_bRr(d,s,offset);
1554: unlock2(d);
1555: unlock2(s);
1556: }
1557: MENDFUNC(3,mov_l_bRr,(RR4 d, RR4 s, IMM offset))
1558:
1559: /* write the word at the address contained in s+offset and store in d */
1560: MIDFUNC(3,mov_w_bRr,(RR4 d, RR2 s, IMM offset))
1561: {
1562: int dreg=d;
1563:
1564: if (isconst(d)) {
1565: COMPCALL(mov_w_mr)(live.state[d].val+offset,s);
1566: return;
1567: }
1568:
1569: CLOBBER_MOV;
1570: s=readreg(s,2);
1571: d=readreg_offset(d,4);
1572: offset+=get_offset(dreg);
1573: raw_mov_w_bRr(d,s,offset);
1574: unlock2(d);
1575: unlock2(s);
1576: }
1577: MENDFUNC(3,mov_w_bRr,(RR4 d, RR2 s, IMM offset))
1578:
1579: MIDFUNC(3,mov_b_bRr,(RR4 d, RR1 s, IMM offset))
1580: {
1581: int dreg=d;
1582: if (isconst(d)) {
1583: COMPCALL(mov_b_mr)(live.state[d].val+offset,s);
1584: return;
1585: }
1586:
1587: CLOBBER_MOV;
1588: s=readreg(s,1);
1589: d=readreg_offset(d,4);
1590: offset+=get_offset(dreg);
1591: raw_mov_b_bRr(d,s,offset);
1592: unlock2(d);
1593: unlock2(s);
1594: }
1595: MENDFUNC(3,mov_b_bRr,(RR4 d, RR1 s, IMM offset))
1596:
1597: MIDFUNC(1,mid_bswap_32,(RW4 r))
1598: {
1599:
1600: if (isconst(r)) {
1601: uae_u32 oldv=live.state[r].val;
1602: live.state[r].val=reverse32(oldv);
1603: return;
1604: }
1605:
1606: CLOBBER_SW32;
1607: r=rmw(r,4,4);
1608: raw_bswap_32(r);
1609: unlock2(r);
1610: }
1611: MENDFUNC(1,mid_bswap_32,(RW4 r))
1612:
1613: MIDFUNC(1,mid_bswap_16,(RW2 r))
1614: {
1615: if (isconst(r)) {
1616: uae_u32 oldv=live.state[r].val;
1617: live.state[r].val=((oldv>>8)&0xff) | ((oldv<<8)&0xff00) |
1618: (oldv&0xffff0000);
1619: return;
1620: }
1621:
1622: CLOBBER_SW16;
1623: r=rmw(r,2,2);
1624:
1625: raw_bswap_16(r);
1626: unlock2(r);
1627: }
1628: MENDFUNC(1,mid_bswap_16,(RW2 r))
1629:
1630:
1631:
1632: MIDFUNC(2,mov_l_rr,(W4 d, RR4 s))
1633: {
1634: int olds;
1635:
1636: if (d==s) { /* How pointless! */
1637: return;
1638: }
1639: if (isconst(s)) {
1640: COMPCALL(mov_l_ri)(d,live.state[s].val);
1641: return;
1642: }
1643: olds=s;
1644: disassociate(d);
1645: s=readreg_offset(s,4);
1646: live.state[d].realreg=s;
1647: live.state[d].realind=live.nat[s].nholds;
1648: live.state[d].val=live.state[olds].val;
1649: live.state[d].validsize=4;
1650: live.state[d].dirtysize=4;
1651: set_status(d,DIRTY);
1652:
1653: live.nat[s].holds[live.nat[s].nholds]=d;
1654: live.nat[s].nholds++;
1655: log_clobberreg(d);
1656: jit_log2("Added %d to nreg %d(%d), now holds %d regs", d,s,live.state[d].realind,live.nat[s].nholds);
1657: unlock2(s);
1658: }
1659: MENDFUNC(2,mov_l_rr,(W4 d, RR4 s))
1660:
1661: MIDFUNC(2,mov_l_mr,(IMM d, RR4 s))
1662: {
1663: if (isconst(s)) {
1664: COMPCALL(mov_l_mi)(d,live.state[s].val);
1665: return;
1666: }
1667: CLOBBER_MOV;
1668: s=readreg(s,4);
1669:
1670: raw_mov_l_mr(d,s);
1671: unlock2(s);
1672: }
1673: MENDFUNC(2,mov_l_mr,(IMM d, RR4 s))
1674:
1675:
1676: MIDFUNC(2,mov_w_mr,(IMM d, RR2 s))
1677: {
1678: if (isconst(s)) {
1679: COMPCALL(mov_w_mi)(d,(uae_u16)live.state[s].val);
1680: return;
1681: }
1682: CLOBBER_MOV;
1683: s=readreg(s,2);
1684:
1685: raw_mov_w_mr(d,s);
1686: unlock2(s);
1687: }
1688: MENDFUNC(2,mov_w_mr,(IMM d, RR2 s))
1689:
1690: MIDFUNC(2,mov_w_rm,(W2 d, IMM s))
1691: {
1692: CLOBBER_MOV;
1693: d=writereg(d,2);
1694:
1695: raw_mov_w_rm(d,s);
1696: unlock2(d);
1697: }
1698: MENDFUNC(2,mov_w_rm,(W2 d, IMM s))
1699:
1700: MIDFUNC(2,mov_b_mr,(IMM d, RR1 s))
1701: {
1702: if (isconst(s)) {
1703: COMPCALL(mov_b_mi)(d,(uae_u8)live.state[s].val);
1704: return;
1705: }
1706:
1707: CLOBBER_MOV;
1708: s=readreg(s,1);
1709:
1710: raw_mov_b_mr(d,s);
1711: unlock2(s);
1712: }
1713: MENDFUNC(2,mov_b_mr,(IMM d, RR1 s))
1714:
1715: MIDFUNC(2,mov_b_rm,(W1 d, IMM s))
1716: {
1717: CLOBBER_MOV;
1718: d=writereg(d,1);
1719:
1720: raw_mov_b_rm(d,s);
1721: unlock2(d);
1722: }
1723: MENDFUNC(2,mov_b_rm,(W1 d, IMM s))
1724:
1725: MIDFUNC(2,mov_l_ri,(W4 d, IMM s))
1726: {
1727: set_const(d,s);
1728: return;
1729: }
1730: MENDFUNC(2,mov_l_ri,(W4 d, IMM s))
1731:
1732: MIDFUNC(2,mov_w_ri,(W2 d, IMM s))
1733: {
1734: CLOBBER_MOV;
1735: d=writereg(d,2);
1736:
1737: raw_mov_w_ri(d,s);
1738: unlock2(d);
1739: }
1740: MENDFUNC(2,mov_w_ri,(W2 d, IMM s))
1741:
1742: MIDFUNC(2,mov_b_ri,(W1 d, IMM s))
1743: {
1744: CLOBBER_MOV;
1745: d=writereg(d,1);
1746:
1747: raw_mov_b_ri(d,s);
1748: unlock2(d);
1749: }
1750: MENDFUNC(2,mov_b_ri,(W1 d, IMM s))
1751:
1752: MIDFUNC(2,add_l_mi,(IMM d, IMM s))
1753: {
1754: CLOBBER_ADD;
1755: raw_add_l_mi(d,s) ;
1756: }
1757: MENDFUNC(2,add_l_mi,(IMM d, IMM s))
1758:
1759: MIDFUNC(2,add_w_mi,(IMM d, IMM s))
1760: {
1761: CLOBBER_ADD;
1762: raw_add_w_mi(d,s) ;
1763: }
1764: MENDFUNC(2,add_w_mi,(IMM d, IMM s))
1765:
1766: MIDFUNC(2,add_b_mi,(IMM d, IMM s))
1767: {
1768: CLOBBER_ADD;
1769: raw_add_b_mi(d,s) ;
1770: }
1771: MENDFUNC(2,add_b_mi,(IMM d, IMM s))
1772:
1773: MIDFUNC(2,test_l_ri,(RR4 d, IMM i))
1774: {
1775: CLOBBER_TEST;
1776: d=readreg(d,4);
1777:
1778: raw_test_l_ri(d,i);
1779: unlock2(d);
1780: }
1781: MENDFUNC(2,test_l_ri,(RR4 d, IMM i))
1782:
1783: MIDFUNC(2,test_l_rr,(RR4 d, RR4 s))
1784: {
1785: CLOBBER_TEST;
1786: d=readreg(d,4);
1787: s=readreg(s,4);
1788:
1789: raw_test_l_rr(d,s);;
1790: unlock2(d);
1791: unlock2(s);
1792: }
1793: MENDFUNC(2,test_l_rr,(RR4 d, RR4 s))
1794:
1795: MIDFUNC(2,test_w_rr,(RR2 d, RR2 s))
1796: {
1797: CLOBBER_TEST;
1798: d=readreg(d,2);
1799: s=readreg(s,2);
1800:
1801: raw_test_w_rr(d,s);
1802: unlock2(d);
1803: unlock2(s);
1804: }
1805: MENDFUNC(2,test_w_rr,(RR2 d, RR2 s))
1806:
1807: MIDFUNC(2,test_b_rr,(RR1 d, RR1 s))
1808: {
1809: CLOBBER_TEST;
1810: d=readreg(d,1);
1811: s=readreg(s,1);
1812:
1813: raw_test_b_rr(d,s);
1814: unlock2(d);
1815: unlock2(s);
1816: }
1817: MENDFUNC(2,test_b_rr,(RR1 d, RR1 s))
1818:
1819:
1820: MIDFUNC(2,and_l_ri,(RW4 d, IMM i))
1821: {
1822: if (isconst (d) && ! needflags) {
1823: live.state[d].val &= i;
1824: return;
1825: }
1826:
1827: CLOBBER_AND;
1828: d=rmw(d,4,4);
1829:
1830: raw_and_l_ri(d,i);
1831: unlock2(d);
1832: }
1833: MENDFUNC(2,and_l_ri,(RW4 d, IMM i))
1834:
1835: MIDFUNC(2,and_l,(RW4 d, RR4 s))
1836: {
1837: CLOBBER_AND;
1838: s=readreg(s,4);
1839: d=rmw(d,4,4);
1840:
1841: raw_and_l(d,s);
1842: unlock2(d);
1843: unlock2(s);
1844: }
1845: MENDFUNC(2,and_l,(RW4 d, RR4 s))
1846:
1847: MIDFUNC(2,and_w,(RW2 d, RR2 s))
1848: {
1849: CLOBBER_AND;
1850: s=readreg(s,2);
1851: d=rmw(d,2,2);
1852:
1853: raw_and_w(d,s);
1854: unlock2(d);
1855: unlock2(s);
1856: }
1857: MENDFUNC(2,and_w,(RW2 d, RR2 s))
1858:
1859: MIDFUNC(2,and_b,(RW1 d, RR1 s))
1860: {
1861: CLOBBER_AND;
1862: s=readreg(s,1);
1863: d=rmw(d,1,1);
1864:
1865: raw_and_b(d,s);
1866: unlock2(d);
1867: unlock2(s);
1868: }
1869: MENDFUNC(2,and_b,(RW1 d, RR1 s))
1870:
1871: // gb-- used for making an fpcr value in compemu_fpp.cpp
1872: MIDFUNC(2,or_l_rm,(RW4 d, IMM s))
1873: {
1874: CLOBBER_OR;
1875: d=rmw(d,4,4);
1876:
1877: raw_or_l_rm(d,s);
1878: unlock2(d);
1879: }
1880: MENDFUNC(2,or_l_rm,(RW4 d, IMM s))
1881:
1882: MIDFUNC(2,or_l_ri,(RW4 d, IMM i))
1883: {
1884: if (isconst(d) && !needflags) {
1885: live.state[d].val|=i;
1886: return;
1887: }
1888: CLOBBER_OR;
1889: d=rmw(d,4,4);
1890:
1891: raw_or_l_ri(d,i);
1892: unlock2(d);
1893: }
1894: MENDFUNC(2,or_l_ri,(RW4 d, IMM i))
1895:
1896: MIDFUNC(2,or_l,(RW4 d, RR4 s))
1897: {
1898: if (isconst(d) && isconst(s) && !needflags) {
1899: live.state[d].val|=live.state[s].val;
1900: return;
1901: }
1902: CLOBBER_OR;
1903: s=readreg(s,4);
1904: d=rmw(d,4,4);
1905:
1906: raw_or_l(d,s);
1907: unlock2(d);
1908: unlock2(s);
1909: }
1910: MENDFUNC(2,or_l,(RW4 d, RR4 s))
1911:
1912: MIDFUNC(2,or_w,(RW2 d, RR2 s))
1913: {
1914: CLOBBER_OR;
1915: s=readreg(s,2);
1916: d=rmw(d,2,2);
1917:
1918: raw_or_w(d,s);
1919: unlock2(d);
1920: unlock2(s);
1921: }
1922: MENDFUNC(2,or_w,(RW2 d, RR2 s))
1923:
1924: MIDFUNC(2,or_b,(RW1 d, RR1 s))
1925: {
1926: CLOBBER_OR;
1927: s=readreg(s,1);
1928: d=rmw(d,1,1);
1929:
1930: raw_or_b(d,s);
1931: unlock2(d);
1932: unlock2(s);
1933: }
1934: MENDFUNC(2,or_b,(RW1 d, RR1 s))
1935:
1936: MIDFUNC(2,adc_l,(RW4 d, RR4 s))
1937: {
1938: CLOBBER_ADC;
1939: s=readreg(s,4);
1940: d=rmw(d,4,4);
1941:
1942: raw_adc_l(d,s);
1943:
1944: unlock2(d);
1945: unlock2(s);
1946: }
1947: MENDFUNC(2,adc_l,(RW4 d, RR4 s))
1948:
1949: MIDFUNC(2,adc_w,(RW2 d, RR2 s))
1950: {
1951: CLOBBER_ADC;
1952: s=readreg(s,2);
1953: d=rmw(d,2,2);
1954:
1955: raw_adc_w(d,s);
1956: unlock2(d);
1957: unlock2(s);
1958: }
1959: MENDFUNC(2,adc_w,(RW2 d, RR2 s))
1960:
1961: MIDFUNC(2,adc_b,(RW1 d, RR1 s))
1962: {
1963: CLOBBER_ADC;
1964: s=readreg(s,1);
1965: d=rmw(d,1,1);
1966:
1967: raw_adc_b(d,s);
1968: unlock2(d);
1969: unlock2(s);
1970: }
1971: MENDFUNC(2,adc_b,(RW1 d, RR1 s))
1972:
1973: MIDFUNC(2,add_l,(RW4 d, RR4 s))
1974: {
1975: if (isconst(s)) {
1976: COMPCALL(add_l_ri)(d,live.state[s].val);
1977: return;
1978: }
1979:
1980: CLOBBER_ADD;
1981: s=readreg(s,4);
1982: d=rmw(d,4,4);
1983:
1984: raw_add_l(d,s);
1985:
1986: unlock2(d);
1987: unlock2(s);
1988: }
1989: MENDFUNC(2,add_l,(RW4 d, RR4 s))
1990:
1991: MIDFUNC(2,add_w,(RW2 d, RR2 s))
1992: {
1993: if (isconst(s)) {
1994: COMPCALL(add_w_ri)(d,(uae_u16)live.state[s].val);
1995: return;
1996: }
1997:
1998: CLOBBER_ADD;
1999: s=readreg(s,2);
2000: d=rmw(d,2,2);
2001:
2002: raw_add_w(d,s);
2003: unlock2(d);
2004: unlock2(s);
2005: }
2006: MENDFUNC(2,add_w,(RW2 d, RR2 s))
2007:
2008: MIDFUNC(2,add_b,(RW1 d, RR1 s))
2009: {
2010: if (isconst(s)) {
2011: COMPCALL(add_b_ri)(d,(uae_u8)live.state[s].val);
2012: return;
2013: }
2014:
2015: CLOBBER_ADD;
2016: s=readreg(s,1);
2017: d=rmw(d,1,1);
2018:
2019: raw_add_b(d,s);
2020: unlock2(d);
2021: unlock2(s);
2022: }
2023: MENDFUNC(2,add_b,(RW1 d, RR1 s))
2024:
2025: MIDFUNC(2,sub_l_ri,(RW4 d, IMM i))
2026: {
2027: if (!i && !needflags)
2028: return;
2029: if (isconst(d) && !needflags) {
2030: live.state[d].val-=i;
2031: return;
2032: }
2033: #if USE_OFFSET
2034: if (!needflags) {
2035: add_offset(d,-i);
2036: return;
2037: }
2038: #endif
2039:
2040: CLOBBER_SUB;
2041: d=rmw(d,4,4);
2042:
2043: raw_sub_l_ri(d,i);
2044: unlock2(d);
2045: }
2046: MENDFUNC(2,sub_l_ri,(RW4 d, IMM i))
2047:
2048: MIDFUNC(2,sub_w_ri,(RW2 d, IMM i))
2049: {
2050: if (!i && !needflags)
2051: return;
2052:
2053: CLOBBER_SUB;
2054: d=rmw(d,2,2);
2055:
2056: raw_sub_w_ri(d,i);
2057: unlock2(d);
2058: }
2059: MENDFUNC(2,sub_w_ri,(RW2 d, IMM i))
2060:
2061: MIDFUNC(2,sub_b_ri,(RW1 d, IMM i))
2062: {
2063: if (!i && !needflags)
2064: return;
2065:
2066: CLOBBER_SUB;
2067: d=rmw(d,1,1);
2068:
2069: raw_sub_b_ri(d,i);
2070:
2071: unlock2(d);
2072: }
2073: MENDFUNC(2,sub_b_ri,(RW1 d, IMM i))
2074:
2075: MIDFUNC(2,add_l_ri,(RW4 d, IMM i))
2076: {
2077: if (!i && !needflags)
2078: return;
2079: if (isconst(d) && !needflags) {
2080: live.state[d].val+=i;
2081: return;
2082: }
2083: #if USE_OFFSET
2084: if (!needflags) {
2085: add_offset(d,i);
2086: return;
2087: }
2088: #endif
2089: CLOBBER_ADD;
2090: d=rmw(d,4,4);
2091: raw_add_l_ri(d,i);
2092: unlock2(d);
2093: }
2094: MENDFUNC(2,add_l_ri,(RW4 d, IMM i))
2095:
2096: MIDFUNC(2,add_w_ri,(RW2 d, IMM i))
2097: {
2098: if (!i && !needflags)
2099: return;
2100:
2101: CLOBBER_ADD;
2102: d=rmw(d,2,2);
2103:
2104: raw_add_w_ri(d,i);
2105: unlock2(d);
2106: }
2107: MENDFUNC(2,add_w_ri,(RW2 d, IMM i))
2108:
2109: MIDFUNC(2,add_b_ri,(RW1 d, IMM i))
2110: {
2111: if (!i && !needflags)
2112: return;
2113:
2114: CLOBBER_ADD;
2115: d=rmw(d,1,1);
2116:
2117: raw_add_b_ri(d,i);
2118:
2119: unlock2(d);
2120: }
2121: MENDFUNC(2,add_b_ri,(RW1 d, IMM i))
2122:
2123: MIDFUNC(2,sbb_l,(RW4 d, RR4 s))
2124: {
2125: CLOBBER_SBB;
2126: s=readreg(s,4);
2127: d=rmw(d,4,4);
2128:
2129: raw_sbb_l(d,s);
2130: unlock2(d);
2131: unlock2(s);
2132: }
2133: MENDFUNC(2,sbb_l,(RW4 d, RR4 s))
2134:
2135: MIDFUNC(2,sbb_w,(RW2 d, RR2 s))
2136: {
2137: CLOBBER_SBB;
2138: s=readreg(s,2);
2139: d=rmw(d,2,2);
2140:
2141: raw_sbb_w(d,s);
2142: unlock2(d);
2143: unlock2(s);
2144: }
2145: MENDFUNC(2,sbb_w,(RW2 d, RR2 s))
2146:
2147: MIDFUNC(2,sbb_b,(RW1 d, RR1 s))
2148: {
2149: CLOBBER_SBB;
2150: s=readreg(s,1);
2151: d=rmw(d,1,1);
2152:
2153: raw_sbb_b(d,s);
2154: unlock2(d);
2155: unlock2(s);
2156: }
2157: MENDFUNC(2,sbb_b,(RW1 d, RR1 s))
2158:
2159: MIDFUNC(2,sub_l,(RW4 d, RR4 s))
2160: {
2161: if (isconst(s)) {
2162: COMPCALL(sub_l_ri)(d,live.state[s].val);
2163: return;
2164: }
2165:
2166: CLOBBER_SUB;
2167: s=readreg(s,4);
2168: d=rmw(d,4,4);
2169:
2170: raw_sub_l(d,s);
2171: unlock2(d);
2172: unlock2(s);
2173: }
2174: MENDFUNC(2,sub_l,(RW4 d, RR4 s))
2175:
2176: MIDFUNC(2,sub_w,(RW2 d, RR2 s))
2177: {
2178: if (isconst(s)) {
2179: COMPCALL(sub_w_ri)(d,(uae_u16)live.state[s].val);
2180: return;
2181: }
2182:
2183: CLOBBER_SUB;
2184: s=readreg(s,2);
2185: d=rmw(d,2,2);
2186:
2187: raw_sub_w(d,s);
2188: unlock2(d);
2189: unlock2(s);
2190: }
2191: MENDFUNC(2,sub_w,(RW2 d, RR2 s))
2192:
2193: MIDFUNC(2,sub_b,(RW1 d, RR1 s))
2194: {
2195: if (isconst(s)) {
2196: COMPCALL(sub_b_ri)(d,(uae_u8)live.state[s].val);
2197: return;
2198: }
2199:
2200: CLOBBER_SUB;
2201: s=readreg(s,1);
2202: d=rmw(d,1,1);
2203:
2204: raw_sub_b(d,s);
2205: unlock2(d);
2206: unlock2(s);
2207: }
2208: MENDFUNC(2,sub_b,(RW1 d, RR1 s))
2209:
2210: MIDFUNC(2,cmp_l,(RR4 d, RR4 s))
2211: {
2212: CLOBBER_CMP;
2213: s=readreg(s,4);
2214: d=readreg(d,4);
2215:
2216: raw_cmp_l(d,s);
2217: unlock2(d);
2218: unlock2(s);
2219: }
2220: MENDFUNC(2,cmp_l,(RR4 d, RR4 s))
2221:
2222: MIDFUNC(2,cmp_l_ri,(RR4 r, IMM i))
2223: {
2224: CLOBBER_CMP;
2225: r=readreg(r,4);
2226:
2227: raw_cmp_l_ri(r,i);
2228: unlock2(r);
2229: }
2230: MENDFUNC(2,cmp_l_ri,(RR4 r, IMM i))
2231:
2232: MIDFUNC(2,cmp_w,(RR2 d, RR2 s))
2233: {
2234: CLOBBER_CMP;
2235: s=readreg(s,2);
2236: d=readreg(d,2);
2237:
2238: raw_cmp_w(d,s);
2239: unlock2(d);
2240: unlock2(s);
2241: }
2242: MENDFUNC(2,cmp_w,(RR2 d, RR2 s))
2243:
2244: MIDFUNC(2,cmp_b,(RR1 d, RR1 s))
2245: {
2246: CLOBBER_CMP;
2247: s=readreg(s,1);
2248: d=readreg(d,1);
2249:
2250: raw_cmp_b(d,s);
2251: unlock2(d);
2252: unlock2(s);
2253: }
2254: MENDFUNC(2,cmp_b,(RR1 d, RR1 s))
2255:
2256:
2257: MIDFUNC(2,xor_l,(RW4 d, RR4 s))
2258: {
2259: CLOBBER_XOR;
2260: s=readreg(s,4);
2261: d=rmw(d,4,4);
2262:
2263: raw_xor_l(d,s);
2264: unlock2(d);
2265: unlock2(s);
2266: }
2267: MENDFUNC(2,xor_l,(RW4 d, RR4 s))
2268:
2269: MIDFUNC(2,xor_w,(RW2 d, RR2 s))
2270: {
2271: CLOBBER_XOR;
2272: s=readreg(s,2);
2273: d=rmw(d,2,2);
2274:
2275: raw_xor_w(d,s);
2276: unlock2(d);
2277: unlock2(s);
2278: }
2279: MENDFUNC(2,xor_w,(RW2 d, RR2 s))
2280:
2281: MIDFUNC(2,xor_b,(RW1 d, RR1 s))
2282: {
2283: CLOBBER_XOR;
2284: s=readreg(s,1);
2285: d=rmw(d,1,1);
2286:
2287: raw_xor_b(d,s);
2288: unlock2(d);
2289: unlock2(s);
2290: }
2291: MENDFUNC(2,xor_b,(RW1 d, RR1 s))
2292:
2293: MIDFUNC(5,call_r_11,(W4 out1, RR4 r, RR4 in1, IMM osize, IMM isize))
2294: {
2295: clobber_flags();
2296: remove_all_offsets();
2297: if (osize==4) {
2298: if (out1!=in1 && out1!=r) {
2299: COMPCALL(forget_about)(out1);
2300: }
2301: }
2302: else {
2303: tomem_c(out1);
2304: }
2305:
2306: in1=readreg_specific(in1,isize,REG_PAR1);
2307: r=readreg(r,4);
2308: prepare_for_call_1(); /* This should ensure that there won't be
2309: any need for swapping nregs in prepare_for_call_2
2310: */
2311: #if USE_NORMAL_CALLING_CONVENTION
2312: raw_push_l_r(in1);
2313: #endif
2314: unlock2(in1);
2315: unlock2(r);
2316:
2317: prepare_for_call_2();
2318: raw_dec_sp(STACK_SHADOW_SPACE);
2319: raw_call_r(r);
2320: raw_inc_sp(STACK_SHADOW_SPACE);
2321:
2322: #if USE_NORMAL_CALLING_CONVENTION
2323: raw_inc_sp(4);
2324: #endif
2325:
2326:
2327: live.nat[REG_RESULT].holds[0]=out1;
2328: live.nat[REG_RESULT].nholds=1;
2329: live.nat[REG_RESULT].touched=touchcnt++;
2330:
2331: live.state[out1].realreg=REG_RESULT;
2332: live.state[out1].realind=0;
2333: live.state[out1].val=0;
2334: live.state[out1].validsize=osize;
2335: live.state[out1].dirtysize=osize;
2336: set_status(out1,DIRTY);
2337: }
2338: MENDFUNC(5,call_r_11,(W4 out1, RR4 r, RR4 in1, IMM osize, IMM isize))
2339:
2340: MIDFUNC(5,call_r_02,(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2))
2341: {
2342: clobber_flags();
2343: remove_all_offsets();
2344: in1=readreg_specific(in1,isize1,REG_PAR1);
2345: in2=readreg_specific(in2,isize2,REG_PAR2);
2346: r=readreg(r,4);
2347: prepare_for_call_1(); /* This should ensure that there won't be
2348: any need for swapping nregs in prepare_for_call_2
2349: */
2350: #if USE_NORMAL_CALLING_CONVENTION
2351: raw_push_l_r(in2);
2352: raw_push_l_r(in1);
2353: #endif
2354: unlock2(r);
2355: unlock2(in1);
2356: unlock2(in2);
2357: prepare_for_call_2();
2358: raw_dec_sp(STACK_SHADOW_SPACE);
2359: raw_call_r(r);
2360: raw_inc_sp(STACK_SHADOW_SPACE);
2361: #if USE_NORMAL_CALLING_CONVENTION
2362: raw_inc_sp(8);
2363: #endif
2364: }
2365: MENDFUNC(5,call_r_02,(RR4 r, RR4 in1, RR4 in2, IMM isize1, IMM isize2))
2366:
2367: /* forget_about() takes a mid-layer register */
2368: MIDFUNC(1,forget_about,(W4 r))
2369: {
2370: if (isinreg(r))
2371: disassociate(r);
2372: live.state[r].val=0;
2373: set_status(r,UNDEF);
2374: }
2375: MENDFUNC(1,forget_about,(W4 r))
2376:
2377: MIDFUNC(0,nop,(void))
2378: {
2379: raw_nop();
2380: }
2381: MENDFUNC(0,nop,(void))
2382:
2383: MIDFUNC(1,f_forget_about,(FW r))
2384: {
2385: if (f_isinreg(r))
2386: f_disassociate(r);
2387: live.fate[r].status=UNDEF;
2388: }
2389: MENDFUNC(1,f_forget_about,(FW r))
2390:
2391: MIDFUNC(1,fmov_pi,(FW r))
2392: {
2393: r=f_writereg(r);
2394: raw_fmov_pi(r);
2395: f_unlock(r);
2396: }
2397: MENDFUNC(1,fmov_pi,(FW r))
2398:
2399: MIDFUNC(1,fmov_log10_2,(FW r))
2400: {
2401: r=f_writereg(r);
2402: raw_fmov_log10_2(r);
2403: f_unlock(r);
2404: }
2405: MENDFUNC(1,fmov_log10_2,(FW r))
2406:
2407: MIDFUNC(1,fmov_log2_e,(FW r))
2408: {
2409: r=f_writereg(r);
2410: raw_fmov_log2_e(r);
2411: f_unlock(r);
2412: }
2413: MENDFUNC(1,fmov_log2_e,(FW r))
2414:
2415: MIDFUNC(1,fmov_loge_2,(FW r))
2416: {
2417: r=f_writereg(r);
2418: raw_fmov_loge_2(r);
2419: f_unlock(r);
2420: }
2421: MENDFUNC(1,fmov_loge_2,(FW r))
2422:
2423: MIDFUNC(1,fmov_1,(FW r))
2424: {
2425: r=f_writereg(r);
2426: raw_fmov_1(r);
2427: f_unlock(r);
2428: }
2429: MENDFUNC(1,fmov_1,(FW r))
2430:
2431: MIDFUNC(1,fmov_0,(FW r))
2432: {
2433: r=f_writereg(r);
2434: raw_fmov_0(r);
2435: f_unlock(r);
2436: }
2437: MENDFUNC(1,fmov_0,(FW r))
2438:
2439: MIDFUNC(2,fmov_rm,(FW r, MEMR m))
2440: {
2441: r=f_writereg(r);
2442: raw_fmov_rm(r,m);
2443: f_unlock(r);
2444: }
2445: MENDFUNC(2,fmov_rm,(FW r, MEMR m))
2446:
2447: MIDFUNC(2,fmovi_rm,(FW r, MEMR m))
2448: {
2449: r=f_writereg(r);
2450: raw_fmovi_rm(r,m);
2451: f_unlock(r);
2452: }
2453: MENDFUNC(2,fmovi_rm,(FW r, MEMR m))
2454:
2455: MIDFUNC(3,fmovi_mrb,(MEMW m, FR r, double *bounds))
2456: {
2457: r=f_readreg(r);
2458: raw_fmovi_mrb(m,r,bounds);
2459: f_unlock(r);
2460: }
2461: MENDFUNC(3,fmovi_mrb,(MEMW m, FR r, double *bounds))
2462:
2463: MIDFUNC(2,fmovs_rm,(FW r, MEMR m))
2464: {
2465: r=f_writereg(r);
2466: raw_fmovs_rm(r,m);
2467: f_unlock(r);
2468: }
2469: MENDFUNC(2,fmovs_rm,(FW r, MEMR m))
2470:
2471: MIDFUNC(2,fmovs_mr,(MEMW m, FR r))
2472: {
2473: r=f_readreg(r);
2474: raw_fmovs_mr(m,r);
2475: f_unlock(r);
2476: }
2477: MENDFUNC(2,fmovs_mr,(MEMW m, FR r))
2478:
2479: MIDFUNC(1,fcuts_r,(FRW r))
2480: {
2481: r=f_rmw(r);
2482: raw_fcuts_r(r);
2483: f_unlock(r);
2484: }
2485: MENDFUNC(1,fcuts_r,(FRW r))
2486:
2487: MIDFUNC(1,fcut_r,(FRW r))
2488: {
2489: r=f_rmw(r);
2490: raw_fcut_r(r);
2491: f_unlock(r);
2492: }
2493: MENDFUNC(1,fcut_r,(FRW r))
2494:
2495: MIDFUNC(2,fmov_ext_mr,(MEMW m, FR r))
2496: {
2497: r=f_readreg(r);
2498: raw_fmov_ext_mr(m,r);
2499: f_unlock(r);
2500: }
2501: MENDFUNC(2,fmov_ext_mr,(MEMW m, FR r))
2502:
2503: MIDFUNC(2,fmov_mr,(MEMW m, FR r))
2504: {
2505: r=f_readreg(r);
2506: raw_fmov_mr(m,r);
2507: f_unlock(r);
2508: }
2509: MENDFUNC(2,fmov_mr,(MEMW m, FR r))
2510:
2511: MIDFUNC(2,fmov_ext_rm,(FW r, MEMR m))
2512: {
2513: r=f_writereg(r);
2514: raw_fmov_ext_rm(r,m);
2515: f_unlock(r);
2516: }
2517: MENDFUNC(2,fmov_ext_rm,(FW r, MEMR m))
2518:
2519: MIDFUNC(2,fmov_rr,(FW d, FR s))
2520: {
2521: if (d==s) { /* How pointless! */
2522: return;
2523: }
2524: #if USE_F_ALIAS
2525: f_disassociate(d);
2526: s=f_readreg(s);
2527: live.fate[d].realreg=s;
2528: live.fate[d].realind=live.fat[s].nholds;
2529: live.fate[d].status=DIRTY;
2530: live.fat[s].holds[live.fat[s].nholds]=d;
2531: live.fat[s].nholds++;
2532: f_unlock(s);
2533: #else
2534: s=f_readreg(s);
2535: d=f_writereg(d);
2536: raw_fmov_rr(d,s);
2537: f_unlock(s);
2538: f_unlock(d);
2539: #endif
2540: }
2541: MENDFUNC(2,fmov_rr,(FW d, FR s))
2542:
2543: MIDFUNC(2,fldcw_m_indexed,(RR4 index, IMM base))
2544: {
2545: index=readreg(index,4);
2546:
2547: raw_fldcw_m_indexed(index,base);
2548: unlock2(index);
2549: }
2550: MENDFUNC(2,fldcw_m_indexed,(RR4 index, IMM base))
2551:
2552: MIDFUNC(1,ftst_r,(FR r))
2553: {
2554: r=f_readreg(r);
2555: raw_ftst_r(r);
2556: f_unlock(r);
2557: }
2558: MENDFUNC(1,ftst_r,(FR r))
2559:
2560: MIDFUNC(0,dont_care_fflags,(void))
2561: {
2562: f_disassociate(FP_RESULT);
2563: }
2564: MENDFUNC(0,dont_care_fflags,(void))
2565:
2566: MIDFUNC(2,fsqrt_rr,(FW d, FR s))
2567: {
2568: s=f_readreg(s);
2569: d=f_writereg(d);
2570: raw_fsqrt_rr(d,s);
2571: f_unlock(s);
2572: f_unlock(d);
2573: }
2574: MENDFUNC(2,fsqrt_rr,(FW d, FR s))
2575:
2576: MIDFUNC(2,fabs_rr,(FW d, FR s))
2577: {
2578: s=f_readreg(s);
2579: d=f_writereg(d);
2580: raw_fabs_rr(d,s);
2581: f_unlock(s);
2582: f_unlock(d);
2583: }
2584: MENDFUNC(2,fabs_rr,(FW d, FR s))
2585:
2586: MIDFUNC(2,fgetexp_rr,(FW d, FR s))
2587: {
2588: s=f_readreg(s);
2589: d=f_writereg(d);
2590: raw_fgetexp_rr(d,s);
2591: f_unlock(s);
2592: f_unlock(d);
2593: }
2594: MENDFUNC(2,fgetexp_rr,(FW d, FR s))
2595:
2596: MIDFUNC(2,fgetman_rr,(FW d, FR s))
2597: {
2598: s=f_readreg(s);
2599: d=f_writereg(d);
2600: raw_fgetman_rr(d,s);
2601: f_unlock(s);
2602: f_unlock(d);
2603: }
2604: MENDFUNC(2,fgetman_rr,(FW d, FR s))
2605:
2606: MIDFUNC(2,fsin_rr,(FW d, FR s))
2607: {
2608: s=f_readreg(s);
2609: d=f_writereg(d);
2610: raw_fsin_rr(d,s);
2611: f_unlock(s);
2612: f_unlock(d);
2613: }
2614: MENDFUNC(2,fsin_rr,(FW d, FR s))
2615:
2616: MIDFUNC(2,fcos_rr,(FW d, FR s))
2617: {
2618: s=f_readreg(s);
2619: d=f_writereg(d);
2620: raw_fcos_rr(d,s);
2621: f_unlock(s);
2622: f_unlock(d);
2623: }
2624: MENDFUNC(2,fcos_rr,(FW d, FR s))
2625:
2626: MIDFUNC(2,ftan_rr,(FW d, FR s))
2627: {
2628: s=f_readreg(s);
2629: d=f_writereg(d);
2630: raw_ftan_rr(d,s);
2631: f_unlock(s);
2632: f_unlock(d);
2633: }
2634: MENDFUNC(2,ftan_rr,(FW d, FR s))
2635:
2636: MIDFUNC(3,fsincos_rr,(FW d, FW c, FR s))
2637: {
2638: s=f_readreg(s); /* s for source */
2639: d=f_writereg(d); /* d for sine */
2640: c=f_writereg(c); /* c for cosine */
2641: raw_fsincos_rr(d,c,s);
2642: f_unlock(s);
2643: f_unlock(d);
2644: f_unlock(c);
2645: }
2646: MENDFUNC(3,fsincos_rr,(FW d, FW c, FR s))
2647:
2648: MIDFUNC(2,fscale_rr,(FRW d, FR s))
2649: {
2650: s=f_readreg(s);
2651: d=f_rmw(d);
2652: raw_fscale_rr(d,s);
2653: f_unlock(s);
2654: f_unlock(d);
2655: }
2656: MENDFUNC(2,fscale_rr,(FRW d, FR s))
2657:
2658: MIDFUNC(2,ftwotox_rr,(FW d, FR s))
2659: {
2660: s=f_readreg(s);
2661: d=f_writereg(d);
2662: raw_ftwotox_rr(d,s);
2663: f_unlock(s);
2664: f_unlock(d);
2665: }
2666: MENDFUNC(2,ftwotox_rr,(FW d, FR s))
2667:
2668: MIDFUNC(2,fetox_rr,(FW d, FR s))
2669: {
2670: s=f_readreg(s);
2671: d=f_writereg(d);
2672: raw_fetox_rr(d,s);
2673: f_unlock(s);
2674: f_unlock(d);
2675: }
2676: MENDFUNC(2,fetox_rr,(FW d, FR s))
2677:
2678: MIDFUNC(2,frndint_rr,(FW d, FR s))
2679: {
2680: s=f_readreg(s);
2681: d=f_writereg(d);
2682: raw_frndint_rr(d,s);
2683: f_unlock(s);
2684: f_unlock(d);
2685: }
2686: MENDFUNC(2,frndint_rr,(FW d, FR s))
2687:
2688: MIDFUNC(2,fetoxM1_rr,(FW d, FR s))
2689: {
2690: s=f_readreg(s);
2691: d=f_writereg(d);
2692: raw_fetoxM1_rr(d,s);
2693: f_unlock(s);
2694: f_unlock(d);
2695: }
2696: MENDFUNC(2,fetoxM1_rr,(FW d, FR s))
2697:
2698: MIDFUNC(2,ftentox_rr,(FW d, FR s))
2699: {
2700: s=f_readreg(s);
2701: d=f_writereg(d);
2702: raw_ftentox_rr(d,s);
2703: f_unlock(s);
2704: f_unlock(d);
2705: }
2706: MENDFUNC(2,ftentox_rr,(FW d, FR s))
2707:
2708: MIDFUNC(2,flog2_rr,(FW d, FR s))
2709: {
2710: s=f_readreg(s);
2711: d=f_writereg(d);
2712: raw_flog2_rr(d,s);
2713: f_unlock(s);
2714: f_unlock(d);
2715: }
2716: MENDFUNC(2,flog2_rr,(FW d, FR s))
2717:
2718: MIDFUNC(2,flogN_rr,(FW d, FR s))
2719: {
2720: s=f_readreg(s);
2721: d=f_writereg(d);
2722: raw_flogN_rr(d,s);
2723: f_unlock(s);
2724: f_unlock(d);
2725: }
2726: MENDFUNC(2,flogN_rr,(FW d, FR s))
2727:
2728: MIDFUNC(2,flogNP1_rr,(FW d, FR s))
2729: {
2730: s=f_readreg(s);
2731: d=f_writereg(d);
2732: raw_flogNP1_rr(d,s);
2733: f_unlock(s);
2734: f_unlock(d);
2735: }
2736: MENDFUNC(2,flogNP1_rr,(FW d, FR s))
2737:
2738: MIDFUNC(2,flog10_rr,(FW d, FR s))
2739: {
2740: s=f_readreg(s);
2741: d=f_writereg(d);
2742: raw_flog10_rr(d,s);
2743: f_unlock(s);
2744: f_unlock(d);
2745: }
2746: MENDFUNC(2,flog10_rr,(FW d, FR s))
2747:
2748: MIDFUNC(2,fasin_rr,(FW d, FR s))
2749: {
2750: s=f_readreg(s);
2751: d=f_writereg(d);
2752: raw_fasin_rr(d,s);
2753: f_unlock(s);
2754: f_unlock(d);
2755: }
2756: MENDFUNC(2,fasin_rr,(FW d, FR s))
2757:
2758: MIDFUNC(2,facos_rr,(FW d, FR s))
2759: {
2760: s=f_readreg(s);
2761: d=f_writereg(d);
2762: raw_facos_rr(d,s);
2763: f_unlock(s);
2764: f_unlock(d);
2765: }
2766: MENDFUNC(2,facos_rr,(FW d, FR s))
2767:
2768: MIDFUNC(2,fatan_rr,(FW d, FR s))
2769: {
2770: s=f_readreg(s);
2771: d=f_writereg(d);
2772: raw_fatan_rr(d,s);
2773: f_unlock(s);
2774: f_unlock(d);
2775: }
2776: MENDFUNC(2,fatan_rr,(FW d, FR s))
2777:
2778: MIDFUNC(2,fatanh_rr,(FW d, FR s))
2779: {
2780: s=f_readreg(s);
2781: d=f_writereg(d);
2782: raw_fatanh_rr(d,s);
2783: f_unlock(s);
2784: f_unlock(d);
2785: }
2786: MENDFUNC(2,fatanh_rr,(FW d, FR s))
2787:
2788: MIDFUNC(2,fsinh_rr,(FW d, FR s))
2789: {
2790: s=f_readreg(s);
2791: d=f_writereg(d);
2792: raw_fsinh_rr(d,s);
2793: f_unlock(s);
2794: f_unlock(d);
2795: }
2796: MENDFUNC(2,fsinh_rr,(FW d, FR s))
2797:
2798: MIDFUNC(2,fcosh_rr,(FW d, FR s))
2799: {
2800: s=f_readreg(s);
2801: d=f_writereg(d);
2802: raw_fcosh_rr(d,s);
2803: f_unlock(s);
2804: f_unlock(d);
2805: }
2806: MENDFUNC(2,fcosh_rr,(FW d, FR s))
2807:
2808: MIDFUNC(2,ftanh_rr,(FW d, FR s))
2809: {
2810: s=f_readreg(s);
2811: d=f_writereg(d);
2812: raw_ftanh_rr(d,s);
2813: f_unlock(s);
2814: f_unlock(d);
2815: }
2816: MENDFUNC(2,ftanh_rr,(FW d, FR s))
2817:
2818: MIDFUNC(2,fneg_rr,(FW d, FR s))
2819: {
2820: s=f_readreg(s);
2821: d=f_writereg(d);
2822: raw_fneg_rr(d,s);
2823: f_unlock(s);
2824: f_unlock(d);
2825: }
2826: MENDFUNC(2,fneg_rr,(FW d, FR s))
2827:
2828: MIDFUNC(2,fadd_rr,(FRW d, FR s))
2829: {
2830: s=f_readreg(s);
2831: d=f_rmw(d);
2832: raw_fadd_rr(d,s);
2833: f_unlock(s);
2834: f_unlock(d);
2835: }
2836: MENDFUNC(2,fadd_rr,(FRW d, FR s))
2837:
2838: MIDFUNC(2,fsub_rr,(FRW d, FR s))
2839: {
2840: s=f_readreg(s);
2841: d=f_rmw(d);
2842: raw_fsub_rr(d,s);
2843: f_unlock(s);
2844: f_unlock(d);
2845: }
2846: MENDFUNC(2,fsub_rr,(FRW d, FR s))
2847:
2848: MIDFUNC(2,fcmp_rr,(FR d, FR s))
2849: {
2850: d=f_readreg(d);
2851: s=f_readreg(s);
2852: raw_fcmp_rr(d,s);
2853: f_unlock(s);
2854: f_unlock(d);
2855: }
2856: MENDFUNC(2,fcmp_rr,(FR d, FR s))
2857:
2858: MIDFUNC(2,fdiv_rr,(FRW d, FR s))
2859: {
2860: s=f_readreg(s);
2861: d=f_rmw(d);
2862: raw_fdiv_rr(d,s);
2863: f_unlock(s);
2864: f_unlock(d);
2865: }
2866: MENDFUNC(2,fdiv_rr,(FRW d, FR s))
2867:
2868: MIDFUNC(2,frem_rr,(FRW d, FR s))
2869: {
2870: s=f_readreg(s);
2871: d=f_rmw(d);
2872: raw_frem_rr(d,s);
2873: f_unlock(s);
2874: f_unlock(d);
2875: }
2876: MENDFUNC(2,frem_rr,(FRW d, FR s))
2877:
2878: MIDFUNC(2,frem1_rr,(FRW d, FR s))
2879: {
2880: s=f_readreg(s);
2881: d=f_rmw(d);
2882: raw_frem1_rr(d,s);
2883: f_unlock(s);
2884: f_unlock(d);
2885: }
2886: MENDFUNC(2,frem1_rr,(FRW d, FR s))
2887:
2888: MIDFUNC(2,fmul_rr,(FRW d, FR s))
2889: {
2890: s=f_readreg(s);
2891: d=f_rmw(d);
2892: raw_fmul_rr(d,s);
2893: f_unlock(s);
2894: f_unlock(d);
2895: }
2896: MENDFUNC(2,fmul_rr,(FRW d, FR s))
2897:
2898: #ifdef __GNUC__
2899:
2900: static inline void mfence(void)
2901: {
2902: #ifdef CPU_i386
2903: if (!cpuinfo.x86_has_xmm2)
2904: __asm__ __volatile__("lock; addl $0,0(%%esp)":::"memory");
2905: else
2906: #endif
2907: __asm__ __volatile__("mfence":::"memory");
2908: }
2909:
2910: static inline void clflush(volatile void *__p)
2911: {
2912: __asm__ __volatile__("clflush %0" : "+m" (*(volatile char *)__p));
2913: }
2914:
2915: static inline void flush_cpu_icache(void *start, void *stop)
2916: {
2917: mfence();
2918: if (cpuinfo.x86_clflush_size != 0)
2919: {
2920: volatile char *vaddr = (volatile char *)(((uintptr)start / cpuinfo.x86_clflush_size) * cpuinfo.x86_clflush_size);
2921: volatile char *vend = (volatile char *)((((uintptr)stop + cpuinfo.x86_clflush_size - 1) / cpuinfo.x86_clflush_size) * cpuinfo.x86_clflush_size);
2922: while (vaddr < vend)
2923: {
2924: clflush(vaddr);
2925: vaddr += cpuinfo.x86_clflush_size;
2926: }
2927: }
2928: mfence();
2929: }
2930:
2931: #else
2932:
2933: static inline void flush_cpu_icache(void *start, void *stop)
2934: {
2935: UNUSED(start);
2936: UNUSED(stop);
2937: }
2938:
2939: #endif
2940:
2941: static inline void write_jmp_target(uae_u32 *jmpaddr, cpuop_func* a) {
2942: uintptr rel = (uintptr) a - ((uintptr) jmpaddr + 4);
2943: *(jmpaddr) = (uae_u32) rel;
2944: flush_cpu_icache((void *) jmpaddr, (void *) &jmpaddr[1]);
2945: }
2946:
2947: static inline void emit_jmp_target(uae_u32 a) {
2948: emit_long(a-((uintptr)target+4));
2949: }
2950:
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