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1.1.1.3 root 1: /*
2: * UAE - The Un*x Amiga Emulator
3: *
4: * MC68000 emulation
5: *
6: * Copyright 1995 Bernd Schmidt
7: */
8:
9: #ifndef NEWCPU_H
10: #define NEWCPU_H
11:
12: #include "readcpu.h"
13: #include "m68k.h"
14: #include "compat.h"
15: #include "maccess.h"
16: #include "events.h"
17: #include "memory.h"
18: #include "custom.h"
19:
20: /* Possible exceptions sources for M68000_Exception() and Exception() */
1.1.1.5 ! root 21: // TODO : remove when not used anymore in m68000.c
! 22: #define M68000_EXC_SRC_CPU 1 /* Direct CPU exception */
! 23: #define M68000_EXC_SRC_AUTOVEC 2 /* Auto-vector exception (e.g. VBL) */
! 24: #define M68000_EXC_SRC_INT_MFP 3 /* MFP interrupt exception */
! 25: #define M68000_EXC_SRC_INT_DSP 4 /* DSP interrupt exception */
1.1.1.3 root 26:
27:
28: /* Special flags */
29: #define SPCFLAG_DEBUGGER 1
30: #define SPCFLAG_STOP 2
31: #define SPCFLAG_BUSERROR 4
32: #define SPCFLAG_INT 8
33: #define SPCFLAG_BRK 0x10
34: #define SPCFLAG_EXTRA_CYCLES 0x20
35: #define SPCFLAG_TRACE 0x40
36: #define SPCFLAG_DOTRACE 0x80
37: #define SPCFLAG_DOINT 0x100
38: #define SPCFLAG_MFP 0x200
39: #define SPCFLAG_EXEC 0x400
40: #define SPCFLAG_MODE_CHANGE 0x800
1.1.1.4 root 41: #define SPCFLAG_DSP 0x1000
1.1.1.3 root 42:
43:
1.1.1.5 ! root 44: #ifdef WITH_SOFTFLOAT
! 45: #include <softfloat.h>
! 46: #endif
! 47:
1.1.1.3 root 48: #ifndef SET_CFLG
49:
50: #define SET_CFLG(x) (CFLG() = (x))
51: #define SET_NFLG(x) (NFLG() = (x))
52: #define SET_VFLG(x) (VFLG() = (x))
53: #define SET_ZFLG(x) (ZFLG() = (x))
54: #define SET_XFLG(x) (XFLG() = (x))
55:
56: #define GET_CFLG() CFLG()
57: #define GET_NFLG() NFLG()
58: #define GET_VFLG() VFLG()
59: #define GET_ZFLG() ZFLG()
60: #define GET_XFLG() XFLG()
61:
62: #define CLEAR_CZNV() do { \
63: SET_CFLG (0); \
64: SET_ZFLG (0); \
65: SET_NFLG (0); \
66: SET_VFLG (0); \
67: } while (0)
68:
69: #define COPY_CARRY() (SET_XFLG (GET_CFLG ()))
70: #endif
71:
72: extern const int areg_byteinc[];
73: extern const int imm8_table[];
74:
75: extern int movem_index1[256];
76: extern int movem_index2[256];
77: extern int movem_next[256];
78:
79: #ifdef FPUEMU
80: extern int fpp_movem_index1[256];
81: extern int fpp_movem_index2[256];
82: extern int fpp_movem_next[256];
83: #endif
84:
1.1.1.5 ! root 85: extern int bus_error_offset;
1.1.1.3 root 86:
1.1.1.5 ! root 87: typedef uae_u32 REGPARAM3 cpuop_func (uae_u32) REGPARAM;
1.1.1.3 root 88: typedef void REGPARAM3 cpuop_func_ce (uae_u32) REGPARAM;
89:
90: struct cputbl {
91: cpuop_func *handler;
92: uae_u16 opcode;
1.1.1.5 ! root 93: uae_s8 length;
! 94: uae_s8 disp020[2];
! 95: uae_u8 branch;
1.1.1.3 root 96: };
97:
98: #ifdef JIT
1.1.1.5 ! root 99: typedef uae_u32 REGPARAM3 compop_func (uae_u32) REGPARAM;
1.1.1.3 root 100:
101: struct comptbl {
102: compop_func *handler;
103: uae_u32 opcode;
104: int specific;
105: };
106: #endif
107:
1.1.1.5 ! root 108: extern uae_u32 REGPARAM3 op_illg (uae_u32) REGPARAM;
! 109: extern void REGPARAM3 op_unimpl (uae_u16) REGPARAM;
1.1.1.3 root 110:
111: typedef uae_u8 flagtype;
112:
113: #ifdef FPUEMU
114:
1.1.1.5 ! root 115: #ifdef USE_LONG_DOUBLE
1.1.1.3 root 116: typedef long double fptype;
117: #define LDPTR tbyte ptr
118: #else
119: typedef double fptype;
120: #define LDPTR qword ptr
121: #endif
122: #endif
123:
1.1.1.5 ! root 124: #define MAX68020CYCLES 4
! 125:
! 126: #define CPU_PIPELINE_MAX 4
1.1.1.3 root 127: #define CPU000_MEM_CYCLE 4
128: #define CPU000_CLOCK_MULT 2
129: #define CPU020_MEM_CYCLE 3
130: #define CPU020_CLOCK_MULT 4
131:
132: #define CACHELINES020 64
133: struct cache020
134: {
135: uae_u32 data;
136: uae_u32 tag;
137: bool valid;
138: };
139:
140: #define CACHELINES030 16
141: struct cache030
142: {
143: uae_u32 data[4];
144: bool valid[4];
145: uae_u32 tag;
146: };
147:
148: #define CACHESETS040 64
149: #define CACHELINES040 4
150: struct cache040
151: {
152: uae_u32 data[CACHELINES040][4];
1.1.1.5 ! root 153: bool dirty[CACHELINES040][4];
1.1.1.3 root 154: bool valid[CACHELINES040];
155: uae_u32 tag[CACHELINES040];
156: };
157:
1.1.1.4 root 158: struct mmufixup
159: {
160: int reg;
161: uae_u32 value;
162: };
163: extern struct mmufixup mmufixup[2];
1.1.1.3 root 164:
1.1.1.5 ! root 165: typedef struct
! 166: {
! 167: fptype fp;
! 168: #ifdef WITH_SOFTFLOAT
! 169: floatx80 fpx;
! 170: #endif
! 171: } fpdata;
! 172:
1.1.1.3 root 173: struct regstruct
174: {
175: uae_u32 regs[16];
176:
177: uae_u32 pc;
178: uae_u8 *pc_p;
179: uae_u8 *pc_oldp;
1.1.1.5 ! root 180: uae_u16 opcode;
! 181: uae_u32 instruction_pc;
1.1.1.3 root 182:
1.1.1.5 ! root 183: uae_u16 irc, ir, db;
1.1.1.3 root 184: uae_u32 spcflags;
1.1.1.5 ! root 185: uae_u32 last_prefetch;
! 186: uae_u32 chipset_latch_rw;
! 187: uae_u32 chipset_latch_read;
! 188: uae_u32 chipset_latch_write;
1.1.1.3 root 189:
190: uaecptr usp, isp, msp;
191: uae_u16 sr;
192: flagtype t1;
193: flagtype t0;
194: flagtype s;
195: flagtype m;
196: flagtype x;
197: flagtype stopped;
1.1.1.5 ! root 198: int halted;
! 199: int exception;
1.1.1.3 root 200: int intmask;
201: int ipl, ipl_pin;
202:
203: uae_u32 vbr, sfc, dfc;
204:
205: #ifdef FPUEMU
1.1.1.5 ! root 206: fpdata fp[8];
! 207: fpdata fp_result;
! 208: uae_u32 fp_result_status;
1.1.1.3 root 209: uae_u32 fpcr, fpsr, fpiar;
1.1.1.5 ! root 210: uae_u32 fpu_state;
! 211: uae_u32 fpu_exp_state;
! 212: fpdata exp_src1, exp_src2;
! 213: uae_u32 exp_pack[3];
! 214: uae_u16 exp_opcode, exp_extra, exp_type;
! 215: uae_u16 exp_size;
! 216: bool fp_exception;
! 217: bool fp_branch;
1.1.1.3 root 218: #endif
219: #ifndef CPUEMU_68000_ONLY
220: uae_u32 cacr, caar;
221: uae_u32 itt0, itt1, dtt0, dtt1;
222: uae_u32 tcr, mmusr, urp, srp, buscr;
1.1.1.5 ! root 223: uae_u32 mmu_fslw;
! 224: uae_u32 mmu_fault_addr, mmu_effective_addr;
1.1.1.3 root 225: uae_u16 mmu_ssw;
1.1.1.5 ! root 226: uae_u32 wb2_address;
1.1.1.3 root 227: uae_u32 wb3_data;
1.1.1.5 ! root 228: uae_u8 wb3_status, wb2_status;
1.1.1.3 root 229: int mmu_enabled;
1.1.1.5 ! root 230: int mmu_page_size;
1.1.1.3 root 231: #endif
232:
233: uae_u32 pcr;
234: uae_u32 address_space_mask;
235:
1.1.1.5 ! root 236: uae_u32 prefetch020[CPU_PIPELINE_MAX];
! 237: uae_u32 prefetch020addr;
! 238: uae_u32 cacheholdingdata020;
! 239: uae_u32 cacheholdingaddr020;
! 240: int pipeline_pos;
! 241: int pipeline_r8[2];
! 242: int pipeline_stop;
1.1.1.3 root 243: int ce020memcycles;
1.1.1.5 ! root 244: int ce020extracycles;
! 245: bool ce020memcycle_data;
! 246: int ce020_tail;
! 247: frame_time_t ce020_tail_cycles;
! 248: int memory_waitstate_cycles;
1.1.1.3 root 249: };
250:
251: extern struct regstruct regs;
252:
1.1.1.5 ! root 253: #define MAX_CPUTRACESIZE 128
! 254: struct cputracememory
! 255: {
! 256: uae_u32 addr;
! 257: uae_u32 data;
! 258: int mode;
! 259: };
! 260:
! 261: struct cputracestruct
! 262: {
! 263: uae_u32 regs[16];
! 264: uae_u32 usp, isp, pc;
! 265: uae_u16 ir, irc, sr, opcode;
! 266: int intmask, stopped, state;
! 267:
! 268: uae_u32 msp, vbr;
! 269: uae_u32 cacr, caar;
! 270: uae_u32 prefetch020[CPU_PIPELINE_MAX];
! 271: uae_u32 prefetch020addr;
! 272: uae_u32 cacheholdingdata020;
! 273: uae_u32 cacheholdingaddr020;
! 274: struct cache020 caches020[CACHELINES020];
! 275:
! 276: uae_u32 startcycles;
! 277: int needendcycles;
! 278: int memoryoffset;
! 279: int cyclecounter, cyclecounter_pre, cyclecounter_post;
! 280: int readcounter, writecounter;
! 281: struct cputracememory ctm[MAX_CPUTRACESIZE];
! 282: };
! 283:
1.1.1.3 root 284: STATIC_INLINE uae_u32 munge24 (uae_u32 x)
285: {
286: return x & regs.address_space_mask;
287: }
288:
289: extern int mmu_enabled, mmu_triggered;
290: extern int cpu_cycles;
291: extern int cpucycleunit;
1.1.1.5 ! root 292: extern int m68k_pc_indirect;
1.1.1.3 root 293: STATIC_INLINE void set_special (uae_u32 x)
294: {
295: regs.spcflags |= x;
296: cycles_do_special ();
297: }
298:
299: STATIC_INLINE void unset_special (uae_u32 x)
300: {
301: regs.spcflags &= ~x;
302: }
303:
304: #define m68k_dreg(r,num) ((r).regs[(num)])
305: #define m68k_areg(r,num) (((r).regs + 8)[(num)])
306:
1.1.1.5 ! root 307: extern uae_u32(*x_prefetch)(int);
! 308: extern uae_u32(*x_get_byte)(uaecptr addr);
! 309: extern uae_u32(*x_get_word)(uaecptr addr);
! 310: extern uae_u32(*x_get_long)(uaecptr addr);
! 311: extern void(*x_put_byte)(uaecptr addr, uae_u32 v);
! 312: extern void(*x_put_word)(uaecptr addr, uae_u32 v);
! 313: extern void(*x_put_long)(uaecptr addr, uae_u32 v);
! 314: extern uae_u32(*x_next_iword)(void);
! 315: extern uae_u32(*x_next_ilong)(void);
! 316: extern uae_u32(*x_get_ilong)(int);
! 317: extern uae_u32(*x_get_iword)(int);
! 318: extern uae_u32(*x_get_ibyte)(int);
! 319:
! 320: extern uae_u32(*x_cp_get_byte)(uaecptr addr);
! 321: extern uae_u32(*x_cp_get_word)(uaecptr addr);
! 322: extern uae_u32(*x_cp_get_long)(uaecptr addr);
! 323: extern void(*x_cp_put_byte)(uaecptr addr, uae_u32 v);
! 324: extern void(*x_cp_put_word)(uaecptr addr, uae_u32 v);
! 325: extern void(*x_cp_put_long)(uaecptr addr, uae_u32 v);
! 326: extern uae_u32(*x_cp_next_iword)(void);
! 327: extern uae_u32(*x_cp_next_ilong)(void);
! 328:
! 329: extern uae_u32(REGPARAM3 *x_cp_get_disp_ea_020)(uae_u32 base, int idx) REGPARAM;
! 330:
! 331: /* direct (regs.pc_p) access */
! 332:
! 333: STATIC_INLINE void m68k_setpc(uaecptr newpc)
1.1.1.3 root 334: {
1.1.1.5 ! root 335: regs.pc_p = regs.pc_oldp = get_real_address(newpc);
! 336: regs.instruction_pc = regs.pc = newpc;
1.1.1.3 root 337: }
1.1.1.5 ! root 338: STATIC_INLINE uaecptr m68k_getpc(void)
1.1.1.3 root 339: {
340: return (uaecptr)(regs.pc + ((uae_u8*)regs.pc_p - (uae_u8*)regs.pc_oldp));
341: }
342: #define M68K_GETPC m68k_getpc()
1.1.1.5 ! root 343: STATIC_INLINE uaecptr m68k_getpc_p(uae_u8 *p)
1.1.1.3 root 344: {
345: return (uaecptr)(regs.pc + ((uae_u8*)p - (uae_u8*)regs.pc_oldp));
346: }
1.1.1.5 ! root 347: STATIC_INLINE void m68k_incpc(int o)
1.1.1.3 root 348: {
349: regs.pc_p += o;
350: }
351:
1.1.1.5 ! root 352: STATIC_INLINE uae_u32 get_dibyte(int o)
1.1.1.3 root 353: {
1.1.1.5 ! root 354: return do_get_mem_byte((uae_u8 *)((regs).pc_p + (o) + 1));
1.1.1.3 root 355: }
1.1.1.5 ! root 356: STATIC_INLINE uae_u32 get_diword(int o)
1.1.1.3 root 357: {
1.1.1.5 ! root 358: return do_get_mem_word((uae_u16 *)((regs).pc_p + (o)));
1.1.1.3 root 359: }
1.1.1.5 ! root 360: STATIC_INLINE uae_u32 get_dilong(int o)
1.1.1.3 root 361: {
1.1.1.5 ! root 362: return do_get_mem_long((uae_u32 *)((regs).pc_p + (o)));
1.1.1.3 root 363: }
1.1.1.5 ! root 364: STATIC_INLINE uae_u32 next_diword(void)
1.1.1.3 root 365: {
1.1.1.5 ! root 366: uae_u32 r = do_get_mem_word((uae_u16 *)((regs).pc_p));
! 367: m68k_incpc(2);
! 368: return r;
! 369: }
! 370: STATIC_INLINE uae_u32 next_dilong(void)
! 371: {
! 372: uae_u32 r = do_get_mem_long((uae_u32 *)((regs).pc_p));
! 373: m68k_incpc(4);
! 374: return r;
1.1.1.3 root 375: }
376:
1.1.1.5 ! root 377: STATIC_INLINE void m68k_do_bsr(uaecptr oldpc, uae_s32 offset)
1.1.1.3 root 378: {
1.1.1.5 ! root 379: m68k_areg(regs, 7) -= 4;
! 380: put_long(m68k_areg(regs, 7), oldpc);
! 381: m68k_incpc(offset);
1.1.1.3 root 382: }
1.1.1.5 ! root 383: STATIC_INLINE void m68k_do_rts(void)
1.1.1.3 root 384: {
1.1.1.5 ! root 385: uae_u32 newpc = get_long(m68k_areg(regs, 7));
! 386: m68k_setpc(newpc);
! 387: m68k_areg(regs, 7) += 4;
1.1.1.3 root 388: }
389:
1.1.1.5 ! root 390: /* indirect (regs.pc) access */
! 391:
! 392: STATIC_INLINE void m68k_setpci(uaecptr newpc)
1.1.1.3 root 393: {
1.1.1.5 ! root 394: regs.instruction_pc = regs.pc = newpc;
1.1.1.3 root 395: }
1.1.1.5 ! root 396: STATIC_INLINE uaecptr m68k_getpci(void)
1.1.1.3 root 397: {
1.1.1.5 ! root 398: return regs.pc;
! 399: }
! 400: STATIC_INLINE void m68k_incpci(int o)
! 401: {
! 402: regs.pc += o;
1.1.1.3 root 403: }
404:
1.1.1.5 ! root 405: STATIC_INLINE uae_u32 get_iibyte(int o)
1.1.1.3 root 406: {
1.1.1.5 ! root 407: return get_wordi(m68k_getpci() + (o)) & 0xff;
1.1.1.3 root 408: }
1.1.1.5 ! root 409: STATIC_INLINE uae_u32 get_iiword(int o)
1.1.1.3 root 410: {
1.1.1.5 ! root 411: return get_wordi(m68k_getpci() + (o));
1.1.1.3 root 412: }
1.1.1.5 ! root 413: STATIC_INLINE uae_u32 get_iilong(int o)
1.1.1.3 root 414: {
1.1.1.5 ! root 415: return get_longi(m68k_getpci () + (o));
1.1.1.3 root 416: }
417:
1.1.1.5 ! root 418: STATIC_INLINE uae_u32 next_iibyte (void)
1.1.1.3 root 419: {
1.1.1.5 ! root 420: uae_u32 r = get_iibyte (0);
! 421: m68k_incpci (2);
1.1.1.3 root 422: return r;
423: }
1.1.1.5 ! root 424: STATIC_INLINE uae_u32 next_iiword (void)
1.1.1.3 root 425: {
1.1.1.5 ! root 426: uae_u32 r = get_iiword (0);
! 427: m68k_incpci (2);
1.1.1.3 root 428: return r;
429: }
1.1.1.5 ! root 430: STATIC_INLINE uae_u32 next_iiwordi (void)
1.1.1.3 root 431: {
1.1.1.5 ! root 432: uae_u32 r = get_wordi(m68k_getpci());
! 433: m68k_incpci (2);
1.1.1.3 root 434: return r;
435: }
1.1.1.5 ! root 436: STATIC_INLINE uae_u32 next_iilong (void)
1.1.1.3 root 437: {
1.1.1.5 ! root 438: uae_u32 r = get_iilong(0);
! 439: m68k_incpci (4);
1.1.1.3 root 440: return r;
441: }
1.1.1.5 ! root 442: STATIC_INLINE uae_u32 next_iilongi (void)
1.1.1.3 root 443: {
1.1.1.5 ! root 444: uae_u32 r = get_longi (m68k_getpci ());
! 445: m68k_incpci (4);
1.1.1.3 root 446: return r;
447: }
448:
1.1.1.5 ! root 449: STATIC_INLINE void m68k_do_bsri(uaecptr oldpc, uae_s32 offset)
! 450: {
! 451: m68k_areg(regs, 7) -= 4;
! 452: put_long(m68k_areg(regs, 7), oldpc);
! 453: m68k_incpci(offset);
! 454: }
! 455: STATIC_INLINE void m68k_do_rtsi(void)
! 456: {
! 457: uae_u32 newpc = get_long(m68k_areg(regs, 7));
! 458: m68k_setpci(newpc);
! 459: m68k_areg(regs, 7) += 4;
! 460: }
! 461:
! 462: /* indirect jit friendly versions */
1.1.1.3 root 463:
1.1.1.5 ! root 464: STATIC_INLINE uae_u32 get_iibyte_jit(int o)
! 465: {
! 466: return get_wordi(m68k_getpc() + (o)) & 0xff;
! 467: }
! 468: STATIC_INLINE uae_u32 get_iiword_jit(int o)
! 469: {
! 470: return get_wordi(m68k_getpc() + (o));
! 471: }
! 472: STATIC_INLINE uae_u32 get_iilong_jit(int o)
! 473: {
! 474: return get_longi(m68k_getpc() + (o));
! 475: }
! 476: STATIC_INLINE uae_u32 next_iiword_jit(void)
! 477: {
! 478: uae_u32 r = get_wordi(m68k_getpc());
! 479: m68k_incpc(2);
! 480: return r;
! 481: }
! 482: STATIC_INLINE uae_u32 next_iilong_jit(void)
! 483: {
! 484: uae_u32 r = get_longi(m68k_getpc());
! 485: m68k_incpc(4);
! 486: return r;
! 487: }
! 488: STATIC_INLINE void m68k_do_bsri_jit(uaecptr oldpc, uae_s32 offset)
! 489: {
! 490: m68k_areg(regs, 7) -= 4;
! 491: x_put_long(m68k_areg(regs, 7), oldpc);
! 492: m68k_incpc(offset);
! 493: }
! 494: STATIC_INLINE void m68k_do_rtsi_jit(void)
! 495: {
! 496: uae_u32 newpc = x_get_long(m68k_areg(regs, 7));
! 497: m68k_setpc(newpc);
! 498: m68k_areg(regs, 7) += 4;
! 499: }
! 500:
! 501: /* common access */
! 502:
! 503: STATIC_INLINE void m68k_incpc_normal(int o)
! 504: {
! 505: if (m68k_pc_indirect > 0)
! 506: m68k_incpci(o);
! 507: else
! 508: m68k_incpc(o);
! 509: }
! 510:
! 511: STATIC_INLINE void m68k_setpc_normal(uaecptr pc)
! 512: {
! 513: if (m68k_pc_indirect > 0) {
! 514: regs.pc_p = regs.pc_oldp = 0;
! 515: m68k_setpci(pc);
! 516: } else {
! 517: m68k_setpc(pc);
! 518: }
! 519: }
! 520:
! 521: extern void write_dcache030(uaecptr, uae_u32, int);
! 522: extern uae_u32 read_dcache030(uaecptr, int);
! 523: extern uae_u32 get_word_icache030(uaecptr addr);
! 524: extern uae_u32 get_long_icache030(uaecptr addr);
! 525:
! 526: uae_u32 fill_icache040(uae_u32 addr);
! 527: extern void put_long_cache_040(uaecptr, uae_u32);
! 528: extern void put_word_cache_040(uaecptr, uae_u32);
! 529: extern void put_byte_cache_040(uaecptr, uae_u32);
! 530: extern uae_u32 get_ilong_cache_040(int);
! 531: extern uae_u32 get_iword_cache_040(int);
! 532: extern uae_u32 get_long_cache_040(uaecptr);
! 533: extern uae_u32 get_word_cache_040(uaecptr);
! 534: extern uae_u32 get_byte_cache_040(uaecptr);
! 535: extern uae_u32 next_iword_cache040(void);
! 536: extern uae_u32 next_ilong_cache040(void);
! 537: extern uae_u32 get_word_icache040(uaecptr addr);
! 538: extern uae_u32 get_long_icache040(uaecptr addr);
! 539:
! 540: extern void (*x_do_cycles)(unsigned long);
! 541: extern void (*x_do_cycles_pre)(unsigned long);
! 542: extern void (*x_do_cycles_post)(unsigned long, uae_u32);
! 543:
! 544: extern uae_u32 REGPARAM3 x_get_disp_ea_020 (uae_u32 base, int idx) REGPARAM;
! 545: extern uae_u32 REGPARAM3 x_get_disp_ea_ce020 (uae_u32 base, int idx) REGPARAM;
! 546: extern uae_u32 REGPARAM3 x_get_disp_ea_ce030 (uae_u32 base, int idx) REGPARAM;
! 547: extern uae_u32 REGPARAM3 x_get_disp_ea_040(uae_u32 base, int idx) REGPARAM;
1.1.1.3 root 548: extern uae_u32 REGPARAM3 x_get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
549: extern void REGPARAM3 x_put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
550:
551: extern void m68k_setstopped (void);
552: extern void m68k_resumestopped (void);
553:
1.1.1.5 ! root 554: extern uae_u32 REGPARAM3 get_disp_ea_020 (uae_u32 base, int idx) REGPARAM;
1.1.1.3 root 555: extern uae_u32 REGPARAM3 get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
556: extern void REGPARAM3 put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
557:
1.1.1.5 ! root 558: extern void m68k_disasm_ea (uaecptr addr, uaecptr *nextpc, int cnt, uae_u32 *seaddr, uae_u32 *deaddr);
! 559: extern void m68k_disasm (uaecptr addr, uaecptr *nextpc, int cnt);
! 560: extern void m68k_disasm_2 (TCHAR *buf, int bufsize, uaecptr addr, uaecptr *nextpc, int cnt, uae_u32 *seaddr, uae_u32 *deaddr, int safemode);
! 561: extern void sm68k_disasm (TCHAR*, TCHAR*, uaecptr addr, uaecptr *nextpc);
1.1.1.3 root 562: extern int get_cpu_model (void);
1.1.1.5 ! root 563: #ifdef WINUAE_FOR_HATARI
! 564: extern void m68k_disasm_file (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt);
! 565: #endif
1.1.1.3 root 566:
1.1.1.5 ! root 567: extern void set_cpu_caches (bool flush);
! 568: extern void flush_cpu_caches(bool flush);
! 569: extern void flush_cpu_caches_040(uae_u16 opcode);
1.1.1.3 root 570: extern void REGPARAM3 MakeSR (void) REGPARAM;
1.1.1.5 ! root 571: extern void SetSR (uae_u16 sr);
1.1.1.3 root 572: extern void REGPARAM3 MakeFromSR (void) REGPARAM;
1.1.1.5 ! root 573: extern void REGPARAM3 Exception (int) REGPARAM;
! 574: extern void REGPARAM3 ExceptionL (int, uaecptr) REGPARAM;
1.1.1.3 root 575: extern void NMI (void);
576: extern void NMI_delayed (void);
577: extern void prepare_interrupt (uae_u32);
578: extern void doint (void);
579: extern void dump_counts (void);
580: extern int m68k_move2c (int, uae_u32 *);
581: extern int m68k_movec2 (int, uae_u32 *);
1.1.1.5 ! root 582: extern bool m68k_divl (uae_u32, uae_u32, uae_u16);
! 583: extern bool m68k_mull (uae_u32, uae_u32, uae_u16);
1.1.1.3 root 584: extern void init_m68k (void);
585: extern void init_m68k_full (void);
586: extern void m68k_go (int);
1.1.1.5 ! root 587: extern void m68k_dumpstate (uaecptr *);
! 588: extern void m68k_dumpstate_2 (uaecptr, uaecptr *);
! 589: extern void m68k_dumpstate_file (FILE *f, uaecptr *);
! 590: extern void m68k_dumpcache (void);
1.1.1.3 root 591: extern int getDivu68kCycles (uae_u32 dividend, uae_u16 divisor);
592: extern int getDivs68kCycles (uae_s32 dividend, uae_s16 divisor);
1.1.1.5 ! root 593: extern void divbyzero_special (bool issigned, uae_s32 dst);
1.1.1.3 root 594: extern void m68k_do_rte (void);
1.1.1.5 ! root 595: extern void protect_roms (bool);
! 596: extern void unprotect_maprom (void);
! 597: extern bool is_hardreset(void);
! 598: extern bool is_keyboardreset(void);
1.1.1.3 root 599:
600: extern void mmu_op (uae_u32, uae_u32);
1.1.1.5 ! root 601: extern bool mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);
1.1.1.3 root 602:
603: extern void fpuop_arithmetic(uae_u32, uae_u16);
604: extern void fpuop_dbcc(uae_u32, uae_u16);
605: extern void fpuop_scc(uae_u32, uae_u16);
606: extern void fpuop_trapcc(uae_u32, uaecptr, uae_u16);
607: extern void fpuop_bcc(uae_u32, uaecptr, uae_u32);
608: extern void fpuop_save(uae_u32);
609: extern void fpuop_restore(uae_u32);
610: extern uae_u32 fpp_get_fpsr (void);
611: extern void fpu_reset (void);
612: extern void fpux_save (int*);
613: extern void fpux_restore (int*);
1.1.1.5 ! root 614: extern bool fpu_get_constant(fpdata *fp, int cr);
! 615: extern int fpp_cond(int condition);
1.1.1.3 root 616:
1.1.1.5 ! root 617: extern void exception3_read (uae_u32 opcode, uaecptr addr);
! 618: extern void exception3_write (uae_u32 opcode, uaecptr addr);
! 619: extern void exception3_notinstruction(uae_u32 opcode, uaecptr addr);
! 620: extern void exception3i (uae_u32 opcode, uaecptr addr);
! 621: extern void exception3b (uae_u32 opcode, uaecptr addr, bool w, bool i, uaecptr pc);
! 622: extern void exception2 (uaecptr addr, bool read, int size, uae_u32 fc);
! 623: extern void exception2_fake (uaecptr addr);
! 624: extern void m68k_reset (void);
1.1.1.3 root 625: extern void cpureset (void);
1.1.1.5 ! root 626: extern void cpu_halt (int id);
! 627: extern void cpu_sleep_millis(int ms);
1.1.1.3 root 628:
1.1.1.5 ! root 629: extern void fill_prefetch (void);
! 630: extern void fill_prefetch_020 (void);
! 631: extern void fill_prefetch_030 (void);
! 632:
! 633: #ifdef WINUAE_FOR_HATARI
! 634: //extern void m68k_reset (bool hardreset); // TODO remove
! 635: #endif
1.1.1.3 root 636:
637: #define CPU_OP_NAME(a) op ## a
638:
639: /* 68060 */
640: extern const struct cputbl op_smalltbl_0_ff[];
1.1.1.5 ! root 641: extern const struct cputbl op_smalltbl_40_ff[];
! 642: extern const struct cputbl op_smalltbl_24_ff[]; // CE
! 643: extern const struct cputbl op_smalltbl_33_ff[]; // MMU
1.1.1.3 root 644: /* 68040 */
645: extern const struct cputbl op_smalltbl_1_ff[];
1.1.1.5 ! root 646: extern const struct cputbl op_smalltbl_41_ff[];
! 647: extern const struct cputbl op_smalltbl_25_ff[]; // CE
1.1.1.3 root 648: extern const struct cputbl op_smalltbl_31_ff[]; // MMU
649: /* 68030 */
650: extern const struct cputbl op_smalltbl_2_ff[];
1.1.1.5 ! root 651: extern const struct cputbl op_smalltbl_42_ff[];
! 652: extern const struct cputbl op_smalltbl_22_ff[]; // prefetch
! 653: extern const struct cputbl op_smalltbl_23_ff[]; // CE
1.1.1.4 root 654: extern const struct cputbl op_smalltbl_32_ff[]; // MMU
1.1.1.3 root 655: /* 68020 */
656: extern const struct cputbl op_smalltbl_3_ff[];
1.1.1.5 ! root 657: extern const struct cputbl op_smalltbl_43_ff[];
! 658: extern const struct cputbl op_smalltbl_20_ff[]; // prefetch
! 659: extern const struct cputbl op_smalltbl_21_ff[]; // CE
1.1.1.3 root 660: /* 68010 */
661: extern const struct cputbl op_smalltbl_4_ff[];
1.1.1.5 ! root 662: extern const struct cputbl op_smalltbl_44_ff[];
! 663: extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
! 664: extern const struct cputbl op_smalltbl_13_ff[]; // CE
1.1.1.3 root 665: /* 68000 */
666: extern const struct cputbl op_smalltbl_5_ff[];
1.1.1.5 ! root 667: extern const struct cputbl op_smalltbl_45_ff[];
! 668: extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
! 669: extern const struct cputbl op_smalltbl_14_ff[]; // CE
1.1.1.3 root 670:
671: extern cpuop_func *cpufunctbl[65536] ASM_SYM_FOR_FUNC ("cpufunctbl");
672:
673: #ifdef JIT
1.1.1.5 ! root 674: extern void flush_icache(uaecptr, int);
! 675: extern void flush_icache_hard(uaecptr, int);
! 676: extern void compemu_reset(void);
1.1.1.3 root 677: extern bool check_prefs_changed_comp (void);
678: #else
679: #define flush_icache(uaecptr, int) do {} while (0)
1.1.1.5 ! root 680: #define flush_icache_hard(uaecptr, int) do {} while (0)
1.1.1.3 root 681: #endif
682: extern void flush_dcache (uaecptr, int);
1.1.1.5 ! root 683: #ifdef WINUAE_FOR_HATARI
! 684: extern void flush_instr_cache (uaecptr, int);
! 685: #endif
1.1.1.3 root 686: extern void flush_mmu (uaecptr, int);
687:
688: extern int movec_illg (int regno);
689: extern uae_u32 val_move2c (int regno);
690: extern void val_move2c2 (int regno, uae_u32 val);
691: struct cpum2c {
692: int regno;
693: const TCHAR *regname;
694: };
695: extern struct cpum2c m2cregs[];
696:
1.1.1.5 ! root 697: extern bool is_cpu_tracer (void);
! 698: extern bool set_cpu_tracer (bool force);
! 699: extern bool can_cpu_tracer (void);
! 700:
! 701: #ifdef WINUAE_FOR_HATARI
! 702: /*** Hatari ***/
! 703:
1.1.1.3 root 704: /* Family of the latest instruction executed (to check for pairing) */
705: extern int OpcodeFamily; /* see instrmnem in readcpu.h */
706:
707: /* How many cycles to add to the current instruction in case a "misaligned" bus acces is made */
1.1.1.5 ! root 708: /* (e.g. used when addressing mode is d8(an,ix)) */
1.1.1.3 root 709: extern int BusCyclePenalty;
710:
1.1.1.5 ! root 711: /* To redirect WinUAE's prints to our own file */
! 712: extern FILE *console_out_FILE;
! 713:
! 714: /*** Hatari ***/
! 715: #endif
! 716:
1.1.1.3 root 717: #endif
1.1.1.5 ! root 718:
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