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1.1 root 1: /***
2: * 68k disassembler, written 2010 by Markus Fritze, www.sarnau.com
3: *
4: * This file is distributed under the GNU Public License, version 2 or at
5: * your option any later version. Read the file gpl.txt for details.
6: ***/
7:
8: #include <stdio.h>
9: #include <ctype.h>
10: #include <strings.h>
11: #include <stdlib.h>
12:
13: #include "config.h"
14: #include "sysdeps.h"
15: #include "main.h"
16: #include "newcpu.h"
17: #include "paths.h"
18: #include "tos.h"
19: #include "68kDisass.h"
20:
21: #define ADDRESS_ON_PC 1
22: #define USE_SYMBOLS 1
23:
24: typedef enum {
25: doptNoBrackets = 1, // hide brackets around absolute addressing
26: doptOpcodesSmall = 2, // opcodes are small letters
27: doptRegisterSmall = 4, // register names are small letters
28: doptStackSP = 8, // stack pointer is named "SP" instead of "A7" (except for MOVEM)
29: } Diss68kOptions;
30:
31: static Diss68kOptions options = doptOpcodesSmall | doptRegisterSmall | doptStackSP | doptNoBrackets;
32:
33: // values <0 will hide the group
34: static int optionPosAddress = 0; // current address
35: static int optionPosHexdump = 10; // 16-bit words at this address
36: static int optionPosLabel = 35; // label, if defined
37: static int optionPosOpcode = 47; // opcode
38: static int optionPosOperand = 57; // operands for the opcode
39: static int optionPosComment = 82; // comment, if defined
40:
41: /***
42: * Motorola 16-/32-Bit Microprocessor and coprocessor types
43: ***/
44: #define MC68000 0x000001 // 16-/32-Bit Microprocessor
45: #define MC68EC000 0x000002 // 16-/32-Bit Embedded Controller
46: #define MC68HC000 0x000004 // Low Power 16-/32-Bit Microprocessor
47: #define MC68008 0x000008 // 16-Bit Microprocessor with 8-Bit Data Bus
48: #define MC68010 0x000010 // 16-/32-Bit Virtual Memory Microprocessor
49: #define MC68020 0x000020 // 32-Bit Virtual Memory Microprocessor
50: #define MC68EC020 0x000040 // 32-Bit Embedded Controller (no PMMU)
51: #define MC68030 0x000080 // Second-Generation 32-Bit Enhanced Microprocessor
52: #define MC68EC030 0x000100 // 32-Bit Embedded Controller (no PMMU)
53: #define MC68040 0x000200 // Third-Generation 32-Bit Microprocessor
54: #define MC68LC040 0x000400 // Third-Generation 32-Bit Microprocessor (no FPU)
55: #define MC68EC040 0x000800 // 32-Bit Embedded Controller (no FPU, no PMMU)
56: #define MC68330 0x001000 // CPU32 Integrated CPU32 Processor
57: #define MC68340 0x002000 // CPU32 Integrated Processor with DMA
58: #define MC68060 0x004000 // Fourth-Generation 32-Bit Microprocessor
59: #define MC68LC060 0x008000 // Fourth-Generation 32-Bit Microprocessor (no FPU)
60: #define MC68EC060 0x010000 // Fourth-Generation 32-Bit Microprocessor (no FPU, no PMMU)
61: #define MC_CPU32 (MC68330|MC68340)
62:
63: #define MC_020 (MC68020|MC68EC020|MC68030|MC68EC030|MC68040|MC68LC040|MC68EC040|MC_CPU32|MC68060|MC68LC060|MC68EC060)
64: #define MC_ALL (MC68000|MC68EC000|MC68HC000|MC68008|MC68010|MC_020)
65:
66: #define MC68851 0x020000 // Paged Memory Management Unit
67:
68: #define MC68881 0x040000 // Floating-PointCoprocessor
69: #define MC68882 0x080000 // Enhanced Floating-Point Coprocessor
70:
71: #define MC_PMMU (MC68881|MC68882)
72: #define MC_FPU (MC68881|MC68882)
73:
74: static int optionCPUTypeMask = ( MC_ALL & ~MC68040 & ~MC_CPU32 & ~MC68060 ) | MC_PMMU | MC_FPU;
75:
76:
77: typedef enum {
78: dtNone,
79: dtByte, // a specific number of bytes, usually 1
80: dtWord, // one 16-bit value
81: dtLong, // one 32-bit value
82: dtOpcode, // an opcode of variable length
83: dtASCString, // a 0-byte terminated ASCII string
84: dtPointer, // a generic 32-bit pointer
85: dtFunctionPointer, // a 32-bit pointer to a function
86: dtStringArray, // a specific number of ASCII bytes
87: } Disass68kDataType;
88:
89: typedef struct {
90: char *name;
91: char *comment;
92: Disass68kDataType type;
93: int size;
94: } disStructElement;
95:
96: typedef struct {
97: char *name; // name of the structure
98: int size; // size of structure
99: int count; // number of lines
100: disStructElement *elements; // array of all elements of the struct
101: } disStructEntry;
102:
103: static int disStructCounts;
104: static disStructEntry *disStructEntries;
105:
106: typedef struct {
107: long addr; // address of the label
108: Disass68kDataType type; // type of the data on the address
109: int size; // size of the label, references inside it are addressed via base address + offset
110: int count; // number of elements at this address with the given size
111: int structIndex; // -1 no struct to describe the element
112: char *name; // name of the label
113: char *comment; // optional comment
114: } disSymbolEntry;
115:
116: static int disSymbolCounts;
117: static disSymbolEntry *disSymbolEntries;
118:
119:
120: static inline unsigned short Disass68kGetWord(long addr)
121: {
122: return get_word(addr);
123: }
124:
125: // Load a text file into memory, count the lines and replace the LF with 0-bytes.
126: static int Disass68kLoadTextFile(const char *filename, char **filebuf)
127: {
128: long index;
129:
130: if(filebuf)
131: *filebuf = NULL;
132: FILE *f = fopen(filename, "r");
133: if(!f) return 0;
134: if(fseek(f, 0, SEEK_END))
135: return 0;
136: long fileLength = ftell(f);
137: if(!fileLength) return 0;
138: if(fseek(f, 0, SEEK_SET))
139: return 0;
140: char *fbuf = malloc(fileLength);
141: if(!fbuf) return 0;
142: if((size_t)fileLength != fread(fbuf, sizeof(char), fileLength, f))
143: return 0;
144: int lineCount = 0;
145: for(index=0; index<fileLength; ++index)
146: {
147: if(fbuf[index] == '\r') // convert potential CR into a space (which we ignore at the end of the line anyway)
148: fbuf[index] = ' ';
149: if(fbuf[index] == '\n') // count LF and terminate line
150: {
151: ++lineCount;
152: fbuf[index] = 0;
153: }
154: }
155: if(filebuf)
156: *filebuf = fbuf;
157: return lineCount;
158: }
159:
160: static void Disass68kLoadStructInfo(const char *filename)
161: {
162: char *fbuf = NULL;
163: int lineCount = Disass68kLoadTextFile(filename, &fbuf);
164: if(!lineCount) { if(fbuf) free(fbuf); return; }
165: disStructEntry *se = NULL;
166: disStructEntries = realloc(disStructEntries, sizeof(disStructEntry) * (disStructCounts + lineCount));
167: if(!disStructEntries) { free(fbuf); return; }
168: char *line = fbuf;
169: char *nextLine;
170: int i,j;
171:
172: for(i=0; i<lineCount; line = nextLine, ++i)
173: {
174: // strip spaces at the end of the line, remember the ptr to the next line
175: char *sp = line;
176: while(*sp++)
177: ;
178: nextLine = sp--;
179: while(isspace(*--sp))
180: *sp = 0;
181:
182: if(line[0] == '{')
183: {
184: se = &disStructEntries[disStructCounts];
185: se->name = strdup(line+1);
186: se->count = 0;
187: se->elements = malloc(sizeof(disStructElement) * lineCount); // lineCount is way too much, but safe
188: } else if(line[0] == '}') {
189: if(se)
190: {
191: se->size = 0;
192: for(j=0; j<se->count; ++j)
193: se->size += se->elements[j].size;
194: // printf("%s : %d bytes\n", se->name, se->size);
195: ++disStructCounts;
196: se = NULL;
197: }
198: } else if(line[0] == '#') {
199: disStructElement dse;
200: int val = 0;
201: int index = 2;
202: if(line[1] == 'A' || line[1] == 'B')
203: {
204: for(; isdigit(line[index]); ++index)
205: {
206: val *= 10;
207: val += line[index] - '0';
208: }
209: }
210: if(val == 0) val = 1;
211: dse.name = NULL;
212: switch(line[1])
213: {
214: case 'A': dse.type = dtStringArray; dse.size = val; dse.name = strdup(line + index + 1); break;
215: case 'B': dse.type = dtByte; dse.size = val; break;
216: case 'W': dse.type = dtWord; dse.size = 2; break;
217: case 'L': dse.type = dtLong; dse.size = 4; break;
218: case 'C': dse.type = dtOpcode; dse.size = 2; break;
219: case 'f': dse.type = dtFunctionPointer; dse.size = 4; break;
220: case 'p': dse.type = dtPointer; dse.size = 4; break;
221: default: dse.type = dtNone; dse.size = 0;
222: printf("Unknown type in \"%s\"\n", line); break;
223: }
224: if(!dse.name)
225: dse.name = strdup(line+3);
226: dse.comment = NULL;
227: if(se)
228: se->elements[se->count++] = dse;
229: }
230: }
231: free(fbuf);
232: }
233:
234: static void Disass68kLoadSymbols(const char *filename)
235: {
236: char *fbuf = NULL;
237: int lineCount = Disass68kLoadTextFile(filename, &fbuf);
238: if(!lineCount) { if(fbuf) free(fbuf); return; }
239: disSymbolEntries = realloc(disSymbolEntries, sizeof(disSymbolEntry) * (disSymbolCounts + lineCount));
240: if(!disSymbolEntries) { free(fbuf); return; }
241: char *line = fbuf;
242: char *nextLine;
243: int i,j;
244:
245: for(i=0; i<lineCount; line = nextLine, ++i)
246: {
247: // strip spaces at the end of the line, remember the ptr to the next line
248: char *sp = line;
249: while(*sp++)
250: ;
251: nextLine = sp--;
252: while(isspace(*--sp))
253: *sp = 0;
254:
255: // ignore empty lines
256: if(line[0] == 0)
257: continue;
258:
259: long addr;
260: sscanf(line, "%lx",&addr);
261: disSymbolEntries[disSymbolCounts].addr = addr;
262: disSymbolEntries[disSymbolCounts].structIndex = -1;
263:
264: char *parameterPtr[10];
265: int parameterCount = 0;
266: char *str = line;
267: do {
268: str = strchr(str, ',');
269: if(str)
270: {
271: char *ep = str;
272: while(isspace(*--ep))
273: *ep = 0;
274: *str++ = 0;
275: while(*str && isspace(*str))
276: ++str;
277: parameterPtr[parameterCount++] = str;
278: }
279: } while(str != NULL && parameterCount < 10);
280:
281: if(parameterCount != 3 && parameterCount != 4)
282: continue; // ignore line
283:
284: long size = 0;
285: int type = 0;
286: if(strlen(parameterPtr[0]) == 1)
287: {
288: switch(parameterPtr[0][0])
289: {
290: case 'A': type = dtASCString; size = 1; break; // ascii NULL
291: case 'B': type = dtByte; size = 1; break; // byte
292: case 'W': type = dtWord; size = 2; break; // word
293: case 'L': type = dtLong; size = 4; break; // long
294: case 'C': type = dtOpcode; size = 2; break; // code
295: case 'f': type = dtFunctionPointer; size = 4; break; // function pointer
296: case 'p': type = dtPointer; size = 4; break; // regular pointer
297: default: printf("ERROR: $%lx : %s\n", addr, parameterPtr[0]); continue;
298: }
299: } else {
300: for(j=0; j<disStructCounts; ++j)
301: {
302: disStructEntry *se = &disStructEntries[j];
303: if(se->name == NULL)
304: break;
305: if(strcmp(parameterPtr[0], se->name))
306: continue;
307: size = se->size;
308: disSymbolEntries[disSymbolCounts].structIndex = j;
309: }
310: }
311: if(!size)
312: continue;
313:
314: disSymbolEntries[disSymbolCounts].type = type;
315: disSymbolEntries[disSymbolCounts].size = size;
316: disSymbolEntries[disSymbolCounts].count = atol(parameterPtr[1]);
317: disSymbolEntries[disSymbolCounts].name = strdup(parameterPtr[2]);
318: disSymbolEntries[disSymbolCounts].comment = NULL;
319: if(parameterCount == 4)
320: disSymbolEntries[disSymbolCounts].comment = strdup(parameterPtr[3]);
321: ++disSymbolCounts;
322: }
323: free(fbuf);
324: }
325:
326: static void Disass68kInit(const char *baseDirectory)
327: {
1.1.1.2 ! root 328: char filename[FILENAME_MAX];
1.1 root 329:
330: disStructCounts = 0;
331: sprintf(filename, "%s/DisassStructs.txt", baseDirectory);
332: Disass68kLoadStructInfo(filename);
333: sprintf(filename, "%s/DisassStructs_%4.4X.txt", baseDirectory, TosVersion);
334: Disass68kLoadStructInfo(filename);
335:
336: disSymbolCounts = 0;
337: sprintf(filename, "%s/DisassSymbols.txt", baseDirectory);
338: Disass68kLoadSymbols(filename);
339: sprintf(filename, "%s/DisassSymbols_%4.4X.txt", baseDirectory, TosVersion);
340: Disass68kLoadSymbols(filename);
341: }
342:
343:
344:
345: static Disass68kDataType Disass68kType(long addr, char *addressLabel, char *commentBuffer, int *count)
346: {
347: int i,j;
348:
349: addressLabel[0] = 0;
350: commentBuffer[0] = 0;
351: for(i=0; i<disSymbolCounts; ++i)
352: {
353: const disSymbolEntry *dse = &disSymbolEntries[i];
354: int offset = addr - dse->addr;
355: if(offset < 0 || offset >= dse->count * dse->size)
356: continue;
357:
358: // no special struct that devices this value?
359: if(dse->structIndex < 0)
360: {
361: offset = (offset + dse->size - 1) / dse->size;
362: *count = dse->count - offset;
363: if(offset == 0) // only in the first line
364: {
365: strcpy(addressLabel, dse->name);
366: if(dse->comment)
367: strcpy(commentBuffer, dse->comment);
368: }
369: return dse->type;
370: }
371:
372: *count = 1;
373: const disStructEntry *se = &disStructEntries[dse->structIndex];
374: for(j=0; j<se->count; ++j)
375: {
376: const disStructElement *e = &se->elements[j];
377: if(offset < e->size)
378: {
379: if(e->type == dtStringArray)
380: *count = e->size;
381: if(j == 0)
382: strcpy(addressLabel, dse->name);
383:
384: sprintf(commentBuffer, "[%s]", e->name);
385: if(e->comment)
386: strcat(commentBuffer, e->comment);
387: return e->type;
388: }
389: offset -= e->size;
390: }
391: return dse->size;
392: }
393: return dtNone;
394: }
395:
396: /***
397: * Lookup a symbol name
398: ***/
399: static const char *Disass68kSymbolName(long addr, int size)
400: {
401: int i;
402:
403: for(i=0; i<disSymbolCounts; ++i)
404: {
405: const disSymbolEntry *dse = &disSymbolEntries[i];
406: int offset = addr - dse->addr;
407: if(offset < 0 || offset >= dse->count * dse->size)
408: continue;
409:
410: if(dse->name[0] == 0)
411: return NULL;
412:
413: int reminder = offset % dse->size;
414: offset /= dse->size;
415:
416: static char symbolName[128];
417: strcpy(symbolName, dse->name);
418: if(offset)
419: sprintf(symbolName+strlen(symbolName), "+%d*%d", dse->size, offset);
420: if(reminder)
421: sprintf(symbolName+strlen(symbolName), "+%d", reminder);
422: return symbolName;
423: }
424: return NULL;
425: }
426:
427: /***
428: * return a string pointer to display a register name
429: ***/
430: static const char *Disass68kRegname(int reg)
431: {
432: static char regName[3];
433: switch(reg)
434: {
435: case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
436: sprintf(regName, "%c%d", (options & doptRegisterSmall ? 'd' : 'D'), reg);
437: break;
438:
439: case 0x0F:
440: if(options & doptStackSP) // display A7 as SP
441: {
442: if(options & doptRegisterSmall)
443: return "sp";
444: return "SP";
445: }
446: case 0x08: case 0x09: case 0x0A: case 0x0B: case 0x0C: case 0x0D: case 0x0E:
447: sprintf(regName, "%c%d", (options & doptRegisterSmall ? 'a' : 'A'), reg & 7);
448: break;
449: }
450: return regName;
451: }
452:
453: /***
454: * return a string pointer to display a register name
455: ***/
456: static const char *Disass68kNumber(int val)
457: {
458: static char numString[32];
459: if(val >= -9 && val <= 9)
460: {
461: sprintf(numString, "%d", val);
462: } else {
463: // 4 characters/numbers or underscore (e.g. for cookies)
464: char c0 = (val >> 24) & 0xFF;
465: char c1 = (val >> 16) & 0xFF;
466: char c2 = (val >> 8) & 0xFF;
467: char c3 = (val >> 0) & 0xFF;
468: if((isalnum(c0) || c0 == '_') && (isalnum(c1) || c1 == '_') && (isalnum(c2) || c2 == '_') && (isalnum(c3) || c3 == '_'))
469: {
470: sprintf(numString, "'%c%c%c%c'", c0, c1, c2, c3);
471: } else {
472: sprintf(numString, "$%x", val);
473: }
474: }
475: return numString;
476: }
477:
478: /***
479: * Supported registers for e.g. MOVEC
480: ***/
481: #define REG_CCR -1
482: #define REG_SR -2
483: #define REG_PC -3
484: #define REG_ZPC -4
485: #define REG_TT0 -8
486: #define REG_TT1 -9
487: #define REG_MMUSR -10
488: #define REG_USP 0x800
489: #define REG_SFC 0x000
490: #define REG_DFC 0x001
491: #define REG_TC 0x10000
492: #define REG_SRP 0x10002
493: #define REG_CRP 0x10003
494: #define REG_VAL 0x20000
495: #define REG_CACHES_NONE 0x20010
496: #define REG_CACHES_IC 0x20011
497: #define REG_CACHES_DC 0x20012
498: #define REG_CACHES_ICDC 0x20013
499: #define REG_FPU_FPCR 0x30004
500: #define REG_FPU_FPSR 0x30002
501: #define REG_FPU_FPIAR 0x30001
502:
503: static const char *Disass68kSpecialRegister(int reg)
504: {
505: static char buf[8];
506: const char *sp = NULL;
507: switch (reg)
508: {
509: case 0x000: sp = "SFC"; break;
510: case 0x001: sp = "DFC"; break;
511: case 0x002: sp = "CACR"; break;
512: case 0x003: sp = "TC"; break;
513: case 0x004: sp = "ITT0"; break; // IACR0 on an 68EC040 only
514: case 0x005: sp = "ITT1"; break; // IACR1 on an 68EC040 only
515: case 0x006: sp = "DTT0"; break; // DACR0 on an 68EC040 only
516: case 0x007: sp = "DTT1"; break; // DACR1 on an 68EC040 only
517: case 0x008: sp = "BUSCR"; break;
518:
519: case 0x800: sp = "USP"; break;
520: case 0x801: sp = "VBR"; break;
521: case 0x802: sp = "CAAR"; break;
522: case 0x803: sp = "MSP"; break;
523: case 0x804: sp = "ISP"; break;
524: case 0x805: sp = "MMUSR"; break;
525: case 0x806: sp = "URP"; break;
526: case 0x807: sp = "SRP"; break;
527: case 0x808: sp = "PCR"; break;
528:
529: // MMU register
530: case 0x10000: sp = "TC"; break;
531: case 0x10001: sp = "DRP"; break;
532: case 0x10002: sp = "SRP"; break;
533: case 0x10003: sp = "CRP"; break;
534: case 0x10004: sp = "CAL"; break;
535: case 0x10005: sp = "VAL"; break;
536: case 0x10006: sp = "SCCR"; break;
537: case 0x10007: sp = "ACR"; break;
538:
539: case REG_CCR: sp = "CCR"; break;
540: case REG_SR: sp = "SR"; break;
541: case REG_PC: sp = "PC"; break;
542: case REG_ZPC: sp = "ZPC"; break;
543: case REG_TT0: sp = "TT0"; break;
544: case REG_TT1: sp = "TT1"; break;
545: case REG_MMUSR: sp = "MMUSR"; break;
546:
547: case REG_VAL: sp = "VAL"; break;
548:
549: case REG_CACHES_NONE: sp = "NC"; break;
550: case REG_CACHES_IC: sp = "IC"; break;
551: case REG_CACHES_DC: sp = "DC"; break;
552: case REG_CACHES_ICDC: sp = "IC/DC"; break; // GCC lists this as "BC"
553:
554: case REG_FPU_FPCR: sp = "FPCR"; break;
555: case REG_FPU_FPSR: sp = "FPSR"; break;
556: case REG_FPU_FPIAR: sp = "FPIAR"; break;
557:
558: // unknown register => unknown opcode!
559: default: break;
560: }
561: if(options & doptRegisterSmall)
562: {
563: strcpy(buf, sp);
564: char *bp = buf;
565: for(; *bp; ++bp)
566: *bp = tolower(*bp);
567: return buf;
568: }
569: return sp;
570: }
571:
572: /***
573: * 680x0 EA disassembly, supports all address modes
574: *
575: * disassbuf = output buffer for the EA, empty string in case of an illegal EA
576: * addr = pointer to the address, which Disass68kGetWord() will allow to read memory.
577: * Incremented by the function to point behind the opcode, when done
578: * ea = 6-bit ea from the opcode
579: * size = addressed size of the opcode in bytes (e.g. 1,2,4 for MOVE.B, MOVE.W, MOVE.L), only used for immediate addressing
580: ***/
581:
582: #define EA_Dn 0x00001 // Dn
583: #define EA_An 0x00002 // An
584: #define EA_Ani 0x00004 // (An)
585: #define EA_Anip 0x00008 // (An)+
586: #define EA_piAn 0x00010 // -(An)
587: #define EA_dAn 0x00020 // d(An), d(An,Dn), etc.
588: #define EA_PCRel 0x00040 // d(PC), d(PC,Dn), etc.
589: #define EA_Abs 0x00080 // abs.w, abs.l
590: #define EA_Immed 0x00100 // #<val>
591:
592: #define EA_ImmedParameter 0x0200 // an immediate value as a parameter
593: #define EA_ValueParameter 0x0400 // an immediate value as a parameter without the "#"
594: #define EA_SpecialRegister 0x0800 // any special register e.g. SR,CCR,USP,etc
595: #define EA_PCDisplacement 0x1000 // PC relative jump, like for BRA and friends
596:
597: #define EA_All (EA_Dn | EA_An | EA_Ani | EA_Anip | EA_piAn | EA_dAn | EA_Abs | EA_Immed | EA_PCRel)
598: #define EA_Dest (EA_Dn | EA_An | EA_Ani | EA_Anip | EA_piAn | EA_dAn | EA_Abs)
599:
600: static char *Disass68kEA(char *disassbuf, char *commentBuffer, long *addr, long opcodeAddr, int ea, int size, int allowedEAs, int parameterValue, int disassFlag)
601: {
602: unsigned short eWord1;
603: unsigned short eWord2;
604: int xn,c,scale;
605: int reg = ea & 7;
606: const char *sp;
607: long val;
608: val = 0;
609:
610: disassbuf[0] = 0;
611: switch(ea)
612: {
613: // M=000 = 0 Dn
614: // Data Register Direct Mode
615: // Dn
616: // M=001 = 1 An
617: // Address Register Direct Mode
618: // An
619: case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
620: if((allowedEAs & EA_Dn) != EA_Dn)
621: break;
622: sprintf(disassbuf, "%s", Disass68kRegname(ea & 0x0F));
623: break;
624: case 0x08: case 0x09: case 0x0A: case 0x0B: case 0x0C: case 0x0D: case 0x0E: case 0x0F:
625: if((allowedEAs & EA_An) != EA_An)
626: break;
627: sprintf(disassbuf, "%s", Disass68kRegname(ea & 0x0F));
628: break;
629:
630: // M=010 = 2
631: // Address Register Indirect Mode
632: // (An)
633: case 0x10: case 0x11: case 0x12: case 0x13: case 0x14: case 0x15: case 0x16: case 0x17:
634: if((allowedEAs & EA_Ani) != EA_Ani)
635: break;
636: sprintf(disassbuf, "(%s)", Disass68kRegname(reg | 8));
637: break;
638:
639: // M=011 = 3
640: // Address Register Indirect with Postincrement Mode
641: // (An) +
642: case 0x18: case 0x19: case 0x1A: case 0x1B: case 0x1C: case 0x1D: case 0x1E: case 0x1F:
643: if((allowedEAs & EA_Anip) != EA_Anip)
644: break;
645: sprintf(disassbuf, "(%s)+", Disass68kRegname(reg | 8));
646: break;
647:
648: // M=100 = 4
649: // Address Register Indirect with Predecrement Mode
650: // – (An)
651: case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
652: if((allowedEAs & EA_piAn) != EA_piAn)
653: break;
654: sprintf(disassbuf, "-(%s)", Disass68kRegname(reg | 8));
655: break;
656:
657: // M=101 = 5
658: // Address Register Indirect with Displacement Mode
659: // (d16,An)
660: case 0x28: case 0x29: case 0x2A: case 0x2B: case 0x2C: case 0x2D: case 0x2E: case 0x2F:
661: if((allowedEAs & EA_dAn) != EA_dAn)
662: break;
663: eWord1 = Disass68kGetWord(*addr); *addr += 2;
664: sprintf(disassbuf, "%s(%s)", Disass68kNumber(eWord1), Disass68kRegname(reg | 8));
665: break;
666:
667: // M=111 = 7, Xn/reg = 011 = 3
668: // Program Counter Indirect with Index (Base Displacement) Mode
669: // (bd, PC, Xn. SIZE*SCALE)
670: // Program Counter Memory Indirect Postindexed Mode
671: // ([bd,PC],Xn.SIZE*SCALE,od)
672: // Program Counter Memory Indirect Preindexed Mode
673: // ([bd,PC,Xn.SIZE*SCALE],od)
674: case 0x3B:
675: // This is equal to the following, except that instead of An, it is PC relative
676:
677: // M=110 = 6
678: // Address Register Indirect with Index (Base Displacement) Mode
679: // (bd,An,Xn.SIZE*SCALE)
680: // Memory Indirect Postindexed Mode
681: // ([bd,An],Xn.SIZE*SCALE,od)
682: // Memory Indirect Preindexed Mode
683: // ([bd, An, Xn.SIZE*SCALE], od)
684: case 0x30: case 0x31: case 0x32: case 0x33: case 0x34: case 0x35: case 0x36: case 0x37:
685: eWord1 = Disass68kGetWord(*addr); *addr += 2;
686: xn = (eWord1 >> 12) & 0x0F; // Register D0..D7/A0..A7
687: c = ((eWord1 >> 11) & 1) ? 'l' : 'w'; // Word/Long-Word Index Size 0 = Sign-Extended Word 1 = Long Word
688: scale = (eWord1 >> 9) & 3; // Scale Factor 00 = 1 01 = 2 10 = 4 11 = 8
689: char regName[3];
690: if(ea == 0x3B)
691: {
692: sp = Disass68kSpecialRegister(REG_PC);
693: if(!sp) return NULL;
694: strcpy(regName, sp);
695: } else {
696: sprintf(regName, "%s", Disass68kRegname(reg | 8));
697: }
698:
699: if((eWord1 & 0x0100) == 0)
700: {
701: // BRIEF EXTENSION WORD FORMAT
702: if(ea == 0x3B)
703: {
704: if((allowedEAs & EA_PCRel) != EA_PCRel)
705: break;
706: } else {
707: if((allowedEAs & EA_dAn) != EA_dAn)
708: break;
709: }
710:
711: // Address Register Indirect with Index (8-Bit Displacement) Mode
712: // (d8 ,An, Xn.SIZE*SCALE)
713: const char *numStr = Disass68kNumber(eWord1 & 0xFF);
714: if(numStr[0] == '0' && numStr[1] == 0)
715: numStr = "";
716:
717: // scale is only on 68020 and later supported
718: if(scale != 0 && (optionCPUTypeMask & MC_020) == 0)
719: return NULL;
720:
721: if(scale == 0)
722: {
723: #if ADDRESS_ON_PC
724: if(ea == 0x3B)
725: sprintf(disassbuf, "$%lx(%s,%s.%c)", (signed char)(eWord1 & 0xFF) + opcodeAddr + 2, Disass68kSpecialRegister(REG_PC), Disass68kRegname(xn), c);
726: else
727: #endif
728: sprintf(disassbuf, "%s(%s,%s.%c)", numStr, regName, Disass68kRegname(xn), c);
729: } else
730: {
731: #if ADDRESS_ON_PC
732: if(ea == 0x3B)
733: sprintf(disassbuf, "$%lx(%s,%s.%c*%d)", (signed char)(eWord1 & 0xFF) + opcodeAddr + 2, Disass68kSpecialRegister(REG_PC), Disass68kRegname(xn), c, 1 << scale);
734: else
735: #endif
736: sprintf(disassbuf, "%s(%s,%s.%c*%d)", numStr, regName, Disass68kRegname(xn), c, 1 << scale);
737: }
738: #if USE_SYMBOLS
739: if(ea == 0x3B)
740: {
741: const char *symStr = Disass68kSymbolName((signed char)(eWord1 & 0xFF) + opcodeAddr + 2, size);
742: if(symStr)
743: {
744: commentBuffer += strlen(commentBuffer);
745: sprintf(commentBuffer+strlen(commentBuffer), "%s", symStr);
746: }
747: }
748: #endif
749: #if !ADDRESS_ON_PC
750: if(ea == 0x3B)
751: {
752: commentBuffer += strlen(commentBuffer);
753: sprintf(commentBuffer+strlen(commentBuffer), "$%lx", (signed char)(eWord1 & 0xFF) + opcodeAddr + 2);
754: }
755: #endif
756: } else {
757: // FULL EXTENSION WORD FORMAT
758:
759: int bs = (eWord1 >> 7) & 1; // Base Register Suppress 0 = Base Register Added 1 = Base Register Suppressed
760: int is = (eWord1 >> 6) & 1; // Index Suppress 0 = Evaluate and Add Index Operand 1 = Suppress Index Operand
761: int bdSize = (eWord1 >> 4) & 3; // Base Displacement Size 00 = Reserved 01 = Null Displacement 10 = Word Displacement 11 = Long Displacement
762: int iis = eWord1 & 7; // Index/Indirect Selection Indirect and Indexing Operand Determined in Conjunction with Bit 6, Index Suppress
763: bool prefixComma;
764:
765: // reserved, has to be 0
766: if((eWord1 & 8) != 0 || bdSize == 0 || (is && iis > 3) || iis == 4)
767: break;
768:
769: // full extension format is only supported on 68020 or later
770: if((optionCPUTypeMask & MC_020) == 0)
771: return NULL;
772:
773: if(ea == 0x3B)
774: {
775: if((allowedEAs & EA_PCRel) != EA_PCRel)
776: break;
777: } else {
778: if((allowedEAs & EA_dAn) != EA_dAn)
779: break;
780: }
781:
782: long bd = 0;
783: switch(bdSize)
784: {
785: case 3:
786: bd = Disass68kGetWord(*addr); *addr += 2;
787: bd <<= 16;
788: case 2:
789: bd |= Disass68kGetWord(*addr); *addr += 2;
790: break;
791: default:
792: break;
793: }
794:
795: prefixComma = false;
796: if(bdSize >= 2 && iis == 0)
797: sprintf(disassbuf, "%s", Disass68kNumber(bd));
798: strcat(disassbuf, "(");
799: if(iis != 0)
800: {
801: // the CPU32 doesn't support the memory indirect mode
802: if(optionCPUTypeMask & MC_CPU32)
803: return NULL;
804:
805: strcat(disassbuf, "[");
806: }
807: if(bdSize >= 2 && iis != 0)
808: {
809: sprintf(disassbuf+strlen(disassbuf), "%s", Disass68kNumber(bd));
810: prefixComma = true;
811: }
812: if(bdSize == 1 && ((bs && is && iis > 0) || (bs && iis >= 5)))
813: {
814: if(ea == 0x3B)
815: {
816: sp = Disass68kSpecialRegister(REG_ZPC);
817: if(!sp) return NULL;
818: strcat(disassbuf, sp);
819: } else {
820: strcat(disassbuf, "0");
821: }
822: }
823: if(!bs)
824: {
825: if(prefixComma)
826: strcat(disassbuf, ",");
827: strcat(disassbuf, regName);
828: prefixComma = true;
829: }
830: if(iis >= 5 && iis <= 7)
831: {
832: strcat(disassbuf, "]");
833: prefixComma = true;
834: }
835: if(!is)
836: {
837: if(prefixComma)
838: strcat(disassbuf, ",");
839: if(scale == 0)
840: {
841: sprintf(disassbuf+strlen(disassbuf), "%s.%c", Disass68kRegname(xn), c);
842: } else
843: {
844: sprintf(disassbuf+strlen(disassbuf), "%s.%c*%d", Disass68kRegname(xn), c, 1 << scale);
845: }
846: }
847: if(iis >= 1 && iis <= 3)
848: {
849: strcat(disassbuf, "]");
850: prefixComma = true;
851: }
852: long od = 0;
853: switch(iis & 3)
854: {
855: case 3:
856: od = Disass68kGetWord(*addr); *addr += 2;
857: od <<= 16;
858: case 2:
859: od |= Disass68kGetWord(*addr); *addr += 2;
860: if(prefixComma)
861: strcat(disassbuf, ",");
862: sprintf(disassbuf+strlen(disassbuf), "%s", Disass68kNumber(od));
863: break;
864: default:
865: break;
866: }
867: strcat(disassbuf, ")");
868: }
869: break;
870:
871: // M=111 = 7, Xn/reg = 000 = 0
872: // Absolute Short Addressing Mode
873: // (xxx).W
874: case 0x38:
875: if((allowedEAs & EA_Abs) != EA_Abs)
876: break;
877: eWord1 = Disass68kGetWord(*addr); *addr += 2;
878: val = eWord1;
879: if(eWord1 & 0x8000)
880: val |= 0xFFFF0000;
881: #if USE_SYMBOLS
882: sp = Disass68kSymbolName(val, size);
883: if(sp)
884: {
885: if(options & doptNoBrackets)
886: sprintf(disassbuf, "%s.w", sp);
887: else
888: sprintf(disassbuf, "(%s).w", sp);
889: break;
890: }
891: #endif
892: if(options & doptNoBrackets)
893: {
894: if(val & 0x80000000)
895: sprintf(disassbuf, "$%8.8lx.w", val);
896: else
897: sprintf(disassbuf, "$%4.4lx.w", val);
898: } else {
899: if(val & 0x80000000)
900: sprintf(disassbuf, "($%8.8lx).w", val);
901: else
902: sprintf(disassbuf, "($%4.4lx).w", val);
903: }
904: break;
905:
906: // M=111 = 7, Xn/reg = 001 = 1
907: // Absolute Long Addressing Mode
908: // (xxx).L
909: case 0x39:
910: if((allowedEAs & EA_Abs) != EA_Abs)
911: break;
912: eWord1 = Disass68kGetWord(*addr); *addr += 2;
913: eWord2 = Disass68kGetWord(*addr); *addr += 2;
914: #if USE_SYMBOLS
915: val = (eWord1 << 16) | eWord2;
916: sp = Disass68kSymbolName(val, size);
917: if(sp)
918: {
919: if(options & doptNoBrackets)
920: sprintf(disassbuf, "%s", sp);
921: else
922: sprintf(disassbuf, "(%s).l", sp);
923: break;
924: }
925: #endif
926: if(options & doptNoBrackets)
927: sprintf(disassbuf, "%s", Disass68kNumber((eWord1 << 16) | eWord2));
928: else
929: sprintf(disassbuf, "(%s).l", Disass68kNumber((eWord1 << 16) | eWord2));
930: break;
931:
932: // M=111 = 7, Xn/reg = 010 = 2
933: // Program Counter Indirect with Displacement Mode
934: // (d16,PC)
935: case 0x3A:
936: if((allowedEAs & EA_PCRel) != EA_PCRel)
937: break;
938: eWord1 = Disass68kGetWord(*addr); *addr += 2;
939: sp = Disass68kSpecialRegister(REG_PC);
940: if(!sp) return NULL;
941: #if ADDRESS_ON_PC
942: #if USE_SYMBOLS
943: sp = Disass68kSymbolName(((signed short)eWord1 + *addr - 2), size);
944: if(sp)
945: {
946: sprintf(disassbuf, "%s(%s)", sp, Disass68kSpecialRegister(REG_PC));
947: } else {
948: sprintf(disassbuf, "$%lx(%s)", (signed short)eWord1 + *addr - 2, Disass68kSpecialRegister(REG_PC));
949: }
950: #else
951: sprintf(disassbuf, "$%lx(%s)", (signed short)eWord1 + *addr - 2, Disass68kSpecialRegister(REG_PC));
952: #endif
953: #else
954: sprintf(disassbuf, "%s(%s)", Disass68kNumber(eWord1),sp);
955: sprintf(commentBuffer+strlen(commentBuffer), "$%lx", (signed short)eWord1 + *addr - 2);
956: #endif
957: break;
958:
959: // M=111 = 7, Xn/reg = 100 = 4
960: // Immediate Data
961: // #<xxx>
962: case 0x3C:
963: if((allowedEAs & EA_Immed) != EA_Immed)
964: break;
965: eWord1 = Disass68kGetWord(*addr); *addr += 2;
966: goto immed;
967:
968: case 0x0100: // Immediate Value as a parameter
969: if((allowedEAs & EA_ImmedParameter) != EA_ImmedParameter)
970: break;
971: eWord1 = parameterValue;
972: immed:
973: switch(size)
974: {
975: case 1: eWord1 &= 0xFF;
976: case 2:
977: #if USE_SYMBOLS
978: if(disassFlag)
979: {
980: val = eWord1;
981: if(eWord1 & 0x8000)
982: val |= 0xFFFF0000;
983: sp = Disass68kSymbolName(val, size);
984: if(sp)
985: {
986: sprintf(disassbuf, "#%s", sp);
987: break;
988: }
989: }
990: #endif
991: sprintf(disassbuf, "#%s", Disass68kNumber(eWord1));
992: break;
993: case 4: eWord2 = Disass68kGetWord(*addr); *addr += 2;
994: #if USE_SYMBOLS
995: if(disassFlag)
996: {
997: val = (eWord1 << 16) | eWord2;
998: sp = Disass68kSymbolName(val, size);
999: if(sp)
1000: {
1001: sprintf(disassbuf, "#%s", sp);
1002: break;
1003: }
1004: }
1005: #endif
1006: sprintf(disassbuf, "#%s", Disass68kNumber((eWord1 << 16) | eWord2));
1007: break;
1008: }
1009: break;
1010:
1011: case 0x0103:
1012: if((allowedEAs & EA_ValueParameter) != EA_ValueParameter)
1013: break;
1014: sprintf(disassbuf, "%d", parameterValue);
1015: break;
1016:
1017: case 0x0101: // Special Registers as in the parameter
1018: if((allowedEAs & EA_SpecialRegister) != EA_SpecialRegister)
1019: break;
1020: sp = Disass68kSpecialRegister(parameterValue);
1021: if(!sp) return NULL;
1022: strcpy(disassbuf, sp);
1023: break;
1024:
1025: case 0x0102: // PC relative jump, like for BRA and friends
1026: if((allowedEAs & EA_PCDisplacement) != EA_PCDisplacement)
1027: break;
1028: signed long pcoffset = 0;
1029: switch(size)
1030: {
1031: case 1: pcoffset = (signed char)parameterValue;
1032: break;
1033: case 2: eWord1 = Disass68kGetWord(*addr); *addr += 2;
1034: pcoffset = (signed short)eWord1;
1035: pcoffset -= 2;
1036: break;
1037: case 4: eWord1 = Disass68kGetWord(*addr); *addr += 2;
1038: eWord2 = Disass68kGetWord(*addr); *addr += 2;
1039: pcoffset = (signed int)((eWord1 << 16) | eWord2);
1040: pcoffset -= 4;
1041: break;
1042: }
1043: #if ADDRESS_ON_PC
1044: #if USE_SYMBOLS
1045: sp = Disass68kSymbolName((*addr + pcoffset), size);
1046: if(sp)
1047: {
1048: strcat(disassbuf, sp);
1049: } else {
1050: sprintf(disassbuf, "$%lx", *addr + pcoffset);
1051: }
1052: #else
1053: sprintf(disassbuf, "$%lx", *addr + pcoffset);
1054: #endif
1055: #else
1056: if(pcoffset < 0)
1057: {
1058: sprintf(disassbuf, "*-$%lx", -pcoffset - 2);
1059: } else {
1060: sprintf(disassbuf, "*+$%lx", pcoffset + 2);
1061: }
1062: sprintf(commentBuffer+strlen(commentBuffer), "$%lx", *addr + pcoffset);
1063: #endif
1064: break;
1065:
1066: default: // 0x3D..0x3F are reserved
1067: break;
1068:
1069: }
1070: if(disassbuf[0] == 0)
1071: return NULL;
1072: return disassbuf + strlen(disassbuf);
1073: }
1074:
1075: /***
1076: * Create a register list for the MOVEM opcode
1077: ***/
1078: static char *Disass68kReglist(char *buf, unsigned short reglist)
1079: {
1080: int bit;
1081: int lastBit = -99;
1082: int lastBitStart = -99;
1083: char regD = options & doptRegisterSmall ? 'd' : 'D';
1084: char regA = options & doptRegisterSmall ? 'a' : 'A';
1085: for(bit=0; bit<=15; ++bit)
1086: {
1087: // bit clear?
1088: if((reglist & (1 << bit)) == 0)
1089: {
1090: // do we have a run? => close it!
1091: if(lastBitStart >= 0 && lastBitStart != (bit - 1))
1092: {
1093: *buf++ = '-';
1094: *buf++ = ((bit-1) >= 8) ? regA : regD;
1095: *buf++ = '0' + ((bit-1) & 7);
1096: }
1097: lastBitStart = -1;
1098: continue;
1099: }
1100: // reset when switching from D to A
1101: if(bit == 8 && lastBitStart >= 0)
1102: {
1103: *buf++ = '-';
1104: *buf++ = regD;
1105: *buf++ = '7';
1106: lastBit = 0;
1107: lastBitStart = -99;
1108: }
1109: // separate bits, skip runs of bits to merge them later
1110: if(lastBit >= 0)
1111: {
1112: if(lastBit == bit - 1)
1113: {
1114: lastBit = bit;
1115: continue;
1116: }
1117: *buf++ = '/';
1118: }
1119: *buf++ = (bit >= 8) ? regA : regD;
1120: *buf++ = '0' + (bit & 7);
1121: lastBit = bit;
1122: lastBitStart = bit;
1123: }
1124: if(lastBitStart >= 0 && lastBitStart != (bit - 1))
1125: {
1126: *buf++ = '-';
1127: *buf++ = regA;
1128: *buf++ = '7';
1129: }
1130: if(lastBit < 0)
1131: {
1132: *buf++ = '0';
1133: }
1134: *buf = 0;
1135: return buf;
1136: }
1137:
1138: /***
1139: * Flip the bits in an unsigned short, for MOVEM RegList,-(An)
1140: ***/
1141: static unsigned short Disass68kFlipBits(unsigned short mask)
1142: {
1143: unsigned short retMask = 0;
1144: int i;
1145:
1146: for(i=0; i<=15; ++i)
1147: if(mask & (1 << i))
1148: retMask |= (1 << (15-i));
1149: return retMask;
1150: }
1151:
1152: /***
1153: * Create a register list for the MOVEM opcode
1154: ***/
1155: static char *Disass68kFPUReglist(char *buf, unsigned char reglist)
1156: {
1157: int bit;
1158: int lastBit = -99;
1159: int lastBitStart = -99;
1160: char regFP1 = options & doptRegisterSmall ? 'f' : 'F';
1161: char regFP2 = options & doptRegisterSmall ? 'p' : 'P';
1162: for(bit=0; bit<=7; ++bit)
1163: {
1164: // bit clear?
1165: if((reglist & (1 << bit)) == 0)
1166: {
1167: // do we have a run? => close it!
1168: if(lastBitStart >= 0 && lastBitStart != (bit - 1))
1169: {
1170: *buf++ = '-';
1171: *buf++ = regFP1;
1172: *buf++ = regFP2;
1173: *buf++ = '0' + ((bit-1) & 7);
1174: }
1175: lastBitStart = -1;
1176: continue;
1177: }
1178: // separate bits, skip runs of bits to merge them later
1179: if(lastBit >= 0)
1180: {
1181: if(lastBit == bit - 1)
1182: {
1183: lastBit = bit;
1184: continue;
1185: }
1186: *buf++ = '/';
1187: }
1188: *buf++ = regFP1;
1189: *buf++ = regFP2;
1190: *buf++ = '0' + (bit & 7);
1191: lastBit = bit;
1192: lastBitStart = bit;
1193: }
1194: if(lastBitStart >= 0 && lastBitStart != (bit - 1))
1195: {
1196: *buf++ = '-';
1197: *buf++ = regFP1;
1198: *buf++ = regFP2;
1199: *buf++ = '7';
1200: }
1201: if(lastBit < 0)
1202: {
1203: *buf++ = '0';
1204: }
1205: *buf = 0;
1206: return buf;
1207: }
1208:
1209:
1210: /***
1211: * List of special cases for the operands
1212: ***/
1213: typedef enum {
1214: ofNone,
1215: ofEa,
1216: ofDn,
1217: ofAn,
1218: ofAni,
1219: ofI,
1220: ofSpecReg,
1221: ofSpecExtReg,
1222: ofD16An,
1223: ofDestDn,
1224: ofDestAn,
1225: ofExtReg,
1226: ofExtAnip,
1227: ofExtReg0,
1228: ofExtRegA0,
1229: ofExtRegD04,
1230: ofExtRegA05,
1231: ofFPUReglist,
1232: ofFPUSRRegList,
1233: ofDestEa6,
1234: ofDestAbsL,
1235: ofIOpcode,
1236: ofCAS,
1237: ofCAS2,
1238: ofI3,
1239: ofExtIm,
1240: ofExtIm32,
1241: ofExtIm4,
1242: ofExtIm10,
1243: ofDisp,
1244: ofPiAn,
1245: ofDestPiAn,
1246: ofAnip,
1247: ofDestAnip,
1248: ofBFEa,
1249: ofRegList,
1250: ofExt4Dn,
1251: ofFPU,
1252: ofFPUMOVE,
1253: ofFMOVECR,
1254: ofFPU3Reg,
1255: ofLineA,
1256: } Disass68kOpcodeFormat;
1257:
1258:
1259: /***
1260: * The order of the table is not important (with the exception of some FPU opcodes, which are commented further down),
1261: * as each opcode should decline if it doesn't match 100%. The 68k CPU also doesn't do guessing based on the context!
1262: ***/
1263: typedef const struct {
1264: int cpuMask;
1265: unsigned long opcodeMask[2*5];
1266: char operationSize[4];
1267: char op[5];
1268: const char *opcodeName;
1269: int parameter[5];
1270: int disassFlag;
1271: } OpcodeTableStruct;
1272:
1273: static const OpcodeTableStruct OpcodeTable[] = {
1274: { MC_ALL, {0xff00, 0x0000}, {-1,6,2,0}, {ofI,ofEa}, "ORI.?",{0,EA_Immed|EA_PCRel|EA_An}},
1275: { MC_ALL, {0xf1c0, 0x0100}, {4}, {ofDestDn,ofEa}, "BTST",{0,EA_An|EA_Immed} },
1276: { MC_ALL, {0xf1c0, 0x0140}, {4}, {ofDestDn,ofEa}, "BCHG",{0,EA_Immed|EA_PCRel|EA_An}},
1277: { MC_ALL, {0xf1c0, 0x0180}, {4}, {ofDestDn,ofEa}, "BCLR",{0,EA_Immed|EA_PCRel|EA_An}},
1278: { MC_ALL, {0xf1c0, 0x01C0}, {4}, {ofDestDn,ofEa}, "BSET",{0,EA_Immed|EA_PCRel|EA_An}},
1279: { MC_ALL-MC68060, {0xf1f8, 0x0108}, {2}, {ofD16An,ofDestDn}, "MOVEP.W"},
1280: { MC_ALL-MC68060, {0xf1f8, 0x0148}, {4}, {ofD16An,ofDestDn}, "MOVEP.L"},
1281: { MC_ALL-MC68060, {0xf1f8, 0x0188}, {2}, {ofDestDn,ofD16An}, "MOVEP.W"},
1282: { MC_ALL-MC68060, {0xf1f8, 0x01C8}, {4}, {ofDestDn,ofD16An}, "MOVEP.L"},
1283: { MC_ALL, {0xff00, 0x0200}, {-1,6,2,0}, {ofI,ofEa}, "ANDI.?",{0,EA_Immed|EA_PCRel|EA_An}},
1284: { MC_ALL, {0xff00, 0x0400}, {-1,6,2,0}, {ofI,ofEa}, "SUBI.?",{0,EA_Immed|EA_PCRel|EA_An}},
1285: { MC_ALL, {0xff00, 0x0600}, {-1,6,2,0}, {ofI,ofEa}, "ADDI.?",{0,EA_Immed|EA_PCRel|EA_An}},
1286: { MC_ALL, {0xffc0, 0x0800}, {1}, {ofI,ofEa}, "BTST",{0,EA_An|EA_Immed} },
1287: { MC_ALL, {0xffc0, 0x0840}, {1}, {ofI,ofEa}, "BCHG",{0,EA_Immed|EA_PCRel|EA_An}},
1288: { MC_ALL, {0xffc0, 0x0880}, {1}, {ofI,ofEa}, "BCLR",{0,EA_Immed|EA_PCRel|EA_An}},
1289: { MC_ALL, {0xffc0, 0x08C0}, {1}, {ofI,ofEa}, "BSET",{0,EA_Immed|EA_PCRel|EA_An}},
1290: { MC_ALL, {0xff00, 0x0A00}, {-1,6,2,0}, {ofI,ofEa}, "EORI.?",{0,EA_Immed|EA_PCRel|EA_An}},
1291: { MC_ALL, {0xff00, 0x0C00}, {-1,6,2,0}, {ofI,ofEa}, "CMPI.?",{0,EA_Immed|EA_An}},
1292: { MC_ALL, {0xffff, 0x003C}, {1}, {ofEa,ofSpecReg}, "ORI",{0,REG_CCR} },
1293: { MC_ALL, {0xffff, 0x007C}, {2}, {ofEa,ofSpecReg}, "ORI",{0,REG_SR} },
1294: { MC_ALL, {0xffff, 0x023C}, {1}, {ofEa,ofSpecReg}, "ANDI",{0,REG_CCR} },
1295: { MC_ALL, {0xffff, 0x027C}, {2}, {ofEa,ofSpecReg}, "ANDI",{0,REG_SR} },
1296: { MC_ALL, {0xffff, 0x0A3C}, {1}, {ofEa,ofSpecReg}, "EORI",{0,REG_CCR} },
1297: { MC_ALL, {0xffff, 0x0A7C}, {2}, {ofEa,ofSpecReg}, "EORI",{0,REG_SR} },
1298: { MC68020, {0xffc0, 0x06C0}, {1}, {ofEa}, "CALLM",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn} },
1299: { MC68020, {0xfff0, 0x06C0}, {1}, {ofEa}, "RTM"},
1300: { MC_020, {0xf9c0, 0x00C0, 0x0fff,0x0000}, {-1,9,2,0}, {ofEa,ofExtReg}, "CMP2.?",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn} },
1301: { MC_020, {0xf9c0, 0x00C0, 0x0fff,0x0800}, {-1,9,2,0}, {ofEa,ofExtReg}, "CHK2.?",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn} },
1302: { MC_020&~MC_CPU32, {0xffc0, 0x0AC0, 0xFE38,0x0000}, {1}, {ofCAS,ofEa}, "CAS.B",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1303: { MC_020&~MC_CPU32, {0xffc0, 0x0CC0, 0xFE38,0x0000}, {2}, {ofCAS,ofEa}, "CAS.W",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1304: { MC_020&~MC_CPU32, {0xffc0, 0x0EC0, 0xFE38,0x0000}, {4}, {ofCAS,ofEa}, "CAS.L",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1305: { MC_020&~MC_CPU32, {0xffff, 0x0CFC, 0x0E38,0x0000, 0x0E38,0x0000}, {2}, {ofCAS2}, "CAS2.W"},
1306: { MC_020&~MC_CPU32, {0xffff, 0x0EFC, 0x0E38,0x0000, 0x0E38,0x0000}, {4}, {ofCAS2}, "CAS2.L"},
1307: { MC68010|MC_020, {0xff00, 0x0e00, 0x0fff,0x0000}, {-1,6,2,0}, {ofEa,ofExtReg}, "MOVES.?",{EA_Immed|EA_PCRel|EA_An|EA_Dn,0}},
1308: { MC68010|MC_020, {0xff00, 0x0e00, 0x0fff,0x0800}, {-1,6,2,0}, {ofExtReg,ofEa}, "MOVES.?",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1309:
1310: { MC_ALL, {0xf000, 0x1000}, {1}, {ofEa,ofDestEa6}, "MOVE.B"},
1311:
1312: { MC_ALL, {0xf000, 0x2000}, {4}, {ofEa,ofDestEa6}, "MOVE.L"},
1313: { MC_ALL, {0xf1c0, 0x2040}, {4}, {ofEa,ofDestAn}, "MOVEA.L",{0},1},
1314:
1315: { MC_ALL, {0xf000, 0x3000}, {2}, {ofEa,ofDestEa6}, "MOVE.W"},
1316: { MC_ALL, {0xf1c0, 0x3040}, {2}, {ofEa,ofDestAn}, "MOVEA.W",{0},1},
1317:
1318: { MC_ALL, {0xff00, 0x4000}, {-1,6,2,0}, {ofEa}, "NEGX.?",{EA_Immed|EA_PCRel|EA_An}},
1319: { MC_020, {0xf1c0, 0x4100}, {4}, {ofEa,ofDestDn}, "CHK.L", {EA_An,0}},
1320: { MC_ALL, {0xf1c0, 0x4180}, {2}, {ofEa,ofDestDn}, "CHK.W", {EA_An,0}},
1321: { MC_ALL, {0xf1c0, 0x41c0}, {4}, {ofEa,ofDestAn}, "LEA",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn,0},1 },
1322: { MC_ALL, {0xff00, 0x4200}, {-1,6,2,0}, {ofEa}, "CLR.?",{EA_Immed|EA_PCRel|EA_An}},
1323: { MC_ALL, {0xff00, 0x4400}, {-1,6,2,0}, {ofEa}, "NEG.?",{EA_Immed|EA_PCRel|EA_An}},
1324: { MC_ALL, {0xff00, 0x4600}, {-1,6,2,0}, {ofEa}, "NOT.?",{EA_Immed|EA_PCRel|EA_An}},
1325: { MC_ALL, {0xffc0, 0x40c0}, {2}, {ofSpecReg,ofEa}, "MOVE",{REG_SR,EA_Immed|EA_PCRel|EA_An} },
1326: { MC_ALL, {0xffc0, 0x42c0}, {1}, {ofSpecReg,ofEa}, "MOVE",{REG_CCR,EA_Immed|EA_PCRel|EA_An} },
1327: { MC_ALL, {0xffc0, 0x44c0}, {1}, {ofEa,ofSpecReg}, "MOVE",{EA_An,REG_CCR} },
1328: { MC_ALL, {0xffc0, 0x46c0}, {2}, {ofEa,ofSpecReg}, "MOVE",{EA_An,REG_SR} },
1329: { MC_ALL, {0xffc0, 0x4800}, {1}, {ofEa}, "NBCD",{EA_Immed|EA_PCRel|EA_An}},
1330: { MC_020, {0xfff8, 0x4808}, {4}, {ofEa,ofI}, "LINK.L"},
1331: { MC_ALL, {0xffc0, 0x4840}, {0}, {ofEa}, "PEA",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn},1 },
1332: { MC_ALL, {0xfff8, 0x4840}, {4}, {ofEa}, "SWAP"},
1333: { MC68010|MC_020, {0xfff8, 0x4848}, {0}, {ofIOpcode}, "BKPT",{0x07} },
1334: { MC_ALL, {0xffc0, 0x4880, 0x10000}, {2}, {ofRegList,ofEa}, "MOVEM.W",{0,EA_Dn|EA_An|EA_Immed|EA_Anip|EA_PCRel} },
1335: { MC_ALL, {0xffc0, 0x48c0, 0x10000}, {4}, {ofRegList,ofEa}, "MOVEM.L",{0,EA_Dn|EA_An|EA_Immed|EA_Anip|EA_PCRel} },
1336: { MC_ALL, {0xfff8, 0x4880}, {2}, {ofEa}, "EXT.W"},
1337: { MC_ALL, {0xfff8, 0x48c0}, {4}, {ofEa}, "EXT.L"},
1338: { MC_020, {0xfff8, 0x49c0}, {4}, {ofEa}, "EXTB.L"},
1339: { MC_ALL, {0xff00, 0x4a00}, {-1,6,2,0}, {ofEa}, "TST.?"},
1340: { MC_ALL, {0xffc0, 0x4ac0}, {1}, {ofEa}, "TAS",{EA_Immed|EA_PCRel|EA_An}},
1341: { MC_CPU32, {0xffff, 0x4afa}, {0}, {ofNone}, "BGND"},
1342: { MC_ALL, {0xffff, 0x4afc}, {0}, {ofNone}, "ILLEGAL"},
1343: { MC_020, {0xffc0, 0x4c00, 0x8ff8, 0x0000}, {4}, {ofEa,ofExtReg}, "MULU.L", {EA_An,0}},
1344: { MC_020, {0xffc0, 0x4c00, 0x8ff8, 0x0800}, {4}, {ofEa,ofExtReg}, "MULS.L", {EA_An,0}},
1345: { MC_020, {0xffc0, 0x4c40, 0x8ff8, 0x0000}, {4}, {ofEa,ofExtReg}, "DIVU.L", {EA_An,0}},
1346: { MC_020, {0xffc0, 0x4c40, 0x8ff8, 0x0800}, {4}, {ofEa,ofExtReg}, "DIVS.L", {EA_An,0}},
1347: { MC_020, {0xffc0, 0x4c00, 0x8ff8, 0x0400}, {4}, {ofEa,ofExtReg,ofExtReg0}, "MULU.L", {EA_An,0,0}},
1348: { MC_020, {0xffc0, 0x4c00, 0x8ff8, 0x0c00}, {4}, {ofEa,ofExtReg,ofExtReg0}, "MULS.L", {EA_An,0,0}},
1349: { MC_020, {0xffc0, 0x4c40, 0x8ff8, 0x0400}, {4}, {ofEa,ofExtReg,ofExtReg0}, "DIVU.L", {EA_An,0,0}},
1350: { MC_020, {0xffc0, 0x4c40, 0x8ff8, 0x0c00}, {4}, {ofEa,ofExtReg,ofExtReg0}, "DIVS.L", {EA_An,0,0}},
1351: { MC_ALL, {0xffc0, 0x4c80, 0x10000}, {2}, {ofEa,ofRegList}, "MOVEM.W",{EA_Dn|EA_An|EA_Immed|EA_piAn,0} },
1352: { MC_ALL, {0xffc0, 0x4cc0, 0x10000}, {4}, {ofEa,ofRegList}, "MOVEM.L",{EA_Dn|EA_An|EA_Immed|EA_piAn,0} },
1353: { MC_ALL, {0xfff0, 0x4e40}, {0}, {ofIOpcode}, "TRAP",{0x0f} },
1354: { MC_ALL, {0xfff8, 0x4e50}, {2}, {ofAn,ofI}, "LINK"},
1355: { MC_ALL, {0xfff8, 0x4e58}, {4}, {ofAn}, "UNLK"},
1356: { MC_ALL, {0xfff8, 0x4e60}, {4}, {ofAn,ofSpecReg}, "MOVE",{0,REG_USP} },
1357: { MC_ALL, {0xfff8, 0x4e68}, {4}, {ofSpecReg,ofAn}, "MOVE",{REG_USP,0} },
1358: { MC_ALL, {0xffff, 0x4e70}, {0}, {ofNone}, "RESET"},
1359: { MC_ALL, {0xffff, 0x4e71}, {0}, {ofNone}, "NOP"},
1360: { MC_ALL, {0xffff, 0x4e72}, {2}, {ofI}, "STOP"},
1361: { MC_ALL, {0xffff, 0x4e73}, {0}, {ofNone}, "RTE"},
1362: { MC68010|MC_020, {0xffff, 0x4e74}, {2}, {ofI}, "RTD"},
1363: { MC_ALL, {0xffff, 0x4e75}, {0}, {ofNone}, "RTS"},
1364: { MC_ALL, {0xffff, 0x4e76}, {0}, {ofNone}, "TRAPV"},
1365: { MC_ALL, {0xffff, 0x4e77}, {0}, {ofNone}, "RTR"},
1366: { MC68010|MC_020, {0xffff, 0x4e7a, 0x10000}, {4}, {ofSpecExtReg,ofExtReg}, "MOVEC"},
1367: { MC68010|MC_020, {0xffff, 0x4e7b, 0x10000}, {4}, {ofExtReg,ofSpecExtReg}, "MOVEC"},
1368: { MC_ALL, {0xffc0, 0x4e80}, {0}, {ofEa}, "JSR",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn} },
1369: { MC_ALL, {0xffc0, 0x4ec0}, {0}, {ofEa}, "JMP",{EA_Dn|EA_An|EA_Immed|EA_Anip|EA_piAn} },
1370:
1371: { MC_ALL, {0xf1c0, 0x5000}, {1}, {ofI3,ofEa}, "ADDQ.B",{0,EA_An|EA_Immed|EA_PCRel} },
1372: { MC_ALL, {0xf1c0, 0x5040}, {2}, {ofI3,ofEa}, "ADDQ.W",{0,EA_Immed|EA_PCRel} },
1373: { MC_ALL, {0xf1c0, 0x5080}, {4}, {ofI3,ofEa}, "ADDQ.L",{0,EA_Immed|EA_PCRel} },
1374: { MC_ALL, {0xf0c0, 0x50C0}, {1}, {ofEa}, "Sci",{EA_Immed|EA_PCRel|EA_An}},
1375: { MC_ALL, {0xf0f8, 0x50C8}, {2}, {ofDn,ofDisp}, "DBcd"},
1376: { MC_020, {0xf0ff, 0x50fa}, {2}, {ofI}, "TRAPci.W"},
1377: { MC_020, {0xf0ff, 0x50fb}, {4}, {ofI}, "TRAPci.L"},
1378: { MC_020, {0xf0ff, 0x50fc}, {0}, {ofNone}, "TRAPci"},
1379: { MC_ALL, {0xf1c0, 0x5100}, {1}, {ofI3,ofEa}, "SUBQ.B",{0,EA_An|EA_Immed|EA_PCRel} },
1380: { MC_ALL, {0xf1c0, 0x5140}, {2}, {ofI3,ofEa}, "SUBQ.W",{0,EA_Immed|EA_PCRel} },
1381: { MC_ALL, {0xf1c0, 0x5180}, {4}, {ofI3,ofEa}, "SUBQ.L",{0,EA_Immed|EA_PCRel} },
1382:
1383: { MC_ALL, {0xf0ff, 0x6000}, {2}, {ofDisp}, "Bcb"},
1384: { MC_ALL, {0xf000, 0x6000}, {1}, {ofDisp}, "Bcb.S"},
1385: { MC_020, {0xf0ff, 0x60FF}, {4}, {ofDisp}, "Bcb.L"},
1386:
1387: { MC_ALL, {0xf100, 0x7000}, {0}, {ofIOpcode,ofDestDn}, "MOVEQ", {0xFF,0}},
1388:
1389: { MC_ALL, {0xf100, 0x8000}, {-1,6,2,0}, {ofEa,ofDestDn}, "OR.?", {EA_An,0}},
1390: { MC_ALL, {0xf100, 0x8100}, {-1,6,2,0}, {ofDestDn,ofEa}, "OR.?",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1391: { MC_ALL, {0xf1f8, 0x8100}, {1}, {ofDn,ofDestDn}, "SBCD"},
1392: { MC_ALL, {0xf1f8, 0x8108}, {1}, {ofPiAn,ofDestPiAn}, "SBCD"},
1393: { MC_020&~MC_CPU32, {0xf1f8, 0x8140, 0x10000}, {0}, {ofDn,ofDestDn,ofExtIm}, "PACK"},
1394: { MC_020&~MC_CPU32, {0xf1f8, 0x8148, 0x10000}, {0}, {ofPiAn,ofDestPiAn,ofExtIm}, "PACK"},
1395: { MC_020&~MC_CPU32, {0xf1f8, 0x8180, 0x10000}, {0}, {ofDn,ofDestDn,ofExtIm}, "UNPK"},
1396: { MC_020&~MC_CPU32, {0xf1f8, 0x8188, 0x10000}, {0}, {ofPiAn,ofDestPiAn,ofExtIm}, "UNPK"},
1397: { MC_ALL, {0xf1c0, 0x80c0}, {2}, {ofEa,ofDestDn}, "DIVU.W", {EA_An,0}},
1398: { MC_ALL, {0xf1c0, 0x81c0}, {2}, {ofEa,ofDestDn}, "DIVS.W", {EA_An,0}},
1399:
1400: { MC_ALL, {0xf1c0, 0x9000}, {1}, {ofEa,ofDestDn}, "SUB.B", {EA_An,0}},
1401: { MC_ALL, {0xf1c0, 0x9040}, {2}, {ofEa,ofDestDn}, "SUB.W"},
1402: { MC_ALL, {0xf1c0, 0x9080}, {4}, {ofEa,ofDestDn}, "SUB.L"},
1403: { MC_ALL, {0xf1c0, 0x90c0}, {2}, {ofEa,ofDestAn}, "SUBA.W"},
1404: { MC_ALL, {0xf1c0, 0x91c0}, {4}, {ofEa,ofDestAn}, "SUBA.L"},
1405: { MC_ALL, {0xf100, 0x9100}, {-1,6,2,0}, {ofDestDn,ofEa}, "SUB.?",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1406: { MC_ALL, {0xf138, 0x9100}, {-1,6,2,0}, {ofDn,ofDestDn}, "SUBX.?"},
1407: { MC_ALL, {0xf138, 0x9108}, {-1,6,2,0}, {ofPiAn,ofDestPiAn}, "SUBX.?"},
1408:
1409: { MC_ALL, {0xf000, 0xa000}, {0}, {ofLineA}, "LINEA"},
1410:
1411: { MC_ALL, {0xf1c0, 0xb000}, {1}, {ofEa,ofDestDn}, "CMP.B", {EA_An,0}},
1412: { MC_ALL, {0xf1c0, 0xb040}, {2}, {ofEa,ofDestDn}, "CMP.W"},
1413: { MC_ALL, {0xf1c0, 0xb080}, {4}, {ofEa,ofDestDn}, "CMP.L"},
1414: { MC_ALL, {0xf1c0, 0xb0c0}, {2}, {ofEa,ofDestAn}, "CMPA.W"},
1415: { MC_ALL, {0xf1c0, 0xb1c0}, {4}, {ofEa,ofDestAn}, "CMPA.L"},
1416: { MC_ALL, {0xf100, 0xb100}, {-1,6,2,0}, {ofDestDn,ofEa}, "EOR.?",{0,EA_An|EA_Immed|EA_PCRel} },
1417: { MC_ALL, {0xf138, 0xb108}, {-1,6,2,0}, {ofAnip,ofDestAnip}, "CMPM.?"},
1418:
1419: { MC_ALL, {0xf100, 0xc000}, {-1,6,2,0}, {ofEa,ofDestDn}, "AND.?", {EA_An,0}},
1420: { MC_ALL, {0xf100, 0xc100}, {-1,6,2,0}, {ofDestDn,ofEa}, "AND.?",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1421: { MC_ALL, {0xf1f8, 0xc100}, {1}, {ofDn,ofDestDn}, "ABCD"},
1422: { MC_ALL, {0xf1f8, 0xc108}, {1}, {ofPiAn,ofDestPiAn}, "ABCD"},
1423: { MC_ALL, {0xf1f8, 0xc140}, {1}, {ofDestDn,ofDn}, "EXG"},
1424: { MC_ALL, {0xf1f8, 0xc148}, {1}, {ofDestAn,ofAn}, "EXG"},
1425: { MC_ALL, {0xf1f8, 0xc188}, {1}, {ofDestDn,ofAn}, "EXG"},
1426: { MC_ALL, {0xf1c0, 0xc0c0}, {2}, {ofEa,ofDestDn}, "MULU.W", {EA_An,0}},
1427: { MC_ALL, {0xf1c0, 0xc1c0}, {2}, {ofEa,ofDestDn}, "MULS.W", {EA_An,0}},
1428:
1429: { MC_ALL, {0xf1c0, 0xd000}, {1}, {ofEa,ofDestDn}, "ADD.B", {EA_An,0}},
1430: { MC_ALL, {0xf1c0, 0xd040}, {2}, {ofEa,ofDestDn}, "ADD.W"},
1431: { MC_ALL, {0xf1c0, 0xd080}, {4}, {ofEa,ofDestDn}, "ADD.L"},
1432: { MC_ALL, {0xf1c0, 0xd0c0}, {2}, {ofEa,ofDestAn}, "ADDA.W"},
1433: { MC_ALL, {0xf1c0, 0xd1c0}, {4}, {ofEa,ofDestAn}, "ADDA.L"},
1434: { MC_ALL, {0xf100, 0xd100}, {-1,6,2,0}, {ofDestDn,ofEa}, "ADD.?",{0,EA_Immed|EA_PCRel|EA_An|EA_Dn}},
1435: { MC_ALL, {0xf138, 0xd100}, {-1,6,2,0}, {ofDn,ofDestDn}, "ADDX.?"},
1436: { MC_ALL, {0xf138, 0xd108}, {-1,6,2,0}, {ofPiAn,ofDestPiAn}, "ADDX.?"},
1437:
1438: { MC_ALL, {0xf138, 0xe000}, {-1,6,2,0}, {ofI3,ofDn}, "ASR.?"},
1439: { MC_ALL, {0xf138, 0xe008}, {-1,6,2,0}, {ofI3,ofDn}, "LSR.?"},
1440: { MC_ALL, {0xf138, 0xe010}, {-1,6,2,0}, {ofI3,ofDn}, "ROXR.?"},
1441: { MC_ALL, {0xf138, 0xe018}, {-1,6,2,0}, {ofI3,ofDn}, "ROR.?"},
1442: { MC_ALL, {0xf138, 0xe020}, {-1,6,2,0}, {ofDestDn,ofDn}, "ASR.?"},
1443: { MC_ALL, {0xf138, 0xe028}, {-1,6,2,0}, {ofDestDn,ofDn}, "LSR.?"},
1444: { MC_ALL, {0xf138, 0xe030}, {-1,6,2,0}, {ofDestDn,ofDn}, "ROXR.?"},
1445: { MC_ALL, {0xf138, 0xe038}, {-1,6,2,0}, {ofDestDn,ofDn}, "ROR.?"},
1446: { MC_ALL, {0xf138, 0xe100}, {-1,6,2,0}, {ofI3,ofDn}, "ASL.?"},
1447: { MC_ALL, {0xf138, 0xe108}, {-1,6,2,0}, {ofI3,ofDn}, "LSL.?"},
1448: { MC_ALL, {0xf138, 0xe110}, {-1,6,2,0}, {ofI3,ofDn}, "ROXL.?"},
1449: { MC_ALL, {0xf138, 0xe118}, {-1,6,2,0}, {ofI3,ofDn}, "ROL.?"},
1450: { MC_ALL, {0xf138, 0xe120}, {-1,6,2,0}, {ofDestDn,ofDn}, "ASL.?"},
1451: { MC_ALL, {0xf138, 0xe128}, {-1,6,2,0}, {ofDestDn,ofDn}, "LSL.?"},
1452: { MC_ALL, {0xf138, 0xe130}, {-1,6,2,0}, {ofDestDn,ofDn}, "ROXL.?"},
1453: { MC_ALL, {0xf138, 0xe138}, {-1,6,2,0}, {ofDestDn,ofDn}, "ROL.?"},
1454: { MC_ALL, {0xffc0, 0xe0c0}, {1}, {ofEa}, "ASR",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1455: { MC_ALL, {0xffc0, 0xe1c0}, {1}, {ofEa}, "ASL",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1456: { MC_ALL, {0xffc0, 0xe2c0}, {1}, {ofEa}, "LSR",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1457: { MC_ALL, {0xffc0, 0xe3c0}, {1}, {ofEa}, "LSL",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1458: { MC_ALL, {0xffc0, 0xe4c0}, {1}, {ofEa}, "ROXR",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1459: { MC_ALL, {0xffc0, 0xe5c0}, {1}, {ofEa}, "ROXL",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1460: { MC_ALL, {0xffc0, 0xe6c0}, {1}, {ofEa}, "ROR",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1461: { MC_ALL, {0xffc0, 0xe7c0}, {1}, {ofEa}, "ROL",{EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1462: { MC_020&~MC_CPU32, {0xffc0, 0xe8c0, 0xf000, 0x0000}, {1}, {ofBFEa}, "BFTST",{EA_An|EA_piAn|EA_Anip|EA_Immed}},
1463: { MC_020&~MC_CPU32, {0xffc0, 0xe9c0, 0x8000, 0x0000}, {1}, {ofBFEa,ofExtReg}, "BFEXTU",{EA_An|EA_piAn|EA_Anip|EA_Immed}},
1464: { MC_020&~MC_CPU32, {0xffc0, 0xeac0, 0xf000, 0x0000}, {1}, {ofBFEa}, "BFCHG",{EA_An|EA_piAn|EA_Anip|EA_Immed|EA_PCRel} },
1465: { MC_020&~MC_CPU32, {0xffc0, 0xebc0, 0x8000, 0x0000}, {1}, {ofBFEa,ofExtReg}, "BFEXTS",{EA_An|EA_piAn|EA_Anip|EA_Immed}},
1466: { MC_020&~MC_CPU32, {0xffc0, 0xecc0, 0xf000, 0x0000}, {1}, {ofBFEa}, "BFCLR",{EA_An|EA_piAn|EA_Anip|EA_Immed|EA_PCRel} },
1467: { MC_020&~MC_CPU32, {0xffc0, 0xedc0, 0x8000, 0x0000}, {1}, {ofBFEa,ofExtReg}, "BFFFO",{EA_An|EA_piAn|EA_Anip|EA_Immed}},
1468: { MC_020&~MC_CPU32, {0xffc0, 0xeec0, 0xf000, 0x0000}, {1}, {ofBFEa}, "BFSET",{EA_An|EA_piAn|EA_Anip|EA_Immed}},
1469: { MC_020&~MC_CPU32, {0xffc0, 0xefc0, 0x8000, 0x0000}, {1}, {ofExtReg,ofBFEa}, "BFINS",{0,EA_An|EA_piAn|EA_Anip|EA_Immed|EA_PCRel} },
1470:
1471:
1472: #define PMMU_COPROC_ID 0 // 0 is the standard PMMU
1473:
1474: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x2000}, {0}, {ofSpecReg,ofEa}, "PLOADW",{REG_SFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1475: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x2001}, {0}, {ofSpecReg,ofEa}, "PLOADW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1476: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xfff8, 0x2008}, {0}, {ofExtReg0,ofEa}, "PLOADW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1477: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xfff0, 0x2010}, {0}, {ofExtIm4,ofEa}, "PLOADW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1478:
1479: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x2200}, {0}, {ofSpecReg,ofEa}, "PLOADR",{REG_SFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1480: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x2201}, {0}, {ofSpecReg,ofEa}, "PLOADR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1481: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xfff8, 0x2208}, {0}, {ofExtReg0,ofEa}, "PLOADR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1482: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xfff0, 0x2210}, {0}, {ofExtIm4,ofEa}, "PLOADR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1483:
1484: { MC_PMMU, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0xa000}, {0}, {ofEa}, "PFLUSHR",{EA_Dn|EA_An} },
1485:
1486: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0800}, {0}, {ofEa,ofSpecReg}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT0} },
1487: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0900}, {0}, {ofEa,ofSpecReg}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT0} },
1488: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0B00}, {0}, {ofSpecReg,ofEa}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT0} },
1489: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0C00}, {0}, {ofEa,ofSpecReg}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT1} },
1490: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0C00}, {0}, {ofSpecReg,ofEa}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT0} },
1491: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0D00}, {0}, {ofEa,ofSpecReg}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT1} },
1492: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0E00}, {0}, {ofSpecReg,ofEa}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT1} },
1493: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x0F00}, {0}, {ofSpecReg,ofEa}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TT1} },
1494: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4000}, {0}, {ofEa,ofSpecReg}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TC} },
1495: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4100}, {0}, {ofEa,ofSpecReg}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TC} },
1496: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4200}, {0}, {ofSpecReg,ofEa}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TC} },
1497: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4300}, {0}, {ofSpecReg,ofEa}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_TC} },
1498: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4800}, {0}, {ofEa,ofSpecReg}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_SRP} },
1499: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4900}, {0}, {ofEa,ofSpecReg}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_SRP} },
1500: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4A00}, {0}, {ofSpecReg,ofEa}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_SRP} },
1501: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4B00}, {0}, {ofSpecReg,ofEa}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_SRP} },
1502: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4C00}, {0}, {ofEa,ofSpecReg}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_CRP} },
1503: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4D00}, {0}, {ofEa,ofSpecReg}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_CRP} },
1504: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4e00}, {0}, {ofSpecReg,ofEa}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_CRP} },
1505: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x4f00}, {0}, {ofSpecReg,ofEa}, "PMOVEFD",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_CRP} },
1506: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x6000}, {0}, {ofEa,ofSpecReg}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_MMUSR} },
1507: { MC_PMMU|MC68030, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x6200}, {0}, {ofSpecReg,ofEa}, "PMOVE",{EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel,REG_MMUSR} },
1508:
1509: { MC_PMMU, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xffff, 0x2800}, {0}, {ofSpecReg,ofEa}, "PVALID",{REG_VAL,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1510: { MC_PMMU, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xfff8, 0x2C00}, {0}, {ofExtRegA0,ofEa}, "PVALID",{0,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1511:
1512: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3ff, 0x8000}, {0}, {ofSpecReg,ofEa,ofExtIm10}, "PTESTW",{REG_SFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1513: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3ff, 0x8001}, {0}, {ofSpecReg,ofEa,ofExtIm10}, "PTESTW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1514: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3f8, 0x8008}, {0}, {ofExtReg0,ofEa,ofExtIm10}, "PTESTW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1515: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3f0, 0x8010}, {0}, {ofExtIm4,ofEa,ofExtIm10}, "PTESTW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1516:
1517: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3ff, 0x8200}, {0}, {ofSpecReg,ofEa,ofExtIm10}, "PTESTR",{REG_SFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1518: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3ff, 0x8201}, {0}, {ofSpecReg,ofEa,ofExtIm10}, "PTESTR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1519: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3f8, 0x8208}, {0}, {ofExtReg0,ofEa,ofExtIm10}, "PTESTR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1520: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe3f0, 0x8210}, {0}, {ofExtIm4,ofEa,ofExtIm10}, "PTESTR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1521:
1522: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe31f, 0x8100}, {0}, {ofSpecReg,ofEa,ofExtIm10,ofExtRegA05}, "PTESTW",{REG_SFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1523: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe31f, 0x8101}, {0}, {ofSpecReg,ofEa,ofExtIm10,ofExtRegA05}, "PTESTW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1524: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe318, 0x8108}, {0}, {ofExtReg0,ofEa,ofExtIm10,ofExtRegA05}, "PTESTW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1525: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe310, 0x8110}, {0}, {ofExtIm4,ofEa,ofExtIm10,ofExtRegA05}, "PTESTW",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1526:
1527: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe31f, 0x8300}, {0}, {ofSpecReg,ofEa,ofExtIm10,ofExtRegA05}, "PTESTR",{REG_SFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1528: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe31f, 0x8301}, {0}, {ofSpecReg,ofEa,ofExtIm10,ofExtRegA05}, "PTESTR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1529: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe318, 0x8308}, {0}, {ofExtReg0,ofEa,ofExtIm10,ofExtRegA05}, "PTESTR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1530: { MC_PMMU|MC68030|MC68040|MC68LC040, {0xffc0, 0xf000|(PMMU_COPROC_ID<<9), 0xe310, 0x8310}, {0}, {ofExtIm4,ofEa,ofExtIm10,ofExtRegA05}, "PTESTR",{REG_DFC,EA_Dn|EA_An|EA_Anip|EA_piAn|EA_Immed|EA_PCRel} },
1531:
1532: { MC_PMMU, {0xffc0, 0xf040|(PMMU_COPROC_ID<<9), 0xfff0, 0x8310}, {0}, {ofEa}, "PScp",{EA_An|EA_Immed|EA_PCRel} },
1533: { MC_PMMU, {0xfff8, 0xf048|(PMMU_COPROC_ID<<9), 0xfff0, 0x0000}, {2}, {ofDn,ofDisp}, "PDBcp"},
1534: { MC_PMMU, {0xffff, 0xf07A|(PMMU_COPROC_ID<<9), 0xfff0, 0x0000, 0x10000,0x0000}, {2}, {ofExtIm32}, "PTRAPcp.W" },
1535: { MC_PMMU, {0xffff, 0xf07B|(PMMU_COPROC_ID<<9), 0xfff0, 0x0000, 0x10000,0x0000}, {4}, {ofExtIm32}, "PTRAPcp.L" },
1536: { MC_PMMU, {0xffff, 0xf07C|(PMMU_COPROC_ID<<9), 0xfff0, 0x0000}, {0}, {ofNone}, "PTRAPcp" },
1537: { MC_PMMU, {0xfff0, 0xf080|(PMMU_COPROC_ID<<9)}, {2}, {ofDisp}, "PBcp.W"},
1538: { MC_PMMU, {0xfff0, 0xf0C0|(PMMU_COPROC_ID<<9)}, {4}, {ofDisp}, "PBcp.L"},
1539: { MC_PMMU, {0xffc0, 0xf100|(PMMU_COPROC_ID<<9)}, {0}, {ofEa}, "PSAVE",{EA_Dn|EA_An|EA_Anip|EA_Immed} },
1540: { MC_PMMU, {0xffc0, 0xf140|(PMMU_COPROC_ID<<9)}, {0}, {ofEa}, "PRESTORE",{EA_Dn|EA_An|EA_piAn|EA_Immed} },
1541:
1542:
1543: #define MC040_COPROC_ID 3 // 3 is the code for some 68040/68060 opcodes
1544:
1545: { MC68040|MC68060, {0xfff8, 0xf000|(MC040_COPROC_ID<<9), 0x8fff, 0x8000}, {0}, {ofAnip,ofDestAbsL}, "MOVE16"},
1546: { MC68040|MC68060, {0xfff8, 0xf008|(MC040_COPROC_ID<<9), 0x8fff, 0x8000}, {0}, {ofDestAbsL,ofAnip}, "MOVE16"},
1547: { MC68040|MC68060, {0xfff8, 0xf010|(MC040_COPROC_ID<<9), 0x8fff, 0x8000}, {0}, {ofAni,ofDestAbsL}, "MOVE16"},
1548: { MC68040|MC68060, {0xfff8, 0xf018|(MC040_COPROC_ID<<9), 0x8fff, 0x8000}, {0}, {ofDestAbsL,ofAni}, "MOVE16"},
1549: { MC68040|MC68060, {0xfff8, 0xf020|(MC040_COPROC_ID<<9), 0x8fff, 0x8000}, {0}, {ofAnip,ofExtAnip}, "MOVE16"},
1550:
1551:
1552: #define CPU32_COPROC_ID 4 // 4 is the code for some CPU32 opcodes
1553:
1554: { MC68040|MC68060, {0xfff8, 0xf008|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVL",{REG_CACHES_NONE} },
1555: { MC68040|MC68060, {0xfff8, 0xf048|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVL",{REG_CACHES_DC} },
1556: { MC68040|MC68060, {0xfff8, 0xf088|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVL",{REG_CACHES_IC} },
1557: { MC68040|MC68060, {0xfff8, 0xf0C8|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVL",{REG_CACHES_ICDC} },
1558:
1559: { MC68040|MC68060, {0xfff8, 0xf010|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVP",{REG_CACHES_NONE} },
1560: { MC68040|MC68060, {0xfff8, 0xf050|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVP",{REG_CACHES_DC} },
1561: { MC68040|MC68060, {0xfff8, 0xf090|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVP",{REG_CACHES_IC} },
1562: { MC68040|MC68060, {0xfff8, 0xf0D0|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVP",{REG_CACHES_ICDC} },
1563:
1564: { MC68040|MC68060, {0xfff8, 0xf018|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVA",{REG_CACHES_NONE} },
1565: { MC68040|MC68060, {0xfff8, 0xf058|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVA",{REG_CACHES_DC} },
1566: { MC68040|MC68060, {0xfff8, 0xf098|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVA",{REG_CACHES_IC} },
1567: { MC68040|MC68060, {0xfff8, 0xf0D8|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CINVA",{REG_CACHES_ICDC} },
1568:
1569: { MC68040|MC68060, {0xfff8, 0xf028|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHL",{REG_CACHES_NONE} },
1570: { MC68040|MC68060, {0xfff8, 0xf068|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHL",{REG_CACHES_DC} },
1571: { MC68040|MC68060, {0xfff8, 0xf0A8|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHL",{REG_CACHES_IC} },
1572: { MC68040|MC68060, {0xfff8, 0xf0E8|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHL",{REG_CACHES_ICDC} },
1573:
1574: { MC68040|MC68060, {0xfff8, 0xf030|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHP",{REG_CACHES_NONE} },
1575: { MC68040|MC68060, {0xfff8, 0xf070|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHP",{REG_CACHES_DC} },
1576: { MC68040|MC68060, {0xfff8, 0xf0B0|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHP",{REG_CACHES_IC} },
1577: { MC68040|MC68060, {0xfff8, 0xf0F0|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHP",{REG_CACHES_ICDC} },
1578:
1579: { MC68040|MC68060, {0xfff8, 0xf038|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHA",{REG_CACHES_NONE} },
1580: { MC68040|MC68060, {0xfff8, 0xf078|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHA",{REG_CACHES_DC} },
1581: { MC68040|MC68060, {0xfff8, 0xf0B8|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHA",{REG_CACHES_IC} },
1582: { MC68040|MC68060, {0xfff8, 0xf0F8|(CPU32_COPROC_ID<<9)}, {0}, {ofSpecReg,ofAn}, "CPUSHA",{REG_CACHES_ICDC} },
1583:
1584: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f08, 0x0100}, {-1,16+6,2,0}, {ofExt4Dn}, "TBLU.?" },
1585: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f3f, 0x0100}, {-1,16+6,2,0}, {ofExtReg,ofEa}, "TBLU.?",{EA_An|EA_An|EA_Anip|EA_Immed|EA_PCRel} },
1586: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f28, 0x0500}, {-1,16+6,2,0}, {ofExt4Dn}, "TBLUN.?" },
1587: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f3f, 0x0500}, {-1,16+6,2,0}, {ofExtReg,ofEa}, "TBLUN.?",{EA_An|EA_An|EA_Anip|EA_Immed|EA_PCRel} },
1588:
1589: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f08, 0x0900}, {-1,16+6,2,0}, {ofExt4Dn}, "TBLS.?" },
1590: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f3f, 0x0900}, {-1,16+6,2,0}, {ofExtReg,ofEa}, "TBLS.?",{EA_An|EA_An|EA_Anip|EA_Immed|EA_PCRel} },
1591: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f28, 0x0D00}, {-1,16+6,2,0}, {ofExt4Dn}, "TBLSN.?" },
1592: { MC_CPU32, {0xffc0, 0xf000|(CPU32_COPROC_ID<<9), 0x8f3f, 0x0D00}, {-1,16+6,2,0}, {ofExtReg,ofEa}, "TBLSN.?",{EA_An|EA_An|EA_Anip|EA_Immed|EA_PCRel} },
1593:
1594: { MC_CPU32, {0xffff, 0xf000|(CPU32_COPROC_ID<<9), 0xffff, 0x01C0}, {2}, {ofI}, "LPSTOP" },
1595:
1596:
1597: #define FPU_COPROC_ID 1 // 1 is the standard FPU, required to be 1 for the 68040 anyway
1598:
1599: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0000}, {-1,16+10,3,1}, {ofFPU}, "FMOVE.?" },
1600: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0001}, {-1,16+10,3,1}, {ofFPU}, "FINT.?" },
1601: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0002}, {-1,16+10,3,1}, {ofFPU}, "FSINH.?" },
1602: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0003}, {-1,16+10,3,1}, {ofFPU}, "FINTRZ.?" },
1603: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0004}, {-1,16+10,3,1}, {ofFPU}, "FSQRT.?" },
1604: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0006}, {-1,16+10,3,1}, {ofFPU}, "FLOGNP1.?" },
1605: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0008}, {-1,16+10,3,1}, {ofFPU}, "FETOXM1.?" },
1606: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0009}, {-1,16+10,3,1}, {ofFPU}, "FTANH.?" },
1607: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x000A}, {-1,16+10,3,1}, {ofFPU}, "FATAN.?" },
1608: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x000C}, {-1,16+10,3,1}, {ofFPU}, "FASIN.?" },
1609: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x000D}, {-1,16+10,3,1}, {ofFPU}, "FATANH.?" },
1610: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x000E}, {-1,16+10,3,1}, {ofFPU}, "FSIN.?" },
1611: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x000F}, {-1,16+10,3,1}, {ofFPU}, "FTAN.?" },
1612: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0010}, {-1,16+10,3,1}, {ofFPU}, "FETOX.?" },
1613: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0011}, {-1,16+10,3,1}, {ofFPU}, "FTWOTOX.?" },
1614: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0012}, {-1,16+10,3,1}, {ofFPU}, "FTENTOX.?" },
1615: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0014}, {-1,16+10,3,1}, {ofFPU}, "FLOGN.?" },
1616: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0015}, {-1,16+10,3,1}, {ofFPU}, "FLOG10.?" },
1617: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0016}, {-1,16+10,3,1}, {ofFPU}, "FLOG2.?" },
1618: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0018}, {-1,16+10,3,1}, {ofFPU}, "FABS.?" },
1619: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0019}, {-1,16+10,3,1}, {ofFPU}, "FCOSH.?" },
1620: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x001A}, {-1,16+10,3,1}, {ofFPU}, "FNEG.?" },
1621: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x001C}, {-1,16+10,3,1}, {ofFPU}, "FACOS.?" },
1622: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x001D}, {-1,16+10,3,1}, {ofFPU}, "FCOS.?" },
1623: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x001E}, {-1,16+10,3,1}, {ofFPU}, "FGETEXP.?" },
1624: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x001F}, {-1,16+10,3,1}, {ofFPU}, "FGETMAN.?" },
1625: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0020}, {-1,16+10,3,1}, {ofFPU}, "FDIV.?" },
1626: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0021}, {-1,16+10,3,1}, {ofFPU}, "FMOD.?" },
1627: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0022}, {-1,16+10,3,1}, {ofFPU}, "FADD.?" },
1628: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0023}, {-1,16+10,3,1}, {ofFPU}, "FMUL.?" },
1629: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0024}, {-1,16+10,3,1}, {ofFPU}, "FSGLDIV.?" },
1630: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0025}, {-1,16+10,3,1}, {ofFPU}, "FREM.?" },
1631: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0026}, {-1,16+10,3,1}, {ofFPU}, "FSCALE.?" },
1632: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0027}, {-1,16+10,3,1}, {ofFPU}, "FSGLMUL.?" },
1633: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0028}, {-1,16+10,3,1}, {ofFPU}, "FSUB.?" },
1634: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA078,0x0030}, {-1,16+10,3,1}, {ofFPU3Reg}, "FSINCOS.?" },
1635: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0038}, {-1,16+10,3,1}, {ofFPU}, "FCMP.?" },
1636: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x003A}, {-1,16+10,3,1}, {ofFPU}, "FTST.?" },
1637: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0040}, {-1,16+10,3,1}, {ofFPU}, "FSMOVE.?" },
1638: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0041}, {-1,16+10,3,1}, {ofFPU}, "FSSQRT.?" },
1639: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0042}, {-1,16+10,3,1}, {ofFPU}, "FSADD.?" },
1640: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0044}, {-1,16+10,3,1}, {ofFPU}, "FDMOVE.?" },
1641: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0045}, {-1,16+10,3,1}, {ofFPU}, "FDSQRT.?" },
1642: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0046}, {-1,16+10,3,1}, {ofFPU}, "FDADD.?" },
1643: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0058}, {-1,16+10,3,1}, {ofFPU}, "FSABS.?" },
1644: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x005A}, {-1,16+10,3,1}, {ofFPU}, "FSNEG.?" },
1645: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x005C}, {-1,16+10,3,1}, {ofFPU}, "FDABS.?" },
1646: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x005E}, {-1,16+10,3,1}, {ofFPU}, "FDNEG.?" },
1647: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0060}, {-1,16+10,3,1}, {ofFPU}, "FSDIV.?" },
1648: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0063}, {-1,16+10,3,1}, {ofFPU}, "FSMUL.?" },
1649: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0064}, {-1,16+10,3,1}, {ofFPU}, "FDDIV.?" },
1650: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0067}, {-1,16+10,3,1}, {ofFPU}, "FDMUL.?" },
1651: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x0068}, {-1,16+10,3,1}, {ofFPU}, "FSSUB.?" },
1652: { MC68040, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xA07F,0x006C}, {-1,16+10,3,1}, {ofFPU}, "FDSUB.?" },
1653: { MC68040|MC_FPU, {0xffff, 0xf000|(FPU_COPROC_ID<<9),0xFC00,0x5C00}, {0}, {ofFMOVECR}, "FMOVECR" },
1654:
1655: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xE000,0x6000}, {-1,16+10,3,1}, {ofFPUMOVE}, "FMOVE.?" },
1656:
1657: // these 3 are special versions of MOVEM with just one register, they have to be before the FMOVEM version
1658: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFFFF,0x8400}, {0}, {ofEa,ofSpecReg}, "FMOVE", {0,REG_FPU_FPIAR} },
1659: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFFFF,0x8800}, {0}, {ofEa,ofSpecReg}, "FMOVE", {EA_An,REG_FPU_FPSR} },
1660: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFFFF,0x9000}, {0}, {ofEa,ofSpecReg}, "FMOVE", {EA_An,REG_FPU_FPCR} },
1661: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xE3FF,0x8000}, {0}, {ofEa,ofFPUSRRegList}, "FMOVEM", {EA_Dn|EA_An,0} },
1662: // these 3 are special versions of MOVEM with just one register, they have to be before the FMOVEM version
1663: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFFFF,0xA400}, {0}, {ofSpecReg,ofEa}, "FMOVE", {REG_FPU_FPIAR,EA_Immed|EA_PCRel} },
1664: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFFFF,0xA800}, {0}, {ofSpecReg,ofEa}, "FMOVE", {REG_FPU_FPSR,EA_An|EA_Immed|EA_PCRel} },
1665: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFFFF,0xB000}, {0}, {ofSpecReg,ofEa}, "FMOVE", {REG_FPU_FPCR,EA_An|EA_Immed|EA_PCRel} },
1666: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xE3FF,0xA000}, {0}, {ofFPUSRRegList,ofEa}, "FMOVEM", {0,EA_Dn|EA_An|EA_Immed|EA_PCRel} },
1667:
1668: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFE00,0xC000}, {0}, {ofFPUReglist,ofEa}, "FMOVEM.X",{0,EA_Dn|EA_An|EA_Anip|EA_Immed} },
1669: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFE8F,0xC800}, {0}, {ofExtRegD04,ofEa}, "FMOVEM.X",{0,EA_Dn|EA_An|EA_piAn|EA_Immed} },
1670: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFE00,0xE000}, {0}, {ofEa,ofFPUReglist}, "FMOVEM.X",{EA_Dn|EA_An|EA_piAn|EA_Immed,0} },
1671: { MC68040|MC_FPU, {0xffc0, 0xf000|(FPU_COPROC_ID<<9),0xFE8F,0xE800}, {0}, {ofEa,ofExtRegD04}, "FMOVEM.X",{EA_Dn|EA_An|EA_Anip|EA_Immed|EA_PCRel} },
1672:
1673: { MC68040|MC_FPU, {0xffc0, 0xf040|(FPU_COPROC_ID<<9),0xFFC0,0x0000}, {0}, {ofEa}, "FScf.B",{EA_An|EA_Immed|EA_PCRel} },
1674: { MC68040|MC_FPU, {0xfff8, 0xf048|(FPU_COPROC_ID<<9),0xFFC0,0x0000}, {2}, {ofDn,ofDisp}, "FDBcf" },
1675: { MC68040|MC_FPU, {0xffff, 0xf07A|(FPU_COPROC_ID<<9), 0xfff0, 0x0000, 0x10000,0x0000}, {2}, {ofExtIm32}, "FTRAPcf.W" },
1676: { MC68040|MC_FPU, {0xffff, 0xf07B|(FPU_COPROC_ID<<9), 0xfff0, 0x0000, 0x10000,0x0000}, {4}, {ofExtIm32}, "FTRAPcf.L" },
1677: { MC68040|MC_FPU, {0xffff, 0xf07C|(FPU_COPROC_ID<<9), 0xfff0, 0x0000}, {0}, {ofNone}, "FTRAPcf" },
1678:
1679: // FNOP _has_ to be before FBcf.W, not worth to have a special case for that one
1680: { MC68040|MC_FPU, {0xffff, 0xf080|(FPU_COPROC_ID<<9),0xFFFF,0x0000}, {0}, {ofNone}, "FNOP" },
1681: { MC68040|MC_FPU, {0xffc0, 0xf080|(FPU_COPROC_ID<<9),0xFFFF,0x0000}, {2}, {ofDisp}, "FBcF.W" },
1682: { MC68040|MC_FPU, {0xffc0, 0xf0c0|(FPU_COPROC_ID<<9),0xFFFF,0x0000}, {4}, {ofDisp}, "FBcF.L" },
1683: { MC68040|MC68060|MC_FPU, {0xffc0, 0xf100|(FPU_COPROC_ID<<9)}, {0}, {ofEa}, "FSAVE", {EA_Dn|EA_An|EA_piAn|EA_Immed} },
1684: { MC68040|MC68060|MC_FPU, {0xffc0, 0xf140|(FPU_COPROC_ID<<9)}, {0}, {ofEa}, "FRESTORE", {EA_Dn|EA_An|EA_piAn|EA_Immed} },
1685:
1686: { }
1687: };
1688:
1689: static int Disass68k(long addr, char *labelBuffer, char *opcodeBuffer, char *operandBuffer, char *commentBuffer)
1690: {
1691: long baseAddr = addr;
1692: int val;
1693: const char *sp;
1694: labelBuffer[0] = 0;
1695: opcodeBuffer[0] = 0;
1696: operandBuffer[0] = 0;
1697: commentBuffer[0] = 0;
1698: int i;
1699:
1700: int count = 0;
1701: char addressLabel[256];
1702: char cmtBuffer[256];
1703: Disass68kDataType type = Disass68kType(baseAddr, addressLabel, cmtBuffer, &count);
1704: if(addressLabel[0])
1705: sprintf(labelBuffer, "%s:", addressLabel);
1706: sprintf(commentBuffer, "%s", cmtBuffer);
1707: switch(type)
1708: {
1709: case dtByte:if(count > 8)
1710: count = 8;
1711: strcpy(opcodeBuffer,"DC.B");
1712: for(i=0; i<count; ++i)
1713: {
1714: if((i & 7) > 0)
1715: strcat(operandBuffer, ",");
1716: char hbuf[16];
1717: unsigned short val = Disass68kGetWord(addr+(i & ~1));
1718: if(i & 1)
1719: val &= 0xFF;
1720: else
1721: val = val >> 8;
1722: sprintf(hbuf,"$%2.2x", val);
1723: strcat(operandBuffer, hbuf);
1724: }
1725: return count;
1726:
1727: case dtWord:if(count > 4)
1728: count = 4;
1729: strcpy(opcodeBuffer,"DC.W");
1730: for(i=0; i<count; ++i)
1731: {
1732: if((i & 3) > 0)
1733: strcat(operandBuffer, ",");
1734: char hbuf[16];
1735: sprintf(hbuf,"$%4.4x", Disass68kGetWord(addr+i*2));
1736: strcat(operandBuffer, hbuf);
1737: }
1738: return count * 2;
1739:
1740: case dtLong:if(count > 2)
1741: count = 2;
1742: strcpy(opcodeBuffer,"DC.L");
1743: for(i=0; i<count; ++i)
1744: {
1745: if((i & 1) > 0)
1746: strcat(operandBuffer, ",");
1747: char hbuf[16];
1748: sprintf(hbuf,"$%8.8x", (Disass68kGetWord(addr+i*4) << 16) | Disass68kGetWord(addr+i*4+2));
1749: strcat(operandBuffer, hbuf);
1750: }
1751: return count * 4;
1752:
1753: case dtStringArray:
1754: {
1755: strcpy(opcodeBuffer,"DC.B");
1756: strcat(operandBuffer, "'");
1757: char *sp = operandBuffer + strlen(operandBuffer);
1758: for(i=0; i < count; ++i)
1759: {
1760: unsigned short val = Disass68kGetWord(addr+(i & ~1));
1761: if(i & 1)
1762: val &= 0xFF;
1763: else
1764: val = val >> 8;
1765: if(val == 0)
1766: break;
1767: switch(val)
1768: {
1769: case 9: *sp++ = '\\'; *sp++ = 't'; break;
1770: case 10: *sp++ = '\\'; *sp++ = 'n'; break;
1771: case 13: *sp++ = '\\'; *sp++ = 'r'; break;
1772: default:
1773: if(val >= 0x20 && val <= 0x7E)
1774: *sp++ = val;
1775: }
1776: }
1777: *sp = 0;
1778: strcat(sp, "'");
1779: return count;
1780: }
1781:
1782: case dtASCString:
1783: {
1784: int count = 1;
1785: unsigned short val = Disass68kGetWord(addr+0);
1786: strcpy(opcodeBuffer,"DC.B");
1787: if((val >> 8) == 0)
1788: {
1789: strcat(operandBuffer, "0");
1790: } else {
1791: strcat(operandBuffer, "'");
1792: char *sp = operandBuffer + strlen(operandBuffer);
1793: for(i=0; ; ++i)
1794: {
1795: unsigned short val = Disass68kGetWord(addr+(i & ~1));
1796: if(i & 1)
1797: val &= 0xFF;
1798: else
1799: val = val >> 8;
1800: if(val == 0)
1801: break;
1802: switch(val)
1803: {
1804: case 9: *sp++ = '\\'; *sp++ = 't'; break;
1805: case 10: *sp++ = '\\'; *sp++ = 'n'; break;
1806: case 13: *sp++ = '\\'; *sp++ = 'r'; break;
1807: default:
1808: if(val >= 0x20 && val <= 0x7E)
1809: *sp++ = val;
1810: }
1811: ++count;
1812: }
1813: *sp = 0;
1814: strcat(sp, "',0");
1815: }
1816: return (count + 1) & ~1;
1817: }
1818:
1819: case dtPointer:
1820: case dtFunctionPointer:
1821: val = (Disass68kGetWord(addr) << 16) | Disass68kGetWord(addr+2);
1822: sp = Disass68kSymbolName(val, 2);
1823: strcpy(opcodeBuffer,"DC.L");
1824: if(sp)
1825: sprintf(operandBuffer,"%s", sp);
1826: else
1827: sprintf(operandBuffer,"$%6.6x", val);
1828: return 4;
1829:
1830: default: break;
1831: }
1832:
1833: int index = 0;
1834: long opcodeAddr = addr;
1835: more:
1836: addr = opcodeAddr;
1837:
1838: opcodeBuffer[0] = 0;
1839: operandBuffer[0] = 0;
1840:
1841: commentBuffer[0] = 0;
1842: if(cmtBuffer[0])
1843: sprintf(commentBuffer, "%s ", cmtBuffer);
1844:
1845: while(1)
1846: {
1847: OpcodeTableStruct *ots = &OpcodeTable[index++];
1848: if(ots->opcodeName == NULL)
1849: break;
1850: if((ots->cpuMask & optionCPUTypeMask) == 0) // CPU doesn't match?
1851: continue;
1852:
1853: // search for the opcode plus up to 2 extension words
1854: unsigned short opcode[5] = {};
1855: unsigned int i;
1856: for(i=0; i<5; ++i)
1857: {
1858: if(!ots->opcodeMask[i*2])
1859: break;
1860: opcode[i] = Disass68kGetWord(addr);
1861: if(((ots->opcodeMask[i*2] & 0xFFFF) & opcode[i]) != ots->opcodeMask[i*2+1])
1862: goto more;
1863: addr += 2;
1864: }
1865:
1866: // find out the size of the opcode operand
1867: int size = ots->operationSize[0];
1868: char sizeChar = 0;
1869: if(size < 0) // custom size?
1870: {
1871: int opcodeOffset = ots->operationSize[1] >> 4;
1872: int bitShiftOffset = ots->operationSize[1] & 0x0F;
1873: int sizeBitMask = (opcode[opcodeOffset] >> bitShiftOffset) & ((1 << ots->operationSize[2]) - 1);
1874: switch(ots->operationSize[3])
1875: {
1876: case 0: // 2 Bit Size
1877: switch(sizeBitMask)
1878: {
1879: case 0: size = 1; sizeChar = 'B'; break;
1880: case 1: size = 2; sizeChar = 'W'; break;
1881: case 2: size = 4; sizeChar = 'L'; break;
1882: case 3: goto more; // illegal size mask
1883: }
1884: break;
1885: case 1: // 3 Bit FPU Size
1886: if((opcode[1] & 0x4000) == 0x0000) // Register => Register?
1887: sizeBitMask = 2; // => 'X' Format
1888: switch(sizeBitMask)
1889: {
1890: case 0: size = 4; sizeChar = 'L'; break;
1891: case 1: size = 4; sizeChar = 'S'; break;
1892: case 2: size = 12; sizeChar = 'X'; break;
1893: case 7: if((opcode[1] & 0xE000) != 0x6000) // MOVE.P <ea>,FPn{Dn-Factor}
1894: goto more; // illegal size mask
1895: case 3: size = 12; sizeChar = 'P'; break;
1896: case 4: size = 2; sizeChar = 'W'; break;
1897: case 5: size = 8; sizeChar = 'D'; break;
1898: case 6: size = 1; sizeChar = 'B'; break;
1899: }
1900: break;
1901: }
1902: }
1903:
1904: // copy the opcode plus a necessary TAB for the operand
1905: char *dbuf = opcodeBuffer;
1906: for(i=0; ots->opcodeName[i]; ++i)
1907: {
1908: char c = ots->opcodeName[i];
1909: if(c == 'c') // condition code
1910: {
1911: static const char *pmmuCond[16] = { "BS", "BC", "LS", "LC", "SS", "SC", "AS", "AC", "WS", "WC", "IS", "IC", "GS", "GC", "CS", "CC" };
1912: static const char *braCond[16] = { "RA", "SR", "HI", "LS", "CC", "CS", "NE", "EQ", "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" };
1913: static const char *sccCond[16] = { "T", "F", "HI", "LS", "CC", "CS", "NE", "EQ", "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" };
1914: static const char *dbCond[16] = { "T", "RA", "HI", "LS", "CC", "CS", "NE", "EQ", "VC", "VS", "PL", "MI", "GE", "LT", "GT", "LE" };
1915: static const char *fpuCond[64] = { "F", "EQ", "OGT", "OGE", "OLT", "OLE", "OGL", "OR", "UN", "UEQ", "UGT", "UGE", "ULT", "ULE", "NE", "T", "SF", "SEQ", "GT", "GE", "LT", "LE", "GL", "GLE", "NGLE", "NGL", "NLE", "NLT", "NGE", "NGT", "SNE", "ST" };
1916:
1917: const char *sp = NULL;
1918: switch(ots->opcodeName[++i])
1919: {
1920: case 'p': // PMMU conditions
1921: sp = pmmuCond[opcode[1] & 0xF];
1922: break;
1923: case 'b': // BRA conditions
1924: sp = braCond[(opcode[0] >> 8) & 0xF];
1925: break;
1926: case 'i': // Scc,TRAPcc conditions
1927: sp = sccCond[(opcode[0] >> 8) & 0xF];
1928: break;
1929: case 'd': // DBcc conditions
1930: sp = dbCond[(opcode[0] >> 8) & 0xF];
1931: break;
1932: case 'F': // FPU conditions (first word)
1933: sp = fpuCond[opcode[0] & 0x3F];
1934: break;
1935: case 'f': // FPU conditions (second word)
1936: sp = fpuCond[opcode[1] & 0x3F];
1937: break;
1938: }
1939: if(sp)
1940: {
1941: if(options & doptOpcodesSmall)
1942: {
1943: char buf[8];
1944: strcpy(buf, sp);
1945: sp = buf;
1946: char *bp = buf;
1947: for(; *bp; ++bp)
1948: *bp = tolower(*bp);
1949: }
1950: strcpy(dbuf, sp);
1951: dbuf += strlen(sp);
1952: continue;
1953: }
1954: goto more;
1955: }
1956: if(c == '?') // size mask
1957: c = sizeChar;
1958: if(options & doptOpcodesSmall)
1959: c = tolower(c);
1960: *dbuf++ = c;
1961: }
1962: *dbuf = 0;
1963:
1964: // Parse the EAs for all operands
1965: int ea = opcode[0] & 0x3F;
1966: dbuf = operandBuffer;
1967: for(i=0; i<(sizeof(ots->op)/sizeof(ots->op[0])); ++i)
1968: {
1969: switch(ots->op[i])
1970: {
1971: case ofNone: // nothing
1972: break;
1973:
1974: case ofEa:
1975: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ea, size, EA_All & ~(ots->parameter[i]), 0, ots->disassFlag);
1976: break;
1977:
1978: case ofDn:
1979: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (ea & 7) | 0x00, size, EA_Dn, 0, ots->disassFlag);
1980: break;
1981: case ofAn:
1982: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (ea & 7) | 0x08, size, EA_An, 0, ots->disassFlag);
1983: break;
1984: case ofAni:
1985: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (ea & 7) | 0x10, size, EA_Ani, 0, ots->disassFlag);
1986: break;
1987: case ofAnip:
1988: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (ea & 7) | 0x18, size, EA_Anip, 0, ots->disassFlag);
1989: break;
1990: case ofPiAn:
1991: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (ea & 7) | 0x20, size, EA_piAn, 0, ots->disassFlag);
1992: break;
1993: case ofD16An:
1994: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (ea & 7) | 0x28, size, EA_dAn, 0, ots->disassFlag);
1995: break;
1996:
1997: case ofI:
1998: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x3C, size, EA_Immed, 0, ots->disassFlag);
1999: break;
2000:
2001: case ofDestDn:
2002: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[0] >> 9) & 7) | 0x00, size, EA_Dn, 0, ots->disassFlag);
2003: break;
2004: case ofDestAn:
2005: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[0] >> 9) & 7) | 0x08, size, EA_An, 0, ots->disassFlag);
2006: break;
2007: case ofDestAnip:
2008: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[0] >> 9) & 7) | 0x18, size, EA_Anip, 0, ots->disassFlag);
2009: break;
2010: case ofDestPiAn:
2011: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[0] >> 9) & 7) | 0x20, size, EA_piAn, 0, ots->disassFlag);
2012: break;
2013: case ofDestEa6:
2014: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[0] >> 9) & 7) | (((opcode[0] >> 6) & 0x7) << 3), size, EA_Dest-EA_An, 0, ots->disassFlag);
2015: break;
2016: case ofDestAbsL:
2017: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x39, size, EA_Abs, 0, ots->disassFlag);
2018: break;
2019:
2020: case ofIOpcode:
2021: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 1, EA_ImmedParameter, opcode[0] & ots->parameter[i], ots->disassFlag);
2022: break;
2023: case ofI3:
2024: val = ((opcode[0] >> 9) & 7);
2025: if(!val) val = 8;
2026: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 1, EA_ImmedParameter, val, ots->disassFlag);
2027: break;
2028: case ofExtIm:
2029: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 2, EA_ImmedParameter, opcode[1], ots->disassFlag);
2030: break;
2031: case ofExtIm32:
2032: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, size, EA_ImmedParameter, opcode[2], ots->disassFlag);
2033: break;
2034: case ofExtIm4:
2035: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 2, EA_ImmedParameter, opcode[1] & 0x0F, ots->disassFlag);
2036: break;
2037: case ofExtIm10:
2038: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 2, EA_ImmedParameter, (opcode[1] >> 10) & 0x07, ots->disassFlag);
2039: break;
2040: case ofSpecReg:
2041: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0101, size, EA_SpecialRegister, ots->parameter[i], ots->disassFlag);
2042: break;
2043: case ofSpecExtReg:
2044: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0101, size, EA_SpecialRegister, opcode[1] & 0xFFF, ots->disassFlag);
2045: break;
2046: case ofExtReg0:
2047: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[1] & 0x07), size, EA_Dn, 0, ots->disassFlag);
2048: break;
2049: case ofExtRegA0:
2050: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[1] & 0x07) | 0x08, size, EA_An, 0, ots->disassFlag);
2051: break;
2052: case ofExtRegD04:
2053: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 4) & 0x07) | 0x00, size, EA_Dn, 0, ots->disassFlag);
2054: break;
2055: case ofExtRegA05:
2056: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 5) & 0x07) | 0x08, size, EA_An, 0, ots->disassFlag);
2057: break;
2058: case ofExtReg:
2059: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 12) & 0x0F), size, EA_Dn|EA_An, 0, ots->disassFlag);
2060: break;
2061: case ofExtAnip:
2062: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 12) & 7) | 0x18, size, EA_Anip, 0, ots->disassFlag);
2063: break;
2064:
2065: case ofDisp:
2066: // branch treats the displacement 0x00 and 0xFF as an indicator how many words follow
2067: // This test will decline a displacement with the wrong word offset
2068: if((opcode[0] & 0xF000) == 0x6000)
2069: {
2070: val = opcode[0] & 0xFF;
2071: if(val == 0x00 && size != 2) goto more;
2072: if(val == 0xFF && size != 4) goto more;
2073: }
2074: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0102, size, EA_PCDisplacement, opcode[0] & 0xFF, ots->disassFlag);
2075: break;
2076:
2077: case ofRegList:
2078: val = opcode[1];
2079: if((ea & 0x38) == 0x20) // -(An) has a flipped bitmask
2080: val = Disass68kFlipBits(val);
2081: dbuf = Disass68kReglist(dbuf, val);
2082: break;
2083:
2084: case ofFPU:
2085: { // default FPU opcode modes
2086: int src = (opcode[1] >> 10) & 7;
2087: int dest = (opcode[1] >> 7) & 7;
2088: char regFP1 = options & doptRegisterSmall ? 'f' : 'F';
2089: char regFP2 = options & doptRegisterSmall ? 'p' : 'P';
2090: if(opcode[1] & 0x4000)
2091: {
2092: // <ea>,FPn
2093: int mask = EA_All - EA_An;
2094: if(src != 0 && src != 4 && src != 6) // only .B,.W and .L allow Dn as a source
2095: mask -= EA_Dn;
2096: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ea, size, mask, 0, 0);
2097: if(!dbuf) goto more;
2098: *dbuf++ = ',';
2099: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+dest;
2100: *dbuf = 0;
2101: } else {
2102: // FPn,FPn or FPn
2103:
2104: // <ea> has to be 0
2105: if((opcode[0] & 0x3F) != 0) goto more;
2106:
2107: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+src;
2108: if(src != dest)
2109: {
2110: *dbuf++ = ',';
2111: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+dest;
2112: }
2113: *dbuf = 0;
2114: }
2115: }
2116: break;
2117: case ofFPUMOVE:
2118: { // MOVE <ea>,FPn{k-Factor}
2119: int src = (opcode[1] >> 10) & 7;
2120: // <ea>,FPn
2121: int mask = EA_All - EA_An;
2122: char regFP1 = options & doptRegisterSmall ? 'f' : 'F';
2123: char regFP2 = options & doptRegisterSmall ? 'p' : 'P';
2124: if(src != 0 && src != 4 && src != 6) // only .B,.W and .L allow Dn as a source
2125: mask -= EA_Dn;
2126: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ea, size, mask, 0, 0);
2127: if(!dbuf) goto more;
2128: *dbuf++ = ',';
2129: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+((opcode[1] >> 7) & 7);
2130: if(src == 3)
2131: {
2132: int kFactor = opcode[1] & 0x7F;
2133: if(kFactor & 0x40)
2134: kFactor |= 0x80;
2135: *dbuf++ = '{';
2136: sprintf(dbuf, "%d", (signed char)kFactor);
2137: dbuf += strlen(dbuf);
2138: *dbuf++ = '}';
2139: } else if(src == 7)
2140: {
2141: if((opcode[1] & 0x0F) != 0) goto more;
2142: *dbuf++ = '{';
2143: *dbuf++ = options & doptRegisterSmall ? 'd' : 'D';
2144: *dbuf++ = '0' + ((opcode[1] >> 4) & 7);
2145: *dbuf++ = '}';
2146: } else {
2147: if((opcode[1] & 0x7F) != 0) goto more;
2148: }
2149: *dbuf = 0;
2150: }
2151: break;
2152: case ofFMOVECR:
2153: { // MOVECR #const,FPn
2154: char regFP1 = options & doptRegisterSmall ? 'f' : 'F';
2155: char regFP2 = options & doptRegisterSmall ? 'p' : 'P';
2156: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 1, EA_ImmedParameter, opcode[1] & 0x7F, ots->disassFlag);
2157: if(!dbuf) goto more;
2158: int reg = (opcode[1] >> 7) & 7;
2159: *dbuf++ = ',';
2160: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+reg;
2161: *dbuf = 0;
2162: switch(opcode[1] & 0x7F) // document the well-known constants
2163: {
2164: case 0x00: strcat(commentBuffer, "PI"); break;
2165: case 0x0B: strcat(commentBuffer, "Log10(2)"); break;
2166: case 0x0C: strcat(commentBuffer, "e"); break;
2167: case 0x0D: strcat(commentBuffer, "Log2(e)"); break;
2168: case 0x0E: strcat(commentBuffer, "Log10(e)"); break;
2169: case 0x0F: strcat(commentBuffer, "0.0"); break;
2170: case 0x30: strcat(commentBuffer, "1n(2)"); break;
2171: case 0x31: strcat(commentBuffer, "1n(10)"); break;
2172: case 0x32: strcat(commentBuffer, "100"); break;
2173: case 0x33: strcat(commentBuffer, "10^1"); break;
2174: case 0x34: strcat(commentBuffer, "10^2"); break;
2175: case 0x35: strcat(commentBuffer, "10^4"); break;
2176: case 0x36: strcat(commentBuffer, "10^8"); break;
2177: case 0x37: strcat(commentBuffer, "10^16"); break;
2178: case 0x38: strcat(commentBuffer, "10^32"); break;
2179: case 0x39: strcat(commentBuffer, "10^64"); break;
2180: case 0x3A: strcat(commentBuffer, "10^128"); break;
2181: case 0x3B: strcat(commentBuffer, "10^256"); break;
2182: case 0x3C: strcat(commentBuffer, "10^512"); break;
2183: case 0x3D: strcat(commentBuffer, "10^1024"); break;
2184: case 0x3E: strcat(commentBuffer, "10^2048"); break;
2185: case 0x3F: strcat(commentBuffer, "10^4096"); break;
2186: }
2187: }
2188: break;
2189: case ofFPUSRRegList:
2190: {
2191: int hasReg = 0;
2192: *dbuf = 0;
2193: if(opcode[1] & 0x0400)
2194: {
2195: strcat(dbuf, Disass68kSpecialRegister(REG_FPU_FPIAR));
2196: hasReg = 1;
2197: }
2198: if(opcode[1] & 0x0800)
2199: {
2200: if(hasReg) strcat(dbuf, "/");
2201: strcat(dbuf, Disass68kSpecialRegister(REG_FPU_FPSR));
2202: hasReg = 1;
2203: }
2204: if(opcode[1] & 0x1000)
2205: {
2206: if(hasReg) strcat(dbuf, "/");
2207: strcat(dbuf, Disass68kSpecialRegister(REG_FPU_FPCR));
2208: hasReg = 1;
2209: }
2210: if(!hasReg)
2211: strcat(dbuf, "0");
2212: dbuf += strlen(dbuf);
2213: }
2214: break;
2215: case ofFPUReglist: // FMOVEM
2216: {
2217: int mask = opcode[1] & 0xFF;
2218: if(opcode[1] & 0x0100)
2219: mask = Disass68kFlipBits(mask) >> 8;
2220: dbuf = Disass68kFPUReglist(dbuf, mask);
2221: }
2222: break;
2223: case ofFPU3Reg:
2224: { // FSINCOS
2225: int src = (opcode[1] >> 10) & 7;
2226: int dest = (opcode[1] >> 7) & 7;
2227: char regFP1 = options & doptRegisterSmall ? 'f' : 'F';
2228: char regFP2 = options & doptRegisterSmall ? 'p' : 'P';
2229: if(opcode[1] & 0x4000)
2230: {
2231: // <ea>,FPn
2232: int mask = EA_All - EA_An;
2233: if(src != 0 && src != 4 && src != 6) // only .B,.W and .L allow Dn as a source
2234: mask -= EA_Dn;
2235: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ea, size, mask, 0, 0);
2236: if(!dbuf) goto more;
2237: *dbuf++ = ',';
2238: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+(opcode[1] & 7);
2239: *dbuf++ = ',';
2240: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+dest;
2241: *dbuf = 0;
2242: } else {
2243: // FPn,FPn or FPn
2244:
2245: // <ea> has to be 0
2246: if((opcode[0] & 0x3F) != 0) goto more;
2247:
2248: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+src;
2249: *dbuf++ = ',';
2250: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+(opcode[1] & 7);
2251: *dbuf++ = ',';
2252: *dbuf++ = regFP1; *dbuf++ = regFP2; *dbuf++ = '0'+dest;
2253: *dbuf = 0;
2254: }
2255: }
2256: break;
2257:
2258: case ofCAS:
2259: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[1] & 0x07), size, EA_Dn, 0, ots->disassFlag);
2260: if(!dbuf) goto more;
2261: *dbuf++ = ',';
2262: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 6) & 0x07), size, EA_Dn, 0, ots->disassFlag);
2263: break;
2264: case ofCAS2:
2265: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[1] & 0x07), size, EA_Dn, 0, ots->disassFlag);
2266: if(!dbuf) goto more;
2267: *dbuf++ = ':';
2268: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[2] & 0x07), size, EA_Dn, 0, ots->disassFlag);
2269: if(!dbuf) goto more;
2270: *dbuf++ = ',';
2271: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 6) & 0x07), size, EA_Dn, 0, ots->disassFlag);
2272: if(!dbuf) goto more;
2273: *dbuf++ = ':';
2274: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[2] >> 6) & 0x07), size, EA_Dn, 0, ots->disassFlag);
2275: if(!dbuf) goto more;
2276: *dbuf++ = ',';
2277: *dbuf++ = '(';
2278: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 12) & 0x0F), size, EA_Dn|EA_An, 0, ots->disassFlag);
2279: if(!dbuf) goto more;
2280: *dbuf++ = ')';
2281: *dbuf++ = ':';
2282: *dbuf++ = '(';
2283: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[2] >> 12) & 0x0F), size, EA_Dn|EA_An, 0, ots->disassFlag);
2284: if(!dbuf) goto more;
2285: *dbuf++ = ')';
2286: *dbuf = 0;
2287: break;
2288: case ofExt4Dn:
2289: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[0] & 0x07), size, EA_Dn, 0, ots->disassFlag);
2290: if(!dbuf) goto more;
2291: *dbuf++ = ':';
2292: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, (opcode[1] & 0x07), size, EA_Dn, 0, ots->disassFlag);
2293: if(!dbuf) goto more;
2294: *dbuf++ = ',';
2295: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ((opcode[1] >> 12) & 0x07), size, EA_Dn, 0, ots->disassFlag);
2296: if(!dbuf) goto more;
2297: *dbuf = 0;
2298: break;
2299: case ofBFEa:
2300: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, ea, size, EA_All & ~(ots->parameter[i]), 0, ots->disassFlag);
2301: if(!dbuf) goto more;
2302: *dbuf++ = '{';
2303: val = (opcode[1] >> 6) & 0x1F;
2304: if(opcode[1] & 0x0800)
2305: {
2306: if(val & 0x18) goto more;
2307: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, val & 0x07, 1, EA_Dn, val, ots->disassFlag);
2308: } else {
2309: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0103, 1, EA_ValueParameter, val, ots->disassFlag);
2310: }
2311: *dbuf++ = ':';
2312: val = opcode[1] & 0x1F;
2313: if(opcode[1] & 0x0020)
2314: {
2315: if(val & 0x18) goto more;
2316: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, val & 0x07, 1, EA_Dn, val, ots->disassFlag);
2317: } else {
2318: if(val == 0) val = 32;
2319: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0103, 1, EA_ValueParameter, val, ots->disassFlag);
2320: }
2321: *dbuf++ = '}';
2322: *dbuf = 0;
2323: break;
2324: case ofLineA:
2325: {
2326: int lineAVal = opcode[0] & 0xFFF;
2327: dbuf = Disass68kEA(dbuf, commentBuffer, &addr, opcodeAddr, 0x0100, 2, EA_ImmedParameter, lineAVal, ots->disassFlag);
2328: const char *lineAStr[16] = { "Line-A Initialization",
2329: "Put pixel",
2330: "Get pixel",
2331: "Arbitrary line",
2332: "Horizontal line",
2333: "Filled rectangle",
2334: "Filled polygon",
2335: "Bit block transfer",
2336: "Text block transfer",
2337: "Show mouse",
2338: "Hide mouse",
2339: "Transform mouse",
2340: "Undraw sprite",
2341: "Draw sprite",
2342: "Copy raster form",
2343: "Seedfill"
2344: };
2345: if(lineAVal < 16)
2346: strcat(commentBuffer, lineAStr[lineAVal]);
2347: }
2348: break;
2349:
2350: default:
2351: goto more;
2352: }
2353: if(!dbuf) goto more;
2354:
2355: // does another operand follow => add separator
2356: if(ots->op[i+1] != ofNone)
2357: *dbuf++ = ',';
2358: }
2359: return addr-baseAddr;
2360: }
2361:
2362: // unknown opcode
2363: strcpy(opcodeBuffer, "DC.W");
2364: sprintf(operandBuffer,"$%4.4x", Disass68kGetWord(addr));
2365: return 2;
2366: }
2367:
2368: static void Disass68kComposeStr(char *dbuf, const char *str, int position, int maxPos)
2369: {
2370: int i;
2371: int len = strlen(dbuf);
2372: while(len < position) {
2373: dbuf[len++] = ' '; /* Will give harmless warning from GCC */
2374: }
2375: for(i=0; str[i] && (!maxPos || len+i<maxPos); ++i)
2376: dbuf[len+i] = str[i];
2377: if(str[i])
2378: dbuf[len+i-1] = '+';
2379: dbuf[len+i] = 0;
2380: }
2381:
2382: static void Disass68k_loop (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt)
2383: {
2384: static bool isInit = false;
2385: if(!isInit)
2386: {
2387: Disass68kInit(Paths_GetHatariHome());
2388: isInit = true;
2389: }
2390:
2391: while (cnt-- > 0) {
2392: int addrWidth = 6; // 6 on an ST, 8 on a TT
2393: char lineBuffer[1024];
2394:
2395: char addressBuffer[32];
2396: char hexdumpBuffer[256];
2397: char labelBuffer[256];
2398: char opcodeBuffer[64];
2399: char operandBuffer[256];
2400: char commentBuffer[256];
2401: int len = Disass68k(addr, labelBuffer, opcodeBuffer, operandBuffer, commentBuffer);
2402: if(!len) break;
2403:
2404: sprintf(addressBuffer, "$%*.*x :", addrWidth,addrWidth, addr);
2405:
2406: hexdumpBuffer[0] = 0;
2407: int plen = len;
2408: if(plen > 80 && (!strncmp(opcodeBuffer, "DC.", 3) || !strncmp(opcodeBuffer, "dc.", 3)))
2409: plen = ((optionPosLabel - optionPosHexdump) / 5) * 2;
2410: int j;
2411: for(j=0; j<plen; j += 2)
2412: {
2413: if(j > 0)
2414: strcat(hexdumpBuffer, " ");
2415: if(j + 2 > plen)
2416: {
2417: sprintf(hexdumpBuffer+strlen(hexdumpBuffer), "%2.2x", Disass68kGetWord(addr+j) >> 8);
2418: } else {
2419: sprintf(hexdumpBuffer+strlen(hexdumpBuffer), "%4.4x", Disass68kGetWord(addr+j));
2420: }
2421: }
2422:
2423: lineBuffer[0] = 0;
2424: if(optionPosAddress >= 0)
2425: Disass68kComposeStr(lineBuffer, addressBuffer, optionPosAddress, 0);
2426: if(optionPosHexdump >= 0)
2427: Disass68kComposeStr(lineBuffer, hexdumpBuffer, optionPosHexdump, optionPosLabel);
2428: if(optionPosLabel >= 0)
2429: Disass68kComposeStr(lineBuffer, labelBuffer, optionPosLabel, 0);
2430: if(optionPosOpcode >= 0)
2431: Disass68kComposeStr(lineBuffer, opcodeBuffer, optionPosOpcode, 0);
2432: if(optionPosOperand >= 0)
2433: {
2434: size_t l = strlen(lineBuffer);
2435: if(lineBuffer[l-1] != ' ') // force at least one space between opcode and operand
2436: {
2437: lineBuffer[l++] = ' ';
2438: lineBuffer[l] = 0;
2439: }
2440: Disass68kComposeStr(lineBuffer, operandBuffer, optionPosOperand, 0);
2441: }
2442: if(commentBuffer[0] && optionPosComment >= 0)
2443: {
2444: Disass68kComposeStr(lineBuffer, " ;", optionPosComment, 0);
2445: Disass68kComposeStr(lineBuffer, commentBuffer, optionPosComment+3, 0);
2446: }
2447:
2448: fprintf(f, "%s\n", lineBuffer);
2449: // if(strstr(opcodeBuffer, "RTS") || strstr(opcodeBuffer, "RTE") || strstr(opcodeBuffer, "JMP")
2450: // || strstr(opcodeBuffer, "rts") || strstr(opcodeBuffer, "rte") || strstr(opcodeBuffer, "jmp"))
2451: // fprintf(f, "\n");
2452: addr += len;
2453: }
2454: if (nextpc)
2455: *nextpc = addr;
2456: }
2457:
2458:
2459: /*
2460: * Disasm should be called from Hatari's sources to use either uae's built in
2461: * disassembler (DISASM_ENGINE_UAE) or the stand alone disassembler above (DISASM_ENGINE_EXT)
2462: */
2463:
2464: void Disasm (FILE *f, uaecptr addr, uaecptr *nextpc, int cnt , int DisasmEngine)
2465: {
2466: if ( DisasmEngine == DISASM_ENGINE_UAE )
2467: return m68k_disasm (f, addr, nextpc, cnt);
2468: else if ( DisasmEngine == DISASM_ENGINE_EXT )
2469: return Disass68k_loop (f, addr, nextpc, cnt);
2470: }
2471:
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