--- hatari/src/falcon/dsp.c	2019/04/09 08:49:37	1.1.1.5
+++ hatari/src/falcon/dsp.c	2019/04/09 08:58:15	1.1.1.13
@@ -16,10 +16,12 @@
 	GNU General Public License for more details.
 
 	You should have received a copy of the GNU General Public License
-	along with this program; if not, write to the Free Software
-	Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+	along with this program; if not, write to the Free Software Foundation,
+	51 Franklin Street, Fifth Floor, Boston, MA 02110-1335 USA
 */
 
+#include <ctype.h>
+
 #include "main.h"
 #include "sysdeps.h"
 #include "newcpu.h"
@@ -28,9 +30,10 @@
 #include "dsp.h"
 #include "crossbar.h"
 #include "configuration.h"
+#include "cycInt.h"
+#include "m68000.h"
 
 #if ENABLE_DSP_EMU
-#include "m68000.h"
 #include "debugdsp.h"
 #include "dsp_cpu.h"
 #include "dsp_disasm.h"
@@ -47,55 +50,119 @@
 
 
 #if ENABLE_DSP_EMU
+static const char* x_ext_memory_addr_name[] = {
+	"", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+	"", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
+	"PBC", "PCC", "PBDDR", "PCDDR", "PBD", "PCD", "", "",
+	"HCR", "HSR", "", "HRX/HTX", "CRA", "CRB", "SSISR/TSR", "RX/TX",
+	"SCR", "SSR", "SCCR", "STXA", "SRX/STX", "SRX/STX", "SRX/STX", "",
+	"", "", "", "", "", "", "BCR", "IPR"
+};
+
 static Sint32 save_cycles;
 #endif
+
 static bool bDspDebugging;
 
 bool bDspEnabled = false;
 bool bDspHostInterruptPending = false;
 
+Uint64	DSP_CyclesGlobalClockCounter = 0;			/* Value of CyclesGlobalClockCounter when DSP_Run was last called */
+
 
 /**
  * Trigger HREQ interrupt at the host CPU.
  */
 #if ENABLE_DSP_EMU
-static void DSP_TriggerHostInterrupt(void)
+static void DSP_TriggerHostInterrupt(int hreq)
+{
+//fprintf ( stderr, "DSP_TriggerHostInterrupt %d %x %x\n" , hreq , regs.sr , regs.intmask );
+	if ( hreq )
+	{
+		M68000_SetSpecial(SPCFLAG_DSP);			// TODO for old cpu core, remove, use level 6 instead and M68000_Update_intlev()
+		bDspHostInterruptPending = true;
+		M68000_Update_intlev ();
+	}
+	else
+	{
+		M68000_UnsetSpecial(SPCFLAG_DSP);		// TODO for old cpu core, remove, use level 6 instead and M68000_Update_intlev()
+		bDspHostInterruptPending = false;
+		M68000_Update_intlev ();
+	}
+}
+#endif
+
+
+/**
+ * Return the state of HREQ
+ */
+Uint8	DSP_GetHREQ ( void )
+{
+	if ( bDspHostInterruptPending )
+		return 1;
+	else
+		return 0;
+}
+
+
+/**
+ * Return the vector number associated to the HREQ interrupt.
+ * If this function is called when HREQ=0, then we return -1 to indicate
+ * a spurious interrupt.
+ */
+int	DSP_ProcessIACK ( void )
+{
+	int	VecNr;
+
+	if ( bDspHostInterruptPending )
+		VecNr = IoMem_ReadByte ( 0xffa203 );
+	else
+		VecNr = -1;
+	
+	return VecNr;
+}
+
+
+/**
+ * This function is called from the CPU emulation part when SPCFLAG_DSP is set.
+ * If the DSP's IRQ signal is set, we check that SR allows a level 6 interrupt,
+ * and if so, we call M68000_Exception.
+ */
+#if ENABLE_DSP_EMU
+bool	DSP_ProcessIRQ(void)
 {
-	bDspHostInterruptPending = true;
+	if (bDspHostInterruptPending && regs.intmask < 6)
+	{
+		M68000_Exception(IoMem_ReadByte(0xffa203), M68000_EXC_SRC_INT_DSP);
+		bDspHostInterruptPending = false;		// [NP] TODO : remove this line, should be cleared by DSP_TriggerHostInterrupt ?
+		M68000_UnsetSpecial(SPCFLAG_DSP);		// [NP] TODO : remove this line, should be cleared by DSP_TriggerHostInterrupt ?
+		return true;
+	}
 
-	/* Note: The DSP interrupt is not wired to the MFP on a real Falcon
-	 * (but to the COMBEL chip). But in Hatari we still handle it with
-	 * the SPCFLAG_MFP to avoid taking care of another special flag in
-	 * the CPU core! */
-	M68000_SetSpecial(SPCFLAG_MFP);
+	return false;
 }
 #endif
 
 
 /**
- * Initialize the DSP emulation
+ * Initialize the DSP emulation (should be called only once at start)
  */
 void DSP_Init(void)
 {
 #if ENABLE_DSP_EMU
-	if (bDspEnabled || ConfigureParams.System.nDSPType != DSP_TYPE_EMU)
-		return;
 	dsp_core_init(DSP_TriggerHostInterrupt);
 	dsp56k_init_cpu();
-	bDspEnabled = true;
 	save_cycles = 0;
 #endif
 }
 
 
 /**
- * Shut down the DSP emulation
+ * Shut down the DSP emulation (should be called only once at exit)
  */
 void DSP_UnInit(void)
 {
 #if ENABLE_DSP_EMU
-	if (!bDspEnabled)
-		return;
 	dsp_core_shutdown();
 	bDspEnabled = false;
 #endif
@@ -109,24 +176,49 @@ void DSP_Reset(void)
 {
 #if ENABLE_DSP_EMU
 	dsp_core_reset();
-	bDspHostInterruptPending = false;
+	DSP_TriggerHostInterrupt ( 0 );				/* Clear HREQ */
 	save_cycles = 0;
 #endif
 }
 
 
 /**
+ * Enable the DSP emulation
+ */
+void DSP_Enable(void)
+{
+#if ENABLE_DSP_EMU
+	bDspEnabled = true;
+	DSP_CyclesGlobalClockCounter = CyclesGlobalClockCounter;
+#endif
+}
+
+
+/**
+ * Disable the DSP emulation
+ */
+void DSP_Disable(void)
+{
+#if ENABLE_DSP_EMU
+	bDspEnabled = false;
+#endif
+}
+
+
+/**
  * Save/Restore snapshot of CPU variables ('MemorySnapShot_Store' handles type)
  */
 void DSP_MemorySnapShot_Capture(bool bSave)
 {
 #if ENABLE_DSP_EMU
-	if (!bSave)
-		DSP_Reset();
-
 	MemorySnapShot_Store(&bDspEnabled, sizeof(bDspEnabled));
 	MemorySnapShot_Store(&dsp_core, sizeof(dsp_core));
 	MemorySnapShot_Store(&save_cycles, sizeof(save_cycles));
+
+	if ( bDspEnabled )
+		DSP_Enable();
+	else	
+		DSP_Disable();
 #endif
 }
 
@@ -136,29 +228,37 @@ void DSP_MemorySnapShot_Capture(bool bSa
 void DSP_Run(int nHostCycles)
 {
 #if ENABLE_DSP_EMU
-        save_cycles += nHostCycles * 2;
+	if ( nHostCycles == 0 )
+		return;
 
-        if (dsp_core.running == 0)
-                return;
+	DSP_CyclesGlobalClockCounter = CyclesGlobalClockCounter;
 
-        if (save_cycles <= 0)
-                return;
+	save_cycles += nHostCycles * 2;
 
-        if (unlikely(bDspDebugging)) {
-                while (save_cycles > 0)
-                {
-                        DebugDsp_Check();
-                        dsp56k_execute_instruction();
-                        save_cycles -= dsp_core.instr_cycle;
-                }
-        } else {
-		//	fprintf(stderr, "--> %d\n", save_cycles);
-                while (save_cycles > 0)
-                {
-                        dsp56k_execute_instruction();
-                        save_cycles -= dsp_core.instr_cycle;
-                }
-        }
+	if (dsp_core.running == 0)
+		return;
+
+	if (save_cycles <= 0)
+		return;
+
+	if (unlikely(bDspDebugging))
+	{
+		while (save_cycles > 0)
+		{
+			dsp56k_execute_instruction();
+			save_cycles -= dsp_core.instr_cycle;
+			DebugDsp_Check();
+		}
+	}
+	else
+	{
+		// fprintf(stderr, "--> %d\n", save_cycles);
+		while (save_cycles > 0)
+		{
+			dsp56k_execute_instruction();
+			save_cycles -= dsp_core.instr_cycle;
+		}
+	}
 
 #endif
 } 
@@ -185,6 +285,38 @@ Uint16 DSP_GetPC(void)
 }
 
 /**
+ * Get next DSP PC without output (for debugging)
+ */
+Uint16 DSP_GetNextPC(Uint16 pc)
+{
+#if ENABLE_DSP_EMU
+	/* code is reduced copy from dsp56k_execute_one_disasm_instruction() */
+	dsp_core_t dsp_core_save;
+	Uint16 instruction_length;
+
+	if (!bDspEnabled)
+		return 0;
+
+	/* Save DSP context */
+	memcpy(&dsp_core_save, &dsp_core, sizeof(dsp_core));
+
+	/* Disasm instruction */
+	dsp_core.pc = pc;
+	/* why dsp56k_execute_one_disasm_instruction() does "-1"
+	 * for this value, that doesn't seem right???
+	 */
+	instruction_length = dsp56k_disasm(DSP_DISASM_MODE, stderr);
+
+	/* Restore DSP context */
+	memcpy(&dsp_core, &dsp_core_save, sizeof(dsp_core));
+
+	return pc + instruction_length;
+#else
+	return 0;
+#endif
+}
+
+/**
  * Get current DSP instruction cycles (for profiling)
  */
 Uint16 DSP_GetInstrCycles(void)
@@ -201,13 +333,13 @@ Uint16 DSP_GetInstrCycles(void)
 /**
  * Disassemble DSP code between given addresses, return next PC address
  */
-Uint32 DSP_DisasmAddress(Uint16 lowerAdr, Uint16 UpperAdr)
+Uint16 DSP_DisasmAddress(FILE *out, Uint16 lowerAdr, Uint16 UpperAdr)
 {
 #if ENABLE_DSP_EMU
-	Uint32 dsp_pc;
+	Uint16 dsp_pc;
 
 	for (dsp_pc=lowerAdr; dsp_pc<=UpperAdr; dsp_pc++) {
-		dsp_pc += dsp56k_execute_one_disasm_instruction(dsp_pc);
+		dsp_pc += dsp56k_execute_one_disasm_instruction(out, dsp_pc);
 	}
 	return dsp_pc;
 #else
@@ -306,7 +438,7 @@ Uint32 DSP_ReadMemory(Uint16 address, ch
  * Output memory values between given addresses in given DSP address space.
  * Return next DSP address value.
  */
-Uint16 DSP_DisasmMemory(Uint16 dsp_memdump_addr, Uint16 dsp_memdump_upper, char space)
+Uint16 DSP_DisasmMemory(FILE *fp, Uint16 dsp_memdump_addr, Uint16 dsp_memdump_upper, char space)
 {
 #if ENABLE_DSP_EMU
 	Uint32 mem, mem2, value;
@@ -314,15 +446,19 @@ Uint16 DSP_DisasmMemory(Uint16 dsp_memdu
 
 	for (mem = dsp_memdump_addr; mem <= dsp_memdump_upper; mem++) {
 		/* special printing of host communication/transmit registers */
-		if (space == 'X' && (mem == 0xffeb || mem == 0xffef)) {
+		if (space == 'X' && mem >= 0xffc0) {
 			if (mem == 0xffeb) {
-				fprintf(stderr,"X periph:%04x  HTX : %06x   RTX:%06x\n", 
+				fprintf(fp, "X periph:%04x  HTX : %06x   RTX:%06x\n",
 					mem, dsp_core.dsp_host_htx, dsp_core.dsp_host_rtx);
 			}
 			else if (mem == 0xffef) {
-				fprintf(stderr,"X periph:%04x  SSI TX : %06x   SSI RX:%06x\n", 
+				fprintf(fp, "X periph:%04x  SSI TX : %06x   SSI RX:%06x\n",
 					mem, dsp_core.ssi.transmit_value, dsp_core.ssi.received_value);
 			}
+			else {
+				value = DSP_ReadMemory(mem, space, &mem_str);
+				fprintf(fp, "%s:%04x  %06x\t%s\n", mem_str, mem, value, x_ext_memory_addr_name[mem-0xffc0]);
+			}
 			continue;
 		}
 		/* special printing of X & Y external RAM values */
@@ -332,41 +468,83 @@ Uint16 DSP_DisasmMemory(Uint16 dsp_memdu
 			if (space == 'X') {
 				mem2 += (DSP_RAMSIZE>>1);
 			}
-			fprintf(stderr,"%c:%04x (P:%04x): %06x\n", space,
+			fprintf(fp, "%c:%04x (P:%04x): %06x\n", space,
 				mem, mem2, dsp_core.ramext[mem2 & (DSP_RAMSIZE-1)]);
 			continue;
 		}
 		value = DSP_ReadMemory(mem, space, &mem_str);
-		fprintf(stderr,"%s:%04x  %06x\n", mem_str, mem, value);
+		fprintf(fp, "%s:%04x  %06x\n", mem_str, mem, value);
 	}
 #endif
 	return dsp_memdump_upper+1;
 }
 
+/**
+ * Show information on DSP core state which isn't
+ * shown by any of the other commands (dd, dm, dr).
+ */
+void DSP_Info(FILE *fp, Uint32 dummy)
+{
+#if ENABLE_DSP_EMU
+	int i, j;
+	const char *stackname[] = { "SSH", "SSL" };
 
-void DSP_DisasmRegisters(void)
+	fputs("DSP core information:\n", fp);
+
+	for (i = 0; i < ARRAY_SIZE(stackname); i++) {
+		fprintf(fp, "- %s stack:", stackname[i]);
+		for (j = 0; j < ARRAY_SIZE(dsp_core.stack[0]); j++) {
+			fprintf(fp, " %04hx", dsp_core.stack[i][j]);
+		}
+		fputs("\n", fp);
+	}
+
+	fprintf(fp, "- Interrupt IPL:");
+	for (i = 0; i < ARRAY_SIZE(dsp_core.interrupt_ipl); i++) {
+		fprintf(fp, " %04hx", dsp_core.interrupt_ipl[i]);
+	}
+	fputs("\n", fp);
+
+	fprintf(fp, "- Pending ints: ");
+	for (i = 0; i < ARRAY_SIZE(dsp_core.interrupt_isPending); i++) {
+		fprintf(fp, " %04hx", dsp_core.interrupt_isPending[i]);
+	}
+	fputs("\n", fp);
+
+	fprintf(fp, "- Hostport:");
+	for (i = 0; i < ARRAY_SIZE(dsp_core.hostport); i++) {
+		fprintf(fp, " %02x", dsp_core.hostport[i]);
+	}
+	fputs("\n", fp);
+#endif
+}
+
+/**
+ * Show DSP register contents
+ */
+void DSP_DisasmRegisters(FILE *fp)
 {
 #if ENABLE_DSP_EMU
 	Uint32 i;
 
-	fprintf(stderr,"A: A2: %02x  A1: %06x  A0: %06x\n",
+	fprintf(fp, "A: A2: %02x  A1: %06x  A0: %06x\n",
 		dsp_core.registers[DSP_REG_A2], dsp_core.registers[DSP_REG_A1], dsp_core.registers[DSP_REG_A0]);
-	fprintf(stderr,"B: B2: %02x  B1: %06x  B0: %06x\n",
+	fprintf(fp, "B: B2: %02x  B1: %06x  B0: %06x\n",
 		dsp_core.registers[DSP_REG_B2], dsp_core.registers[DSP_REG_B1], dsp_core.registers[DSP_REG_B0]);
 	
-	fprintf(stderr,"X: X1: %06x  X0: %06x\n", dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0]);
-	fprintf(stderr,"Y: Y1: %06x  Y0: %06x\n", dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0]);
+	fprintf(fp, "X: X1: %06x  X0: %06x\n", dsp_core.registers[DSP_REG_X1], dsp_core.registers[DSP_REG_X0]);
+	fprintf(fp, "Y: Y1: %06x  Y0: %06x\n", dsp_core.registers[DSP_REG_Y1], dsp_core.registers[DSP_REG_Y0]);
 
 	for (i=0; i<8; i++) {
-		fprintf(stderr,"R%01x: %04x   N%01x: %04x   M%01x: %04x\n", 
+		fprintf(fp, "R%01x: %04x   N%01x: %04x   M%01x: %04x\n",
 			i, dsp_core.registers[DSP_REG_R0+i],
 			i, dsp_core.registers[DSP_REG_N0+i],
 			i, dsp_core.registers[DSP_REG_M0+i]);
 	}
 
-	fprintf(stderr,"LA: %04x   LC: %04x   PC: %04x\n", dsp_core.registers[DSP_REG_LA], dsp_core.registers[DSP_REG_LC], dsp_core.pc);
-	fprintf(stderr,"SR: %04x  OMR: %02x\n", dsp_core.registers[DSP_REG_SR], dsp_core.registers[DSP_REG_OMR]);
-	fprintf(stderr,"SP: %02x    SSH: %04x  SSL: %04x\n", 
+	fprintf(fp, "LA: %04x   LC: %04x   PC: %04x\n", dsp_core.registers[DSP_REG_LA], dsp_core.registers[DSP_REG_LC], dsp_core.pc);
+	fprintf(fp, "SR: %04x  OMR: %02x\n", dsp_core.registers[DSP_REG_SR], dsp_core.registers[DSP_REG_OMR]);
+	fprintf(fp, "SP: %02x    SSH: %04x  SSL: %04x\n",
 		dsp_core.registers[DSP_REG_SP], dsp_core.registers[DSP_REG_SSH], dsp_core.registers[DSP_REG_SSL]);
 #endif
 }
@@ -458,7 +636,7 @@ int DSP_GetRegisterAddress(const char *r
 		{ "Y1",  &dsp_core.registers[DSP_REG_Y1],  32, BITMASK(24) }
 	};
 	/* left, right, middle, direction */
-        int l, r, m, dir = 0;
+	int l, r, m, dir = 0;
 	unsigned int i, len;
 	char reg[MAX_REGNAME_LEN];
 
@@ -467,7 +645,7 @@ int DSP_GetRegisterAddress(const char *r
 	}
 
 	for (i = 0; i < sizeof(reg) && regname[i]; i++) {
-		reg[i] = toupper(regname[i]);
+		reg[i] = toupper((unsigned char)regname[i]);
 	}
 	if (i < 2 || regname[i]) {
 		/* too short or longer than any of the names */
@@ -477,7 +655,7 @@ int DSP_GetRegisterAddress(const char *r
 	
 	/* bisect */
 	l = 0;
-	r = sizeof (registers) / sizeof (*registers) - 1;
+	r = ARRAY_SIZE(registers) - 1;
 	do {
 		m = (l+r) >> 1;
 		for (i = 0; i < len; i++) {
@@ -642,11 +820,15 @@ void DSP_SsiTransmit_SCK(void)
 
 /**
  * Read access wrapper for ioMemTabFalcon (DSP Host port)
+ * DSP Host interface port is accessed by the 68030 in Byte mode.
+ * A move.w value,$ffA206 results in 2 bus access for the 68030.
  */
 void DSP_HandleReadAccess(void)
 {
 	Uint32 addr;
 	Uint8 value;
+	bool multi_access = false; 
+	
 	for (addr = IoAccessBaseAddress; addr < IoAccessBaseAddress+nIoMemAccessSize; addr++)
 	{
 #if ENABLE_DSP_EMU
@@ -655,6 +837,9 @@ void DSP_HandleReadAccess(void)
 		/* this value prevents TOS from hanging in the DSP init code */
 		value = 0xff;
 #endif
+		if (multi_access == true)
+			M68000_AddCycles(4);
+		multi_access = true;
 
 		Dprintf(("HWget_b(0x%08x)=0x%02x at 0x%08x\n", addr, value, m68k_getpc()));
 		IoMem_WriteByte(addr, value);
@@ -663,17 +848,23 @@ void DSP_HandleReadAccess(void)
 
 /**
  * Write access wrapper for ioMemTabFalcon (DSP Host port)
+ * DSP Host interface port is accessed by the 68030 in Byte mode.
+ * A move.w value,$ffA206 results in 2 bus access for the 68030.
  */
 void DSP_HandleWriteAccess(void)
 {
 	Uint32 addr;
-	Uint8 value;
+	bool multi_access = false; 
+
 	for (addr = IoAccessBaseAddress; addr < IoAccessBaseAddress+nIoMemAccessSize; addr++)
 	{
-		value = IoMem_ReadByte(addr);
-		Dprintf(("HWput_b(0x%08x,0x%02x) at 0x%08x\n", addr, value, m68k_getpc()));
 #if ENABLE_DSP_EMU
+		Uint8 value = IoMem_ReadByte(addr);
+		Dprintf(("HWput_b(0x%08x,0x%02x) at 0x%08x\n", addr, value, m68k_getpc()));
 		dsp_core_write_host(addr-DSP_HW_OFFSET, value);
 #endif
+		if (multi_access == true)
+			M68000_AddCycles(4);
+		multi_access = true;
 	}
 }